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1 | // ========== Copyright Header Begin ========================================== |
2 | // | |
3 | // OpenSPARC T2 Processor File: cpx_bfd_dp.v | |
4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
6 | // | |
7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
8 | // | |
9 | // This program is free software; you can redistribute it and/or modify | |
10 | // it under the terms of the GNU General Public License as published by | |
11 | // the Free Software Foundation; version 2 of the License. | |
12 | // | |
13 | // This program is distributed in the hope that it will be useful, | |
14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | // GNU General Public License for more details. | |
17 | // | |
18 | // You should have received a copy of the GNU General Public License | |
19 | // along with this program; if not, write to the Free Software | |
20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | // | |
22 | // For the avoidance of doubt, and except that if any non-GPL license | |
23 | // choice is available it will apply instead, Sun elects to use only | |
24 | // the General Public License version 2 (GPLv2) at this time for any | |
25 | // software where a choice of GPL license versions is made | |
26 | // available with the language indicating that GPLv2 or any later version | |
27 | // may be used, or where a choice of which version of the GPL is applied is | |
28 | // otherwise unspecified. | |
29 | // | |
30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
32 | // have any questions. | |
33 | // | |
34 | // ========== Copyright Header End ============================================ | |
35 | `ifndef FPGA | |
36 | module cpx_bfd_dp ( | |
37 | cpx_spc_data_cx2, | |
38 | cpx_spc_data_x_, | |
39 | tcu_scan_en, | |
40 | l2clk, | |
41 | scan_in, | |
42 | tcu_pce_ov, | |
43 | ccx_aclk, | |
44 | ccx_bclk, | |
45 | scan_out, | |
46 | ccx_aclk_out, | |
47 | ccx_bclk_out, | |
48 | tcu_pce_ov_out, | |
49 | tcu_scan_en_out); | |
50 | wire pce_ov; | |
51 | wire stop; | |
52 | wire siclk; | |
53 | wire soclk; | |
54 | wire se; | |
55 | wire [145:0] in; | |
56 | wire [145:0] in_swz; | |
57 | wire i_dff_data_0_scanin; | |
58 | wire i_dff_data_0_scanout; | |
59 | wire [145:0] in_x2; | |
60 | wire i_dff_data_1_scanin; | |
61 | wire i_dff_data_1_scanout; | |
62 | wire i_dff_data_2_scanin; | |
63 | wire i_dff_data_2_scanout; | |
64 | wire i_dff_data_3_scanin; | |
65 | wire i_dff_data_3_scanout; | |
66 | wire [145:0] in_px2; | |
67 | wire [145:0] out_swz; | |
68 | wire scan_out_prebuf; | |
69 | ||
70 | ||
71 | output [145:0] cpx_spc_data_cx2; | |
72 | ||
73 | input [145:0] cpx_spc_data_x_; | |
74 | ||
75 | //globals | |
76 | input tcu_scan_en ; | |
77 | input l2clk; | |
78 | input scan_in; | |
79 | input tcu_pce_ov; // scan signals | |
80 | input ccx_aclk; | |
81 | input ccx_bclk; | |
82 | output scan_out; | |
83 | ||
84 | // buffer the high fanout nets | |
85 | output ccx_aclk_out; | |
86 | output ccx_bclk_out; | |
87 | output tcu_pce_ov_out; | |
88 | output tcu_scan_en_out; | |
89 | ||
90 | // scan renames | |
91 | assign pce_ov = tcu_pce_ov_out; | |
92 | assign stop = 1'b0; | |
93 | assign siclk = ccx_aclk_out; | |
94 | assign soclk = ccx_bclk_out; | |
95 | assign se = tcu_scan_en_out ; | |
96 | // end scan | |
97 | ||
98 | ||
99 | cpx_bfd_dp_buff_macro__dbuff_8x__stack_none__width_4 buf_hfn ( | |
100 | .din ({ccx_aclk,ccx_bclk, tcu_pce_ov, tcu_scan_en}), | |
101 | .dout ({ccx_aclk_out,ccx_bclk_out,tcu_pce_ov_out,tcu_scan_en_out}) | |
102 | ); | |
103 | ||
104 | assign in[145:0] = cpx_spc_data_x_[145:0]; | |
105 | ||
106 | assign in_swz[72:0] = { | |
107 | in[144],in[142],in[140], | |
108 | in[138],in[136],in[134],in[132],in[130],in[128],in[126],in[124],in[122],in[120], | |
109 | in[118],in[116],in[114],in[112],in[110],in[108],in[106],in[104],in[102],in[100], | |
110 | in[98],in[96],in[94],in[92],in[90],in[88],in[86],in[84],in[82],in[80], | |
111 | in[78],in[76],in[74],in[72],in[70],in[68],in[66],in[64],in[62],in[60], | |
112 | in[58],in[56],in[54],in[52],in[50],in[48],in[46],in[44],in[42],in[40], | |
113 | in[38],in[36],in[34],in[32],in[30],in[28],in[26],in[24],in[22],in[20], | |
114 | in[18],in[16],in[14],in[12],in[10],in[8],in[6],in[4],in[2],in[0] | |
115 | }; | |
116 | ||
117 | ||
118 | ||
119 | assign in_swz[145:73] = { | |
120 | in[145],in[143],in[141], | |
121 | in[139],in[137],in[135],in[133],in[131],in[129],in[127],in[125],in[123],in[121], | |
122 | in[119],in[117],in[115],in[113],in[111],in[109],in[107],in[105],in[103],in[101], | |
123 | in[99],in[97],in[95],in[93],in[91],in[89],in[87],in[85],in[83],in[81], | |
124 | in[79],in[77],in[75],in[73],in[71],in[69],in[67],in[65],in[63],in[61], | |
125 | in[59],in[57],in[55],in[53],in[51],in[49],in[47],in[45],in[43],in[41], | |
126 | in[39],in[37],in[35],in[33],in[31],in[29],in[27],in[25],in[23],in[21], | |
127 | in[19],in[17],in[15],in[13],in[11],in[9],in[7],in[5],in[3],in[1] | |
128 | }; | |
129 | ||
130 | ||
131 | cpx_bfd_dp_msffiz_macro__dmsffi_32x__stack_64c__width_64 i_dff_data_0 ( | |
132 | .scan_in(i_dff_data_0_scanin), | |
133 | .scan_out(i_dff_data_0_scanout), | |
134 | .clk (l2clk), | |
135 | .din ({in_swz[63:0]}), | |
136 | .dout_l ({in_x2[63:0]}), | |
137 | .en (1'b1), | |
138 | .se(se), | |
139 | .siclk(siclk), | |
140 | .soclk(soclk), | |
141 | .pce_ov(pce_ov), | |
142 | .stop(stop) | |
143 | ); | |
144 | ||
145 | cpx_bfd_dp_msffiz_macro__dmsffi_32x__scanreverse_1__stack_64c__width_64 i_dff_data_1 ( | |
146 | .scan_in(i_dff_data_1_scanin), | |
147 | .scan_out(i_dff_data_1_scanout), | |
148 | .clk (l2clk), | |
149 | .din ({in_swz[136:73]}), | |
150 | .dout_l ({in_x2[136:73]}), | |
151 | .en (1'b1), | |
152 | .se(se), | |
153 | .siclk(siclk), | |
154 | .soclk(soclk), | |
155 | .pce_ov(pce_ov), | |
156 | .stop(stop) | |
157 | ); | |
158 | ||
159 | cpx_bfd_dp_msffiz_macro__dmsffi_32x__stack_10l__width_9 i_dff_data_2 ( | |
160 | .scan_in(i_dff_data_2_scanin), | |
161 | .scan_out(i_dff_data_2_scanout), | |
162 | .clk (l2clk), | |
163 | .din ({in_swz[72:64]}), | |
164 | .dout_l ({in_x2[72:64]}), | |
165 | .en (1'b1), | |
166 | .se(se), | |
167 | .siclk(siclk), | |
168 | .soclk(soclk), | |
169 | .pce_ov(pce_ov), | |
170 | .stop(stop) | |
171 | ); | |
172 | ||
173 | cpx_bfd_dp_msffiz_macro__dmsffi_32x__stack_10l__width_9 i_dff_data_3 ( | |
174 | .scan_in(i_dff_data_3_scanin), | |
175 | .scan_out(i_dff_data_3_scanout), | |
176 | .clk (l2clk), | |
177 | .din ({in_swz[145:137]}), | |
178 | .dout_l ({in_x2[145:137]}), | |
179 | .en (1'b1), | |
180 | .se(se), | |
181 | .siclk(siclk), | |
182 | .soclk(soclk), | |
183 | .pce_ov(pce_ov), | |
184 | .stop(stop) | |
185 | ); | |
186 | ||
187 | //buff_macro i_buf_data_0 (dbuff=32x, width=64, stack=64c) ( | |
188 | // .din ({in_x2[63:0] }), | |
189 | // .dout ({in_px2[63:0]}), | |
190 | //); | |
191 | // | |
192 | //buff_macro i_buf_data_1 (dbuff=32x, width=64, stack=64c) ( | |
193 | // .din ({in_x2[136:73]}), | |
194 | // .dout ({in_px2[136:73]}), | |
195 | //); | |
196 | // | |
197 | //buff_macro i_buf_data_2 (dbuff=32x, width=9, stack=none) ( | |
198 | // .din ({in_x2[72:64]}), | |
199 | // .dout ({in_px2[72:64]}), | |
200 | //); | |
201 | // | |
202 | //buff_macro i_buf_data_3 (dbuff=32x, width=9, stack=none) ( | |
203 | // .din ({in_x2[145:137]}), | |
204 | // .dout ({in_px2[145:137]}), | |
205 | //); | |
206 | ||
207 | assign in_px2[145:0] = in_x2[145:0]; | |
208 | ||
209 | assign { | |
210 | out_swz[144],out_swz[142],out_swz[140], | |
211 | out_swz[138],out_swz[136],out_swz[134],out_swz[132],out_swz[130],out_swz[128],out_swz[126],out_swz[124],out_swz[122],out_swz[120], | |
212 | out_swz[118],out_swz[116],out_swz[114],out_swz[112],out_swz[110],out_swz[108],out_swz[106],out_swz[104],out_swz[102],out_swz[100], | |
213 | out_swz[98],out_swz[96],out_swz[94],out_swz[92],out_swz[90],out_swz[88],out_swz[86],out_swz[84],out_swz[82],out_swz[80], | |
214 | out_swz[78],out_swz[76],out_swz[74],out_swz[72],out_swz[70],out_swz[68],out_swz[66],out_swz[64],out_swz[62],out_swz[60], | |
215 | out_swz[58],out_swz[56],out_swz[54],out_swz[52],out_swz[50],out_swz[48],out_swz[46],out_swz[44],out_swz[42],out_swz[40], | |
216 | out_swz[38],out_swz[36],out_swz[34],out_swz[32],out_swz[30],out_swz[28],out_swz[26],out_swz[24],out_swz[22],out_swz[20], | |
217 | out_swz[18],out_swz[16],out_swz[14],out_swz[12],out_swz[10],out_swz[8],out_swz[6],out_swz[4],out_swz[2],out_swz[0] | |
218 | } = in_px2[72:0]; | |
219 | ||
220 | ||
221 | ||
222 | assign { | |
223 | out_swz[145],out_swz[143],out_swz[141], | |
224 | out_swz[139],out_swz[137],out_swz[135],out_swz[133],out_swz[131],out_swz[129],out_swz[127],out_swz[125],out_swz[123],out_swz[121], | |
225 | out_swz[119],out_swz[117],out_swz[115],out_swz[113],out_swz[111],out_swz[109],out_swz[107],out_swz[105],out_swz[103],out_swz[101], | |
226 | out_swz[99],out_swz[97],out_swz[95],out_swz[93],out_swz[91],out_swz[89],out_swz[87],out_swz[85],out_swz[83],out_swz[81], | |
227 | out_swz[79],out_swz[77],out_swz[75],out_swz[73],out_swz[71],out_swz[69],out_swz[67],out_swz[65],out_swz[63],out_swz[61], | |
228 | out_swz[59],out_swz[57],out_swz[55],out_swz[53],out_swz[51],out_swz[49],out_swz[47],out_swz[45],out_swz[43],out_swz[41], | |
229 | out_swz[39],out_swz[37],out_swz[35],out_swz[33],out_swz[31],out_swz[29],out_swz[27],out_swz[25],out_swz[23],out_swz[21], | |
230 | out_swz[19],out_swz[17],out_swz[15],out_swz[13],out_swz[11],out_swz[9],out_swz[7],out_swz[5],out_swz[3],out_swz[1] | |
231 | } = in_px2[145:73]; | |
232 | ||
233 | ||
234 | assign cpx_spc_data_cx2[145:0] = out_swz[145:0]; | |
235 | ||
236 | cpx_bfd_dp_buff_macro__dbuff_8x__stack_none__width_1 buf_scanout ( | |
237 | .din (scan_out_prebuf), | |
238 | .dout (scan_out) | |
239 | ); | |
240 | ||
241 | ||
242 | // fixscan start: | |
243 | assign i_dff_data_0_scanin = scan_in ; | |
244 | assign i_dff_data_1_scanin = i_dff_data_0_scanout ; | |
245 | assign i_dff_data_2_scanin = i_dff_data_1_scanout ; | |
246 | assign i_dff_data_3_scanin = i_dff_data_2_scanout ; | |
247 | assign scan_out_prebuf = i_dff_data_3_scanout ; | |
248 | // fixscan end: | |
249 | endmodule // cpx_bfs_dp | |
250 | ||
251 | ||
252 | // | |
253 | // buff macro | |
254 | // | |
255 | // | |
256 | ||
257 | ||
258 | ||
259 | ||
260 | ||
261 | module cpx_bfd_dp_buff_macro__dbuff_8x__stack_none__width_4 ( | |
262 | din, | |
263 | dout); | |
264 | input [3:0] din; | |
265 | output [3:0] dout; | |
266 | ||
267 | ||
268 | ||
269 | ||
270 | ||
271 | ||
272 | buff #(4) d0_0 ( | |
273 | .in(din[3:0]), | |
274 | .out(dout[3:0]) | |
275 | ); | |
276 | ||
277 | ||
278 | ||
279 | ||
280 | ||
281 | ||
282 | ||
283 | ||
284 | endmodule | |
285 | ||
286 | ||
287 | ||
288 | ||
289 | ||
290 | ||
291 | ||
292 | ||
293 | ||
294 | // any PARAMS parms go into naming of macro | |
295 | ||
296 | module cpx_bfd_dp_msffiz_macro__dmsffi_32x__stack_64c__width_64 ( | |
297 | din, | |
298 | clk, | |
299 | en, | |
300 | se, | |
301 | scan_in, | |
302 | siclk, | |
303 | soclk, | |
304 | pce_ov, | |
305 | stop, | |
306 | dout_l, | |
307 | scan_out); | |
308 | wire l1clk; | |
309 | wire siclk_out; | |
310 | wire soclk_out; | |
311 | wire [62:0] so; | |
312 | ||
313 | input [63:0] din; | |
314 | ||
315 | ||
316 | input clk; | |
317 | input en; | |
318 | input se; | |
319 | input scan_in; | |
320 | input siclk; | |
321 | input soclk; | |
322 | input pce_ov; | |
323 | input stop; | |
324 | ||
325 | ||
326 | ||
327 | output [63:0] dout_l; | |
328 | ||
329 | ||
330 | output scan_out; | |
331 | ||
332 | ||
333 | ||
334 | ||
335 | cl_dp1_l1hdr_8x c0_0 ( | |
336 | .l2clk(clk), | |
337 | .pce(en), | |
338 | .aclk(siclk), | |
339 | .bclk(soclk), | |
340 | .l1clk(l1clk), | |
341 | .se(se), | |
342 | .pce_ov(pce_ov), | |
343 | .stop(stop), | |
344 | .siclk_out(siclk_out), | |
345 | .soclk_out(soclk_out) | |
346 | ); | |
347 | msffiz_dp #(64) d0_0 ( | |
348 | .l1clk(l1clk), | |
349 | .siclk(siclk_out), | |
350 | .soclk(soclk_out), | |
351 | .d(din[63:0]), | |
352 | .si({scan_in,so[62:0]}), | |
353 | .so({so[62:0],scan_out}), | |
354 | .q_l(dout_l[63:0]) | |
355 | ); | |
356 | ||
357 | ||
358 | ||
359 | ||
360 | ||
361 | ||
362 | ||
363 | ||
364 | ||
365 | ||
366 | ||
367 | ||
368 | ||
369 | ||
370 | ||
371 | ||
372 | ||
373 | ||
374 | ||
375 | endmodule | |
376 | ||
377 | ||
378 | ||
379 | ||
380 | ||
381 | ||
382 | ||
383 | ||
384 | ||
385 | ||
386 | ||
387 | ||
388 | ||
389 | // any PARAMS parms go into naming of macro | |
390 | ||
391 | module cpx_bfd_dp_msffiz_macro__dmsffi_32x__scanreverse_1__stack_64c__width_64 ( | |
392 | din, | |
393 | clk, | |
394 | en, | |
395 | se, | |
396 | scan_in, | |
397 | siclk, | |
398 | soclk, | |
399 | pce_ov, | |
400 | stop, | |
401 | dout_l, | |
402 | scan_out); | |
403 | wire l1clk; | |
404 | wire siclk_out; | |
405 | wire soclk_out; | |
406 | ||
407 | input [63:0] din; | |
408 | ||
409 | ||
410 | input clk; | |
411 | input en; | |
412 | input se; | |
413 | input scan_in; | |
414 | input siclk; | |
415 | input soclk; | |
416 | input pce_ov; | |
417 | input stop; | |
418 | ||
419 | ||
420 | ||
421 | output [63:0] dout_l; | |
422 | ||
423 | ||
424 | output scan_out; | |
425 | ||
426 | ||
427 | ||
428 | ||
429 | wire [0:62] so; | |
430 | ||
431 | cl_dp1_l1hdr_8x c0_0 ( | |
432 | .l2clk(clk), | |
433 | .pce(en), | |
434 | .aclk(siclk), | |
435 | .bclk(soclk), | |
436 | .l1clk(l1clk), | |
437 | .se(se), | |
438 | .pce_ov(pce_ov), | |
439 | .stop(stop), | |
440 | .siclk_out(siclk_out), | |
441 | .soclk_out(soclk_out) | |
442 | ); | |
443 | msffiz_dp #(64) d0_0 ( | |
444 | .l1clk(l1clk), | |
445 | .siclk(siclk_out), | |
446 | .soclk(soclk_out), | |
447 | .d(din[63:0]), | |
448 | .si({so[0:62],scan_in}), | |
449 | .so({scan_out,so[0:62]}), | |
450 | .q_l(dout_l[63:0]) | |
451 | ); | |
452 | ||
453 | ||
454 | ||
455 | ||
456 | ||
457 | ||
458 | ||
459 | ||
460 | ||
461 | ||
462 | ||
463 | ||
464 | ||
465 | ||
466 | ||
467 | ||
468 | ||
469 | ||
470 | ||
471 | endmodule | |
472 | ||
473 | ||
474 | ||
475 | ||
476 | ||
477 | ||
478 | ||
479 | ||
480 | ||
481 | ||
482 | ||
483 | ||
484 | ||
485 | // any PARAMS parms go into naming of macro | |
486 | ||
487 | module cpx_bfd_dp_msffiz_macro__dmsffi_32x__stack_10l__width_9 ( | |
488 | din, | |
489 | clk, | |
490 | en, | |
491 | se, | |
492 | scan_in, | |
493 | siclk, | |
494 | soclk, | |
495 | pce_ov, | |
496 | stop, | |
497 | dout_l, | |
498 | scan_out); | |
499 | wire l1clk; | |
500 | wire siclk_out; | |
501 | wire soclk_out; | |
502 | wire [7:0] so; | |
503 | ||
504 | input [8:0] din; | |
505 | ||
506 | ||
507 | input clk; | |
508 | input en; | |
509 | input se; | |
510 | input scan_in; | |
511 | input siclk; | |
512 | input soclk; | |
513 | input pce_ov; | |
514 | input stop; | |
515 | ||
516 | ||
517 | ||
518 | output [8:0] dout_l; | |
519 | ||
520 | ||
521 | output scan_out; | |
522 | ||
523 | ||
524 | ||
525 | ||
526 | cl_dp1_l1hdr_8x c0_0 ( | |
527 | .l2clk(clk), | |
528 | .pce(en), | |
529 | .aclk(siclk), | |
530 | .bclk(soclk), | |
531 | .l1clk(l1clk), | |
532 | .se(se), | |
533 | .pce_ov(pce_ov), | |
534 | .stop(stop), | |
535 | .siclk_out(siclk_out), | |
536 | .soclk_out(soclk_out) | |
537 | ); | |
538 | msffiz_dp #(9) d0_0 ( | |
539 | .l1clk(l1clk), | |
540 | .siclk(siclk_out), | |
541 | .soclk(soclk_out), | |
542 | .d(din[8:0]), | |
543 | .si({scan_in,so[7:0]}), | |
544 | .so({so[7:0],scan_out}), | |
545 | .q_l(dout_l[8:0]) | |
546 | ); | |
547 | ||
548 | ||
549 | ||
550 | ||
551 | ||
552 | ||
553 | ||
554 | ||
555 | ||
556 | ||
557 | ||
558 | ||
559 | ||
560 | ||
561 | ||
562 | ||
563 | ||
564 | ||
565 | ||
566 | endmodule | |
567 | ||
568 | ||
569 | ||
570 | ||
571 | ||
572 | ||
573 | ||
574 | ||
575 | ||
576 | // | |
577 | // buff macro | |
578 | // | |
579 | // | |
580 | ||
581 | ||
582 | ||
583 | ||
584 | ||
585 | module cpx_bfd_dp_buff_macro__dbuff_8x__stack_none__width_1 ( | |
586 | din, | |
587 | dout); | |
588 | input [0:0] din; | |
589 | output [0:0] dout; | |
590 | ||
591 | ||
592 | ||
593 | ||
594 | ||
595 | ||
596 | buff #(1) d0_0 ( | |
597 | .in(din[0:0]), | |
598 | .out(dout[0:0]) | |
599 | ); | |
600 | ||
601 | ||
602 | ||
603 | ||
604 | ||
605 | ||
606 | ||
607 | ||
608 | endmodule | |
609 | ||
610 | `endif // `ifndef FPGA | |
611 | ||
612 | `ifdef FPGA | |
613 | `timescale 1 ns / 100 ps | |
614 | module cpx_bfd_dp(cpx_spc_data_cx2, cpx_spc_data_x_, tcu_scan_en, l2clk, | |
615 | scan_in, tcu_pce_ov, ccx_aclk, ccx_bclk, scan_out, ccx_aclk_out, | |
616 | ccx_bclk_out, tcu_pce_ov_out, tcu_scan_en_out); | |
617 | ||
618 | output [145:0] cpx_spc_data_cx2; | |
619 | input [145:0] cpx_spc_data_x_; | |
620 | input tcu_scan_en; | |
621 | input l2clk; | |
622 | input scan_in; | |
623 | input tcu_pce_ov; | |
624 | input ccx_aclk; | |
625 | input ccx_bclk; | |
626 | output scan_out; | |
627 | output ccx_aclk_out; | |
628 | output ccx_bclk_out; | |
629 | output tcu_pce_ov_out; | |
630 | output tcu_scan_en_out; | |
631 | ||
632 | wire pce_ov; | |
633 | wire stop; | |
634 | wire siclk; | |
635 | wire soclk; | |
636 | wire se; | |
637 | wire [145:0] in; | |
638 | wire [145:0] in_swz; | |
639 | wire i_dff_data_0_scanin; | |
640 | wire i_dff_data_0_scanout; | |
641 | wire [145:0] in_x2; | |
642 | wire i_dff_data_1_scanin; | |
643 | wire i_dff_data_1_scanout; | |
644 | wire i_dff_data_2_scanin; | |
645 | wire i_dff_data_2_scanout; | |
646 | wire i_dff_data_3_scanin; | |
647 | wire i_dff_data_3_scanout; | |
648 | wire [145:0] in_px2; | |
649 | wire [145:0] out_swz; | |
650 | wire scan_out_prebuf; | |
651 | ||
652 | assign pce_ov = tcu_pce_ov_out; | |
653 | assign stop = 1'b0; | |
654 | assign siclk = ccx_aclk_out; | |
655 | assign soclk = ccx_bclk_out; | |
656 | assign se = tcu_scan_en_out; | |
657 | assign in[145:0] = cpx_spc_data_x_[145:0]; | |
658 | assign in_swz[72:0] = {in[144], in[142], in[140], in[138], in[136], | |
659 | in[134], in[132], in[130], in[128], in[126], in[124], in[122], | |
660 | in[120], in[118], in[116], in[114], in[112], in[110], in[108], | |
661 | in[106], in[104], in[102], in[100], in[98], in[96], in[94], | |
662 | in[92], in[90], in[88], in[86], in[84], in[82], in[80], in[78], | |
663 | in[76], in[74], in[72], in[70], in[68], in[66], in[64], in[62], | |
664 | in[60], in[58], in[56], in[54], in[52], in[50], in[48], in[46], | |
665 | in[44], in[42], in[40], in[38], in[36], in[34], in[32], in[30], | |
666 | in[28], in[26], in[24], in[22], in[20], in[18], in[16], in[14], | |
667 | in[12], in[10], in[8], in[6], in[4], in[2], in[0]}; | |
668 | assign in_swz[145:73] = {in[145], in[143], in[141], in[139], in[137], | |
669 | in[135], in[133], in[131], in[129], in[127], in[125], in[123], | |
670 | in[121], in[119], in[117], in[115], in[113], in[111], in[109], | |
671 | in[107], in[105], in[103], in[101], in[99], in[97], in[95], | |
672 | in[93], in[91], in[89], in[87], in[85], in[83], in[81], in[79], | |
673 | in[77], in[75], in[73], in[71], in[69], in[67], in[65], in[63], | |
674 | in[61], in[59], in[57], in[55], in[53], in[51], in[49], in[47], | |
675 | in[45], in[43], in[41], in[39], in[37], in[35], in[33], in[31], | |
676 | in[29], in[27], in[25], in[23], in[21], in[19], in[17], in[15], | |
677 | in[13], in[11], in[9], in[7], in[5], in[3], in[1]}; | |
678 | assign in_px2[145:0] = in_x2[145:0]; | |
679 | assign {out_swz[144], out_swz[142], out_swz[140], out_swz[138], | |
680 | out_swz[136], out_swz[134], out_swz[132], out_swz[130], | |
681 | out_swz[128], out_swz[126], out_swz[124], out_swz[122], | |
682 | out_swz[120], out_swz[118], out_swz[116], out_swz[114], | |
683 | out_swz[112], out_swz[110], out_swz[108], out_swz[106], | |
684 | out_swz[104], out_swz[102], out_swz[100], out_swz[98], | |
685 | out_swz[96], out_swz[94], out_swz[92], out_swz[90], out_swz[88], | |
686 | out_swz[86], out_swz[84], out_swz[82], out_swz[80], out_swz[78], | |
687 | out_swz[76], out_swz[74], out_swz[72], out_swz[70], out_swz[68], | |
688 | out_swz[66], out_swz[64], out_swz[62], out_swz[60], out_swz[58], | |
689 | out_swz[56], out_swz[54], out_swz[52], out_swz[50], out_swz[48], | |
690 | out_swz[46], out_swz[44], out_swz[42], out_swz[40], out_swz[38], | |
691 | out_swz[36], out_swz[34], out_swz[32], out_swz[30], out_swz[28], | |
692 | out_swz[26], out_swz[24], out_swz[22], out_swz[20], out_swz[18], | |
693 | out_swz[16], out_swz[14], out_swz[12], out_swz[10], out_swz[8], | |
694 | out_swz[6], out_swz[4], out_swz[2], out_swz[0]} = in_px2[72:0]; | |
695 | assign {out_swz[145], out_swz[143], out_swz[141], out_swz[139], | |
696 | out_swz[137], out_swz[135], out_swz[133], out_swz[131], | |
697 | out_swz[129], out_swz[127], out_swz[125], out_swz[123], | |
698 | out_swz[121], out_swz[119], out_swz[117], out_swz[115], | |
699 | out_swz[113], out_swz[111], out_swz[109], out_swz[107], | |
700 | out_swz[105], out_swz[103], out_swz[101], out_swz[99], | |
701 | out_swz[97], out_swz[95], out_swz[93], out_swz[91], out_swz[89], | |
702 | out_swz[87], out_swz[85], out_swz[83], out_swz[81], out_swz[79], | |
703 | out_swz[77], out_swz[75], out_swz[73], out_swz[71], out_swz[69], | |
704 | out_swz[67], out_swz[65], out_swz[63], out_swz[61], out_swz[59], | |
705 | out_swz[57], out_swz[55], out_swz[53], out_swz[51], out_swz[49], | |
706 | out_swz[47], out_swz[45], out_swz[43], out_swz[41], out_swz[39], | |
707 | out_swz[37], out_swz[35], out_swz[33], out_swz[31], out_swz[29], | |
708 | out_swz[27], out_swz[25], out_swz[23], out_swz[21], out_swz[19], | |
709 | out_swz[17], out_swz[15], out_swz[13], out_swz[11], out_swz[9], | |
710 | out_swz[7], out_swz[5], out_swz[3], out_swz[1]} = in_px2[145:73] | |
711 | ; | |
712 | assign cpx_spc_data_cx2[145:0] = out_swz[145:0]; | |
713 | assign i_dff_data_0_scanin = scan_in; | |
714 | assign i_dff_data_1_scanin = i_dff_data_0_scanout; | |
715 | assign i_dff_data_2_scanin = i_dff_data_1_scanout; | |
716 | assign i_dff_data_3_scanin = i_dff_data_2_scanout; | |
717 | assign scan_out_prebuf = i_dff_data_3_scanout; | |
718 | ||
719 | buff_macro__dbuff_8x__stack_none__width_4 buf_hfn( | |
720 | .din ({ccx_aclk, ccx_bclk, | |
721 | tcu_pce_ov, tcu_scan_en}), | |
722 | .dout ({ccx_aclk_out, ccx_bclk_out, | |
723 | tcu_pce_ov_out, tcu_scan_en_out})); | |
724 | msffiz_macro__dmsffi_32x__stack_64c__width_64 i_dff_data_0( | |
725 | .scan_in (i_dff_data_0_scanin), | |
726 | .scan_out (i_dff_data_0_scanout), | |
727 | .clk (l2clk), | |
728 | .din ({in_swz[63:0]}), | |
729 | .dout_l ({in_x2[63:0]}), | |
730 | .en (1'b1), | |
731 | .se (se), | |
732 | .siclk (siclk), | |
733 | .soclk (soclk), | |
734 | .pce_ov (pce_ov), | |
735 | .stop (stop)); | |
736 | msffiz_macro__dmsffi_32x__scanreverse_1__stack_64c__width_64 | |
737 | i_dff_data_1( | |
738 | .scan_in (i_dff_data_1_scanin), | |
739 | .scan_out (i_dff_data_1_scanout), | |
740 | .clk (l2clk), | |
741 | .din ({in_swz[136:73]}), | |
742 | .dout_l ({in_x2[136:73]}), | |
743 | .en (1'b1), | |
744 | .se (se), | |
745 | .siclk (siclk), | |
746 | .soclk (soclk), | |
747 | .pce_ov (pce_ov), | |
748 | .stop (stop)); | |
749 | msffiz_macro__dmsffi_32x__stack_10l__width_9 i_dff_data_2( | |
750 | .scan_in (i_dff_data_2_scanin), | |
751 | .scan_out (i_dff_data_2_scanout), | |
752 | .clk (l2clk), | |
753 | .din ({in_swz[72:64]}), | |
754 | .dout_l ({in_x2[72:64]}), | |
755 | .en (1'b1), | |
756 | .se (se), | |
757 | .siclk (siclk), | |
758 | .soclk (soclk), | |
759 | .pce_ov (pce_ov), | |
760 | .stop (stop)); | |
761 | msffiz_macro__dmsffi_32x__stack_10l__width_9 i_dff_data_3( | |
762 | .scan_in (i_dff_data_3_scanin), | |
763 | .scan_out (i_dff_data_3_scanout), | |
764 | .clk (l2clk), | |
765 | .din ({in_swz[145:137]}), | |
766 | .dout_l ({in_x2[145:137]}), | |
767 | .en (1'b1), | |
768 | .se (se), | |
769 | .siclk (siclk), | |
770 | .soclk (soclk), | |
771 | .pce_ov (pce_ov), | |
772 | .stop (stop)); | |
773 | buff_macro__dbuff_8x__stack_none__width_1 buf_scanout( | |
774 | .din (scan_out_prebuf), | |
775 | .dout (scan_out)); | |
776 | endmodule | |
777 | ||
778 | module msffiz_macro__dmsffi_32x__stack_10l__width_9(din, clk, en, se, scan_in, | |
779 | siclk, soclk, pce_ov, stop, dout_l, scan_out); | |
780 | ||
781 | input [8:0] din; | |
782 | input clk; | |
783 | input en; | |
784 | input se; | |
785 | input scan_in; | |
786 | input siclk; | |
787 | input soclk; | |
788 | input pce_ov; | |
789 | input stop; | |
790 | output [8:0] dout_l; | |
791 | output scan_out; | |
792 | ||
793 | wire l1clk; | |
794 | wire siclk_out; | |
795 | wire soclk_out; | |
796 | wire [7:0] so; | |
797 | ||
798 | cl_dp1_l1hdr_8x c0_0( | |
799 | .l2clk (clk), | |
800 | .pce (en), | |
801 | .aclk (siclk), | |
802 | .bclk (soclk), | |
803 | .l1clk (l1clk), | |
804 | .se (se), | |
805 | .pce_ov (pce_ov), | |
806 | .stop (stop), | |
807 | .siclk_out (siclk_out), | |
808 | .soclk_out (soclk_out)); | |
809 | ||
810 | msffiz_dp #(9) d0_0( | |
811 | .l1clk (l1clk), | |
812 | .siclk (siclk_out), | |
813 | .soclk (soclk_out), | |
814 | .d (din[8:0]), | |
815 | .si ({scan_in, so[7:0]}), | |
816 | .so ({so[7:0], scan_out}), | |
817 | .q_l (dout_l[8:0])); | |
818 | endmodule | |
819 | ||
820 | module buff_macro__dbuff_8x__stack_none__width_4(din, dout); | |
821 | ||
822 | input [3:0] din; | |
823 | output [3:0] dout; | |
824 | ||
825 | buff #(4) d0_0( | |
826 | .in (din[3:0]), | |
827 | .out (dout[3:0])); | |
828 | endmodule | |
829 | ||
830 | module msffiz_macro__dmsffi_32x__scanreverse_1__stack_64c__width_64(din, clk, | |
831 | en, se, scan_in, siclk, soclk, pce_ov, stop, dout_l, scan_out); | |
832 | ||
833 | input [63:0] din; | |
834 | input clk; | |
835 | input en; | |
836 | input se; | |
837 | input scan_in; | |
838 | input siclk; | |
839 | input soclk; | |
840 | input pce_ov; | |
841 | input stop; | |
842 | output [63:0] dout_l; | |
843 | output scan_out; | |
844 | ||
845 | wire l1clk; | |
846 | wire siclk_out; | |
847 | wire soclk_out; | |
848 | wire [0:62] so; | |
849 | ||
850 | cl_dp1_l1hdr_8x c0_0( | |
851 | .l2clk (clk), | |
852 | .pce (en), | |
853 | .aclk (siclk), | |
854 | .bclk (soclk), | |
855 | .l1clk (l1clk), | |
856 | .se (se), | |
857 | .pce_ov (pce_ov), | |
858 | .stop (stop), | |
859 | .siclk_out (siclk_out), | |
860 | .soclk_out (soclk_out)); | |
861 | msffiz_dp #(64) d0_0( | |
862 | .l1clk (l1clk), | |
863 | .siclk (siclk_out), | |
864 | .soclk (soclk_out), | |
865 | .d (din[63:0]), | |
866 | .si ({so[0:62], scan_in}), | |
867 | .so ({scan_out, so[0:62]}), | |
868 | .q_l (dout_l[63:0])); | |
869 | endmodule | |
870 | ||
871 | ||
872 | `endif // `ifdef FPGA | |
873 |