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1 | // ========== Copyright Header Begin ========================================== |
2 | // | |
3 | // OpenSPARC T2 Processor File: pcx_dpsh.v | |
4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
6 | // | |
7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
8 | // | |
9 | // This program is free software; you can redistribute it and/or modify | |
10 | // it under the terms of the GNU General Public License as published by | |
11 | // the Free Software Foundation; version 2 of the License. | |
12 | // | |
13 | // This program is distributed in the hope that it will be useful, | |
14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | // GNU General Public License for more details. | |
17 | // | |
18 | // You should have received a copy of the GNU General Public License | |
19 | // along with this program; if not, write to the Free Software | |
20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | // | |
22 | // For the avoidance of doubt, and except that if any non-GPL license | |
23 | // choice is available it will apply instead, Sun elects to use only | |
24 | // the General Public License version 2 (GPLv2) at this time for any | |
25 | // software where a choice of GPL license versions is made | |
26 | // available with the language indicating that GPLv2 or any later version | |
27 | // may be used, or where a choice of which version of the GPL is applied is | |
28 | // otherwise unspecified. | |
29 | // | |
30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
32 | // have any questions. | |
33 | // | |
34 | // ========== Copyright Header End ============================================ | |
35 | `ifndef FPGA | |
36 | module pcx_dpsh ( | |
37 | pcx_scache_data_x_, | |
38 | arb_grant_l_a, | |
39 | arb_q0_holdbar_l_a, | |
40 | arb_qsel0_l_a, | |
41 | arb_qsel1_l_a, | |
42 | arb_shift_l_a, | |
43 | arb_grant_r_a, | |
44 | arb_q0_holdbar_r_a, | |
45 | arb_qsel0_r_a, | |
46 | arb_qsel1_r_a, | |
47 | arb_shift_r_a, | |
48 | spc0_pcx_data_a, | |
49 | spc1_pcx_data_a, | |
50 | spc2_pcx_data_a, | |
51 | spc3_pcx_data_a, | |
52 | spc4_pcx_data_a, | |
53 | spc5_pcx_data_a, | |
54 | spc6_pcx_data_a, | |
55 | spc7_pcx_data_a, | |
56 | tcu_scan_en, | |
57 | l2clk, | |
58 | tcu_pce_ov, | |
59 | ccx_aclk, | |
60 | ccx_bclk, | |
61 | scan_in, | |
62 | scan_out); | |
63 | wire [129:0] all_ones; | |
64 | wire [4:0] mac0_rep_in; | |
65 | wire [3:0] arb_grant_l_a_rep; | |
66 | wire [3:0] arb_qsel0_l_a_rep; | |
67 | wire [3:0] arb_qsel1_l_a_rep; | |
68 | wire [3:0] arb_shift_l_a_rep; | |
69 | wire [3:0] arb_q0_holdbar_l_a_rep; | |
70 | wire [4:0] mac0_rep_out; | |
71 | wire [4:0] mac1_rep_in; | |
72 | wire [4:0] mac1_rep_out; | |
73 | wire [4:0] mac2_rep_in; | |
74 | wire [4:0] mac2_rep_out; | |
75 | wire [4:0] mac3_rep_in; | |
76 | wire [4:0] mac3_rep_out; | |
77 | wire [4:0] mac4_rep_in; | |
78 | wire [7:4] arb_grant_r_a_rep; | |
79 | wire [7:4] arb_q0_holdbar_r_a_rep; | |
80 | wire [7:4] arb_qsel0_r_a_rep; | |
81 | wire [7:4] arb_qsel1_r_a_rep; | |
82 | wire [7:4] arb_shift_r_a_rep; | |
83 | wire [4:0] mac4_rep_out; | |
84 | wire [4:0] mac5_rep_in; | |
85 | wire [4:0] mac5_rep_out; | |
86 | wire [4:0] mac6_rep_in; | |
87 | wire [4:0] mac6_rep_out; | |
88 | wire scan_rep_in; | |
89 | wire [129:0] col0_data_x_; | |
90 | wire tcu_scan_en_out_0_unused; | |
91 | wire tcu_pce_ov_out_0_unused; | |
92 | wire ccx_aclk_out_0_unused; | |
93 | wire ccx_bclk_out_0_unused; | |
94 | wire pcx_mac0_scanin; | |
95 | wire pcx_mac0_scanout; | |
96 | wire [6:1] tcu_scan_en_out; | |
97 | wire [6:1] tcu_pce_ov_out; | |
98 | wire [6:1] ccx_aclk_out; | |
99 | wire [6:1] ccx_bclk_out; | |
100 | wire [129:0] col1_data_x_; | |
101 | wire pcx_mac1_scanin; | |
102 | wire pcx_mac1_scanout; | |
103 | wire [129:0] col2_data_x_; | |
104 | wire pcx_mac2_scanin; | |
105 | wire pcx_mac2_scanout; | |
106 | wire [129:0] col3_data_x_; | |
107 | wire pcx_mac3_scanin; | |
108 | wire pcx_mac3_scanout; | |
109 | wire [129:0] col4_data_x_; | |
110 | wire pcx_mac4_scanin; | |
111 | wire pcx_mac4_scanout; | |
112 | wire [129:0] col5_data_x_; | |
113 | wire pcx_mac5_scanin; | |
114 | wire pcx_mac5_scanout; | |
115 | wire [129:0] col6_data_x_; | |
116 | wire pcx_mac6_scanin; | |
117 | wire pcx_mac6_scanout; | |
118 | wire tcu_scan_en_out_7_unused; | |
119 | wire tcu_pce_ov_out_7_unused; | |
120 | wire ccx_aclk_out_7_unused; | |
121 | wire ccx_bclk_out_7_unused; | |
122 | wire pcx_mac7_scanin; | |
123 | wire pcx_mac7_scanout; | |
124 | wire [7:4] arb_grant_l_a_unused; | |
125 | wire [7:4] arb_q0_holdbar_l_a_unused; | |
126 | wire [7:4] arb_qsel0_l_a_unused; | |
127 | wire [7:4] arb_qsel1_l_a_unused; | |
128 | wire [7:4] arb_shift_l_a_unused; | |
129 | wire [3:0] arb_grant_r_a_unused; | |
130 | wire [3:0] arb_q0_holdbar_r_a_unused; | |
131 | wire [3:0] arb_qsel0_r_a_unused; | |
132 | wire [3:0] arb_qsel1_r_a_unused; | |
133 | wire [3:0] arb_shift_r_a_unused; | |
134 | wire scan_rep_out; | |
135 | ||
136 | ||
137 | // Beginning of automatic outputs (from unused autoinst outputs) | |
138 | output [129:0] pcx_scache_data_x_; // From mac3 of pcx_mcr_dp.v | |
139 | // End of automatics | |
140 | ||
141 | // Beginning of automatic inputs (from unused autoinst inputs) | |
142 | input [7:0] arb_grant_l_a; // To mac0 of pcx_mar_dp.v, ... | |
143 | input [7:0] arb_q0_holdbar_l_a; // To mac0 of pcx_mar_dp.v, ... | |
144 | input [7:0] arb_qsel0_l_a; // To mac0 of pcx_mar_dp.v, ... | |
145 | input [7:0] arb_qsel1_l_a; // To mac0 of pcx_mar_dp.v, ... | |
146 | input [7:0] arb_shift_l_a; // To mac0 of pcx_mar_dp.v, ... | |
147 | input [7:0] arb_grant_r_a; // To mac0 of pcx_mar_dp.v, ... | |
148 | input [7:0] arb_q0_holdbar_r_a; // To mac0 of pcx_mar_dp.v, ... | |
149 | input [7:0] arb_qsel0_r_a; // To mac0 of pcx_mar_dp.v, ... | |
150 | input [7:0] arb_qsel1_r_a; // To mac0 of pcx_mar_dp.v, ... | |
151 | input [7:0] arb_shift_r_a; // To mac0 of pcx_mar_dp.v, ... | |
152 | input [129:0] spc0_pcx_data_a; // To mac0 of pcx_mar_dp.v | |
153 | input [129:0] spc1_pcx_data_a; // To mac1 of pcx_mbr_dp.v | |
154 | input [129:0] spc2_pcx_data_a; // To mac2 of pcx_mbr_dp.v | |
155 | input [129:0] spc3_pcx_data_a; // To mac3 of pcx_mcr_dp.v | |
156 | input [129:0] spc4_pcx_data_a; // To mac4 of pcx_mbl_dp.v | |
157 | input [129:0] spc5_pcx_data_a; // To mac5 of pcx_mbl_dp.v | |
158 | input [129:0] spc6_pcx_data_a; // To mac6 of pcx_mbl_dp.v | |
159 | input [129:0] spc7_pcx_data_a; // To mac7 of pcx_mal_dp.v | |
160 | // End of automatics | |
161 | // globals | |
162 | input tcu_scan_en ; | |
163 | input l2clk; | |
164 | input tcu_pce_ov; // scan signals | |
165 | input ccx_aclk; | |
166 | input ccx_bclk; | |
167 | input scan_in; | |
168 | output scan_out; | |
169 | ||
170 | ||
171 | // sparc0 sparc2 sparc1 sparc3 sparc5 sparc7 sparc4 sparc6 | |
172 | // | | | | | | | | | |
173 | // v v v v v v v v | |
174 | // mac0 -> mac1 ->mac2 ->mac3 -> mac4 -> mac5 <- mac6 <- mac7 | |
175 | // al bl bl bl bl bl bl cr | |
176 | // | | |
177 | // ------buf------------------------------------- | |
178 | // | | |
179 | // v | |
180 | // to sctag | |
181 | ||
182 | assign all_ones[129:0] = 130'h3FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF; | |
183 | ||
184 | // mac0 arb inputs go through 1 buffer | |
185 | assign mac0_rep_in[4:0] = {arb_grant_l_a[0],arb_qsel0_l_a[0],arb_qsel1_l_a[0], | |
186 | arb_shift_l_a[0],arb_q0_holdbar_l_a[0]}; | |
187 | ||
188 | assign {arb_grant_l_a_rep[0],arb_qsel0_l_a_rep[0],arb_qsel1_l_a_rep[0], | |
189 | arb_shift_l_a_rep[0],arb_q0_holdbar_l_a_rep[0]} = mac0_rep_out[4:0]; | |
190 | ||
191 | // mac1 arb input go through 1 buffer | |
192 | assign mac1_rep_in[4:0] = {arb_grant_l_a[2],arb_q0_holdbar_l_a[2],arb_qsel0_l_a[2], | |
193 | arb_qsel1_l_a[2],arb_shift_l_a[2]}; | |
194 | ||
195 | assign {arb_grant_l_a_rep[2],arb_q0_holdbar_l_a_rep[2],arb_qsel0_l_a_rep[2], | |
196 | arb_qsel1_l_a_rep[2],arb_shift_l_a_rep[2]} = mac1_rep_out[4:0]; | |
197 | ||
198 | // mac2 arb inputs go through 2 buffers | |
199 | assign mac2_rep_in[4:0] = {arb_grant_l_a[1],arb_q0_holdbar_l_a[1],arb_qsel0_l_a[1], | |
200 | arb_qsel1_l_a[1],arb_shift_l_a[1]}; | |
201 | ||
202 | assign {arb_grant_l_a_rep[1],arb_q0_holdbar_l_a_rep[1],arb_qsel0_l_a_rep[1], | |
203 | arb_qsel1_l_a_rep[1],arb_shift_l_a_rep[1]} = mac2_rep_out[4:0]; | |
204 | ||
205 | // mac3 inputs go through 2 buffers | |
206 | assign mac3_rep_in[4:0] = {arb_grant_l_a[3],arb_q0_holdbar_l_a[3],arb_qsel0_l_a[3], | |
207 | arb_qsel1_l_a[3],arb_shift_l_a[3]}; | |
208 | ||
209 | assign {arb_grant_l_a_rep[3],arb_q0_holdbar_l_a_rep[3],arb_qsel0_l_a_rep[3], | |
210 | arb_qsel1_l_a_rep[3],arb_shift_l_a_rep[3]} = mac3_rep_out[4:0]; | |
211 | ||
212 | // mac4 inputs go through 2 buffers | |
213 | assign mac4_rep_in[4:0] = {arb_grant_r_a[5],arb_q0_holdbar_r_a[5],arb_qsel0_r_a[5], | |
214 | arb_qsel1_r_a[5],arb_shift_r_a[5]}; | |
215 | ||
216 | assign {arb_grant_r_a_rep[5],arb_q0_holdbar_r_a_rep[5],arb_qsel0_r_a_rep[5], | |
217 | arb_qsel1_r_a_rep[5],arb_shift_r_a_rep[5]} = mac4_rep_out[4:0]; | |
218 | ||
219 | // mac5 inputs go through 1 buffer | |
220 | assign mac5_rep_in[4:0] = {arb_grant_r_a[7],arb_q0_holdbar_r_a[7],arb_qsel0_r_a[7], | |
221 | arb_qsel1_r_a[7],arb_shift_r_a[7]}; | |
222 | ||
223 | assign {arb_grant_r_a_rep[7],arb_q0_holdbar_r_a_rep[7],arb_qsel0_r_a_rep[7], | |
224 | arb_qsel1_r_a_rep[7],arb_shift_r_a_rep[7]} = mac5_rep_out[4:0]; | |
225 | ||
226 | // mac6 inputs go through 1 buffer | |
227 | assign mac6_rep_in[4:0] = {arb_grant_r_a[4],arb_q0_holdbar_r_a[4],arb_qsel0_r_a[4], | |
228 | arb_qsel1_r_a[4],arb_shift_r_a[4]}; | |
229 | ||
230 | assign {arb_grant_r_a_rep[4],arb_q0_holdbar_r_a_rep[4],arb_qsel0_r_a_rep[4], | |
231 | arb_qsel1_r_a_rep[4],arb_shift_r_a_rep[4]} = mac6_rep_out[4:0]; | |
232 | ||
233 | assign scan_rep_in = scan_in; | |
234 | ||
235 | ||
236 | ||
237 | pcx_rep_dp pcx_rep(.mac0_rep_out(mac0_rep_out[4:0]), | |
238 | .mac1_rep_out(mac1_rep_out[4:0]), | |
239 | .mac2_rep_out(mac2_rep_out[4:0]), | |
240 | .mac3_rep_out(mac3_rep_out[4:0]), | |
241 | .mac4_rep_out(mac4_rep_out[4:0]), | |
242 | .mac5_rep_out(mac5_rep_out[4:0]), | |
243 | .mac6_rep_out(mac6_rep_out[4:0]), | |
244 | .scan_rep_out(scan_rep_out), | |
245 | .mac0_rep_in(mac0_rep_in[4:0]), | |
246 | .mac1_rep_in(mac1_rep_in[4:0]), | |
247 | .mac2_rep_in(mac2_rep_in[4:0]), | |
248 | .mac3_rep_in(mac3_rep_in[4:0]), | |
249 | .mac4_rep_in(mac4_rep_in[4:0]), | |
250 | .mac5_rep_in(mac5_rep_in[4:0]), | |
251 | .mac6_rep_in(mac6_rep_in[4:0]), | |
252 | .scan_rep_in(scan_rep_in) | |
253 | ); | |
254 | ||
255 | ||
256 | /* | |
257 | pcx_mal_dp AUTO_TEMPLATE | |
258 | ( | |
259 | // Outputs | |
260 | .data_out_x_ (col@_data_x_[129:0]), | |
261 | // Inputs | |
262 | .arb_grant_a(arb_grant_l_a[@]), | |
263 | .arb_qsel0_a(arb_qsel0_l_a[@]), | |
264 | .arb_qsel1_a(arb_qsel1_l_a[@]), | |
265 | .arb_q0_holdbar_a(arb_q0_holdbar_l_a[@]), | |
266 | .arb_shift_a(arb_shift_l_a[@]), | |
267 | .src_pcx_data_a(spc@_pcx_data_a[129:0]), | |
268 | .l2clk (l2clk)); | |
269 | */ | |
270 | ||
271 | // do not use autoinstancing. | |
272 | // connections have been modified to match the cpu floorplan | |
273 | // src_pcx_data_a has to be manually connected. | |
274 | ||
275 | // input from spc0 | |
276 | pcx_mal_dp pcx_mac0 ( | |
277 | // Outputs | |
278 | .data_out_x_ (col0_data_x_[129:0]), // Templated | |
279 | .tcu_scan_en_out (tcu_scan_en_out_0_unused), | |
280 | .tcu_pce_ov_out (tcu_pce_ov_out_0_unused), | |
281 | .ccx_aclk_out (ccx_aclk_out_0_unused), | |
282 | .ccx_bclk_out (ccx_bclk_out_0_unused), | |
283 | // Inputs | |
284 | .arb_grant_a (arb_grant_l_a_rep[0]), // Templated | |
285 | .arb_qsel0_a (arb_qsel0_l_a_rep[0]), // Templated | |
286 | .arb_qsel1_a (arb_qsel1_l_a_rep[0]), // Templated | |
287 | .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[0]), // Templated | |
288 | .arb_shift_a (arb_shift_l_a_rep[0]), // Templated | |
289 | .src_pcx_data_a (spc0_pcx_data_a[129:0]), // Templated | |
290 | .scan_in(pcx_mac0_scanin), | |
291 | .scan_out(pcx_mac0_scanout), | |
292 | .l2clk (l2clk), // Templated | |
293 | .tcu_scan_en (tcu_scan_en_out[1]), | |
294 | .tcu_pce_ov (tcu_pce_ov_out[1]), | |
295 | .ccx_aclk (ccx_aclk_out[1]), | |
296 | .ccx_bclk (ccx_bclk_out[1]) | |
297 | ); | |
298 | ||
299 | ||
300 | /* | |
301 | pcx_mbl_dp AUTO_TEMPLATE | |
302 | ( | |
303 | // Outputs | |
304 | .data_out_x_ (col@_data_x_[129:0]), | |
305 | // Inputs | |
306 | .arb_grant_a(arb_grant_l_a_rep[@]), | |
307 | .arb_qsel0_a(arb_qsel0_l_a_rep[@]), | |
308 | .arb_qsel1_a(arb_qsel1_l_a_rep[@]), | |
309 | .arb_q0_holdbar_a(arb_q0_holdbar_l_a_rep[@]), | |
310 | .arb_shift_a(arb_shift_l_a_rep[@]), | |
311 | .src_pcx_data_a(spc@_pcx_data_a[129:0]), | |
312 | .data_prev_x_(col@"(- @ 1)"_data_x_[129:0]), | |
313 | .l2clk (l2clk)); | |
314 | */ | |
315 | ||
316 | ||
317 | ||
318 | // input from spc2 | |
319 | pcx_mbl_dp pcx_mac1( | |
320 | // Outputs | |
321 | .data_out_x_ (col1_data_x_[129:0]), // Templated | |
322 | .tcu_scan_en_out (tcu_scan_en_out[1]), | |
323 | .tcu_pce_ov_out (tcu_pce_ov_out[1]), | |
324 | .ccx_aclk_out (ccx_aclk_out[1]), | |
325 | .ccx_bclk_out (ccx_bclk_out[1]), | |
326 | // Inputs | |
327 | .arb_grant_a (arb_grant_l_a_rep[2]), // Templated | |
328 | .arb_qsel0_a (arb_qsel0_l_a_rep[2]), // Templated | |
329 | .arb_qsel1_a (arb_qsel1_l_a_rep[2]), // Templated | |
330 | .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[2]), // Templated | |
331 | .arb_shift_a (arb_shift_l_a_rep[2]), // Templated | |
332 | .src_pcx_data_a (spc2_pcx_data_a[129:0]), // Templated | |
333 | .data_prev_x_ (col0_data_x_[129:0]), // Templated | |
334 | .scan_in(pcx_mac1_scanin), | |
335 | .scan_out(pcx_mac1_scanout), | |
336 | .l2clk (l2clk), // Templated | |
337 | .tcu_scan_en (tcu_scan_en_out[2]), | |
338 | .tcu_pce_ov (tcu_pce_ov_out[2]), | |
339 | .ccx_aclk (ccx_aclk_out[2]), | |
340 | .ccx_bclk (ccx_bclk_out[2]) | |
341 | ); | |
342 | ||
343 | ||
344 | // input from spc1 | |
345 | pcx_mbl_dp pcx_mac2( | |
346 | // Outputs | |
347 | .data_out_x_ (col2_data_x_[129:0]), // Templated | |
348 | .tcu_scan_en_out (tcu_scan_en_out[2]), | |
349 | .tcu_pce_ov_out (tcu_pce_ov_out[2]), | |
350 | .ccx_aclk_out (ccx_aclk_out[2]), | |
351 | .ccx_bclk_out (ccx_bclk_out[2]), | |
352 | // Inputs | |
353 | .arb_grant_a (arb_grant_l_a_rep[1]), // Templated | |
354 | .arb_qsel0_a (arb_qsel0_l_a_rep[1]), // Templated | |
355 | .arb_qsel1_a (arb_qsel1_l_a_rep[1]), // Templated | |
356 | .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[1]), // Templated | |
357 | .arb_shift_a (arb_shift_l_a_rep[1]), // Templated | |
358 | .src_pcx_data_a (spc1_pcx_data_a[129:0]), // Templated | |
359 | .data_prev_x_ (col1_data_x_[129:0]), // Templated | |
360 | .scan_in(pcx_mac2_scanin), | |
361 | .scan_out(pcx_mac2_scanout), | |
362 | .l2clk (l2clk), // Templated | |
363 | .tcu_scan_en (tcu_scan_en_out[3]), | |
364 | .tcu_pce_ov (tcu_pce_ov_out[3]), | |
365 | .ccx_aclk (ccx_aclk_out[3]), | |
366 | .ccx_bclk (ccx_bclk_out[3]) | |
367 | ); | |
368 | ||
369 | ||
370 | // input from spc3 | |
371 | pcx_mbl_dp pcx_mac3( | |
372 | // Outputs | |
373 | .data_out_x_ (col3_data_x_[129:0]), // Templated | |
374 | .tcu_scan_en_out (tcu_scan_en_out[3]), | |
375 | .tcu_pce_ov_out (tcu_pce_ov_out[3]), | |
376 | .ccx_aclk_out (ccx_aclk_out[3]), | |
377 | .ccx_bclk_out (ccx_bclk_out[3]), | |
378 | // Inputs | |
379 | .arb_grant_a (arb_grant_l_a_rep[3]), // Templated | |
380 | .arb_qsel0_a (arb_qsel0_l_a_rep[3]), // Templated | |
381 | .arb_qsel1_a (arb_qsel1_l_a_rep[3]), // Templated | |
382 | .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[3]), // Templated | |
383 | .arb_shift_a (arb_shift_l_a_rep[3]), // Templated | |
384 | .src_pcx_data_a (spc3_pcx_data_a[129:0]), // Templated | |
385 | .data_prev_x_ (col2_data_x_[129:0]), // Templated | |
386 | .scan_in(pcx_mac3_scanin), | |
387 | .scan_out(pcx_mac3_scanout), | |
388 | .l2clk (l2clk), // Templated | |
389 | .tcu_scan_en (tcu_scan_en), | |
390 | .tcu_pce_ov (tcu_pce_ov), | |
391 | .ccx_aclk (ccx_aclk), | |
392 | .ccx_bclk (ccx_bclk) | |
393 | ); | |
394 | ||
395 | ||
396 | // input from spc5 | |
397 | pcx_mbl_dp pcx_mac4( | |
398 | // Outputs | |
399 | .data_out_x_ (col4_data_x_[129:0]), // Templated | |
400 | .tcu_scan_en_out (tcu_scan_en_out[4]), | |
401 | .tcu_pce_ov_out (tcu_pce_ov_out[4]), | |
402 | .ccx_aclk_out (ccx_aclk_out[4]), | |
403 | .ccx_bclk_out (ccx_bclk_out[4]), | |
404 | // Inputs | |
405 | .arb_grant_a (arb_grant_r_a_rep[5]), // Templated | |
406 | .arb_qsel0_a (arb_qsel0_r_a_rep[5]), // Templated | |
407 | .arb_qsel1_a (arb_qsel1_r_a_rep[5]), // Templated | |
408 | .arb_q0_holdbar_a (arb_q0_holdbar_r_a_rep[5]), // Templated | |
409 | .arb_shift_a (arb_shift_r_a_rep[5]), // Templated | |
410 | .src_pcx_data_a (spc5_pcx_data_a[129:0]), // Templated | |
411 | .data_prev_x_ (col3_data_x_[129:0]), // Templated | |
412 | .scan_in(pcx_mac4_scanin), | |
413 | .scan_out(pcx_mac4_scanout), | |
414 | .l2clk (l2clk), // Templated | |
415 | .tcu_scan_en (tcu_scan_en_out[3]), | |
416 | .tcu_pce_ov (tcu_pce_ov_out[3]), | |
417 | .ccx_aclk (ccx_aclk_out[3]), | |
418 | .ccx_bclk (ccx_bclk_out[3]) | |
419 | ); | |
420 | ||
421 | ||
422 | // input from spc7 | |
423 | pcx_mbl_dp pcx_mac5( | |
424 | // Outputs | |
425 | .data_out_x_ (col5_data_x_[129:0]), // Templated | |
426 | .tcu_scan_en_out (tcu_scan_en_out[5]), | |
427 | .tcu_pce_ov_out (tcu_pce_ov_out[5]), | |
428 | .ccx_aclk_out (ccx_aclk_out[5]), | |
429 | .ccx_bclk_out (ccx_bclk_out[5]), | |
430 | // Inputs | |
431 | .arb_grant_a (arb_grant_r_a_rep[7]), // Templated | |
432 | .arb_qsel0_a (arb_qsel0_r_a_rep[7]), // Templated | |
433 | .arb_qsel1_a (arb_qsel1_r_a_rep[7]), // Templated | |
434 | .arb_q0_holdbar_a (arb_q0_holdbar_r_a_rep[7]), // Templated | |
435 | .arb_shift_a (arb_shift_r_a_rep[7]), // Templated | |
436 | .src_pcx_data_a (spc7_pcx_data_a[129:0]), // Templated | |
437 | .data_prev_x_ (col4_data_x_[129:0]), // Templated | |
438 | .scan_in(pcx_mac5_scanin), | |
439 | .scan_out(pcx_mac5_scanout), | |
440 | .l2clk (l2clk), // Templated | |
441 | .tcu_scan_en (tcu_scan_en_out[4]), | |
442 | .tcu_pce_ov (tcu_pce_ov_out[4]), | |
443 | .ccx_aclk (ccx_aclk_out[4]), | |
444 | .ccx_bclk (ccx_bclk_out[4]) | |
445 | ); | |
446 | ||
447 | ||
448 | // input from spc4 | |
449 | pcx_mbl_dp pcx_mac6( | |
450 | // Outputs | |
451 | .data_out_x_ (col6_data_x_[129:0]), // Templated | |
452 | .tcu_scan_en_out (tcu_scan_en_out[6]), | |
453 | .tcu_pce_ov_out (tcu_pce_ov_out[6]), | |
454 | .ccx_aclk_out (ccx_aclk_out[6]), | |
455 | .ccx_bclk_out (ccx_bclk_out[6]), | |
456 | // Inputs | |
457 | .arb_grant_a (arb_grant_r_a_rep[4]), // Templated | |
458 | .arb_qsel0_a (arb_qsel0_r_a_rep[4]), // Templated | |
459 | .arb_qsel1_a (arb_qsel1_r_a_rep[4]), // Templated | |
460 | .arb_q0_holdbar_a (arb_q0_holdbar_r_a_rep[4]), // Templated | |
461 | .arb_shift_a (arb_shift_r_a_rep[4]), // Templated | |
462 | .src_pcx_data_a (spc4_pcx_data_a[129:0]), // Templated | |
463 | .data_prev_x_ (col5_data_x_[129:0]), // Templated | |
464 | .scan_in(pcx_mac6_scanin), | |
465 | .scan_out(pcx_mac6_scanout), | |
466 | .l2clk (l2clk), // Templated | |
467 | .tcu_scan_en (tcu_scan_en_out[5]), | |
468 | .tcu_pce_ov (tcu_pce_ov_out[5]), | |
469 | .ccx_aclk (ccx_aclk_out[5]), | |
470 | .ccx_bclk (ccx_bclk_out[5]) | |
471 | ); | |
472 | ||
473 | ||
474 | /* | |
475 | pcx_mcr_dp AUTO_TEMPLATE | |
476 | ( | |
477 | // Outputs | |
478 | .data_out_x_ (pcx_scache_data_x_[129:0]), | |
479 | // Inputs | |
480 | .arb_grant_a(arb_grant_r_a[@]), | |
481 | .arb_qsel0_a(arb_qsel0_r_a[@]), | |
482 | .arb_qsel1_a(arb_qsel1_r_a[@]), | |
483 | .arb_q0_holdbar_a(arb_q0_holdbar_r_a[@]), | |
484 | .arb_shift_a(arb_shift_r_a[@]), | |
485 | .src_pcx_data_a(spc@_pcx_data_a[129:0]), | |
486 | .data_crit_x_(col@"(- @ 1)"_data_x_[129:0]), | |
487 | .data_ncrit_x_(col@"(+ @ 1)"_data_x_[129:0]), | |
488 | .l2clk (l2clk)) | |
489 | */ | |
490 | // input from spc6 | |
491 | pcx_mcr_dp pcx_mac7( | |
492 | // Outputs | |
493 | .data_out_x_ (pcx_scache_data_x_[129:0]), // Templated | |
494 | .tcu_scan_en_out (tcu_scan_en_out_7_unused), | |
495 | .tcu_pce_ov_out (tcu_pce_ov_out_7_unused), | |
496 | .ccx_aclk_out (ccx_aclk_out_7_unused), | |
497 | .ccx_bclk_out (ccx_bclk_out_7_unused), | |
498 | // Inputs | |
499 | .arb_grant_a (arb_grant_r_a[6]), // Templated | |
500 | .arb_qsel0_a (arb_qsel0_r_a[6]), // Templated | |
501 | .arb_qsel1_a (arb_qsel1_r_a[6]), // Templated | |
502 | .arb_q0_holdbar_a (arb_q0_holdbar_r_a[6]), // Templated | |
503 | .arb_shift_a (arb_shift_r_a[6]), // Templated | |
504 | .src_pcx_data_a (spc6_pcx_data_a[129:0]), // Templated | |
505 | .data_crit_x_ (col6_data_x_[129:0]), // Templated | |
506 | .data_ncrit_x_ (all_ones[129:0]), // Templated | |
507 | .scan_in(pcx_mac7_scanin), | |
508 | .scan_out(pcx_mac7_scanout), | |
509 | .l2clk (l2clk), | |
510 | .tcu_scan_en (tcu_scan_en_out[6]), | |
511 | .tcu_pce_ov (tcu_pce_ov_out[6]), | |
512 | .ccx_aclk (ccx_aclk_out[6]), | |
513 | .ccx_bclk (ccx_bclk_out[6]) | |
514 | ); | |
515 | ||
516 | ||
517 | assign arb_grant_l_a_unused[7:4] = arb_grant_l_a[7:4]; | |
518 | assign arb_q0_holdbar_l_a_unused[7:4] = arb_q0_holdbar_l_a[7:4]; | |
519 | assign arb_qsel0_l_a_unused[7:4] = arb_qsel0_l_a[7:4]; | |
520 | assign arb_qsel1_l_a_unused[7:4] = arb_qsel1_l_a[7:4]; | |
521 | assign arb_shift_l_a_unused[7:4] = arb_shift_l_a[7:4]; | |
522 | ||
523 | assign arb_grant_r_a_unused[3:0] = arb_grant_r_a[3:0]; | |
524 | assign arb_q0_holdbar_r_a_unused[3:0] = arb_q0_holdbar_r_a[3:0]; | |
525 | assign arb_qsel0_r_a_unused[3:0] = arb_qsel0_r_a[3:0]; | |
526 | assign arb_qsel1_r_a_unused[3:0] = arb_qsel1_r_a[3:0]; | |
527 | assign arb_shift_r_a_unused[3:0] = arb_shift_r_a[3:0]; | |
528 | ||
529 | ||
530 | // fixscan start: | |
531 | assign pcx_mac0_scanin = scan_rep_out ; | |
532 | assign pcx_mac1_scanin = pcx_mac0_scanout ; | |
533 | assign pcx_mac2_scanin = pcx_mac1_scanout ; | |
534 | assign pcx_mac3_scanin = pcx_mac2_scanout ; | |
535 | assign pcx_mac4_scanin = pcx_mac3_scanout ; | |
536 | assign pcx_mac5_scanin = pcx_mac4_scanout ; | |
537 | assign pcx_mac6_scanin = pcx_mac5_scanout ; | |
538 | assign pcx_mac7_scanin = pcx_mac6_scanout ; | |
539 | assign scan_out = pcx_mac7_scanout ; | |
540 | // fixscan end: | |
541 | endmodule | |
542 | ||
543 | // Local Variables: | |
544 | // verilog-library-directories:("." "v") | |
545 | // End: | |
546 | ||
547 | ||
548 | ||
549 | // | |
550 | // buff macro | |
551 | // | |
552 | // | |
553 | ||
554 | ||
555 | ||
556 | ||
557 | ||
558 | module pcx_dpsh_buff_macro__dbuff_32x__stack_6l__width_5 ( | |
559 | din, | |
560 | dout); | |
561 | input [4:0] din; | |
562 | output [4:0] dout; | |
563 | ||
564 | ||
565 | ||
566 | ||
567 | ||
568 | ||
569 | buff #(5) d0_0 ( | |
570 | .in(din[4:0]), | |
571 | .out(dout[4:0]) | |
572 | ); | |
573 | ||
574 | ||
575 | ||
576 | ||
577 | ||
578 | ||
579 | ||
580 | ||
581 | endmodule | |
582 | ||
583 | ||
584 | ||
585 | ||
586 | ||
587 | // | |
588 | // buff macro | |
589 | // | |
590 | // | |
591 | ||
592 | ||
593 | ||
594 | ||
595 | ||
596 | module pcx_dpsh_buff_macro__dbuff_32x__stack_none__width_1 ( | |
597 | din, | |
598 | dout); | |
599 | input [0:0] din; | |
600 | output [0:0] dout; | |
601 | ||
602 | ||
603 | ||
604 | ||
605 | ||
606 | ||
607 | buff #(1) d0_0 ( | |
608 | .in(din[0:0]), | |
609 | .out(dout[0:0]) | |
610 | ); | |
611 | ||
612 | ||
613 | ||
614 | ||
615 | ||
616 | ||
617 | ||
618 | ||
619 | endmodule | |
620 | ||
621 | ||
622 | ||
623 | ||
624 | // | |
625 | // buff macro | |
626 | // | |
627 | // | |
628 | ||
629 | ||
630 | ||
631 | ||
632 | ||
633 | module pcx_dpsh_buff_macro__dbuff_8x__stack_none__vertical_1__width_4 ( | |
634 | din, | |
635 | dout); | |
636 | input [3:0] din; | |
637 | output [3:0] dout; | |
638 | ||
639 | ||
640 | ||
641 | ||
642 | ||
643 | ||
644 | buff #(4) d0_0 ( | |
645 | .in(din[3:0]), | |
646 | .out(dout[3:0]) | |
647 | ); | |
648 | ||
649 | ||
650 | ||
651 | ||
652 | ||
653 | ||
654 | ||
655 | ||
656 | endmodule | |
657 | ||
658 | ||
659 | ||
660 | ||
661 | ||
662 | ||
663 | ||
664 | ||
665 | ||
666 | // any PARAMS parms go into naming of macro | |
667 | ||
668 | module pcx_dpsh_ccx_l1clkhdr_ctl_macro__dl1hdr_24x ( | |
669 | l2clk, | |
670 | l1en, | |
671 | pce_ov, | |
672 | stop, | |
673 | se, | |
674 | l1clk); | |
675 | ||
676 | ||
677 | input l2clk; | |
678 | input l1en; | |
679 | input pce_ov; | |
680 | input stop; | |
681 | input se; | |
682 | output l1clk; | |
683 | ||
684 | ||
685 | ||
686 | ||
687 | ||
688 | cl_sc1_l1hdr_24x c_0 ( | |
689 | ||
690 | ||
691 | .l2clk(l2clk), | |
692 | .pce(l1en), | |
693 | .l1clk(l1clk), | |
694 | .se(se), | |
695 | .pce_ov(pce_ov), | |
696 | .stop(stop) | |
697 | ); | |
698 | ||
699 | ||
700 | ||
701 | ||
702 | ||
703 | ||
704 | endmodule | |
705 | ||
706 | ||
707 | ||
708 | ||
709 | ||
710 | ||
711 | ||
712 | ||
713 | ||
714 | // | |
715 | // ccx macro | |
716 | // | |
717 | // | |
718 | ||
719 | ||
720 | ||
721 | ||
722 | ||
723 | module pcx_dpsh_ccx_new_macro__type_a ( | |
724 | l2clk, | |
725 | l1clk, | |
726 | pce0, | |
727 | pce1, | |
728 | pce_ov, | |
729 | se, | |
730 | stop, | |
731 | siclk_in, | |
732 | soclk_in, | |
733 | scan_in, | |
734 | grant_a, | |
735 | qsel0, | |
736 | shift, | |
737 | data_a, | |
738 | data_x_l, | |
739 | scan_out); | |
740 | wire so5; | |
741 | wire siclk_out; | |
742 | wire soclk_out; | |
743 | wire l1clk0; | |
744 | wire l1clk1; | |
745 | wire grant_x; | |
746 | wire qsel0_buf; | |
747 | wire shift_buf; | |
748 | ||
749 | input l2clk; | |
750 | input l1clk; | |
751 | input pce0; | |
752 | input pce1; | |
753 | input pce_ov; | |
754 | input se; | |
755 | input stop; | |
756 | input siclk_in; | |
757 | input soclk_in; | |
758 | input scan_in; | |
759 | input grant_a; | |
760 | input qsel0; | |
761 | input shift; | |
762 | input [9:0] data_a; | |
763 | output [9:0] data_x_l; | |
764 | output scan_out; | |
765 | cl_dp1_ccxhdr c0 ( | |
766 | .si(scan_in), | |
767 | .so(so5), | |
768 | .l2clk(l2clk), | |
769 | .pce0(pce0), | |
770 | .pce1(pce1), | |
771 | .pce_ov(pce_ov), | |
772 | .stop(stop), | |
773 | .siclk_in(siclk_in), | |
774 | .soclk_in(soclk_in), | |
775 | .siclk_out(siclk_out), | |
776 | .soclk_out(soclk_out), | |
777 | .l1clk0(l1clk0), | |
778 | .l1clk1(l1clk1), | |
779 | .se(se), | |
780 | .l1clk(l1clk), | |
781 | .grant_a(grant_a), | |
782 | .grant_x(grant_x), | |
783 | .qsel0(qsel0), | |
784 | .qsel0_buf(qsel0_buf), | |
785 | .shift(shift), | |
786 | .shift_buf(shift_buf) | |
787 | ); | |
788 | ||
789 | ||
790 | ||
791 | ||
792 | ||
793 | ||
794 | ccx_mac_a #(10) mac_a( | |
795 | .siclk(siclk_out), | |
796 | .soclk(soclk_out), | |
797 | .data_a(data_a[9:0]), | |
798 | .data_x_l(data_x_l[9:0]), | |
799 | .si(so5), | |
800 | .so(scan_out), | |
801 | .l1clk0(l1clk0), | |
802 | .l1clk1(l1clk1), | |
803 | .grant_x(grant_x), | |
804 | .qsel0_buf(qsel0_buf), | |
805 | .shift_buf(shift_buf) | |
806 | ); | |
807 | ||
808 | ||
809 | ||
810 | ||
811 | ||
812 | ||
813 | ||
814 | ||
815 | ||
816 | ||
817 | ||
818 | ||
819 | ||
820 | ||
821 | endmodule | |
822 | ||
823 | ||
824 | // | |
825 | //// scan renames | |
826 | //assign pce_ov = tcu_pce_ov; | |
827 | //assign stop = tcu_clk_stop; | |
828 | //assign siclk = tcu_aclk; | |
829 | //assign soclk = tcu_bclk; | |
830 | //// end scan | |
831 | // | |
832 | //buff_macro i_buf_grant (width=1, stack=30c) | |
833 | //( | |
834 | // .din (arb_grant_a), | |
835 | // .dout (grant_a), | |
836 | // ); | |
837 | // | |
838 | //msff_macro i_dff_grant_x (width=12, stack=30c) | |
839 | //( | |
840 | // .scan_in(i_dff_grant_x_scanin), | |
841 | // .scan_out(i_dff_grant_x_scanout), | |
842 | // .clk (l2clk), | |
843 | // .din ({12{grant_a}}), | |
844 | // .dout (grant_x[11:0]), | |
845 | // .en (1'b1), | |
846 | // ); | |
847 | // | |
848 | // | |
849 | //// DATAPATH SECTION | |
850 | // | |
851 | //msff_macro i_dff_q1_2 (width=40, stack=50c) | |
852 | //( | |
853 | // .scan_in(i_dff_q1_2_scanin), | |
854 | // .scan_out(i_dff_q1_2_scanout), | |
855 | // .clk (l2clk), | |
856 | // .din (src_pcx_data_a[129:90]), | |
857 | // .dout (q1_dataout[129:90]), | |
858 | // .en (arb_qsel1_a), | |
859 | // ); | |
860 | // | |
861 | //msff_macro i_dff_q1_1 (width=50, stack=50c) | |
862 | //( | |
863 | // .scan_in(i_dff_q1_1_scanin), | |
864 | // .scan_out(i_dff_q1_1_scanout), | |
865 | // .clk (l2clk), | |
866 | // .din (src_pcx_data_a[89:40]), | |
867 | // .dout (q1_dataout[89:40]), | |
868 | // .en (arb_qsel1_a), | |
869 | // ); | |
870 | // | |
871 | //msff_macro i_dff_q1_0 (width=40, stack=50c) | |
872 | //( | |
873 | // .scan_in(i_dff_q1_0_scanin), | |
874 | // .scan_out(i_dff_q1_0_scanout), | |
875 | // .clk (l2clk), | |
876 | // .din (src_pcx_data_a[39:0]), | |
877 | // .dout (q1_dataout[39:0]), | |
878 | // .en (arb_qsel1_a), | |
879 | // ); | |
880 | // | |
881 | ////assign q0_datain_ca[149:0] = | |
882 | //// (arb_pcxdp_qsel0_ca ? src_pcx_data_ca[149:0] : 150'd0) | | |
883 | //// (arb_pcxdp_shift_cx ? q1_dataout[149:0] : 150'd0) ; | |
884 | // | |
885 | // | |
886 | //mux_macro i_mux_q0_2 (width=40, mux=aonpe, ports=2, stack=50c) | |
887 | //( | |
888 | // .din0 (src_pcx_data_a[129:90]), | |
889 | // .din1 (q1_dataout[129:90]), | |
890 | // .sel0 (arb_qsel0_a), | |
891 | // .sel1 (arb_shift_a), | |
892 | // .dout (q0_datain_a[129:90]), | |
893 | // ); | |
894 | // | |
895 | //mux_macro i_mux_q0_1 (width=50, mux=aonpe, ports=2, stack=50c) | |
896 | //( | |
897 | // .din0 (src_pcx_data_a[89:40]), | |
898 | // .din1 (q1_dataout[89:40]), | |
899 | // .sel0 (arb_qsel0_a), | |
900 | // .sel1 (arb_shift_a), | |
901 | // .dout (q0_datain_a[89:40]), | |
902 | // ); | |
903 | // | |
904 | //mux_macro i_mux_q0_0 (width=40, mux=aonpe, ports=2, stack=50c) | |
905 | //( | |
906 | // .din0 (src_pcx_data_a[39:0]), | |
907 | // .din1 (q1_dataout[39:0]), | |
908 | // .sel0 (arb_qsel0_a), | |
909 | // .sel1 (arb_shift_a), | |
910 | // .dout (q0_datain_a[39:0]), | |
911 | // ); | |
912 | // | |
913 | //msff_macro i_dff_q0_2 (width=40, stack=50c) | |
914 | //( | |
915 | // .scan_in(i_dff_q0_2_scanin), | |
916 | // .scan_out(i_dff_q0_2_scanout), | |
917 | // .clk (l2clk), | |
918 | // .din (q0_datain_a[129:90]), | |
919 | // .dout (q0_dataout[129:90]), | |
920 | // .en (arb_q0_holdbar_a), | |
921 | // ); | |
922 | // | |
923 | //msff_macro i_dff_q0_1 (width=50, stack=50c) | |
924 | //( | |
925 | // .scan_in(i_dff_q0_1_scanin), | |
926 | // .scan_out(i_dff_q0_1_scanout), | |
927 | // .clk (l2clk), | |
928 | // .din (q0_datain_a[89:40]), | |
929 | // .dout (q0_dataout[89:40]), | |
930 | // .en (arb_q0_holdbar_a), | |
931 | // ); | |
932 | // | |
933 | //msff_macro i_dff_q0_0 (width=40, stack=50c) | |
934 | //( | |
935 | // .scan_in(i_dff_q0_0_scanin), | |
936 | // .scan_out(i_dff_q0_0_scanout), | |
937 | // .clk (l2clk), | |
938 | // .din (q0_datain_a[39:0]), | |
939 | // .dout (q0_dataout[39:0]), | |
940 | // .en (arb_q0_holdbar_a), | |
941 | // ); | |
942 | // | |
943 | ////MUX | |
944 | // | |
945 | //nand_macro i_nand_data_g_2 (width=40, ports=2, stack=50c) | |
946 | //( | |
947 | // .din0 (q0_dataout[129:90]), | |
948 | // .din1 ({{10{grant_x[11]}},{10{grant_x[10]}},{10{grant_x[9]}},{10{grant_x[8]}}}), | |
949 | // .dout (data_x_[129:90]), | |
950 | // ); | |
951 | // | |
952 | //nand_macro i_nand_data_g_1 (width=50, ports=2, stack=50c) | |
953 | //( | |
954 | // .din0 (q0_dataout[89:40]), | |
955 | // .din1 ({{10{grant_x[7]}},{15{grant_x[6]}},{15{grant_x[5]}},{10{grant_x[4]}}}), | |
956 | // .dout (data_x_[89:40]), | |
957 | // ); | |
958 | // | |
959 | //nand_macro i_nand_data_g_0 (width=40, ports=2, stack=50c) | |
960 | //( | |
961 | // .din0 (q0_dataout[39:0]), | |
962 | // .din1 ({{10{grant_x[3]}},{10{grant_x[2]}},{10{grant_x[1]}},{10{grant_x[0]}}}), | |
963 | // .dout (data_x_[39:0]), | |
964 | // ); | |
965 | // | |
966 | // | |
967 | //nand_macro i_nand_data_prev_2 (width=40, ports=2, stack=50c) | |
968 | //( | |
969 | // .din0 (data_x_[129:90]), | |
970 | // .din1 (data_prev_x_[129:90]), | |
971 | // .dout (data_out_x[129:90]) | |
972 | // ); | |
973 | // | |
974 | //nand_macro i_nand_data_prev_1 (width=50, ports=2, stack=50c) | |
975 | //( | |
976 | // .din0 (data_x_[89:40]), | |
977 | // .din1 (data_prev_x_[89:40]), | |
978 | // .dout (data_out_x[89:40]) | |
979 | // ); | |
980 | // | |
981 | //nand_macro i_nand_data_prev_0 (width=40, ports=2, stack=50c) | |
982 | //( | |
983 | // .din0 (data_x_[39:0]), | |
984 | // .din1 (data_prev_x_[39:0]), | |
985 | // .dout (data_out_x[39:0]) | |
986 | // ); | |
987 | // | |
988 | //inv_macro i_inv_data_out_2 (width=40, stack=50c) | |
989 | //( | |
990 | // .din (data_out_x[129:90]), | |
991 | // .dout (data_out_x_[129:90]) | |
992 | // ); | |
993 | // | |
994 | //inv_macro i_inv_data_out_1 (width=50, stack=50c) | |
995 | //( | |
996 | // .din (data_out_x[89:40]), | |
997 | // .dout (data_out_x_[89:40]) | |
998 | // ); | |
999 | // | |
1000 | //inv_macro i_inv_data_out_0 (width=40, stack=50c) | |
1001 | //( | |
1002 | // .din (data_out_x[39:0]), | |
1003 | // .dout (data_out_x_[39:0]) | |
1004 | // ); | |
1005 | // | |
1006 | //// fixscan start: | |
1007 | //assign i_dff_grant_x_scanin = scan_in ; | |
1008 | //assign i_dff_q1_2_scanin = i_dff_grant_x_scanout ; | |
1009 | //assign i_dff_q1_1_scanin = i_dff_q1_2_scanout ; | |
1010 | //assign i_dff_q1_0_scanin = i_dff_q1_1_scanout ; | |
1011 | //assign i_dff_q0_2_scanin = i_dff_q1_0_scanout ; | |
1012 | //assign i_dff_q0_1_scanin = i_dff_q0_2_scanout ; | |
1013 | //assign i_dff_q0_0_scanin = i_dff_q0_1_scanout ; | |
1014 | //assign scan_out = i_dff_q0_0_scanout ; | |
1015 | //// fixscan end: | |
1016 | //endmodule | |
1017 | // | |
1018 | // Local Variables: | |
1019 | // verilog-library-directories:("." "v") | |
1020 | // verilog-library-files:("./v/ccx_new_macro.v") | |
1021 | // End: | |
1022 | // | |
1023 | ||
1024 | ||
1025 | // | |
1026 | // ccx macro | |
1027 | // | |
1028 | // | |
1029 | ||
1030 | ||
1031 | ||
1032 | ||
1033 | ||
1034 | module pcx_dpsh_ccx_new_macro__type_b_l ( | |
1035 | l2clk, | |
1036 | l1clk, | |
1037 | pce0, | |
1038 | pce1, | |
1039 | pce_ov, | |
1040 | se, | |
1041 | stop, | |
1042 | siclk_in, | |
1043 | soclk_in, | |
1044 | scan_in, | |
1045 | grant_a, | |
1046 | qsel0, | |
1047 | shift, | |
1048 | data_a, | |
1049 | data_prev_x_l, | |
1050 | data_x_l, | |
1051 | scan_out); | |
1052 | wire so5; | |
1053 | wire siclk_out; | |
1054 | wire soclk_out; | |
1055 | wire l1clk0; | |
1056 | wire l1clk1; | |
1057 | wire grant_x; | |
1058 | wire qsel0_buf; | |
1059 | wire shift_buf; | |
1060 | ||
1061 | input l2clk; | |
1062 | input l1clk; | |
1063 | input pce0; | |
1064 | input pce1; | |
1065 | input pce_ov; | |
1066 | input se; | |
1067 | input stop; | |
1068 | input siclk_in; | |
1069 | input soclk_in; | |
1070 | input scan_in; | |
1071 | input grant_a; | |
1072 | input qsel0; | |
1073 | input shift; | |
1074 | input [9:0] data_a; | |
1075 | input [9:0] data_prev_x_l; | |
1076 | output [9:0] data_x_l; | |
1077 | output scan_out; | |
1078 | cl_dp1_ccxhdr c0 ( | |
1079 | .si(scan_in), | |
1080 | .so(so5), | |
1081 | .l2clk(l2clk), | |
1082 | .pce0(pce0), | |
1083 | .pce1(pce1), | |
1084 | .pce_ov(pce_ov), | |
1085 | .stop(stop), | |
1086 | .siclk_in(siclk_in), | |
1087 | .soclk_in(soclk_in), | |
1088 | .siclk_out(siclk_out), | |
1089 | .soclk_out(soclk_out), | |
1090 | .l1clk0(l1clk0), | |
1091 | .l1clk1(l1clk1), | |
1092 | .se(se), | |
1093 | .l1clk(l1clk), | |
1094 | .grant_a(grant_a), | |
1095 | .grant_x(grant_x), | |
1096 | .qsel0(qsel0), | |
1097 | .qsel0_buf(qsel0_buf), | |
1098 | .shift(shift), | |
1099 | .shift_buf(shift_buf) | |
1100 | ); | |
1101 | ||
1102 | ||
1103 | ||
1104 | ||
1105 | ||
1106 | ||
1107 | ccx_mac_b #(10) mac_b( | |
1108 | .siclk(siclk_out), | |
1109 | .soclk(soclk_out), | |
1110 | .data_a(data_a[9:0]), | |
1111 | .data_prev_x_l(data_prev_x_l[9:0]), | |
1112 | .data_x_l(data_x_l[9:0]), | |
1113 | .si(so5), | |
1114 | .so(scan_out), | |
1115 | .l1clk0(l1clk0), | |
1116 | .l1clk1(l1clk1), | |
1117 | .grant_x(grant_x), | |
1118 | .qsel0_buf(qsel0_buf), | |
1119 | .shift_buf(shift_buf) | |
1120 | ); | |
1121 | ||
1122 | ||
1123 | ||
1124 | ||
1125 | ||
1126 | ||
1127 | ||
1128 | ||
1129 | ||
1130 | ||
1131 | ||
1132 | ||
1133 | ||
1134 | ||
1135 | endmodule | |
1136 | ||
1137 | // | |
1138 | //// scan renames | |
1139 | //assign pce_ov = tcu_pce_ov; | |
1140 | //assign stop = tcu_clk_stop; | |
1141 | //assign siclk = tcu_aclk; | |
1142 | //assign soclk = tcu_bclk; | |
1143 | //// end scan | |
1144 | // | |
1145 | //buff_macro i_buf_grant (width=1, stack=30c) | |
1146 | //( | |
1147 | // .din (arb_grant_a), | |
1148 | // .dout (grant_a), | |
1149 | // ); | |
1150 | // | |
1151 | //msff_macro i_dff_grant_x (width=12, stack=30c) | |
1152 | //( | |
1153 | // .scan_in(i_dff_grant_x_scanin), | |
1154 | // .scan_out(i_dff_grant_x_scanout), | |
1155 | // .clk (l2clk), | |
1156 | // .din ({12{grant_a}}), | |
1157 | // .dout (grant_x[11:0]), | |
1158 | // .en (1'b1), | |
1159 | // ); | |
1160 | // | |
1161 | //// DATAPATH SECTION | |
1162 | // | |
1163 | //msff_macro i_dff_q1_2 (width=40, stack=50c) | |
1164 | //( | |
1165 | // .scan_in(i_dff_q1_2_scanin), | |
1166 | // .scan_out(i_dff_q1_2_scanout), | |
1167 | // .clk (l2clk), | |
1168 | // .din (src_pcx_data_a[129:90]), | |
1169 | // .dout (q1_dataout[129:90]), | |
1170 | // .en (arb_qsel1_a), | |
1171 | // ); | |
1172 | // | |
1173 | //msff_macro i_dff_q1_1 (width=50, stack=50c) | |
1174 | //( | |
1175 | // .scan_in(i_dff_q1_1_scanin), | |
1176 | // .scan_out(i_dff_q1_1_scanout), | |
1177 | // .clk (l2clk), | |
1178 | // .din (src_pcx_data_a[89:40]), | |
1179 | // .dout (q1_dataout[89:40]), | |
1180 | // .en (arb_qsel1_a), | |
1181 | // ); | |
1182 | // | |
1183 | //msff_macro i_dff_q1_0 (width=40, stack=50c) | |
1184 | //( | |
1185 | // .scan_in(i_dff_q1_0_scanin), | |
1186 | // .scan_out(i_dff_q1_0_scanout), | |
1187 | // .clk (l2clk), | |
1188 | // .din (src_pcx_data_a[39:0]), | |
1189 | // .dout (q1_dataout[39:0]), | |
1190 | // .en (arb_qsel1_a), | |
1191 | // ); | |
1192 | // | |
1193 | ////assign q0_datain_ca[149:0] = | |
1194 | //// (arb_pcxdp_qsel0_ca ? src_pcx_data_ca[149:0] : 150'd0) | | |
1195 | //// (arb_pcxdp_shift_cx ? q1_dataout[149:0] : 150'd0) ; | |
1196 | // | |
1197 | // | |
1198 | //mux_macro i_mux_q0_2 (width=40, mux=aonpe, ports=2, stack=50c) | |
1199 | //( | |
1200 | // .din0 (src_pcx_data_a[129:90]), | |
1201 | // .din1 (q1_dataout[129:90]), | |
1202 | // .sel0 (arb_qsel0_a), | |
1203 | // .sel1 (arb_shift_a), | |
1204 | // .dout (q0_datain_a[129:90]), | |
1205 | // ); | |
1206 | // | |
1207 | //mux_macro i_mux_q0_1 (width=50, mux=aonpe, ports=2, stack=50c) | |
1208 | //( | |
1209 | // .din0 (src_pcx_data_a[89:40]), | |
1210 | // .din1 (q1_dataout[89:40]), | |
1211 | // .sel0 (arb_qsel0_a), | |
1212 | // .sel1 (arb_shift_a), | |
1213 | // .dout (q0_datain_a[89:40]), | |
1214 | // ); | |
1215 | // | |
1216 | //mux_macro i_mux_q0_0 (width=40, mux=aonpe, ports=2, stack=50c) | |
1217 | //( | |
1218 | // .din0 (src_pcx_data_a[39:0]), | |
1219 | // .din1 (q1_dataout[39:0]), | |
1220 | // .sel0 (arb_qsel0_a), | |
1221 | // .sel1 (arb_shift_a), | |
1222 | // .dout (q0_datain_a[39:0]), | |
1223 | // ); | |
1224 | // | |
1225 | //msff_macro i_dff_q0_2 (width=40, stack=50c) | |
1226 | //( | |
1227 | // .scan_in(i_dff_q0_2_scanin), | |
1228 | // .scan_out(i_dff_q0_2_scanout), | |
1229 | // .clk (l2clk), | |
1230 | // .din (q0_datain_a[129:90]), | |
1231 | // .dout (q0_dataout[129:90]), | |
1232 | // .en (arb_q0_holdbar_a), | |
1233 | // ); | |
1234 | // | |
1235 | //msff_macro i_dff_q0_1 (width=50, stack=50c) | |
1236 | //( | |
1237 | // .scan_in(i_dff_q0_1_scanin), | |
1238 | // .scan_out(i_dff_q0_1_scanout), | |
1239 | // .clk (l2clk), | |
1240 | // .din (q0_datain_a[89:40]), | |
1241 | // .dout (q0_dataout[89:40]), | |
1242 | // .en (arb_q0_holdbar_a), | |
1243 | // ); | |
1244 | // | |
1245 | //msff_macro i_dff_q0_0 (width=40, stack=50c) | |
1246 | //( | |
1247 | // .scan_in(i_dff_q0_0_scanin), | |
1248 | // .scan_out(i_dff_q0_0_scanout), | |
1249 | // .clk (l2clk), | |
1250 | // .din (q0_datain_a[39:0]), | |
1251 | // .dout (q0_dataout[39:0]), | |
1252 | // .en (arb_q0_holdbar_a), | |
1253 | // ); | |
1254 | // | |
1255 | ////MUX | |
1256 | // | |
1257 | //nand_macro i_nand_data_g_2 (width=40, ports=2, stack=50c) | |
1258 | //( | |
1259 | // .din0 (q0_dataout[129:90]), | |
1260 | // .din1 ({{10{grant_x[11]}},{10{grant_x[10]}},{10{grant_x[9]}},{10{grant_x[8]}}}), | |
1261 | // .dout (data_x_[129:90]), | |
1262 | // ); | |
1263 | // | |
1264 | //nand_macro i_nand_data_g_1 (width=50, ports=2, stack=50c) | |
1265 | //( | |
1266 | // .din0 (q0_dataout[89:40]), | |
1267 | // .din1 ({{10{grant_x[7]}},{15{grant_x[6]}},{15{grant_x[5]}},{10{grant_x[4]}}}), | |
1268 | // .dout (data_x_[89:40]), | |
1269 | // ); | |
1270 | // | |
1271 | //nand_macro i_nand_data_g_0 (width=40, ports=2, stack=50c) | |
1272 | //( | |
1273 | // .din0 (q0_dataout[39:0]), | |
1274 | // .din1 ({{10{grant_x[3]}},{10{grant_x[2]}},{10{grant_x[1]}},{10{grant_x[0]}}}), | |
1275 | // .dout (data_x_[39:0]), | |
1276 | // ); | |
1277 | // | |
1278 | //nand_macro i_nand_data_crit_2 (width=40, ports=3, stack=50c) | |
1279 | //( | |
1280 | // .din0 (data_x_[129:90]), | |
1281 | // .din1 (data_crit_x_[129:90]), | |
1282 | // .din2 (data_ncrit_x_[129:90]), | |
1283 | // .dout (data_out_x[129:90]) | |
1284 | //); | |
1285 | // | |
1286 | //nand_macro i_nand_data_crit_1 (width=50, ports=3, stack=50c) | |
1287 | //( | |
1288 | // .din0 (data_x_[89:40]), | |
1289 | // .din1 (data_crit_x_[89:40]), | |
1290 | // .din2 (data_ncrit_x_[89:40]), | |
1291 | // .dout (data_out_x[89:40]) | |
1292 | //); | |
1293 | // | |
1294 | //nand_macro i_nand_data_crit_0 (width=40, ports=3, stack=50c) | |
1295 | //( | |
1296 | // .din0 (data_x_[39:0]), | |
1297 | // .din1 (data_crit_x_[39:0]), | |
1298 | // .din2 (data_ncrit_x_[39:0]), | |
1299 | // .dout (data_out_x[39:0]) | |
1300 | //); | |
1301 | // | |
1302 | //inv_macro i_inv_data_out_2 (width=40, stack=50c) | |
1303 | //( | |
1304 | // .din (data_out_x[129:90]), | |
1305 | // .dout (data_out_x_[129:90]) | |
1306 | // ); | |
1307 | // | |
1308 | //inv_macro i_inv_data_out_1 (width=50, stack=50c) | |
1309 | //( | |
1310 | // .din (data_out_x[89:40]), | |
1311 | // .dout (data_out_x_[89:40]) | |
1312 | // ); | |
1313 | // | |
1314 | //inv_macro i_inv_data_out_0 (width=40, stack=50c) | |
1315 | //( | |
1316 | // .din (data_out_x[39:0]), | |
1317 | // .dout (data_out_x_[39:0]) | |
1318 | // ); | |
1319 | // | |
1320 | //// fixscan start: | |
1321 | //assign i_dff_grant_x_scanin = scan_in ; | |
1322 | //assign i_dff_q1_2_scanin = i_dff_grant_x_scanout ; | |
1323 | //assign i_dff_q1_1_scanin = i_dff_q1_2_scanout ; | |
1324 | //assign i_dff_q1_0_scanin = i_dff_q1_1_scanout ; | |
1325 | //assign i_dff_q0_2_scanin = i_dff_q1_0_scanout ; | |
1326 | //assign i_dff_q0_1_scanin = i_dff_q0_2_scanout ; | |
1327 | //assign i_dff_q0_0_scanin = i_dff_q0_1_scanout ; | |
1328 | //assign scan_out = i_dff_q0_0_scanout ; | |
1329 | //// fixscan end: | |
1330 | //endmodule | |
1331 | // Local Variables: | |
1332 | // verilog-library-directories:("." "v") | |
1333 | // verilog-library-files:("./v/ccx_new_macro.v") | |
1334 | // End: | |
1335 | // | |
1336 | ||
1337 | ||
1338 | // | |
1339 | // ccx macro | |
1340 | // | |
1341 | // | |
1342 | ||
1343 | ||
1344 | ||
1345 | ||
1346 | ||
1347 | module pcx_dpsh_ccx_new_macro__type_c_r ( | |
1348 | l2clk, | |
1349 | l1clk, | |
1350 | pce0, | |
1351 | pce1, | |
1352 | pce_ov, | |
1353 | se, | |
1354 | stop, | |
1355 | siclk_in, | |
1356 | soclk_in, | |
1357 | scan_in, | |
1358 | grant_a, | |
1359 | qsel0, | |
1360 | shift, | |
1361 | data_a, | |
1362 | data_crit_x_l, | |
1363 | data_ncrit_x_l, | |
1364 | data_x_l, | |
1365 | scan_out); | |
1366 | wire so5; | |
1367 | wire siclk_out; | |
1368 | wire soclk_out; | |
1369 | wire l1clk0; | |
1370 | wire l1clk1; | |
1371 | wire grant_x; | |
1372 | wire qsel0_buf; | |
1373 | wire shift_buf; | |
1374 | ||
1375 | input l2clk; | |
1376 | input l1clk; | |
1377 | input pce0; | |
1378 | input pce1; | |
1379 | input pce_ov; | |
1380 | input se; | |
1381 | input stop; | |
1382 | input siclk_in; | |
1383 | input soclk_in; | |
1384 | input scan_in; | |
1385 | input grant_a; | |
1386 | input qsel0; | |
1387 | input shift; | |
1388 | input [9:0] data_a; | |
1389 | input [9:0] data_crit_x_l; | |
1390 | input [9:0] data_ncrit_x_l; | |
1391 | output [9:0] data_x_l; | |
1392 | output scan_out; | |
1393 | cl_dp1_ccxhdr c0 ( | |
1394 | .si(scan_in), | |
1395 | .so(so5), | |
1396 | .l2clk(l2clk), | |
1397 | .pce0(pce0), | |
1398 | .pce1(pce1), | |
1399 | .pce_ov(pce_ov), | |
1400 | .stop(stop), | |
1401 | .siclk_in(siclk_in), | |
1402 | .soclk_in(soclk_in), | |
1403 | .siclk_out(siclk_out), | |
1404 | .soclk_out(soclk_out), | |
1405 | .l1clk0(l1clk0), | |
1406 | .l1clk1(l1clk1), | |
1407 | .se(se), | |
1408 | .l1clk(l1clk), | |
1409 | .grant_a(grant_a), | |
1410 | .grant_x(grant_x), | |
1411 | .qsel0(qsel0), | |
1412 | .qsel0_buf(qsel0_buf), | |
1413 | .shift(shift), | |
1414 | .shift_buf(shift_buf) | |
1415 | ); | |
1416 | ||
1417 | ||
1418 | ||
1419 | ||
1420 | ||
1421 | ||
1422 | ccx_mac_c #(10) mac_c( | |
1423 | .siclk(siclk_out), | |
1424 | .soclk(soclk_out), | |
1425 | .data_a(data_a[9:0]), | |
1426 | .data_crit_x_l(data_crit_x_l[9:0]), | |
1427 | .data_ncrit_x_l(data_ncrit_x_l[9:0]), | |
1428 | .data_x_l(data_x_l[9:0]), | |
1429 | .si(so5), | |
1430 | .so(scan_out), | |
1431 | .l1clk0(l1clk0), | |
1432 | .l1clk1(l1clk1), | |
1433 | .grant_x(grant_x), | |
1434 | .qsel0_buf(qsel0_buf), | |
1435 | .shift_buf(shift_buf) | |
1436 | ); | |
1437 | ||
1438 | ||
1439 | ||
1440 | ||
1441 | ||
1442 | ||
1443 | ||
1444 | ||
1445 | ||
1446 | ||
1447 | ||
1448 | ||
1449 | ||
1450 | ||
1451 | endmodule | |
1452 | ||
1453 | `endif // `ifndef FPGA | |
1454 | ||
1455 | `ifdef FPGA | |
1456 | `timescale 1 ns / 100 ps | |
1457 | module pcx_dpsh(pcx_scache_data_x_, arb_grant_l_a, arb_q0_holdbar_l_a, | |
1458 | arb_qsel0_l_a, arb_qsel1_l_a, arb_shift_l_a, arb_grant_r_a, | |
1459 | arb_q0_holdbar_r_a, arb_qsel0_r_a, arb_qsel1_r_a, arb_shift_r_a, | |
1460 | spc0_pcx_data_a, spc1_pcx_data_a, spc2_pcx_data_a, spc3_pcx_data_a, | |
1461 | spc4_pcx_data_a, spc5_pcx_data_a, spc6_pcx_data_a, spc7_pcx_data_a, | |
1462 | tcu_scan_en, l2clk, tcu_pce_ov, ccx_aclk, ccx_bclk, scan_in, scan_out); | |
1463 | ||
1464 | output [129:0] pcx_scache_data_x_; | |
1465 | input [7:0] arb_grant_l_a; | |
1466 | input [7:0] arb_q0_holdbar_l_a; | |
1467 | input [7:0] arb_qsel0_l_a; | |
1468 | input [7:0] arb_qsel1_l_a; | |
1469 | input [7:0] arb_shift_l_a; | |
1470 | input [7:0] arb_grant_r_a; | |
1471 | input [7:0] arb_q0_holdbar_r_a; | |
1472 | input [7:0] arb_qsel0_r_a; | |
1473 | input [7:0] arb_qsel1_r_a; | |
1474 | input [7:0] arb_shift_r_a; | |
1475 | input [129:0] spc0_pcx_data_a; | |
1476 | input [129:0] spc1_pcx_data_a; | |
1477 | input [129:0] spc2_pcx_data_a; | |
1478 | input [129:0] spc3_pcx_data_a; | |
1479 | input [129:0] spc4_pcx_data_a; | |
1480 | input [129:0] spc5_pcx_data_a; | |
1481 | input [129:0] spc6_pcx_data_a; | |
1482 | input [129:0] spc7_pcx_data_a; | |
1483 | input tcu_scan_en; | |
1484 | input l2clk; | |
1485 | input tcu_pce_ov; | |
1486 | input ccx_aclk; | |
1487 | input ccx_bclk; | |
1488 | input scan_in; | |
1489 | output scan_out; | |
1490 | ||
1491 | wire [129:0] all_ones; | |
1492 | wire [4:0] mac0_rep_in; | |
1493 | wire [3:0] arb_grant_l_a_rep; | |
1494 | wire [3:0] arb_qsel0_l_a_rep; | |
1495 | wire [3:0] arb_qsel1_l_a_rep; | |
1496 | wire [3:0] arb_shift_l_a_rep; | |
1497 | wire [3:0] arb_q0_holdbar_l_a_rep; | |
1498 | wire [4:0] mac0_rep_out; | |
1499 | wire [4:0] mac1_rep_in; | |
1500 | wire [4:0] mac1_rep_out; | |
1501 | wire [4:0] mac2_rep_in; | |
1502 | wire [4:0] mac2_rep_out; | |
1503 | wire [4:0] mac3_rep_in; | |
1504 | wire [4:0] mac3_rep_out; | |
1505 | wire [4:0] mac4_rep_in; | |
1506 | wire [7:4] arb_grant_r_a_rep; | |
1507 | wire [7:4] arb_q0_holdbar_r_a_rep; | |
1508 | wire [7:4] arb_qsel0_r_a_rep; | |
1509 | wire [7:4] arb_qsel1_r_a_rep; | |
1510 | wire [7:4] arb_shift_r_a_rep; | |
1511 | wire [4:0] mac4_rep_out; | |
1512 | wire [4:0] mac5_rep_in; | |
1513 | wire [4:0] mac5_rep_out; | |
1514 | wire [4:0] mac6_rep_in; | |
1515 | wire [4:0] mac6_rep_out; | |
1516 | wire scan_rep_in; | |
1517 | wire [129:0] col0_data_x_; | |
1518 | wire tcu_scan_en_out_0_unused; | |
1519 | wire tcu_pce_ov_out_0_unused; | |
1520 | wire ccx_aclk_out_0_unused; | |
1521 | wire ccx_bclk_out_0_unused; | |
1522 | wire pcx_mac0_scanin; | |
1523 | wire pcx_mac0_scanout; | |
1524 | wire [6:1] tcu_scan_en_out; | |
1525 | wire [6:1] tcu_pce_ov_out; | |
1526 | wire [6:1] ccx_aclk_out; | |
1527 | wire [6:1] ccx_bclk_out; | |
1528 | wire [129:0] col1_data_x_; | |
1529 | wire pcx_mac1_scanin; | |
1530 | wire pcx_mac1_scanout; | |
1531 | wire [129:0] col2_data_x_; | |
1532 | wire pcx_mac2_scanin; | |
1533 | wire pcx_mac2_scanout; | |
1534 | wire [129:0] col3_data_x_; | |
1535 | wire pcx_mac3_scanin; | |
1536 | wire pcx_mac3_scanout; | |
1537 | wire [129:0] col4_data_x_; | |
1538 | wire pcx_mac4_scanin; | |
1539 | wire pcx_mac4_scanout; | |
1540 | wire [129:0] col5_data_x_; | |
1541 | wire pcx_mac5_scanin; | |
1542 | wire pcx_mac5_scanout; | |
1543 | wire [129:0] col6_data_x_; | |
1544 | wire pcx_mac6_scanin; | |
1545 | wire pcx_mac6_scanout; | |
1546 | wire tcu_scan_en_out_7_unused; | |
1547 | wire tcu_pce_ov_out_7_unused; | |
1548 | wire ccx_aclk_out_7_unused; | |
1549 | wire ccx_bclk_out_7_unused; | |
1550 | wire pcx_mac7_scanin; | |
1551 | wire pcx_mac7_scanout; | |
1552 | wire [7:4] arb_grant_l_a_unused; | |
1553 | wire [7:4] arb_q0_holdbar_l_a_unused; | |
1554 | wire [7:4] arb_qsel0_l_a_unused; | |
1555 | wire [7:4] arb_qsel1_l_a_unused; | |
1556 | wire [7:4] arb_shift_l_a_unused; | |
1557 | wire [3:0] arb_grant_r_a_unused; | |
1558 | wire [3:0] arb_q0_holdbar_r_a_unused; | |
1559 | wire [3:0] arb_qsel0_r_a_unused; | |
1560 | wire [3:0] arb_qsel1_r_a_unused; | |
1561 | wire [3:0] arb_shift_r_a_unused; | |
1562 | wire scan_rep_out; | |
1563 | ||
1564 | assign all_ones[129:0] = 130'h3ffffffffffffffffffffffffffffffff; | |
1565 | assign mac0_rep_in[4:0] = {arb_grant_l_a[0], arb_qsel0_l_a[0], | |
1566 | arb_qsel1_l_a[0], arb_shift_l_a[0], arb_q0_holdbar_l_a[0]}; | |
1567 | assign {arb_grant_l_a_rep[0], arb_qsel0_l_a_rep[0], | |
1568 | arb_qsel1_l_a_rep[0], arb_shift_l_a_rep[0], | |
1569 | arb_q0_holdbar_l_a_rep[0]} = mac0_rep_out[4:0]; | |
1570 | assign mac1_rep_in[4:0] = {arb_grant_l_a[2], arb_q0_holdbar_l_a[2], | |
1571 | arb_qsel0_l_a[2], arb_qsel1_l_a[2], arb_shift_l_a[2]}; | |
1572 | assign {arb_grant_l_a_rep[2], arb_q0_holdbar_l_a_rep[2], | |
1573 | arb_qsel0_l_a_rep[2], arb_qsel1_l_a_rep[2], arb_shift_l_a_rep[2] | |
1574 | } = mac1_rep_out[4:0]; | |
1575 | assign mac2_rep_in[4:0] = {arb_grant_l_a[1], arb_q0_holdbar_l_a[1], | |
1576 | arb_qsel0_l_a[1], arb_qsel1_l_a[1], arb_shift_l_a[1]}; | |
1577 | assign {arb_grant_l_a_rep[1], arb_q0_holdbar_l_a_rep[1], | |
1578 | arb_qsel0_l_a_rep[1], arb_qsel1_l_a_rep[1], arb_shift_l_a_rep[1] | |
1579 | } = mac2_rep_out[4:0]; | |
1580 | assign mac3_rep_in[4:0] = {arb_grant_l_a[3], arb_q0_holdbar_l_a[3], | |
1581 | arb_qsel0_l_a[3], arb_qsel1_l_a[3], arb_shift_l_a[3]}; | |
1582 | assign {arb_grant_l_a_rep[3], arb_q0_holdbar_l_a_rep[3], | |
1583 | arb_qsel0_l_a_rep[3], arb_qsel1_l_a_rep[3], arb_shift_l_a_rep[3] | |
1584 | } = mac3_rep_out[4:0]; | |
1585 | assign mac4_rep_in[4:0] = {arb_grant_r_a[5], arb_q0_holdbar_r_a[5], | |
1586 | arb_qsel0_r_a[5], arb_qsel1_r_a[5], arb_shift_r_a[5]}; | |
1587 | assign {arb_grant_r_a_rep[5], arb_q0_holdbar_r_a_rep[5], | |
1588 | arb_qsel0_r_a_rep[5], arb_qsel1_r_a_rep[5], arb_shift_r_a_rep[5] | |
1589 | } = mac4_rep_out[4:0]; | |
1590 | assign mac5_rep_in[4:0] = {arb_grant_r_a[7], arb_q0_holdbar_r_a[7], | |
1591 | arb_qsel0_r_a[7], arb_qsel1_r_a[7], arb_shift_r_a[7]}; | |
1592 | assign {arb_grant_r_a_rep[7], arb_q0_holdbar_r_a_rep[7], | |
1593 | arb_qsel0_r_a_rep[7], arb_qsel1_r_a_rep[7], arb_shift_r_a_rep[7] | |
1594 | } = mac5_rep_out[4:0]; | |
1595 | assign mac6_rep_in[4:0] = {arb_grant_r_a[4], arb_q0_holdbar_r_a[4], | |
1596 | arb_qsel0_r_a[4], arb_qsel1_r_a[4], arb_shift_r_a[4]}; | |
1597 | assign {arb_grant_r_a_rep[4], arb_q0_holdbar_r_a_rep[4], | |
1598 | arb_qsel0_r_a_rep[4], arb_qsel1_r_a_rep[4], arb_shift_r_a_rep[4] | |
1599 | } = mac6_rep_out[4:0]; | |
1600 | assign scan_rep_in = scan_in; | |
1601 | assign arb_grant_l_a_unused[7:4] = arb_grant_l_a[7:4]; | |
1602 | assign arb_q0_holdbar_l_a_unused[7:4] = arb_q0_holdbar_l_a[7:4]; | |
1603 | assign arb_qsel0_l_a_unused[7:4] = arb_qsel0_l_a[7:4]; | |
1604 | assign arb_qsel1_l_a_unused[7:4] = arb_qsel1_l_a[7:4]; | |
1605 | assign arb_shift_l_a_unused[7:4] = arb_shift_l_a[7:4]; | |
1606 | assign arb_grant_r_a_unused[3:0] = arb_grant_r_a[3:0]; | |
1607 | assign arb_q0_holdbar_r_a_unused[3:0] = arb_q0_holdbar_r_a[3:0]; | |
1608 | assign arb_qsel0_r_a_unused[3:0] = arb_qsel0_r_a[3:0]; | |
1609 | assign arb_qsel1_r_a_unused[3:0] = arb_qsel1_r_a[3:0]; | |
1610 | assign arb_shift_r_a_unused[3:0] = arb_shift_r_a[3:0]; | |
1611 | assign pcx_mac0_scanin = scan_rep_out; | |
1612 | assign pcx_mac1_scanin = pcx_mac0_scanout; | |
1613 | assign pcx_mac2_scanin = pcx_mac1_scanout; | |
1614 | assign pcx_mac3_scanin = pcx_mac2_scanout; | |
1615 | assign pcx_mac4_scanin = pcx_mac3_scanout; | |
1616 | assign pcx_mac5_scanin = pcx_mac4_scanout; | |
1617 | assign pcx_mac6_scanin = pcx_mac5_scanout; | |
1618 | assign pcx_mac7_scanin = pcx_mac6_scanout; | |
1619 | assign scan_out = pcx_mac7_scanout; | |
1620 | ||
1621 | pcx_rep_dp pcx_rep( | |
1622 | .mac0_rep_out (mac0_rep_out[4:0]), | |
1623 | .mac1_rep_out (mac1_rep_out[4:0]), | |
1624 | .mac2_rep_out (mac2_rep_out[4:0]), | |
1625 | .mac3_rep_out (mac3_rep_out[4:0]), | |
1626 | .mac4_rep_out (mac4_rep_out[4:0]), | |
1627 | .mac5_rep_out (mac5_rep_out[4:0]), | |
1628 | .mac6_rep_out (mac6_rep_out[4:0]), | |
1629 | .scan_rep_out (scan_rep_out), | |
1630 | .mac0_rep_in (mac0_rep_in[4:0]), | |
1631 | .mac1_rep_in (mac1_rep_in[4:0]), | |
1632 | .mac2_rep_in (mac2_rep_in[4:0]), | |
1633 | .mac3_rep_in (mac3_rep_in[4:0]), | |
1634 | .mac4_rep_in (mac4_rep_in[4:0]), | |
1635 | .mac5_rep_in (mac5_rep_in[4:0]), | |
1636 | .mac6_rep_in (mac6_rep_in[4:0]), | |
1637 | .scan_rep_in (scan_rep_in)); | |
1638 | pcx_mal_dp pcx_mac0( | |
1639 | .data_out_x_ (col0_data_x_[129:0]), | |
1640 | .tcu_scan_en_out (tcu_scan_en_out_0_unused), | |
1641 | .tcu_pce_ov_out (tcu_pce_ov_out_0_unused), | |
1642 | .ccx_aclk_out (ccx_aclk_out_0_unused), | |
1643 | .ccx_bclk_out (ccx_bclk_out_0_unused), | |
1644 | .arb_grant_a (arb_grant_l_a_rep[0]), | |
1645 | .arb_qsel0_a (arb_qsel0_l_a_rep[0]), | |
1646 | .arb_qsel1_a (arb_qsel1_l_a_rep[0]), | |
1647 | .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[0]), | |
1648 | .arb_shift_a (arb_shift_l_a_rep[0]), | |
1649 | .src_pcx_data_a (spc0_pcx_data_a[129:0]), | |
1650 | .scan_in (pcx_mac0_scanin), | |
1651 | .scan_out (pcx_mac0_scanout), | |
1652 | .l2clk (l2clk), | |
1653 | .tcu_scan_en (tcu_scan_en_out[1]), | |
1654 | .tcu_pce_ov (tcu_pce_ov_out[1]), | |
1655 | .ccx_aclk (ccx_aclk_out[1]), | |
1656 | .ccx_bclk (ccx_bclk_out[1])); | |
1657 | pcx_mbl_dp pcx_mac1( | |
1658 | .data_out_x_ (col1_data_x_[129:0]), | |
1659 | .tcu_scan_en_out (tcu_scan_en_out[1]), | |
1660 | .tcu_pce_ov_out (tcu_pce_ov_out[1]), | |
1661 | .ccx_aclk_out (ccx_aclk_out[1]), | |
1662 | .ccx_bclk_out (ccx_bclk_out[1]), | |
1663 | .arb_grant_a (arb_grant_l_a_rep[2]), | |
1664 | .arb_qsel0_a (arb_qsel0_l_a_rep[2]), | |
1665 | .arb_qsel1_a (arb_qsel1_l_a_rep[2]), | |
1666 | .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[2]), | |
1667 | .arb_shift_a (arb_shift_l_a_rep[2]), | |
1668 | .src_pcx_data_a (spc2_pcx_data_a[129:0]), | |
1669 | .data_prev_x_ (col0_data_x_[129:0]), | |
1670 | .scan_in (pcx_mac1_scanin), | |
1671 | .scan_out (pcx_mac1_scanout), | |
1672 | .l2clk (l2clk), | |
1673 | .tcu_scan_en (tcu_scan_en_out[2]), | |
1674 | .tcu_pce_ov (tcu_pce_ov_out[2]), | |
1675 | .ccx_aclk (ccx_aclk_out[2]), | |
1676 | .ccx_bclk (ccx_bclk_out[2])); | |
1677 | pcx_mbl_dp pcx_mac2( | |
1678 | .data_out_x_ (col2_data_x_[129:0]), | |
1679 | .tcu_scan_en_out (tcu_scan_en_out[2]), | |
1680 | .tcu_pce_ov_out (tcu_pce_ov_out[2]), | |
1681 | .ccx_aclk_out (ccx_aclk_out[2]), | |
1682 | .ccx_bclk_out (ccx_bclk_out[2]), | |
1683 | .arb_grant_a (arb_grant_l_a_rep[1]), | |
1684 | .arb_qsel0_a (arb_qsel0_l_a_rep[1]), | |
1685 | .arb_qsel1_a (arb_qsel1_l_a_rep[1]), | |
1686 | .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[1]), | |
1687 | .arb_shift_a (arb_shift_l_a_rep[1]), | |
1688 | .src_pcx_data_a (spc1_pcx_data_a[129:0]), | |
1689 | .data_prev_x_ (col1_data_x_[129:0]), | |
1690 | .scan_in (pcx_mac2_scanin), | |
1691 | .scan_out (pcx_mac2_scanout), | |
1692 | .l2clk (l2clk), | |
1693 | .tcu_scan_en (tcu_scan_en_out[3]), | |
1694 | .tcu_pce_ov (tcu_pce_ov_out[3]), | |
1695 | .ccx_aclk (ccx_aclk_out[3]), | |
1696 | .ccx_bclk (ccx_bclk_out[3])); | |
1697 | pcx_mbl_dp pcx_mac3( | |
1698 | .data_out_x_ (col3_data_x_[129:0]), | |
1699 | .tcu_scan_en_out (tcu_scan_en_out[3]), | |
1700 | .tcu_pce_ov_out (tcu_pce_ov_out[3]), | |
1701 | .ccx_aclk_out (ccx_aclk_out[3]), | |
1702 | .ccx_bclk_out (ccx_bclk_out[3]), | |
1703 | .arb_grant_a (arb_grant_l_a_rep[3]), | |
1704 | .arb_qsel0_a (arb_qsel0_l_a_rep[3]), | |
1705 | .arb_qsel1_a (arb_qsel1_l_a_rep[3]), | |
1706 | .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[3]), | |
1707 | .arb_shift_a (arb_shift_l_a_rep[3]), | |
1708 | .src_pcx_data_a (spc3_pcx_data_a[129:0]), | |
1709 | .data_prev_x_ (col2_data_x_[129:0]), | |
1710 | .scan_in (pcx_mac3_scanin), | |
1711 | .scan_out (pcx_mac3_scanout), | |
1712 | .l2clk (l2clk), | |
1713 | .tcu_scan_en (tcu_scan_en), | |
1714 | .tcu_pce_ov (tcu_pce_ov), | |
1715 | .ccx_aclk (ccx_aclk), | |
1716 | .ccx_bclk (ccx_bclk)); | |
1717 | pcx_mbl_dp pcx_mac4( | |
1718 | .data_out_x_ (col4_data_x_[129:0]), | |
1719 | .tcu_scan_en_out (tcu_scan_en_out[4]), | |
1720 | .tcu_pce_ov_out (tcu_pce_ov_out[4]), | |
1721 | .ccx_aclk_out (ccx_aclk_out[4]), | |
1722 | .ccx_bclk_out (ccx_bclk_out[4]), | |
1723 | .arb_grant_a (arb_grant_r_a_rep[5]), | |
1724 | .arb_qsel0_a (arb_qsel0_r_a_rep[5]), | |
1725 | .arb_qsel1_a (arb_qsel1_r_a_rep[5]), | |
1726 | .arb_q0_holdbar_a (arb_q0_holdbar_r_a_rep[5]), | |
1727 | .arb_shift_a (arb_shift_r_a_rep[5]), | |
1728 | .src_pcx_data_a (spc5_pcx_data_a[129:0]), | |
1729 | .data_prev_x_ (col3_data_x_[129:0]), | |
1730 | .scan_in (pcx_mac4_scanin), | |
1731 | .scan_out (pcx_mac4_scanout), | |
1732 | .l2clk (l2clk), | |
1733 | .tcu_scan_en (tcu_scan_en_out[3]), | |
1734 | .tcu_pce_ov (tcu_pce_ov_out[3]), | |
1735 | .ccx_aclk (ccx_aclk_out[3]), | |
1736 | .ccx_bclk (ccx_bclk_out[3])); | |
1737 | pcx_mbl_dp pcx_mac5( | |
1738 | .data_out_x_ (col5_data_x_[129:0]), | |
1739 | .tcu_scan_en_out (tcu_scan_en_out[5]), | |
1740 | .tcu_pce_ov_out (tcu_pce_ov_out[5]), | |
1741 | .ccx_aclk_out (ccx_aclk_out[5]), | |
1742 | .ccx_bclk_out (ccx_bclk_out[5]), | |
1743 | .arb_grant_a (arb_grant_r_a_rep[7]), | |
1744 | .arb_qsel0_a (arb_qsel0_r_a_rep[7]), | |
1745 | .arb_qsel1_a (arb_qsel1_r_a_rep[7]), | |
1746 | .arb_q0_holdbar_a (arb_q0_holdbar_r_a_rep[7]), | |
1747 | .arb_shift_a (arb_shift_r_a_rep[7]), | |
1748 | .src_pcx_data_a (spc7_pcx_data_a[129:0]), | |
1749 | .data_prev_x_ (col4_data_x_[129:0]), | |
1750 | .scan_in (pcx_mac5_scanin), | |
1751 | .scan_out (pcx_mac5_scanout), | |
1752 | .l2clk (l2clk), | |
1753 | .tcu_scan_en (tcu_scan_en_out[4]), | |
1754 | .tcu_pce_ov (tcu_pce_ov_out[4]), | |
1755 | .ccx_aclk (ccx_aclk_out[4]), | |
1756 | .ccx_bclk (ccx_bclk_out[4])); | |
1757 | pcx_mbl_dp pcx_mac6( | |
1758 | .data_out_x_ (col6_data_x_[129:0]), | |
1759 | .tcu_scan_en_out (tcu_scan_en_out[6]), | |
1760 | .tcu_pce_ov_out (tcu_pce_ov_out[6]), | |
1761 | .ccx_aclk_out (ccx_aclk_out[6]), | |
1762 | .ccx_bclk_out (ccx_bclk_out[6]), | |
1763 | .arb_grant_a (arb_grant_r_a_rep[4]), | |
1764 | .arb_qsel0_a (arb_qsel0_r_a_rep[4]), | |
1765 | .arb_qsel1_a (arb_qsel1_r_a_rep[4]), | |
1766 | .arb_q0_holdbar_a (arb_q0_holdbar_r_a_rep[4]), | |
1767 | .arb_shift_a (arb_shift_r_a_rep[4]), | |
1768 | .src_pcx_data_a (spc4_pcx_data_a[129:0]), | |
1769 | .data_prev_x_ (col5_data_x_[129:0]), | |
1770 | .scan_in (pcx_mac6_scanin), | |
1771 | .scan_out (pcx_mac6_scanout), | |
1772 | .l2clk (l2clk), | |
1773 | .tcu_scan_en (tcu_scan_en_out[5]), | |
1774 | .tcu_pce_ov (tcu_pce_ov_out[5]), | |
1775 | .ccx_aclk (ccx_aclk_out[5]), | |
1776 | .ccx_bclk (ccx_bclk_out[5])); | |
1777 | pcx_mcr_dp pcx_mac7( | |
1778 | .data_out_x_ (pcx_scache_data_x_[129:0]), | |
1779 | .tcu_scan_en_out (tcu_scan_en_out_7_unused), | |
1780 | .tcu_pce_ov_out (tcu_pce_ov_out_7_unused), | |
1781 | .ccx_aclk_out (ccx_aclk_out_7_unused), | |
1782 | .ccx_bclk_out (ccx_bclk_out_7_unused), | |
1783 | .arb_grant_a (arb_grant_r_a[6]), | |
1784 | .arb_qsel0_a (arb_qsel0_r_a[6]), | |
1785 | .arb_qsel1_a (arb_qsel1_r_a[6]), | |
1786 | .arb_q0_holdbar_a (arb_q0_holdbar_r_a[6]), | |
1787 | .arb_shift_a (arb_shift_r_a[6]), | |
1788 | .src_pcx_data_a (spc6_pcx_data_a[129:0]), | |
1789 | .data_crit_x_ (col6_data_x_[129:0]), | |
1790 | .data_ncrit_x_ (all_ones[129:0]), | |
1791 | .scan_in (pcx_mac7_scanin), | |
1792 | .scan_out (pcx_mac7_scanout), | |
1793 | .l2clk (l2clk), | |
1794 | .tcu_scan_en (tcu_scan_en_out[6]), | |
1795 | .tcu_pce_ov (tcu_pce_ov_out[6]), | |
1796 | .ccx_aclk (ccx_aclk_out[6]), | |
1797 | .ccx_bclk (ccx_bclk_out[6])); | |
1798 | endmodule | |
1799 | ||
1800 | ||
1801 | `endif // `ifdef FPGA | |
1802 |