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1 | // ========== Copyright Header Begin ========================================== |
2 | // | |
3 | // OpenSPARC T2 Processor File: ncu_i2cbuf4_ni_ctl.v | |
4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
6 | // | |
7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
8 | // | |
9 | // This program is free software; you can redistribute it and/or modify | |
10 | // it under the terms of the GNU General Public License as published by | |
11 | // the Free Software Foundation; version 2 of the License. | |
12 | // | |
13 | // This program is distributed in the hope that it will be useful, | |
14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | // GNU General Public License for more details. | |
17 | // | |
18 | // You should have received a copy of the GNU General Public License | |
19 | // along with this program; if not, write to the Free Software | |
20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | // | |
22 | // For the avoidance of doubt, and except that if any non-GPL license | |
23 | // choice is available it will apply instead, Sun elects to use only | |
24 | // the General Public License version 2 (GPLv2) at this time for any | |
25 | // software where a choice of GPL license versions is made | |
26 | // available with the language indicating that GPLv2 or any later version | |
27 | // may be used, or where a choice of which version of the GPL is applied is | |
28 | // otherwise unspecified. | |
29 | // | |
30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
32 | // have any questions. | |
33 | // | |
34 | // ========== Copyright Header End ============================================ | |
35 | module ncu_i2cbuf4_ni_ctl ( | |
36 | iol2clk, | |
37 | scan_in, | |
38 | scan_out, | |
39 | tcu_pce_ov, | |
40 | tcu_clk_stop, | |
41 | tcu_scan_en, | |
42 | tcu_aclk, | |
43 | tcu_bclk, | |
44 | ucb_iob_vld, | |
45 | ucb_iob_data, | |
46 | iob_ucb_stall, | |
47 | req_ack_obj, | |
48 | req_ack_vld, | |
49 | rd_req_ack_dbl_buf) ; | |
50 | wire stall_d1_n; | |
51 | wire stall_d1; | |
52 | wire vld_d1_ff_scanin; | |
53 | wire vld_d1_ff_scanout; | |
54 | wire vld_d1; | |
55 | wire l1clk; | |
56 | wire rdy1; | |
57 | wire data_d1_ff_scanin; | |
58 | wire data_d1_ff_scanout; | |
59 | wire [3:0] data_d1; | |
60 | wire stall_ff_scanin; | |
61 | wire stall_ff_scanout; | |
62 | wire iob_ucb_stall_a1; | |
63 | wire stall_d1_ff_scanin; | |
64 | wire stall_d1_ff_scanout; | |
65 | wire rdy0_ff_scanin; | |
66 | wire rdy0_ff_scanout; | |
67 | wire rdy0; | |
68 | wire rdy1_ff_scanin; | |
69 | wire rdy1_ff_scanout; | |
70 | wire skid_buf0_en; | |
71 | wire vld_buf0_ff_scanin; | |
72 | wire vld_buf0_ff_scanout; | |
73 | wire vld_buf0; | |
74 | wire data_buf0_ff_scanin; | |
75 | wire data_buf0_ff_scanout; | |
76 | wire [3:0] data_buf0; | |
77 | wire skid_buf1_en_ff_scanin; | |
78 | wire skid_buf1_en_ff_scanout; | |
79 | wire skid_buf1_en; | |
80 | wire vld_buf1_ff_scanin; | |
81 | wire vld_buf1_ff_scanout; | |
82 | wire vld_buf1; | |
83 | wire data_buf1_ff_scanin; | |
84 | wire data_buf1_ff_scanout; | |
85 | wire [3:0] data_buf1; | |
86 | wire skid_buf0_sel; | |
87 | wire skid_buf1_sel_ff_scanin; | |
88 | wire skid_buf1_sel_ff_scanout; | |
89 | wire skid_buf1_sel; | |
90 | wire vld_mux; | |
91 | wire [3:0] data_mux; | |
92 | wire [31:0] indata_vec_next; | |
93 | wire [31:0] indata_vec; | |
94 | wire iob_ucb_stall_a1_; | |
95 | wire indata_vec_ff_scanin; | |
96 | wire indata_vec_ff_scanout; | |
97 | wire [127:0] indata_buf_next; | |
98 | wire [127:0] indata_buf; | |
99 | wire indata_buf_ff_scanin; | |
100 | wire indata_buf_ff_scanout; | |
101 | wire indata_vec0_d1_ff_scanin; | |
102 | wire indata_vec0_d1_ff_scanout; | |
103 | wire indata_vec0_d1; | |
104 | wire indata_buf_vld; | |
105 | wire req_ack_pending; | |
106 | wire req_ack_dbl_buf_full; | |
107 | wire wr_req_ack_dbl_buf; | |
108 | wire wr_buf0; | |
109 | wire buf1_vld; | |
110 | wire buf0_vld; | |
111 | wire buf1_older; | |
112 | wire wr_buf1; | |
113 | wire rd_buf0; | |
114 | wire rd_buf1; | |
115 | wire rd_buf; | |
116 | wire buf1_older_n; | |
117 | wire buf1_older_ff_scanin; | |
118 | wire buf1_older_ff_scanout; | |
119 | wire en_vld0; | |
120 | wire en_vld1; | |
121 | wire buf0_vld_ff_scanin; | |
122 | wire buf0_vld_ff_scanout; | |
123 | wire buf1_vld_ff_scanin; | |
124 | wire buf1_vld_ff_scanout; | |
125 | wire buf0_obj_ff_scanin; | |
126 | wire buf0_obj_ff_scanout; | |
127 | wire [127:0] buf0_obj; | |
128 | wire buf1_obj_ff_scanin; | |
129 | wire buf1_obj_ff_scanout; | |
130 | wire [127:0] buf1_obj; | |
131 | wire siclk; | |
132 | wire soclk; | |
133 | wire se; | |
134 | wire pce_ov; | |
135 | wire stop; | |
136 | ||
137 | ||
138 | ||
139 | ||
140 | //////////////////////////////////////////////////////////////////////// | |
141 | // Signal declarations | |
142 | //////////////////////////////////////////////////////////////////////// | |
143 | // Global interface | |
144 | input iol2clk; | |
145 | input scan_in; | |
146 | output scan_out; | |
147 | input tcu_pce_ov; | |
148 | input tcu_clk_stop; | |
149 | input tcu_scan_en; | |
150 | input tcu_aclk; | |
151 | input tcu_bclk; | |
152 | ||
153 | ||
154 | ||
155 | // UCB interface | |
156 | input ucb_iob_vld; | |
157 | input [3:0] ucb_iob_data; | |
158 | output iob_ucb_stall; | |
159 | ||
160 | ||
161 | // i2c slow control/datapath interface | |
162 | output [127:0] req_ack_obj; | |
163 | output req_ack_vld; | |
164 | input rd_req_ack_dbl_buf; | |
165 | ||
166 | ||
167 | // Internal signals | |
168 | ||
169 | ||
170 | /************************************************************ | |
171 | * Assemble inbound packet | |
172 | ************************************************************/ | |
173 | // ucb_bus_in #(UCB_BUS_WIDTH) ucb_bus_in | |
174 | // ( | |
175 | // .clk(iol2clk), | |
176 | // .vld(ucb_iob_vld), | |
177 | // .data(ucb_iob_data[UCB_BUS_WIDTH-1:0]), | |
178 | // .stall(iob_ucb_stall), | |
179 | // .indata_buf_vld(indata_buf_vld), | |
180 | // .indata_buf(indata_buf[127:0]), | |
181 | // .stall_a1(iob_ucb_stall_a1) | |
182 | // ); | |
183 | //============================================================= | |
184 | //============================================================= | |
185 | //============================================================= | |
186 | /************************************************************ | |
187 | * UCB bus interface flops | |
188 | * This is to make signals going between IOB and UCB flop-to-flop | |
189 | * to improve timing. | |
190 | ************************************************************/ | |
191 | assign stall_d1_n = ~stall_d1; | |
192 | ncu_i2cbuf4_ni_ctl_msff_ctl_macro__en_1__width_1 vld_d1_ff | |
193 | ( | |
194 | .scan_in(vld_d1_ff_scanin), | |
195 | .scan_out(vld_d1_ff_scanout), | |
196 | .dout (vld_d1), | |
197 | .l1clk (l1clk), | |
198 | .en (stall_d1_n&rdy1), | |
199 | .din (ucb_iob_vld), | |
200 | .siclk(siclk), | |
201 | .soclk(soclk) | |
202 | ); | |
203 | ||
204 | ncu_i2cbuf4_ni_ctl_msff_ctl_macro__en_1__width_4 data_d1_ff | |
205 | ( | |
206 | .scan_in(data_d1_ff_scanin), | |
207 | .scan_out(data_d1_ff_scanout), | |
208 | .dout (data_d1[3:0]), | |
209 | .l1clk (l1clk), | |
210 | .en (stall_d1_n), | |
211 | .din (ucb_iob_data[3:0]), | |
212 | .siclk(siclk), | |
213 | .soclk(soclk) | |
214 | ); | |
215 | ||
216 | ncu_i2cbuf4_ni_ctl_msff_ctl_macro__width_1 stall_ff | |
217 | ( | |
218 | .scan_in(stall_ff_scanin), | |
219 | .scan_out(stall_ff_scanout), | |
220 | .dout (iob_ucb_stall), | |
221 | .l1clk (l1clk), | |
222 | .din (iob_ucb_stall_a1), | |
223 | .siclk(siclk), | |
224 | .soclk(soclk) | |
225 | ); | |
226 | ||
227 | ncu_i2cbuf4_ni_ctl_msff_ctl_macro__width_1 stall_d1_ff | |
228 | ( | |
229 | .scan_in(stall_d1_ff_scanin), | |
230 | .scan_out(stall_d1_ff_scanout), | |
231 | .dout (stall_d1), | |
232 | .l1clk (l1clk), | |
233 | .din (iob_ucb_stall), | |
234 | .siclk(siclk), | |
235 | .soclk(soclk) | |
236 | ); | |
237 | ||
238 | ncu_i2cbuf4_ni_ctl_msff_ctl_macro__width_1 rdy0_ff | |
239 | ( | |
240 | .scan_in(rdy0_ff_scanin), | |
241 | .scan_out(rdy0_ff_scanout), | |
242 | .dout (rdy0), | |
243 | .l1clk (l1clk), | |
244 | .din (1'b1), | |
245 | .siclk(siclk), | |
246 | .soclk(soclk) | |
247 | ); | |
248 | ||
249 | ncu_i2cbuf4_ni_ctl_msff_ctl_macro__width_1 rdy1_ff | |
250 | ( | |
251 | .scan_in(rdy1_ff_scanin), | |
252 | .scan_out(rdy1_ff_scanout), | |
253 | .dout (rdy1), | |
254 | .l1clk (l1clk), | |
255 | .din (rdy0), | |
256 | .siclk(siclk), | |
257 | .soclk(soclk) | |
258 | ); | |
259 | ||
260 | ||
261 | ||
262 | /************************************************************ | |
263 | * Skid buffer | |
264 | * We need a two deep skid buffer to handle stalling. | |
265 | ************************************************************/ | |
266 | // Assertion: stall has to be deasserted for more than 1 cycle | |
267 | // ie time between two separate stalls has to be | |
268 | // at least two cycles. Otherwise, contents from | |
269 | // skid buffer will be lost. | |
270 | ||
271 | // Buffer 0 | |
272 | assign skid_buf0_en = iob_ucb_stall_a1 & ~iob_ucb_stall; | |
273 | ||
274 | ncu_i2cbuf4_ni_ctl_msff_ctl_macro__en_1__width_1 vld_buf0_ff | |
275 | ( | |
276 | .scan_in(vld_buf0_ff_scanin), | |
277 | .scan_out(vld_buf0_ff_scanout), | |
278 | .dout (vld_buf0), | |
279 | .l1clk (l1clk), | |
280 | .en (skid_buf0_en), | |
281 | .din (vld_d1), | |
282 | .siclk(siclk), | |
283 | .soclk(soclk) | |
284 | ); | |
285 | ||
286 | ncu_i2cbuf4_ni_ctl_msff_ctl_macro__en_1__width_4 data_buf0_ff | |
287 | ( | |
288 | .scan_in(data_buf0_ff_scanin), | |
289 | .scan_out(data_buf0_ff_scanout), | |
290 | .dout (data_buf0[3:0]), | |
291 | .l1clk (l1clk), | |
292 | .en (skid_buf0_en), | |
293 | .din (data_d1[3:0]), | |
294 | .siclk(siclk), | |
295 | .soclk(soclk) | |
296 | ); | |
297 | ||
298 | // Buffer 1 | |
299 | ncu_i2cbuf4_ni_ctl_msff_ctl_macro__width_1 skid_buf1_en_ff | |
300 | ( | |
301 | .scan_in(skid_buf1_en_ff_scanin), | |
302 | .scan_out(skid_buf1_en_ff_scanout), | |
303 | .dout (skid_buf1_en), | |
304 | .l1clk (l1clk), | |
305 | .din (skid_buf0_en), | |
306 | .siclk(siclk), | |
307 | .soclk(soclk) | |
308 | ); | |
309 | ||
310 | ncu_i2cbuf4_ni_ctl_msff_ctl_macro__en_1__width_1 vld_buf1_ff | |
311 | ( | |
312 | .scan_in(vld_buf1_ff_scanin), | |
313 | .scan_out(vld_buf1_ff_scanout), | |
314 | .dout (vld_buf1), | |
315 | .l1clk (l1clk), | |
316 | .en (skid_buf1_en), | |
317 | .din (vld_d1), | |
318 | .siclk(siclk), | |
319 | .soclk(soclk) | |
320 | ); | |
321 | ||
322 | ncu_i2cbuf4_ni_ctl_msff_ctl_macro__en_1__width_4 data_buf1_ff | |
323 | ( | |
324 | .scan_in(data_buf1_ff_scanin), | |
325 | .scan_out(data_buf1_ff_scanout), | |
326 | .dout (data_buf1[3:0]), | |
327 | .l1clk (l1clk), | |
328 | .en (skid_buf1_en), | |
329 | .din (data_d1[3:0]), | |
330 | .siclk(siclk), | |
331 | .soclk(soclk) | |
332 | ); | |
333 | ||
334 | /************************************************************ | |
335 | * Mux between skid buffer and interface flop | |
336 | ************************************************************/ | |
337 | // Assertion: stall has to be deasserted for more than 1 cycle | |
338 | // ie time between two separate stalls has to be | |
339 | // at least two cycles. Otherwise, contents from | |
340 | // skid buffer will be lost. | |
341 | ||
342 | assign skid_buf0_sel = ~iob_ucb_stall_a1 & iob_ucb_stall; | |
343 | ||
344 | ncu_i2cbuf4_ni_ctl_msff_ctl_macro__width_1 skid_buf1_sel_ff | |
345 | ( | |
346 | .scan_in(skid_buf1_sel_ff_scanin), | |
347 | .scan_out(skid_buf1_sel_ff_scanout), | |
348 | .dout (skid_buf1_sel), | |
349 | .l1clk (l1clk), | |
350 | .din (skid_buf0_sel), | |
351 | .siclk(siclk), | |
352 | .soclk(soclk) | |
353 | ); | |
354 | ||
355 | assign vld_mux = skid_buf0_sel ? vld_buf0 : | |
356 | skid_buf1_sel ? vld_buf1 : vld_d1; | |
357 | ||
358 | assign data_mux[3:0] = skid_buf0_sel ? data_buf0[3:0] : | |
359 | skid_buf1_sel ? data_buf1[3:0] : data_d1[3:0]; | |
360 | ||
361 | /************************************************************ | |
362 | * Assemble inbound data | |
363 | ************************************************************/ | |
364 | // valid vector | |
365 | assign indata_vec_next[31:0] = {vld_mux, indata_vec[31:1]}; | |
366 | assign iob_ucb_stall_a1_= ~iob_ucb_stall_a1; | |
367 | ncu_i2cbuf4_ni_ctl_msff_ctl_macro__en_1__width_32 indata_vec_ff | |
368 | ( | |
369 | .scan_in(indata_vec_ff_scanin), | |
370 | .scan_out(indata_vec_ff_scanout), | |
371 | .dout (indata_vec[31:0]), | |
372 | .l1clk (l1clk), | |
373 | .en (iob_ucb_stall_a1_), | |
374 | .din (indata_vec_next[31:0]), | |
375 | .siclk(siclk), | |
376 | .soclk(soclk) | |
377 | ); | |
378 | ||
379 | // data buffer | |
380 | assign indata_buf_next[127:0] = {data_mux[3:0], indata_buf[127:4]}; | |
381 | ncu_i2cbuf4_ni_ctl_msff_ctl_macro__en_1__width_128 indata_buf_ff | |
382 | ( | |
383 | .scan_in(indata_buf_ff_scanin), | |
384 | .scan_out(indata_buf_ff_scanout), | |
385 | .dout (indata_buf[127:0]), | |
386 | .l1clk (l1clk), | |
387 | .en (iob_ucb_stall_a1_), | |
388 | .din (indata_buf_next[127:0]), | |
389 | .siclk(siclk), | |
390 | .soclk(soclk) | |
391 | ); | |
392 | ||
393 | // detect a new packet | |
394 | ncu_i2cbuf4_ni_ctl_msff_ctl_macro__en_1__width_1 indata_vec0_d1_ff | |
395 | ( | |
396 | .scan_in(indata_vec0_d1_ff_scanin), | |
397 | .scan_out(indata_vec0_d1_ff_scanout), | |
398 | .dout (indata_vec0_d1), | |
399 | .l1clk (l1clk), | |
400 | .en (iob_ucb_stall_a1_), | |
401 | .din (indata_vec[0]), | |
402 | .siclk(siclk), | |
403 | .soclk(soclk) | |
404 | ); | |
405 | ||
406 | assign indata_buf_vld = indata_vec[0] & ~indata_vec0_d1; | |
407 | //============================================================= | |
408 | //============================================================= | |
409 | //============================================================= | |
410 | ||
411 | ||
412 | ||
413 | ||
414 | /************************************************************ | |
415 | * Decode inbound packet type | |
416 | ************************************************************/ | |
417 | // non-interrupt packet | |
418 | assign req_ack_pending = indata_buf_vld; | |
419 | ||
420 | assign iob_ucb_stall_a1 = (req_ack_pending & req_ack_dbl_buf_full); | |
421 | ||
422 | /************************************************************ | |
423 | * Double buffer to store non-interrupt packets | |
424 | ************************************************************/ | |
425 | assign wr_req_ack_dbl_buf = req_ack_pending & ~req_ack_dbl_buf_full; | |
426 | ||
427 | // dbl_buf #(128) req_ack_dbl_buf ( | |
428 | // .clk(iol2clk), | |
429 | // .wr(wr_req_ack_dbl_buf), | |
430 | // .din(indata_buf[127:0]), | |
431 | // .rd(rd_req_ack_dbl_buf), | |
432 | // .dout(req_ack_obj[127:0]), | |
433 | // .vld(req_ack_vld), | |
434 | // .full(req_ack_dbl_buf_full)); | |
435 | //============================================================= | |
436 | //============================================================= | |
437 | //============================================================= | |
438 | ||
439 | // if both entries are empty, write to entry pointed to by the older pointer | |
440 | assign wr_buf0 = wr_req_ack_dbl_buf & (buf1_vld | (~buf0_vld & ~buf1_older)); | |
441 | assign wr_buf1 = wr_req_ack_dbl_buf & (buf0_vld | (~buf1_vld & buf1_older)); | |
442 | ||
443 | // read from the older entry | |
444 | assign rd_buf0 = rd_req_ack_dbl_buf & ~buf1_older; | |
445 | assign rd_buf1 = rd_req_ack_dbl_buf & buf1_older; | |
446 | ||
447 | // flip older pointer when an entry is read | |
448 | assign rd_buf = rd_req_ack_dbl_buf & (buf0_vld | buf1_vld); | |
449 | assign buf1_older_n = ~buf1_older ; | |
450 | ncu_i2cbuf4_ni_ctl_msff_ctl_macro__en_1__width_1 buf1_older_ff | |
451 | ( | |
452 | .scan_in(buf1_older_ff_scanin), | |
453 | .scan_out(buf1_older_ff_scanout), | |
454 | .dout (buf1_older), | |
455 | .l1clk (l1clk), | |
456 | .en (rd_buf), | |
457 | .din (buf1_older_n), | |
458 | .siclk(siclk), | |
459 | .soclk(soclk) | |
460 | ); | |
461 | ||
462 | // set valid bit for writes and reset for reads | |
463 | assign en_vld0 = wr_buf0 | rd_buf0; | |
464 | assign en_vld1 = wr_buf1 | rd_buf1; | |
465 | ||
466 | // the actual buffers | |
467 | ncu_i2cbuf4_ni_ctl_msff_ctl_macro__en_1__width_1 buf0_vld_ff | |
468 | ( | |
469 | .scan_in(buf0_vld_ff_scanin), | |
470 | .scan_out(buf0_vld_ff_scanout), | |
471 | .dout (buf0_vld), | |
472 | .l1clk (l1clk), | |
473 | .en (en_vld0), | |
474 | .din (wr_buf0), | |
475 | .siclk(siclk), | |
476 | .soclk(soclk) | |
477 | ); | |
478 | ||
479 | ncu_i2cbuf4_ni_ctl_msff_ctl_macro__en_1__width_1 buf1_vld_ff | |
480 | ( | |
481 | .scan_in(buf1_vld_ff_scanin), | |
482 | .scan_out(buf1_vld_ff_scanout), | |
483 | .dout (buf1_vld), | |
484 | .l1clk (l1clk), | |
485 | .en (en_vld1), | |
486 | .din (wr_buf1), | |
487 | .siclk(siclk), | |
488 | .soclk(soclk) | |
489 | ); | |
490 | ||
491 | ncu_i2cbuf4_ni_ctl_msff_ctl_macro__en_1__width_128 buf0_obj_ff | |
492 | ( | |
493 | .scan_in(buf0_obj_ff_scanin), | |
494 | .scan_out(buf0_obj_ff_scanout), | |
495 | .dout (buf0_obj[127:0]), | |
496 | .l1clk (l1clk), | |
497 | .en (wr_buf0), | |
498 | .din (indata_buf[127:0]), | |
499 | .siclk(siclk), | |
500 | .soclk(soclk) | |
501 | ); | |
502 | ||
503 | ncu_i2cbuf4_ni_ctl_msff_ctl_macro__en_1__width_128 buf1_obj_ff | |
504 | ( | |
505 | .scan_in(buf1_obj_ff_scanin), | |
506 | .scan_out(buf1_obj_ff_scanout), | |
507 | .dout (buf1_obj[127:0]), | |
508 | .l1clk (l1clk), | |
509 | .en (wr_buf1), | |
510 | .din (indata_buf[127:0]), | |
511 | .siclk(siclk), | |
512 | .soclk(soclk) | |
513 | ); | |
514 | ||
515 | // mux out the older entry | |
516 | assign req_ack_obj[127:0] = (buf1_older) ? buf1_obj[127:0] : buf0_obj[127:0] ; | |
517 | ||
518 | assign req_ack_vld = buf0_vld | buf1_vld; | |
519 | assign req_ack_dbl_buf_full = buf0_vld & buf1_vld; | |
520 | //============================================================= | |
521 | //============================================================= | |
522 | //============================================================= | |
523 | ||
524 | ||
525 | ||
526 | ||
527 | /**** adding clock header ****/ | |
528 | ncu_i2cbuf4_ni_ctl_l1clkhdr_ctl_macro clkgen ( | |
529 | .l2clk (iol2clk), | |
530 | .l1en (1'b1), | |
531 | .l1clk (l1clk), | |
532 | .pce_ov(pce_ov), | |
533 | .stop(stop), | |
534 | .se(se) | |
535 | ); | |
536 | ||
537 | /*** building tcu port ***/ | |
538 | assign siclk = tcu_aclk; | |
539 | assign soclk = tcu_bclk; | |
540 | assign se = tcu_scan_en; | |
541 | assign pce_ov = tcu_pce_ov; | |
542 | assign stop = tcu_clk_stop; | |
543 | ||
544 | // fixscan start: | |
545 | assign vld_d1_ff_scanin = scan_in ; | |
546 | assign data_d1_ff_scanin = vld_d1_ff_scanout ; | |
547 | assign stall_ff_scanin = data_d1_ff_scanout ; | |
548 | assign stall_d1_ff_scanin = stall_ff_scanout ; | |
549 | assign rdy0_ff_scanin = stall_d1_ff_scanout ; | |
550 | assign rdy1_ff_scanin = rdy0_ff_scanout ; | |
551 | assign vld_buf0_ff_scanin = rdy1_ff_scanout ; | |
552 | assign data_buf0_ff_scanin = vld_buf0_ff_scanout ; | |
553 | assign skid_buf1_en_ff_scanin = data_buf0_ff_scanout ; | |
554 | assign vld_buf1_ff_scanin = skid_buf1_en_ff_scanout ; | |
555 | assign data_buf1_ff_scanin = vld_buf1_ff_scanout ; | |
556 | assign skid_buf1_sel_ff_scanin = data_buf1_ff_scanout ; | |
557 | assign indata_vec_ff_scanin = skid_buf1_sel_ff_scanout ; | |
558 | assign indata_buf_ff_scanin = indata_vec_ff_scanout ; | |
559 | assign indata_vec0_d1_ff_scanin = indata_buf_ff_scanout ; | |
560 | assign buf1_older_ff_scanin = indata_vec0_d1_ff_scanout; | |
561 | assign buf0_vld_ff_scanin = buf1_older_ff_scanout ; | |
562 | assign buf1_vld_ff_scanin = buf0_vld_ff_scanout ; | |
563 | assign buf0_obj_ff_scanin = buf1_vld_ff_scanout ; | |
564 | assign buf1_obj_ff_scanin = buf0_obj_ff_scanout ; | |
565 | assign scan_out = buf1_obj_ff_scanout ; | |
566 | // fixscan end: | |
567 | endmodule // i2c_buf | |
568 | ||
569 | ||
570 | ||
571 | ||
572 | ||
573 | ||
574 | ||
575 | ||
576 | // any PARAMS parms go into naming of macro | |
577 | ||
578 | module ncu_i2cbuf4_ni_ctl_msff_ctl_macro__en_1__width_1 ( | |
579 | din, | |
580 | en, | |
581 | l1clk, | |
582 | scan_in, | |
583 | siclk, | |
584 | soclk, | |
585 | dout, | |
586 | scan_out); | |
587 | wire [0:0] fdin; | |
588 | ||
589 | input [0:0] din; | |
590 | input en; | |
591 | input l1clk; | |
592 | input scan_in; | |
593 | ||
594 | ||
595 | input siclk; | |
596 | input soclk; | |
597 | ||
598 | output [0:0] dout; | |
599 | output scan_out; | |
600 | assign fdin[0:0] = (din[0:0] & {1{en}}) | (dout[0:0] & ~{1{en}}); | |
601 | ||
602 | ||
603 | ||
604 | ||
605 | ||
606 | ||
607 | dff #(1) d0_0 ( | |
608 | .l1clk(l1clk), | |
609 | .siclk(siclk), | |
610 | .soclk(soclk), | |
611 | .d(fdin[0:0]), | |
612 | .si(scan_in), | |
613 | .so(scan_out), | |
614 | .q(dout[0:0]) | |
615 | ); | |
616 | ||
617 | ||
618 | ||
619 | ||
620 | ||
621 | ||
622 | ||
623 | ||
624 | ||
625 | ||
626 | ||
627 | ||
628 | endmodule | |
629 | ||
630 | ||
631 | ||
632 | ||
633 | ||
634 | ||
635 | ||
636 | ||
637 | ||
638 | ||
639 | ||
640 | ||
641 | ||
642 | // any PARAMS parms go into naming of macro | |
643 | ||
644 | module ncu_i2cbuf4_ni_ctl_msff_ctl_macro__en_1__width_4 ( | |
645 | din, | |
646 | en, | |
647 | l1clk, | |
648 | scan_in, | |
649 | siclk, | |
650 | soclk, | |
651 | dout, | |
652 | scan_out); | |
653 | wire [3:0] fdin; | |
654 | wire [2:0] so; | |
655 | ||
656 | input [3:0] din; | |
657 | input en; | |
658 | input l1clk; | |
659 | input scan_in; | |
660 | ||
661 | ||
662 | input siclk; | |
663 | input soclk; | |
664 | ||
665 | output [3:0] dout; | |
666 | output scan_out; | |
667 | assign fdin[3:0] = (din[3:0] & {4{en}}) | (dout[3:0] & ~{4{en}}); | |
668 | ||
669 | ||
670 | ||
671 | ||
672 | ||
673 | ||
674 | dff #(4) d0_0 ( | |
675 | .l1clk(l1clk), | |
676 | .siclk(siclk), | |
677 | .soclk(soclk), | |
678 | .d(fdin[3:0]), | |
679 | .si({scan_in,so[2:0]}), | |
680 | .so({so[2:0],scan_out}), | |
681 | .q(dout[3:0]) | |
682 | ); | |
683 | ||
684 | ||
685 | ||
686 | ||
687 | ||
688 | ||
689 | ||
690 | ||
691 | ||
692 | ||
693 | ||
694 | ||
695 | endmodule | |
696 | ||
697 | ||
698 | ||
699 | ||
700 | ||
701 | ||
702 | ||
703 | ||
704 | ||
705 | ||
706 | ||
707 | ||
708 | ||
709 | // any PARAMS parms go into naming of macro | |
710 | ||
711 | module ncu_i2cbuf4_ni_ctl_msff_ctl_macro__width_1 ( | |
712 | din, | |
713 | l1clk, | |
714 | scan_in, | |
715 | siclk, | |
716 | soclk, | |
717 | dout, | |
718 | scan_out); | |
719 | wire [0:0] fdin; | |
720 | ||
721 | input [0:0] din; | |
722 | input l1clk; | |
723 | input scan_in; | |
724 | ||
725 | ||
726 | input siclk; | |
727 | input soclk; | |
728 | ||
729 | output [0:0] dout; | |
730 | output scan_out; | |
731 | assign fdin[0:0] = din[0:0]; | |
732 | ||
733 | ||
734 | ||
735 | ||
736 | ||
737 | ||
738 | dff #(1) d0_0 ( | |
739 | .l1clk(l1clk), | |
740 | .siclk(siclk), | |
741 | .soclk(soclk), | |
742 | .d(fdin[0:0]), | |
743 | .si(scan_in), | |
744 | .so(scan_out), | |
745 | .q(dout[0:0]) | |
746 | ); | |
747 | ||
748 | ||
749 | ||
750 | ||
751 | ||
752 | ||
753 | ||
754 | ||
755 | ||
756 | ||
757 | ||
758 | ||
759 | endmodule | |
760 | ||
761 | ||
762 | ||
763 | ||
764 | ||
765 | ||
766 | ||
767 | ||
768 | ||
769 | ||
770 | ||
771 | ||
772 | ||
773 | // any PARAMS parms go into naming of macro | |
774 | ||
775 | module ncu_i2cbuf4_ni_ctl_msff_ctl_macro__en_1__width_32 ( | |
776 | din, | |
777 | en, | |
778 | l1clk, | |
779 | scan_in, | |
780 | siclk, | |
781 | soclk, | |
782 | dout, | |
783 | scan_out); | |
784 | wire [31:0] fdin; | |
785 | wire [30:0] so; | |
786 | ||
787 | input [31:0] din; | |
788 | input en; | |
789 | input l1clk; | |
790 | input scan_in; | |
791 | ||
792 | ||
793 | input siclk; | |
794 | input soclk; | |
795 | ||
796 | output [31:0] dout; | |
797 | output scan_out; | |
798 | assign fdin[31:0] = (din[31:0] & {32{en}}) | (dout[31:0] & ~{32{en}}); | |
799 | ||
800 | ||
801 | ||
802 | ||
803 | ||
804 | ||
805 | dff #(32) d0_0 ( | |
806 | .l1clk(l1clk), | |
807 | .siclk(siclk), | |
808 | .soclk(soclk), | |
809 | .d(fdin[31:0]), | |
810 | .si({scan_in,so[30:0]}), | |
811 | .so({so[30:0],scan_out}), | |
812 | .q(dout[31:0]) | |
813 | ); | |
814 | ||
815 | ||
816 | ||
817 | ||
818 | ||
819 | ||
820 | ||
821 | ||
822 | ||
823 | ||
824 | ||
825 | ||
826 | endmodule | |
827 | ||
828 | ||
829 | ||
830 | ||
831 | ||
832 | ||
833 | ||
834 | ||
835 | ||
836 | ||
837 | ||
838 | ||
839 | ||
840 | // any PARAMS parms go into naming of macro | |
841 | ||
842 | module ncu_i2cbuf4_ni_ctl_msff_ctl_macro__en_1__width_128 ( | |
843 | din, | |
844 | en, | |
845 | l1clk, | |
846 | scan_in, | |
847 | siclk, | |
848 | soclk, | |
849 | dout, | |
850 | scan_out); | |
851 | wire [127:0] fdin; | |
852 | wire [126:0] so; | |
853 | ||
854 | input [127:0] din; | |
855 | input en; | |
856 | input l1clk; | |
857 | input scan_in; | |
858 | ||
859 | ||
860 | input siclk; | |
861 | input soclk; | |
862 | ||
863 | output [127:0] dout; | |
864 | output scan_out; | |
865 | assign fdin[127:0] = (din[127:0] & {128{en}}) | (dout[127:0] & ~{128{en}}); | |
866 | ||
867 | ||
868 | ||
869 | ||
870 | ||
871 | ||
872 | dff #(128) d0_0 ( | |
873 | .l1clk(l1clk), | |
874 | .siclk(siclk), | |
875 | .soclk(soclk), | |
876 | .d(fdin[127:0]), | |
877 | .si({scan_in,so[126:0]}), | |
878 | .so({so[126:0],scan_out}), | |
879 | .q(dout[127:0]) | |
880 | ); | |
881 | ||
882 | ||
883 | ||
884 | ||
885 | ||
886 | ||
887 | ||
888 | ||
889 | ||
890 | ||
891 | ||
892 | ||
893 | endmodule | |
894 | ||
895 | ||
896 | ||
897 | ||
898 | ||
899 | ||
900 | ||
901 | ||
902 | ||
903 | ||
904 | ||
905 | ||
906 | ||
907 | // any PARAMS parms go into naming of macro | |
908 | ||
909 | module ncu_i2cbuf4_ni_ctl_l1clkhdr_ctl_macro ( | |
910 | l2clk, | |
911 | l1en, | |
912 | pce_ov, | |
913 | stop, | |
914 | se, | |
915 | l1clk); | |
916 | ||
917 | ||
918 | input l2clk; | |
919 | input l1en; | |
920 | input pce_ov; | |
921 | input stop; | |
922 | input se; | |
923 | output l1clk; | |
924 | ||
925 | ||
926 | ||
927 | ||
928 | ||
929 | cl_sc1_l1hdr_8x c_0 ( | |
930 | ||
931 | ||
932 | .l2clk(l2clk), | |
933 | .pce(l1en), | |
934 | .l1clk(l1clk), | |
935 | .se(se), | |
936 | .pce_ov(pce_ov), | |
937 | .stop(stop) | |
938 | ); | |
939 | ||
940 | ||
941 | ||
942 | endmodule | |
943 | ||
944 | ||
945 | ||
946 | ||
947 | ||
948 | ||
949 | ||
950 |