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1 | /* |
2 | * ========== Copyright Header Begin ========================================== | |
3 | * | |
4 | * OpenSPARC T2 Processor File: ffu_fpaddsub_n2.s | |
5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
7 | * | |
8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; version 2 of the License. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | * For the avoidance of doubt, and except that if any non-GPL license | |
24 | * choice is available it will apply instead, Sun elects to use only | |
25 | * the General Public License version 2 (GPLv2) at this time for any | |
26 | * software where a choice of GPL license versions is made | |
27 | * available with the language indicating that GPLv2 or any later version | |
28 | * may be used, or where a choice of which version of the GPL is applied is | |
29 | * otherwise unspecified. | |
30 | * | |
31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
32 | * CA 95054 USA or visit www.sun.com if you need additional information or | |
33 | * have any questions. | |
34 | * | |
35 | * | |
36 | * ========== Copyright Header End ============================================ | |
37 | */ | |
38 | #define ENABLE_T0_Fp_disabled_0x20 | |
39 | ||
40 | #define MAIN_PAGE_HV_ALSO | |
41 | #define MAIN_PAGE_NUCLEUS_ALSO | |
42 | ||
43 | #define ENABLE_T0_Clean_Window_0x24 | |
44 | #define ENABLE_T0_Corrected_ECC_error_0x63 | |
45 | #define ENABLE_T0_Data_Access_Exception_0x30 | |
46 | #define ENABLE_T0_Data_access_error_0x32 | |
47 | #define ENABLE_T0_Division_By_Zero_0x28 | |
48 | #define ENABLE_T0_Fp_disabled_0x20 | |
49 | #define ENABLE_T0_Fp_exception_ieee_754_0x21 | |
50 | #define ENABLE_T0_Fp_exception_other_0x22 | |
51 | #define ENABLE_T0_Illegal_instruction_0x10 | |
52 | #define ENABLE_T0_Instruction_Access_MMU_Miss_0x09 | |
53 | #define ENABLE_T0_Instruction_access_error_0x0a | |
54 | #define ENABLE_T0_Instruction_access_exception_0x08 | |
55 | #define ENABLE_T0_Lddf_Mem_Address_Not_Aligned_0x35 | |
56 | #define ENABLE_T0_Mem_Address_Not_Aligned_0x34 | |
57 | #define ENABLE_T0_Privileged_Action_0x37 | |
58 | #define ENABLE_T0_Privileged_opcode_0x11 | |
59 | #define ENABLE_T0_Stdf_Mem_Address_Not_Aligned_0x36 | |
60 | #define ENABLE_T0_Tag_Overflow_0x23 | |
61 | #define ENABLE_T0_Unimplemented_LDD_0x12 | |
62 | #define ENABLE_T0_Unimplemented_STD_0x13 | |
63 | #define ENABLE_T0_data_access_protection_0x6c | |
64 | #define ENABLE_T0_fast_data_access_MMU_miss_0x68 | |
65 | #define ENABLE_T0_fast_instr_access_MMU_miss_0x64 | |
66 | ||
67 | ||
68 | #include "hboot.s" | |
69 | ||
70 | .global sam_fast_immu_miss | |
71 | .global sam_fast_dmmu_miss | |
72 | ||
73 | ||
74 | /****************START OF TEST*********************************************/ | |
75 | ||
76 | ||
77 | .text | |
78 | .global main | |
79 | ALIGN_PAGE_8K | |
80 | user_text_start: | |
81 | main: | |
82 | ||
83 | wr %g0, 0x4, %fprs /* make sure fef is 1 */ | |
84 | ||
85 | set data1, %g1 | |
86 | set exp_result_start, %g3 | |
87 | set store_result, %g2 | |
88 | mov %g2, %g4 | |
89 | mov 0x0, %l0 | |
90 | ||
91 | ldd [%g1], %f0 !%f0 =0 | |
92 | ldd [%g1+8], %f2 | |
93 | ldd [%g1+16], %f4 | |
94 | ldd [%g1+24], %f6 | |
95 | ||
96 | !fpadd with zero is same as fmov | |
97 | !all combinations of even and odd registers as operands | |
98 | tst_0s: | |
99 | fpadd16s %f0, %f2, %f30 !0+xxxx=xxxx %even %even %even | |
100 | fpsub16s %f2, %f0, %f31 !xxxx-0=xxxx %even %even %odd | |
101 | fcmps %f30, %f31 | |
102 | fbe tst_0 | |
103 | nop | |
104 | ta BAD_TRAP | |
105 | ||
106 | tst_0: | |
107 | fmovd %f0, %f10 | |
108 | fpadd16 %f10, %f2, %f30 !0 + xxxx = xxxx | |
109 | fpsub16 %f2, %f10, %f32 !xxxx-0=xxxx | |
110 | fcmpd %f30, %f32 | |
111 | fbe tst_1s | |
112 | nop | |
113 | ta BAD_TRAP | |
114 | tst_1s: | |
115 | fpadd32s %f0, %f3, %f30 !0 + xxxx xxxx = xxxx xxxx %even %odd %even | |
116 | fpsub32s %f3, %f0, %f31 !xxxx xxxx - 0 = xxxx xxxx %odd %even %odd | |
117 | fcmps %f30, %f31 | |
118 | fbe tst_1 | |
119 | nop | |
120 | ta BAD_TRAP | |
121 | ||
122 | tst_1: | |
123 | fpadd32 %f10, %f6, %f26 !0 + xxxx xxxx = xxxx xxxx | |
124 | fpsub32 %f6, %f10, %f28 !xxxx xxxx - 0 = xxxx xxxx | |
125 | fcmpd %f26, %f28 | |
126 | fbe tst_2s | |
127 | nop | |
128 | ta BAD_TRAP | |
129 | tst_2s: | |
130 | fpadd16s %f1, %f3, %f27 !0 + xxxx = xxxx %odd %odd %odd | |
131 | fpsub16s %f3, %f1, %f28 !xxxx - 0 = xxxx %odd %odd %even | |
132 | fcmps %f27, %f28 | |
133 | fbe tst_3 | |
134 | nop | |
135 | ta BAD_TRAP | |
136 | ||
137 | ||
138 | !16-bit addition operation. Carry from lower 16-bit segement should | |
139 | !not propagate to upper 16-bit segment. | |
140 | tst_3: | |
141 | fpadd16s %f2, %f3, %f30 !5566+aa99=ffff, ffff+1=10000 | |
142 | fpadd32s %f2, %f3, %f31 !5566+aa99+1(carry=1)=10000, ffff+1=10000 | |
143 | std %f30, [%g2] !store double, dw of %f30 ( inc. %31 ) is stored | |
144 | tst_4: | |
145 | fpsub16s %f4, %f5, %f30 !rs1 < rs2 4321-5432 7bcd-7df2 | |
146 | fpsub32s %f4, %f5, %f31 ! 43217bcd - 54327df2 | |
147 | std %f30, [%g2+8] | |
148 | tst_4a: | |
149 | fpsub16s %f5, %f4, %f30 !rs1 > rs2 5432-4321 7df2-7bcd | |
150 | fpsub32s %f5, %f4, %f31 ! 54327df2 - 43217bcd | |
151 | std %f30, [%g2+16] | |
152 | tst_4b: | |
153 | fnegs %f5, %f16 | |
154 | fpsub16s %f4, %f16, %f30 !rs1 < rs2 4321 - (-5432) | |
155 | fpsub32s %f4, %f16, %f31 | |
156 | std %f30, [%g2+24] | |
157 | tst_4c: | |
158 | fpsub16s %f16, %f4, %f30 !rs1 < rs2 | |
159 | fpsub32s %f16, %f4, %f31 | |
160 | std %f30, [%g2+32] | |
161 | mov 5, %i0 | |
162 | add %g2, 40, %g2 | |
163 | ||
164 | ||
165 | !no carry or borrow from any 16-bit or 32-bit segement | |
166 | fpaddsub1: | |
167 | set data3, %g1 | |
168 | ldd [%g1], %f0 | |
169 | mov 17, %i1 | |
170 | add %g1, 0x8, %g1 | |
171 | ||
172 | !all combination of carry and borrow | |
173 | tst_5: | |
174 | ldd [%g1], %f2 | |
175 | fpadd16 %f0, %f2, %f32 | |
176 | fpadd32 %f0, %f2, %f34 | |
177 | fpsub16 %f2, %f0, %f36 | |
178 | fpsub32 %f2, %f0, %f38 | |
179 | fpadd16s %f0, %f2, %f28 | |
180 | fpadd32s %f0, %f2, %f29 | |
181 | fpsub16s %f2, %f0, %f30 | |
182 | fpsub32s %f2, %f0, %f31 | |
183 | std %f32, [%g2+0] | |
184 | std %f34, [%g2+8] | |
185 | std %f36, [%g2+16] | |
186 | std %f38, [%g2+24] | |
187 | std %f28, [%g2+32] | |
188 | std %f30, [%g2+40] | |
189 | add %i0, 0x6, %i0 | |
190 | add %g2, 48, %g2 | |
191 | sub %i1, 1, %i1 | |
192 | brnz,a %i1,tst_5 | |
193 | add %g1, 0x8, %g1 | |
194 | ||
195 | !combination of positive and negative segment [4+1] | |
196 | fpaddsub: | |
197 | set data2, %g1 | |
198 | ||
199 | ldd [%g1], %f2 | |
200 | ldd [%g1+16], %f4 | |
201 | ldd [%g1+24], %f6 | |
202 | ||
203 | !fpadd double carry from all four 16-bit segments | |
204 | tst_8: | |
205 | fpadd16 %f2, %f4, %f32 | |
206 | std %f32, [%g2+0] | |
207 | tst_8a: | |
208 | fpadd32 %f4, %f2, %f32 | |
209 | std %f32, [%g2+8] | |
210 | ||
211 | !fpadd double no carry from 16-bit segments | |
212 | tst_9: | |
213 | fpadd16 %f4, %f6, %f32 | |
214 | std %f32, [%g2+16] | |
215 | tst_9a: | |
216 | fpadd32 %f6, %f4, %f32 | |
217 | std %f32, [%g2+24] | |
218 | tst_10: | |
219 | fnegs %f2, %f18 | |
220 | fnegs %f3, %f19 | |
221 | ! fpmerge %f2, %f3, %f20 | |
222 | fpsub16 %f2, %f4, %f32 | |
223 | fpadd16 %f2, %f18, %f30 !rs1 < rs2 | |
224 | fpadd32 %f2, %f18, %f34 !rs1 < rs2 | |
225 | std %f32, [%g2+32] | |
226 | std %f30, [%g2+40] | |
227 | std %f34, [%g2+48] | |
228 | add %i0, 7, %i0 | |
229 | !final_check | |
230 | final_check: | |
231 | ldx [%g3+%l0], %o0 | |
232 | ldx [%g4+%l0], %o1 | |
233 | sub %o0, %o1, %o1 | |
234 | brz,a %o1, 1f !why 1f? | |
235 | sub %i0, 1, %i0 | |
236 | ta BAD_TRAP | |
237 | 1: brnz,a %i0, final_check | |
238 | add %l0, 0x8, %l0 | |
239 | ||
240 | good_end: ta GOOD_TRAP | |
241 | ||
242 | user_text_end: | |
243 | ||
244 | .seg "data" | |
245 | ||
246 | ALIGN_PAGE_8K | |
247 | ||
248 | user_data_start: | |
249 | ||
250 | .align 8 | |
251 | data1: | |
252 | .word 0x0, 0x0 | |
253 | .word 0x5566ffff, 0xaa990001 | |
254 | .word 0x43217bcd, 0x54327df2 | |
255 | .word 0x6bcdb436, 0x0 | |
256 | ||
257 | .align 8 | |
258 | data2: | |
259 | .word 0x3f804135, 0x408040a0 | |
260 | .word 0x3f80ceba, 0x4182df5e | |
261 | .word 0x456031fe, 0x401f5142 | |
262 | ||
263 | .align 8 | |
264 | data3: | |
265 | .word 0x789a643b, 0x58ac6fe3 | |
266 | .word 0x12344321, 0x21345421 | |
267 | .word 0x43223122, 0x5753ae23 | |
268 | .word 0x72343b64, 0xb8a31e23 | |
269 | .word 0x698a4567, 0xb7a3aebd | |
270 | .word 0x7f75d98f, 0x34562103 | |
271 | .word 0x7634befd, 0x4532efff | |
272 | .word 0x0145f000, 0xb3333333 | |
273 | .word 0x3232f0f0, 0xf0f0f0f0 | |
274 | .word 0x89894545, 0x34534534 | |
275 | .word 0xa5a55a5a, 0x5b5bc3c3 | |
276 | .word 0xb4b44b4b, 0xa5a53c3c | |
277 | .word 0xc3c33c3c, 0xd2d29696 | |
278 | .word 0xd2d29697, 0x4b4b2d2d | |
279 | .word 0xd2d29697, 0x4b4b2ddd | |
280 | .word 0xe1e1a5a5, 0x2d4ddd2d | |
281 | .word 0xe444cc53, 0xe1d3f0d2 | |
282 | .word 0xf000e111, 0xd222c333 | |
283 | ||
284 | ||
285 | .align 8 | |
286 | exp_result_start: | |
287 | .word 0xffff0000, 0x00000000, 0xeeeffddb, 0xeeeefddb | |
288 | .word 0x11110225, 0x11110225, 0x6eeffddb, 0x6eeefddb | |
289 | .word 0x91110225, 0x91110225, 0x8acea75c, 0x79e0c404 | |
290 | .word 0x8acea75c, 0x79e0c404, 0x999adee6, 0xc888e43e | |
291 | .word 0x9999dee6, 0xc887e43e, 0x8acea75c, 0x8acea75c | |
292 | .word 0x999adee6, 0x9999dee6, 0xbbbc955d, 0xafff1e06 | |
293 | .word 0xbbbc955d, 0xb0001e06, 0xca88cce7, 0xfea73e40 | |
294 | .word 0xca87cce7, 0xfea73e40, 0xbbbc955d, 0xbbbc955d | |
295 | .word 0xca88cce7, 0xca87cce7, 0xeace9f9f, 0x114f8e06 | |
296 | .word 0xeace9f9f, 0x114f8e06, 0xf99ad729, 0x5ff7ae40 | |
297 | .word 0xf999d729, 0x5ff6ae40, 0xeace9f9f, 0xeace9f9f | |
298 | .word 0xf99ad729, 0xf999d729, 0xe224a9a2, 0x104f1ea0 | |
299 | .word 0xe224a9a2, 0x10501ea0, 0xf0f0e12c, 0x5ef73eda | |
300 | .word 0xf0efe12c, 0x5ef73eda, 0xe224a9a2, 0xe224a9a2 | |
301 | .word 0xf0f0e12c, 0xf0efe12c, 0xf80f3dca, 0x8d0290e6 | |
302 | .word 0xf8103dca, 0x8d0290e6, 0x06db7554, 0xdbaab120 | |
303 | .word 0x06db7554, 0xdba9b120, 0xf80f3dca, 0xf8103dca | |
304 | .word 0x06db7554, 0x06db7554, 0xeece2338, 0x9dde5fe2 | |
305 | .word 0xeecf2338, 0x9ddf5fe2, 0xfd9a5ac2, 0xec86801c | |
306 | .word 0xfd9a5ac2, 0xec86801c, 0xeece2338, 0xeecf2338 | |
307 | .word 0xfd9a5ac2, 0xfd9a5ac2, 0x79df543b, 0x0bdfa316 | |
308 | .word 0x79e0543b, 0x0bdfa316, 0x88ab8bc5, 0x5a87c350 | |
309 | .word 0x88ab8bc5, 0x5a86c350, 0x79df543b, 0x79e0543b | |
310 | .word 0x88ab8bc5, 0x88ab8bc5, 0xaacc552b, 0x499c60d3 | |
311 | .word 0xaacd552b, 0x499d60d3, 0xb9988cb5, 0x9844810d | |
312 | .word 0xb9988cb5, 0x9844810d, 0xaacc552b, 0xaacd552b | |
313 | .word 0xb9988cb5, 0xb9988cb5, 0x0223a980, 0x8cffb517 | |
314 | .word 0x0223a980, 0x8cffb517, 0x10efe10a, 0xdba7d551 | |
315 | .word 0x10eee10a, 0xdba6d551, 0x0223a980, 0x0223a980 | |
316 | .word 0x10efe10a, 0x10eee10a, 0x1e3fbe95, 0xb40733a6 | |
317 | .word 0x1e3fbe95, 0xb40833a6, 0x2d0bf61f, 0x02af53e0 | |
318 | .word 0x2d0af61f, 0x02af53e0, 0x1e3fbe95, 0x1e3fbe95 | |
319 | .word 0x2d0bf61f, 0x2d0af61f, 0x2d4eaf86, 0xfe51ac1f | |
320 | .word 0x2d4eaf86, 0xfe51ac1f, 0x3c1ae710, 0x4cf9cc59 | |
321 | .word 0x3c19e710, 0x4cf8cc59, 0x2d4eaf86, 0x2d4eaf86 | |
322 | .word 0x3c1ae710, 0x3c19e710, 0x3c5da077, 0x2b7e0679 | |
323 | .word 0x3c5da077, 0x2b7f0679, 0x4b29d801, 0x7a2626b3 | |
324 | .word 0x4b28d801, 0x7a2626b3, 0x3c5da077, 0x3c5da077 | |
325 | .word 0x4b29d801, 0x4b28d801, 0x4b6cfad2, 0xa3f79d10 | |
326 | .word 0x4b6cfad2, 0xa3f79d10, 0x5a38325c, 0xf29fbd4a | |
327 | .word 0x5a38325c, 0xf29ebd4a, 0x4b6cfad2, 0x4b6cfad2 | |
328 | .word 0x5a38325c, 0x5a38325c, 0x4b6cfad2, 0xa3f79dc0 | |
329 | .word 0x4b6cfad2, 0xa3f79dc0, 0x5a38325c, 0xf29fbdfa | |
330 | .word 0x5a38325c, 0xf29ebdfa, 0x4b6cfad2, 0x4b6cfad2 | |
331 | .word 0x5a38325c, 0x5a38325c, 0x5a7b09e0, 0x85f94d10 | |
332 | .word 0x5a7c09e0, 0x85fa4d10, 0x6947416a, 0xd4a16d4a | |
333 | .word 0x6947416a, 0xd4a16d4a, 0x5a7b09e0, 0x5a7c09e0 | |
334 | .word 0x6947416a, 0x6947416a, 0x5cde308e, 0x3a7f60b5 | |
335 | .word 0x5cdf308e, 0x3a8060b5, 0x6baa6818, 0x892780ef | |
336 | .word 0x6baa6818, 0x892780ef, 0x5cde308e, 0x5cdf308e | |
337 | .word 0x6baa6818, 0x6baa6818, 0x689a454c, 0x2ace3316 | |
338 | .word 0x689b454c, 0x2acf3316, 0x77667cd6, 0x79765350 | |
339 | .word 0x77667cd6, 0x79765350, 0x689a454c, 0x689b454c | |
340 | .word 0x77667cd6, 0x77667cd6, 0x84e07333, 0x809f91e2 | |
341 | .word 0x84e07333, 0x809f91e2, 0xbdfa9639, 0x98cbc125 | |
342 | .word 0xbdfa9639, 0x98cbc125, 0xfa200f37, 0x0061ef5e | |
343 | .word 0xff00826a, 0x01008140, 0xff00826a, 0x01008140 | |
344 | ||
345 | ||
346 | .align 8 | |
347 | store_result: | |
348 | ||
349 | ||
350 | user_data_end: |