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1 | /* |
2 | * ========== Copyright Header Begin ========================================== | |
3 | * | |
4 | * OpenSPARC T2 Processor File: PCIeDMA0LenRd.s | |
5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
7 | * | |
8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; version 2 of the License. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | * For the avoidance of doubt, and except that if any non-GPL license | |
24 | * choice is available it will apply instead, Sun elects to use only | |
25 | * the General Public License version 2 (GPLv2) at this time for any | |
26 | * software where a choice of GPL license versions is made | |
27 | * available with the language indicating that GPLv2 or any later version | |
28 | * may be used, or where a choice of which version of the GPL is applied is | |
29 | * otherwise unspecified. | |
30 | * | |
31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
32 | * CA 95054 USA or visit www.sun.com if you need additional information or | |
33 | * have any questions. | |
34 | * | |
35 | * | |
36 | * ========== Copyright Header End ============================================ | |
37 | */ | |
38 | #define ENABLE_PCIE_LINK_TRAINING | |
39 | #define MAIN_PAGE_HV_ALSO | |
40 | ||
41 | #include "hboot.s" | |
42 | #include "peu_defines.h" | |
43 | ||
44 | #define MEM32_RD_ADDR mpeval(N2_PCIE_BASE_ADDR + MEM32_OFFSET_BASE_REG_DATA) | |
45 | ||
46 | #define DMA_DATA_ADDR 0x0000000123456000 | |
47 | #define SADDR 0xfffc000123456000 | |
48 | #define EADDR 0xfffc000123456800 | |
49 | ||
50 | /************************************************************************ | |
51 | Test case code start | |
52 | ************************************************************************/ | |
53 | .text | |
54 | .global main | |
55 | ||
56 | main: | |
57 | ta T_CHANGE_HPRIV | |
58 | nop | |
59 | ||
60 | ! select a MEM32 address in PCI address range | |
61 | ||
62 | setx MEM32_RD_ADDR, %g1, %g2 | |
63 | ||
64 | UE1: setx 0x123456789abcdef0, %g1, %g3 | |
65 | ! $EV trig_pc_d(1, @VA(.MAIN.UE1)) -> EnablePCIeIgCmd ("DMARD", SADDR, EADDR, "64'h0",1,*,*) | |
66 | stx %g3, [%g2+0] ! MEM32 PIO Write | |
67 | UE2: setx 0x23456789abcdef01, %g1, %g4 | |
68 | ! $EV trig_pc_d(1, @VA(.MAIN.UE2)) -> EnablePCIeIgCmd ("DMARD", SADDR, EADDR, "64'h0",1,*,*) | |
69 | stx %g4, [%g2+8] ! MEM32 PIO Write | |
70 | UE3: setx 0x3456789abcdef012, %g1, %g5 | |
71 | ! $EV trig_pc_d(1, @VA(.MAIN.UE3)) -> EnablePCIeIgCmd ("DMARD", SADDR, EADDR, "64'h0",1,*,*) | |
72 | stx %g5, [%g2+16] ! MEM32 PIO Write | |
73 | ldx [%g2+0], %l2 ! MEM32 PIO READ | |
74 | UE4: setx 0x456789abcdef0123, %g1, %g6 | |
75 | ! $EV trig_pc_d(1, @VA(.MAIN.UE4)) -> EnablePCIeIgCmd ("DMARD", SADDR, EADDR, "64'h0",1,*,*) | |
76 | stx %g6, [%g2+24] ! MEM32 PIO Write | |
77 | nop; nop; nop; nop; nop; nop; nop; nop; | |
78 | ldx [%g2+8], %l2 ! MEM32 PIO READ | |
79 | nop; nop; nop; nop; nop; nop; nop; nop; | |
80 | ldx [%g2+16], %l2 ! MEM32 PIO READ | |
81 | ldx [%g2+24], %l2 ! MEM32 PIO READ | |
82 | ldx [%g2+32], %l2 ! MEM32 PIO READ | |
83 | ||
84 | test_passed: | |
85 | EXIT_GOOD | |
86 | ||
87 | ||
88 | test_failed: | |
89 | EXIT_BAD | |
90 | ||
91 | ||
92 | ||
93 | /************************************************************************ | |
94 | Test case data start | |
95 | ************************************************************************/ | |
96 | ||
97 | SECTION .DATA DATA_VA=DMA_DATA_ADDR | |
98 | attr_data { | |
99 | Name = .DATA, | |
100 | hypervisor, | |
101 | compressimage | |
102 | } | |
103 | .data | |
104 | init_mem(0x0101010201030104, 128, 8, +, 0, +, 0x0004000400040004) | |
105 | /************************************************************************/ |