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1 | // ========== Copyright Header Begin ========================================== |
2 | // | |
3 | // OpenSPARC T2 Processor File: ncu_i2cbufsii_ctl.v | |
4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
6 | // | |
7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
8 | // | |
9 | // This program is free software; you can redistribute it and/or modify | |
10 | // it under the terms of the GNU General Public License as published by | |
11 | // the Free Software Foundation; version 2 of the License. | |
12 | // | |
13 | // This program is distributed in the hope that it will be useful, | |
14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | // GNU General Public License for more details. | |
17 | // | |
18 | // You should have received a copy of the GNU General Public License | |
19 | // along with this program; if not, write to the Free Software | |
20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | // | |
22 | // For the avoidance of doubt, and except that if any non-GPL license | |
23 | // choice is available it will apply instead, Sun elects to use only | |
24 | // the General Public License version 2 (GPLv2) at this time for any | |
25 | // software where a choice of GPL license versions is made | |
26 | // available with the language indicating that GPLv2 or any later version | |
27 | // may be used, or where a choice of which version of the GPL is applied is | |
28 | // otherwise unspecified. | |
29 | // | |
30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
32 | // have any questions. | |
33 | // | |
34 | // ========== Copyright Header End ============================================ | |
35 | `define RF_RDEN_OFFSTATE 1'b1 | |
36 | ||
37 | //==================================== | |
38 | `define NCU_INTMANRF_DEPTH 128 | |
39 | `define NCU_INTMANRF_DATAWIDTH 16 | |
40 | `define NCU_INTMANRF_ADDRWIDTH 7 | |
41 | //==================================== | |
42 | ||
43 | //==================================== | |
44 | `define NCU_MONDORF_DEPTH 64 | |
45 | `define NCU_MONDORF_DATAWIDTH 72 | |
46 | `define NCU_MONDORF_ADDRWIDTH 6 | |
47 | //==================================== | |
48 | ||
49 | //==================================== | |
50 | `define NCU_CPUBUFRF_DEPTH 32 | |
51 | `define NCU_CPUBUFRF_DATAWIDTH 144 | |
52 | `define NCU_CPUBUFRF_ADDRWIDTH 5 | |
53 | //==================================== | |
54 | ||
55 | //==================================== | |
56 | `define NCU_IOBUFRF_DEPTH 32 | |
57 | `define NCU_IOBUFRF_DATAWIDTH 144 | |
58 | `define NCU_IOBUFRF_ADDRWIDTH 5 | |
59 | //==================================== | |
60 | ||
61 | //==================================== | |
62 | `define NCU_IOBUF1RF_DEPTH 32 | |
63 | `define NCU_IOBUF1RF_DATAWIDTH 32 | |
64 | `define NCU_IOBUF1RF_ADDRWIDTH 5 | |
65 | //==================================== | |
66 | ||
67 | //==================================== | |
68 | `define NCU_INTBUFRF_DEPTH 32 | |
69 | `define NCU_INTBUFRF_DATAWIDTH 144 | |
70 | `define NCU_INTBUFRF_ADDRWIDTH 5 | |
71 | //==================================== | |
72 | ||
73 | //== fix me : need to remove when warm // | |
74 | //== becomes available // | |
75 | `define WMR_LENGTH 10'd999 | |
76 | `define WMR_LENGTH_P1 10'd1000 | |
77 | ||
78 | //// NCU CSR_MAN address 80_0000_xxxx //// | |
79 | `define NCU_CSR_MAN 16'h0000 | |
80 | `define NCU_CREG_INTMAN 16'h0000 | |
81 | //`define NCU_CREG_INTVECDISP 16'h0800 | |
82 | `define NCU_CREG_MONDOINVEC 16'h0a00 | |
83 | `define NCU_CREG_SERNUM 16'h1000 | |
84 | `define NCU_CREG_FUSESTAT 16'h1008 | |
85 | `define NCU_CREG_COREAVAIL 16'h1010 | |
86 | `define NCU_CREG_BANKAVAIL 16'h1018 | |
87 | `define NCU_CREG_BANK_ENABLE 16'h1020 | |
88 | `define NCU_CREG_BANK_ENABLE_STATUS 16'h1028 | |
89 | `define NCU_CREG_L2_HASH_ENABLE 16'h1030 | |
90 | `define NCU_CREG_L2_HASH_ENABLE_STATUS 16'h1038 | |
91 | ||
92 | ||
93 | `define NCU_CREG_MEM32_BASE 16'h2000 | |
94 | `define NCU_CREG_MEM32_MASK 16'h2008 | |
95 | `define NCU_CREG_MEM64_BASE 16'h2010 | |
96 | `define NCU_CREG_MEM64_MASK 16'h2018 | |
97 | `define NCU_CREG_IOCON_BASE 16'h2020 | |
98 | `define NCU_CREG_IOCON_MASK 16'h2028 | |
99 | `define NCU_CREG_MMUFSH 16'h2030 | |
100 | ||
101 | `define NCU_CREG_ESR 16'h3000 | |
102 | `define NCU_CREG_ELE 16'h3008 | |
103 | `define NCU_CREG_EIE 16'h3010 | |
104 | `define NCU_CREG_EJR 16'h3018 | |
105 | `define NCU_CREG_FEE 16'h3020 | |
106 | `define NCU_CREG_PER 16'h3028 | |
107 | `define NCU_CREG_SIISYN 16'h3030 | |
108 | `define NCU_CREG_NCUSYN 16'h3038 | |
109 | `define NCU_CREG_SCKSEL 16'h3040 | |
110 | `define NCU_CREG_DBGTRIG_EN 16'h4000 | |
111 | ||
112 | //// NUC CSR_MONDO address 80_0004_xxxx //// | |
113 | `define NCU_CSR_MONDO 16'h0004 | |
114 | `define NCU_CREG_MDATA0 16'h0000 | |
115 | `define NCU_CREG_MDATA1 16'h0200 | |
116 | `define NCU_CREG_MDATA0_ALIAS 16'h0400 | |
117 | `define NCU_CREG_MDATA1_ALIAS 16'h0600 | |
118 | `define NCU_CREG_MBUSY 16'h0800 | |
119 | `define NCU_CREG_MBUSY_ALIAS 16'h0a00 | |
120 | ||
121 | ||
122 | ||
123 | // ASI shared reg 90_xxxx_xxxx// | |
124 | `define NCU_ASI_A_HIT 10'h104 // 6-bits cpuid and thread id are "x" | |
125 | `define NCU_ASI_B_HIT 10'h1CC // 6-bits cpuid and thread id are "x" | |
126 | `define NCU_ASI_C_HIT 10'h114 // 6-bits cpuid and thread id are "x" | |
127 | `define NCU_ASI_COREAVAIL 16'h0000 | |
128 | `define NCU_ASI_CORE_ENABLE_STATUS 16'h0010 | |
129 | `define NCU_ASI_CORE_ENABLE 16'h0020 | |
130 | `define NCU_ASI_XIR_STEERING 16'h0030 | |
131 | `define NCU_ASI_CORE_RUNNINGRW 16'h0050 | |
132 | `define NCU_ASI_CORE_RUNNING_STATUS 16'h0058 | |
133 | `define NCU_ASI_CORE_RUNNING_W1S 16'h0060 | |
134 | `define NCU_ASI_CORE_RUNNING_W1C 16'h0068 | |
135 | `define NCU_ASI_INTVECDISP 16'h0000 | |
136 | `define NCU_ASI_ERR_STR 16'h1000 | |
137 | `define NCU_ASI_WMR_VEC_MASK 16'h0018 | |
138 | `define NCU_ASI_CMP_TICK_ENABLE 16'h0038 | |
139 | ||
140 | ||
141 | //// UCB packet type //// | |
142 | `define UCB_READ_NACK 4'b0000 // ack/nack types | |
143 | `define UCB_READ_ACK 4'b0001 | |
144 | `define UCB_WRITE_ACK 4'b0010 | |
145 | `define UCB_IFILL_ACK 4'b0011 | |
146 | `define UCB_IFILL_NACK 4'b0111 | |
147 | ||
148 | `define UCB_READ_REQ 4'b0100 // req types | |
149 | `define UCB_WRITE_REQ 4'b0101 | |
150 | `define UCB_IFILL_REQ 4'b0110 | |
151 | ||
152 | `define UCB_INT 4'b1000 // plain interrupt | |
153 | `define UCB_INT_VEC 4'b1100 // interrupt with vector | |
154 | `define UCB_INT_SOC_UE 4'b1001 // soc interrup ue | |
155 | `define UCB_INT_SOC_CE 4'b1010 // soc interrup ce | |
156 | `define UCB_RESET_VEC 4'b0101 // reset with vector | |
157 | `define UCB_IDLE_VEC 4'b1110 // idle with vector | |
158 | `define UCB_RESUME_VEC 4'b1111 // resume with vector | |
159 | ||
160 | `define UCB_INT_SOC 4'b1101 // soc interrup ce | |
161 | ||
162 | ||
163 | //// PCX packet type //// | |
164 | `define PCX_LOAD_RQ 5'b00000 | |
165 | `define PCX_IMISS_RQ 5'b10000 | |
166 | `define PCX_STORE_RQ 5'b00001 | |
167 | `define PCX_FWD_RQs 5'b01101 | |
168 | `define PCX_FWD_RPYs 5'b01110 | |
169 | ||
170 | //// CPX packet type //// | |
171 | //`define CPX_LOAD_RET 4'b0000 | |
172 | `define CPX_LOAD_RET 4'b1000 | |
173 | `define CPX_ST_ACK 4'b0100 | |
174 | //`define CPX_IFILL_RET 4'b0001 | |
175 | `define CPX_IFILL_RET 4'b1001 | |
176 | `define CPX_INT_RET 4'b0111 | |
177 | `define CPX_INT_SOC 4'b1101 | |
178 | //`define CPX_FWD_RQ_RET 4'b1010 | |
179 | //`define CPX_FWD_RPY_RET 4'b1011 | |
180 | ||
181 | ||
182 | ||
183 | ||
184 | //// Global CSR decode //// | |
185 | `define NCU_CSR 8'h80 | |
186 | `define NIU_CSR 8'h81 | |
187 | //`define RNG_CSR 8'h82 | |
188 | `define DBG1_CSR 8'h86 | |
189 | `define CCU_CSR 8'h83 | |
190 | `define MCU_CSR 8'h84 | |
191 | `define TCU_CSR 8'h85 | |
192 | `define DMU_CSR 8'h88 | |
193 | `define RCU_CSR 8'h89 | |
194 | `define NCU_ASI 8'h90 | |
195 | /////8'h91 ~ 9F reserved | |
196 | /////8'hA0 ~ BF L2 CSR//// | |
197 | `define DMU_PIO 4'hC // C0 ~ CF | |
198 | /////8'hB0 ~ FE reserved | |
199 | `define SSI_CSR 8'hFF | |
200 | ||
201 | ||
202 | //// NCU_SSI //// | |
203 | `define SSI_ADDR 12'hFF_F | |
204 | `define SSI_ADDR_TIMEOUT_REG 40'hFF_0001_0088 | |
205 | `define SSI_ADDR_LOG_REG 40'hFF_0000_0018 | |
206 | ||
207 | `define IF_IDLE 2'b00 | |
208 | `define IF_ACPT 2'b01 | |
209 | `define IF_DROP 2'b10 | |
210 | ||
211 | `define SSI_IDLE 3'b000 | |
212 | `define SSI_REQ 3'b001 | |
213 | `define SSI_WDATA 3'b011 | |
214 | `define SSI_REQ_PAR 3'b101 | |
215 | `define SSI_ACK 3'b111 | |
216 | `define SSI_RDATA 3'b110 | |
217 | `define SSI_ACK_PAR 3'b010 | |
218 | ||
219 | ||
220 | ||
221 | ||
222 | ||
223 | ||
224 | ||
225 | ||
226 | ||
227 | ||
228 | module ncu_i2cbufsii_ctl ( | |
229 | iol2clk, | |
230 | scan_in, | |
231 | scan_out, | |
232 | tcu_pce_ov, | |
233 | tcu_clk_stop, | |
234 | tcu_scan_en, | |
235 | tcu_aclk, | |
236 | tcu_bclk, | |
237 | sii_ncu_data, | |
238 | sii_ncu_dparity, | |
239 | sii_ncu_req, | |
240 | ncu_sii_gnt, | |
241 | sii_ncu_syn_data, | |
242 | sii_ncu_syn_vld, | |
243 | sii_mondo_vld, | |
244 | sii_mondo_data0, | |
245 | sii_mondo_data1, | |
246 | sii_mondo_target, | |
247 | sii_mondo_ctagerr, | |
248 | ncu_dmu_mondo_id, | |
249 | ncu_dmu_mondo_id_par, | |
250 | sii_mondo_rd, | |
251 | sii_cr_id_rtn, | |
252 | sii_cr_id_rtn_vld, | |
253 | req_ack_obj, | |
254 | req_ack_vld, | |
255 | rd_req_ack_dbl_buf, | |
256 | ncuctag_ue, | |
257 | ncuctag_uei, | |
258 | ncuctag_ce, | |
259 | ncuctag_cei, | |
260 | ncusiid_pe, | |
261 | ncusiid_pei, | |
262 | ncudpsyn, | |
263 | siierrsyn, | |
264 | siierrsyn_done) ; | |
265 | wire [2:0] sii_rcv_cntr_n; | |
266 | wire cntr_inc; | |
267 | wire [2:0] sii_rcv_cntr; | |
268 | wire sii_rcv_cntr_n_0_n; | |
269 | wire sii_rcv_cntr_0_; | |
270 | wire sii_rcv_cntr_0_ff_scanin; | |
271 | wire sii_rcv_cntr_0_ff_scanout; | |
272 | wire l1clk; | |
273 | wire sii_rcv_cntr_1_ff_scanin; | |
274 | wire sii_rcv_cntr_1_ff_scanout; | |
275 | wire sii_rcv_cntr_n_2_n; | |
276 | wire sii_rcv_cntr_2_n; | |
277 | wire sii_rcv_cntr_2_ff_scanin; | |
278 | wire sii_rcv_cntr_2_ff_scanout; | |
279 | wire sii_ncu_data_d1_ff_scanin; | |
280 | wire sii_ncu_data_d1_ff_scanout; | |
281 | wire [31:0] sii_ncu_data_d1; | |
282 | wire sii_ncu_dparity_d1_ff_scanin; | |
283 | wire sii_ncu_dparity_d1_ff_scanout; | |
284 | wire [1:0] sii_ncu_dparity_d1; | |
285 | wire sii_ncu_req_d1_ff_scanin; | |
286 | wire sii_ncu_req_d1_ff_scanout; | |
287 | wire sii_ncu_req_d1; | |
288 | wire hdr_ld; | |
289 | wire hdr_a_ff_scanin; | |
290 | wire hdr_a_ff_scanout; | |
291 | wire [31:0] hdr_a; | |
292 | wire [1:0] hdr_b; | |
293 | wire hdrctag_ue; | |
294 | wire hdrctag_ce; | |
295 | wire [15:0] hdr; | |
296 | wire [5:0] unused_co; | |
297 | wire pld_ld; | |
298 | wire [127:0] pld_n; | |
299 | wire [127:0] pld; | |
300 | wire pld_ff_scanin; | |
301 | wire pld_ff_scanout; | |
302 | wire dpchk_fail1; | |
303 | wire dpchk_fail0; | |
304 | wire dperr_n; | |
305 | wire dperr; | |
306 | wire dperr_ff_scanin; | |
307 | wire dperr_ff_scanout; | |
308 | wire ncusiid_pe_n; | |
309 | wire sii_buf_unload; | |
310 | wire ncusiid_pe_ff_scanin; | |
311 | wire ncusiid_pe_ff_scanout; | |
312 | wire ncu_sii_gnt_n; | |
313 | wire ncu_sii_gnt_shadow; | |
314 | wire ncu_sii_gnt_shadow_f; | |
315 | wire mondo_hdr_vld; | |
316 | wire pio_hdr_vld; | |
317 | wire piortn_dblbuf_full; | |
318 | wire rdy0_ff_scanin; | |
319 | wire rdy0_ff_scanout; | |
320 | wire rdy0; | |
321 | wire rdy1_ff_scanin; | |
322 | wire rdy1_ff_scanout; | |
323 | wire rdy1; | |
324 | wire ncu_sii_gnt_ff_scanin; | |
325 | wire ncu_sii_gnt_ff_scanout; | |
326 | wire ncu_sii_gnt_shadow_ff_scanin; | |
327 | wire ncu_sii_gnt_shadow_ff_scanout; | |
328 | wire ncu_sii_gnt_shadow_f_ff_scanin; | |
329 | wire ncu_sii_gnt_shadow_f_ff_scanout; | |
330 | wire cntr_inc_ff_scanin; | |
331 | wire cntr_inc_ff_scanout; | |
332 | wire hdrvld_n; | |
333 | wire hdrvld; | |
334 | wire hdrvld_ff_scanin; | |
335 | wire hdrvld_ff_scanout; | |
336 | wire [3:0] pldvld_n; | |
337 | wire [3:0] pldvld; | |
338 | wire pldvld_ff_scanin; | |
339 | wire pldvld_ff_scanout; | |
340 | wire wr_piortn_dblbuf; | |
341 | wire wr_mondo_buf; | |
342 | wire drop_pkt; | |
343 | wire sii_cr_id_rtn_vld_n; | |
344 | wire sii_cr_id_rtn_ff_scanin; | |
345 | wire sii_cr_id_rtn_ff_scanout; | |
346 | wire sii_cr_id_rtn_vld_ff_scanin; | |
347 | wire sii_cr_id_rtn_vld_ff_scanout; | |
348 | wire ncuctag_ue_n; | |
349 | wire ncuctag_ce_n; | |
350 | wire ncuctag_ue_ff_scanin; | |
351 | wire ncuctag_ue_ff_scanout; | |
352 | wire ncuctag_ce_ff_scanin; | |
353 | wire ncuctag_ce_ff_scanout; | |
354 | wire ncudpsyn_ff_scanin; | |
355 | wire ncudpsyn_ff_scanout; | |
356 | wire [3:0] piortn_ptyp; | |
357 | wire [139:0] indata_buf; | |
358 | wire [5:0] ncu_dmu_mondo_id_n; | |
359 | wire sii_mondo_ctagerr_n; | |
360 | wire sii_mondo_ctagerr_ff_scanin; | |
361 | wire sii_mondo_ctagerr_ff_scanout; | |
362 | wire ncu_dmu_mondo_idpre_ff_scanin; | |
363 | wire ncu_dmu_mondo_idpre_ff_scanout; | |
364 | wire [5:0] ncu_dmu_mondo_idpre; | |
365 | wire ncu_dmu_mondo_id_par_n; | |
366 | wire ncu_dmu_mondo_id_par_ff_scanin; | |
367 | wire ncu_dmu_mondo_id_par_ff_scanout; | |
368 | wire ncu_dmu_mondo_id_ff_scanin; | |
369 | wire ncu_dmu_mondo_id_ff_scanout; | |
370 | wire sii_mondo_target_ff_scanin; | |
371 | wire sii_mondo_target_ff_scanout; | |
372 | wire sii_mondo_data0_ff_scanin; | |
373 | wire sii_mondo_data0_ff_scanout; | |
374 | wire sii_mondo_data1_ff_scanin; | |
375 | wire sii_mondo_data1_ff_scanout; | |
376 | wire sii_mondo_vld_n; | |
377 | wire sii_mondo_vld_ff_scanin; | |
378 | wire sii_mondo_vld_ff_scanout; | |
379 | wire wr_buf0; | |
380 | wire buf1_vld; | |
381 | wire buf0_vld; | |
382 | wire buf1_older; | |
383 | wire wr_buf1; | |
384 | wire rd_buf0; | |
385 | wire rd_buf1; | |
386 | wire rd_buf; | |
387 | wire buf1_older_n; | |
388 | wire buf1_older_ff_scanin; | |
389 | wire buf1_older_ff_scanout; | |
390 | wire en_vld0; | |
391 | wire en_vld1; | |
392 | wire buf0_vld_ff_scanin; | |
393 | wire buf0_vld_ff_scanout; | |
394 | wire buf1_vld_ff_scanin; | |
395 | wire buf1_vld_ff_scanout; | |
396 | wire buf0_obj_ff_scanin; | |
397 | wire buf0_obj_ff_scanout; | |
398 | wire [139:0] buf0_obj; | |
399 | wire buf1_obj_ff_scanin; | |
400 | wire buf1_obj_ff_scanout; | |
401 | wire [139:0] buf1_obj; | |
402 | wire sii_ncu_syn_data_d1_ff_scanin; | |
403 | wire sii_ncu_syn_data_d1_ff_scanout; | |
404 | wire [3:0] sii_ncu_syn_data_d1; | |
405 | wire sii_ncu_syn_vld_d1_ff_scanin; | |
406 | wire sii_ncu_syn_vld_d1_ff_scanout; | |
407 | wire sii_ncu_syn_vld_d1; | |
408 | wire [63:0] siierrsyn_n; | |
409 | wire [3:0] errsyncntr_n; | |
410 | wire [3:0] errsyncntr; | |
411 | wire siierrsyn_done_n; | |
412 | wire siierrsyn_ff_scanin; | |
413 | wire siierrsyn_ff_scanout; | |
414 | wire siierrsyn_done_ff_scanin; | |
415 | wire siierrsyn_done_ff_scanout; | |
416 | wire errsyncntr_ff_scanin; | |
417 | wire errsyncntr_ff_scanout; | |
418 | wire [5:0] unused_i2cbufsii; | |
419 | wire siclk; | |
420 | wire soclk; | |
421 | wire se; | |
422 | wire pce_ov; | |
423 | wire stop; | |
424 | ||
425 | ||
426 | ||
427 | // Global interface | |
428 | input iol2clk; | |
429 | input scan_in; | |
430 | output scan_out; | |
431 | input tcu_pce_ov; | |
432 | input tcu_clk_stop; | |
433 | input tcu_scan_en; | |
434 | input tcu_aclk; | |
435 | input tcu_bclk; | |
436 | ||
437 | //// sii i/f signal //// | |
438 | input [31:0] sii_ncu_data; | |
439 | input [1:0] sii_ncu_dparity; | |
440 | input sii_ncu_req; | |
441 | output ncu_sii_gnt; | |
442 | ||
443 | input [3:0] sii_ncu_syn_data; | |
444 | input sii_ncu_syn_vld; | |
445 | ||
446 | output sii_mondo_vld; | |
447 | output [63:0] sii_mondo_data0; | |
448 | output [63:0] sii_mondo_data1; | |
449 | output [5:0] sii_mondo_target; | |
450 | output sii_mondo_ctagerr; | |
451 | output [5:0] ncu_dmu_mondo_id; | |
452 | output ncu_dmu_mondo_id_par; | |
453 | input sii_mondo_rd; | |
454 | ||
455 | output [3:0] sii_cr_id_rtn; | |
456 | output sii_cr_id_rtn_vld; | |
457 | ||
458 | // i2c slow control/datapath interface | |
459 | output [139:0] req_ack_obj; | |
460 | output req_ack_vld; | |
461 | input rd_req_ack_dbl_buf; | |
462 | ||
463 | // error reporting for ncu // | |
464 | output ncuctag_ue; | |
465 | input ncuctag_uei; | |
466 | output ncuctag_ce; | |
467 | input ncuctag_cei; | |
468 | output ncusiid_pe; | |
469 | input ncusiid_pei; | |
470 | output [15:0] ncudpsyn; | |
471 | ||
472 | // error reporting for sii// | |
473 | output [63:0] siierrsyn; | |
474 | output siierrsyn_done; | |
475 | ||
476 | ||
477 | /************************************************************ | |
478 | * Assemble inbound packet | |
479 | ************************************************************/ | |
480 | //ucb_bus_in #(UCB_BUS_WIDTH) ucb_bus_in | |
481 | // ( .clk(iol2clk), | |
482 | // .vld(ucb_iob_vld), | |
483 | // .data(ucb_iob_data[UCB_BUS_WIDTH-1:0]), | |
484 | // .stall(iob_ucb_stall), | |
485 | // .indata_buf_vld(indata_buf_vld), | |
486 | // .indata_buf(indata_buf[127:0]), | |
487 | // .stall_a1(iob_ucb_stall_a1)); | |
488 | ||
489 | ||
490 | ||
491 | ||
492 | ||
493 | ||
494 | ||
495 | ||
496 | ||
497 | ||
498 | ||
499 | ||
500 | ||
501 | ||
502 | ||
503 | assign sii_rcv_cntr_n[2:0] = cntr_inc ? 3'd0 : | |
504 | (sii_rcv_cntr[2:0]==3'd5) ? 3'd5 : sii_rcv_cntr[2:0]+3'd1; | |
505 | ||
506 | //sii_rcv_cntr[2:0] power up and stops at 5 | |
507 | //0in range -var sii_rcv_cntr -min 0 -max 5 | |
508 | assign sii_rcv_cntr_n_0_n = ~sii_rcv_cntr_n[0]; | |
509 | assign sii_rcv_cntr[0] = ~sii_rcv_cntr_0_; | |
510 | ncu_i2cbufsii_ctl_msff_ctl_macro__width_1 sii_rcv_cntr_0_ff | |
511 | ( | |
512 | .scan_in(sii_rcv_cntr_0_ff_scanin), | |
513 | .scan_out(sii_rcv_cntr_0_ff_scanout), | |
514 | .dout (sii_rcv_cntr_0_), | |
515 | .l1clk (l1clk), | |
516 | .din (sii_rcv_cntr_n_0_n), | |
517 | .siclk(siclk), | |
518 | .soclk(soclk) | |
519 | ); | |
520 | ||
521 | ncu_i2cbufsii_ctl_msff_ctl_macro__width_1 sii_rcv_cntr_1_ff | |
522 | ( | |
523 | .scan_in(sii_rcv_cntr_1_ff_scanin), | |
524 | .scan_out(sii_rcv_cntr_1_ff_scanout), | |
525 | .dout (sii_rcv_cntr[1]), | |
526 | .l1clk (l1clk), | |
527 | .din (sii_rcv_cntr_n[1]), | |
528 | .siclk(siclk), | |
529 | .soclk(soclk) | |
530 | ); | |
531 | ||
532 | assign sii_rcv_cntr_n_2_n = ~sii_rcv_cntr_n[2]; | |
533 | assign sii_rcv_cntr[2] = ~sii_rcv_cntr_2_n ; | |
534 | ncu_i2cbufsii_ctl_msff_ctl_macro__width_1 sii_rcv_cntr_2_ff | |
535 | ( | |
536 | .scan_in(sii_rcv_cntr_2_ff_scanin), | |
537 | .scan_out(sii_rcv_cntr_2_ff_scanout), | |
538 | .dout (sii_rcv_cntr_2_n), | |
539 | .l1clk (l1clk), | |
540 | .din (sii_rcv_cntr_n_2_n), | |
541 | .siclk(siclk), | |
542 | .soclk(soclk) | |
543 | ); | |
544 | ||
545 | ncu_i2cbufsii_ctl_msff_ctl_macro__width_32 sii_ncu_data_d1_ff | |
546 | ( | |
547 | .scan_in(sii_ncu_data_d1_ff_scanin), | |
548 | .scan_out(sii_ncu_data_d1_ff_scanout), | |
549 | .dout (sii_ncu_data_d1[31:0]), | |
550 | .l1clk (l1clk), | |
551 | .din (sii_ncu_data[31:0]), | |
552 | .siclk(siclk), | |
553 | .soclk(soclk) | |
554 | ); | |
555 | ||
556 | ncu_i2cbufsii_ctl_msff_ctl_macro__width_2 sii_ncu_dparity_d1_ff | |
557 | ( | |
558 | .scan_in(sii_ncu_dparity_d1_ff_scanin), | |
559 | .scan_out(sii_ncu_dparity_d1_ff_scanout), | |
560 | .dout (sii_ncu_dparity_d1[1:0]), | |
561 | .l1clk (l1clk), | |
562 | .din (sii_ncu_dparity[1:0]), | |
563 | .siclk(siclk), | |
564 | .soclk(soclk) | |
565 | ); | |
566 | ||
567 | ncu_i2cbufsii_ctl_msff_ctl_macro__width_1 sii_ncu_req_d1_ff | |
568 | ( | |
569 | .scan_in(sii_ncu_req_d1_ff_scanin), | |
570 | .scan_out(sii_ncu_req_d1_ff_scanout), | |
571 | .dout (sii_ncu_req_d1), | |
572 | .l1clk (l1clk), | |
573 | .din (sii_ncu_req), | |
574 | .siclk(siclk), | |
575 | .soclk(soclk) | |
576 | ); | |
577 | ||
578 | assign hdr_ld = (sii_rcv_cntr[2:0]==3'b0) ; | |
579 | ncu_i2cbufsii_ctl_msff_ctl_macro__en_1__width_32 hdr_a_ff | |
580 | ( | |
581 | .scan_in(hdr_a_ff_scanin), | |
582 | .scan_out(hdr_a_ff_scanout), | |
583 | .dout (hdr_a[31:0]), | |
584 | .l1clk (l1clk), | |
585 | .en (hdr_ld), | |
586 | .din (sii_ncu_data_d1[31:0]), | |
587 | .siclk(siclk), | |
588 | .soclk(soclk) | |
589 | ); | |
590 | ||
591 | assign hdr_b[1:0] = ncuctag_uei ? {~hdr_a[1],~hdr_a[0]} : | |
592 | ncuctag_cei ? {hdr_a[1],~hdr_a[0]} : hdr_a[1:0] ; | |
593 | ||
594 | ncu_eccchk16_ctl i2cbufsiieccchk16 (.din({hdr_a[15:2],hdr_b[1:0]}), | |
595 | .ci(hdr_a[21:16]), | |
596 | .ue(hdrctag_ue), | |
597 | .ce(hdrctag_ce), | |
598 | .dout(hdr[15:0]), | |
599 | .co(unused_co[5:0]) ); | |
600 | ||
601 | //// | |
602 | assign pld_ld = (sii_rcv_cntr[2:0]!=3'd5) ; | |
603 | //assign pld_n[127:0] = {sii_ncu_data_d1[31:0],pld[127:32]}; | |
604 | assign pld_n[127:0] = {pld[95:0],sii_ncu_data_d1[31:0]}; | |
605 | ||
606 | ncu_i2cbufsii_ctl_msff_ctl_macro__en_1__width_128 pld_ff | |
607 | ( | |
608 | .scan_in(pld_ff_scanin), | |
609 | .scan_out(pld_ff_scanout), | |
610 | .dout (pld[127:0]), | |
611 | .l1clk (l1clk), | |
612 | .en (pld_ld), | |
613 | .din (pld_n[127:0]), | |
614 | .siclk(siclk), | |
615 | .soclk(soclk) | |
616 | ); | |
617 | ||
618 | //assign sii_ncu_data_b = ncusiid_pei^sii_ncu_data_a[0] ; | |
619 | assign dpchk_fail1 = ~^{sii_ncu_dparity_d1[1],sii_ncu_data_d1[31], sii_ncu_data_d1[29], | |
620 | sii_ncu_data_d1[27], sii_ncu_data_d1[25], sii_ncu_data_d1[23], | |
621 | sii_ncu_data_d1[21], sii_ncu_data_d1[19], sii_ncu_data_d1[17], | |
622 | sii_ncu_data_d1[15], sii_ncu_data_d1[13], sii_ncu_data_d1[11], | |
623 | sii_ncu_data_d1[9], sii_ncu_data_d1[7], sii_ncu_data_d1[5], | |
624 | sii_ncu_data_d1[3], sii_ncu_data_d1[1]}; | |
625 | assign dpchk_fail0 = ~^{sii_ncu_dparity_d1[0],sii_ncu_data_d1[30], sii_ncu_data_d1[28], | |
626 | sii_ncu_data_d1[26], sii_ncu_data_d1[24], sii_ncu_data_d1[22], | |
627 | sii_ncu_data_d1[20], sii_ncu_data_d1[18], sii_ncu_data_d1[16], | |
628 | sii_ncu_data_d1[14], sii_ncu_data_d1[12], sii_ncu_data_d1[10], | |
629 | sii_ncu_data_d1[8], sii_ncu_data_d1[6], sii_ncu_data_d1[4], | |
630 | sii_ncu_data_d1[2], sii_ncu_data_d1[0], ncusiid_pei }; | |
631 | ||
632 | //assign dperr_n = hdr_ld ? 1'b0 : (dpchk_fail0|dpchk_fail1|dperr) ; | |
633 | assign dperr_n = hdr_ld ? 1'b0 : pld_ld ? (dpchk_fail0|dpchk_fail1|dperr) : dperr ; | |
634 | ncu_i2cbufsii_ctl_msff_ctl_macro__width_1 dperr_ff | |
635 | ( | |
636 | .scan_in(dperr_ff_scanin), | |
637 | .scan_out(dperr_ff_scanout), | |
638 | .dout (dperr), | |
639 | .l1clk (l1clk), | |
640 | .din (dperr_n), | |
641 | .siclk(siclk), | |
642 | .soclk(soclk) | |
643 | ); | |
644 | ||
645 | assign ncusiid_pe_n = dperr&sii_buf_unload&~hdr_a[28] ; | |
646 | ncu_i2cbufsii_ctl_msff_ctl_macro__width_1 ncusiid_pe_ff | |
647 | ( | |
648 | .scan_in(ncusiid_pe_ff_scanin), | |
649 | .scan_out(ncusiid_pe_ff_scanout), | |
650 | .dout (ncusiid_pe), | |
651 | .l1clk (l1clk), | |
652 | .din (ncusiid_pe_n), | |
653 | .siclk(siclk), | |
654 | .soclk(soclk) | |
655 | ); | |
656 | ||
657 | //ignore req_d1 at cntr = 0 or 1, ignore req at gnt or cyc after gnt. | |
658 | assign ncu_sii_gnt_n = ( (sii_rcv_cntr[2:1]==2'b00)|cntr_inc|ncu_sii_gnt_shadow|ncu_sii_gnt_shadow_f) ? 1'b0 : | |
659 | sii_ncu_req_d1 & ~( (mondo_hdr_vld&(sii_mondo_vld&~sii_mondo_rd)) | | |
660 | (pio_hdr_vld&(piortn_dblbuf_full&~rd_req_ack_dbl_buf)) ) ; | |
661 | ||
662 | ncu_i2cbufsii_ctl_msff_ctl_macro__width_1 rdy0_ff | |
663 | ( | |
664 | .scan_in(rdy0_ff_scanin), | |
665 | .scan_out(rdy0_ff_scanout), | |
666 | .dout (rdy0), | |
667 | .l1clk (l1clk), | |
668 | .din (1'b1), | |
669 | .siclk(siclk), | |
670 | .soclk(soclk) | |
671 | ); | |
672 | ncu_i2cbufsii_ctl_msff_ctl_macro__width_1 rdy1_ff | |
673 | ( | |
674 | .scan_in(rdy1_ff_scanin), | |
675 | .scan_out(rdy1_ff_scanout), | |
676 | .dout (rdy1), | |
677 | .l1clk (l1clk), | |
678 | .din (rdy0), | |
679 | .siclk(siclk), | |
680 | .soclk(soclk) | |
681 | ); | |
682 | ||
683 | ncu_i2cbufsii_ctl_msff_ctl_macro__en_1__width_1 ncu_sii_gnt_ff | |
684 | ( | |
685 | .scan_in(ncu_sii_gnt_ff_scanin), | |
686 | .scan_out(ncu_sii_gnt_ff_scanout), | |
687 | .dout (ncu_sii_gnt), | |
688 | .l1clk (l1clk), | |
689 | .en (rdy1), | |
690 | .din (ncu_sii_gnt_n), | |
691 | .siclk(siclk), | |
692 | .soclk(soclk) | |
693 | ); | |
694 | ||
695 | ncu_i2cbufsii_ctl_msff_ctl_macro__en_1__width_1 ncu_sii_gnt_shadow_ff | |
696 | ( | |
697 | .scan_in(ncu_sii_gnt_shadow_ff_scanin), | |
698 | .scan_out(ncu_sii_gnt_shadow_ff_scanout), | |
699 | .dout (ncu_sii_gnt_shadow), | |
700 | .l1clk (l1clk), | |
701 | .en (rdy1), | |
702 | .din (ncu_sii_gnt_n), | |
703 | .siclk(siclk), | |
704 | .soclk(soclk) | |
705 | ); | |
706 | ||
707 | ncu_i2cbufsii_ctl_msff_ctl_macro__width_1 ncu_sii_gnt_shadow_f_ff | |
708 | ( | |
709 | .scan_in(ncu_sii_gnt_shadow_f_ff_scanin), | |
710 | .scan_out(ncu_sii_gnt_shadow_f_ff_scanout), | |
711 | .dout (ncu_sii_gnt_shadow_f), | |
712 | .l1clk (l1clk), | |
713 | .din (ncu_sii_gnt_shadow), | |
714 | .siclk(siclk), | |
715 | .soclk(soclk) | |
716 | ); | |
717 | ||
718 | ncu_i2cbufsii_ctl_msff_ctl_macro__width_1 cntr_inc_ff | |
719 | ( | |
720 | .scan_in(cntr_inc_ff_scanin), | |
721 | .scan_out(cntr_inc_ff_scanout), | |
722 | .dout (cntr_inc), | |
723 | .l1clk (l1clk), | |
724 | .din (ncu_sii_gnt_shadow_f), | |
725 | .siclk(siclk), | |
726 | .soclk(soclk) | |
727 | ); | |
728 | ||
729 | assign hdrvld_n = (sii_rcv_cntr[2:0]==3'b0) ? 1'b1 : | |
730 | sii_buf_unload ? 1'b0 : hdrvld ; | |
731 | ncu_i2cbufsii_ctl_msff_ctl_macro__width_1 hdrvld_ff | |
732 | ( | |
733 | .scan_in(hdrvld_ff_scanin), | |
734 | .scan_out(hdrvld_ff_scanout), | |
735 | .dout (hdrvld), | |
736 | .l1clk (l1clk), | |
737 | .din (hdrvld_n), | |
738 | .siclk(siclk), | |
739 | .soclk(soclk) | |
740 | ); | |
741 | ||
742 | assign pldvld_n[3:0] = sii_buf_unload ? 4'b0 : | |
743 | (sii_rcv_cntr[2:0]!=3'd5) ? {hdrvld,pldvld[3:1]} : pldvld[3:0] ; | |
744 | ncu_i2cbufsii_ctl_msff_ctl_macro__width_4 pldvld_ff | |
745 | ( | |
746 | .scan_in(pldvld_ff_scanin), | |
747 | .scan_out(pldvld_ff_scanout), | |
748 | .dout (pldvld[3:0]), | |
749 | .l1clk (l1clk), | |
750 | .din (pldvld_n[3:0]), | |
751 | .siclk(siclk), | |
752 | .soclk(soclk) | |
753 | ); | |
754 | ||
755 | assign mondo_hdr_vld = hdrvld & ~hdr[15] ; | |
756 | assign pio_hdr_vld = hdrvld & hdr[15] ; | |
757 | assign sii_buf_unload = wr_piortn_dblbuf | wr_mondo_buf | (pldvld[0]&drop_pkt) ; | |
758 | assign drop_pkt = (pio_hdr_vld&(hdrctag_ue|hdr_a[28])) | (mondo_hdr_vld&dperr) ; | |
759 | ||
760 | assign sii_cr_id_rtn_vld_n = pio_hdr_vld&~pldvld[3]&~hdrctag_ue ; | |
761 | ||
762 | ncu_i2cbufsii_ctl_msff_ctl_macro__width_4 sii_cr_id_rtn_ff | |
763 | ( | |
764 | .scan_in(sii_cr_id_rtn_ff_scanin), | |
765 | .scan_out(sii_cr_id_rtn_ff_scanout), | |
766 | .dout (sii_cr_id_rtn[3:0]), | |
767 | .l1clk (l1clk), | |
768 | .din (hdr[11:8]), | |
769 | .siclk(siclk), | |
770 | .soclk(soclk) | |
771 | ); | |
772 | ||
773 | ncu_i2cbufsii_ctl_msff_ctl_macro__width_1 sii_cr_id_rtn_vld_ff | |
774 | ( | |
775 | .scan_in(sii_cr_id_rtn_vld_ff_scanin), | |
776 | .scan_out(sii_cr_id_rtn_vld_ff_scanout), | |
777 | .dout (sii_cr_id_rtn_vld), | |
778 | .l1clk (l1clk), | |
779 | .din (sii_cr_id_rtn_vld_n), | |
780 | .siclk(siclk), | |
781 | .soclk(soclk) | |
782 | ); | |
783 | ||
784 | //assign ncuctag_ue_n = hdrctag_ue&pldvld[3]&~pldvld[2]&~hdr_a[28]; -jimmy 3/30/05 | |
785 | //assign ncuctag_ce_n = hdrctag_ce&pldvld[3]&~pldvld[2]&~hdr_a[28]; -jimmy 3/30/05 | |
786 | assign ncuctag_ue_n = hdrctag_ue&sii_buf_unload&~hdr_a[28]; | |
787 | assign ncuctag_ce_n = hdrctag_ce&sii_buf_unload&~hdr_a[28]; | |
788 | ncu_i2cbufsii_ctl_msff_ctl_macro__width_1 ncuctag_ue_ff | |
789 | ( | |
790 | .scan_in(ncuctag_ue_ff_scanin), | |
791 | .scan_out(ncuctag_ue_ff_scanout), | |
792 | .dout (ncuctag_ue), | |
793 | .l1clk (l1clk), | |
794 | .din (ncuctag_ue_n), | |
795 | .siclk(siclk), | |
796 | .soclk(soclk) | |
797 | ); | |
798 | ncu_i2cbufsii_ctl_msff_ctl_macro__width_1 ncuctag_ce_ff | |
799 | ( | |
800 | .scan_in(ncuctag_ce_ff_scanin), | |
801 | .scan_out(ncuctag_ce_ff_scanout), | |
802 | .dout (ncuctag_ce), | |
803 | .l1clk (l1clk), | |
804 | .din (ncuctag_ce_n), | |
805 | .siclk(siclk), | |
806 | .soclk(soclk) | |
807 | ); | |
808 | ncu_i2cbufsii_ctl_msff_ctl_macro__en_1__width_16 ncudpsyn_ff | |
809 | ( | |
810 | .scan_in(ncudpsyn_ff_scanin), | |
811 | .scan_out(ncudpsyn_ff_scanout), | |
812 | .dout (ncudpsyn[15:0]), | |
813 | .l1clk (l1clk), | |
814 | //.en (pldvld[0]), -jimmy 3/30/05 | |
815 | .en (sii_buf_unload), | |
816 | .din (hdr[15:0]), | |
817 | .siclk(siclk), | |
818 | .soclk(soclk) | |
819 | ); | |
820 | ||
821 | //pktvld = pldvld[0]// | |
822 | assign wr_piortn_dblbuf = pldvld[0] & ~drop_pkt & pio_hdr_vld & ~piortn_dblbuf_full ; | |
823 | ||
824 | //// to, ue, umap , ebit, err of pio return cause UCB NACK //// | |
825 | assign piortn_ptyp[3:0]= ((|hdr_a[31:28])|dperr) ? `UCB_READ_NACK : `UCB_READ_ACK ; | |
826 | ||
827 | //// generating UCB packet here //// | |
828 | assign indata_buf[139:0] = { pld[127:0] , //pld | |
829 | //9'b0, //rsvd | |
830 | //40'b0, //pa (dummy) | |
831 | //3'b0, //req_sz (dummy) | |
832 | //2'b0, //buf_id (dummy) | |
833 | hdr[7:6], //buf_id | |
834 | hdr[5:0], //cpu_thr | |
835 | piortn_ptyp[3:0] } ; | |
836 | ||
837 | //pktvld = pldvld[0]// | |
838 | //assign wr_mondo_buf = (pldvld[3]&mondo_hdr_vld) & | |
839 | // (~sii_mondo_vld | (sii_mondo_vld&sii_mondo_rd)); | |
840 | assign wr_mondo_buf = (pldvld[0]&~drop_pkt&mondo_hdr_vld) & (~sii_mondo_vld | (sii_mondo_vld&sii_mondo_rd)); | |
841 | assign ncu_dmu_mondo_id_n[5:0] = {hdr[14:11],hdr[2:1]}; | |
842 | assign sii_mondo_ctagerr_n = mondo_hdr_vld&(hdrctag_ue|hdr_a[28]) ; | |
843 | ||
844 | ncu_i2cbufsii_ctl_msff_ctl_macro__en_1__width_1 sii_mondo_ctagerr_ff | |
845 | ( | |
846 | .scan_in(sii_mondo_ctagerr_ff_scanin), | |
847 | .scan_out(sii_mondo_ctagerr_ff_scanout), | |
848 | .dout (sii_mondo_ctagerr), | |
849 | .l1clk (l1clk), | |
850 | .en (wr_mondo_buf), | |
851 | .din (sii_mondo_ctagerr_n), | |
852 | .siclk(siclk), | |
853 | .soclk(soclk) | |
854 | ); | |
855 | ||
856 | ncu_i2cbufsii_ctl_msff_ctl_macro__en_1__width_6 ncu_dmu_mondo_idpre_ff | |
857 | ( | |
858 | .scan_in(ncu_dmu_mondo_idpre_ff_scanin), | |
859 | .scan_out(ncu_dmu_mondo_idpre_ff_scanout), | |
860 | .dout (ncu_dmu_mondo_idpre[5:0]), | |
861 | .l1clk (l1clk), | |
862 | .en (wr_mondo_buf), | |
863 | .din (ncu_dmu_mondo_id_n[5:0]), | |
864 | .siclk(siclk), | |
865 | .soclk(soclk) | |
866 | ); | |
867 | ||
868 | assign ncu_dmu_mondo_id_par_n = ~^ncu_dmu_mondo_idpre[5:0] ; | |
869 | ncu_i2cbufsii_ctl_msff_ctl_macro__width_1 ncu_dmu_mondo_id_par_ff | |
870 | ( | |
871 | .scan_in(ncu_dmu_mondo_id_par_ff_scanin), | |
872 | .scan_out(ncu_dmu_mondo_id_par_ff_scanout), | |
873 | .dout (ncu_dmu_mondo_id_par), | |
874 | .l1clk (l1clk), | |
875 | .din (ncu_dmu_mondo_id_par_n), | |
876 | .siclk(siclk), | |
877 | .soclk(soclk) | |
878 | ); | |
879 | ||
880 | ncu_i2cbufsii_ctl_msff_ctl_macro__width_6 ncu_dmu_mondo_id_ff | |
881 | ( | |
882 | .scan_in(ncu_dmu_mondo_id_ff_scanin), | |
883 | .scan_out(ncu_dmu_mondo_id_ff_scanout), | |
884 | .dout (ncu_dmu_mondo_id[5:0]), | |
885 | .l1clk (l1clk), | |
886 | .din (ncu_dmu_mondo_idpre[5:0]), | |
887 | .siclk(siclk), | |
888 | .soclk(soclk) | |
889 | ); | |
890 | ||
891 | ncu_i2cbufsii_ctl_msff_ctl_macro__en_1__width_6 sii_mondo_target_ff | |
892 | ( | |
893 | .scan_in(sii_mondo_target_ff_scanin), | |
894 | .scan_out(sii_mondo_target_ff_scanout), | |
895 | .dout (sii_mondo_target[5:0]), | |
896 | .l1clk (l1clk), | |
897 | .en (wr_mondo_buf), | |
898 | .din (pld[75:70]), | |
899 | .siclk(siclk), | |
900 | .soclk(soclk) | |
901 | ); | |
902 | ||
903 | ncu_i2cbufsii_ctl_msff_ctl_macro__en_1__width_64 sii_mondo_data0_ff | |
904 | ( | |
905 | .scan_in(sii_mondo_data0_ff_scanin), | |
906 | .scan_out(sii_mondo_data0_ff_scanout), | |
907 | .dout (sii_mondo_data0[63:0]), | |
908 | .l1clk (l1clk), | |
909 | .en (wr_mondo_buf), | |
910 | .din (pld[127:64]), | |
911 | .siclk(siclk), | |
912 | .soclk(soclk) | |
913 | ); | |
914 | ||
915 | ncu_i2cbufsii_ctl_msff_ctl_macro__en_1__width_64 sii_mondo_data1_ff | |
916 | ( | |
917 | .scan_in(sii_mondo_data1_ff_scanin), | |
918 | .scan_out(sii_mondo_data1_ff_scanout), | |
919 | .dout (sii_mondo_data1[63:0]), | |
920 | .l1clk (l1clk), | |
921 | .en (wr_mondo_buf), | |
922 | .din (pld[63:0]), | |
923 | .siclk(siclk), | |
924 | .soclk(soclk) | |
925 | ); | |
926 | ||
927 | assign sii_mondo_vld_n = wr_mondo_buf | (sii_mondo_vld & ~sii_mondo_rd) ; | |
928 | ncu_i2cbufsii_ctl_msff_ctl_macro__width_1 sii_mondo_vld_ff | |
929 | ( | |
930 | .scan_in(sii_mondo_vld_ff_scanin), | |
931 | .scan_out(sii_mondo_vld_ff_scanout), | |
932 | .dout (sii_mondo_vld), | |
933 | .l1clk (l1clk), | |
934 | .din (sii_mondo_vld_n), | |
935 | .siclk(siclk), | |
936 | .soclk(soclk) | |
937 | ); | |
938 | ||
939 | ||
940 | //====================================================================== | |
941 | //====================================================================== | |
942 | //================================================== dbl_buf =========== | |
943 | /////////////////////////////////////////////// | |
944 | // Double buffer to store non-interrupt packets | |
945 | /////////////////////////////////////////////// | |
946 | //assign wr_piortn_dblbuf = req_ack_pending & ~piortn_dblbuf_full; | |
947 | // dbl_buf #(128) req_ack_dbl_buf ( | |
948 | // .clk(iol2clk), | |
949 | // .wr(wr_piortn_dblbuf), | |
950 | // .din(indata_buf[127:0]), | |
951 | // .rd(rd_req_ack_dbl_buf), | |
952 | // .dout(req_ack_obj[127:0]), | |
953 | // .vld(req_ack_vld), | |
954 | // .full(piortn_dblbuf_full)); | |
955 | ||
956 | // if both entries are empty, write to entry pointed to by the older pointer | |
957 | assign wr_buf0 = wr_piortn_dblbuf & (buf1_vld | (~buf0_vld & ~buf1_older)); | |
958 | assign wr_buf1 = wr_piortn_dblbuf & (buf0_vld | (~buf1_vld & buf1_older)); | |
959 | ||
960 | // read from the older entry | |
961 | assign rd_buf0 = rd_req_ack_dbl_buf & ~buf1_older; | |
962 | assign rd_buf1 = rd_req_ack_dbl_buf & buf1_older; | |
963 | ||
964 | // flip older pointer when an entry is read | |
965 | assign rd_buf = rd_req_ack_dbl_buf & (buf0_vld | buf1_vld); | |
966 | assign buf1_older_n = ~buf1_older ; | |
967 | ncu_i2cbufsii_ctl_msff_ctl_macro__en_1__width_1 buf1_older_ff | |
968 | ( | |
969 | .scan_in(buf1_older_ff_scanin), | |
970 | .scan_out(buf1_older_ff_scanout), | |
971 | .dout (buf1_older), | |
972 | .l1clk (l1clk), | |
973 | .en (rd_buf), | |
974 | .din (buf1_older_n), | |
975 | .siclk(siclk), | |
976 | .soclk(soclk) | |
977 | ); | |
978 | ||
979 | // set valid bit for writes and reset for reads | |
980 | assign en_vld0 = wr_buf0 | rd_buf0; | |
981 | assign en_vld1 = wr_buf1 | rd_buf1; | |
982 | ||
983 | // the actual buffers | |
984 | ncu_i2cbufsii_ctl_msff_ctl_macro__en_1__width_1 buf0_vld_ff | |
985 | ( | |
986 | .scan_in(buf0_vld_ff_scanin), | |
987 | .scan_out(buf0_vld_ff_scanout), | |
988 | .dout (buf0_vld), | |
989 | .l1clk (l1clk), | |
990 | .en (en_vld0), | |
991 | .din (wr_buf0), | |
992 | .siclk(siclk), | |
993 | .soclk(soclk) | |
994 | ); | |
995 | ||
996 | ncu_i2cbufsii_ctl_msff_ctl_macro__en_1__width_1 buf1_vld_ff | |
997 | ( | |
998 | .scan_in(buf1_vld_ff_scanin), | |
999 | .scan_out(buf1_vld_ff_scanout), | |
1000 | .dout (buf1_vld), | |
1001 | .l1clk (l1clk), | |
1002 | .en (en_vld1), | |
1003 | .din (wr_buf1), | |
1004 | .siclk(siclk), | |
1005 | .soclk(soclk) | |
1006 | ); | |
1007 | ||
1008 | ncu_i2cbufsii_ctl_msff_ctl_macro__en_1__width_140 buf0_obj_ff | |
1009 | ( | |
1010 | .scan_in(buf0_obj_ff_scanin), | |
1011 | .scan_out(buf0_obj_ff_scanout), | |
1012 | .dout (buf0_obj[139:0]), | |
1013 | .l1clk (l1clk), | |
1014 | .en (wr_buf0), | |
1015 | .din (indata_buf[139:0]), | |
1016 | .siclk(siclk), | |
1017 | .soclk(soclk) | |
1018 | ); | |
1019 | ||
1020 | ncu_i2cbufsii_ctl_msff_ctl_macro__en_1__width_140 buf1_obj_ff | |
1021 | ( | |
1022 | .scan_in(buf1_obj_ff_scanin), | |
1023 | .scan_out(buf1_obj_ff_scanout), | |
1024 | .dout (buf1_obj[139:0]), | |
1025 | .l1clk (l1clk), | |
1026 | .en (wr_buf1), | |
1027 | .din (indata_buf[139:0]), | |
1028 | .siclk(siclk), | |
1029 | .soclk(soclk) | |
1030 | ); | |
1031 | ||
1032 | // mux out the older entry | |
1033 | assign req_ack_obj[139:0] = (buf1_older) ? buf1_obj[139:0] : buf0_obj[139:0] ; | |
1034 | ||
1035 | assign req_ack_vld = buf0_vld | buf1_vld; | |
1036 | assign piortn_dblbuf_full = buf0_vld & buf1_vld; | |
1037 | //================================================== dbl_buf =========== | |
1038 | //====================================================================== | |
1039 | //====================================================================== | |
1040 | ||
1041 | ||
1042 | ||
1043 | ncu_i2cbufsii_ctl_msff_ctl_macro__width_4 sii_ncu_syn_data_d1_ff | |
1044 | ( | |
1045 | .scan_in(sii_ncu_syn_data_d1_ff_scanin), | |
1046 | .scan_out(sii_ncu_syn_data_d1_ff_scanout), | |
1047 | .dout (sii_ncu_syn_data_d1[3:0]), | |
1048 | .l1clk (l1clk), | |
1049 | .din (sii_ncu_syn_data[3:0]), | |
1050 | .siclk(siclk), | |
1051 | .soclk(soclk) | |
1052 | ); | |
1053 | ||
1054 | ncu_i2cbufsii_ctl_msff_ctl_macro__width_1 sii_ncu_syn_vld_d1_ff | |
1055 | ( | |
1056 | .scan_in(sii_ncu_syn_vld_d1_ff_scanin), | |
1057 | .scan_out(sii_ncu_syn_vld_d1_ff_scanout), | |
1058 | .dout (sii_ncu_syn_vld_d1), | |
1059 | .l1clk (l1clk), | |
1060 | .din (sii_ncu_syn_vld), | |
1061 | .siclk(siclk), | |
1062 | .soclk(soclk) | |
1063 | ); | |
1064 | ||
1065 | assign siierrsyn_n[63:0] = {sii_ncu_syn_data_d1[3:0],siierrsyn[63:4]}; | |
1066 | ||
1067 | assign errsyncntr_n[3:0] = (~sii_ncu_syn_vld_d1) ? 4'd0 : errsyncntr[3:0]+4'd1 ; | |
1068 | ||
1069 | assign siierrsyn_done_n = (errsyncntr[3:0]==4'd15) ; | |
1070 | ||
1071 | ncu_i2cbufsii_ctl_msff_ctl_macro__en_1__width_64 siierrsyn_ff | |
1072 | ( | |
1073 | .scan_in(siierrsyn_ff_scanin), | |
1074 | .scan_out(siierrsyn_ff_scanout), | |
1075 | .dout (siierrsyn[63:0]), | |
1076 | .l1clk (l1clk), | |
1077 | .en (sii_ncu_syn_vld_d1), | |
1078 | .din (siierrsyn_n[63:0]), | |
1079 | .siclk(siclk), | |
1080 | .soclk(soclk) | |
1081 | ); | |
1082 | ||
1083 | ncu_i2cbufsii_ctl_msff_ctl_macro__width_1 siierrsyn_done_ff | |
1084 | ( | |
1085 | .scan_in(siierrsyn_done_ff_scanin), | |
1086 | .scan_out(siierrsyn_done_ff_scanout), | |
1087 | .dout (siierrsyn_done), | |
1088 | .l1clk (l1clk), | |
1089 | .din (siierrsyn_done_n), | |
1090 | .siclk(siclk), | |
1091 | .soclk(soclk) | |
1092 | ); | |
1093 | ||
1094 | ncu_i2cbufsii_ctl_msff_ctl_macro__width_4 errsyncntr_ff | |
1095 | ( | |
1096 | .scan_in(errsyncntr_ff_scanin), | |
1097 | .scan_out(errsyncntr_ff_scanout), | |
1098 | .dout (errsyncntr[3:0]), | |
1099 | .l1clk (l1clk), | |
1100 | .din (errsyncntr_n[3:0]), | |
1101 | .siclk(siclk), | |
1102 | .soclk(soclk) | |
1103 | ); | |
1104 | ||
1105 | ||
1106 | ||
1107 | assign unused_i2cbufsii[5:0] = {hdr_a[27:22]} ; | |
1108 | ||
1109 | ||
1110 | ||
1111 | ||
1112 | ||
1113 | /**** adding clock header ****/ | |
1114 | ncu_i2cbufsii_ctl_l1clkhdr_ctl_macro clkgen ( | |
1115 | .l2clk (iol2clk), | |
1116 | .l1en (1'b1), | |
1117 | .l1clk (l1clk), | |
1118 | .pce_ov(pce_ov), | |
1119 | .stop(stop), | |
1120 | .se(se) | |
1121 | ); | |
1122 | ||
1123 | /*** building tcu port ***/ | |
1124 | assign siclk = tcu_aclk; | |
1125 | assign soclk = tcu_bclk; | |
1126 | assign se = tcu_scan_en; | |
1127 | assign pce_ov = tcu_pce_ov; | |
1128 | assign stop = tcu_clk_stop; | |
1129 | ||
1130 | // fixscan start: | |
1131 | assign sii_rcv_cntr_0_ff_scanin = scan_in ; | |
1132 | assign sii_rcv_cntr_1_ff_scanin = sii_rcv_cntr_0_ff_scanout; | |
1133 | assign sii_rcv_cntr_2_ff_scanin = sii_rcv_cntr_1_ff_scanout; | |
1134 | assign sii_ncu_data_d1_ff_scanin = sii_rcv_cntr_2_ff_scanout; | |
1135 | assign sii_ncu_dparity_d1_ff_scanin = sii_ncu_data_d1_ff_scanout; | |
1136 | assign sii_ncu_req_d1_ff_scanin = sii_ncu_dparity_d1_ff_scanout; | |
1137 | assign hdr_a_ff_scanin = sii_ncu_req_d1_ff_scanout; | |
1138 | assign pld_ff_scanin = hdr_a_ff_scanout ; | |
1139 | assign dperr_ff_scanin = pld_ff_scanout ; | |
1140 | assign ncusiid_pe_ff_scanin = dperr_ff_scanout ; | |
1141 | assign rdy0_ff_scanin = ncusiid_pe_ff_scanout ; | |
1142 | assign rdy1_ff_scanin = rdy0_ff_scanout ; | |
1143 | assign ncu_sii_gnt_ff_scanin = rdy1_ff_scanout ; | |
1144 | assign ncu_sii_gnt_shadow_ff_scanin = ncu_sii_gnt_ff_scanout ; | |
1145 | assign ncu_sii_gnt_shadow_f_ff_scanin = ncu_sii_gnt_shadow_ff_scanout; | |
1146 | assign cntr_inc_ff_scanin = ncu_sii_gnt_shadow_f_ff_scanout; | |
1147 | assign hdrvld_ff_scanin = cntr_inc_ff_scanout ; | |
1148 | assign pldvld_ff_scanin = hdrvld_ff_scanout ; | |
1149 | assign sii_cr_id_rtn_ff_scanin = pldvld_ff_scanout ; | |
1150 | assign sii_cr_id_rtn_vld_ff_scanin = sii_cr_id_rtn_ff_scanout ; | |
1151 | assign ncuctag_ue_ff_scanin = sii_cr_id_rtn_vld_ff_scanout; | |
1152 | assign ncuctag_ce_ff_scanin = ncuctag_ue_ff_scanout ; | |
1153 | assign ncudpsyn_ff_scanin = ncuctag_ce_ff_scanout ; | |
1154 | assign ncu_dmu_mondo_idpre_ff_scanin = ncudpsyn_ff_scanout ; | |
1155 | assign sii_mondo_ctagerr_ff_scanin = ncu_dmu_mondo_idpre_ff_scanout; | |
1156 | assign ncu_dmu_mondo_id_par_ff_scanin = sii_mondo_ctagerr_ff_scanout; | |
1157 | assign ncu_dmu_mondo_id_ff_scanin = ncu_dmu_mondo_id_par_ff_scanout; | |
1158 | assign sii_mondo_target_ff_scanin = ncu_dmu_mondo_id_ff_scanout; | |
1159 | assign sii_mondo_data0_ff_scanin = sii_mondo_target_ff_scanout; | |
1160 | assign sii_mondo_data1_ff_scanin = sii_mondo_data0_ff_scanout; | |
1161 | assign sii_mondo_vld_ff_scanin = sii_mondo_data1_ff_scanout; | |
1162 | assign buf1_older_ff_scanin = sii_mondo_vld_ff_scanout ; | |
1163 | assign buf0_vld_ff_scanin = buf1_older_ff_scanout ; | |
1164 | assign buf1_vld_ff_scanin = buf0_vld_ff_scanout ; | |
1165 | assign buf0_obj_ff_scanin = buf1_vld_ff_scanout ; | |
1166 | assign buf1_obj_ff_scanin = buf0_obj_ff_scanout ; | |
1167 | assign sii_ncu_syn_data_d1_ff_scanin = buf1_obj_ff_scanout ; | |
1168 | assign sii_ncu_syn_vld_d1_ff_scanin = sii_ncu_syn_data_d1_ff_scanout; | |
1169 | assign siierrsyn_ff_scanin = sii_ncu_syn_vld_d1_ff_scanout; | |
1170 | assign siierrsyn_done_ff_scanin = siierrsyn_ff_scanout ; | |
1171 | assign errsyncntr_ff_scanin = siierrsyn_done_ff_scanout; | |
1172 | assign scan_out = errsyncntr_ff_scanout ; | |
1173 | // fixscan end: | |
1174 | endmodule // i2c_buf | |
1175 | ||
1176 | ||
1177 | ||
1178 | ||
1179 | ||
1180 | ||
1181 | ||
1182 | ||
1183 | ||
1184 | ||
1185 | ||
1186 | // any PARAMS parms go into naming of macro | |
1187 | ||
1188 | module ncu_i2cbufsii_ctl_msff_ctl_macro__width_1 ( | |
1189 | din, | |
1190 | l1clk, | |
1191 | scan_in, | |
1192 | siclk, | |
1193 | soclk, | |
1194 | dout, | |
1195 | scan_out); | |
1196 | wire [0:0] fdin; | |
1197 | ||
1198 | input [0:0] din; | |
1199 | input l1clk; | |
1200 | input scan_in; | |
1201 | ||
1202 | ||
1203 | input siclk; | |
1204 | input soclk; | |
1205 | ||
1206 | output [0:0] dout; | |
1207 | output scan_out; | |
1208 | assign fdin[0:0] = din[0:0]; | |
1209 | ||
1210 | ||
1211 | ||
1212 | ||
1213 | ||
1214 | ||
1215 | dff #(1) d0_0 ( | |
1216 | .l1clk(l1clk), | |
1217 | .siclk(siclk), | |
1218 | .soclk(soclk), | |
1219 | .d(fdin[0:0]), | |
1220 | .si(scan_in), | |
1221 | .so(scan_out), | |
1222 | .q(dout[0:0]) | |
1223 | ); | |
1224 | ||
1225 | ||
1226 | ||
1227 | ||
1228 | ||
1229 | ||
1230 | ||
1231 | ||
1232 | ||
1233 | ||
1234 | ||
1235 | ||
1236 | endmodule | |
1237 | ||
1238 | ||
1239 | ||
1240 | ||
1241 | ||
1242 | ||
1243 | ||
1244 | ||
1245 | ||
1246 | ||
1247 | ||
1248 | ||
1249 | ||
1250 | // any PARAMS parms go into naming of macro | |
1251 | ||
1252 | module ncu_i2cbufsii_ctl_msff_ctl_macro__width_32 ( | |
1253 | din, | |
1254 | l1clk, | |
1255 | scan_in, | |
1256 | siclk, | |
1257 | soclk, | |
1258 | dout, | |
1259 | scan_out); | |
1260 | wire [31:0] fdin; | |
1261 | wire [30:0] so; | |
1262 | ||
1263 | input [31:0] din; | |
1264 | input l1clk; | |
1265 | input scan_in; | |
1266 | ||
1267 | ||
1268 | input siclk; | |
1269 | input soclk; | |
1270 | ||
1271 | output [31:0] dout; | |
1272 | output scan_out; | |
1273 | assign fdin[31:0] = din[31:0]; | |
1274 | ||
1275 | ||
1276 | ||
1277 | ||
1278 | ||
1279 | ||
1280 | dff #(32) d0_0 ( | |
1281 | .l1clk(l1clk), | |
1282 | .siclk(siclk), | |
1283 | .soclk(soclk), | |
1284 | .d(fdin[31:0]), | |
1285 | .si({scan_in,so[30:0]}), | |
1286 | .so({so[30:0],scan_out}), | |
1287 | .q(dout[31:0]) | |
1288 | ); | |
1289 | ||
1290 | ||
1291 | ||
1292 | ||
1293 | ||
1294 | ||
1295 | ||
1296 | ||
1297 | ||
1298 | ||
1299 | ||
1300 | ||
1301 | endmodule | |
1302 | ||
1303 | ||
1304 | ||
1305 | ||
1306 | ||
1307 | ||
1308 | ||
1309 | ||
1310 | ||
1311 | ||
1312 | ||
1313 | ||
1314 | ||
1315 | // any PARAMS parms go into naming of macro | |
1316 | ||
1317 | module ncu_i2cbufsii_ctl_msff_ctl_macro__width_2 ( | |
1318 | din, | |
1319 | l1clk, | |
1320 | scan_in, | |
1321 | siclk, | |
1322 | soclk, | |
1323 | dout, | |
1324 | scan_out); | |
1325 | wire [1:0] fdin; | |
1326 | wire [0:0] so; | |
1327 | ||
1328 | input [1:0] din; | |
1329 | input l1clk; | |
1330 | input scan_in; | |
1331 | ||
1332 | ||
1333 | input siclk; | |
1334 | input soclk; | |
1335 | ||
1336 | output [1:0] dout; | |
1337 | output scan_out; | |
1338 | assign fdin[1:0] = din[1:0]; | |
1339 | ||
1340 | ||
1341 | ||
1342 | ||
1343 | ||
1344 | ||
1345 | dff #(2) d0_0 ( | |
1346 | .l1clk(l1clk), | |
1347 | .siclk(siclk), | |
1348 | .soclk(soclk), | |
1349 | .d(fdin[1:0]), | |
1350 | .si({scan_in,so[0:0]}), | |
1351 | .so({so[0:0],scan_out}), | |
1352 | .q(dout[1:0]) | |
1353 | ); | |
1354 | ||
1355 | ||
1356 | ||
1357 | ||
1358 | ||
1359 | ||
1360 | ||
1361 | ||
1362 | ||
1363 | ||
1364 | ||
1365 | ||
1366 | endmodule | |
1367 | ||
1368 | ||
1369 | ||
1370 | ||
1371 | ||
1372 | ||
1373 | ||
1374 | ||
1375 | ||
1376 | ||
1377 | ||
1378 | ||
1379 | ||
1380 | // any PARAMS parms go into naming of macro | |
1381 | ||
1382 | module ncu_i2cbufsii_ctl_msff_ctl_macro__en_1__width_32 ( | |
1383 | din, | |
1384 | en, | |
1385 | l1clk, | |
1386 | scan_in, | |
1387 | siclk, | |
1388 | soclk, | |
1389 | dout, | |
1390 | scan_out); | |
1391 | wire [31:0] fdin; | |
1392 | wire [30:0] so; | |
1393 | ||
1394 | input [31:0] din; | |
1395 | input en; | |
1396 | input l1clk; | |
1397 | input scan_in; | |
1398 | ||
1399 | ||
1400 | input siclk; | |
1401 | input soclk; | |
1402 | ||
1403 | output [31:0] dout; | |
1404 | output scan_out; | |
1405 | assign fdin[31:0] = (din[31:0] & {32{en}}) | (dout[31:0] & ~{32{en}}); | |
1406 | ||
1407 | ||
1408 | ||
1409 | ||
1410 | ||
1411 | ||
1412 | dff #(32) d0_0 ( | |
1413 | .l1clk(l1clk), | |
1414 | .siclk(siclk), | |
1415 | .soclk(soclk), | |
1416 | .d(fdin[31:0]), | |
1417 | .si({scan_in,so[30:0]}), | |
1418 | .so({so[30:0],scan_out}), | |
1419 | .q(dout[31:0]) | |
1420 | ); | |
1421 | ||
1422 | ||
1423 | ||
1424 | ||
1425 | ||
1426 | ||
1427 | ||
1428 | ||
1429 | ||
1430 | ||
1431 | ||
1432 | ||
1433 | endmodule | |
1434 | ||
1435 | ||
1436 | ||
1437 | ||
1438 | ||
1439 | ||
1440 | // any PARAMS parms go into naming of macro | |
1441 | ||
1442 | module ncu_i2cbufsii_ctl_msff_ctl_macro__en_1__width_128 ( | |
1443 | din, | |
1444 | en, | |
1445 | l1clk, | |
1446 | scan_in, | |
1447 | siclk, | |
1448 | soclk, | |
1449 | dout, | |
1450 | scan_out); | |
1451 | wire [127:0] fdin; | |
1452 | wire [126:0] so; | |
1453 | ||
1454 | input [127:0] din; | |
1455 | input en; | |
1456 | input l1clk; | |
1457 | input scan_in; | |
1458 | ||
1459 | ||
1460 | input siclk; | |
1461 | input soclk; | |
1462 | ||
1463 | output [127:0] dout; | |
1464 | output scan_out; | |
1465 | assign fdin[127:0] = (din[127:0] & {128{en}}) | (dout[127:0] & ~{128{en}}); | |
1466 | ||
1467 | ||
1468 | ||
1469 | ||
1470 | ||
1471 | ||
1472 | dff #(128) d0_0 ( | |
1473 | .l1clk(l1clk), | |
1474 | .siclk(siclk), | |
1475 | .soclk(soclk), | |
1476 | .d(fdin[127:0]), | |
1477 | .si({scan_in,so[126:0]}), | |
1478 | .so({so[126:0],scan_out}), | |
1479 | .q(dout[127:0]) | |
1480 | ); | |
1481 | ||
1482 | ||
1483 | ||
1484 | ||
1485 | ||
1486 | ||
1487 | ||
1488 | ||
1489 | ||
1490 | ||
1491 | ||
1492 | ||
1493 | endmodule | |
1494 | ||
1495 | ||
1496 | ||
1497 | ||
1498 | ||
1499 | ||
1500 | ||
1501 | ||
1502 | ||
1503 | ||
1504 | ||
1505 | ||
1506 | ||
1507 | // any PARAMS parms go into naming of macro | |
1508 | ||
1509 | module ncu_i2cbufsii_ctl_msff_ctl_macro__en_1__width_1 ( | |
1510 | din, | |
1511 | en, | |
1512 | l1clk, | |
1513 | scan_in, | |
1514 | siclk, | |
1515 | soclk, | |
1516 | dout, | |
1517 | scan_out); | |
1518 | wire [0:0] fdin; | |
1519 | ||
1520 | input [0:0] din; | |
1521 | input en; | |
1522 | input l1clk; | |
1523 | input scan_in; | |
1524 | ||
1525 | ||
1526 | input siclk; | |
1527 | input soclk; | |
1528 | ||
1529 | output [0:0] dout; | |
1530 | output scan_out; | |
1531 | assign fdin[0:0] = (din[0:0] & {1{en}}) | (dout[0:0] & ~{1{en}}); | |
1532 | ||
1533 | ||
1534 | ||
1535 | ||
1536 | ||
1537 | ||
1538 | dff #(1) d0_0 ( | |
1539 | .l1clk(l1clk), | |
1540 | .siclk(siclk), | |
1541 | .soclk(soclk), | |
1542 | .d(fdin[0:0]), | |
1543 | .si(scan_in), | |
1544 | .so(scan_out), | |
1545 | .q(dout[0:0]) | |
1546 | ); | |
1547 | ||
1548 | ||
1549 | ||
1550 | ||
1551 | ||
1552 | ||
1553 | ||
1554 | ||
1555 | ||
1556 | ||
1557 | ||
1558 | ||
1559 | endmodule | |
1560 | ||
1561 | ||
1562 | ||
1563 | ||
1564 | ||
1565 | ||
1566 | ||
1567 | ||
1568 | ||
1569 | ||
1570 | ||
1571 | ||
1572 | ||
1573 | // any PARAMS parms go into naming of macro | |
1574 | ||
1575 | module ncu_i2cbufsii_ctl_msff_ctl_macro__width_4 ( | |
1576 | din, | |
1577 | l1clk, | |
1578 | scan_in, | |
1579 | siclk, | |
1580 | soclk, | |
1581 | dout, | |
1582 | scan_out); | |
1583 | wire [3:0] fdin; | |
1584 | wire [2:0] so; | |
1585 | ||
1586 | input [3:0] din; | |
1587 | input l1clk; | |
1588 | input scan_in; | |
1589 | ||
1590 | ||
1591 | input siclk; | |
1592 | input soclk; | |
1593 | ||
1594 | output [3:0] dout; | |
1595 | output scan_out; | |
1596 | assign fdin[3:0] = din[3:0]; | |
1597 | ||
1598 | ||
1599 | ||
1600 | ||
1601 | ||
1602 | ||
1603 | dff #(4) d0_0 ( | |
1604 | .l1clk(l1clk), | |
1605 | .siclk(siclk), | |
1606 | .soclk(soclk), | |
1607 | .d(fdin[3:0]), | |
1608 | .si({scan_in,so[2:0]}), | |
1609 | .so({so[2:0],scan_out}), | |
1610 | .q(dout[3:0]) | |
1611 | ); | |
1612 | ||
1613 | ||
1614 | ||
1615 | ||
1616 | ||
1617 | ||
1618 | ||
1619 | ||
1620 | ||
1621 | ||
1622 | ||
1623 | ||
1624 | endmodule | |
1625 | ||
1626 | ||
1627 | ||
1628 | ||
1629 | ||
1630 | ||
1631 | ||
1632 | ||
1633 | ||
1634 | ||
1635 | ||
1636 | ||
1637 | ||
1638 | // any PARAMS parms go into naming of macro | |
1639 | ||
1640 | module ncu_i2cbufsii_ctl_msff_ctl_macro__en_1__width_16 ( | |
1641 | din, | |
1642 | en, | |
1643 | l1clk, | |
1644 | scan_in, | |
1645 | siclk, | |
1646 | soclk, | |
1647 | dout, | |
1648 | scan_out); | |
1649 | wire [15:0] fdin; | |
1650 | wire [14:0] so; | |
1651 | ||
1652 | input [15:0] din; | |
1653 | input en; | |
1654 | input l1clk; | |
1655 | input scan_in; | |
1656 | ||
1657 | ||
1658 | input siclk; | |
1659 | input soclk; | |
1660 | ||
1661 | output [15:0] dout; | |
1662 | output scan_out; | |
1663 | assign fdin[15:0] = (din[15:0] & {16{en}}) | (dout[15:0] & ~{16{en}}); | |
1664 | ||
1665 | ||
1666 | ||
1667 | ||
1668 | ||
1669 | ||
1670 | dff #(16) d0_0 ( | |
1671 | .l1clk(l1clk), | |
1672 | .siclk(siclk), | |
1673 | .soclk(soclk), | |
1674 | .d(fdin[15:0]), | |
1675 | .si({scan_in,so[14:0]}), | |
1676 | .so({so[14:0],scan_out}), | |
1677 | .q(dout[15:0]) | |
1678 | ); | |
1679 | ||
1680 | ||
1681 | ||
1682 | ||
1683 | ||
1684 | ||
1685 | ||
1686 | ||
1687 | ||
1688 | ||
1689 | ||
1690 | ||
1691 | endmodule | |
1692 | ||
1693 | ||
1694 | ||
1695 | ||
1696 | ||
1697 | ||
1698 | ||
1699 | ||
1700 | ||
1701 | ||
1702 | ||
1703 | ||
1704 | ||
1705 | // any PARAMS parms go into naming of macro | |
1706 | ||
1707 | module ncu_i2cbufsii_ctl_msff_ctl_macro__en_1__width_6 ( | |
1708 | din, | |
1709 | en, | |
1710 | l1clk, | |
1711 | scan_in, | |
1712 | siclk, | |
1713 | soclk, | |
1714 | dout, | |
1715 | scan_out); | |
1716 | wire [5:0] fdin; | |
1717 | wire [4:0] so; | |
1718 | ||
1719 | input [5:0] din; | |
1720 | input en; | |
1721 | input l1clk; | |
1722 | input scan_in; | |
1723 | ||
1724 | ||
1725 | input siclk; | |
1726 | input soclk; | |
1727 | ||
1728 | output [5:0] dout; | |
1729 | output scan_out; | |
1730 | assign fdin[5:0] = (din[5:0] & {6{en}}) | (dout[5:0] & ~{6{en}}); | |
1731 | ||
1732 | ||
1733 | ||
1734 | ||
1735 | ||
1736 | ||
1737 | dff #(6) d0_0 ( | |
1738 | .l1clk(l1clk), | |
1739 | .siclk(siclk), | |
1740 | .soclk(soclk), | |
1741 | .d(fdin[5:0]), | |
1742 | .si({scan_in,so[4:0]}), | |
1743 | .so({so[4:0],scan_out}), | |
1744 | .q(dout[5:0]) | |
1745 | ); | |
1746 | ||
1747 | ||
1748 | ||
1749 | ||
1750 | ||
1751 | ||
1752 | ||
1753 | ||
1754 | ||
1755 | ||
1756 | ||
1757 | ||
1758 | endmodule | |
1759 | ||
1760 | ||
1761 | ||
1762 | ||
1763 | ||
1764 | ||
1765 | ||
1766 | ||
1767 | ||
1768 | ||
1769 | ||
1770 | ||
1771 | ||
1772 | // any PARAMS parms go into naming of macro | |
1773 | ||
1774 | module ncu_i2cbufsii_ctl_msff_ctl_macro__width_6 ( | |
1775 | din, | |
1776 | l1clk, | |
1777 | scan_in, | |
1778 | siclk, | |
1779 | soclk, | |
1780 | dout, | |
1781 | scan_out); | |
1782 | wire [5:0] fdin; | |
1783 | wire [4:0] so; | |
1784 | ||
1785 | input [5:0] din; | |
1786 | input l1clk; | |
1787 | input scan_in; | |
1788 | ||
1789 | ||
1790 | input siclk; | |
1791 | input soclk; | |
1792 | ||
1793 | output [5:0] dout; | |
1794 | output scan_out; | |
1795 | assign fdin[5:0] = din[5:0]; | |
1796 | ||
1797 | ||
1798 | ||
1799 | ||
1800 | ||
1801 | ||
1802 | dff #(6) d0_0 ( | |
1803 | .l1clk(l1clk), | |
1804 | .siclk(siclk), | |
1805 | .soclk(soclk), | |
1806 | .d(fdin[5:0]), | |
1807 | .si({scan_in,so[4:0]}), | |
1808 | .so({so[4:0],scan_out}), | |
1809 | .q(dout[5:0]) | |
1810 | ); | |
1811 | ||
1812 | ||
1813 | ||
1814 | ||
1815 | ||
1816 | ||
1817 | ||
1818 | ||
1819 | ||
1820 | ||
1821 | ||
1822 | ||
1823 | endmodule | |
1824 | ||
1825 | ||
1826 | ||
1827 | ||
1828 | ||
1829 | ||
1830 | ||
1831 | ||
1832 | ||
1833 | ||
1834 | ||
1835 | ||
1836 | ||
1837 | // any PARAMS parms go into naming of macro | |
1838 | ||
1839 | module ncu_i2cbufsii_ctl_msff_ctl_macro__en_1__width_64 ( | |
1840 | din, | |
1841 | en, | |
1842 | l1clk, | |
1843 | scan_in, | |
1844 | siclk, | |
1845 | soclk, | |
1846 | dout, | |
1847 | scan_out); | |
1848 | wire [63:0] fdin; | |
1849 | wire [62:0] so; | |
1850 | ||
1851 | input [63:0] din; | |
1852 | input en; | |
1853 | input l1clk; | |
1854 | input scan_in; | |
1855 | ||
1856 | ||
1857 | input siclk; | |
1858 | input soclk; | |
1859 | ||
1860 | output [63:0] dout; | |
1861 | output scan_out; | |
1862 | assign fdin[63:0] = (din[63:0] & {64{en}}) | (dout[63:0] & ~{64{en}}); | |
1863 | ||
1864 | ||
1865 | ||
1866 | ||
1867 | ||
1868 | ||
1869 | dff #(64) d0_0 ( | |
1870 | .l1clk(l1clk), | |
1871 | .siclk(siclk), | |
1872 | .soclk(soclk), | |
1873 | .d(fdin[63:0]), | |
1874 | .si({scan_in,so[62:0]}), | |
1875 | .so({so[62:0],scan_out}), | |
1876 | .q(dout[63:0]) | |
1877 | ); | |
1878 | ||
1879 | ||
1880 | ||
1881 | ||
1882 | ||
1883 | ||
1884 | ||
1885 | ||
1886 | ||
1887 | ||
1888 | ||
1889 | ||
1890 | endmodule | |
1891 | ||
1892 | ||
1893 | ||
1894 | ||
1895 | ||
1896 | ||
1897 | ||
1898 | ||
1899 | ||
1900 | ||
1901 | ||
1902 | ||
1903 | ||
1904 | // any PARAMS parms go into naming of macro | |
1905 | ||
1906 | module ncu_i2cbufsii_ctl_msff_ctl_macro__en_1__width_140 ( | |
1907 | din, | |
1908 | en, | |
1909 | l1clk, | |
1910 | scan_in, | |
1911 | siclk, | |
1912 | soclk, | |
1913 | dout, | |
1914 | scan_out); | |
1915 | wire [139:0] fdin; | |
1916 | wire [138:0] so; | |
1917 | ||
1918 | input [139:0] din; | |
1919 | input en; | |
1920 | input l1clk; | |
1921 | input scan_in; | |
1922 | ||
1923 | ||
1924 | input siclk; | |
1925 | input soclk; | |
1926 | ||
1927 | output [139:0] dout; | |
1928 | output scan_out; | |
1929 | assign fdin[139:0] = (din[139:0] & {140{en}}) | (dout[139:0] & ~{140{en}}); | |
1930 | ||
1931 | ||
1932 | ||
1933 | ||
1934 | ||
1935 | ||
1936 | dff #(140) d0_0 ( | |
1937 | .l1clk(l1clk), | |
1938 | .siclk(siclk), | |
1939 | .soclk(soclk), | |
1940 | .d(fdin[139:0]), | |
1941 | .si({scan_in,so[138:0]}), | |
1942 | .so({so[138:0],scan_out}), | |
1943 | .q(dout[139:0]) | |
1944 | ); | |
1945 | ||
1946 | ||
1947 | ||
1948 | ||
1949 | ||
1950 | ||
1951 | ||
1952 | ||
1953 | ||
1954 | ||
1955 | ||
1956 | ||
1957 | endmodule | |
1958 | ||
1959 | ||
1960 | ||
1961 | ||
1962 | ||
1963 | ||
1964 | ||
1965 | ||
1966 | ||
1967 | ||
1968 | ||
1969 | ||
1970 | ||
1971 | // any PARAMS parms go into naming of macro | |
1972 | ||
1973 | module ncu_i2cbufsii_ctl_l1clkhdr_ctl_macro ( | |
1974 | l2clk, | |
1975 | l1en, | |
1976 | pce_ov, | |
1977 | stop, | |
1978 | se, | |
1979 | l1clk); | |
1980 | ||
1981 | ||
1982 | input l2clk; | |
1983 | input l1en; | |
1984 | input pce_ov; | |
1985 | input stop; | |
1986 | input se; | |
1987 | output l1clk; | |
1988 | ||
1989 | ||
1990 | ||
1991 | ||
1992 | ||
1993 | cl_sc1_l1hdr_8x c_0 ( | |
1994 | ||
1995 | ||
1996 | .l2clk(l2clk), | |
1997 | .pce(l1en), | |
1998 | .l1clk(l1clk), | |
1999 | .se(se), | |
2000 | .pce_ov(pce_ov), | |
2001 | .stop(stop) | |
2002 | ); | |
2003 | ||
2004 | ||
2005 | ||
2006 | endmodule | |
2007 | ||
2008 | ||
2009 | ||
2010 | ||
2011 | ||
2012 | ||
2013 | ||
2014 |