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1 | // ========== Copyright Header Begin ========================================== |
2 | // | |
3 | // OpenSPARC T2 Processor File: phy_dpath.v | |
4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
6 | // | |
7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
8 | // | |
9 | // This program is free software; you can redistribute it and/or modify | |
10 | // it under the terms of the GNU General Public License as published by | |
11 | // the Free Software Foundation; version 2 of the License. | |
12 | // | |
13 | // This program is distributed in the hope that it will be useful, | |
14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | // GNU General Public License for more details. | |
17 | // | |
18 | // You should have received a copy of the GNU General Public License | |
19 | // along with this program; if not, write to the Free Software | |
20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | // | |
22 | // For the avoidance of doubt, and except that if any non-GPL license | |
23 | // choice is available it will apply instead, Sun elects to use only | |
24 | // the General Public License version 2 (GPLv2) at this time for any | |
25 | // software where a choice of GPL license versions is made | |
26 | // available with the language indicating that GPLv2 or any later version | |
27 | // may be used, or where a choice of which version of the GPL is applied is | |
28 | // otherwise unspecified. | |
29 | // | |
30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
32 | // have any questions. | |
33 | // | |
34 | // ========== Copyright Header End ============================================ | |
35 | /*%W% %G%*/ | |
36 | /************************************************************************* | |
37 | * | |
38 | * File Name : phy_dpath | |
39 | * Author Name : John Lo | |
40 | * Description : This module is composed of some simple logic | |
41 | * (i.e. muxes, buffers, small gates) which ties | |
42 | * together the different physical interfaces GEM | |
43 | * supports. | |
44 | * | |
45 | * The MAC will accept a clock from the SERDES if | |
46 | * the external MII/GMII is not being used. If it | |
47 | * is being used, the nclk_div2 clocks are buffered | |
48 | * and given to MAC. Otherwise these are ignored. | |
49 | * | |
50 | * PCS will get its transmit clock from the refclk | |
51 | * pin. | |
52 | * | |
53 | * Parent Module: bmac_pcs_core or xmac_pcs_core | |
54 | * Interface Mod: | |
55 | * Date Created : 8/30/01 | |
56 | * | |
57 | * Copyright (c) 2003, Sun Microsystems, Inc. | |
58 | * Sun Proprietary and Confidential | |
59 | * | |
60 | * Modification : | |
61 | * | |
62 | * Synthesis Notes: | |
63 | * | |
64 | *************************************************************************/ | |
65 | ||
66 | ||
67 | module phy_dpath( | |
68 | phy_mode, | |
69 | rxd_int, // from PCS block | |
70 | rx_dv_int, // from PCS block | |
71 | rx_er_int, // from PCS block | |
72 | crs_int, // from PCS block | |
73 | col_int, // from PCS block | |
74 | gmii_rxd, // from external gmii interface | |
75 | gmii_rx_dv, // from external gmii interface | |
76 | gmii_rx_err, // from external gmii interface | |
77 | gmii_crs, // from external gmii interface | |
78 | gmii_col, // from external gmii interface | |
79 | // outputs | |
80 | mii_rxd, // to MAC | |
81 | mii_rx_dv, // to MAC | |
82 | mii_rx_err, // to MAC | |
83 | mii_crs, // to MAC | |
84 | mii_col // to MAC | |
85 | ); | |
86 | ||
87 | ||
88 | input phy_mode; | |
89 | input [7:0] rxd_int; // from PCS block | |
90 | input rx_dv_int; // from PCS block | |
91 | input rx_er_int; // from PCS block | |
92 | input crs_int; // from PCS block | |
93 | input col_int; // from PCS block | |
94 | input [7:0] gmii_rxd; // from external gmii interface | |
95 | input gmii_rx_dv; // from external gmii interface | |
96 | input gmii_rx_err; // from external gmii interface | |
97 | input gmii_crs; // from external gmii interface | |
98 | input gmii_col; // from external gmii interface | |
99 | // outputs | |
100 | output [7:0] mii_rxd; // to MAC | |
101 | output mii_rx_dv; // to MAC | |
102 | output mii_rx_err; // to MAC | |
103 | output mii_crs; // to MAC | |
104 | output mii_col; // to MAC | |
105 | ||
106 | ||
107 | // in vega design, | |
108 | // phy_mode (pcs_bypass) == 1 -> use rgmii interface and disable internal pcs. | |
109 | // phy_mode (pcs_bypass) == 0 -> use internal pcs. | |
110 | ||
111 | MUX2TO1 #(8) MUX_RXD_GMII (.dout(mii_rxd),.sel(phy_mode), | |
112 | .data0(rxd_int[7:0]), | |
113 | .data1(gmii_rxd[7:0])); | |
114 | MUX2TO1 #(1) MUX_RX_DV_GMII (.dout(mii_rx_dv),.sel(phy_mode), | |
115 | .data0(rx_dv_int), | |
116 | .data1(gmii_rx_dv)); | |
117 | MUX2TO1 #(1) MUX_RX_ER_GMII (.dout(mii_rx_err),.sel(phy_mode), | |
118 | .data0(rx_er_int), | |
119 | .data1(gmii_rx_err)); | |
120 | MUX2TO1 #(1) MUX_CRS_GMII (.dout(mii_crs),.sel(phy_mode), | |
121 | .data0(crs_int), | |
122 | .data1(gmii_crs)); | |
123 | MUX2TO1 #(1) MUX_COL_GMII (.dout(mii_col),.sel(phy_mode), | |
124 | .data0(col_int), | |
125 | .data1(gmii_col)); | |
126 | ||
127 | ||
128 | ||
129 | endmodule |