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1 | // ========== Copyright Header Begin ========================================== |
2 | // | |
3 | // OpenSPARC T2 Processor File: rtx_n2_efuhdr1a_p0_msff_ctl_macro__width_4.v | |
4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
6 | // | |
7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
8 | // | |
9 | // This program is free software; you can redistribute it and/or modify | |
10 | // it under the terms of the GNU General Public License as published by | |
11 | // the Free Software Foundation; version 2 of the License. | |
12 | // | |
13 | // This program is distributed in the hope that it will be useful, | |
14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | // GNU General Public License for more details. | |
17 | // | |
18 | // You should have received a copy of the GNU General Public License | |
19 | // along with this program; if not, write to the Free Software | |
20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | // | |
22 | // For the avoidance of doubt, and except that if any non-GPL license | |
23 | // choice is available it will apply instead, Sun elects to use only | |
24 | // the General Public License version 2 (GPLv2) at this time for any | |
25 | // software where a choice of GPL license versions is made | |
26 | // available with the language indicating that GPLv2 or any later version | |
27 | // may be used, or where a choice of which version of the GPL is applied is | |
28 | // otherwise unspecified. | |
29 | // | |
30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
32 | // have any questions. | |
33 | // | |
34 | // ========== Copyright Header End ============================================ | |
35 | ||
36 | ||
37 | ||
38 | ||
39 | ||
40 | // any PARAMS parms go into naming of macro | |
41 | ||
42 | module rtx_n2_efuhdr1a_p0_msff_ctl_macro__width_4 ( | |
43 | din, | |
44 | l1clk, | |
45 | scan_in, | |
46 | siclk, | |
47 | soclk, | |
48 | dout, | |
49 | scan_out); | |
50 | wire [3:0] fdin; | |
51 | wire [3:1] sout; | |
52 | ||
53 | input [ 3 : 0 ] din; | |
54 | input l1clk; | |
55 | input scan_in; | |
56 | ||
57 | ||
58 | input siclk; | |
59 | input soclk; | |
60 | ||
61 | output [ 3 : 0 ] dout; | |
62 | output scan_out; | |
63 | assign fdin[ 3 : 0 ] = din[ 3 : 0 ]; | |
64 | ||
65 | ||
66 | ||
67 | ||
68 | ||
69 | ||
70 | ||
71 | ||
72 | ||
73 | ||
74 | ||
75 | ||
76 | ||
77 | ||
78 | ||
79 | ||
80 | cl_a1_msff_4x d0_0 ( | |
81 | .l1clk(l1clk), | |
82 | .siclk(siclk), | |
83 | .soclk(soclk), | |
84 | .d(fdin[ 0 ]), | |
85 | .si(sout[ 1 ]), | |
86 | .so(scan_out), | |
87 | .q(dout[ 0 ]) | |
88 | ); | |
89 | cl_a1_msff_4x d0_1 ( | |
90 | .l1clk(l1clk), | |
91 | .siclk(siclk), | |
92 | .soclk(soclk), | |
93 | .d(fdin[ 1 ]), | |
94 | .si(sout[ 2 ]), | |
95 | .so(sout[ 1 ]), | |
96 | .q(dout[ 1 ]) | |
97 | ); | |
98 | cl_a1_msff_4x d0_2 ( | |
99 | .l1clk(l1clk), | |
100 | .siclk(siclk), | |
101 | .soclk(soclk), | |
102 | .d(fdin[ 2 ]), | |
103 | .si(sout[ 3 ]), | |
104 | .so(sout[ 2 ]), | |
105 | .q(dout[ 2 ]) | |
106 | ); | |
107 | cl_a1_msff_4x d0_3 ( | |
108 | .l1clk(l1clk), | |
109 | .siclk(siclk), | |
110 | .soclk(soclk), | |
111 | .d(fdin[ 3 ]), | |
112 | .si(scan_in), | |
113 | .so(sout[ 3 ]), | |
114 | .q(dout[ 3 ]) | |
115 | ); | |
116 | ||
117 | ||
118 | ||
119 | ||
120 | endmodule | |
121 | ||
122 | ||
123 | ||
124 | ||
125 | ||
126 | ||
127 | ||
128 |