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86530b38 AT |
1 | """provide user commands' equivalent of function calls. |
2 | """ | |
3 | ||
4 | import re, sys | |
5 | ||
6 | import RegisterMap | |
7 | ||
8 | import Pfe_Tlb | |
9 | import Pfe_Assembler | |
10 | ||
11 | NAME_CPU = 'cpu' | |
12 | NAME_CORE = 'core' | |
13 | NAME_UCORE = 'ucore' | |
14 | NAME_STRAND = 'strand' | |
15 | ||
16 | TRAP_LEVEL = 6 | |
17 | ||
18 | # before any function in this file is used, the following global variables | |
19 | # must be assigned a valid object. | |
20 | _myReposit = None # RiesReposit object | |
21 | _myRegmap = None | |
22 | _asiRegMap = {} | |
23 | _myNstrandObj = 1 | |
24 | _myCpusize = 0 | |
25 | _myCoresize = 0 | |
26 | _myuCoresize = 0 | |
27 | ||
28 | _myStrandMap = { } | |
29 | _myuCoreMap = { } | |
30 | _myCoreMap = { } | |
31 | _myCpuMap = { } | |
32 | ||
33 | _myInstrCount = { } | |
34 | _myLastTid = 0 | |
35 | ||
36 | _myVerbose = 1 | |
37 | ||
38 | # zzz_cmd_RS() function registry | |
39 | # API_DOCS[api-ext]=('api-ext syntax', 'API-EXT', 'short-desc', 'long-desc') | |
40 | # RS_zzz() API registry | |
41 | # API_DOCS[api]=('api syntax', 'API', 'short-desc', 'long-desc') | |
42 | API_DOCS = { } | |
43 | ||
44 | ||
45 | class AddrType: | |
46 | """ | |
47 | the origin of an address | |
48 | """ | |
49 | PA_TYPE = 0 | |
50 | RA_TYPE = 1 | |
51 | VA_TYPE = 2 | |
52 | ||
53 | ||
54 | class InstrInfo: | |
55 | """a class contins instr information | |
56 | TODO need more work/fields | |
57 | """ | |
58 | def __init__ (self, name, type): | |
59 | """ | |
60 | """ | |
61 | self.name = name | |
62 | self.type = type | |
63 | ||
64 | ||
65 | def initCmdParserNiCmd (reposit, nstrandObjs): | |
66 | """this function must be called before any other functions in this file | |
67 | can be used. | |
68 | """ | |
69 | global _myReposit | |
70 | global _myNstrandObj | |
71 | global _myCpusize | |
72 | global _myCoresize | |
73 | global _myuCoresize | |
74 | global _myInstrCount | |
75 | global _asiRegMap | |
76 | global _myRegmap | |
77 | ||
78 | ## global nasUtil | |
79 | ||
80 | _myReposit = reposit | |
81 | _myRegmap = RegisterMap.RegisterMap(reposit.optdir['--ar']) | |
82 | if _myReposit.nucores == 0: | |
83 | _myCpusize = _myReposit.ncores * _myReposit.nstrands | |
84 | _myCoresize = _myReposit.nstrands | |
85 | _myuCoresize = 1 | |
86 | else: | |
87 | _myCpusize = _myReposit.ncores * _myReposit.nucores * _myReposit.nstrands | |
88 | _myCoresize = _myReposit.nucores * _myReposit.nstrands | |
89 | _myuCoresize = _myReposit.nstrands | |
90 | ||
91 | total = _myCpusize * _myReposit.ncpus | |
92 | if total != nstrandObjs: | |
93 | sys.stderr.write('WARNING: CmdParserNiCmd: initCmdParserNiCmd: total=%d, nstrandObjs=%d\n' % (total, nstrandObjs)) | |
94 | ||
95 | _myNstrandObj = nstrandObjs | |
96 | i = 0 | |
97 | while i < _myNstrandObj: | |
98 | _myInstrCount[i] = 0 | |
99 | i += 1 | |
100 | ||
101 | asiRegMap = _myRegmap.regMapAsi | |
102 | for reg in asiRegMap: | |
103 | regName = reg | |
104 | asi = asiRegMap[reg][0] | |
105 | va = asiRegMap[reg][1] | |
106 | # ha144505: commented this out as asi_alias is per strand | |
107 | # and should be called for each strand. This here is wrong | |
108 | # and we're having trouble gettiung the Sam Front end to work. | |
109 | # TODO TODO TODO TODO TODO cleanup | |
110 | ||
111 | # registering an alias with a single strand, registers it for | |
112 | # all the strands ... uncommented | |
113 | # ERROR: Pfe_Strand.GetAttrError: The strand has no getable state member 'asi_alias' | |
114 | #_myReposit.riesling.s[0].asi_alias(regName,asi,va) | |
115 | ||
116 | _asiRegMap = asiRegMap | |
117 | _initDoc() | |
118 | ||
119 | ||
120 | def _initDoc (): | |
121 | """ATTENTION!! remember to register any additional zzz_cmd_RS() or | |
122 | RS_zzz() document. | |
123 | """ | |
124 | global API_DOCS | |
125 | ||
126 | API_DOCS['RS_set_quiet'] = ("RS_set_quiet(num)", 'API', 'num=1 enable quiet mode, 0 disable it', 'TODO') | |
127 | API_DOCS['RS_logical_to_physical'] = ("RS_logical_to_physical(tid,type,addr)", 'API', 'convert logical address to physical address', 'TODO') | |
128 | API_DOCS['RS_write_phys_memory'] = ("RS_write_phys_memory(tid,addr,value,size)", 'API', 'write to a physical memory', 'TODO') | |
129 | API_DOCS['RS_read_phys_memory'] = ("RS_read_phys_memory(tid,addr,size)", 'API', 'read from a physical memory', 'TODO') | |
130 | API_DOCS['RS_disassemble'] = ("RS_disassemble(tid,addr,isva)", 'API', 'disassemble an instruction', 'TODO') | |
131 | API_DOCS['RS_disassemblePC'] = ("RS_disassemblePC(tid)", 'API', 'disassemble the just executed instruction', 'TODO') | |
132 | API_DOCS['RS_read_fp_register_x'] = ("RS_read_fp_register_x(tid,regid)", 'API', 'read from a floating-point double register' ,'TODO') | |
133 | API_DOCS['RS_read_fp_register_i'] = ("RS_read_fp_register_i(tid,regid)", 'API', 'read from a floating-point single register' ,'TODO') | |
134 | API_DOCS['RS_write_fp_register_x'] = ("RS_write_fp_register_x(tid,regid,value)", 'API', 'write to a floating-point double register' ,'TODO') | |
135 | API_DOCS['RS_write_fp_register_i'] = ("RS_write_fp_register_i(tid,regid,value)", 'API', 'write to a floating-point single register' ,'TODO') | |
136 | API_DOCS['RS_print_archregs'] = ("RS_print_archregs(tid=0,a_str='')", 'API', 'print out integer/floating-point/control registers', 'TODO') | |
137 | API_DOCS['RS_print_regs'] = ("RS_print_regs(tid=0,a_str='')", 'API', 'print out integer/floating-point/control registers', 'TODO') | |
138 | API_DOCS['RS_print_fpregs'] = ("RS_print_fpregs(tid=0)", 'API', 'print out floating-point registers', 'TODO') | |
139 | API_DOCS['RS_print_mmuregs'] = ("RS_print_mmuregs(tid=0)", 'API', 'print out mmu regsiters', 'TODO') | |
140 | API_DOCS['RS_print_cmpregs'] = ("RS_print_cmpregs(tid=0)", 'API', 'print out cmp regsiters', 'TODO') | |
141 | API_DOCS['RS_get_register_number'] = ("RS_get_register_number(tid,regname)", 'API', 'convert a regname to a regid', 'TODO') | |
142 | API_DOCS['RS_write_register'] = ("RS_write_register(tid,regid,value)", 'API', 'write to a register by regid', 'TODO') | |
143 | API_DOCS['RS_write_register_name'] = ("RS_write_register_name(regname,value,tid=0)", 'API', 'write to a register by regname', 'TODO') | |
144 | API_DOCS['RS_read_register'] = ("RS_read_register(tid,regid)", 'API', 'read a register by regid', 'TODO') | |
145 | API_DOCS['RS_read_register_name'] = ("RS_read_register_name(regname,tid=0)", 'API', 'read a register by regname', 'TODO') | |
146 | API_DOCS['RS_asi_read'] = ("RS_asi_read(asi,va,tid)", 'API', 'read an asi value by asi/va', 'TODO') | |
147 | API_DOCS['RS_asi_write'] = ("RS_asi_write(asi,va,value,tid)", 'API', 'write an asi value by asi/va', 'TODO') | |
148 | API_DOCS['RS_dump_tlb'] = ("RS_dump_tlb(tid,itlb,valid)", 'API', 'dump i/d-tlb content', 'TODO') | |
149 | API_DOCS['RS_dump_memory'] = ("RS_dump_memory(fileName,startPA,size,binary=0)", 'API', 'dump memory content', 'TODO') | |
150 | ||
151 | ||
152 | def showApiDoc (key=None): | |
153 | """return 1 means a match is found, 0 means no match | |
154 | """ | |
155 | if key: | |
156 | # strip off ' ', '(', or ')', they are not part of the key | |
157 | i = key.find('(') | |
158 | if i > -1: | |
159 | key = key[:i] | |
160 | key = key.strip() | |
161 | if API_DOCS.has_key(key): | |
162 | (func,type,shortd,longd) = API_DOCS[key] | |
163 | print '%s: %s: \t%s' % (type, func, shortd) | |
164 | if longd and longd != 'TODO': | |
165 | print '\t\t%s' % (longd) | |
166 | return 1 | |
167 | else: | |
168 | return 0 | |
169 | else: | |
170 | # show all docs | |
171 | byType = { } | |
172 | for (key2,(func,type,shortd,longd)) in API_DOCS.items(): | |
173 | if not byType.has_key(type): | |
174 | byType[type] = { } | |
175 | byType[type][key2] = (func,type,shortd,longd) | |
176 | klist = byType.keys() | |
177 | klist.sort() | |
178 | for key2 in klist: | |
179 | klist3 = byType[key2].keys() | |
180 | klist3.sort() | |
181 | for key3 in klist3: | |
182 | (func,type,shortd,longd) = byType[key2][key3] | |
183 | #print '%s: %s: \t%s' % (type, func, shortd) | |
184 | print '%s: %s' % (type, func) | |
185 | return 1 | |
186 | ||
187 | ||
188 | ||
189 | def _evalCmd (cmd): | |
190 | """ | |
191 | """ | |
192 | #print '#DBX: cmd=', cmd | |
193 | #sys.stdout.write(cmd +"\n") | |
194 | return eval(cmd, _myReposit.globals, locals()) | |
195 | ||
196 | def _execCmd (cmd): | |
197 | """ | |
198 | """ | |
199 | exec cmd in _myReposit.globals, locals() | |
200 | return | |
201 | ||
202 | ############################################################################### | |
203 | ||
204 | def incrIcount_RSI (tid, count=1): | |
205 | """RSI means riesling internal, not meant for general users | |
206 | """ | |
207 | global _myInstrCount | |
208 | global _myLastTid | |
209 | ||
210 | _myInstrCount[tid] += count | |
211 | _myLastTid = tid | |
212 | ||
213 | ||
214 | def getIcount_RSI (tid): | |
215 | """ | |
216 | """ | |
217 | return _myInstrCount[tid] | |
218 | ||
219 | ||
220 | def setLastTid_RSI (tid): | |
221 | """ | |
222 | """ | |
223 | global _myLastTid | |
224 | ||
225 | _myLastTid = tid | |
226 | ||
227 | ||
228 | def getLastTid_RSI (): | |
229 | """ | |
230 | """ | |
231 | return _myLastTid | |
232 | ||
233 | ||
234 | def isVerbose (): | |
235 | """ | |
236 | """ | |
237 | return _myVerbose | |
238 | ||
239 | ############################################################################### | |
240 | ||
241 | def sstepi_cmd_RS (thStr): | |
242 | """e.g., thStr='l0' | |
243 | """ | |
244 | tid = int(thStr[1:]) | |
245 | # get the pc before stepping | |
246 | pc = _myReposit.riesling.s[tid].pc | |
247 | # step one instr | |
248 | _myReposit.riesling.s[tid].step() | |
249 | # increase instr count | |
250 | incrIcount_RSI(tid) | |
251 | ||
252 | def pregs_cmd_RS (tid=0, a_str=''): | |
253 | """wrapper for RS_print_archregs(), depricated. | |
254 | """ | |
255 | RS_print_archregs(tid, a_str) | |
256 | ||
257 | ||
258 | def pregsMmu_cmd_RS (tid=0): | |
259 | """wrapper for RS_print_mmuregs(), depricated. | |
260 | """ | |
261 | RS_print_mmuregs(tid) | |
262 | ||
263 | ||
264 | def _readCtlReg(cmd, regname, i, stride, buffer): | |
265 | """ | |
266 | """ | |
267 | buffer.append('%s=%#x ' % (regname, _evalCmd(cmd))) | |
268 | i = _addEOL(i, stride, buffer) | |
269 | return i | |
270 | ||
271 | ||
272 | def _addEOL (i, stride, buffer): | |
273 | """ | |
274 | """ | |
275 | i += 1 | |
276 | if i % stride == 0: | |
277 | buffer.append('\n') | |
278 | return i | |
279 | ||
280 | ||
281 | def obj_read_reg_cmd_RS (tid, regname): | |
282 | """obj_read_reg_cmd(th_obj, "pc"): | |
283 | """ | |
284 | ||
285 | if not _myRegmap.hasReg(regname) or _myRegmap.feName2beName(regname) == '': | |
286 | sys.stdout.write("Unimplemented register %s access\n" % (regname,)) | |
287 | return | |
288 | ||
289 | newCmd = '%s.s[%d].%s' % (_myReposit.topName,tid,regname) | |
290 | return _evalCmd(newCmd) | |
291 | ||
292 | ############################################################################### | |
293 | ||
294 | def RS_set_quiet(num): | |
295 | """ | |
296 | 0 --- verbose mode, instr & reg delta | |
297 | 1 --- silent mode | |
298 | 2 --- verbose mode, instr only | |
299 | """ | |
300 | global _myVerbose | |
301 | ||
302 | if num == 1: | |
303 | _myVerbose = 0 | |
304 | _lstmode(0) | |
305 | elif num == 0: | |
306 | _myVerbose = 1 | |
307 | _lstmode(1) | |
308 | elif num == 2: | |
309 | _myVerbose = 1 | |
310 | _lstmode(2) | |
311 | else: | |
312 | raise RuntimeError | |
313 | ||
314 | ||
315 | def _lstmode(mode): | |
316 | """ | |
317 | """ | |
318 | for s in _myReposit.riesling.s: | |
319 | s.lstmode(mode) | |
320 | ||
321 | ||
322 | def RS_proc_no_2_ptr(tid): | |
323 | """th_obj= RS_proc_no_2_ptr(tid) | |
324 | """ | |
325 | # for our Ni command parsing purpose, the tid is quite enough | |
326 | return tid | |
327 | ||
328 | ||
329 | def RS_current_processor (): | |
330 | """ | |
331 | """ | |
332 | return _myLastTid | |
333 | ||
334 | ||
335 | def RS_logical_to_physical (tid, vaddr, addr_type=AddrType.VA_TYPE, pid=None, ctxt=None): | |
336 | """ | |
337 | addr_type: 0 - pa, 1 - ra, 2 - va | |
338 | """ | |
339 | # va2pa() always check itlb, then dtlb. | |
340 | if addr_type == AddrType.VA_TYPE: | |
341 | # try va2pa first, if not found, then ra2pa | |
342 | type = addr_type | |
343 | if pid != None and ctxt != None: | |
344 | pa = _myReposit.riesling.s[tid].va2pa(vaddr, ctxt, pid) | |
345 | elif ctxt != None: | |
346 | pa = _myReposit.riesling.s[tid].va2pa(vaddr, ctxt) | |
347 | else: | |
348 | pa = _myReposit.riesling.s[tid].va2pa(vaddr) | |
349 | if pa == 0: | |
350 | # try ra2pa | |
351 | type = AddrType.RA_TYPE | |
352 | if pid != None: | |
353 | pa = _myReposit.riesling.s[tid].ra2pa(vaddr, pid) | |
354 | else: | |
355 | pa = _myReposit.riesling.s[tid].ra2pa(vaddr) | |
356 | elif addr_type == AddrType.RA_TYPE: | |
357 | # go straight to ra2pa | |
358 | type = addr_type | |
359 | if pid != None: | |
360 | pa = _myReposit.riesling.s[tid].ra2pa(vaddr, pid) | |
361 | else: | |
362 | pa = _myReposit.riesling.s[tid].ra2pa(vaddr) | |
363 | else: | |
364 | type = addr_type | |
365 | pa = vaddr | |
366 | ||
367 | # if no translation is needed, 0 will be returned, so we should return | |
368 | # the input addr instead of 0 | |
369 | if pa == 0: | |
370 | ## if addr_type == 2: | |
371 | ## sys.stderr.write('WARNING: no va2pa is performed, original addr is returned\n') | |
372 | ## elif addr_type == 1: | |
373 | ## sys.stderr.write('WARNING: no ra2pa is performed, original addr is returned\n') | |
374 | type = AddrType.PA_TYPE | |
375 | pa = vaddr | |
376 | ||
377 | return (pa,type) | |
378 | ||
379 | ||
380 | def RS_write_phys_memory (tid, addr, value, size): | |
381 | """RS_write_phys_memory(th_obj, 0x9a00000000, orig_tid, 4): | |
382 | """ | |
383 | #sys.stderr.write('DBX: RS_write_phys_memory: tid=%d, addr=%#x, value=%#x, size=%d\n' % (tid, addr, value, size)) | |
384 | ||
385 | if not size in [1,2,4,8]: | |
386 | sys.stderr.write('ERROR: RS_write_phys_memory: wrong size %d, must be 1,2,4,8-byte\n' % (size)) | |
387 | return None | |
388 | ||
389 | if long(addr) % size: | |
390 | sys.stderr.write('ERROR: write_phys_memory: addr %#x is not %d-byte aligned\n' % (addr, size)) | |
391 | return None | |
392 | ||
393 | if size == 1: | |
394 | _myReposit.riesling.mem.b[addr] = value | |
395 | elif size == 2: | |
396 | _myReposit.riesling.mem.h[addr] = value | |
397 | elif size == 4: | |
398 | _myReposit.riesling.mem.w[addr] = value | |
399 | else: | |
400 | _myReposit.riesling.mem.x[addr] = value | |
401 | ||
402 | # with type 'K', we can pass over uint64_t value with bit63=1 | |
403 | ## if size == 8 and value > 0x7fffffffffffffff: | |
404 | ## #TODO I am having difficulty in passing larger value to c++ code, | |
405 | ## # always get "OverflowError: long too big to convert" error, | |
406 | ## # have to split the large value into two 4-byte pieces --- | |
407 | ## # waiting for an explanation/solution from python community. | |
408 | ## # 10/13/04 | |
409 | ## value1 = value >> 32 # upper 32-bit | |
410 | ## value2 = value & 0x00000000ffffffffL # lower 32-bit | |
411 | ## nasUtil.access_cmd(addr, value1, tid, 0, 4) | |
412 | ## nasUtil.access_cmd(addr+4, value2, tid, 0, 4) | |
413 | ## else: | |
414 | ## nasUtil.access_cmd(addr, value, tid, 0, size) | |
415 | ||
416 | ||
417 | def RS_read_phys_memory (tid, addr, size): | |
418 | """ | |
419 | """ | |
420 | #sys.stderr.write('DBX: RS_read_phys_memory: tid=%d, addr=%#x, size=%d\n' % (tid, addr, size)) | |
421 | # the data is returned as L, if the highest bit (bit63) is 1, python | |
422 | # will present it as negative long, so have to convert it back because | |
423 | # we want uint64. ---> change type to K does not help, still return | |
424 | # negative. | |
425 | if not size in [1,2,4,8]: | |
426 | sys.stderr.write('ERROR: RS_read_phys_memory: wrong size %d, must be 1,2,4,8-byte\n' % (size)) | |
427 | return None | |
428 | ||
429 | if long(addr) % size: | |
430 | sys.stderr.write('ERROR: RS_read_phys_memory: addr %#x is not %d-byte aligned\n' % (addr, size)) | |
431 | return None | |
432 | ||
433 | if size == 1: | |
434 | data = _myReposit.riesling.mem.b[addr] | |
435 | elif size == 2: | |
436 | data = _myReposit.riesling.mem.h[addr] | |
437 | elif size == 4: | |
438 | data = _myReposit.riesling.mem.w[addr] | |
439 | else: | |
440 | data = _myReposit.riesling.mem.x[addr] | |
441 | ||
442 | if (data < 0): | |
443 | data = 0xffffffffffffffffL + data + 1 | |
444 | return data | |
445 | ||
446 | ||
447 | def RS_disassemble (tid, addr, addr_type, pyobj=None): | |
448 | """(_, dis_str ) = RS_disassemble(th_obj, currpc, 1) | |
449 | caller must provide the proper Python object, e.g., N2_Python | |
450 | """ | |
451 | #sys.stderr.write('DBX: RS_disassemble: tid=%d, addr=%#x, isva=%d\n' % (tid, addr, isva)) | |
452 | # addr_type: 0 - pa, 1 - ra, 2 - va | |
453 | if addr_type == AddrType.PA_TYPE: | |
454 | type = addr_type | |
455 | paddr = addr | |
456 | else: | |
457 | (paddr,type) = RS_logical_to_physical(tid, addr, addr_type) | |
458 | ||
459 | # get instr word | |
460 | iword = RS_read_phys_memory(tid,paddr,4) | |
461 | ||
462 | # disassemble the instr | |
463 | if pyobj: | |
464 | iwStr = '[%08x] %s' % (iword, pyobj.dis(iword,0x0)) | |
465 | else: | |
466 | iwStr = '[%08x] %s' % (iword, 'UNKNOWN') | |
467 | ||
468 | ||
469 | return (4,iwStr,type) | |
470 | ||
471 | ||
472 | def RS_disassemblePC (tid, pyobj=None): | |
473 | """(_, dis_str ) = RS_disassemblePC(th_obj) | |
474 | caller must provide the proper Python object, e.g., N2_Python | |
475 | """ | |
476 | # disassemble the just executed instr | |
477 | pc = _myReposit.riesling.s[tid].pc | |
478 | return RS_disassemble(tid, pc, 2, pyobj) | |
479 | ||
480 | ||
481 | def RS_instruction_info (tid, currpc): | |
482 | """instr = RS_instruction_info(RS_current_processor(), currpc) | |
483 | """ | |
484 | # TODO InstrInfo should contain more information | |
485 | (size,iw,type) = RS_disassemble(tid, currpc, 1) | |
486 | tokens = re.split('\s+|,', iw) | |
487 | return InstrInfo(tokens[1], -99) | |
488 | ||
489 | ||
490 | def RS_read_fp_register_x (tid, regid): | |
491 | """dest_val = RS_read_fp_register_x(th_obj, rd_n) | |
492 | """ | |
493 | newCmd = '%s.s[%d].d%d' % (_myReposit.topName,tid,regid) | |
494 | return _evalCmd(newCmd) | |
495 | ||
496 | ||
497 | def RS_read_fp_register_i (tid, regid): | |
498 | """dest_val = RS_read_fp_register_i(th_obj, rd_n) | |
499 | """ | |
500 | newCmd = '%s.s[%d].f%d' % (_myReposit.topName,tid,regid) | |
501 | return _evalCmd(newCmd) | |
502 | ||
503 | ||
504 | def RS_write_fp_register_x (tid, regid, value): | |
505 | """ | |
506 | """ | |
507 | newCmd = '%s.s[%d].d%d = %d' % (_myReposit.topName,tid,regid,value) | |
508 | #code = compile(newCmd,'sys.stderr','single') | |
509 | #exec code in _myReposit.globals | |
510 | _execCmd(newCmd) | |
511 | ||
512 | def RS_write_fp_register_i (tid, regid, value): | |
513 | """ | |
514 | """ | |
515 | newCmd = '%s.s[%d].f%d = %d' % (_myReposit.topName,tid,regid,value) | |
516 | #code = compile(newCmd,'sys.stderr','single') | |
517 | #exec code in _myReposit.globals | |
518 | _execCmd(newCmd) | |
519 | ||
520 | def print_n2_archregs(tid=0,a_str=''): | |
521 | """print n2 format archregs | |
522 | """ | |
523 | sys.stdout.write('Strand %d:\n' % tid) | |
524 | if a_str.find('-i') > -1: | |
525 | # g/o/l/i registers | |
526 | RS_print_ipregs (tid) | |
527 | sys.stdout.write('\n') | |
528 | ||
529 | if a_str.find('-f') > -1: | |
530 | # floating-point registers | |
531 | RS_print_fpregs(tid) | |
532 | sys.stdout.write('\n') | |
533 | ||
534 | # control registers | |
535 | sys.stdout.write(' %16s %16s %16s %16s\n' % ('PC', 'NPC', 'CWP', 'CCR')) | |
536 | sys.stdout.write(' %016x %016x %016x %016x\n' % | |
537 | ((_evalCmd('%s.s[%d].%s' % (_myReposit.topName,tid,'pc'))), | |
538 | (_evalCmd('%s.s[%d].%s' % (_myReposit.topName,tid,'npc'))), | |
539 | (_evalCmd('%s.s[%d].%s' % (_myReposit.topName,tid,'cwp'))), | |
540 | (_evalCmd('%s.s[%d].%s' % (_myReposit.topName,tid,'ccr'))))) | |
541 | ||
542 | sys.stdout.write(' %16s %16s %16s %16s\n' % ('FPRS', 'FSR', 'PSTATE', 'HPSTATE')) | |
543 | sys.stdout.write(' %016x %016x %016x %016x\n' % | |
544 | ((_evalCmd('%s.s[%d].%s' % (_myReposit.topName,tid,'fprs'))), | |
545 | (_evalCmd('%s.s[%d].%s' % (_myReposit.topName,tid,'fsr'))), | |
546 | (_evalCmd('%s.s[%d].%s' % (_myReposit.topName,tid,'pstate'))), | |
547 | (_evalCmd('%s.s[%d].%s' % (_myReposit.topName,tid,'hpstate'))))) | |
548 | ||
549 | sys.stdout.write(' %16s %16s %16s %16s\n' % ('ASI', 'TICK', 'TL', 'PIL')) | |
550 | sys.stdout.write(' %016x %016x %016x %016x\n' % | |
551 | ((_evalCmd('%s.s[%d].%s' % (_myReposit.topName,tid,'asi'))), | |
552 | (_evalCmd('%s.s[%d].%s' % (_myReposit.topName,tid,'tick'))), | |
553 | (_evalCmd('%s.s[%d].%s' % (_myReposit.topName,tid,'tl'))), | |
554 | (_evalCmd('%s.s[%d].%s' % (_myReposit.topName,tid,'pil'))))) | |
555 | ||
556 | sys.stdout.write(' %16s %16s %16s %16s\n' % ('CANSAVE', 'CANRESTORE', 'CLEANWIN', 'OTHERWIN')) | |
557 | sys.stdout.write(' %016x %016x %016x %016x\n' % | |
558 | ((_evalCmd('%s.s[%d].%s' % (_myReposit.topName,tid,'cansave'))), | |
559 | (_evalCmd('%s.s[%d].%s' % (_myReposit.topName,tid,'canrestore'))), | |
560 | (_evalCmd('%s.s[%d].%s' % (_myReposit.topName,tid,'cleanwin'))), | |
561 | (_evalCmd('%s.s[%d].%s' % (_myReposit.topName,tid,'otherwin'))))) | |
562 | ||
563 | sys.stdout.write(' %16s %16s %16s %16s\n' % ('HVER', 'WSTATE', 'GL', 'TBA')) | |
564 | sys.stdout.write(' %016x %016x %016x %016x\n' % | |
565 | ((_evalCmd('%s.s[%d].%s' % (_myReposit.topName,tid,'hver'))), | |
566 | (_evalCmd('%s.s[%d].%s' % (_myReposit.topName,tid,'wstate'))), | |
567 | (_evalCmd('%s.s[%d].%s' % (_myReposit.topName,tid,'gl'))), | |
568 | (_evalCmd('%s.s[%d].%s' % (_myReposit.topName,tid,'tba'))))) | |
569 | ||
570 | sys.stdout.write(' %16s %16s %16s %16s\n' % ('HTBA', 'TICK_CMPR', 'STICK_CMPR', 'HSTICK_CMPR')) | |
571 | sys.stdout.write(' %016x %016x %016x %016x\n' % | |
572 | ((_evalCmd('%s.s[%d].%s' % (_myReposit.topName,tid,'htba'))), | |
573 | (_evalCmd('%s.s[%d].%s' % (_myReposit.topName,tid,'tick_cmpr'))), | |
574 | (_evalCmd('%s.s[%d].%s' % (_myReposit.topName,tid,'stick_cmpr'))), | |
575 | (_evalCmd('%s.s[%d].%s' % (_myReposit.topName,tid,'hstick_cmpr'))))) | |
576 | ||
577 | sys.stdout.write(' %16s %16s %16s %16s\n' % ('HINTP', 'SOFTINT', 'GSR', 'INTR_RECEIVE')) | |
578 | sys.stdout.write(' %016x %016x %016x %016x\n' % | |
579 | ((_evalCmd('%s.s[%d].%s' % (_myReposit.topName,tid,'hintp'))), | |
580 | (_evalCmd('%s.s[%d].%s' % (_myReposit.topName,tid,'softint'))), | |
581 | (_evalCmd('%s.s[%d].%s' % (_myReposit.topName,tid,'gsr'))), | |
582 | (0))) #TODO INTR_RECEIVE | |
583 | ||
584 | for i in range(1,7): | |
585 | sys.stdout.write(' %16s %16s %16s %16s\n' % (('TPC%d' % i), ('TNPC%d' % i), ('TSTATE%d' % i), ('TT%d' % i))) | |
586 | sys.stdout.write(' %016x %016x %016x %016x\n' % | |
587 | ((_evalCmd('%s.s[%d].t[%d].tpc' % (_myReposit.topName,tid,i))), | |
588 | (_evalCmd('%s.s[%d].t[%d].tnpc' % (_myReposit.topName,tid,i))), | |
589 | (_evalCmd('%s.s[%d].t[%d].tstate' % (_myReposit.topName,tid,i))), | |
590 | (_evalCmd('%s.s[%d].t[%d].tt' % (_myReposit.topName,tid,i))))) | |
591 | ||
592 | sys.stdout.write(' %16s %16s %16s %16s\n' % ('HTSTATE1', 'HTSTATE2', 'HTSTATE3', 'HTSTATE4')) | |
593 | sys.stdout.write(' %016x %016x %016x %016x\n' % | |
594 | ((_evalCmd('%s.s[%d].t[1].htstate' % (_myReposit.topName,tid))), | |
595 | (_evalCmd('%s.s[%d].t[2].htstate' % (_myReposit.topName,tid))), | |
596 | (_evalCmd('%s.s[%d].t[3].htstate' % (_myReposit.topName,tid))), | |
597 | (_evalCmd('%s.s[%d].t[4].htstate' % (_myReposit.topName,tid))))) | |
598 | ||
599 | sys.stdout.write(' %16s %16s\n' % ('HTSTATE5', 'HTSTATE6')) | |
600 | sys.stdout.write(' %016x %016x\n' % | |
601 | ((_evalCmd('%s.s[%d].t[5].htstate' % (_myReposit.topName,tid))), | |
602 | (_evalCmd('%s.s[%d].t[6].htstate' % (_myReposit.topName,tid))))) | |
603 | sys.stdout.write('\n') | |
604 | ||
605 | if a_str.find('-m') > -1: | |
606 | # mmu registers | |
607 | print_n2_mmuregs(tid) | |
608 | sys.stdout.write('\n') | |
609 | ||
610 | if a_str.find('-c') > -1: | |
611 | # cmp registers | |
612 | print_n2_cmpregs(tid) | |
613 | ||
614 | ||
615 | def RS_print_archregs (tid=0, a_str=''): | |
616 | """ | |
617 | """ | |
618 | ||
619 | if (_myReposit.optdir['--ar'] == 'n2'): | |
620 | print_n2_archregs(tid,a_str) | |
621 | return | |
622 | ||
623 | sys.stdout.write('Strand %d:\n' % tid) | |
624 | # show the current window, gl register and other ASRs | |
625 | i = 0 | |
626 | regs = _myRegmap.regMap.keys() | |
627 | regs.sort() | |
628 | for reg in regs: | |
629 | if i % 4 == 0: | |
630 | sys.stdout.write("\n") | |
631 | if _myRegmap.regMap[reg][0] == '': | |
632 | sys.stdout.write('%-10s%#18s' % (reg,'UNIMP')) | |
633 | else: | |
634 | sys.stdout.write('%-10s%#018x ' % (reg,_evalCmd('%s.s[%d].%s' % (_myReposit.topName,tid,_myRegmap.regMap[reg][0])))) | |
635 | i = i + 1 | |
636 | ||
637 | # XXX add support for arch specific regs | |
638 | ||
639 | sys.stdout.write('\n') | |
640 | if a_str != '-all': | |
641 | return | |
642 | ||
643 | # show the regs for all the other windows | |
644 | # show all the global regs | |
645 | ||
646 | max_gl = _myReposit.riesling.s0.max_gl | |
647 | for gl in range(0,max_gl+1): | |
648 | if gl == _myReposit.riesling.s[tid].gl: | |
649 | continue | |
650 | sys.stdout.write('\nglobal set %d' % (gl,)) | |
651 | for reg in range(0,8): | |
652 | if reg % 4 == 0: | |
653 | sys.stdout.write("\n") | |
654 | key = 'g%d' % (reg,) | |
655 | sys.stdout.write('%-6s%#018x ' % (key,_evalCmd('%s.s[%d].g[%d].%s' % (_myReposit.topName,tid,gl,_myRegmap.regMap[key][0])))) | |
656 | ||
657 | sys.stdout.write('\n') | |
658 | ||
659 | # show all the window regs | |
660 | max_win = _myReposit.riesling.s0.max_wp | |
661 | for win in range(0,max_win): | |
662 | if win == _myReposit.riesling.s[tid].cwp: | |
663 | continue | |
664 | sys.stdout.write('\nwindow %d' % (win,)) | |
665 | for o_reg in range(0,8): | |
666 | if o_reg % 4 == 0: | |
667 | sys.stdout.write("\n") | |
668 | key = 'o%d' % (o_reg,) | |
669 | sys.stdout.write('%-6s%#018x ' % (key,_evalCmd('%s.s[%d].w[%d].%s' % (_myReposit.topName,tid,gl,_myRegmap.regMap[key][0])))) | |
670 | for l_reg in range(0,8): | |
671 | if l_reg % 4 == 0: | |
672 | sys.stdout.write("\n") | |
673 | key = 'l%d' % (l_reg,) | |
674 | sys.stdout.write('%-6s%#018x ' % (key,_evalCmd('%s.s[%d].w[%d].%s' % (_myReposit.topName,tid,gl,_myRegmap.regMap[key][0])))) | |
675 | for i_reg in range(0,8): | |
676 | if i_reg % 4 == 0: | |
677 | sys.stdout.write("\n") | |
678 | key = 'i%d' % (i_reg,) | |
679 | sys.stdout.write('%-6s%#018x ' % (key,_evalCmd('%s.s[%d].w[%d].%s' % (_myReposit.topName,tid,gl,_myRegmap.regMap[key][0])))) | |
680 | ||
681 | sys.stdout.write('\n') | |
682 | ||
683 | # always output floating point registers | |
684 | sys.stdout.write('\n') | |
685 | RS_print_fpregs(tid) | |
686 | ||
687 | ||
688 | def RS_print_regs (tid=0, a_str=''): | |
689 | """ | |
690 | """ | |
691 | RS_print_archregs(tid, a_str) | |
692 | ||
693 | ||
694 | def RS_print_ipregs (tid, a_str=''): | |
695 | """ | |
696 | """ | |
697 | if a_str != '-all': | |
698 | # current g/o/l/i registers | |
699 | gl = _myReposit.riesling.s[tid].gl | |
700 | cwp = _myReposit.riesling.s[tid].cwp | |
701 | sys.stdout.write(' %16s %16s %16s %16s\n' % (('g[%d]' % gl), ('o[%d]' % cwp), ('l[%d]' % cwp), ('i[%d]' % cwp))) | |
702 | for i in range(0,8): | |
703 | sys.stdout.write('%d %016x %016x %016x %016x\n' % | |
704 | (i, | |
705 | (_evalCmd('%s.s[%d].g[%d].g%d' % (_myReposit.topName,tid,gl,i))), | |
706 | (_evalCmd('%s.s[%d].w[%d].o%d' % (_myReposit.topName,tid,cwp,i))), | |
707 | (_evalCmd('%s.s[%d].w[%d].l%d' % (_myReposit.topName,tid,cwp,i))), | |
708 | (_evalCmd('%s.s[%d].w[%d].i%d' % (_myReposit.topName,tid,cwp,i))))) | |
709 | else: | |
710 | # all g/o/l/i registers | |
711 | maxgl = ((_myReposit.riesling.s[tid].hver >> 16) & 0x7) + 1 | |
712 | maxwin = (_myReposit.riesling.s[tid].hver & 0x1f) + 1 | |
713 | for i in range(0,maxwin): | |
714 | if i < maxgl: | |
715 | sys.stdout.write(' %16s %16s %16s %16s\n' % (('g[%d]'%i), ('o[%d]'%i), ('l[%d]'%i), ('i[%d]'%i))) | |
716 | for j in range(0,8): | |
717 | sys.stdout.write('%d %016x %016x %016x %016x\n' % | |
718 | (j, | |
719 | (_evalCmd('%s.s[%d].g[%d].g%d' % (_myReposit.topName,tid,i,j))), | |
720 | (_evalCmd('%s.s[%d].w[%d].o%d' % (_myReposit.topName,tid,i,j))), | |
721 | (_evalCmd('%s.s[%d].w[%d].l%d' % (_myReposit.topName,tid,i,j))), | |
722 | (_evalCmd('%s.s[%d].w[%d].i%d' % (_myReposit.topName,tid,i,j))))) | |
723 | sys.stdout.write('\n') | |
724 | else: | |
725 | sys.stdout.write(' %16s %16s %16s %16s\n' % ('', ('o[%d]'%i), ('l[%d]'%i), ('i[%d]'%i))) | |
726 | for j in range(0,8): | |
727 | sys.stdout.write('%d %16s %016x %016x %016x\n' % | |
728 | (j, | |
729 | (''), | |
730 | (_evalCmd('%s.s[%d].w[%d].o%d' % (_myReposit.topName,tid,i,j))), | |
731 | (_evalCmd('%s.s[%d].w[%d].l%d' % (_myReposit.topName,tid,i,j))), | |
732 | (_evalCmd('%s.s[%d].w[%d].i%d' % (_myReposit.topName,tid,i,j))))) | |
733 | sys.stdout.write('\n') | |
734 | ||
735 | ||
736 | def RS_print_fpregs (tid=0): | |
737 | """ | |
738 | """ | |
739 | for i in range(0,64,8): | |
740 | sys.stdout.write(' %16s %16s %16s %16s\n' % ('f%d'%i, 'f%d'%(i+2), 'f%d'%(i+4), 'f%d'%(i+6))) | |
741 | sys.stdout.write(' %016x %016x %016x %016x\n' % | |
742 | ((_evalCmd('%s.s[%d].d%d' % (_myReposit.topName,tid,i))), | |
743 | (_evalCmd('%s.s[%d].d%d' % (_myReposit.topName,tid,i+2))), | |
744 | (_evalCmd('%s.s[%d].d%d' % (_myReposit.topName,tid,i+4))), | |
745 | (_evalCmd('%s.s[%d].d%d' % (_myReposit.topName,tid,i+6))))) | |
746 | ||
747 | ||
748 | def print_n2_mmuregs(tid = 0): | |
749 | """ | |
750 | """ | |
751 | sys.stdout.write(' %16s %16s %16s %16s\n' % ('CTXT_PRIM_0', 'CTXT_SEC_0', 'CTXT_PRIM_1', 'CTXT_SEC_1')) | |
752 | sys.stdout.write(' %016x %016x %016x %016x\n' % | |
753 | ((_evalCmd('%s.s[%d].rdasi(%d,%d)' % (_myReposit.topName,tid,_myRegmap.regMapAsi['MMU_ID_PRIMARY_CTXT_REG_0'][0],_myRegmap.regMapAsi['MMU_ID_PRIMARY_CTXT_REG_0'][1]))), | |
754 | (_evalCmd('%s.s[%d].rdasi(%d,%d)' % (_myReposit.topName,tid,_myRegmap.regMapAsi['MMU_D_SCNDRY_CTXT_REG_0'][0],_myRegmap.regMapAsi['MMU_D_SCNDRY_CTXT_REG_0'][1]))), | |
755 | (_evalCmd('%s.s[%d].rdasi(%d,%d)' % (_myReposit.topName,tid,_myRegmap.regMapAsi['MMU_ID_PRIMARY_CTXT_REG_1'][0],_myRegmap.regMapAsi['MMU_ID_PRIMARY_CTXT_REG_1'][1]))), | |
756 | (_evalCmd('%s.s[%d].rdasi(%d,%d)' % (_myReposit.topName,tid,_myRegmap.regMapAsi['MMU_D_SCNDRY_CTXT_REG_1'][0],_myRegmap.regMapAsi['MMU_D_SCNDRY_CTXT_REG_1'][1]))))) | |
757 | ||
758 | sys.stdout.write(' %16s %16s %16s %16s\n' % ('I_TAG_ACC', 'D_TAG_ACC', 'DSFAR', 'LSU_CONTROL')) | |
759 | sys.stdout.write(' %016x %016x %016x %016x\n' % | |
760 | ((_evalCmd('%s.s[%d].rdasi(%d,%d)' % (_myReposit.topName,tid,_myRegmap.regMapAsi['MMU_ITLB_TAG_ACCESS'][0],_myRegmap.regMapAsi['MMU_ITLB_TAG_ACCESS'][1]))), | |
761 | (_evalCmd('%s.s[%d].rdasi(%d,%d)' % (_myReposit.topName,tid,_myRegmap.regMapAsi['MMU_DTLB_TAG_ACCESS'][0],_myRegmap.regMapAsi['MMU_DTLB_TAG_ACCESS'][1]))), | |
762 | (_evalCmd('%s.s[%d].rdasi(%d,%d)' % (_myReposit.topName,tid,_myRegmap.regMapAsi['MMU_DSFAR'][0],_myRegmap.regMapAsi['MMU_DSFAR'][1]))), | |
763 | (_evalCmd('%s.s[%d].rdasi(%d,%d)' % (_myReposit.topName,tid,_myRegmap.regMapAsi['MMU_LSU_CONTROL'][0],_myRegmap.regMapAsi['MMU_LSU_CONTROL'][1]))))) | |
764 | ||
765 | sys.stdout.write(' %16s %16s %16s %16s\n' % ('CTXT_Z_TSB_CFG0', 'CTXT_Z_TSB_CFG1', 'CTXT_Z_TSB_CFG2', 'CTXT_Z_TSB_CFG3')) | |
766 | sys.stdout.write(' %016x %016x %016x %016x\n' % | |
767 | ((_evalCmd('%s.s[%d].rdasi(%d,%d)' % (_myReposit.topName,tid,_myRegmap.regMapAsi['MMU_ZERO_CONTEXT_TSB_CONFIG_0'][0],_myRegmap.regMapAsi['MMU_ZERO_CONTEXT_TSB_CONFIG_0'][1]))), | |
768 | (_evalCmd('%s.s[%d].rdasi(%d,%d)' % (_myReposit.topName,tid,_myRegmap.regMapAsi['MMU_ZERO_CONTEXT_TSB_CONFIG_1'][0],_myRegmap.regMapAsi['MMU_ZERO_CONTEXT_TSB_CONFIG_1'][1]))), | |
769 | (_evalCmd('%s.s[%d].rdasi(%d,%d)' % (_myReposit.topName,tid,_myRegmap.regMapAsi['MMU_ZERO_CONTEXT_TSB_CONFIG_2'][0],_myRegmap.regMapAsi['MMU_ZERO_CONTEXT_TSB_CONFIG_2'][1]))), | |
770 | (_evalCmd('%s.s[%d].rdasi(%d,%d)' % (_myReposit.topName,tid,_myRegmap.regMapAsi['MMU_ZERO_CONTEXT_TSB_CONFIG_3'][0],_myRegmap.regMapAsi['MMU_ZERO_CONTEXT_TSB_CONFIG_3'][1]))))) | |
771 | ||
772 | sys.stdout.write(' %16s %16s %16s %16s\n' % ('CTXT_NZ_TSB_CFG0', 'CTXT_NZ_TSB_CFG1', 'CTXT_NZ_TSB_CFG2', 'CTXT_NZ_TSB_CFG3')) | |
773 | sys.stdout.write(' %016x %016x %016x %016x\n' % | |
774 | ((_evalCmd('%s.s[%d].rdasi(%d,%d)' % (_myReposit.topName,tid,_myRegmap.regMapAsi['MMU_NONZERO_CONTEXT_TSB_CONFIG_0'][0],_myRegmap.regMapAsi['MMU_NONZERO_CONTEXT_TSB_CONFIG_0'][1]))), | |
775 | (_evalCmd('%s.s[%d].rdasi(%d,%d)' % (_myReposit.topName,tid,_myRegmap.regMapAsi['MMU_NONZERO_CONTEXT_TSB_CONFIG_1'][0],_myRegmap.regMapAsi['MMU_NONZERO_CONTEXT_TSB_CONFIG_1'][1]))), | |
776 | (_evalCmd('%s.s[%d].rdasi(%d,%d)' % (_myReposit.topName,tid,_myRegmap.regMapAsi['MMU_NONZERO_CONTEXT_TSB_CONFIG_2'][0],_myRegmap.regMapAsi['MMU_NONZERO_CONTEXT_TSB_CONFIG_2'][1]))), | |
777 | (_evalCmd('%s.s[%d].rdasi(%d,%d)' % (_myReposit.topName,tid,_myRegmap.regMapAsi['MMU_NONZERO_CONTEXT_TSB_CONFIG_3'][0],_myRegmap.regMapAsi['MMU_NONZERO_CONTEXT_TSB_CONFIG_3'][1]))))) | |
778 | ||
779 | sys.stdout.write(' %16s\n' % ('WATCHPOINT_ADDR')) | |
780 | sys.stdout.write(' %016x\n' % | |
781 | ((_evalCmd('%s.s[%d].rdasi(%d,%d)' % (_myReposit.topName,tid,_myRegmap.regMapAsi['MMU_DMMU_WATCHPOINT'][0],_myRegmap.regMapAsi['MMU_DMMU_WATCHPOINT'][1]))))) | |
782 | ||
783 | ||
784 | def RS_print_mmuregs (tid=0): | |
785 | """ | |
786 | """ | |
787 | global _asiRegMap | |
788 | ||
789 | if (_myReposit.optdir['--ar'] == 'n2'): | |
790 | print_n2_mmuregs(tid) | |
791 | return '' | |
792 | ||
793 | str = '' | |
794 | for reg in _asiRegMap.keys(): | |
795 | if reg.startswith('MMU_'): | |
796 | newCmd = '%s.s0.%s' % (_myReposit.topName,reg) | |
797 | val = _evalCmd(newCmd) | |
798 | str = str + '%-40s %#018x' % (reg,val) + '\n' | |
799 | ||
800 | return str | |
801 | ||
802 | def print_n2_cmpregs(tid=0): | |
803 | """ | |
804 | """ | |
805 | sys.stdout.write(' %16s %16s %16s %16s\n' % ('CORE_AVAIL', 'CORE_ENABLE_ST', 'CORE_ENABLE', 'XIR_STEERING')) | |
806 | sys.stdout.write(' %016x %016x %016x %016x\n' % | |
807 | ((_evalCmd('%s.s[%d].rdasi(%d,%d)' % (_myReposit.topName,tid,_myRegmap.regMapAsi['CMP_core_available'][0],_myRegmap.regMapAsi['CMP_core_available'][1]))), | |
808 | (_evalCmd('%s.s[%d].rdasi(%d,%d)' % (_myReposit.topName,tid,_myRegmap.regMapAsi['CMP_core_enable_status'][0],_myRegmap.regMapAsi['CMP_core_enable_status'][1]))), | |
809 | (_evalCmd('%s.s[%d].rdasi(%d,%d)' % (_myReposit.topName,tid,_myRegmap.regMapAsi['CMP_core_enable'][0],_myRegmap.regMapAsi['CMP_core_enable'][1]))), | |
810 | (_evalCmd('%s.s[%d].rdasi(%d,%d)' % (_myReposit.topName,tid,_myRegmap.regMapAsi['CMP_xir_steering'][0],_myRegmap.regMapAsi['CMP_xir_steering'][1]))))) | |
811 | ||
812 | sys.stdout.write(' %16s %16s %16s\n' % ('TICK_ENABLE', 'STRAND_RUN', 'STRAND_RUN_ST')) | |
813 | sys.stdout.write(' %016x %016x %016x\n' % | |
814 | ((_evalCmd('%s.s[%d].rdasi(%d,%d)' % (_myReposit.topName,tid,_myRegmap.regMapAsi['CMP_tick_enable'][0],_myRegmap.regMapAsi['CMP_tick_enable'][1]))), | |
815 | (_evalCmd('%s.s[%d].rdasi(%d,%d)' % (_myReposit.topName,tid,_myRegmap.regMapAsi['CMP_running'][0],_myRegmap.regMapAsi['CMP_running'][1]))), | |
816 | (_evalCmd('%s.s[%d].rdasi(%d,%d)' % (_myReposit.topName,tid,_myRegmap.regMapAsi['CMP_running_status'][0],_myRegmap.regMapAsi['CMP_running_status'][1]))))) | |
817 | ||
818 | sys.stdout.write(' %16s %16s\n' % ('CORE_ID', 'CORE_INTR_ID')) | |
819 | sys.stdout.write(' %016x %016x\n' % | |
820 | ((_evalCmd('%s.s[%d].rdasi(%d,%d)' % (_myReposit.topName,tid,_myRegmap.regMapAsi['CMP_core_id'][0],_myRegmap.regMapAsi['CMP_core_id'][1]))), | |
821 | (_evalCmd('%s.s[%d].rdasi(%d,%d)' % (_myReposit.topName,tid,_myRegmap.regMapAsi['CMP_core_intr_id'][0],_myRegmap.regMapAsi['CMP_core_intr_id'][1]))))) | |
822 | ||
823 | ||
824 | def RS_print_cmpregs (tid=0): | |
825 | """ | |
826 | """ | |
827 | global _asiRegMap | |
828 | ||
829 | if (_myReposit.optdir['--ar'] == 'n2'): | |
830 | print_n2_cmpregs(tid) | |
831 | return '' | |
832 | ||
833 | str = '' | |
834 | keylist = _asiRegMap.keys() | |
835 | keylist.sort() | |
836 | for reg in keylist: | |
837 | if reg.startswith('CMP_'): | |
838 | (asi,va) = _asiRegMap[reg] | |
839 | str = str + '%-30s %#018x' % (reg,_myReposit.riesling.s[tid].rdasi(asi,va)) + '\n' | |
840 | ||
841 | return str | |
842 | ||
843 | ||
844 | def RS_get_register_number (tid, regname): | |
845 | """rd_n = RS_get_register_number(th_obj, dest_reg) | |
846 | """ | |
847 | return _myRegmap.key2id(regname) | |
848 | ||
849 | ||
850 | def RS_write_register (tid, regid, value): | |
851 | """RS_write_register(th_obj, rd_n, new_dest_val) | |
852 | """ | |
853 | reg = _myRegmap.id2key(regid) | |
854 | if reg == '': | |
855 | sys.stdout.write("Unimplemented register id %d\n" % (regid,)) | |
856 | return | |
857 | newCmd = '%s.s[%d].%s = %d' % (_myReposit.topName,tid,reg,value) | |
858 | code = compile(newCmd,'sys.stderr','single') | |
859 | exec code in _myReposit.globals | |
860 | ||
861 | def RS_write_register_name (regname, value, tid=0): | |
862 | """ | |
863 | """ | |
864 | if not _myRegmap.hasReg(regname) or _myRegmap.feName2beName(regname) == '': | |
865 | sys.stdout.write("Unimplemented register %s access\n" % (regname,)) | |
866 | return | |
867 | ||
868 | newCmd = '%s.s[%d].%s=%d' % (_myReposit.topName,tid,regname,value) | |
869 | #code = compile(newCmd,'sys.stderr','single') | |
870 | #exec code in _myReposit.globals | |
871 | _execCmd(newCmd) | |
872 | ||
873 | def RS_read_register (tid, regid): | |
874 | """prev_tl = RS_read_register(th_obj, RS_get_register_number(th_obj, "tl")) | |
875 | """ | |
876 | reg = _myRegmap.id2key(regid) | |
877 | if reg == '': | |
878 | sys.stdout.write("Unimplemented register id %d\n" % (regid,)) | |
879 | return | |
880 | newCmd = '%s.s[%d].%s' % (_myReposit.topName,tid,reg) | |
881 | return _evalCmd(newCmd) | |
882 | ||
883 | ||
884 | def RS_read_register_name (regname, tid=0): | |
885 | """ | |
886 | """ | |
887 | if not _myRegmap.hasReg(regname) or _myRegmap.feName2beName(regname) == '': | |
888 | sys.stdout.write("Unimplemented register %s access\n" % (regname,)) | |
889 | return | |
890 | ||
891 | newCmd = '%s.s[%d].%s' % (_myReposit.topName,tid,regname) | |
892 | return _evalCmd(newCmd) | |
893 | ||
894 | ||
895 | ## def RS_reset (traptype): | |
896 | ## """ | |
897 | ## """ | |
898 | ## nasUtil.reset_cmd(traptype) | |
899 | ||
900 | def RS_asi_read (asi, va, tid=0): | |
901 | """read asi by asi/va | |
902 | """ | |
903 | return _myReposit.riesling.s[tid].rdasi(asi, long(va)) | |
904 | ||
905 | def RS_asi_write (asi, va, value, tid=0): | |
906 | """write asi by asi/va/value | |
907 | """ | |
908 | _myReposit.riesling.s[tid].wrasi(asi, long(va), long(value)) | |
909 | ||
910 | ||
911 | def RS_dump_tlb (tid=0, itlb=1, valid=1): | |
912 | """dump i/d-talb content | |
913 | """ | |
914 | if itlb == 1: | |
915 | print 'Strand %d inst_tlb:' % tid | |
916 | print _myReposit.riesling.s[tid].inst_tlb | |
917 | else: | |
918 | print 'Strand %d data_tlb:' % tid | |
919 | print _myReposit.riesling.s[tid].data_tlb | |
920 | ||
921 | ||
922 | def RS_dump_memory (fileName, startPA, size, binary=0): | |
923 | """dump memory content to file, in plain text or binary form | |
924 | if fileName='', then output to stdout | |
925 | """ | |
926 | if fileName == '': | |
927 | fr = sys.stdout | |
928 | else: | |
929 | fr = open(fileName,'w') | |
930 | addr = startPA | |
931 | c16 = 0 | |
932 | while addr < startPA + size: | |
933 | data = RS_read_phys_memory(0,addr,1) | |
934 | if binary == 1: | |
935 | fr.write(chr(int(data))) | |
936 | else: | |
937 | if c16 == 0 : | |
938 | fr.write("0x%016x " % (addr,)) | |
939 | fr.write('%02x' % (data,)) | |
940 | c16 = c16 + 1 | |
941 | if c16 % 2 == 0: | |
942 | fr.write(' ') | |
943 | if c16 % 16 == 0: | |
944 | fr.write('\n') | |
945 | c16 = 0 | |
946 | addr = addr + 1 | |
947 | ||
948 | def __print_N2_Tte__(tte): | |
949 | str = ("%-6s%#01x " % ('r',tte.r)) + ("%-6s%#018x " % ('pid',tte.pid)) + ("%-6s%#018x " % ('ctx',tte.ctx)) + "\n" + ("%-6s%#018x " % ('tag',tte.tag)) + ("%-6s%#018x " % ('addr',tte.addr)) + ("%-6s%#04x " % ('size',tte.size)) + "\n" + ("%-6s%#01x|" % ('valid',tte.valid)) + ("%-6s%#01x|" % ('nfo',tte.nfo)) + ("%-6s%#01x|" % ('ie',tte.ie)) + ("%-6s%#01x|" % ('e',tte.e)) + ("%-6s%#01x|" % ('cp',tte.cp)) + ("%-6s%#01x|" % ('cv',tte.cv)) + ("%-6s%#01x|" % ('p',tte.p)) + ("%-6s%#01x|" % ('w',tte.w)) + ("%-6s%#01x|" % ('x',tte.x)) + ("%-6s%#07x|" % ('sw',tte.soft_flds)) + "\n" | |
950 | ||
951 | return str | |
952 | ||
953 | def __print_N1_Tte__(tte): | |
954 | str = ("%-6s%#01x " % ('r',tte.r)) + ("%-6s%#018x " % ('pid',tte.pid)) + ("%-6s%#018x " % ('ctx',tte.ctx)) + "\n" + ("%-6s%#018x " % ('tag',tte.tag)) + ("%-6s%#018x " % ('addr',tte.addr)) + ("%-6s%#04x " % ('size',tte.size)) + "\n" + ("%-6s%#01x|" % ('valid',tte.valid)) + ("%-6s%#01x|" % ('nfo',tte.nfo)) + ("%-6s%#01x|" % ('ie',tte.ie)) + ("%-6s%#01x|" % ('e',tte.e)) + ("%-6s%#01x|" % ('cp',tte.cp)) + ("%-6s%#01x|" % ('cv',tte.cv)) + ("%-6s%#01x|" % ('p',tte.p)) + ("%-6s%#01x|" % ('w',tte.w)) + ("%-6s%#01x|" % ('lock',tte.lock))+ ("%-6s%#01x|" % ('diag7_3',tte.diag7_3))+"\n" | |
955 | ||
956 | return str | |
957 | ||
958 | ||
959 | def RS_tlblookup (tid, va, pid=-1, ctxt=-1, ra2pa=-1, bypass=-1): | |
960 | """ | |
961 | """ | |
962 | return _myReposit.strands[tid].tlblookup(va, pid, ctxt, ra2pa, bypass) | |
963 | ||
964 | ||
965 | def RS_read_memory (tid, addr, size=8, pid=-1, ctxt=-1, ra2pa=-1, bypass=1): | |
966 | """ | |
967 | """ | |
968 | #sys.stderr.write('DBX: RS_read_memory: tid=%d, addr=%#x, size=%d\n' % (tid, addr, size)) | |
969 | # the data is returned as L, if the highest bit (bit63) is 1, python | |
970 | # will present it as negative long, so have to convert it back because | |
971 | # we want uint64. ---> change type to K does not help, still return | |
972 | # negative. | |
973 | if not size in [1,2,4,8]: | |
974 | sys.stderr.write('ERROR: RS_read_memory: wrong size %d, must be 1,2,4,8-byte\n' % (size)) | |
975 | return None | |
976 | ||
977 | if long(addr) % size: | |
978 | sys.stderr.write('ERROR: RS_read_memory: addr %#x is not %d-byte aligned\n' % (addr, size)) | |
979 | return None | |
980 | ||
981 | if bypass <= 0: | |
982 | # the address is a VA, have to translate it | |
983 | addr = RS_tlblookup(tid, addr, pid, ctxt, ra2pa, bypass) | |
984 | ||
985 | data = _myReposit.strands[tid].access_system_mem(long(addr), 0L, 1, size) | |
986 | if (data < 0): | |
987 | data = 0xffffffffffffffffL + data + 1 | |
988 | return data |