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1 | /* |
2 | * ========== Copyright Header Begin ========================================== | |
3 | * | |
4 | * OpenSPARC T2 Processor File: n2_err_l2_LDSC_cecc_trap.s | |
5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
7 | * | |
8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; version 2 of the License. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | * For the avoidance of doubt, and except that if any non-GPL license | |
24 | * choice is available it will apply instead, Sun elects to use only | |
25 | * the General Public License version 2 (GPLv2) at this time for any | |
26 | * software where a choice of GPL license versions is made | |
27 | * available with the language indicating that GPLv2 or any later version | |
28 | * may be used, or where a choice of which version of the GPL is applied is | |
29 | * otherwise unspecified. | |
30 | * | |
31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
32 | * CA 95054 USA or visit www.sun.com if you need additional information or | |
33 | * have any questions. | |
34 | * | |
35 | * | |
36 | * ========== Copyright Header End ============================================ | |
37 | */ | |
38 | #define H_HT0_Hw_Corrected_Error_0x63 My_hw_corrected_error_handler | |
39 | ||
40 | #define MAIN_PAGE_HV_ALSO | |
41 | ||
42 | /* Set up L2$ in direct map and enable errors */ | |
43 | /* Need to go to direct-map mode in order to guarantee the | |
44 | * L2$ diagnostic address of the line we will corrupt */ | |
45 | #define CREGS_L2_CTL_REG_DIS 0 | |
46 | #define CREGS_L2_CTL_REG_ASSOCDIS 1 | |
47 | #define CREGS_L2_ERR_EN_REG_CEEN 1 | |
48 | #define CREGS_L2_ERR_EN_REG_NCEEN 1 | |
49 | #define L2_REG_PROG 1 | |
50 | ||
51 | ||
52 | #include "hboot.s" | |
53 | #include "asi_s.h" | |
54 | #include "err_defines.h" | |
55 | ||
56 | #define L2_ENTRY_PA 0xa000000000 | |
57 | #define TEST_DATA1 0x5555555555555555 | |
58 | #define TEST_PA 0x003000aa00 | |
59 | /* bits [21:18] select way in direct-map mode */ | |
60 | /* bits [17:9] select the set == 0x55, | |
61 | so start L2_SCRUB at 0x50 */ | |
62 | #define MASK_PA_21_3 0x3ffff8 | |
63 | #define L2_ES_W1C_VALUE 0xc03ffff800000000 | |
64 | #define SPARC_ES_W1C_VALUE 0xefffffff | |
65 | #define TT_SW_Error 0x40 | |
66 | ||
67 | .text | |
68 | .global main | |
69 | ||
70 | main: | |
71 | ||
72 | ||
73 | ! Boot code does not provide TLB translation for IO address space | |
74 | ta T_CHANGE_HPRIV | |
75 | ||
76 | ||
77 | disable_l1_DCache: | |
78 | ldxa [%g0] ASI_LSU_CONTROL, %l0 | |
79 | ! Remove bit 2 | |
80 | andn %l0, 0x2, %l0 | |
81 | stxa %l0, [%g0] ASI_LSU_CONTROL | |
82 | ||
83 | ||
84 | clear_l2_ESR: | |
85 | setx L2_ES_W1C_VALUE, %l0, %l1 | |
86 | setx L2ES_PA0, %l6, %g1 | |
87 | stx %l1, [%g1] | |
88 | ||
89 | ||
90 | /* Bring the line into L2$ */ | |
91 | store_to_L2: | |
92 | setx TEST_DATA1, %l0, %g5 | |
93 | ||
94 | store_to_L2_way0: | |
95 | setx TEST_PA, %l0, %g2 | |
96 | stx %g5, [%g2] | |
97 | stx %g5, [%g2+8] | |
98 | membar #Sync | |
99 | ||
100 | /* Because membar only waits for L2$ to enque the request, | |
101 | and it may take much longer for MCU to return data, | |
102 | we need to stall by doing a load */ | |
103 | load_stored_data: | |
104 | ldx [%g2],%l0 | |
105 | ||
106 | L2_diag_load: | |
107 | setx MASK_PA_21_3, %l0, %l2 ! Mask for extracting [21:3] | |
108 | setx L2_ENTRY_PA, %l0, %g4 | |
109 | and %g2, %l2, %g5 !g2 has L2 PA, | |
110 | or %g5, %g4, %g5 !g5 now has Diagnostic Data Array address | |
111 | ldx [%g5], %g6 | |
112 | membar #Sync | |
113 | ||
114 | ! Flip one bit to inject error | |
115 | xor %g6, 0x200, %g6 | |
116 | stx %g6, [%g5] | |
117 | membar #Sync | |
118 | ||
119 | setup_read_loop: ! Set up a loop to cause L2$ fills | |
120 | add %g2, 64*8, %g3 ! Pick the next index in same L2$ bank | |
121 | setx 4*1024*1024, %l0, %l1 ! Offset to next L2$ alias (4MB) | |
122 | mov 20, %l7 ! Maximum outer loop iterations | |
123 | ||
124 | outer_read_loop: | |
125 | mov %g3, %l3 | |
126 | mov 50, %l6 ! Maximum inner loop iterations | |
127 | ||
128 | inner_read_loop: | |
129 | ldx [%l3], %l0 | |
130 | dec %l6 | |
131 | brnz %l6, inner_read_loop | |
132 | add %l3, %l1, %l3 | |
133 | ||
134 | decrement_outer_loop_counter: | |
135 | dec %l7 | |
136 | brnz %l7, outer_read_loop | |
137 | nop | |
138 | ||
139 | outer_loop_ended_without_LDSC: | |
140 | ta T_BAD_TRAP | |
141 | ||
142 | ||
143 | .global My_hw_corrected_error_handler | |
144 | My_hw_corrected_error_handler: | |
145 | rdpr %tt, %o1 | |
146 | cmp %o1, 0x63 | |
147 | trap_if_wrong_trap_type: | |
148 | tne %xcc, T_BAD_TRAP | |
149 | ||
150 | check_DESR: | |
151 | ldxa [%g0]ASI_DESR, %o2 ! Also clears desr | |
152 | mov 1, %o1 | |
153 | sllx %o1, (63-56), %o1 | |
154 | add %o1, DESR_HCE_L2C, %o1 | |
155 | sllx %o1, 56, %o1 | |
156 | cmp %o2, %o1 | |
157 | trap_if_wrong_DESR: | |
158 | tne %xcc, T_BAD_TRAP | |
159 | ||
160 | check_l2_ESR: | |
161 | setx L2ES_PA0, %l6, %g1 | |
162 | ldx [%g1], %l4 | |
163 | setx mpeval((1<<L2ES_LDSC)+(1<<L2ES_VEC)), %o0, %o1 | |
164 | cmp %l4, %o1 | |
165 | trap_if_wrong_L2_ESR: | |
166 | tne %xcc, T_BAD_TRAP | |
167 | ||
168 | check_l2_EAR: | |
169 | setx L2EA_PA0, %l6, %l3 | |
170 | ldx [%l3], %l4 | |
171 | setx (TEST_PA & MASK_PA_21_3), %o0, %o1 | |
172 | cmp %l4, %o1 | |
173 | trap_if_wrong_L2_EAR: | |
174 | tne %xcc, T_BAD_TRAP | |
175 | ||
176 | /******************************************************* | |
177 | * Exit code | |
178 | *******************************************************/ | |
179 | ||
180 | test_pass: | |
181 | ta T_GOOD_TRAP | |
182 | ||
183 | test_fail: | |
184 | ta T_BAD_TRAP |