Commit | Line | Data |
---|---|---|
86530b38 AT |
1 | /* |
2 | * ========== Copyright Header Begin ========================================== | |
3 | * | |
4 | * OpenSPARC T2 Processor File: n2_ras_vec_l2_ltc_trap.s | |
5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
7 | * | |
8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; version 2 of the License. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | * For the avoidance of doubt, and except that if any non-GPL license | |
24 | * choice is available it will apply instead, Sun elects to use only | |
25 | * the General Public License version 2 (GPLv2) at this time for any | |
26 | * software where a choice of GPL license versions is made | |
27 | * available with the language indicating that GPLv2 or any later version | |
28 | * may be used, or where a choice of which version of the GPL is applied is | |
29 | * otherwise unspecified. | |
30 | * | |
31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
32 | * CA 95054 USA or visit www.sun.com if you need additional information or | |
33 | * have any questions. | |
34 | * | |
35 | * | |
36 | * ========== Copyright Header End ============================================ | |
37 | */ | |
38 | #define H_HT0_Hw_Corrected_Error_0x63 My_Corrected_ECC_error_trap | |
39 | ||
40 | ||
41 | #define MAIN_PAGE_HV_ALSO | |
42 | ||
43 | ||
44 | #define L2_ENTRY_PA 0xa400000000 | |
45 | #define TEST_DATA1 0x5555555555555555 | |
46 | #define L2_ES_W1C_VALUE 0xc03ffffc00000000 | |
47 | ||
48 | #include "hboot.s" | |
49 | #include "asi_s.h" | |
50 | #include "err_defines.h" | |
51 | ||
52 | .text | |
53 | .global main | |
54 | .global My_Corrected_ECC_error_trap | |
55 | ||
56 | ||
57 | main: | |
58 | ||
59 | ! Boot code does not provide TLB translation for IO address space | |
60 | ta T_CHANGE_HPRIV | |
61 | ||
62 | /* | |
63 | disable_l1_DCache: | |
64 | ldxa [%g0] ASI_LSU_CONTROL, %l0 | |
65 | ! Remove bit 2 | |
66 | andn %l0, 0x2, %l0 | |
67 | stxa %l0, [%g0] ASI_LSU_CONTROL | |
68 | */ | |
69 | ||
70 | enable_err_reporting: | |
71 | setx L2EE_PA0, %l0, %l1 | |
72 | ldx [%l1], %l2 | |
73 | mov 0x3, %l0 | |
74 | or %l2, %l0, %l2 | |
75 | stx %l2, [%l1] | |
76 | ||
77 | ||
78 | ! Not in Direct map | |
79 | set_L2_errorsteer: | |
80 | setx L2CS_PA0, %l6, %g1 | |
81 | ldx [%g1], %o6 | |
82 | ||
83 | ! mov 0x2, %o5 ! L2_CSR_REG<1>=1 => DM mode | |
84 | ||
85 | ldxa [%g0]ASI_INTR_ID, %o4 ! get the thread id; for core-portable | |
86 | sllx %o4, 15, %o4 ! L2_CSR_REG<21:15> = ERROR_STEER | |
87 | ||
88 | ! or %o5, %o4, %o5 | |
89 | ||
90 | or %o6, %o4, %o6 | |
91 | ||
92 | stx %o6, [%g1] | |
93 | membar 0x40 | |
94 | ||
95 | ||
96 | init_zero: | |
97 | clr %i0 | |
98 | ||
99 | Tag_init: | |
100 | setx 0x2000aa00, %g7, %g1 | |
101 | ldx [%g1], %g2 | |
102 | ||
103 | setx 0x2100aa00, %g7, %g1 | |
104 | ldx [%g1], %g2 | |
105 | ||
106 | setx 0x2200aa00, %g7, %g1 | |
107 | ldx [%g1], %g2 | |
108 | ||
109 | setx 0x2300aa00, %g7, %g1 | |
110 | ldx [%g1], %g2 | |
111 | ||
112 | setx 0x2400aa00, %g7, %g1 | |
113 | ldx [%g1], %g2 | |
114 | ||
115 | setx 0x2500aa00, %g7, %g1 | |
116 | ldx [%g1], %g2 | |
117 | ||
118 | setx 0x2600aa00, %g7, %g1 | |
119 | ldx [%g1], %g2 | |
120 | ||
121 | setx 0x2700aa00, %g7, %g1 | |
122 | ldx [%g1], %g2 | |
123 | ||
124 | setx 0x2800aa00, %g7, %g1 | |
125 | ldx [%g1], %g2 | |
126 | ||
127 | setx 0x2900aa00, %g7, %g1 | |
128 | ldx [%g1], %g2 | |
129 | ||
130 | setx 0x2a00aa00, %g7, %g1 | |
131 | ldx [%g1], %g2 | |
132 | ||
133 | setx 0x2b00aa00, %g7, %g1 | |
134 | ldx [%g1], %g2 | |
135 | ||
136 | setx 0x2c00aa00, %g7, %g1 | |
137 | ldx [%g1], %g2 | |
138 | ||
139 | setx 0x2d00aa00, %g7, %g1 | |
140 | ldx [%g1], %g2 | |
141 | ||
142 | setx 0x2e00aa00, %g7, %g1 | |
143 | ldx [%g1], %g2 | |
144 | ||
145 | setx 0x2f00aa00, %g7, %g1 | |
146 | ldx [%g1], %g2 | |
147 | membar #Sync | |
148 | ||
149 | nops: | |
150 | nop; nop; nop; nop | |
151 | nop; nop; nop; nop | |
152 | nop; nop; nop; nop | |
153 | nop; nop; nop; nop | |
154 | nop; nop; nop; nop | |
155 | nop; nop; nop; nop | |
156 | nop; nop; nop; nop | |
157 | ||
158 | ||
159 | ! Try with way 0, 1 in 2 loop count | |
160 | ! First all 16 ways for the same Index was loaded to L2 | |
161 | ! Now inject error to way 0; | |
162 | ! Do a ld with the same index different tag and make sure it is a miss in L2 | |
163 | ! Error should be reported and corrected; | |
164 | ! Then try in the second pass of the loop for way 1 | |
165 | ! Used the %i5 register to have the way count as loop count and use it to getnerate different tag | |
166 | ||
167 | set_way: | |
168 | clr %i5 ! for 16 error | |
169 | /************************LOOP*****************************/ | |
170 | L2_diag_load: | |
171 | setx 0x2000aa00, %l0, %g2 ! 1st addr; way: 0 | |
172 | setx 0x3ffff8, %l0, %l2 ! Mask for extracting [21:3] | |
173 | and %g2, %l2, %g5 ! g2 has L2 PA, | |
174 | setx L2_ENTRY_PA, %l0, %g4 | |
175 | or %g5, %g4, %g5 !g5 now has Diagnostic Data Array address | |
176 | ||
177 | flip: | |
178 | sllx %i5, 18, %g6 ! %i5 has the way | |
179 | or %g5, %g6, %g5 | |
180 | ldx [%g5], %g6 | |
181 | membar #Sync | |
182 | ||
183 | ! Flip one bits to inject error | |
184 | xor %g6, 0x200, %g6 | |
185 | stx %g6, [%g5] | |
186 | membar #Sync | |
187 | ldx [%g5], %g7 | |
188 | cmp %g7, %g6 | |
189 | bne test_fail | |
190 | nop | |
191 | membar #Sync | |
192 | ||
193 | nops_1: | |
194 | nop; nop; nop; nop; nop; nop; nop; nop; nop; nop; nop; nop; nop; nop; nop; nop; nop; nop; nop; nop; nop | |
195 | ||
196 | ! error should be detected and reported to CCX | |
197 | reading_to_cause_err: ! New Tag; same Index; and a miss; ! so error should be detected and reported to CCX | |
198 | setx 0x3000aa00, %l0, %g2 | |
199 | sllx %i5, 24, %i6 ! %i5 = 0,1,2,3,.. | |
200 | or %g2, %i6, %g2 ! to get a new address; with new tag; same index | |
201 | ldx [%g2], %l6 | |
202 | ||
203 | ! wait for the trap | |
204 | set 0x100, %i1 | |
205 | loop_1: | |
206 | dec %i1 | |
207 | cmp %i1, %g0 | |
208 | be test_fail ! timeout | |
209 | nop | |
210 | ||
211 | add %i5, 0x1, %i7 | |
212 | cmp %i0, %i7 | |
213 | bne loop_1 | |
214 | nop | |
215 | ||
216 | !To make sure that the error is not logged/reported again | |
217 | !that means the error is corrected | |
218 | read_more_same_index_different_set: | |
219 | setx 0x4000aa00, %l0, %g2 ! another new tag; same index | |
220 | sllx %i5, 24, %i6 ! %i5 = 0,1,2,3,.. | |
221 | or %g2, %i6, %g2 ! to get a new address; with new tag; same index | |
222 | ldx [%g2], %l6 | |
223 | setx 0x5000aa00, %l0, %g2 ! another new tag; same index | |
224 | sllx %i5, 24, %i6 ! %i5 = 0,1,2,3,.. | |
225 | or %g2, %i6, %g2 ! to get a new address; with new tag; same index | |
226 | ldx [%g2], %l6 | |
227 | membar #Sync | |
228 | ||
229 | inc %i5 | |
230 | cmp %i5, LOOP_COUNT | |
231 | bne L2_diag_load | |
232 | nop | |
233 | /*********************************************************/ | |
234 | ||
235 | trap_count: | |
236 | cmp %i0, LOOP_COUNT | |
237 | bne test_fail | |
238 | nop | |
239 | ||
240 | good: | |
241 | ba test_pass | |
242 | nop | |
243 | ||
244 | ||
245 | ||
246 | My_Corrected_ECC_error_trap: | |
247 | inc %i0 | |
248 | ||
249 | l2_esr_ch_63: | |
250 | setx L2ES_PA0, %g7, %g1 | |
251 | ldx [%g1], %g4 | |
252 | setx 0xfffffffc00000000, %g7, %g3 | |
253 | and %g4, %g3, %g6 | |
254 | setx 0x0000201000000000, %g7, %g3 | |
255 | cmp %g6, %g3 | |
256 | bne %xcc, test_fail | |
257 | nop | |
258 | ||
259 | clear_l2esr_63: | |
260 | setx 0xc03ffffc00000000, %g7, %g2 | |
261 | stx %g2, [%g1] | |
262 | ldx [%g1], %g2 | |
263 | ||
264 | load_DESR_L2C_63: | |
265 | ldxa [%g0] 0x4c, %g2 | |
266 | setx 0xff00000000000000, %g7, %g1 | |
267 | and %g2, %g1, %g3 | |
268 | setx 0x8900000000000000, %g7, %g4 | |
269 | cmp %g4, %g3 | |
270 | bne %xcc, test_fail | |
271 | nop | |
272 | ||
273 | load_DSFSR_L2C_63: | |
274 | set 0x18, %g1 | |
275 | ldxa [%g1] 0x58, %g2 | |
276 | cmp %g2, %g0 | |
277 | bne %xcc, test_fail | |
278 | nop | |
279 | ||
280 | done_63: | |
281 | #ifdef DONE | |
282 | done | |
283 | #endif | |
284 | retry | |
285 | nop | |
286 | ||
287 | ||
288 | ||
289 | /******************************************************* | |
290 | * Exit code | |
291 | *******************************************************/ | |
292 | ||
293 | test_pass: | |
294 | ta T_GOOD_TRAP | |
295 | ||
296 | test_fail: | |
297 | ta T_BAD_TRAP |