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86530b38 AT |
1 | /* |
2 | * ========== Copyright Header Begin ========================================== | |
3 | * | |
4 | * OpenSPARC T2 Processor File: n2_pm_all_dimm_rdwr_2.s | |
5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
7 | * | |
8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; version 2 of the License. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | * For the avoidance of doubt, and except that if any non-GPL license | |
24 | * choice is available it will apply instead, Sun elects to use only | |
25 | * the General Public License version 2 (GPLv2) at this time for any | |
26 | * software where a choice of GPL license versions is made | |
27 | * available with the language indicating that GPLv2 or any later version | |
28 | * may be used, or where a choice of which version of the GPL is applied is | |
29 | * otherwise unspecified. | |
30 | * | |
31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
32 | * CA 95054 USA or visit www.sun.com if you need additional information or | |
33 | * have any questions. | |
34 | * | |
35 | * | |
36 | * ========== Copyright Header End ============================================ | |
37 | */ | |
38 | #define MAIN_PAGE_NUCLEUS_ALSO | |
39 | #define MAIN_PAGE_HV_ALSO | |
40 | ||
41 | ||
42 | #include "hboot.s" | |
43 | #include "asi_s.h" | |
44 | ||
45 | #ifdef PM_8BANK | |
46 | #define L20_MCU_DM0_BK0 0x0000134000 | |
47 | #define L20_MCU_DM0_BK2 0x0000134200 | |
48 | #define L20_MCU_DM0_BK4 0x0000134400 | |
49 | #define L20_MCU_DM0_BK6 0x0000134600 | |
50 | ||
51 | #define L20_MCU_DM1_BK0 0x0800134000 | |
52 | #define L20_MCU_DM1_BK2 0x0800134200 | |
53 | #define L20_MCU_DM1_BK4 0x0800134400 | |
54 | #define L20_MCU_DM1_BK6 0x0800134600 | |
55 | ||
56 | #define L20_MCU_DM2_BK0 0x1000134000 | |
57 | #define L20_MCU_DM2_BK2 0x1000134200 | |
58 | #define L20_MCU_DM2_BK4 0x1000134400 | |
59 | #define L20_MCU_DM2_BK6 0x1000134600 | |
60 | ||
61 | #define L20_MCU_DM3_BK0 0x1800134000 | |
62 | #define L20_MCU_DM3_BK2 0x1800134200 | |
63 | #define L20_MCU_DM3_BK4 0x1800134400 | |
64 | #define L20_MCU_DM3_BK6 0x1800134600 | |
65 | ||
66 | #define L20_MCU_DM4_BK0 0x2000134000 | |
67 | #define L20_MCU_DM4_BK2 0x2000134200 | |
68 | #define L20_MCU_DM4_BK4 0x2000134400 | |
69 | #define L20_MCU_DM4_BK6 0x2000134600 | |
70 | ||
71 | #define L20_MCU_DM5_BK0 0x2800134000 | |
72 | #define L20_MCU_DM5_BK2 0x2800134200 | |
73 | #define L20_MCU_DM5_BK4 0x2800134400 | |
74 | #define L20_MCU_DM5_BK6 0x2800134600 | |
75 | ||
76 | #define L20_MCU_DM6_BK0 0x3000134000 | |
77 | #define L20_MCU_DM6_BK2 0x3000134200 | |
78 | #define L20_MCU_DM6_BK4 0x3000134400 | |
79 | #define L20_MCU_DM6_BK6 0x3000134600 | |
80 | ||
81 | #define L20_MCU_DM7_BK0 0x3800134000 | |
82 | #define L20_MCU_DM7_BK2 0x3800134200 | |
83 | #define L20_MCU_DM7_BK4 0x3800134400 | |
84 | #define L20_MCU_DM7_BK6 0x3800134600 | |
85 | ||
86 | #define L2_1_MCU_DM0_BK1 0x0000134040 | |
87 | #define L2_1_MCU_DM0_BK3 0x0000134240 | |
88 | #define L2_1_MCU_DM0_BK5 0x0000134440 | |
89 | #define L2_1_MCU_DM0_BK7 0x0000134640 | |
90 | ||
91 | #define L2_1_MCU_DM1_BK1 0x0800134040 | |
92 | #define L2_1_MCU_DM1_BK3 0x0800134240 | |
93 | #define L2_1_MCU_DM1_BK5 0x0800134440 | |
94 | #define L2_1_MCU_DM1_BK7 0x0800134640 | |
95 | ||
96 | #define L2_1_MCU_DM2_BK1 0x1000134040 | |
97 | #define L2_1_MCU_DM2_BK3 0x1000134240 | |
98 | #define L2_1_MCU_DM2_BK5 0x1000134440 | |
99 | #define L2_1_MCU_DM2_BK7 0x1000134640 | |
100 | ||
101 | #define L2_1_MCU_DM3_BK1 0x1800134040 | |
102 | #define L2_1_MCU_DM3_BK3 0x1800134240 | |
103 | #define L2_1_MCU_DM3_BK5 0x1800134440 | |
104 | #define L2_1_MCU_DM3_BK7 0x1800134640 | |
105 | ||
106 | #define L2_1_MCU_DM4_BK1 0x2000134040 | |
107 | #define L2_1_MCU_DM4_BK3 0x2000134240 | |
108 | #define L2_1_MCU_DM4_BK5 0x2000134440 | |
109 | #define L2_1_MCU_DM4_BK7 0x2000134640 | |
110 | ||
111 | #define L2_1_MCU_DM5_BK1 0x2800134040 | |
112 | #define L2_1_MCU_DM5_BK3 0x2800134240 | |
113 | #define L2_1_MCU_DM5_BK5 0x2800134440 | |
114 | #define L2_1_MCU_DM5_BK7 0x2800134640 | |
115 | ||
116 | #define L2_1_MCU_DM6_BK1 0x3000134040 | |
117 | #define L2_1_MCU_DM6_BK3 0x3000134240 | |
118 | #define L2_1_MCU_DM6_BK5 0x3000134440 | |
119 | #define L2_1_MCU_DM6_BK7 0x3000134640 | |
120 | ||
121 | #define L2_1_MCU_DM7_BK1 0x3800134040 | |
122 | #define L2_1_MCU_DM7_BK3 0x3800134240 | |
123 | #define L2_1_MCU_DM7_BK5 0x3800134440 | |
124 | #define L2_1_MCU_DM7_BK7 0x3800134640 | |
125 | #endif | |
126 | ||
127 | #ifdef PM_4BANK | |
128 | #define L20_MCU_DM0_BK0 0x0000134000 | |
129 | #define L20_MCU_DM0_BK2 0x0000134100 | |
130 | #define L20_MCU_DM0_BK4 0x0000134200 | |
131 | #define L20_MCU_DM0_BK6 0x0000134300 | |
132 | ||
133 | #define L20_MCU_DM1_BK0 0x0400134000 | |
134 | #define L20_MCU_DM1_BK2 0x0400134100 | |
135 | #define L20_MCU_DM1_BK4 0x0400134200 | |
136 | #define L20_MCU_DM1_BK6 0x0400134300 | |
137 | ||
138 | #define L20_MCU_DM2_BK0 0x0800134000 | |
139 | #define L20_MCU_DM2_BK2 0x0800134100 | |
140 | #define L20_MCU_DM2_BK4 0x0800134200 | |
141 | #define L20_MCU_DM2_BK6 0x0800134300 | |
142 | ||
143 | #define L20_MCU_DM3_BK0 0x0c00134000 | |
144 | #define L20_MCU_DM3_BK2 0x0c00134100 | |
145 | #define L20_MCU_DM3_BK4 0x0c00134200 | |
146 | #define L20_MCU_DM3_BK6 0x0c00134300 | |
147 | ||
148 | #define L20_MCU_DM4_BK0 0x1000134000 | |
149 | #define L20_MCU_DM4_BK2 0x1000134100 | |
150 | #define L20_MCU_DM4_BK4 0x1000134200 | |
151 | #define L20_MCU_DM4_BK6 0x1000134300 | |
152 | ||
153 | #define L20_MCU_DM5_BK0 0x1400134000 | |
154 | #define L20_MCU_DM5_BK2 0x1400134100 | |
155 | #define L20_MCU_DM5_BK4 0x1400134200 | |
156 | #define L20_MCU_DM5_BK6 0x1400134300 | |
157 | ||
158 | #define L20_MCU_DM6_BK0 0x1800134000 | |
159 | #define L20_MCU_DM6_BK2 0x1800134100 | |
160 | #define L20_MCU_DM6_BK4 0x1800134200 | |
161 | #define L20_MCU_DM6_BK6 0x1800134300 | |
162 | ||
163 | #define L20_MCU_DM7_BK0 0x1c00134000 | |
164 | #define L20_MCU_DM7_BK2 0x1c00134100 | |
165 | #define L20_MCU_DM7_BK4 0x1c00134200 | |
166 | #define L20_MCU_DM7_BK6 0x1c00134300 | |
167 | ||
168 | #define L2_1_MCU_DM0_BK1 0x0000134040 | |
169 | #define L2_1_MCU_DM0_BK3 0x0000134140 | |
170 | #define L2_1_MCU_DM0_BK5 0x0000134240 | |
171 | #define L2_1_MCU_DM0_BK7 0x0000134340 | |
172 | ||
173 | #define L2_1_MCU_DM1_BK1 0x0400134040 | |
174 | #define L2_1_MCU_DM1_BK3 0x0400134140 | |
175 | #define L2_1_MCU_DM1_BK5 0x0400134240 | |
176 | #define L2_1_MCU_DM1_BK7 0x0400134340 | |
177 | ||
178 | #define L2_1_MCU_DM2_BK1 0x0800134040 | |
179 | #define L2_1_MCU_DM2_BK3 0x0800134140 | |
180 | #define L2_1_MCU_DM2_BK5 0x0800134240 | |
181 | #define L2_1_MCU_DM2_BK7 0x0800134340 | |
182 | ||
183 | #define L2_1_MCU_DM3_BK1 0x0c00134040 | |
184 | #define L2_1_MCU_DM3_BK3 0x0c00134140 | |
185 | #define L2_1_MCU_DM3_BK5 0x0c00134240 | |
186 | #define L2_1_MCU_DM3_BK7 0x0c00134340 | |
187 | ||
188 | #define L2_1_MCU_DM4_BK1 0x1000134040 | |
189 | #define L2_1_MCU_DM4_BK3 0x1000134140 | |
190 | #define L2_1_MCU_DM4_BK5 0x1000134240 | |
191 | #define L2_1_MCU_DM4_BK7 0x1000134340 | |
192 | ||
193 | #define L2_1_MCU_DM5_BK1 0x1400134040 | |
194 | #define L2_1_MCU_DM5_BK3 0x1400134140 | |
195 | #define L2_1_MCU_DM5_BK5 0x1400134240 | |
196 | #define L2_1_MCU_DM5_BK7 0x1400134340 | |
197 | ||
198 | #define L2_1_MCU_DM6_BK1 0x1800134040 | |
199 | #define L2_1_MCU_DM6_BK3 0x1800134140 | |
200 | #define L2_1_MCU_DM6_BK5 0x1800134240 | |
201 | #define L2_1_MCU_DM6_BK7 0x1800134340 | |
202 | ||
203 | #define L2_1_MCU_DM7_BK1 0x1c00134040 | |
204 | #define L2_1_MCU_DM7_BK3 0x1c00134140 | |
205 | #define L2_1_MCU_DM7_BK5 0x1c00134240 | |
206 | #define L2_1_MCU_DM7_BK7 0x1c00134340 | |
207 | #endif | |
208 | ||
209 | ||
210 | ||
211 | #ifdef PM_2BANK | |
212 | #define L20_MCU_DM0_BK0 0x0000134000 | |
213 | #define L20_MCU_DM0_BK2 0x0000134080 | |
214 | #define L20_MCU_DM0_BK4 0x0000134100 | |
215 | #define L20_MCU_DM0_BK6 0x0000134180 | |
216 | ||
217 | #define L20_MCU_DM1_BK0 0x0200134000 | |
218 | #define L20_MCU_DM1_BK2 0x0200134080 | |
219 | #define L20_MCU_DM1_BK4 0x0200134100 | |
220 | #define L20_MCU_DM1_BK6 0x0200134180 | |
221 | ||
222 | #define L20_MCU_DM2_BK0 0x0400134000 | |
223 | #define L20_MCU_DM2_BK2 0x0400134080 | |
224 | #define L20_MCU_DM2_BK4 0x0400134100 | |
225 | #define L20_MCU_DM2_BK6 0x0400134180 | |
226 | ||
227 | #define L20_MCU_DM3_BK0 0x0600134000 | |
228 | #define L20_MCU_DM3_BK2 0x0600134080 | |
229 | #define L20_MCU_DM3_BK4 0x0600134100 | |
230 | #define L20_MCU_DM3_BK6 0x0600134180 | |
231 | ||
232 | #define L20_MCU_DM4_BK0 0x0800134000 | |
233 | #define L20_MCU_DM4_BK2 0x0800134080 | |
234 | #define L20_MCU_DM4_BK4 0x0800134100 | |
235 | #define L20_MCU_DM4_BK6 0x0800134180 | |
236 | ||
237 | #define L20_MCU_DM5_BK0 0x0a00134000 | |
238 | #define L20_MCU_DM5_BK2 0x0a00134080 | |
239 | #define L20_MCU_DM5_BK4 0x0a00134100 | |
240 | #define L20_MCU_DM5_BK6 0x0a00134180 | |
241 | ||
242 | #define L20_MCU_DM6_BK0 0x0c00134000 | |
243 | #define L20_MCU_DM6_BK2 0x0c00134080 | |
244 | #define L20_MCU_DM6_BK4 0x0c00134100 | |
245 | #define L20_MCU_DM6_BK6 0x0c00134180 | |
246 | ||
247 | #define L20_MCU_DM7_BK0 0x0e00134000 | |
248 | #define L20_MCU_DM7_BK2 0x0e00134080 | |
249 | #define L20_MCU_DM7_BK4 0x0e00134100 | |
250 | #define L20_MCU_DM7_BK6 0x0e00134180 | |
251 | ||
252 | ||
253 | #define L2_1_MCU_DM0_BK1 0x0000134040 | |
254 | #define L2_1_MCU_DM0_BK3 0x00001340c0 | |
255 | #define L2_1_MCU_DM0_BK5 0x0000134140 | |
256 | #define L2_1_MCU_DM0_BK7 0x00001341c0 | |
257 | ||
258 | #define L2_1_MCU_DM1_BK1 0x0200134040 | |
259 | #define L2_1_MCU_DM1_BK3 0x02001340c0 | |
260 | #define L2_1_MCU_DM1_BK5 0x0200134140 | |
261 | #define L2_1_MCU_DM1_BK7 0x02001341c0 | |
262 | ||
263 | #define L2_1_MCU_DM2_BK1 0x0400134040 | |
264 | #define L2_1_MCU_DM2_BK3 0x04001340c0 | |
265 | #define L2_1_MCU_DM2_BK5 0x0400134140 | |
266 | #define L2_1_MCU_DM2_BK7 0x04001341c0 | |
267 | ||
268 | #define L2_1_MCU_DM3_BK1 0x0600134040 | |
269 | #define L2_1_MCU_DM3_BK3 0x06001340c0 | |
270 | #define L2_1_MCU_DM3_BK5 0x0600134140 | |
271 | #define L2_1_MCU_DM3_BK7 0x06001341c0 | |
272 | ||
273 | #define L2_1_MCU_DM4_BK1 0x0800134040 | |
274 | #define L2_1_MCU_DM4_BK3 0x08001340c0 | |
275 | #define L2_1_MCU_DM4_BK5 0x0800134140 | |
276 | #define L2_1_MCU_DM4_BK7 0x08001341c0 | |
277 | ||
278 | #define L2_1_MCU_DM5_BK1 0x0a00134040 | |
279 | #define L2_1_MCU_DM5_BK3 0x0a001340c0 | |
280 | #define L2_1_MCU_DM5_BK5 0x0a00134140 | |
281 | #define L2_1_MCU_DM5_BK7 0x0a001341c0 | |
282 | ||
283 | #define L2_1_MCU_DM6_BK1 0x0c00134040 | |
284 | #define L2_1_MCU_DM6_BK3 0x0c001340c0 | |
285 | #define L2_1_MCU_DM6_BK5 0x0c00134140 | |
286 | #define L2_1_MCU_DM6_BK7 0x0c001341c0 | |
287 | ||
288 | #define L2_1_MCU_DM7_BK1 0x0e00134040 | |
289 | #define L2_1_MCU_DM7_BK3 0x0e001340c0 | |
290 | #define L2_1_MCU_DM7_BK5 0x0e00134140 | |
291 | #define L2_1_MCU_DM7_BK7 0x0e001341c0 | |
292 | #endif | |
293 | ||
294 | #ifdef L2_OFF | |
295 | #define L2_ON_OFF_DM 0x1 | |
296 | #else | |
297 | #define L2_ON_OFF_DM 0x0 | |
298 | #endif | |
299 | ||
300 | ||
301 | .text | |
302 | .global main | |
303 | ||
304 | ||
305 | main: | |
306 | ta T_CHANGE_HPRIV | |
307 | nop | |
308 | ||
309 | membar #Sync | |
310 | ||
311 | get_th_id_o0: | |
312 | ta T_RD_THID | |
313 | ||
314 | ! Preserve Thread id in %g4 left shifted 28 bits | |
315 | sllx %o1, 24, %g4 | |
316 | nop | |
317 | ||
318 | #ifdef BANK0 | |
319 | /********************** | |
320 | L2 Bank 0 | |
321 | **********************/ | |
322 | ||
323 | /******************* | |
324 | DIMM 0,1 | |
325 | *******************/ | |
326 | L20_dimm01_init: | |
327 | setx 0x1111111111110000, %g7, %g5 | |
328 | ||
329 | setx L20_MCU_DM0_BK0, %g7, %o0 | |
330 | setx L20_MCU_DM0_BK2, %g7, %o1 | |
331 | setx L20_MCU_DM0_BK4, %g7, %o2 | |
332 | setx L20_MCU_DM0_BK6, %g7, %o3 | |
333 | ||
334 | setx L20_MCU_DM1_BK0, %g7, %o4 | |
335 | setx L20_MCU_DM1_BK2, %g7, %o5 | |
336 | setx L20_MCU_DM1_BK4, %g7, %o6 | |
337 | setx L20_MCU_DM1_BK6, %g7, %o7 | |
338 | ||
339 | ! to make the addr unique for each thread in PA[28] and up | |
340 | add %o0, %g4, %l0 | |
341 | add %o1, %g4, %l1 | |
342 | add %o2, %g4, %l2 | |
343 | add %o3, %g4, %l3 | |
344 | add %o4, %g4, %l4 | |
345 | add %o5, %g4, %l5 | |
346 | add %o6, %g4, %l6 | |
347 | add %o7, %g4, %l7 | |
348 | ||
349 | setx 0xabcdef1234, %g7, %g2 | |
350 | mov 0x1, %g1 | |
351 | sllx %g1, 22, %g6 | |
352 | ||
353 | L20_dimm01_rd_wr: | |
354 | !DIMM0,1 | |
355 | stx %g5, [%l0] | |
356 | stx %g5, [%l1] | |
357 | stx %g5, [%l2] | |
358 | stx %g5, [%l3] | |
359 | stx %g5, [%l4] | |
360 | stx %g5, [%l5] | |
361 | stx %g5, [%l6] | |
362 | stx %g5, [%l7] | |
363 | ||
364 | add %l0, %g6, %o0 | |
365 | add %l1, %g6, %o1 | |
366 | add %l2, %g6, %o2 | |
367 | add %l3, %g6, %o3 | |
368 | add %l4, %g6, %o4 | |
369 | add %l5, %g6, %o5 | |
370 | add %l6, %g6, %o6 | |
371 | add %l7, %g6, %o7 | |
372 | ||
373 | ! cause wrb | |
374 | stx %g2, [%o0] | |
375 | stx %g2, [%o1] | |
376 | stx %g2, [%o2] | |
377 | stx %g2, [%o3] | |
378 | stx %g2, [%o4] | |
379 | stx %g2, [%o5] | |
380 | stx %g2, [%o6] | |
381 | stx %g2, [%o7] | |
382 | ||
383 | /******************* | |
384 | DIMM2,3 | |
385 | *******************/ | |
386 | L20_dimm23_init: | |
387 | setx 0x1111111111110000, %g7, %g5 | |
388 | ||
389 | setx L20_MCU_DM2_BK0, %g7, %o0 | |
390 | setx L20_MCU_DM2_BK2, %g7, %o1 | |
391 | setx L20_MCU_DM2_BK4, %g7, %o2 | |
392 | setx L20_MCU_DM2_BK6, %g7, %o3 | |
393 | ||
394 | setx L20_MCU_DM3_BK0, %g7, %o4 | |
395 | setx L20_MCU_DM3_BK2, %g7, %o5 | |
396 | setx L20_MCU_DM3_BK4, %g7, %o6 | |
397 | setx L20_MCU_DM3_BK6, %g7, %o7 | |
398 | ||
399 | ! to make the addr unique for each thread in PA[28] and up | |
400 | add %o0, %g4, %l0 | |
401 | add %o1, %g4, %l1 | |
402 | add %o2, %g4, %l2 | |
403 | add %o3, %g4, %l3 | |
404 | add %o4, %g4, %l4 | |
405 | add %o5, %g4, %l5 | |
406 | add %o6, %g4, %l6 | |
407 | add %o7, %g4, %l7 | |
408 | ||
409 | setx 0xabcdef1234, %g7, %g2 | |
410 | mov 0x1, %g1 | |
411 | sllx %g1, 22, %g6 | |
412 | ||
413 | L20_dimm23_rd_wr: | |
414 | stx %g5, [%l0] | |
415 | stx %g5, [%l1] | |
416 | stx %g5, [%l2] | |
417 | stx %g5, [%l3] | |
418 | stx %g5, [%l4] | |
419 | stx %g5, [%l5] | |
420 | stx %g5, [%l6] | |
421 | stx %g5, [%l7] | |
422 | ||
423 | add %l0, %g6, %o0 | |
424 | add %l1, %g6, %o1 | |
425 | add %l2, %g6, %o2 | |
426 | add %l3, %g6, %o3 | |
427 | add %l4, %g6, %o4 | |
428 | add %l5, %g6, %o5 | |
429 | add %l6, %g6, %o6 | |
430 | add %l7, %g6, %o7 | |
431 | ||
432 | ! cause wrb | |
433 | stx %g2, [%o0] | |
434 | stx %g2, [%o1] | |
435 | stx %g2, [%o2] | |
436 | stx %g2, [%o3] | |
437 | stx %g2, [%o4] | |
438 | stx %g2, [%o5] | |
439 | stx %g2, [%o6] | |
440 | stx %g2, [%o7] | |
441 | ||
442 | ||
443 | /******************************** | |
444 | * DIMM 4, 5 | |
445 | *********************************/ | |
446 | L20_dimm45_init: | |
447 | setx 0x1111111111110000, %g7, %g5 | |
448 | ||
449 | setx L20_MCU_DM4_BK0, %g7, %o0 | |
450 | setx L20_MCU_DM4_BK2, %g7, %o1 | |
451 | setx L20_MCU_DM4_BK4, %g7, %o2 | |
452 | setx L20_MCU_DM4_BK6, %g7, %o3 | |
453 | ||
454 | setx L20_MCU_DM5_BK0, %g7, %o4 | |
455 | setx L20_MCU_DM5_BK2, %g7, %o5 | |
456 | setx L20_MCU_DM5_BK4, %g7, %o6 | |
457 | setx L20_MCU_DM5_BK6, %g7, %o7 | |
458 | ||
459 | ! to make the addr unique for each thread in PA[28] and up | |
460 | add %o0, %g4, %l0 | |
461 | add %o1, %g4, %l1 | |
462 | add %o2, %g4, %l2 | |
463 | add %o3, %g4, %l3 | |
464 | add %o4, %g4, %l4 | |
465 | add %o5, %g4, %l5 | |
466 | add %o6, %g4, %l6 | |
467 | add %o7, %g4, %l7 | |
468 | ||
469 | setx 0xabcdef1234, %g7, %g2 | |
470 | mov 0x1, %g1 | |
471 | sllx %g1, 22, %g6 | |
472 | ||
473 | ||
474 | L20_dimm45_rd_wr: | |
475 | stx %g5, [%l0] | |
476 | stx %g5, [%l1] | |
477 | stx %g5, [%l2] | |
478 | stx %g5, [%l3] | |
479 | stx %g5, [%l4] | |
480 | stx %g5, [%l5] | |
481 | stx %g5, [%l6] | |
482 | stx %g5, [%l7] | |
483 | ||
484 | add %l0, %g6, %o0 | |
485 | add %l1, %g6, %o1 | |
486 | add %l2, %g6, %o2 | |
487 | add %l3, %g6, %o3 | |
488 | add %l4, %g6, %o4 | |
489 | add %l5, %g6, %o5 | |
490 | add %l6, %g6, %o6 | |
491 | add %l7, %g6, %o7 | |
492 | ||
493 | ! cause wrb | |
494 | stx %g2, [%o0] | |
495 | stx %g2, [%o1] | |
496 | stx %g2, [%o2] | |
497 | stx %g2, [%o3] | |
498 | stx %g2, [%o4] | |
499 | stx %g2, [%o5] | |
500 | stx %g2, [%o6] | |
501 | stx %g2, [%o7] | |
502 | ||
503 | /******************************** | |
504 | * DIMM 6, 7 | |
505 | *********************************/ | |
506 | L20_dimm67_init: | |
507 | setx 0x1111111111110000, %g7, %g5 | |
508 | ||
509 | setx L20_MCU_DM6_BK0, %g7, %o0 | |
510 | setx L20_MCU_DM6_BK2, %g7, %o1 | |
511 | setx L20_MCU_DM6_BK4, %g7, %o2 | |
512 | setx L20_MCU_DM6_BK6, %g7, %o3 | |
513 | ||
514 | setx L20_MCU_DM7_BK0, %g7, %o4 | |
515 | setx L20_MCU_DM7_BK2, %g7, %o5 | |
516 | setx L20_MCU_DM7_BK4, %g7, %o6 | |
517 | setx L20_MCU_DM7_BK6, %g7, %o7 | |
518 | ||
519 | ! to make the addr unique for each thread in PA[28] and up | |
520 | add %o0, %g4, %l0 | |
521 | add %o1, %g4, %l1 | |
522 | add %o2, %g4, %l2 | |
523 | add %o3, %g4, %l3 | |
524 | add %o4, %g4, %l4 | |
525 | add %o5, %g4, %l5 | |
526 | add %o6, %g4, %l6 | |
527 | add %o7, %g4, %l7 | |
528 | ||
529 | setx 0xabcdef1234, %g7, %g2 | |
530 | mov 0x1, %g1 | |
531 | sllx %g1, 22, %g6 | |
532 | ||
533 | L20_dimm67_rd_wr: | |
534 | stx %g5, [%l0] | |
535 | stx %g5, [%l1] | |
536 | stx %g5, [%l2] | |
537 | stx %g5, [%l3] | |
538 | stx %g5, [%l4] | |
539 | stx %g5, [%l5] | |
540 | stx %g5, [%l6] | |
541 | stx %g5, [%l7] | |
542 | ||
543 | add %l0, %g6, %o0 | |
544 | add %l1, %g6, %o1 | |
545 | add %l2, %g6, %o2 | |
546 | add %l3, %g6, %o3 | |
547 | add %l4, %g6, %o4 | |
548 | add %l5, %g6, %o5 | |
549 | add %l6, %g6, %o6 | |
550 | add %l7, %g6, %o7 | |
551 | ||
552 | ! cause wrb | |
553 | stx %g2, [%o0] | |
554 | stx %g2, [%o1] | |
555 | stx %g2, [%o2] | |
556 | stx %g2, [%o3] | |
557 | stx %g2, [%o4] | |
558 | stx %g2, [%o5] | |
559 | stx %g2, [%o6] | |
560 | stx %g2, [%o7] | |
561 | ||
562 | #endif | |
563 | ||
564 | #ifdef BANK1 | |
565 | ||
566 | /*********************************** | |
567 | L2 Bank 1 | |
568 | ***********************************/ | |
569 | ||
570 | /******************************** | |
571 | * DIMM 0, 1 | |
572 | *********************************/ | |
573 | L2_1_dimm01_init: | |
574 | setx 0x1111111111110000, %g7, %g5 | |
575 | ||
576 | setx L2_1_MCU_DM0_BK1, %g7, %o0 | |
577 | setx L2_1_MCU_DM0_BK3, %g7, %o1 | |
578 | setx L2_1_MCU_DM0_BK5, %g7, %o2 | |
579 | setx L2_1_MCU_DM0_BK7, %g7, %o3 | |
580 | ||
581 | setx L2_1_MCU_DM1_BK1, %g7, %o4 | |
582 | setx L2_1_MCU_DM1_BK3, %g7, %o5 | |
583 | setx L2_1_MCU_DM1_BK5, %g7, %o6 | |
584 | setx L2_1_MCU_DM1_BK7, %g7, %o7 | |
585 | ||
586 | ! to make the addr unique for each thread in PA[28] and up | |
587 | add %o0, %g4, %l0 | |
588 | add %o1, %g4, %l1 | |
589 | add %o2, %g4, %l2 | |
590 | add %o3, %g4, %l3 | |
591 | add %o4, %g4, %l4 | |
592 | add %o5, %g4, %l5 | |
593 | add %o6, %g4, %l6 | |
594 | add %o7, %g4, %l7 | |
595 | ||
596 | setx 0xabcdef1234, %g7, %g2 | |
597 | mov 0x1, %g1 | |
598 | sllx %g1, 22, %g6 | |
599 | ||
600 | L2_1_dimm01_rd_wr: | |
601 | stx %g5, [%l0] | |
602 | stx %g5, [%l1] | |
603 | stx %g5, [%l2] | |
604 | stx %g5, [%l3] | |
605 | stx %g5, [%l4] | |
606 | stx %g5, [%l5] | |
607 | stx %g5, [%l6] | |
608 | stx %g5, [%l7] | |
609 | ||
610 | add %l0, %g6, %o0 | |
611 | add %l1, %g6, %o1 | |
612 | add %l2, %g6, %o2 | |
613 | add %l3, %g6, %o3 | |
614 | add %l4, %g6, %o4 | |
615 | add %l5, %g6, %o5 | |
616 | add %l6, %g6, %o6 | |
617 | add %l7, %g6, %o7 | |
618 | ||
619 | ! cause wrb | |
620 | stx %g2, [%o0] | |
621 | stx %g2, [%o1] | |
622 | stx %g2, [%o2] | |
623 | stx %g2, [%o3] | |
624 | stx %g2, [%o4] | |
625 | stx %g2, [%o5] | |
626 | stx %g2, [%o6] | |
627 | stx %g2, [%o7] | |
628 | ||
629 | /******************************** | |
630 | * DIMM 2, 3 | |
631 | *********************************/ | |
632 | L2_1_dimm23_init: | |
633 | setx 0x1111111111110000, %g7, %g5 | |
634 | ||
635 | setx L2_1_MCU_DM0_BK1, %g7, %o0 | |
636 | setx L2_1_MCU_DM0_BK3, %g7, %o1 | |
637 | setx L2_1_MCU_DM0_BK5, %g7, %o2 | |
638 | setx L2_1_MCU_DM0_BK7, %g7, %o3 | |
639 | ||
640 | setx L2_1_MCU_DM1_BK1, %g7, %o4 | |
641 | setx L2_1_MCU_DM1_BK3, %g7, %o5 | |
642 | setx L2_1_MCU_DM1_BK5, %g7, %o6 | |
643 | setx L2_1_MCU_DM1_BK7, %g7, %o7 | |
644 | ||
645 | ! to make the addr unique for each thread in PA[28] and up | |
646 | add %o0, %g4, %l0 | |
647 | add %o1, %g4, %l1 | |
648 | add %o2, %g4, %l2 | |
649 | add %o3, %g4, %l3 | |
650 | add %o4, %g4, %l4 | |
651 | add %o5, %g4, %l5 | |
652 | add %o6, %g4, %l6 | |
653 | add %o7, %g4, %l7 | |
654 | ||
655 | setx 0xabcdef1234, %g7, %g2 | |
656 | mov 0x1, %g1 | |
657 | sllx %g1, 22, %g6 | |
658 | ||
659 | ||
660 | L2_1_dimm23_rd_wr: | |
661 | stx %g5, [%l0] | |
662 | stx %g5, [%l1] | |
663 | stx %g5, [%l2] | |
664 | stx %g5, [%l3] | |
665 | stx %g5, [%l4] | |
666 | stx %g5, [%l5] | |
667 | stx %g5, [%l6] | |
668 | stx %g5, [%l7] | |
669 | ||
670 | add %l0, %g6, %o0 | |
671 | add %l1, %g6, %o1 | |
672 | add %l2, %g6, %o2 | |
673 | add %l3, %g6, %o3 | |
674 | add %l4, %g6, %o4 | |
675 | add %l5, %g6, %o5 | |
676 | add %l6, %g6, %o6 | |
677 | add %l7, %g6, %o7 | |
678 | ||
679 | ! cause wrb | |
680 | stx %g2, [%o0] | |
681 | stx %g2, [%o1] | |
682 | stx %g2, [%o2] | |
683 | stx %g2, [%o3] | |
684 | stx %g2, [%o4] | |
685 | stx %g2, [%o5] | |
686 | stx %g2, [%o6] | |
687 | stx %g2, [%o7] | |
688 | ||
689 | ||
690 | /******************************** | |
691 | * DIMM4, 5 | |
692 | *********************************/ | |
693 | L2_1_dimm45_init: | |
694 | setx 0x1111111111110000, %g7, %g5 | |
695 | ||
696 | setx L2_1_MCU_DM0_BK1, %g7, %o0 | |
697 | setx L2_1_MCU_DM0_BK3, %g7, %o1 | |
698 | setx L2_1_MCU_DM0_BK5, %g7, %o2 | |
699 | setx L2_1_MCU_DM0_BK7, %g7, %o3 | |
700 | ||
701 | setx L2_1_MCU_DM1_BK1, %g7, %o4 | |
702 | setx L2_1_MCU_DM1_BK3, %g7, %o5 | |
703 | setx L2_1_MCU_DM1_BK5, %g7, %o6 | |
704 | setx L2_1_MCU_DM1_BK7, %g7, %o7 | |
705 | ||
706 | ! to make the addr unique for each thread in PA[28] and up | |
707 | add %o0, %g4, %l0 | |
708 | add %o1, %g4, %l1 | |
709 | add %o2, %g4, %l2 | |
710 | add %o3, %g4, %l3 | |
711 | add %o4, %g4, %l4 | |
712 | add %o5, %g4, %l5 | |
713 | add %o6, %g4, %l6 | |
714 | add %o7, %g4, %l7 | |
715 | ||
716 | setx 0xabcdef1234, %g7, %g2 | |
717 | mov 0x1, %g1 | |
718 | sllx %g1, 22, %g6 | |
719 | ||
720 | ||
721 | L2_1_dimm45_rd_wr: | |
722 | stx %g5, [%l0] | |
723 | stx %g5, [%l1] | |
724 | stx %g5, [%l2] | |
725 | stx %g5, [%l3] | |
726 | stx %g5, [%l4] | |
727 | stx %g5, [%l5] | |
728 | stx %g5, [%l6] | |
729 | stx %g5, [%l7] | |
730 | ||
731 | add %l0, %g6, %o0 | |
732 | add %l1, %g6, %o1 | |
733 | add %l2, %g6, %o2 | |
734 | add %l3, %g6, %o3 | |
735 | add %l4, %g6, %o4 | |
736 | add %l5, %g6, %o5 | |
737 | add %l6, %g6, %o6 | |
738 | add %l7, %g6, %o7 | |
739 | ||
740 | ! cause wrb | |
741 | stx %g2, [%o0] | |
742 | stx %g2, [%o1] | |
743 | stx %g2, [%o2] | |
744 | stx %g2, [%o3] | |
745 | stx %g2, [%o4] | |
746 | stx %g2, [%o5] | |
747 | stx %g2, [%o6] | |
748 | stx %g2, [%o7] | |
749 | ||
750 | /******************************** | |
751 | * DIMM 6, 7 | |
752 | *********************************/ | |
753 | L2_1_dimm67_init: | |
754 | setx 0x1111111111110000, %g7, %g5 | |
755 | ||
756 | setx L2_1_MCU_DM0_BK1, %g7, %o0 | |
757 | setx L2_1_MCU_DM0_BK3, %g7, %o1 | |
758 | setx L2_1_MCU_DM0_BK5, %g7, %o2 | |
759 | setx L2_1_MCU_DM0_BK7, %g7, %o3 | |
760 | ||
761 | setx L2_1_MCU_DM1_BK1, %g7, %o4 | |
762 | setx L2_1_MCU_DM1_BK3, %g7, %o5 | |
763 | setx L2_1_MCU_DM1_BK5, %g7, %o6 | |
764 | setx L2_1_MCU_DM1_BK7, %g7, %o7 | |
765 | ||
766 | ! to make the addr unique for each thread in PA[28] and up | |
767 | add %o0, %g4, %l0 | |
768 | add %o1, %g4, %l1 | |
769 | add %o2, %g4, %l2 | |
770 | add %o3, %g4, %l3 | |
771 | add %o4, %g4, %l4 | |
772 | add %o5, %g4, %l5 | |
773 | add %o6, %g4, %l6 | |
774 | add %o7, %g4, %l7 | |
775 | ||
776 | setx 0xabcdef1234, %g7, %g2 | |
777 | mov 0x1, %g1 | |
778 | sllx %g1, 22, %g6 | |
779 | ||
780 | ||
781 | L2_1_dimm67_rd_wr: | |
782 | stx %g5, [%l0] | |
783 | stx %g5, [%l1] | |
784 | stx %g5, [%l2] | |
785 | stx %g5, [%l3] | |
786 | stx %g5, [%l4] | |
787 | stx %g5, [%l5] | |
788 | stx %g5, [%l6] | |
789 | stx %g5, [%l7] | |
790 | ||
791 | add %l0, %g6, %o0 | |
792 | add %l1, %g6, %o1 | |
793 | add %l2, %g6, %o2 | |
794 | add %l3, %g6, %o3 | |
795 | add %l4, %g6, %o4 | |
796 | add %l5, %g6, %o5 | |
797 | add %l6, %g6, %o6 | |
798 | add %l7, %g6, %o7 | |
799 | ||
800 | ! cause wrb | |
801 | stx %g2, [%o0] | |
802 | stx %g2, [%o1] | |
803 | stx %g2, [%o2] | |
804 | stx %g2, [%o3] | |
805 | stx %g2, [%o4] | |
806 | stx %g2, [%o5] | |
807 | stx %g2, [%o6] | |
808 | stx %g2, [%o7] | |
809 | ||
810 | #endif | |
811 | ||
812 | ||
813 | /****************************************************** | |
814 | * Exit code | |
815 | *******************************************************/ | |
816 | ||
817 | test_pass: | |
818 | EXIT_GOOD | |
819 | ||
820 | test_fail: | |
821 | EXIT_BAD | |
822 |