Commit | Line | Data |
---|---|---|
86530b38 AT |
1 | /* |
2 | * ========== Copyright Header Begin ========================================== | |
3 | * | |
4 | * OpenSPARC T2 Processor File: memop_mt2_invalidate_l1.s | |
5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
7 | * | |
8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; version 2 of the License. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | * For the avoidance of doubt, and except that if any non-GPL license | |
24 | * choice is available it will apply instead, Sun elects to use only | |
25 | * the General Public License version 2 (GPLv2) at this time for any | |
26 | * software where a choice of GPL license versions is made | |
27 | * available with the language indicating that GPLv2 or any later version | |
28 | * may be used, or where a choice of which version of the GPL is applied is | |
29 | * otherwise unspecified. | |
30 | * | |
31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
32 | * CA 95054 USA or visit www.sun.com if you need additional information or | |
33 | * have any questions. | |
34 | * | |
35 | * | |
36 | * ========== Copyright Header End ============================================ | |
37 | */ | |
38 | #define MAIN_PAGE_NUCLEUS_ALSO | |
39 | #define MAIN_PAGE_HV_ALSO | |
40 | #define TIMEOUT 0x200 | |
41 | ||
42 | #include "hboot.s" | |
43 | #include "asi_s.h" | |
44 | ||
45 | /************************************************************************ | |
46 | Test case code start | |
47 | ************************************************************************/ | |
48 | ||
49 | .text | |
50 | .global main | |
51 | ||
52 | main: nop | |
53 | ta T_CHANGE_HPRIV | |
54 | nop | |
55 | ||
56 | ta T_RD_THID | |
57 | cmp %o1, 0x0 | |
58 | be main_t0 | |
59 | nop | |
60 | cmp %o1, 0x1 | |
61 | be main_t1 | |
62 | nop | |
63 | ||
64 | ||
65 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
66 | ! | |
67 | ! Thread 0 Start | |
68 | ! | |
69 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
70 | ||
71 | ! - For a line in D$ for thread 0, have thread 1 store | |
72 | ! to that line to invalidate it | |
73 | ||
74 | main_t0: | |
75 | setx data, %g1, %g2 | |
76 | set 1, %g7 | |
77 | st %g7, [%g2] ! put a line into D$ | |
78 | ! Tread 1 is waiting for this. | |
79 | ||
80 | ! Now wait for Thread 1 to put a 2 into this location, | |
81 | ! which invalidates this D$ line. | |
82 | ||
83 | setx TIMEOUT, %g1, %g3 | |
84 | wait1_t0: | |
85 | ld [%g2], %g7 | |
86 | cmp %g3, 0 | |
87 | be test_failed | |
88 | nop | |
89 | cmp %g7, 2 | |
90 | bne wait1_t0 | |
91 | sub %g3, 1, %g3 | |
92 | ||
93 | ! - For a line in I$ for thread 0, have thread 1 store | |
94 | ! to that line to invalidate it. | |
95 | ||
96 | icache1_t0: | |
97 | mov %g0, %g7 | |
98 | set 3, %g6 | |
99 | setx TIMEOUT, %g1, %g5 | |
100 | ||
101 | loop1_t0: | |
102 | st %g6, [%g2] ! This is the instr. to be invalidated | |
103 | ! Thread 1 is waiting for this | |
104 | cmp %g5, 0 | |
105 | be test_failed | |
106 | cmp %g7, 0 ! Thread 1 will change st to | |
107 | be loop1_t0 ! add %g7, 1, %g7 | |
108 | sub %g5, 1, %g5 | |
109 | ||
110 | ||
111 | ! - For a line in I$ for thread 0, have the corresponding | |
112 | ! L2$ line replaced, causing the I$ line to be invalidated. | |
113 | ||
114 | set 4, %g6 | |
115 | setx TIMEOUT, %g1, %g5 | |
116 | ||
117 | st %g6, [%g2] ! Signal Thread 1 we're ready | |
118 | loop2_t0: | |
119 | cmp %g5, 0 | |
120 | be test_failed | |
121 | ld [%g2], %g3 ! Wait for Thread 1's signal | |
122 | cmp %g3, 5 | |
123 | bne loop2_t0 | |
124 | sub %g5, 1, %g5 | |
125 | ||
126 | ! DONE | |
127 | ||
128 | ba test_passed | |
129 | nop | |
130 | ||
131 | ||
132 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
133 | ! | |
134 | ! Thread 1 Start | |
135 | ! | |
136 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
137 | ||
138 | ! - For a line in D$ for thread 0, have thread 1 store | |
139 | ! to that line to invalidate it | |
140 | main_t1: | |
141 | ! Wait for Thread 0 to be ready | |
142 | setx data, %g1, %g2 | |
143 | setx TIMEOUT, %g1, %g7 | |
144 | wait1_t1: | |
145 | cmp %g7, 0 | |
146 | be test_failed | |
147 | ld [%g2], %g3 | |
148 | cmp %g3, 0 | |
149 | be wait1_t1 | |
150 | sub %g7, 1, %g7 | |
151 | ||
152 | set 2, %g3 | |
153 | st %g3, [%g2] ! Invalidate line in Thread 0 D$ | |
154 | ||
155 | ! - For a line in I$ for thread 0, have thread 1 store | |
156 | ! to that line to invalidate it. | |
157 | ||
158 | setx TIMEOUT, %g1, %g7 | |
159 | ||
160 | ! Wait for Thread 0 to be ready | |
161 | ||
162 | wait2_t1: | |
163 | cmp %g7, 0 | |
164 | be test_failed | |
165 | ld [%g2], %g3 | |
166 | cmp %g3, 3 | |
167 | bne wait2_t1 | |
168 | sub %g7, 1, %g7 | |
169 | ||
170 | ! Now do store to invalidate Tread 0 I$ line | |
171 | ||
172 | setx loop1_t0, %g1, %g4 | |
173 | setx 0x8e01e001, %g1, %g3 ! add %g7, 1, %g7 | |
174 | st %g3, [%g4] | |
175 | ||
176 | ! - For a line in I$ for thread 0, have the corresponding | |
177 | ! L2$ line replaced, causing the I$ line to be invalidated. | |
178 | ||
179 | ! Wait for Thread 0 to be ready | |
180 | ||
181 | setx TIMEOUT, %g1, %g7 | |
182 | wait3_t1: | |
183 | cmp %g7, 0 | |
184 | be test_failed | |
185 | ld [%g2], %g3 | |
186 | cmp %g3, 4 | |
187 | bne wait3_t1 | |
188 | sub %g7, 1, %g7 | |
189 | ||
190 | ! Cause L2$ line corresponding to Thread 0 I$ line to be replaced | |
191 | ||
192 | setx loop2_t0, %g1, %o0 | |
193 | call flush_l2_line | |
194 | nop | |
195 | ||
196 | ! Wait a bit for Thread 0 to see effect if I$ invalidate | |
197 | ||
198 | set 0x80, %g7 | |
199 | wait4_t1: | |
200 | cmp %g7, 0 | |
201 | bne wait4_t1 | |
202 | sub %g7, 1, %g7 | |
203 | ||
204 | ! Now signal Thread 0, we're all done | |
205 | ||
206 | set 5, %g3 | |
207 | st %g3, [%g2] | |
208 | ||
209 | ! DONE | |
210 | ||
211 | ba test_passed | |
212 | nop | |
213 | ||
214 | ||
215 | /********************************************************************** | |
216 | * Common code. | |
217 | *********************************************************************/ | |
218 | ||
219 | ! Assumes that %o0 contains VA that maps to L2$ line to be flushed. | |
220 | ! This is done by doing 16 loads from different addresses that alias | |
221 | ! to that line. Note that this will cause a writeback if the L2$ | |
222 | ! line is dirty. | |
223 | ||
224 | flush_l2_line: | |
225 | setx 0x3ffff, %o1, %o2 | |
226 | and %o0, %g2, %o3 | |
227 | setx 0x40000, %o1, %o2 | |
228 | setx alias1, %o1, %o4 | |
229 | ld [%o3+%o4], %o5 | |
230 | add %o4, %o2, %o4 | |
231 | ld [%o3+%o4], %o5 | |
232 | add %o4, %o2, %o4 | |
233 | ld [%o3+%o4], %o5 | |
234 | add %o4, %o2, %o4 | |
235 | ld [%o3+%o4], %o5 | |
236 | add %o4, %o2, %o4 | |
237 | ld [%o3+%o4], %o5 | |
238 | add %o4, %o2, %o4 | |
239 | ld [%o3+%o4], %o5 | |
240 | add %o4, %o2, %o4 | |
241 | ld [%o3+%o4], %o5 | |
242 | add %o4, %o2, %o4 | |
243 | ld [%o3+%o4], %o5 | |
244 | add %o4, %o2, %o4 | |
245 | ld [%o3+%o4], %o5 | |
246 | add %o4, %o2, %o4 | |
247 | ld [%o3+%o4], %o5 | |
248 | add %o4, %o2, %o4 | |
249 | ld [%o3+%o4], %o5 | |
250 | add %o4, %o2, %o4 | |
251 | ld [%o3+%o4], %o5 | |
252 | add %o4, %o2, %o4 | |
253 | ld [%o3+%o4], %o5 | |
254 | add %o4, %o2, %o4 | |
255 | ld [%o3+%o4], %o5 | |
256 | add %o4, %o2, %o4 | |
257 | ld [%o3+%o4], %o5 | |
258 | add %o4, %o2, %o4 | |
259 | ld [%o3+%o4], %o5 | |
260 | jmpl %o7+0x8, %g0 | |
261 | nop | |
262 | ||
263 | test_passed: | |
264 | EXIT_GOOD | |
265 | ||
266 | test_failed: | |
267 | EXIT_BAD | |
268 | ||
269 | ||
270 | /************************************************************************ | |
271 | Test case data start | |
272 | ************************************************************************/ | |
273 | .data | |
274 | user_data_start: | |
275 | ||
276 | data: .xword 0x0000000000000000 | |
277 | ||
278 | .align 0x40000 ! each 246kb, 0x40000, aliases to same L2$ line | |
279 | alias1: | |
280 | .skip 1024 | |
281 | ||
282 | .end | |
283 | ||
284 | ||
285 |