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1 | /* |
2 | * ========== Copyright Header Begin ========================================== | |
3 | * | |
4 | * OpenSPARC T2 Processor File: pmu_ccx_sel5_0x02_thAll.s | |
5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
7 | * | |
8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; version 2 of the License. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | * For the avoidance of doubt, and except that if any non-GPL license | |
24 | * choice is available it will apply instead, Sun elects to use only | |
25 | * the General Public License version 2 (GPLv2) at this time for any | |
26 | * software where a choice of GPL license versions is made | |
27 | * available with the language indicating that GPLv2 or any later version | |
28 | * may be used, or where a choice of which version of the GPL is applied is | |
29 | * otherwise unspecified. | |
30 | * | |
31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
32 | * CA 95054 USA or visit www.sun.com if you need additional information or | |
33 | * have any questions. | |
34 | * | |
35 | * | |
36 | * ========== Copyright Header End ============================================ | |
37 | */ | |
38 | #define PIC_COUNT 1 | |
39 | ||
40 | #define MAX_THREAD_TIMEOUT 0x1fff | |
41 | #define MAIN_PAGE_HV_ALSO | |
42 | #define NO_TRAPCHECK | |
43 | #define H_HT0_Control_Word_Queue_Interrupt_0x3c | |
44 | #define My_HT0_Control_Word_Queue_Interrupt_0x3c \ | |
45 | wr %g0, 0x40, %asi; \ | |
46 | ldxa [%g0 + ASI_SPU_CWQ_CSR]%asi, %i5; \ | |
47 | stxa %i5, [%g0 + ASI_SPU_CWQ_CSR]%asi; \ | |
48 | ba CHECK_PIC_COUNT; \ | |
49 | nop;nop;nop;nop; | |
50 | #include "hboot.s" | |
51 | ||
52 | .text | |
53 | .global main | |
54 | ||
55 | main: | |
56 | ||
57 | and %g0,0,%i6 | |
58 | ||
59 | setx 0x0000deadbeefbad0, %l5, %l4 | |
60 | ||
61 | !# Switch to hpriv mode | |
62 | ta T_CHANGE_HPRIV | |
63 | !# Check to make sure pic is zero | |
64 | !#rd %pic, %g4 | |
65 | !#cmp %g0, %g4 | |
66 | !#bne,pn %icc, fail | |
67 | !#nop | |
68 | wr %g0, %g0, %pic !zero out pic | |
69 | ||
70 | !# Setup PCR Register | |
71 | set 0x0000000038094088, %g2 | |
72 | wr %g2, %g0, %pcr | |
73 | wr %g0, %g0, %pic !zero out pic | |
74 | ||
75 | !Get TID | |
76 | ta T_RD_THID | |
77 | mov %o1, %l6 | |
78 | nop | |
79 | ||
80 | cmp %l6, 0 | |
81 | be thread_0 | |
82 | nop | |
83 | ||
84 | cmp %l6, 1 | |
85 | be thread_other | |
86 | nop | |
87 | ||
88 | !all other threads execute the same code | |
89 | cmp %l6, 2 | |
90 | be thread_other | |
91 | nop | |
92 | ||
93 | cmp %l6, 3 | |
94 | be thread_other | |
95 | nop | |
96 | ||
97 | cmp %l6, 4 | |
98 | be thread_other | |
99 | nop | |
100 | ||
101 | cmp %l6, 5 | |
102 | be thread_other | |
103 | nop | |
104 | ||
105 | cmp %l6, 6 | |
106 | be thread_other | |
107 | nop | |
108 | ||
109 | cmp %l6, 7 | |
110 | be thread_other | |
111 | nop | |
112 | ||
113 | ba fail | |
114 | ||
115 | thread_0: | |
116 | !# setup ASI register to point to SPU | |
117 | wr %g0, 0x40, %asi | |
118 | ||
119 | InitialCW_0: | |
120 | ||
121 | !# Make sure CWQ is currently disabled, not busy, not terminated, no protocol error; else fail | |
122 | ldxa [%g0 + ASI_SPU_CWQ_CSR] %asi, %l1 | |
123 | and %l1, 0xf, %l2 | |
124 | cmp %g0, %l2 | |
125 | bne,pn %xcc, fail | |
126 | nop | |
127 | ||
128 | !# allocate control word queue (e.g., setup head/tail/first/last registers) | |
129 | setx CWQ_BASE, %g1, %l6 | |
130 | ||
131 | !# write base addr to first, head, and tail ptr | |
132 | !# first store to first | |
133 | stxa %l6, [%g0 + ASI_SPU_CWQ_FIRST] %asi | |
134 | ldxa [%g0 + ASI_SPU_CWQ_FIRST] %asi, %l1 | |
135 | !# Mask off upper 16 bits | |
136 | setx 0x0000ffffffffffff, %l5, %l0 | |
137 | and %l0, %l6, %l2 | |
138 | cmp %l1, %l2 | |
139 | bne,pn %xcc, fail | |
140 | nop | |
141 | ||
142 | !# then to head | |
143 | stxa %l6, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
144 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l1 | |
145 | cmp %l1, %l2 | |
146 | bne,pn %xcc, fail | |
147 | nop | |
148 | ||
149 | !# then to tail | |
150 | stxa %l6, [%g0 + ASI_SPU_CWQ_TAIL] %asi | |
151 | ldxa [%g0 + ASI_SPU_CWQ_TAIL] %asi, %l1 | |
152 | cmp %l1, %l2 | |
153 | bne,pn %xcc, fail | |
154 | nop | |
155 | ||
156 | !# then end of CWQ region to LAST | |
157 | setx CWQ_LAST, %g1, %l5 | |
158 | stxa %l5, [%g0 + ASI_SPU_CWQ_LAST] %asi | |
159 | ldxa [%g0 + ASI_SPU_CWQ_LAST] %asi, %l1 | |
160 | !# Mask off upper 16 bits | |
161 | and %l0, %l5, %l2 | |
162 | cmp %l1, %l2 | |
163 | bne,pn %xcc, fail | |
164 | nop | |
165 | ||
166 | membar #Sync | |
167 | ||
168 | ldxa [%g0 + ASI_SPU_CWQ_TAIL] %asi, %l2 | |
169 | add %l2, 512, %l2 | |
170 | stxa %l2, [%g0 + ASI_SPU_CWQ_TAIL] %asi | |
171 | ldxa [%g0 + ASI_SPU_CWQ_TAIL] %asi, %l1 | |
172 | cmp %l1, %l2 | |
173 | bne,pn %xcc, fail | |
174 | nop | |
175 | ||
176 | !# Kick off the CWQ operation by writing to the CWQ_CSR | |
177 | !# Set the enabled bit and reset the other bits | |
178 | or %g0, 0x1, %g1 | |
179 | stxa %g1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
180 | !# Make sure all these stores get to memory before we start | |
181 | ||
182 | !# Try CWQ_SYNC operation... | |
183 | ldxa [%g0 + 0x30] %asi, %l1 | |
184 | ||
185 | and %l1, 0x6, %l1 | |
186 | brnz %l1, fail !# test for unexpected protocal error | |
187 | nop | |
188 | ||
189 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l1 | |
190 | ldxa [%g0 + ASI_SPU_CWQ_TAIL] %asi, %l1 | |
191 | ||
192 | setx 10, %g1, %l2 | |
193 | or %g0, %g0, %g3 | |
194 | ||
195 | check_results_0: | |
196 | setx results, %g1, %l5 | |
197 | ldx [%l5 + %g3], %l1 | |
198 | add %g3, 0x8, %g3 !# i++ | |
199 | addcc %l2, -1, %l2 | |
200 | bgt check_results_0 | |
201 | nop | |
202 | ||
203 | or %g0, 0x8, %i0 | |
204 | or %g0, %g0, %g3 | |
205 | ||
206 | check_sfas_0: | |
207 | setx fas_result, %g1, %l5 | |
208 | ldx [%l5 + %g3], %l1 | |
209 | add %g3, 0x8, %g3 !# i++ | |
210 | addcc %i0, -1, %i0 | |
211 | bgt check_sfas_0 | |
212 | nop | |
213 | ||
214 | !disable SPU before next operation | |
215 | stxa %g0, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
216 | nop | |
217 | ||
218 | EXIT_GOOD | |
219 | ||
220 | thread_other: | |
221 | !wait for interrupt and then exit | |
222 | ||
223 | wait_for_int: | |
224 | cmp %i6,1 | |
225 | bne wait_for_int | |
226 | nop | |
227 | ||
228 | EXIT_GOOD | |
229 | ||
230 | fail: | |
231 | EXIT_BAD | |
232 | ||
233 | .data | |
234 | user_data_start: | |
235 | scratch_area: | |
236 | ||
237 | ! first 8 addresses are for counters, last is for done bit | |
238 | .align 16 | |
239 | thread_scratch_area: | |
240 | .xword 0x0000000000000000 | |
241 | .xword 0x0000000000000000 | |
242 | .xword 0x0000000000000000 | |
243 | .xword 0x0000000000000000 | |
244 | .xword 0x0000000000000000 | |
245 | .xword 0x0000000000000000 | |
246 | .xword 0x0000000000000000 | |
247 | .xword 0x0000000000000000 | |
248 | .xword 0x0000000000000000 | |
249 | ||
250 | .align 16 | |
251 | msg1: | |
252 | .xword 0x0030fdc05d599221 | |
253 | .xword 0x10f3279537ce239f | |
254 | .xword 0x350192ee57e49864 | |
255 | .xword 0xe6b13af6031ce21d | |
256 | .xword 0xc04ca56d80506fa8 | |
257 | .xword 0xb3c6d051fbad26e0 | |
258 | .xword 0xb260907945f0428a | |
259 | .xword 0xa59182341647b4c2 | |
260 | .xword 0xab9b60838da8f032 | |
261 | .xword 0x97149144f33acd56 | |
262 | .align 16 | |
263 | key: | |
264 | .xword 0x95f1a4e75e3d7de9 | |
265 | .xword 0x54d350ef97fc6332 | |
266 | .xword 0x8bf6a691fb59ffa6 | |
267 | .xword 0xd0a8142e351cffdc | |
268 | .xword 0xa110d949b459ff24 | |
269 | .xword 0x40e7b7e36e436a93 | |
270 | ||
271 | .align 16 | |
272 | iv: | |
273 | .xword 0x8afbb3c3013d7e7a | |
274 | .xword 0x1980dd67b1386a71 | |
275 | .xword 0x4cb849ad9f511439 | |
276 | .xword 0x5af08a49a51e2b9d | |
277 | .xword 0x879b4a63cc59cd74 | |
278 | .xword 0xb847c25ebf5b1795 | |
279 | ||
280 | .align 16 | |
281 | results: | |
282 | .xword 0xDEADBEEFDEADBEEF | |
283 | .xword 0xDEADBEEFDEADBEEF | |
284 | .xword 0xDEADBEEFDEADBEEF | |
285 | .xword 0xDEADBEEFDEADBEEF | |
286 | .xword 0xDEADBEEFDEADBEEF | |
287 | .xword 0xDEADBEEFDEADBEEF | |
288 | .xword 0xDEADBEEFDEADBEEF | |
289 | .xword 0xDEADBEEFDEADBEEF | |
290 | .xword 0xDEADBEEFDEADBEEF | |
291 | .xword 0xDEADBEEFDEADBEEF | |
292 | .xword 0xDEADBEEFDEADBEEF | |
293 | .xword 0xDEADBEEFDEADBEEF | |
294 | .xword 0xDEADBEEFDEADBEEF | |
295 | .xword 0xDEADBEEFDEADBEEF | |
296 | ||
297 | .align 16 | |
298 | fas_result: | |
299 | .xword 0xDEADBEEFDEADBEEF | |
300 | .xword 0xDEADBEEFDEADBEEF | |
301 | .xword 0xDEADBEEFDEADBEEF | |
302 | .xword 0xDEADBEEFDEADBEEF | |
303 | .xword 0xDEADBEEFDEADBEEF | |
304 | .xword 0xDEADBEEFDEADBEEF | |
305 | .xword 0xDEADBEEFDEADBEEF | |
306 | .xword 0xDEADBEEFDEADBEEF | |
307 | ||
308 | !# CWQ data area, set aside 512 CW's worth | |
309 | !# 512*8*8 = 32KB | |
310 | .align 32*1024 | |
311 | CWQ_BASE: | |
312 | .xword 0xC1610B02000A0000 | |
313 | .xword msg1 | |
314 | .xword key | |
315 | .xword iv | |
316 | .xword fas_result | |
317 | .xword 0 | |
318 | .xword 0 | |
319 | .xword results | |
320 | ||
321 | .xword 0xC1610B22000A0040 | |
322 | .xword msg1 | |
323 | .xword key | |
324 | .xword iv | |
325 | .xword fas_result | |
326 | .xword 0 | |
327 | .xword 0 | |
328 | .xword results | |
329 | ||
330 | .xword 0xC1610B42000A0035 | |
331 | .xword msg1 | |
332 | .xword key | |
333 | .xword iv | |
334 | .xword fas_result | |
335 | .xword 0 | |
336 | .xword 0 | |
337 | .xword results | |
338 | ||
339 | .xword 0xC1610B62000A0005 | |
340 | .xword msg1 | |
341 | .xword key | |
342 | .xword iv | |
343 | .xword fas_result | |
344 | .xword 0 | |
345 | .xword 0 | |
346 | .xword results | |
347 | ||
348 | .xword 0xC1610B82000A0035 | |
349 | .xword msg1 | |
350 | .xword key | |
351 | .xword iv | |
352 | .xword fas_result | |
353 | .xword 0 | |
354 | .xword 0 | |
355 | .xword results | |
356 | ||
357 | .xword 0xC1610BA2000A0025 | |
358 | .xword msg1 | |
359 | .xword key | |
360 | .xword iv | |
361 | .xword fas_result | |
362 | .xword 0 | |
363 | .xword 0 | |
364 | .xword results | |
365 | ||
366 | .xword 0xC1610BC2000A0015 | |
367 | .xword msg1 | |
368 | .xword key | |
369 | .xword iv | |
370 | .xword fas_result | |
371 | .xword 0 | |
372 | .xword 0 | |
373 | .xword results | |
374 | ||
375 | .xword 0xC1610BE2000A0005 | |
376 | .xword msg1 | |
377 | .xword key | |
378 | .xword iv | |
379 | .xword fas_result | |
380 | .xword 0 | |
381 | .xword 0 | |
382 | .xword results | |
383 | ||
384 | .xword 0xAAAAAAAAAAAAAAAA | |
385 | .xword 0xAAAAAAAAAAAAAAAA | |
386 | .xword 0xAAAAAAAAAAAAAAAA | |
387 | .xword 0xAAAAAAAAAAAAAAAA | |
388 | .xword 0xAAAAAAAAAAAAAAAA | |
389 | .xword 0xAAAAAAAAAAAAAAAA | |
390 | .xword 0xAAAAAAAAAAAAAAAA | |
391 | .xword 0xAAAAAAAAAAAAAAAA | |
392 | CWQ_LAST: | |
393 | .xword 0xAAAAAAAAAAAAAAAA | |
394 | .xword 0xAAAAAAAAAAAAAAAA | |
395 | .xword 0xAAAAAAAAAAAAAAAA | |
396 | .xword 0xAAAAAAAAAAAAAAAA | |
397 | .xword 0xAAAAAAAAAAAAAAAA | |
398 | .xword 0xAAAAAAAAAAAAAAAA | |
399 | .xword 0xAAAAAAAAAAAAAAAA | |
400 | .xword 0xAAAAAAAAAAAAAAAA | |
401 | ||
402 | .end | |
403 | ||
404 | .global CHECK_PIC_COUNT | |
405 | SECTION .HTRAPS | |
406 | .text | |
407 | CHECK_PIC_COUNT: | |
408 | rd %pic, %g4 | |
409 | brz %g4, FAIL | |
410 | mov %g4, %i7 | |
411 | nop | |
412 | ||
413 | check_pic1_isZero_0: | |
414 | setx 0xffffffff00000000, %l5, %l0 | |
415 | and %i7, %l0, %i7 | |
416 | srlx %i7, 32, %i7 | |
417 | cmp %i7, 0x0 | |
418 | bne,pn %icc, FAIL | |
419 | nop | |
420 | ||
421 | !increment interrupt counter | |
422 | add %i6,1,%i6 | |
423 | ||
424 | retry | |
425 | nop | |
426 | ||
427 | FAIL: EXIT_BAD | |
428 | nop | |
429 | ||
430 | #if 0 | |
431 | #endif |