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1 | /* |
2 | * ========== Copyright Header Begin ========================================== | |
3 | * | |
4 | * OpenSPARC T2 Processor File: tlu_fcrand05_ind_14.s | |
5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
7 | * | |
8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
9 | * | |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; version 2 of the License. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
22 | * | |
23 | * For the avoidance of doubt, and except that if any non-GPL license | |
24 | * choice is available it will apply instead, Sun elects to use only | |
25 | * the General Public License version 2 (GPLv2) at this time for any | |
26 | * software where a choice of GPL license versions is made | |
27 | * available with the language indicating that GPLv2 or any later version | |
28 | * may be used, or where a choice of which version of the GPL is applied is | |
29 | * otherwise unspecified. | |
30 | * | |
31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
32 | * CA 95054 USA or visit www.sun.com if you need additional information or | |
33 | * have any questions. | |
34 | * | |
35 | * | |
36 | * ========== Copyright Header End ============================================ | |
37 | */ | |
38 | #define IMMU_SKIP_IF_NO_TTE | |
39 | #define DMMU_SKIP_IF_NO_TTE | |
40 | #define MAIN_PAGE_NUCLEUS_ALSO | |
41 | #define MAIN_PAGE_HV_ALSO | |
42 | #define MAIN_PAGE_VA_IS_RA_ALSO | |
43 | #define DISABLE_PART_LIMIT_CHECK | |
44 | #define MAIN_PAGE_USE_CONFIG 3 | |
45 | #define PART0_Z_TSB_SIZE_3 10 | |
46 | #define PART0_Z_PAGE_SIZE_3 1 | |
47 | #define PART0_NZ_TSB_SIZE_3 10 | |
48 | #define PART0_NZ_PAGE_SIZE_3 1 | |
49 | #define PART0_Z_TSB_SIZE_1 3 | |
50 | #define PART0_NZ_TSB_SIZE_1 3 | |
51 | ||
52 | #define PART_0_BASE 0x0 | |
53 | #define USER_PAGE_CUSTOM_MAP | |
54 | #define MAIN_BASE_TEXT_VA 0x333000000 | |
55 | #define MAIN_BASE_TEXT_RA 0x033000000 | |
56 | #define MAIN_BASE_DATA_VA 0x379400000 | |
57 | #define MAIN_BASE_DATA_RA 0x079400000 | |
58 | ||
59 | #d | |
60 | # 474 "diag.j" | |
61 | #define H_HT0_Instruction_Access_MMU_Error_0x71 inst_access_mmu_error_handler | |
62 | #define H_HT0_Instruction_access_error_0x0a inst_access_error_handler | |
63 | #define H_HT0_Internal_Processor_Error_0x29 int_proc_err_handler | |
64 | #define H_HT0_Data_Access_MMU_Error_0x72 data_access_mmu_error_handler | |
65 | #define H_HT0_Data_access_error_0x32 data_access_error_handler | |
66 | #define H_HT0_Hw_Corrected_Error_0x63 hw_corrected_error_handler | |
67 | #define H_HT0_Sw_Recoverable_Error_0x40 sw_recoverable_error_handler | |
68 | #define H_HT0_Store_Error_0x07 store_error_handler | |
69 | ||
70 | #define DAE_SKIP_IF_SOCU_ERROR | |
71 | # 5 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
72 | #ifndef T_HANDLER_RAND4_1 | |
73 | #define T_HANDLER_RAND4_1 b .+16;\ | |
74 | sdiv %r1, %r0, %l4;nop;nop | |
75 | #endif | |
76 | #ifndef T_HANDLER_RAND7_1 | |
77 | #define T_HANDLER_RAND7_1 b .+28;\ | |
78 | pdist %f4, %f6, %f20; \ | |
79 | nop; nop ; nop; nop; illtrap | |
80 | #endif | |
81 | #ifndef T_HANDLER_RAND4_2 | |
82 | #define T_HANDLER_RAND4_2 save %i7, %g0, %i7; \ | |
83 | save %i7, %g0, %i7; \ | |
84 | restore %i7, %g0, %i7;\ | |
85 | restore %i7, %g0, %i7; | |
86 | #endif | |
87 | #ifndef T_HANDLER_RAND7_2 | |
88 | #define T_HANDLER_RAND7_2 b .+8 ;\ | |
89 | rdpr %pstate, %l2;\ | |
90 | b .+8 ;\ | |
91 | rdpr %tstate, %l3;\ | |
92 | b .+12 ;\ | |
93 | wrpr %l3, %r0, %tstate; nop | |
94 | #endif | |
95 | #ifndef T_HANDLER_RAND4_3 | |
96 | #define T_HANDLER_RAND4_3 save %i7, %g0, %i7;\ | |
97 | restore %i7, %g0, %i7;\ | |
98 | save %i7, %g0, %i7; \ | |
99 | restore %i7, %g0, %i7; | |
100 | #endif | |
101 | #ifndef T_HANDLER_RAND7_3 | |
102 | #define T_HANDLER_RAND7_3 b .+8 ;\ | |
103 | rdpr %tnpc, %l2;\ | |
104 | and %l2, 0xfc0, %l2;\ | |
105 | add %i7, %l2, %l2;\ | |
106 | stda %f16,[%l2]ASI_BLOCK_AS_IF_USER_PRIMARY ;\ | |
107 | b .+8 ;\ | |
108 | stda %f0,[%l2]ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE ; | |
109 | #endif | |
110 | #ifndef T_HANDLER_RAND4_4 | |
111 | #define T_HANDLER_RAND4_4 b .+4 ; b .+4; b .+4; b .+4 | |
112 | #endif | |
113 | #ifndef T_HANDLER_RAND7_4 | |
114 | #define T_HANDLER_RAND7_4 b .+8;\ | |
115 | save %i7, %g0, %i7; \ | |
116 | b,a .+8;\ | |
117 | b .+12;\ | |
118 | stw %i7, [%i7];\ | |
119 | b .-8;;\ | |
120 | restore %i7, %g0, %i7; | |
121 | ||
122 | #endif | |
123 | #ifndef T_HANDLER_RAND4_5 | |
124 | #define T_HANDLER_RAND4_5 ldda [%r31]ASI_NUCLEUS_QUAD_LDD, %l4;\ | |
125 | sdiv %l4, %l5, %l7;\ | |
126 | add %r31, 128, %l5;\ | |
127 | stda %l4, [%l5]ASI_BLOCK_PRIMARY_LITTLE; | |
128 | #endif | |
129 | #ifndef T_HANDLER_RAND7_5 | |
130 | #define T_HANDLER_RAND7_5 save %i7, %g0, %i7;\ | |
131 | rdpr %tnpc, %l2;\ | |
132 | wrpr %l2, %tpc;\ | |
133 | add %l2, 4, %l2;\ | |
134 | wrpr %l2, %tnpc;\ | |
135 | restore %i7, %g0, %i7;\ | |
136 | retry; | |
137 | #endif | |
138 | #ifndef T_HANDLER_RAND4_6 | |
139 | #define T_HANDLER_RAND4_6 ldda [%r31]ASI_BLOCK_AS_IF_USER_PRIMARY, %l2;\ | |
140 | rd %fprs, %l2; \ | |
141 | wr %l2, 0x4, %fprs ;\ | |
142 | stda %f0,[%l2]ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE; | |
143 | #endif | |
144 | #ifndef T_HANDLER_RAND7_6 | |
145 | #define T_HANDLER_RAND7_6 umul %o4, 2, %o5;\ | |
146 | rdpr %tnpc, %l2;\ | |
147 | wrpr %l2, %tpc;\ | |
148 | add %l2, 4, %l2;\ | |
149 | wrpr %l2, %tnpc;\ | |
150 | stw %l2, [%i7];\ | |
151 | retry; | |
152 | #endif | |
153 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
154 | #ifndef HT_HANDLER_RAND4_1 | |
155 | #define HT_HANDLER_RAND4_1 mov 0x80, %l3;\ | |
156 | b .+12;\ | |
157 | stxa %l3, [%l3]0x57 ;\ | |
158 | nop | |
159 | #endif | |
160 | #ifndef HT_HANDLER_RAND7_1 | |
161 | #define HT_HANDLER_RAND7_1 b .+28;\ | |
162 | pdist %f4, %f4, %f20;\ | |
163 | nop; nop ; nop; nop; illtrap | |
164 | #endif | |
165 | #ifndef HT_HANDLER_RAND4_2 | |
166 | #define HT_HANDLER_RAND4_2 save %i7, %g0, %i7; \ | |
167 | save %i7, %g0, %i7; \ | |
168 | restore %i7, %g0, %i7;\ | |
169 | restore %i7, %g0, %i7; | |
170 | #endif | |
171 | #ifndef HT_HANDLER_RAND7_2 | |
172 | #define HT_HANDLER_RAND7_2 b .+8 ;\ | |
173 | rdhpr %hpstate, %l2;\ | |
174 | b .+8 ;\ | |
175 | rdhpr %htstate, %l3;\ | |
176 | b .+12 ;\ | |
177 | wrhpr %l3, %r0, %htstate; nop | |
178 | #endif | |
179 | #ifndef HT_HANDLER_RAND4_3 | |
180 | #define HT_HANDLER_RAND4_3 stxa %l4, [%r31]ASI_AS_IF_USER_PRIMARY;\ | |
181 | mov 0x80, %l3;\ | |
182 | stxa %l3, [%l3]0x5f ;\ | |
183 | b .+8 ;\ | |
184 | ldxa [%r31]ASI_AS_IF_USER_PRIMARY, %l4; | |
185 | #endif | |
186 | #ifndef HT_HANDLER_RAND7_3 | |
187 | #define HT_HANDLER_RAND7_3 b .+8 ;\ | |
188 | rdpr %tnpc, %l2;\ | |
189 | and %l2, 0xfc0, %l2;\ | |
190 | add %i7, %l2, %l2;\ | |
191 | stda %f16,[%l2]ASI_BLOCK_AS_IF_USER_PRIMARY ;\ | |
192 | b .+8 ;\ | |
193 | stda %f0,[%l2]ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE ; | |
194 | #endif | |
195 | #ifndef HT_HANDLER_RAND4_4 | |
196 | #define HT_HANDLER_RAND4_4 ldda [%i7]ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE, %l3;\ | |
197 | b .+12 ;\ | |
198 | stxa %l3, [%g0]ASI_LSU_CONTROL; nop | |
199 | #endif | |
200 | #ifndef HT_HANDLER_RAND7_4 | |
201 | #define HT_HANDLER_RAND7_4 rdpr %tnpc, %l3;\ | |
202 | mov ASI_DMMU_VA_WATCHPOINT_VAL, %l4 ;\ | |
203 | stxa %l3, [%l4]ASI_DMMU_VA_WATCHPOINT ;\ | |
204 | mov 1, %l4;\ | |
205 | sllx %l4, 33, %l4 ;\ | |
206 | not %l4, %l3 ;\ | |
207 | stxa %l3, [%g0]ASI_LSU_CONTROL; | |
208 | #endif | |
209 | #ifndef HT_HANDLER_RAND4_5 | |
210 | #define HT_HANDLER_RAND4_5 ldda [%r31]ASI_NUCLEUS_QUAD_LDD, %l4;\ | |
211 | sdiv %l4, %l5, %l6;\ | |
212 | sdiv %l3, %l6, %l7;\ | |
213 | stda %f32, [%r31]ASI_BLOCK_PRIMARY_LITTLE; | |
214 | #endif | |
215 | #ifndef HT_HANDLER_RAND7_5 | |
216 | #define HT_HANDLER_RAND7_5 save %i7, %g0, %i7;\ | |
217 | rdpr %tnpc, %l2;\ | |
218 | wrpr %l2, %tpc;\ | |
219 | add %l2, 4, %l2;\ | |
220 | wrpr %l2, %tnpc;\ | |
221 | restore %i7, %g0, %i7;\ | |
222 | retry; | |
223 | #endif | |
224 | #ifndef HT_HANDLER_RAND4_6 | |
225 | #define HT_HANDLER_RAND4_6 ld [%r31], %l2;\ | |
226 | rd %fprs, %l2; \ | |
227 | wr %l2, 0x4, %fprs ;\ | |
228 | stda %f0,[%l2]ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE; | |
229 | #endif | |
230 | #ifndef HT_HANDLER_RAND7_6 | |
231 | #define HT_HANDLER_RAND7_6 rdhpr %htstate, %o4;\ | |
232 | rdpr %tnpc, %l2;\ | |
233 | wrpr %l2, %tpc;\ | |
234 | add %l2, 4, %l2;\ | |
235 | wrpr %l2, %tnpc;\ | |
236 | wrhpr %o4, %r0, %htstate;\ | |
237 | retry; | |
238 | #endif | |
239 | ||
240 | !!!!!!!!!!!!!!!!!!!!!!!!! | |
241 | !! Disable trap checking | |
242 | #define NO_TRAPCHECK | |
243 | ||
244 | ! Enable Traps | |
245 | #define ENABLE_T1_Privileged_Opcode_0x11 | |
246 | #define ENABLE_T1_Fp_Disabled_0x20 | |
247 | #define ENABLE_HT0_Watchdog_Reset_0x02 | |
248 | ||
249 | #define FILL_TRAP_RETRY | |
250 | #define SPILL_TRAP_RETRY | |
251 | #define CLEAN_WIN_RETRY | |
252 | ||
253 | #define My_RED_Mode_Other_Reset | |
254 | #define My_RED_Mode_Other_Reset \ | |
255 | ba red_other_ext;\ | |
256 | nop;retry;nop;nop;nop;nop;nop | |
257 | ||
258 | #define H_HT0_Software_Initiated_Reset_0x04 | |
259 | #define SUN_H_HT0_Software_Initiated_Reset_0x04 \ | |
260 | setx Software_Reset_Handler, %g1, %g2 ;\ | |
261 | jmp %g2 ;\ | |
262 | nop | |
263 | # 198 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
264 | #define H_T1_Clean_Window_0x24 | |
265 | #define SUN_H_T1_Clean_Window_0x24 \ | |
266 | rdpr %cleanwin, %l1;\ | |
267 | add %l1,1,%l1;\ | |
268 | wrpr %l1, %g0, %cleanwin;\ | |
269 | retry; nop; nop; nop; nop | |
270 | ||
271 | #define H_T1_Clean_Window_0x25 | |
272 | #define SUN_H_T1_Clean_Window_0x25 \ | |
273 | rdpr %cleanwin, %l1;\ | |
274 | add %l1,1,%l1;\ | |
275 | wrpr %l1, %g0, %cleanwin;\ | |
276 | retry; nop; nop; nop; nop | |
277 | ||
278 | #define H_T1_Clean_Window_0x26 | |
279 | #define SUN_H_T1_Clean_Window_0x26 \ | |
280 | rdpr %cleanwin, %l1;\ | |
281 | add %l1,1,%l1;\ | |
282 | wrpr %l1, %g0, %cleanwin;\ | |
283 | retry; nop; nop; nop; nop | |
284 | ||
285 | #define H_T1_Clean_Window_0x27 | |
286 | #define SUN_H_T1_Clean_Window_0x27 \ | |
287 | rdpr %cleanwin, %l1;\ | |
288 | add %l1,1,%l1;\ | |
289 | wrpr %l1, %g0, %cleanwin;\ | |
290 | retry; nop; nop; nop; nop | |
291 | # 227 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
292 | #define H_HT0_Tag_Overflow | |
293 | #define My_HT0_Tag_Overflow \ | |
294 | HT_HANDLER_RAND7_1 ;\ | |
295 | done | |
296 | ||
297 | #define H_T0_Tag_Overflow | |
298 | #define My_T0_Tag_Overflow \ | |
299 | T_HANDLER_RAND7_2 ;\ | |
300 | done | |
301 | ||
302 | #define H_T1_Tag_Overflow_0x23 | |
303 | #define SUN_H_T1_Tag_Overflow_0x23 \ | |
304 | T_HANDLER_RAND7_3 ;\ | |
305 | done | |
306 | ||
307 | #define H_T0_Window_Spill_0_Normal_Trap | |
308 | #define SUN_H_T0_Window_Spill_0_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
309 | ||
310 | #define H_T0_Window_Spill_1_Normal_Trap | |
311 | #define SUN_H_T0_Window_Spill_1_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
312 | ||
313 | #define H_T0_Window_Spill_2_Normal_Trap | |
314 | #define SUN_H_T0_Window_Spill_2_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
315 | ||
316 | #define H_T0_Window_Spill_3_Normal_Trap | |
317 | #define SUN_H_T0_Window_Spill_3_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
318 | ||
319 | #define H_T0_Window_Spill_4_Normal_Trap | |
320 | #define SUN_H_T0_Window_Spill_4_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
321 | ||
322 | #define H_T0_Window_Spill_5_Normal_Trap | |
323 | #define SUN_H_T0_Window_Spill_5_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
324 | ||
325 | #define H_T0_Window_Spill_6_Normal_Trap | |
326 | #define SUN_H_T0_Window_Spill_6_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
327 | ||
328 | #define H_T0_Window_Spill_7_Normal_Trap | |
329 | #define SUN_H_T0_Window_Spill_7_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
330 | ||
331 | #define H_T0_Window_Spill_0_Other_Trap | |
332 | #define SUN_H_T0_Window_Spill_0_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
333 | ||
334 | #define H_T0_Window_Spill_1_Other_Trap | |
335 | #define SUN_H_T0_Window_Spill_1_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
336 | ||
337 | #define H_T0_Window_Spill_2_Other_Trap | |
338 | #define SUN_H_T0_Window_Spill_2_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
339 | ||
340 | #define H_T0_Window_Spill_3_Other_Trap | |
341 | #define SUN_H_T0_Window_Spill_3_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
342 | ||
343 | #define H_T0_Window_Spill_4_Other_Trap | |
344 | #define SUN_H_T0_Window_Spill_4_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
345 | ||
346 | #define H_T0_Window_Spill_5_Other_Trap | |
347 | #define SUN_H_T0_Window_Spill_5_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
348 | ||
349 | #define H_T0_Window_Spill_6_Other_Trap | |
350 | #define SUN_H_T0_Window_Spill_6_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
351 | ||
352 | #define H_T0_Window_Spill_7_Other_Trap | |
353 | #define SUN_H_T0_Window_Spill_7_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
354 | ||
355 | #define H_T0_Window_Fill_0_Normal_Trap | |
356 | #define SUN_H_T0_Window_Fill_0_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
357 | ||
358 | #define H_T0_Window_Fill_1_Normal_Trap | |
359 | #define SUN_H_T0_Window_Fill_1_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
360 | ||
361 | #define H_T0_Window_Fill_2_Normal_Trap | |
362 | #define SUN_H_T0_Window_Fill_2_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
363 | ||
364 | #define H_T0_Window_Fill_3_Normal_Trap | |
365 | #define SUN_H_T0_Window_Fill_3_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
366 | ||
367 | #define H_T0_Window_Fill_4_Normal_Trap | |
368 | #define SUN_H_T0_Window_Fill_4_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
369 | ||
370 | #define H_T0_Window_Fill_5_Normal_Trap | |
371 | #define SUN_H_T0_Window_Fill_5_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
372 | ||
373 | #define H_T0_Window_Fill_6_Normal_Trap | |
374 | #define SUN_H_T0_Window_Fill_6_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
375 | ||
376 | #define H_T0_Window_Fill_7_Normal_Trap | |
377 | #define SUN_H_T0_Window_Fill_7_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
378 | ||
379 | #define H_T0_Window_Fill_0_Other_Trap | |
380 | #define SUN_H_T0_Window_Fill_0_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
381 | ||
382 | #define H_T0_Window_Fill_1_Other_Trap | |
383 | #define SUN_H_T0_Window_Fill_1_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
384 | ||
385 | #define H_T0_Window_Fill_2_Other_Trap | |
386 | #define SUN_H_T0_Window_Fill_2_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
387 | ||
388 | #define H_T0_Window_Fill_3_Other_Trap | |
389 | #define SUN_H_T0_Window_Fill_3_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
390 | ||
391 | #define H_T0_Window_Fill_4_Other_Trap | |
392 | #define SUN_H_T0_Window_Fill_4_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
393 | ||
394 | #define H_T0_Window_Fill_5_Other_Trap | |
395 | #define SUN_H_T0_Window_Fill_5_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
396 | ||
397 | #define H_T0_Window_Fill_6_Other_Trap | |
398 | #define SUN_H_T0_Window_Fill_6_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
399 | ||
400 | #define H_T0_Window_Fill_7_Other_Trap | |
401 | #define SUN_H_T0_Window_Fill_7_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
402 | # 339 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
403 | #define H_T1_Window_Spill_0_Normal_Trap | |
404 | #define SUN_H_T1_Window_Spill_0_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
405 | ||
406 | #define H_T1_Window_Spill_1_Normal_Trap | |
407 | #define SUN_H_T1_Window_Spill_1_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
408 | ||
409 | #define H_T1_Window_Spill_2_Normal_Trap | |
410 | #define SUN_H_T1_Window_Spill_2_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
411 | ||
412 | #define H_T1_Window_Spill_3_Normal_Trap | |
413 | #define SUN_H_T1_Window_Spill_3_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
414 | ||
415 | #define H_T1_Window_Spill_4_Normal_Trap | |
416 | #define SUN_H_T1_Window_Spill_4_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
417 | ||
418 | #define H_T1_Window_Spill_5_Normal_Trap | |
419 | #define SUN_H_T1_Window_Spill_5_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
420 | ||
421 | #define H_T1_Window_Spill_6_Normal_Trap | |
422 | #define SUN_H_T1_Window_Spill_6_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
423 | ||
424 | #define H_T1_Window_Spill_7_Normal_Trap | |
425 | #define SUN_H_T1_Window_Spill_7_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
426 | ||
427 | #define H_T1_Window_Spill_0_Other_Trap | |
428 | #define SUN_H_T1_Window_Spill_0_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
429 | ||
430 | #define H_T1_Window_Spill_1_Other_Trap | |
431 | #define SUN_H_T1_Window_Spill_1_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
432 | ||
433 | #define H_T1_Window_Spill_2_Other_Trap | |
434 | #define SUN_H_T1_Window_Spill_2_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
435 | ||
436 | #define H_T1_Window_Spill_3_Other_Trap | |
437 | #define SUN_H_T1_Window_Spill_3_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
438 | ||
439 | #define H_T1_Window_Spill_4_Other_Trap | |
440 | #define SUN_H_T1_Window_Spill_4_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
441 | ||
442 | #define H_T1_Window_Spill_5_Other_Trap | |
443 | #define SUN_H_T1_Window_Spill_5_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
444 | ||
445 | #define H_T1_Window_Spill_6_Other_Trap | |
446 | #define SUN_H_T1_Window_Spill_6_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
447 | ||
448 | #define H_T1_Window_Spill_7_Other_Trap | |
449 | #define SUN_H_T1_Window_Spill_7_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; | |
450 | ||
451 | #define H_T1_Window_Fill_0_Normal_Trap | |
452 | #define SUN_H_T1_Window_Fill_0_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
453 | ||
454 | #define H_T1_Window_Fill_1_Normal_Trap | |
455 | #define SUN_H_T1_Window_Fill_1_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
456 | ||
457 | #define H_T1_Window_Fill_2_Normal_Trap | |
458 | #define SUN_H_T1_Window_Fill_2_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
459 | ||
460 | #define H_T1_Window_Fill_3_Normal_Trap | |
461 | #define SUN_H_T1_Window_Fill_3_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
462 | ||
463 | #define H_T1_Window_Fill_4_Normal_Trap | |
464 | #define SUN_H_T1_Window_Fill_4_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
465 | ||
466 | #define H_T1_Window_Fill_5_Normal_Trap | |
467 | #define SUN_H_T1_Window_Fill_5_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
468 | ||
469 | #define H_T1_Window_Fill_6_Normal_Trap | |
470 | #define SUN_H_T1_Window_Fill_6_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
471 | ||
472 | #define H_T1_Window_Fill_7_Normal_Trap | |
473 | #define SUN_H_T1_Window_Fill_7_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
474 | ||
475 | #define H_T1_Window_Fill_0_Other_Trap | |
476 | #define SUN_H_T1_Window_Fill_0_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
477 | ||
478 | #define H_T1_Window_Fill_1_Other_Trap | |
479 | #define SUN_H_T1_Window_Fill_1_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
480 | ||
481 | #define H_T1_Window_Fill_2_Other_Trap | |
482 | #define SUN_H_T1_Window_Fill_2_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
483 | ||
484 | #define H_T1_Window_Fill_3_Other_Trap | |
485 | #define SUN_H_T1_Window_Fill_3_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
486 | ||
487 | #define H_T1_Window_Fill_4_Other_Trap | |
488 | #define SUN_H_T1_Window_Fill_4_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
489 | ||
490 | #define H_T1_Window_Fill_5_Other_Trap | |
491 | #define SUN_H_T1_Window_Fill_5_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
492 | ||
493 | #define H_T1_Window_Fill_6_Other_Trap | |
494 | #define SUN_H_T1_Window_Fill_6_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
495 | ||
496 | #define H_T1_Window_Fill_7_Other_Trap | |
497 | #define SUN_H_T1_Window_Fill_7_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; | |
498 | ||
499 | #define H_T0_Trap_Instruction_0 | |
500 | #define My_T0_Trap_Instruction_0 \ | |
501 | T_HANDLER_RAND7_5 ;\ | |
502 | done; | |
503 | ||
504 | #define H_T0_Trap_Instruction_1 | |
505 | #define My_T0_Trap_Instruction_1 \ | |
506 | T_HANDLER_RAND7_6 ;\ | |
507 | done; | |
508 | ||
509 | #define H_T0_Trap_Instruction_2 | |
510 | #define My_T0_Trap_Instruction_2 \ | |
511 | inc %o3;\ | |
512 | umul %o3, 2, %o4;\ | |
513 | ba 1f; \ | |
514 | save %i7, %g0, %i7; \ | |
515 | 2: done; \ | |
516 | nop; \ | |
517 | 1: ba 2b; \ | |
518 | restore %i7, %g0, %i7 | |
519 | #define H_T0_Trap_Instruction_3 | |
520 | #define My_T0_Trap_Instruction_3 \ | |
521 | save %i7, %g0, %i7 ;\ | |
522 | T_HANDLER_RAND4_5;\ | |
523 | stw %o4, [%i7];\ | |
524 | restore %i7, %g0, %i7 ;\ | |
525 | done | |
526 | #define H_T0_Trap_Instruction_4 | |
527 | #define My_T0_Trap_Instruction_4 \ | |
528 | T_HANDLER_RAND7_6 ;\ | |
529 | done; | |
530 | ||
531 | #define H_T0_Trap_Instruction_5 | |
532 | #define My_T0_Trap_Instruction_5 \ | |
533 | T_HANDLER_RAND4_5;\ | |
534 | done; | |
535 | ||
536 | #define H_T1_Trap_Instruction_0 | |
537 | #define My_T1_Trap_Instruction_0 \ | |
538 | inc %o4;\ | |
539 | umul %o4, 2, %o5;\ | |
540 | ba 3f; \ | |
541 | save %i7, %g0, %i7; \ | |
542 | 4: done; \ | |
543 | nop; \ | |
544 | 3: ba 4b; \ | |
545 | restore %i7, %g0, %i7 | |
546 | #define H_T1_Trap_Instruction_1 | |
547 | #define My_T1_Trap_Instruction_1 \ | |
548 | T_HANDLER_RAND7_3;\ | |
549 | done | |
550 | #define H_T1_Trap_Instruction_2 | |
551 | #define My_T1_Trap_Instruction_2 \ | |
552 | inc %o3;\ | |
553 | umul %o3, 2, %o4;\ | |
554 | ba 5f; \ | |
555 | save %i7, %g0, %i7; \ | |
556 | 6: done; \ | |
557 | nop; \ | |
558 | 5: ba 6b; \ | |
559 | restore %i7, %g0, %i7 | |
560 | #define H_T1_Trap_Instruction_3 | |
561 | #define My_T1_Trap_Instruction_3 \ | |
562 | T_HANDLER_RAND4_1;\ | |
563 | done; | |
564 | ||
565 | #define H_T1_Trap_Instruction_4 | |
566 | #define My_T1_Trap_Instruction_4 \ | |
567 | T_HANDLER_RAND7_1;\ | |
568 | done; | |
569 | #define H_T1_Trap_Instruction_5 | |
570 | #define My_T1_Trap_Instruction_5 \ | |
571 | T_HANDLER_RAND7_2;\ | |
572 | done | |
573 | #define H_HT0_Trap_Instruction_0 | |
574 | #define My_HT0_Trap_Instruction_0 \ | |
575 | HT_HANDLER_RAND4_1 ;\ | |
576 | done; | |
577 | #define H_HT0_Trap_Instruction_1 | |
578 | #define My_HT0_Trap_Instruction_1 \ | |
579 | HT_HANDLER_RAND4_3 ;\ | |
580 | done | |
581 | #define H_HT0_Trap_Instruction_2 | |
582 | #define My_HT0_Trap_Instruction_2 \ | |
583 | HT_HANDLER_RAND7_5 ;\ | |
584 | done; | |
585 | #define H_HT0_Trap_Instruction_3 | |
586 | #define My_HT0_Trap_Instruction_3 \ | |
587 | HT_HANDLER_RAND4_5 ;\ | |
588 | done | |
589 | #define H_HT0_Trap_Instruction_4 | |
590 | #define My_HT0_Trap_Instruction_4 \ | |
591 | HT_HANDLER_RAND7_4 ;\ | |
592 | done | |
593 | #define H_HT0_Trap_Instruction_5 | |
594 | #define My_HT0_Trap_Instruction_5 \ | |
595 | ba htrap_5_ext;\ | |
596 | nop; retry;\ | |
597 | nop; nop; nop; nop; nop | |
598 | ||
599 | #define H_HT0_Mem_Address_Not_Aligned_0x34 | |
600 | #define My_HT0_Mem_Address_Not_Aligned_0x34 \ | |
601 | HT_HANDLER_RAND4_4 ;\ | |
602 | done ; | |
603 | #define H_HT0_Illegal_instruction_0x10 | |
604 | #define My_HT0_Illegal_instruction_0x10 \ | |
605 | HT_HANDLER_RAND7_6 ;\ | |
606 | done; | |
607 | ||
608 | #define H_HT0_DAE_so_page_0x30 | |
609 | #define My_HT0_DAE_so_page_0x30 \ | |
610 | HT_HANDLER_RAND4_2;\ | |
611 | done; | |
612 | #define H_HT0_DAE_invalid_asi_0x14 | |
613 | #define SUN_H_HT0_DAE_invalid_asi_0x14 \ | |
614 | HT_HANDLER_RAND4_3 ;\ | |
615 | done | |
616 | #define H_HT0_DAE_privilege_violation_0x15 | |
617 | #define SUN_H_HT0_DAE_privilege_violation_0x15 \ | |
618 | HT_HANDLER_RAND4_4 ;\ | |
619 | done; | |
620 | #define H_HT0_Privileged_Action_0x37 | |
621 | #define My_HT0_Privileged_Action_0x37 \ | |
622 | done; \ | |
623 | nop; nop | |
624 | #define H_HT0_Lddf_Mem_Address_Not_Aligned_0x35 | |
625 | #define My_HT0_Lddf_Mem_Address_Not_Aligned_0x35 \ | |
626 | HT_HANDLER_RAND7_4 ;\ | |
627 | done | |
628 | #define H_HT0_Stdf_Mem_Address_Not_Aligned_0x36 | |
629 | #define My_HT0_Stdf_Mem_Address_Not_Aligned_0x36 \ | |
630 | HT_HANDLER_RAND7_1;\ | |
631 | done | |
632 | #define H_HT0_Fp_exception_ieee_754_0x21 | |
633 | #define My_HT0_Fp_exception_ieee_754_0x21 \ | |
634 | HT_HANDLER_RAND4_2 ;\ | |
635 | done | |
636 | #define H_HT0_Fp_exception_other_0x22 | |
637 | #define My_HT0_Fp_exception_other_0x22 \ | |
638 | HT_HANDLER_RAND7_2 ;\ | |
639 | done | |
640 | #define H_HT0_Division_By_Zero | |
641 | #define My_HT0_Division_By_Zero \ | |
642 | HT_HANDLER_RAND4_6;\ | |
643 | done | |
644 | #define H_T0_Division_By_Zero | |
645 | #define My_T0_Division_By_Zero \ | |
646 | T_HANDLER_RAND4_3;\ | |
647 | done | |
648 | #define H_T1_Division_By_Zero_0x28 | |
649 | #define My_H_T1_Division_By_Zero_0x28 \ | |
650 | T_HANDLER_RAND4_3;\ | |
651 | done | |
652 | #define H_T0_Division_By_Zero | |
653 | #define My_T0_Division_By_Zero\ | |
654 | T_HANDLER_RAND4_4 ;\ | |
655 | done | |
656 | #define H_T0_Fp_exception_ieee_754_0x21 | |
657 | #define My_T0_Fp_exception_ieee_754_0x21 \ | |
658 | T_HANDLER_RAND4_3 ;\ | |
659 | done | |
660 | #define H_T1_Fp_Exception_Ieee_754_0x21 | |
661 | #define My_H_T1_Fp_Exception_Ieee_754_0x21 \ | |
662 | T_HANDLER_RAND4_4 ;\ | |
663 | done | |
664 | #define H_T1_Fp_Exception_Other_0x22 | |
665 | #define My_H_T1_Fp_Exception_Other_0x22 \ | |
666 | T_HANDLER_RAND4_5 ;\ | |
667 | done | |
668 | #define H_T1_Privileged_Opcode_0x11 | |
669 | #define SUN_H_T1_Privileged_Opcode_0x11 \ | |
670 | T_HANDLER_RAND4_6 ;\ | |
671 | done | |
672 | ||
673 | #define H_HT0_Privileged_opcode_0x11 | |
674 | #define My_HT0_Privileged_opcode_0x11 \ | |
675 | HT_HANDLER_RAND4_1;\ | |
676 | done; | |
677 | ||
678 | #define H_HT0_Fp_disabled_0x20 | |
679 | #define My_HT0_Fp_disabled_0x20 \ | |
680 | mov 0x4, %l2 ;\ | |
681 | wr %l2, 0x0, %fprs ;\ | |
682 | sllx %l2, 10, %l3; \ | |
683 | rdpr %tstate, %l2;\ | |
684 | or %l2, %l3, %l2 ;\ | |
685 | stw %l2, [%i7];\ | |
686 | wrpr %l2, 0x0, %tstate;\ | |
687 | retry; | |
688 | ||
689 | #define H_T0_Fp_disabled_0x20 | |
690 | #define My_T0_Fp_disabled_0x20 \ | |
691 | mov 0x4, %l2 ;\ | |
692 | wr %l2, 0x0, %fprs ;\ | |
693 | sllx %l2, 10, %l3; \ | |
694 | rdpr %tstate, %l2;\ | |
695 | or %l2, %l3, %l2 ;\ | |
696 | wrpr %l2, 0x0, %tstate;\ | |
697 | retry; nop | |
698 | ||
699 | #define H_T1_Fp_Disabled_0x20 | |
700 | #define My_H_T1_Fp_Disabled_0x20 \ | |
701 | mov 0x4, %l2 ;\ | |
702 | wr %l2, 0x0, %fprs ;\ | |
703 | sllx %l2, 10, %l3; \ | |
704 | rdpr %tstate, %l2;\ | |
705 | or %l2, %l3, %l2 ;\ | |
706 | wrpr %l2, 0x0, %tstate;\ | |
707 | stw %l2, [%i7];\ | |
708 | retry | |
709 | ||
710 | #define H_HT0_Watchdog_Reset_0x02 | |
711 | #define My_HT0_Watchdog_Reset_0x02 \ | |
712 | ba wdog_2_ext;\ | |
713 | nop;retry;nop;nop;nop;nop;nop | |
714 | ||
715 | #define H_T0_Privileged_opcode_0x11 | |
716 | #define My_T0_Privileged_opcode_0x11 \ | |
717 | T_HANDLER_RAND4_4;\ | |
718 | done | |
719 | ||
720 | #define H_T1_Fp_exception_other_0x22 | |
721 | #define My_T1_Fp_exception_other_0x22 \ | |
722 | T_HANDLER_RAND7_3 ;\ | |
723 | done; | |
724 | ||
725 | #define H_T0_Fp_exception_other_0x22 | |
726 | #define My_T0_Fp_exception_other_0x22 \ | |
727 | T_HANDLER_RAND7_4;\ | |
728 | done | |
729 | ||
730 | #define H_HT0_Trap_Level_Zero_0x5f | |
731 | #define My_HT0_Trap_Level_Zero_0x5f \ | |
732 | not %g0, %r13; \ | |
733 | rdhpr %hpstate, %l3;\ | |
734 | jmp %r13;\ | |
735 | rdhpr %htstate, %l3;\ | |
736 | and %l3, 0xfe, %l3;\ | |
737 | wrhpr %l3, 0, %htstate;\ | |
738 | stw %r13, [%i7];\ | |
739 | retry | |
740 | ||
741 | #define My_Watchdog_Reset | |
742 | #define My_Watchdog_Reset \ | |
743 | ba wdog_red_ext;\ | |
744 | nop;retry;nop;nop;nop;nop;nop | |
745 | ||
746 | #define H_HT0_Control_Transfer_Instr_0x74 | |
747 | #define My_H_HT0_Control_Transfer_Instr_0x74 \ | |
748 | rdpr %tstate, %l3;\ | |
749 | mov 1, %l4;\ | |
750 | sllx %l4, 20, %l4;\ | |
751 | wrpr %l3, %l4, %tstate ;\ | |
752 | retry;nop; | |
753 | ||
754 | #define H_T0_Control_Transfer_Instr_0x74 | |
755 | #define My_H_T0_Control_Transfer_Instr_0x74 \ | |
756 | rdpr %tstate, %l3;\ | |
757 | mov 1, %l4;\ | |
758 | sllx %l4, 20, %l4;\ | |
759 | wrpr %l3, %l4, %tstate ;\ | |
760 | retry;nop; | |
761 | ||
762 | #define H_T1_Control_Transfer_Instr_0x74 | |
763 | #define My_H_T1_Control_Transfer_Instr_0x74 \ | |
764 | rdpr %tstate, %l3;\ | |
765 | mov 1, %l4;\ | |
766 | sllx %l4, 20, %l4;\ | |
767 | wrpr %l3, %l4, %tstate ;\ | |
768 | retry;nop; | |
769 | # 707 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
770 | #define H_HT0_data_access_protection_0x6c | |
771 | #define SUN_H_HT0_data_access_protection_0x6c ba daccess_prot_handler; nop | |
772 | ||
773 | #define H_HT0_PA_Watchpoint_0x61 | |
774 | #define My_H_HT0_PA_Watchpoint_0x61 \ | |
775 | HT_HANDLER_RAND7_4;\ | |
776 | done | |
777 | ||
778 | #define H_HT0_Data_access_error_0x32 | |
779 | #define SUN_H_HT0_Data_access_error_0x32 \ | |
780 | done;nop | |
781 | ||
782 | #define H_T0_VA_Watchpoint_0x62 | |
783 | #define My_T0_VA_Watchpoint_0x62 \ | |
784 | T_HANDLER_RAND7_5;\ | |
785 | done | |
786 | ||
787 | #define H_T1_VA_Watchpoint_0x62 | |
788 | #define SUN_H_T1_VA_Watchpoint_0x62 \ | |
789 | T_HANDLER_RAND7_3;\ | |
790 | done | |
791 | ||
792 | #define H_HT0_VA_Watchpoint_0x62 | |
793 | #define My_H_HT0_VA_Watchpoint_0x62 \ | |
794 | HT_HANDLER_RAND7_5;\ | |
795 | done | |
796 | ||
797 | #define H_T0_Instruction_VA_Watchpoint_0x75 | |
798 | #define SUN_H_T0_Instruction_VA_Watchpoint_0x75 \ | |
799 | T_HANDLER_RAND7_4;\ | |
800 | done; | |
801 | ||
802 | #define H_T1_Instruction_VA_Watchpoint_0x75 | |
803 | #define SUN_H_T1_Instruction_VA_Watchpoint_0x75 \ | |
804 | T_HANDLER_RAND7_5;\ | |
805 | done; | |
806 | ||
807 | #define H_HT0_Instruction_VA_Watchpoint_0x75 | |
808 | #define SUN_H_HT0_Instruction_VA_Watchpoint_0x75 \ | |
809 | HT_HANDLER_RAND7_6;\ | |
810 | done; | |
811 | ||
812 | #define H_HT0_Instruction_Breakpoint_0x76 | |
813 | #define SUN_H_HT0_Instruction_Breakpoint_0x76 \ | |
814 | rdhpr %htstate, %g1;\ | |
815 | wrhpr %g1, 0x400, %htstate;\ | |
816 | retry;nop | |
817 | # 756 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
818 | #define H_HT0_Instruction_address_range_0x0d | |
819 | #define SUN_H_HT0_Instruction_address_range_0x0d \ | |
820 | HT_HANDLER_RAND4_1;\ | |
821 | done; | |
822 | ||
823 | #define H_HT0_mem_real_range_0x2d | |
824 | #define SUN_H_HT0_mem_real_range_0x2d \ | |
825 | HT_HANDLER_RAND4_2;\ | |
826 | done; | |
827 | # 767 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
828 | #define H_HT0_mem_address_range_0x2e | |
829 | #define SUN_H_HT0_mem_address_range_0x2e \ | |
830 | HT_HANDLER_RAND4_3;\ | |
831 | done; | |
832 | ||
833 | #define H_HT0_DAE_nc_page_0x16 | |
834 | #define SUN_H_HT0_DAE_nc_page_0x16 \ | |
835 | HT_HANDLER_RAND4_4;\ | |
836 | done; | |
837 | ||
838 | #define H_HT0_DAE_nfo_page_0x17 | |
839 | #define SUN_H_HT0_DAE_nfo_page_0x17 \ | |
840 | HT_HANDLER_RAND4_5;\ | |
841 | done; | |
842 | # 783 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
843 | #define H_HT0_IAE_unauth_access_0x0b | |
844 | #define SUN_H_HT0_IAE_unauth_access_0x0b \ | |
845 | HT_HANDLER_RAND7_3;\ | |
846 | done; | |
847 | # 789 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
848 | #define H_HT0_IAE_nfo_page_0x0c | |
849 | #define SUN_H_HT0_IAE_nfo_page_0x0c \ | |
850 | HT_HANDLER_RAND7_6;\ | |
851 | done; | |
852 | # 795 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
853 | #define H_HT0_Reserved_0x3b | |
854 | #define SUN_H_HT0_Reserved_0x3b \ | |
855 | mov 0x80, %l3;\ | |
856 | stxa %l3, [%l3]0x5f ;\ | |
857 | stxa %l3, [%l3]0x57 ;\ | |
858 | done; | |
859 | # 805 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
860 | #define H_HT0_IAE_privilege_violation_0x08 | |
861 | #define My_HT0_IAE_privilege_violation_0x08 \ | |
862 | HT_HANDLER_RAND7_2;\ | |
863 | done; | |
864 | ||
865 | #define H_HT0_Instruction_Access_MMU_Error_0x71 | |
866 | #define SUN_H_HT0_Instruction_Access_MMU_Error_0x71 \ | |
867 | mov 0x80, %l3;\ | |
868 | stxa %l3, [%l3]0x5f ;\ | |
869 | stxa %l3, [%l3]0x57 ;\ | |
870 | retry; | |
871 | ||
872 | #define H_HT0_Data_Access_MMU_Error_0x72 | |
873 | #define SUN_H_HT0_Data_Access_MMU_Error_0x72 \ | |
874 | mov 0x80, %l3;\ | |
875 | stxa %l3, [%l3]0x5f ;\ | |
876 | stxa %l3, [%l3]0x57 ;\ | |
877 | retry; | |
878 | # 825 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" | |
879 | !!!!!!!!!!!!!!!!!!!!!! END of all handlers !!!!!!!!!!!!!!!!!!! | |
880 | # 12 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
881 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! | |
882 | !!!!!!!!!!!!!!!! START of Interrupt Handlers !!!!!!!!!!!!!!!!! | |
883 | ||
884 | #ifndef INT_HANDLER_RAND4_1 | |
885 | #define INT_HANDLER_RAND4_1 retry; nop; nop; nop | |
886 | #endif | |
887 | #ifndef INT_HANDLER_RAND7_1 | |
888 | #define INT_HANDLER_RAND7_1 mov 0x20,%g1; mov 1, %g2;stxa %g2,[%g1]0x40 | |
889 | #endif | |
890 | #ifndef INT_HANDLER_RAND4_2 | |
891 | #define INT_HANDLER_RAND4_2 retry; nop; nop; nop | |
892 | #endif | |
893 | #ifndef INT_HANDLER_RAND7_2 | |
894 | #define INT_HANDLER_RAND7_2 mov 0x80,%g1;stxa %g0,[%g1]0x40 | |
895 | #endif | |
896 | #ifndef INT_HANDLER_RAND4_3 | |
897 | #define INT_HANDLER_RAND4_3 retry; nop; nop; nop | |
898 | #endif | |
899 | #ifndef INT_HANDLER_RAND7_3 | |
900 | #define INT_HANDLER_RAND7_3 retry; nop; nop; nop ; nop; nop; nop | |
901 | #endif | |
902 | #define H_HT0_Externally_Initiated_Reset_0x03 | |
903 | #define SUN_H_HT0_Externally_Initiated_Reset_0x03 \ | |
904 | ldxa [%g0] ASI_LSU_CTL_REG, %g1; \ | |
905 | set cregs_lsu_ctl_reg_r64, %g1; \ | |
906 | stxa %g1, [%g0] ASI_LSU_CTL_REG; \ | |
907 | retry;nop | |
908 | ||
909 | #define My_External_Reset \ | |
910 | ldxa [%g0] ASI_LSU_CTL_REG, %l5; \ | |
911 | set cregs_lsu_ctl_reg_r64, %l5; \ | |
912 | stxa %l5, [%g0] ASI_LSU_CTL_REG; \ | |
913 | retry;nop | |
914 | ||
915 | !!!!! SPU Interrupt Handlers | |
916 | ||
917 | #define H_HT0_Control_Word_Queue_Interrupt_0x3c | |
918 | #define My_HT0_Control_Word_Queue_Interrupt_0x3c \ | |
919 | INT_HANDLER_RAND7_1 ;\ | |
920 | retry ; | |
921 | ||
922 | #define H_HT0_Modular_Arithmetic_Interrupt_0x3d | |
923 | #define My_H_HT0_Modular_Arithmetic_Interrupt_0x3d \ | |
924 | INT_HANDLER_RAND7_2 ;\ | |
925 | retry ; | |
926 | # 59 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
927 | !!!!! HW interrupt handlers | |
928 | ||
929 | #define H_HT0_Interrupt_0x60 | |
930 | #define My_HT0_Interrupt_0x60 \ | |
931 | ldxa [%g0] ASI_SWVR_INTR_RECEIVE, %g5 ;\ | |
932 | ldxa [%g0] ASI_SWVR_INTR_R, %g4 ;\ | |
933 | ldxa [%g0] ASI_SWVR_INTR_RECEIVE, %g3 ;\ | |
934 | INT_HANDLER_RAND4_1 ;\ | |
935 | retry; | |
936 | ||
937 | !!!!! Queue interrupt handler | |
938 | # 72 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
939 | #define H_T0_Cpu_Mondo_Trap_0x7c | |
940 | #define My_T0_Cpu_Mondo_Trap_0x7c \ | |
941 | mov 0x3c8, %g3; \ | |
942 | ldxa [%g3] 0x25, %g5; \ | |
943 | mov 0x3c0, %g3; \ | |
944 | stxa %g5, [%g3] 0x25; \ | |
945 | retry; \ | |
946 | nop; \ | |
947 | nop; \ | |
948 | nop | |
949 | ||
950 | #define H_T0_Dev_Mondo_Trap_0x7d | |
951 | #define My_T0_Dev_Mondo_Trap_0x7d \ | |
952 | mov 0x3d8, %g3; \ | |
953 | ldxa [%g3] 0x25, %g5; \ | |
954 | mov 0x3d0, %g3; \ | |
955 | stxa %g5, [%g3] 0x25; \ | |
956 | retry; \ | |
957 | nop; \ | |
958 | nop; \ | |
959 | nop | |
960 | ||
961 | #define H_T0_Resumable_Error_0x7e | |
962 | #define My_T0_Resumable_Error_0x7e \ | |
963 | mov 0x3e8, %g3; \ | |
964 | ldxa [%g3] 0x25, %g5; \ | |
965 | mov 0x3e0, %g3; \ | |
966 | stxa %g5, [%g3] 0x25; \ | |
967 | retry; \ | |
968 | nop; \ | |
969 | nop; \ | |
970 | nop | |
971 | ||
972 | #define H_T1_Cpu_Mondo_Trap_0x7c | |
973 | #define My_T1_Cpu_Mondo_Trap_0x7c \ | |
974 | mov 0x3c8, %g3; \ | |
975 | ldxa [%g3] 0x25, %g5; \ | |
976 | mov 0x3c0, %g3; \ | |
977 | stxa %g5, [%g3] 0x25; \ | |
978 | retry; \ | |
979 | nop; \ | |
980 | nop; \ | |
981 | nop | |
982 | ||
983 | #define H_T1_Dev_Mondo_Trap_0x7d | |
984 | #define My_T1_Dev_Mondo_Trap_0x7d \ | |
985 | mov 0x3d8, %g3; \ | |
986 | ldxa [%g3] 0x25, %g5; \ | |
987 | mov 0x3d0, %g3; \ | |
988 | stxa %g5, [%g3] 0x25; \ | |
989 | retry; \ | |
990 | nop; \ | |
991 | nop; \ | |
992 | nop | |
993 | ||
994 | #define H_T1_Resumable_Error_0x7e | |
995 | #define My_T1_Resumable_Error_0x7e \ | |
996 | mov 0x3e8, %g3; \ | |
997 | ldxa [%g3] 0x25, %g5; \ | |
998 | mov 0x3e0, %g3; \ | |
999 | stxa %g5, [%g3] 0x25; \ | |
1000 | retry; \ | |
1001 | nop; \ | |
1002 | nop; \ | |
1003 | nop | |
1004 | ||
1005 | #define H_HT0_Reserved_0x7c | |
1006 | #define SUN_H_HT0_Reserved_0x7c \ | |
1007 | mov 0x3c8, %g3; \ | |
1008 | ldxa [%g3] 0x25, %g5; \ | |
1009 | mov 0x3c0, %g3; \ | |
1010 | stxa %g5, [%g3] 0x25; \ | |
1011 | retry; \ | |
1012 | nop; \ | |
1013 | nop; \ | |
1014 | nop | |
1015 | ||
1016 | #define H_HT0_Reserved_0x7d | |
1017 | #define SUN_H_HT0_Reserved_0x7d \ | |
1018 | mov 0x3d8, %g3; \ | |
1019 | ldxa [%g3] 0x25, %g5; \ | |
1020 | mov 0x3d0, %g3; \ | |
1021 | stxa %g5, [%g3] 0x25; \ | |
1022 | retry; \ | |
1023 | nop; \ | |
1024 | nop; \ | |
1025 | nop | |
1026 | ||
1027 | #define H_HT0_Reserved_0x7e | |
1028 | #define SUN_H_HT0_Reserved_0x7e \ | |
1029 | mov 0x3e8, %g3; \ | |
1030 | ldxa [%g3] 0x25, %g5; \ | |
1031 | mov 0x3e0, %g3; \ | |
1032 | stxa %g5, [%g3] 0x25; \ | |
1033 | retry; \ | |
1034 | nop; \ | |
1035 | nop; \ | |
1036 | nop | |
1037 | # 172 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
1038 | !!!!! Hstick-match trap handler | |
1039 | # 175 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
1040 | #define H_T0_Reserved_0x5e | |
1041 | #define My_T0_Reserved_0x5e \ | |
1042 | rdhpr %hintp, %g3; \ | |
1043 | wrhpr %g3, %g3, %hintp; \ | |
1044 | retry; \ | |
1045 | nop; \ | |
1046 | nop; \ | |
1047 | nop; \ | |
1048 | nop; \ | |
1049 | nop | |
1050 | ||
1051 | #define H_HT0_Hstick_Match_0x5e | |
1052 | #define My_HT0_Hstick_Match_0x5e \ | |
1053 | rdhpr %hintp, %g3; \ | |
1054 | wrhpr %g3, %g3, %hintp; \ | |
1055 | retry; \ | |
1056 | nop; \ | |
1057 | nop; \ | |
1058 | nop; \ | |
1059 | nop; \ | |
1060 | nop | |
1061 | ||
1062 | #define H_T0_Reserved_0x5e | |
1063 | #define My_T0_Reserved_0x5e \ | |
1064 | rdhpr %hintp, %g3; \ | |
1065 | wrhpr %g3, %g3, %hintp; \ | |
1066 | retry; \ | |
1067 | nop; \ | |
1068 | nop; \ | |
1069 | nop; \ | |
1070 | nop; \ | |
1071 | nop | |
1072 | ||
1073 | #define H_T1_Reserved_0x5e | |
1074 | #define My_T1_Reserved_0x5e \ | |
1075 | rdhpr %hintp, %g3; \ | |
1076 | wrhpr %g3, %g3, %hintp; \ | |
1077 | retry; \ | |
1078 | nop; \ | |
1079 | nop; \ | |
1080 | nop; \ | |
1081 | nop; \ | |
1082 | nop | |
1083 | # 220 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
1084 | !!!!! SW interuupt handlers | |
1085 | # 223 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
1086 | #define H_T0_Interrupt_Level_14_0x4e | |
1087 | #define My_T0_Interrupt_Level_14_0x4e \ | |
1088 | rd %softint, %g3; \ | |
1089 | sethi %hi(0x14000), %g3; \ | |
1090 | or %g3, 0x1, %g3; \ | |
1091 | wr %g3, %g0, %clear_softint; \ | |
1092 | retry; \ | |
1093 | nop; \ | |
1094 | nop; \ | |
1095 | nop | |
1096 | ||
1097 | #define H_T0_Interrupt_Level_1_0x41 | |
1098 | #define My_T0_Interrupt_Level_1_0x41 \ | |
1099 | rd %softint, %g3; \ | |
1100 | or %g0, 0x2, %g3; \ | |
1101 | wr %g3, %g0, %clear_softint; \ | |
1102 | retry; \ | |
1103 | nop; \ | |
1104 | nop; \ | |
1105 | nop; \ | |
1106 | nop | |
1107 | ||
1108 | #define H_T0_Interrupt_Level_2_0x42 | |
1109 | #define My_T0_Interrupt_Level_2_0x42 \ | |
1110 | rd %softint, %g3; \ | |
1111 | or %g0, 0x4, %g3; \ | |
1112 | wr %g3, %g0, %clear_softint; \ | |
1113 | retry; \ | |
1114 | nop; \ | |
1115 | nop; \ | |
1116 | nop; \ | |
1117 | nop | |
1118 | ||
1119 | #define H_T0_Interrupt_Level_3_0x43 | |
1120 | #define My_T0_Interrupt_Level_3_0x43 \ | |
1121 | rd %softint, %g3; \ | |
1122 | or %g0, 0x8, %g3; \ | |
1123 | wr %g3, %g0, %clear_softint; \ | |
1124 | retry; \ | |
1125 | nop; \ | |
1126 | nop; \ | |
1127 | nop; \ | |
1128 | nop | |
1129 | ||
1130 | #define H_T0_Interrupt_Level_4_0x44 | |
1131 | #define My_T0_Interrupt_Level_4_0x44 \ | |
1132 | rd %softint, %g3; \ | |
1133 | or %g0, 0x10, %g3; \ | |
1134 | wr %g3, %g0, %clear_softint; \ | |
1135 | retry; \ | |
1136 | nop; \ | |
1137 | nop; \ | |
1138 | nop; \ | |
1139 | nop | |
1140 | ||
1141 | #define H_T0_Interrupt_Level_5_0x45 | |
1142 | #define My_T0_Interrupt_Level_5_0x45 \ | |
1143 | rd %softint, %g3; \ | |
1144 | or %g0, 0x20, %g3; \ | |
1145 | wr %g3, %g0, %clear_softint; \ | |
1146 | retry; \ | |
1147 | nop; \ | |
1148 | nop; \ | |
1149 | nop; \ | |
1150 | nop | |
1151 | ||
1152 | #define H_T0_Interrupt_Level_6_0x46 | |
1153 | #define My_T0_Interrupt_Level_6_0x46 \ | |
1154 | rd %softint, %g3; \ | |
1155 | or %g0, 0x40, %g3; \ | |
1156 | wr %g3, %g0, %clear_softint; \ | |
1157 | retry; \ | |
1158 | nop; \ | |
1159 | nop; \ | |
1160 | nop; \ | |
1161 | nop | |
1162 | ||
1163 | #define H_T0_Interrupt_Level_7_0x47 | |
1164 | #define My_T0_Interrupt_Level_7_0x47 \ | |
1165 | rd %softint, %g3; \ | |
1166 | or %g0, 0x80, %g3; \ | |
1167 | wr %g3, %g0, %clear_softint; \ | |
1168 | retry; \ | |
1169 | nop; \ | |
1170 | nop; \ | |
1171 | nop; \ | |
1172 | nop | |
1173 | ||
1174 | #define H_T0_Interrupt_Level_8_0x48 | |
1175 | #define My_T0_Interrupt_Level_8_0x48 \ | |
1176 | rd %softint, %g3; \ | |
1177 | or %g0, 0x100, %g3; \ | |
1178 | wr %g3, %g0, %clear_softint; \ | |
1179 | retry; \ | |
1180 | nop; \ | |
1181 | nop; \ | |
1182 | nop; \ | |
1183 | nop | |
1184 | ||
1185 | #define H_T0_Interrupt_Level_9_0x49 | |
1186 | #define My_T0_Interrupt_Level_9_0x49 \ | |
1187 | rd %softint, %g3; \ | |
1188 | or %g0, 0x200, %g3; \ | |
1189 | wr %g3, %g0, %clear_softint; \ | |
1190 | retry; \ | |
1191 | nop; \ | |
1192 | nop; \ | |
1193 | nop; \ | |
1194 | nop | |
1195 | ||
1196 | #define H_T0_Interrupt_Level_10_0x4a | |
1197 | #define My_T0_Interrupt_Level_10_0x4a \ | |
1198 | rd %softint, %g3; \ | |
1199 | or %g0, 0x400, %g3; \ | |
1200 | wr %g3, %g0, %clear_softint; \ | |
1201 | retry; \ | |
1202 | nop; \ | |
1203 | nop; \ | |
1204 | nop; \ | |
1205 | nop | |
1206 | ||
1207 | #define H_T0_Interrupt_Level_11_0x4b | |
1208 | #define My_T0_Interrupt_Level_11_0x4b \ | |
1209 | rd %softint, %g3; \ | |
1210 | or %g0, 0x800, %g3; \ | |
1211 | wr %g3, %g0, %clear_softint; \ | |
1212 | retry; \ | |
1213 | nop; \ | |
1214 | nop; \ | |
1215 | nop; \ | |
1216 | nop | |
1217 | ||
1218 | #define H_T0_Interrupt_Level_12_0x4c | |
1219 | #define My_T0_Interrupt_Level_12_0x4c \ | |
1220 | rd %softint, %g3; \ | |
1221 | sethi %hi(0x1000), %g3; \ | |
1222 | wr %g3, %g0, %clear_softint; \ | |
1223 | retry; \ | |
1224 | nop; \ | |
1225 | nop; \ | |
1226 | nop; \ | |
1227 | nop | |
1228 | ||
1229 | #define H_T0_Interrupt_Level_13_0x4d | |
1230 | #define My_T0_Interrupt_Level_13_0x4d \ | |
1231 | rd %softint, %g3; \ | |
1232 | sethi %hi(0x2000), %g3; \ | |
1233 | wr %g3, %g0, %clear_softint; \ | |
1234 | retry; \ | |
1235 | nop; \ | |
1236 | nop; \ | |
1237 | nop; \ | |
1238 | nop | |
1239 | ||
1240 | #define H_T0_Interrupt_Level_15_0x4f | |
1241 | #define My_T0_Interrupt_Level_15_0x4f \ | |
1242 | sethi %hi(0x8000), %g3; \ | |
1243 | wr %g3, %g0, %clear_softint; \ | |
1244 | wr %g0, %g0, %pic;\ | |
1245 | set 0x1ff8bfff, %g4;\ | |
1246 | wr %g4, %g0, %pcr;\ | |
1247 | retry; | |
1248 | ||
1249 | #define H_T1_Interrupt_Level_14_0x4e | |
1250 | #define My_T1_Interrupt_Level_14_0x4e \ | |
1251 | rd %softint, %g3; \ | |
1252 | sethi %hi(0x14000), %g3; \ | |
1253 | or %g3, 0x1, %g3; \ | |
1254 | wr %g3, %g0, %clear_softint; \ | |
1255 | retry; \ | |
1256 | nop; \ | |
1257 | nop; \ | |
1258 | nop | |
1259 | ||
1260 | #define H_T1_Interrupt_Level_1_0x41 | |
1261 | #define My_T1_Interrupt_Level_1_0x41 \ | |
1262 | rd %softint, %g3; \ | |
1263 | or %g0, 0x2, %g3; \ | |
1264 | wr %g3, %g0, %clear_softint; \ | |
1265 | retry; \ | |
1266 | nop; \ | |
1267 | nop; \ | |
1268 | nop; \ | |
1269 | nop | |
1270 | ||
1271 | #define H_T1_Interrupt_Level_2_0x42 | |
1272 | #define My_T1_Interrupt_Level_2_0x42 \ | |
1273 | rd %softint, %g3; \ | |
1274 | or %g0, 0x4, %g3; \ | |
1275 | wr %g3, %g0, %clear_softint; \ | |
1276 | retry; \ | |
1277 | nop; \ | |
1278 | nop; \ | |
1279 | nop; \ | |
1280 | nop | |
1281 | ||
1282 | #define H_T1_Interrupt_Level_3_0x43 | |
1283 | #define My_T1_Interrupt_Level_3_0x43 \ | |
1284 | rd %softint, %g3; \ | |
1285 | or %g0, 0x8, %g3; \ | |
1286 | wr %g3, %g0, %clear_softint; \ | |
1287 | retry; \ | |
1288 | nop; \ | |
1289 | nop; \ | |
1290 | nop; \ | |
1291 | nop | |
1292 | ||
1293 | #define H_T1_Interrupt_Level_4_0x44 | |
1294 | #define My_T1_Interrupt_Level_4_0x44 \ | |
1295 | rd %softint, %g3; \ | |
1296 | or %g0, 0x10, %g3; \ | |
1297 | wr %g3, %g0, %clear_softint; \ | |
1298 | retry; \ | |
1299 | nop; \ | |
1300 | nop; \ | |
1301 | nop; \ | |
1302 | nop | |
1303 | ||
1304 | #define H_T1_Interrupt_Level_5_0x45 | |
1305 | #define My_T1_Interrupt_Level_5_0x45 \ | |
1306 | rd %softint, %g3; \ | |
1307 | or %g0, 0x20, %g3; \ | |
1308 | wr %g3, %g0, %clear_softint; \ | |
1309 | retry; \ | |
1310 | nop; \ | |
1311 | nop; \ | |
1312 | nop; \ | |
1313 | nop | |
1314 | ||
1315 | #define H_T1_Interrupt_Level_6_0x46 | |
1316 | #define My_T1_Interrupt_Level_6_0x46 \ | |
1317 | rd %softint, %g3; \ | |
1318 | or %g0, 0x40, %g3; \ | |
1319 | wr %g3, %g0, %clear_softint; \ | |
1320 | retry; \ | |
1321 | nop; \ | |
1322 | nop; \ | |
1323 | nop; \ | |
1324 | nop | |
1325 | ||
1326 | #define H_T1_Interrupt_Level_7_0x47 | |
1327 | #define My_T1_Interrupt_Level_7_0x47 \ | |
1328 | rd %softint, %g3; \ | |
1329 | or %g0, 0x80, %g3; \ | |
1330 | wr %g3, %g0, %clear_softint; \ | |
1331 | retry; \ | |
1332 | nop; \ | |
1333 | nop; \ | |
1334 | nop; \ | |
1335 | nop | |
1336 | ||
1337 | #define H_T1_Interrupt_Level_8_0x48 | |
1338 | #define My_T1_Interrupt_Level_8_0x48 \ | |
1339 | rd %softint, %g3; \ | |
1340 | or %g0, 0x100, %g3; \ | |
1341 | wr %g3, %g0, %clear_softint; \ | |
1342 | retry; \ | |
1343 | nop; \ | |
1344 | nop; \ | |
1345 | nop; \ | |
1346 | nop | |
1347 | ||
1348 | #define H_T1_Interrupt_Level_9_0x49 | |
1349 | #define My_T1_Interrupt_Level_9_0x49 \ | |
1350 | rd %softint, %g3; \ | |
1351 | or %g0, 0x200, %g3; \ | |
1352 | wr %g3, %g0, %clear_softint; \ | |
1353 | retry; \ | |
1354 | nop; \ | |
1355 | nop; \ | |
1356 | nop; \ | |
1357 | nop | |
1358 | ||
1359 | #define H_T1_Interrupt_Level_10_0x4a | |
1360 | #define My_T1_Interrupt_Level_10_0x4a \ | |
1361 | rd %softint, %g3; \ | |
1362 | or %g0, 0x400, %g3; \ | |
1363 | wr %g3, %g0, %clear_softint; \ | |
1364 | retry; \ | |
1365 | nop; \ | |
1366 | nop; \ | |
1367 | nop; \ | |
1368 | nop | |
1369 | ||
1370 | #define H_T1_Interrupt_Level_11_0x4b | |
1371 | #define My_T1_Interrupt_Level_11_0x4b \ | |
1372 | rd %softint, %g3; \ | |
1373 | or %g0, 0x800, %g3; \ | |
1374 | wr %g3, %g0, %clear_softint; \ | |
1375 | retry; \ | |
1376 | nop; \ | |
1377 | nop; \ | |
1378 | nop; \ | |
1379 | nop | |
1380 | ||
1381 | #define H_T1_Interrupt_Level_12_0x4c | |
1382 | #define My_T1_Interrupt_Level_12_0x4c \ | |
1383 | rd %softint, %g3; \ | |
1384 | sethi %hi(0x1000), %g3; \ | |
1385 | wr %g3, %g0, %clear_softint; \ | |
1386 | retry; \ | |
1387 | nop; \ | |
1388 | nop; \ | |
1389 | nop; \ | |
1390 | nop | |
1391 | ||
1392 | #define H_T1_Interrupt_Level_13_0x4d | |
1393 | #define My_T1_Interrupt_Level_13_0x4d \ | |
1394 | rd %softint, %g3; \ | |
1395 | sethi %hi(0x2000), %g3; \ | |
1396 | wr %g3, %g0, %clear_softint; \ | |
1397 | retry; \ | |
1398 | nop; \ | |
1399 | nop; \ | |
1400 | nop; \ | |
1401 | nop | |
1402 | ||
1403 | #define H_T1_Interrupt_Level_15_0x4f | |
1404 | #define My_T1_Interrupt_Level_15_0x4f \ | |
1405 | sethi %hi(0x8000), %g3; \ | |
1406 | wr %g3, %g0, %clear_softint; \ | |
1407 | wr %g0, %g0, %pic;\ | |
1408 | set 0x1ff8bfff, %g4;\ | |
1409 | wr %g4, %g0, %pcr;\ | |
1410 | retry; | |
1411 | ||
1412 | #define H_HT0_Interrupt_Level_14_0x4e | |
1413 | #define My_HT0_Interrupt_Level_14_0x4e \ | |
1414 | rd %softint, %g3; \ | |
1415 | sethi %hi(0x14000), %g3; \ | |
1416 | or %g3, 0x1, %g3; \ | |
1417 | wr %g3, %g0, %clear_softint; \ | |
1418 | retry; \ | |
1419 | nop; \ | |
1420 | nop; \ | |
1421 | nop | |
1422 | ||
1423 | #define H_HT0_Interrupt_Level_1_0x41 | |
1424 | #define My_HT0_Interrupt_Level_1_0x41 \ | |
1425 | rd %softint, %g3; \ | |
1426 | or %g0, 0x2, %g3; \ | |
1427 | wr %g3, %g0, %clear_softint; \ | |
1428 | retry; \ | |
1429 | nop; \ | |
1430 | nop; \ | |
1431 | nop; \ | |
1432 | nop | |
1433 | ||
1434 | #define H_HT0_Interrupt_Level_2_0x42 | |
1435 | #define My_HT0_Interrupt_Level_2_0x42 \ | |
1436 | rd %softint, %g3; \ | |
1437 | or %g0, 0x4, %g3; \ | |
1438 | wr %g3, %g0, %clear_softint; \ | |
1439 | retry; \ | |
1440 | nop; \ | |
1441 | nop; \ | |
1442 | nop; \ | |
1443 | nop | |
1444 | ||
1445 | #define H_HT0_Interrupt_Level_3_0x43 | |
1446 | #define My_HT0_Interrupt_Level_3_0x43 \ | |
1447 | rd %softint, %g3; \ | |
1448 | or %g0, 0x8, %g3; \ | |
1449 | wr %g3, %g0, %clear_softint; \ | |
1450 | retry; \ | |
1451 | nop; \ | |
1452 | nop; \ | |
1453 | nop; \ | |
1454 | nop | |
1455 | ||
1456 | #define H_HT0_Interrupt_Level_4_0x44 | |
1457 | #define My_HT0_Interrupt_Level_4_0x44 \ | |
1458 | rd %softint, %g3; \ | |
1459 | or %g0, 0x10, %g3; \ | |
1460 | wr %g3, %g0, %clear_softint; \ | |
1461 | retry; \ | |
1462 | nop; \ | |
1463 | nop; \ | |
1464 | nop; \ | |
1465 | nop | |
1466 | ||
1467 | #define H_HT0_Interrupt_Level_5_0x45 | |
1468 | #define My_HT0_Interrupt_Level_5_0x45 \ | |
1469 | rd %softint, %g3; \ | |
1470 | or %g0, 0x20, %g3; \ | |
1471 | wr %g3, %g0, %clear_softint; \ | |
1472 | retry; \ | |
1473 | nop; \ | |
1474 | nop; \ | |
1475 | nop; \ | |
1476 | nop | |
1477 | ||
1478 | #define H_HT0_Interrupt_Level_6_0x46 | |
1479 | #define My_HT0_Interrupt_Level_6_0x46 \ | |
1480 | rd %softint, %g3; \ | |
1481 | or %g0, 0x40, %g3; \ | |
1482 | wr %g3, %g0, %clear_softint; \ | |
1483 | retry; \ | |
1484 | nop; \ | |
1485 | nop; \ | |
1486 | nop; \ | |
1487 | nop | |
1488 | ||
1489 | #define H_HT0_Interrupt_Level_7_0x47 | |
1490 | #define My_HT0_Interrupt_Level_7_0x47 \ | |
1491 | rd %softint, %g3; \ | |
1492 | or %g0, 0x80, %g3; \ | |
1493 | wr %g3, %g0, %clear_softint; \ | |
1494 | retry; \ | |
1495 | nop; \ | |
1496 | nop; \ | |
1497 | nop; \ | |
1498 | nop | |
1499 | ||
1500 | #define H_HT0_Interrupt_Level_8_0x48 | |
1501 | #define My_HT0_Interrupt_Level_8_0x48 \ | |
1502 | rd %softint, %g3; \ | |
1503 | or %g0, 0x100, %g3; \ | |
1504 | wr %g3, %g0, %clear_softint; \ | |
1505 | retry; \ | |
1506 | nop; \ | |
1507 | nop; \ | |
1508 | nop; \ | |
1509 | nop | |
1510 | ||
1511 | #define H_HT0_Interrupt_Level_9_0x49 | |
1512 | #define My_HT0_Interrupt_Level_9_0x49 \ | |
1513 | rd %softint, %g3; \ | |
1514 | or %g0, 0x200, %g3; \ | |
1515 | wr %g3, %g0, %clear_softint; \ | |
1516 | retry; \ | |
1517 | nop; \ | |
1518 | nop; \ | |
1519 | nop; \ | |
1520 | nop | |
1521 | ||
1522 | #define H_HT0_Interrupt_Level_10_0x4a | |
1523 | #define My_HT0_Interrupt_Level_10_0x4a \ | |
1524 | rd %softint, %g3; \ | |
1525 | or %g0, 0x400, %g3; \ | |
1526 | wr %g3, %g0, %clear_softint; \ | |
1527 | retry; \ | |
1528 | nop; \ | |
1529 | nop; \ | |
1530 | nop; \ | |
1531 | nop | |
1532 | ||
1533 | #define H_HT0_Interrupt_Level_11_0x4b | |
1534 | #define My_HT0_Interrupt_Level_11_0x4b \ | |
1535 | rd %softint, %g3; \ | |
1536 | or %g0, 0x800, %g3; \ | |
1537 | wr %g3, %g0, %clear_softint; \ | |
1538 | retry; \ | |
1539 | nop; \ | |
1540 | nop; \ | |
1541 | nop; \ | |
1542 | nop | |
1543 | ||
1544 | #define H_HT0_Interrupt_Level_12_0x4c | |
1545 | #define My_HT0_Interrupt_Level_12_0x4c \ | |
1546 | rd %softint, %g3; \ | |
1547 | sethi %hi(0x1000), %g3; \ | |
1548 | wr %g3, %g0, %clear_softint; \ | |
1549 | retry; \ | |
1550 | nop; \ | |
1551 | nop; \ | |
1552 | nop; \ | |
1553 | nop | |
1554 | ||
1555 | #define H_HT0_Interrupt_Level_13_0x4d | |
1556 | #define My_HT0_Interrupt_Level_13_0x4d \ | |
1557 | rd %softint, %g3; \ | |
1558 | sethi %hi(0x2000), %g3; \ | |
1559 | wr %g3, %g0, %clear_softint; \ | |
1560 | retry; \ | |
1561 | nop; \ | |
1562 | nop; \ | |
1563 | nop; \ | |
1564 | nop | |
1565 | ||
1566 | #define H_HT0_Interrupt_Level_15_0x4f | |
1567 | #define My_HT0_Interrupt_Level_15_0x4f \ | |
1568 | sethi %hi(0x8000), %g3; \ | |
1569 | wr %g3, %g0, %clear_softint; \ | |
1570 | wr %g0, %g0, %pic;\ | |
1571 | set 0x1ff8bfff, %g4;\ | |
1572 | wr %g4, %g0, %pcr;\ | |
1573 | retry; | |
1574 | # 713 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" | |
1575 | !!!!!!!!!!!!!!!!!!!!!! END of all handlers !!!!!!!!!!!!!!!!!!! | |
1576 | # 488 "diag.j" | |
1577 | !# Steer towards main TBA on these errors .. | |
1578 | !# These are redefines ... | |
1579 | #undef SUN_H_HT0_DAE_nc_page_0x16 | |
1580 | #define SUN_H_HT0_DAE_nc_page_0x16 \ | |
1581 | best_set_reg(0x120000, %r1, %r2);\ | |
1582 | wrpr %r0, %r2, %tba; \ | |
1583 | done;nop | |
1584 | ||
1585 | #undef SUN_H_HT0_DAE_nfo_page_0x17 | |
1586 | #define SUN_H_HT0_DAE_nfo_page_0x17 \ | |
1587 | best_set_reg(0x120000, %r1, %r2);\ | |
1588 | wrpr %r0, %r2, %tba; \ | |
1589 | done;nop | |
1590 | ||
1591 | #undef SUN_H_HT0_IAE_unauth_access_0x0b | |
1592 | #define SUN_H_HT0_IAE_unauth_access_0x0b \ | |
1593 | set resolve_bad_tte, %g3;\ | |
1594 | jmp %g3;\ | |
1595 | nop | |
1596 | ||
1597 | #undef My_HT0_IAE_privilege_violation_0x08 | |
1598 | #define My_HT0_IAE_privilege_violation_0x08 \ | |
1599 | set resolve_bad_tte, %g3;\ | |
1600 | jmp %g3;\ | |
1601 | nop | |
1602 | ||
1603 | #define H_HT0_Instruction_address_range_0x0d | |
1604 | #define SUN_H_HT0_Instruction_address_range_0x0d \ | |
1605 | rdpr %tpc, %g1;\ | |
1606 | rdpr %tnpc, %g2;\ | |
1607 | stw %g1, [%i7];\ | |
1608 | stw %g2, [%i7+4];\ | |
1609 | jmpl %r27+8, %r27;\ | |
1610 | fdivd %f0, %f4, %f4;\ | |
1611 | nop; | |
1612 | ||
1613 | #define H_HT0_Instruction_real_range_0x0e | |
1614 | #define SUN_H_HT0_Instruction_real_range_0x0e \ | |
1615 | rdpr %tpc, %g1;\ | |
1616 | rdpr %tnpc, %g2;\ | |
1617 | stw %g1, [%i7];\ | |
1618 | stw %g2, [%i7+4];\ | |
1619 | jmpl %r27+8, %r27;\ | |
1620 | fdivd %f0, %f4, %f4;\ | |
1621 | nop; | |
1622 | ||
1623 | #undef SUN_H_HT0_IAE_nfo_page_0x0c | |
1624 | #define SUN_H_HT0_IAE_nfo_page_0x0c \ | |
1625 | set resolve_bad_tte, %g3;\ | |
1626 | jmp %g3;\ | |
1627 | nop | |
1628 | ||
1629 | #define H_HT0_Instruction_Invalid_TSB_Entry_0x2a | |
1630 | #define SUN_H_HT0_Instruction_Invalid_TSB_Entry_0x2a \ | |
1631 | set restore_range_regs, %g3;\ | |
1632 | jmp %g3;\ | |
1633 | nop | |
1634 | ||
1635 | #define H_HT0_Data_Invalid_TSB_Entry_0x2b | |
1636 | #define SUN_H_HT0_Data_Invalid_TSB_Entry_0x2b \ | |
1637 | set restore_range_regs, %g3;\ | |
1638 | jmp %g3;\ | |
1639 | nop | |
1640 | ||
1641 | #undef FAST_BOOT | |
1642 | #include "hboot.s" | |
1643 | # 556 "diag.j" | |
1644 | #define LOMEIN_TEXT_VA [0x]mpeval(MAIN_BASE_TEXT_VA&0xffffffff,16) | |
1645 | #define LOMEIN_DATA_VA [0x]mpeval(MAIN_BASE_DATA_VA&0xffffffff,16) | |
1646 | changequote([, ])dnl | |
1647 | SECTION .LOMEIN TEXT_VA=LOMEIN_TEXT_VA, DATA_VA=LOMEIN_DATA_VA | |
1648 | attr_text { | |
1649 | Name = .LOMEIN, | |
1650 | VA= LOMEIN_TEXT_VA, | |
1651 | RA= MAIN_BASE_TEXT_RA, | |
1652 | PA= ra2pa2(MAIN_BASE_TEXT_RA, 0), | |
1653 | part_0_ctx_nonzero_tsb_config_1, | |
1654 | part_0_ctx_zero_tsb_config_1, | |
1655 | TTE_G=1, TTE_Context=0x44, TTE_V=1, | |
1656 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, | |
1657 | TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=1, | |
1658 | tsbonly | |
1659 | } | |
1660 | attr_data { | |
1661 | Name = .LOMEIN, | |
1662 | VA= LOMEIN_DATA_VA, | |
1663 | RA= MAIN_BASE_DATA_RA, | |
1664 | PA= ra2pa2(MAIN_BASE_DATA_RA, 0), | |
1665 | part_0_ctx_nonzero_tsb_config_2, | |
1666 | part_0_ctx_zero_tsb_config_2 | |
1667 | TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0, | |
1668 | TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, | |
1669 | TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=0, | |
1670 | tsbonly | |
1671 | } | |
1672 | attr_data { | |
1673 | Name = .LOMEIN, | |
1674 | VA= LOMEIN_DATA_VA, | |
1675 | RA= MAIN_BASE_DATA_RA, | |
1676 | PA= ra2pa2(MAIN_BASE_DATA_RA, 0), | |
1677 | part_0_ctx_nonzero_tsb_config_3, | |
1678 | part_0_ctx_zero_tsb_config_3 | |
1679 | TTE_G=1, TTE_Context=0x55, TTE_V=1, TTE_Size=0, TTE_NFO=0, | |
1680 | TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, | |
1681 | TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=0, | |
1682 | tsbonly | |
1683 | } | |
1684 | .text | |
1685 | .align 0x100000 | |
1686 | nop | |
1687 | .data | |
1688 | .word 0x0 | |
1689 | ||
1690 | SECTION .MAIN TEXT_VA=MAIN_BASE_TEXT_VA, DATA_VA=MAIN_BASE_DATA_VA | |
1691 | attr_text { | |
1692 | Name = .MAIN, | |
1693 | VA=MAIN_BASE_TEXT_VA, | |
1694 | RA= LOMEIN_TEXT_VA, | |
1695 | PA= LOMEIN_TEXT_VA, | |
1696 | part_0_ctx_nonzero_tsb_config_2, | |
1697 | part_0_ctx_zero_tsb_config_2, | |
1698 | TTE_G=1, TTE_Context=0x44, TTE_V=1, | |
1699 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, | |
1700 | TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=1, | |
1701 | } | |
1702 | ||
1703 | attr_data { | |
1704 | Name = .MAIN, | |
1705 | VA=MAIN_BASE_DATA_VA | |
1706 | RA= LOMEIN_DATA_VA, | |
1707 | PA= LOMEIN_DATA_VA, | |
1708 | part_0_ctx_nonzero_tsb_config_1, | |
1709 | part_0_ctx_zero_tsb_config_1 | |
1710 | TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0, | |
1711 | TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, | |
1712 | TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=0, | |
1713 | } | |
1714 | ||
1715 | attr_data { | |
1716 | Name = .MAIN, | |
1717 | VA=MAIN_BASE_DATA_VA | |
1718 | RA= LOMEIN_DATA_VA, | |
1719 | PA= LOMEIN_DATA_VA, | |
1720 | part_0_ctx_nonzero_tsb_config_3, | |
1721 | part_0_ctx_zero_tsb_config_3 | |
1722 | TTE_G=1, TTE_Context=0x55, TTE_V=1, TTE_Size=0, TTE_NFO=0, | |
1723 | TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, | |
1724 | TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=0, | |
1725 | tsbonly | |
1726 | } | |
1727 | ||
1728 | attr_text { | |
1729 | Name = .MAIN, | |
1730 | VA=MAIN_BASE_TEXT_VA, | |
1731 | hypervisor | |
1732 | } | |
1733 | ||
1734 | attr_data { | |
1735 | Name = .MAIN, | |
1736 | VA=MAIN_BASE_DATA_VA | |
1737 | hypervisor | |
1738 | } | |
1739 | changequote(`,')dnl' | |
1740 | ||
1741 | .text | |
1742 | .global main | |
1743 | main: | |
1744 | ||
1745 | ! Set up ld/st area per thread | |
1746 | ta T_CHANGE_HPRIV | |
1747 | ldxa [%g0]0x63, %o2 | |
1748 | and %o2, 0x7, %o1 | |
1749 | brnz %o1, init_start | |
1750 | mov 0xff, %r10 | |
1751 | lock_sync_thds: | |
1752 | set sync_thr_counter4, %r23 | |
1753 | #ifndef SPC | |
1754 | and %o2, 0x38, %o2 | |
1755 | add %o2,%r23,%r23 !Core's sync counter | |
1756 | #endif | |
1757 | st %r10, [%r23] !lock sync_thr_counter4 | |
1758 | add %r23, 64, %r23 | |
1759 | st %r10, [%r23] !lock sync_thr_counter5 | |
1760 | add %r23, 64, %r23 | |
1761 | st %r10, [%r23] !lock sync_thr_counter6 | |
1762 | init_start: | |
1763 | ta T_CHANGE_NONHPRIV | |
1764 | umul %r9, 256, %r31 | |
1765 | setx user_data_start, %r1, %r3 | |
1766 | add %r31, %r3, %r31 | |
1767 | wr %r0, 0x4, %asi | |
1768 | ||
1769 | !Initializing integer registers | |
1770 | ldx [%r31+0], %r0 | |
1771 | ldx [%r31+8], %r1 | |
1772 | ldx [%r31+16], %r2 | |
1773 | ldx [%r31+24], %r3 | |
1774 | ldx [%r31+32], %r4 | |
1775 | ldx [%r31+40], %r5 | |
1776 | ldx [%r31+48], %r6 | |
1777 | ldx [%r31+56], %r7 | |
1778 | ldx [%r31+64], %r8 | |
1779 | ldx [%r31+72], %r9 | |
1780 | ldx [%r31+80], %r10 | |
1781 | ldx [%r31+88], %r11 | |
1782 | ldx [%r31+96], %r12 | |
1783 | ldx [%r31+104], %r13 | |
1784 | ldx [%r31+112], %r14 | |
1785 | mov %r31, %r15 | |
1786 | ldx [%r31+128], %r16 | |
1787 | ldx [%r31+136], %r17 | |
1788 | ldx [%r31+144], %r18 | |
1789 | ldx [%r31+152], %r19 | |
1790 | ldx [%r31+160], %r20 | |
1791 | ldx [%r31+168], %r21 | |
1792 | ldx [%r31+176], %r22 | |
1793 | ldx [%r31+184], %r23 | |
1794 | ldx [%r31+192], %r24 | |
1795 | ldx [%r31+200], %r25 | |
1796 | ldx [%r31+208], %r26 | |
1797 | ldx [%r31+216], %r27 | |
1798 | ldx [%r31+224], %r28 | |
1799 | ldx [%r31+232], %r29 | |
1800 | mov 0x32, %r14 | |
1801 | mov 0x33, %r30 | |
1802 | save %r31, %r0, %r31 | |
1803 | ldx [%r31+0], %r0 | |
1804 | ldx [%r31+8], %r1 | |
1805 | ldx [%r31+16], %r2 | |
1806 | ldx [%r31+24], %r3 | |
1807 | ldx [%r31+32], %r4 | |
1808 | ldx [%r31+40], %r5 | |
1809 | ldx [%r31+48], %r6 | |
1810 | ldx [%r31+56], %r7 | |
1811 | ldx [%r31+64], %r8 | |
1812 | ldx [%r31+72], %r9 | |
1813 | ldx [%r31+80], %r10 | |
1814 | ldx [%r31+88], %r11 | |
1815 | ldx [%r31+96], %r12 | |
1816 | ldx [%r31+104], %r13 | |
1817 | ldx [%r31+112], %r14 | |
1818 | mov %r31, %r15 | |
1819 | ldx [%r31+128], %r16 | |
1820 | ldx [%r31+136], %r17 | |
1821 | ldx [%r31+144], %r18 | |
1822 | ldx [%r31+152], %r19 | |
1823 | ldx [%r31+160], %r20 | |
1824 | ldx [%r31+168], %r21 | |
1825 | ldx [%r31+176], %r22 | |
1826 | ldx [%r31+184], %r23 | |
1827 | ldx [%r31+192], %r24 | |
1828 | ldx [%r31+200], %r25 | |
1829 | ldx [%r31+208], %r26 | |
1830 | ldx [%r31+216], %r27 | |
1831 | ldx [%r31+224], %r28 | |
1832 | ldx [%r31+232], %r29 | |
1833 | mov 0x35, %r14 | |
1834 | mov 0xb0, %r30 | |
1835 | save %r31, %r0, %r31 | |
1836 | ldx [%r31+0], %r0 | |
1837 | ldx [%r31+8], %r1 | |
1838 | ldx [%r31+16], %r2 | |
1839 | ldx [%r31+24], %r3 | |
1840 | ldx [%r31+32], %r4 | |
1841 | ldx [%r31+40], %r5 | |
1842 | ldx [%r31+48], %r6 | |
1843 | ldx [%r31+56], %r7 | |
1844 | ldx [%r31+64], %r8 | |
1845 | ldx [%r31+72], %r9 | |
1846 | ldx [%r31+80], %r10 | |
1847 | ldx [%r31+88], %r11 | |
1848 | ldx [%r31+96], %r12 | |
1849 | ldx [%r31+104], %r13 | |
1850 | ldx [%r31+112], %r14 | |
1851 | mov %r31, %r15 | |
1852 | ldx [%r31+128], %r16 | |
1853 | ldx [%r31+136], %r17 | |
1854 | ldx [%r31+144], %r18 | |
1855 | ldx [%r31+152], %r19 | |
1856 | ldx [%r31+160], %r20 | |
1857 | ldx [%r31+168], %r21 | |
1858 | ldx [%r31+176], %r22 | |
1859 | ldx [%r31+184], %r23 | |
1860 | ldx [%r31+192], %r24 | |
1861 | ldx [%r31+200], %r25 | |
1862 | ldx [%r31+208], %r26 | |
1863 | ldx [%r31+216], %r27 | |
1864 | ldx [%r31+224], %r28 | |
1865 | ldx [%r31+232], %r29 | |
1866 | mov 0x30, %r14 | |
1867 | mov 0x30, %r30 | |
1868 | save %r31, %r0, %r31 | |
1869 | ldx [%r31+0], %r0 | |
1870 | ldx [%r31+8], %r1 | |
1871 | ldx [%r31+16], %r2 | |
1872 | ldx [%r31+24], %r3 | |
1873 | ldx [%r31+32], %r4 | |
1874 | ldx [%r31+40], %r5 | |
1875 | ldx [%r31+48], %r6 | |
1876 | ldx [%r31+56], %r7 | |
1877 | ldx [%r31+64], %r8 | |
1878 | ldx [%r31+72], %r9 | |
1879 | ldx [%r31+80], %r10 | |
1880 | ldx [%r31+88], %r11 | |
1881 | ldx [%r31+96], %r12 | |
1882 | ldx [%r31+104], %r13 | |
1883 | ldx [%r31+112], %r14 | |
1884 | mov %r31, %r15 | |
1885 | ldx [%r31+128], %r16 | |
1886 | ldx [%r31+136], %r17 | |
1887 | ldx [%r31+144], %r18 | |
1888 | ldx [%r31+152], %r19 | |
1889 | ldx [%r31+160], %r20 | |
1890 | ldx [%r31+168], %r21 | |
1891 | ldx [%r31+176], %r22 | |
1892 | ldx [%r31+184], %r23 | |
1893 | ldx [%r31+192], %r24 | |
1894 | ldx [%r31+200], %r25 | |
1895 | ldx [%r31+208], %r26 | |
1896 | ldx [%r31+216], %r27 | |
1897 | ldx [%r31+224], %r28 | |
1898 | ldx [%r31+232], %r29 | |
1899 | mov 0x35, %r14 | |
1900 | mov 0xb2, %r30 | |
1901 | save %r31, %r0, %r31 | |
1902 | ldx [%r31+0], %r0 | |
1903 | ldx [%r31+8], %r1 | |
1904 | ldx [%r31+16], %r2 | |
1905 | ldx [%r31+24], %r3 | |
1906 | ldx [%r31+32], %r4 | |
1907 | ldx [%r31+40], %r5 | |
1908 | ldx [%r31+48], %r6 | |
1909 | ldx [%r31+56], %r7 | |
1910 | ldx [%r31+64], %r8 | |
1911 | ldx [%r31+72], %r9 | |
1912 | ldx [%r31+80], %r10 | |
1913 | ldx [%r31+88], %r11 | |
1914 | ldx [%r31+96], %r12 | |
1915 | ldx [%r31+104], %r13 | |
1916 | ldx [%r31+112], %r14 | |
1917 | mov %r31, %r15 | |
1918 | ldx [%r31+128], %r16 | |
1919 | ldx [%r31+136], %r17 | |
1920 | ldx [%r31+144], %r18 | |
1921 | ldx [%r31+152], %r19 | |
1922 | ldx [%r31+160], %r20 | |
1923 | ldx [%r31+168], %r21 | |
1924 | ldx [%r31+176], %r22 | |
1925 | ldx [%r31+184], %r23 | |
1926 | ldx [%r31+192], %r24 | |
1927 | ldx [%r31+200], %r25 | |
1928 | ldx [%r31+208], %r26 | |
1929 | ldx [%r31+216], %r27 | |
1930 | ldx [%r31+224], %r28 | |
1931 | ldx [%r31+232], %r29 | |
1932 | mov 0xb2, %r14 | |
1933 | mov 0x30, %r30 | |
1934 | save %r31, %r0, %r31 | |
1935 | ldx [%r31+0], %r0 | |
1936 | ldx [%r31+8], %r1 | |
1937 | ldx [%r31+16], %r2 | |
1938 | ldx [%r31+24], %r3 | |
1939 | ldx [%r31+32], %r4 | |
1940 | ldx [%r31+40], %r5 | |
1941 | ldx [%r31+48], %r6 | |
1942 | ldx [%r31+56], %r7 | |
1943 | ldx [%r31+64], %r8 | |
1944 | ldx [%r31+72], %r9 | |
1945 | ldx [%r31+80], %r10 | |
1946 | ldx [%r31+88], %r11 | |
1947 | ldx [%r31+96], %r12 | |
1948 | ldx [%r31+104], %r13 | |
1949 | ldx [%r31+112], %r14 | |
1950 | mov %r31, %r15 | |
1951 | ldx [%r31+128], %r16 | |
1952 | ldx [%r31+136], %r17 | |
1953 | ldx [%r31+144], %r18 | |
1954 | ldx [%r31+152], %r19 | |
1955 | ldx [%r31+160], %r20 | |
1956 | ldx [%r31+168], %r21 | |
1957 | ldx [%r31+176], %r22 | |
1958 | ldx [%r31+184], %r23 | |
1959 | ldx [%r31+192], %r24 | |
1960 | ldx [%r31+200], %r25 | |
1961 | ldx [%r31+208], %r26 | |
1962 | ldx [%r31+216], %r27 | |
1963 | ldx [%r31+224], %r28 | |
1964 | ldx [%r31+232], %r29 | |
1965 | mov 0xb2, %r14 | |
1966 | mov 0xb3, %r30 | |
1967 | save %r31, %r0, %r31 | |
1968 | ldx [%r31+0], %r0 | |
1969 | ldx [%r31+8], %r1 | |
1970 | ldx [%r31+16], %r2 | |
1971 | ldx [%r31+24], %r3 | |
1972 | ldx [%r31+32], %r4 | |
1973 | ldx [%r31+40], %r5 | |
1974 | ldx [%r31+48], %r6 | |
1975 | ldx [%r31+56], %r7 | |
1976 | ldx [%r31+64], %r8 | |
1977 | ldx [%r31+72], %r9 | |
1978 | ldx [%r31+80], %r10 | |
1979 | ldx [%r31+88], %r11 | |
1980 | ldx [%r31+96], %r12 | |
1981 | ldx [%r31+104], %r13 | |
1982 | ldx [%r31+112], %r14 | |
1983 | mov %r31, %r15 | |
1984 | ldx [%r31+128], %r16 | |
1985 | ldx [%r31+136], %r17 | |
1986 | ldx [%r31+144], %r18 | |
1987 | ldx [%r31+152], %r19 | |
1988 | ldx [%r31+160], %r20 | |
1989 | ldx [%r31+168], %r21 | |
1990 | ldx [%r31+176], %r22 | |
1991 | ldx [%r31+184], %r23 | |
1992 | ldx [%r31+192], %r24 | |
1993 | ldx [%r31+200], %r25 | |
1994 | ldx [%r31+208], %r26 | |
1995 | ldx [%r31+216], %r27 | |
1996 | ldx [%r31+224], %r28 | |
1997 | ldx [%r31+232], %r29 | |
1998 | mov 0x35, %r14 | |
1999 | mov 0xb1, %r30 | |
2000 | save %r31, %r0, %r31 | |
2001 | restore | |
2002 | restore | |
2003 | restore | |
2004 | !Initializing float registers | |
2005 | ldd [%r31+0], %f0 | |
2006 | ldd [%r31+16], %f2 | |
2007 | ldd [%r31+32], %f4 | |
2008 | ldd [%r31+48], %f6 | |
2009 | ldd [%r31+64], %f8 | |
2010 | ldd [%r31+80], %f10 | |
2011 | ldd [%r31+96], %f12 | |
2012 | ldd [%r31+112], %f14 | |
2013 | ldd [%r31+128], %f16 | |
2014 | ldd [%r31+144], %f18 | |
2015 | ldd [%r31+160], %f20 | |
2016 | ldd [%r31+176], %f22 | |
2017 | ldd [%r31+192], %f24 | |
2018 | ldd [%r31+208], %f26 | |
2019 | ldd [%r31+224], %f28 | |
2020 | ldd [%r31+240], %f30 | |
2021 | !! Set TPC/TNPC to diag-finish in case we get to a strange TL .. | |
2022 | ta T_CHANGE_HPRIV | |
2023 | setx diag_finish, %r29, %r28 | |
2024 | add %r28, 4, %r29 | |
2025 | wrpr %g0, 1, %tl | |
2026 | wrpr %r28, %tpc | |
2027 | wrpr %r29, %tnpc | |
2028 | wrpr %g0, 2, %tl | |
2029 | wrpr %r28, %tpc | |
2030 | wrpr %r29, %tnpc | |
2031 | wrpr %g0, 3, %tl | |
2032 | wrpr %r28, %tpc | |
2033 | wrpr %r29, %tnpc | |
2034 | wrpr %g0, 4, %tl | |
2035 | wrpr %r28, %tpc | |
2036 | wrpr %r29, %tnpc | |
2037 | wrpr %g0, 5, %tl | |
2038 | wrpr %r28, %tpc | |
2039 | wrpr %r29, %tnpc | |
2040 | wrpr %g0, 6, %tl | |
2041 | wrpr %r28, %tpc | |
2042 | wrpr %r29, %tnpc | |
2043 | wrpr %g0, 0, %tl | |
2044 | ||
2045 | !Initializing Tick Cmprs | |
2046 | mov 1, %g2 | |
2047 | sllx %g2, 63, %g2 | |
2048 | or %g1, %g2, %g1 | |
2049 | wrhpr %g1, %g0, %hsys_tick_cmpr | |
2050 | wr %g1, %g0, %tick_cmpr | |
2051 | wr %g1, %g0, %sys_tick_cmpr | |
2052 | ||
2053 | ! Set up fpr PMU traps | |
2054 | set 0x1ff8bfff, %g2 | |
2055 | b fork_threads | |
2056 | wr %g2, %g0, %pcr | |
2057 | ||
2058 | common_target: | |
2059 | nop | |
2060 | sub %r27, 8, %r27 | |
2061 | and %r27, 8, %r12 | |
2062 | brz,a %r12, .+8 | |
2063 | lduw [%r27], %r12 ! load jmp dest into dcache - xinval | |
2064 | jmp %r27 | |
2065 | .word 0xe1e7c020 ! 1: CASA_I casa [%r31] 0x 1, %r0, %r16 | |
2066 | nop | |
2067 | jmp %r27 | |
2068 | nop | |
2069 | fork_threads: | |
2070 | ta %icc, T_RD_THID | |
2071 | ! fork: source strm = 0xffffffff; target strm = 0x1 | |
2072 | cmp %o1, 0 | |
2073 | setx fork_lbl_0_1, %g2, %g3 | |
2074 | be,a .+8 | |
2075 | jmp %g3 | |
2076 | nop | |
2077 | ! fork: source strm = 0xffffffff; target strm = 0x2 | |
2078 | cmp %o1, 1 | |
2079 | setx fork_lbl_0_2, %g2, %g3 | |
2080 | be,a .+8 | |
2081 | jmp %g3 | |
2082 | nop | |
2083 | ! fork: source strm = 0xffffffff; target strm = 0x4 | |
2084 | cmp %o1, 2 | |
2085 | setx fork_lbl_0_3, %g2, %g3 | |
2086 | be,a .+8 | |
2087 | jmp %g3 | |
2088 | nop | |
2089 | ! fork: source strm = 0xffffffff; target strm = 0x8 | |
2090 | cmp %o1, 3 | |
2091 | setx fork_lbl_0_4, %g2, %g3 | |
2092 | be,a .+8 | |
2093 | jmp %g3 | |
2094 | nop | |
2095 | ! fork: source strm = 0xffffffff; target strm = 0x10 | |
2096 | cmp %o1, 4 | |
2097 | setx fork_lbl_0_5, %g2, %g3 | |
2098 | be,a .+8 | |
2099 | jmp %g3 | |
2100 | nop | |
2101 | ! fork: source strm = 0xffffffff; target strm = 0x20 | |
2102 | cmp %o1, 5 | |
2103 | setx fork_lbl_0_6, %g2, %g3 | |
2104 | be,a .+8 | |
2105 | jmp %g3 | |
2106 | nop | |
2107 | ! fork: source strm = 0xffffffff; target strm = 0x40 | |
2108 | cmp %o1, 6 | |
2109 | setx fork_lbl_0_7, %g2, %g3 | |
2110 | be,a .+8 | |
2111 | jmp %g3 | |
2112 | nop | |
2113 | ! fork: source strm = 0xffffffff; target strm = 0x80 | |
2114 | cmp %o1, 7 | |
2115 | setx fork_lbl_0_8, %g2, %g3 | |
2116 | be,a .+8 | |
2117 | jmp %g3 | |
2118 | nop | |
2119 | setx join_lbl_0_0, %g1, %g2 | |
2120 | jmp %g2 | |
2121 | nop | |
2122 | setx join_lbl_0_0, %g1, %g2 | |
2123 | jmp %g2 | |
2124 | nop | |
2125 | fork_lbl_0_8: | |
2126 | rd %asi, %r12 | |
2127 | #ifdef XIR_RND_CORES | |
2128 | setup_xir_80: | |
2129 | setx 0xf13299d55c29e179, %r1, %r28 | |
2130 | mov 0x30, %r17 | |
2131 | stxa %r28, [%r17] 0x41 | |
2132 | #endif | |
2133 | setup_spu_80: | |
2134 | wr %g0, 0x40, %asi | |
2135 | !# allocate control word queue (e.g., setup head/tail/first/last registers) | |
2136 | set CWQ_BASE, %l6 | |
2137 | ||
2138 | #ifndef SPC | |
2139 | ldxa [%g0]0x63, %o2 | |
2140 | and %o2, 0x38, %o2 | |
2141 | sllx %o2, 5, %o2 !(CID*256) | |
2142 | add %l6, %o2, %l6 | |
2143 | #endif | |
2144 | # 780 "diag.j" | |
2145 | !# write base addr to first, head, and tail ptr | |
2146 | !# first store to first | |
2147 | stxa %l6, [%g0 + ASI_SPU_CWQ_FIRST] %asi !# first store to first | |
2148 | ||
2149 | stxa %l6, [%g0 + ASI_SPU_CWQ_HEAD] %asi !# then to head | |
2150 | stxa %l6, [%g0 + ASI_SPU_CWQ_TAIL] %asi !# then to tail | |
2151 | setx CWQ_LAST, %g1, %l5 !# then end of CWQ region to LAST | |
2152 | #ifndef SPC | |
2153 | add %l5, %o2, %l5 | |
2154 | #endif | |
2155 | stxa %l5, [%g0 + ASI_SPU_CWQ_LAST] %asi | |
2156 | ||
2157 | !# set CWQ control word ([38:36] is strand ID ..) | |
2158 | best_set_reg(0x20610080, %l1, %l2) !# Control Word | |
2159 | sllx %l2, 32, %l2 | |
2160 | ||
2161 | !# write CWQ entry (%l6 points to CWQ) | |
2162 | stx %l2, [%l6 + 0x0] | |
2163 | ||
2164 | setx msg, %g1, %l2 | |
2165 | stx %l2, [%l6 + 0x8] !# source address | |
2166 | ||
2167 | stx %g0, [%l6 + 0x10] !# Authentication Key Address (40-bit) | |
2168 | stx %g0, [%l6 + 0x18] !# Authentication IV Address (40-bit) | |
2169 | stx %g0, [%l6 + 0x20] !# Authentication FSAS Address (40-bit) | |
2170 | stx %g0, [%l6 + 0x28] !# Encryption Key Address (40-bit) | |
2171 | stx %g0, [%l6 + 0x30] !# Encryption Initialization Vector Address (40-bit) | |
2172 | ||
2173 | setx results, %g1, %o3 | |
2174 | stx %o3, [%l6 + 0x38] !# Destination Address (40-bit) | |
2175 | ||
2176 | membar #Sync | |
2177 | ||
2178 | ldxa [%g0 + ASI_SPU_CWQ_TAIL] %asi, %l2 | |
2179 | add %l2, 0x40, %l2 | |
2180 | stxa %l2, [%g0 + ASI_SPU_CWQ_TAIL] %asi | |
2181 | ||
2182 | !# Kick off the CWQ operation by writing to the CWQ_CSR | |
2183 | !# Set the enabled bit and reset the other bits | |
2184 | or %g0, 0x1, %g1 | |
2185 | stxa %g1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
2186 | ||
2187 | unlock_sync_thds_80: | |
2188 | set sync_thr_counter6, %r23 | |
2189 | #ifndef SPC | |
2190 | ldxa [%g0]0x63, %o2 | |
2191 | and %o2, 0x38, %o2 | |
2192 | add %o2, %r23, %r23 | |
2193 | #endif | |
2194 | st %r0, [%r23] !unlock sync_thr_counter6 | |
2195 | sub %r23, 64, %r23 | |
2196 | st %r0, [%r23] !unlock sync_thr_counter5 | |
2197 | sub %r23, 64, %r23 | |
2198 | st %r0, [%r23] !unlock sync_thr_counter4 | |
2199 | ||
2200 | wr %r0, %r12, %asi | |
2201 | ta T_CHANGE_NONHPRIV | |
2202 | .word 0xe08008a0 ! 1: LDUWA_R lduwa [%r0, %r0] 0x45, %r16 | |
2203 | .word 0xc19fdb60 ! 2: LDDFA_R ldda [%r31, %r0], %f0 | |
2204 | .word 0xe08008a0 ! 3: LDUWA_R lduwa [%r0, %r0] 0x45, %r16 | |
2205 | splash_tick_80_0: | |
2206 | nop | |
2207 | ta T_CHANGE_HPRIV | |
2208 | best_set_reg(0x08907a7c00148dad, %r16, %r17) | |
2209 | .word 0x89800011 ! 4: WRTICK_R wr %r0, %r17, %tick | |
2210 | .word 0x8d802000 ! 5: WRFPRS_I wr %r0, 0x0000, %fprs | |
2211 | .word 0x3c800001 ! 1: BPOS bpos,a <label_0x1> | |
2212 | .word 0x8d903e69 ! 6: WRPR_PSTATE_I wrpr %r0, 0x1e69, %pstate | |
2213 | .word 0xe0bfc020 ! 7: STDA_R stda %r16, [%r31 + %r0] 0x01 | |
2214 | #if (defined SPC || defined CMP1) | |
2215 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_2) + 56, 16, 16)) -> intp(1,0,3) | |
2216 | #else | |
2217 | setx 0x432e45b2dc93ee70, %r1, %r28 | |
2218 | stxa %r28, [%g0] 0x73 | |
2219 | #endif | |
2220 | intvec_80_2: | |
2221 | .word 0x39400001 ! 8: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2222 | .word 0xc32fc000 ! 9: STXFSR_R st-sfr %f1, [%r0, %r31] | |
2223 | splash_lsu_80_3: | |
2224 | nop | |
2225 | ta T_CHANGE_HPRIV | |
2226 | set 0x486d8438, %r2 | |
2227 | mov 0x7, %r1 | |
2228 | sllx %r1, 32, %r1 | |
2229 | or %r1, %r2, %r2 | |
2230 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2231 | ta T_CHANGE_NONHPRIV | |
2232 | .word 0x3d400001 ! 10: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2233 | .word 0x2a780001 ! 11: BPCS <illegal instruction> | |
2234 | splash_decr_80_4: | |
2235 | nop | |
2236 | ta T_CHANGE_HPRIV | |
2237 | mov 8, %r1 | |
2238 | stxa %r15, [%r1] 0x45 | |
2239 | .word 0xa7814014 ! 12: WR_GRAPHICS_STATUS_REG_R wr %r5, %r20, %- | |
2240 | fpinit_80_5: | |
2241 | nop | |
2242 | setx fp_data_quads, %r19, %r20 | |
2243 | ldd [%r20], %f0 | |
2244 | ldd [%r20+8], %f4 | |
2245 | ld [%r20+16], %fsr | |
2246 | ld [%r20+24], %r19 | |
2247 | wr %r19, %g0, %gsr | |
2248 | .word 0x89a009c4 ! 13: FDIVd fdivd %f0, %f4, %f4 | |
2249 | invalw | |
2250 | mov 0x35, %r30 | |
2251 | .word 0x91d0001e ! 14: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2252 | .word 0x879cc012 ! 15: WRHPR_HINTP_R wrhpr %r19, %r18, %hintp | |
2253 | .word 0xa57035a9 ! 16: POPC_I popc 0x15a9, %r18 | |
2254 | .word 0x8780208b ! 17: WRASI_I wr %r0, 0x008b, %asi | |
2255 | .word 0x93b507d1 ! 18: PDIST pdistn %d20, %d48, %d40 | |
2256 | cmp_80_7: | |
2257 | nop | |
2258 | ta T_CHANGE_HPRIV | |
2259 | rd %asi, %r12 | |
2260 | wr %r0, 0x41, %asi | |
2261 | set sync_thr_counter4, %r23 | |
2262 | #ifndef SPC | |
2263 | ldxa [%g0]0x63, %r8 | |
2264 | and %r8, 0x38, %r8 ! Core ID | |
2265 | add %r8, %r23, %r23 | |
2266 | mov 0xff, %r9 | |
2267 | xor %r9, 0x80, %r9 | |
2268 | sllx %r9, %r8, %r9 ! My core mask | |
2269 | #else | |
2270 | mov 0, %r8 | |
2271 | mov 0xff, %r9 | |
2272 | xor %r9, 0x80, %r9 ! My core mask | |
2273 | #endif | |
2274 | mov 0x80, %r10 | |
2275 | cmp_startwait80_7: | |
2276 | cas [%r23],%g0,%r10 !lock | |
2277 | brz,a %r10, continue_cmp_80_7 | |
2278 | ldxa [0x50]%asi, %r13 !Running_rw | |
2279 | ld [%r23], %r10 | |
2280 | cmp_wait80_7: | |
2281 | brnz,a %r10, cmp_wait80_7 | |
2282 | ld [%r23], %r10 | |
2283 | ba cmp_startwait80_7 | |
2284 | mov 0x80, %r10 | |
2285 | continue_cmp_80_7: | |
2286 | ldxa [0x58]%asi, %r14 !Running_status | |
2287 | xnor %r14, %r13, %r14 !Bits equal | |
2288 | brz,a %r8, cmp_multi_core_80_7 | |
2289 | mov 0xbb, %r17 | |
2290 | best_set_reg(0x2f9dc727bdfca641, %r16, %r17) | |
2291 | cmp_multi_core_80_7: | |
2292 | and %r14, %r17, %r14 !Apply set/clear mask to bits equal | |
2293 | and %r14, %r9, %r14 !Apply core-mask | |
2294 | stxa %r14, [0x68]%asi | |
2295 | st %g0, [%r23] !clear lock | |
2296 | wr %g0, %r12, %asi | |
2297 | ta T_CHANGE_NONHPRIV | |
2298 | .word 0x97a0016d ! 19: FABSq dis not found | |
2299 | ||
2300 | .word 0xe49fe148 ! 20: LDDA_I ldda [%r31, + 0x0148] %asi, %r18 | |
2301 | .word 0xe44fe0e8 ! 21: LDSB_I ldsb [%r31 + 0x00e8], %r18 | |
2302 | memptr_80_8: | |
2303 | set 0x60340000, %r31 | |
2304 | .word 0x8584f0be ! 22: WRCCR_I wr %r19, 0x10be, %ccr | |
2305 | splash_tba_80_9: | |
2306 | nop | |
2307 | ta T_CHANGE_PRIV | |
2308 | setx 0x00000000003a0000, %r11, %r12 | |
2309 | .word 0x8b90000c ! 23: WRPR_TBA_R wrpr %r0, %r12, %tba | |
2310 | nop | |
2311 | ta T_CHANGE_HPRIV | |
2312 | mov 0x80+1, %r10 | |
2313 | set sync_thr_counter5, %r23 | |
2314 | #ifndef SPC | |
2315 | ldxa [%g0]0x63, %o1 | |
2316 | and %o1, 0x38, %o1 | |
2317 | add %o1, %r23, %r23 | |
2318 | sllx %o1, 5, %o3 !(CID*256) | |
2319 | #endif | |
2320 | cas [%r23],%g0,%r10 !lock | |
2321 | brnz %r10, cwq_80_10 | |
2322 | rd %asi, %r12 | |
2323 | wr %g0, 0x40, %asi | |
2324 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
2325 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
2326 | cmp %l1, 1 | |
2327 | bne cwq_80_10 | |
2328 | set CWQ_BASE, %l6 | |
2329 | #ifndef SPC | |
2330 | add %l6, %o3, %l6 | |
2331 | #endif | |
2332 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
2333 | best_set_reg(0x206100b0, %l1, %l2) !# Control Word | |
2334 | sllx %l2, 32, %l2 | |
2335 | stx %l2, [%l6 + 0x0] | |
2336 | membar #Sync | |
2337 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
2338 | sub %l2, 0x40, %l2 | |
2339 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
2340 | wr %r12, %g0, %asi | |
2341 | st %g0, [%r23] | |
2342 | cwq_80_10: | |
2343 | ta T_CHANGE_NONHPRIV | |
2344 | .word 0x9b414000 ! 24: RDPC rd %pc, %r13 | |
2345 | .word 0x8d903a57 ! 25: WRPR_PSTATE_I wrpr %r0, 0x1a57, %pstate | |
2346 | brcommon1_80_12: | |
2347 | nop | |
2348 | setx common_target, %r12, %r27 | |
2349 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
2350 | ba,a .+12 | |
2351 | .word 0xa1702070 ! 1: POPC_I popc 0x0070, %r16 | |
2352 | ba,a .+8 | |
2353 | jmpl %r27+0, %r27 | |
2354 | .word 0x9f8026ea ! 26: SIR sir 0x06ea | |
2355 | intveclr_80_13: | |
2356 | nop | |
2357 | ta T_CHANGE_HPRIV | |
2358 | setx 0x459b80f9c8d5f9e2, %r1, %r28 | |
2359 | stxa %r28, [%g0] 0x72 | |
2360 | ta T_CHANGE_NONHPRIV | |
2361 | .word 0x25400001 ! 27: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2362 | splash_lsu_80_14: | |
2363 | nop | |
2364 | ta T_CHANGE_HPRIV | |
2365 | set 0x3761edaf, %r2 | |
2366 | mov 0x6, %r1 | |
2367 | sllx %r1, 32, %r1 | |
2368 | or %r1, %r2, %r2 | |
2369 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2370 | ta T_CHANGE_NONHPRIV | |
2371 | .word 0x3d400001 ! 28: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2372 | splash_cmpr_80_15: | |
2373 | mov 0, %r18 | |
2374 | sllx %r18, 63, %r18 | |
2375 | rd %tick, %r17 | |
2376 | add %r17, 0x100, %r17 | |
2377 | or %r17, %r18, %r17 | |
2378 | ta T_CHANGE_HPRIV | |
2379 | wrhpr %r17, %g0, %hsys_tick_cmpr | |
2380 | .word 0xb3800011 ! 29: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
2381 | brcommon1_80_16: | |
2382 | nop | |
2383 | setx common_target, %r12, %r27 | |
2384 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
2385 | ba,a .+12 | |
2386 | .word 0xa9b7c7d1 ! 1: PDIST pdistn %d62, %d48, %d20 | |
2387 | ba,a .+8 | |
2388 | jmpl %r27+0, %r27 | |
2389 | .word 0x9f80260a ! 30: SIR sir 0x060a | |
2390 | .word 0xd03fc000 ! 31: STD_R std %r8, [%r31 + %r0] | |
2391 | splash_tba_80_17: | |
2392 | nop | |
2393 | ta T_CHANGE_PRIV | |
2394 | setx 0x00000000003a0000, %r11, %r12 | |
2395 | .word 0x8b90000c ! 32: WRPR_TBA_R wrpr %r0, %r12, %tba | |
2396 | ibp_80_18: | |
2397 | nop | |
2398 | ta T_CHANGE_HPRIV | |
2399 | mov 8, %r18 | |
2400 | rd %asi, %r12 | |
2401 | wr %r0, 0x41, %asi | |
2402 | set sync_thr_counter4, %r23 | |
2403 | #ifndef SPC | |
2404 | ldxa [%g0]0x63, %r8 | |
2405 | and %r8, 0x38, %r8 ! Core ID | |
2406 | add %r8, %r23, %r23 | |
2407 | #else | |
2408 | mov 0, %r8 | |
2409 | #endif | |
2410 | mov 0x80, %r16 | |
2411 | ibp_startwait80_18: | |
2412 | cas [%r23],%g0,%r16 !lock | |
2413 | brz,a %r16, continue_ibp_80_18 | |
2414 | mov (~0x80&0xf0), %r16 | |
2415 | ld [%r23], %r16 | |
2416 | ibp_wait80_18: | |
2417 | brnz %r16, ibp_wait80_18 | |
2418 | ld [%r23], %r16 | |
2419 | ba ibp_startwait80_18 | |
2420 | mov 0x80, %r16 | |
2421 | continue_ibp_80_18: | |
2422 | sllx %r16, %r8, %r16 !Mask for my core only | |
2423 | ldxa [0x58]%asi, %r17 !Running_status | |
2424 | wait_for_stat_80_18: | |
2425 | ldxa [0x50]%asi, %r13 !Running_rw | |
2426 | cmp %r13, %r17 | |
2427 | bne,a %xcc, wait_for_stat_80_18 | |
2428 | ldxa [0x58]%asi, %r17 !Running_status | |
2429 | stxa %r16, [0x68]%asi !Park (W1C) | |
2430 | ldxa [0x50]%asi, %r14 !Running_rw | |
2431 | wait_for_ibp_80_18: | |
2432 | ldxa [0x58]%asi, %r17 !Running_status | |
2433 | cmp %r14, %r17 | |
2434 | bne,a %xcc, wait_for_ibp_80_18 | |
2435 | ldxa [0x50]%asi, %r14 !Running_rw | |
2436 | ibp_doit80_18: | |
2437 | best_set_reg(0x0000004032c000e5,%r19, %r20) | |
2438 | stxa %r20, [%r18]0x42 | |
2439 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
2440 | st %g0, [%r23] !clear lock | |
2441 | wr %r0, %r12, %asi !restore %asi | |
2442 | .word 0xd0bfc031 ! 33: STDA_R stda %r8, [%r31 + %r17] 0x01 | |
2443 | .word 0xd127c000 ! 34: STF_R st %f8, [%r0, %r31] | |
2444 | .word 0xd0c7e148 ! 35: LDSWA_I ldswa [%r31, + 0x0148] %asi, %r8 | |
2445 | ibp_80_19: | |
2446 | nop | |
2447 | ta T_CHANGE_HPRIV | |
2448 | mov 8, %r18 | |
2449 | rd %asi, %r12 | |
2450 | wr %r0, 0x41, %asi | |
2451 | set sync_thr_counter4, %r23 | |
2452 | #ifndef SPC | |
2453 | ldxa [%g0]0x63, %r8 | |
2454 | and %r8, 0x38, %r8 ! Core ID | |
2455 | add %r8, %r23, %r23 | |
2456 | #else | |
2457 | mov 0, %r8 | |
2458 | #endif | |
2459 | mov 0x80, %r16 | |
2460 | ibp_startwait80_19: | |
2461 | cas [%r23],%g0,%r16 !lock | |
2462 | brz,a %r16, continue_ibp_80_19 | |
2463 | mov (~0x80&0xf0), %r16 | |
2464 | ld [%r23], %r16 | |
2465 | ibp_wait80_19: | |
2466 | brnz %r16, ibp_wait80_19 | |
2467 | ld [%r23], %r16 | |
2468 | ba ibp_startwait80_19 | |
2469 | mov 0x80, %r16 | |
2470 | continue_ibp_80_19: | |
2471 | sllx %r16, %r8, %r16 !Mask for my core only | |
2472 | ldxa [0x58]%asi, %r17 !Running_status | |
2473 | wait_for_stat_80_19: | |
2474 | ldxa [0x50]%asi, %r13 !Running_rw | |
2475 | cmp %r13, %r17 | |
2476 | bne,a %xcc, wait_for_stat_80_19 | |
2477 | ldxa [0x58]%asi, %r17 !Running_status | |
2478 | stxa %r16, [0x68]%asi !Park (W1C) | |
2479 | ldxa [0x50]%asi, %r14 !Running_rw | |
2480 | wait_for_ibp_80_19: | |
2481 | ldxa [0x58]%asi, %r17 !Running_status | |
2482 | cmp %r14, %r17 | |
2483 | bne,a %xcc, wait_for_ibp_80_19 | |
2484 | ldxa [0x50]%asi, %r14 !Running_rw | |
2485 | ibp_doit80_19: | |
2486 | best_set_reg(0x00000050a5c0e5b7,%r19, %r20) | |
2487 | stxa %r20, [%r18]0x42 | |
2488 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
2489 | st %g0, [%r23] !clear lock | |
2490 | wr %r0, %r12, %asi !restore %asi | |
2491 | .word 0xc32fc008 ! 36: STXFSR_R st-sfr %f1, [%r8, %r31] | |
2492 | splash_cmpr_80_20: | |
2493 | mov 0, %r18 | |
2494 | sllx %r18, 63, %r18 | |
2495 | rd %tick, %r17 | |
2496 | add %r17, 0x70, %r17 | |
2497 | or %r17, %r18, %r17 | |
2498 | .word 0xb3800011 ! 37: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
2499 | .word 0xc19fe1a0 ! 38: LDDFA_I ldda [%r31, 0x01a0], %f0 | |
2500 | nop | |
2501 | ta T_CHANGE_HPRIV | |
2502 | mov 0x80+1, %r10 | |
2503 | set sync_thr_counter5, %r23 | |
2504 | #ifndef SPC | |
2505 | ldxa [%g0]0x63, %o1 | |
2506 | and %o1, 0x38, %o1 | |
2507 | add %o1, %r23, %r23 | |
2508 | sllx %o1, 5, %o3 !(CID*256) | |
2509 | #endif | |
2510 | cas [%r23],%g0,%r10 !lock | |
2511 | brnz %r10, cwq_80_21 | |
2512 | rd %asi, %r12 | |
2513 | wr %g0, 0x40, %asi | |
2514 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
2515 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
2516 | cmp %l1, 1 | |
2517 | bne cwq_80_21 | |
2518 | set CWQ_BASE, %l6 | |
2519 | #ifndef SPC | |
2520 | add %l6, %o3, %l6 | |
2521 | #endif | |
2522 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
2523 | best_set_reg(0x20610080, %l1, %l2) !# Control Word | |
2524 | sllx %l2, 32, %l2 | |
2525 | stx %l2, [%l6 + 0x0] | |
2526 | membar #Sync | |
2527 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
2528 | sub %l2, 0x40, %l2 | |
2529 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
2530 | wr %r12, %g0, %asi | |
2531 | st %g0, [%r23] | |
2532 | cwq_80_21: | |
2533 | ta T_CHANGE_NONHPRIV | |
2534 | .word 0xa7414000 ! 39: RDPC rd %pc, %r19 | |
2535 | .word 0xa5a4c9c1 ! 40: FDIVd fdivd %f50, %f32, %f18 | |
2536 | jmptr_80_23: | |
2537 | nop | |
2538 | best_set_reg(0xe0a00000, %r20, %r27) | |
2539 | .word 0xb7c6c000 ! 41: JMPL_R jmpl %r27 + %r0, %r27 | |
2540 | .word 0x97508000 ! 42: RDPR_TSTATE <illegal instruction> | |
2541 | .word 0xe6dfe098 ! 43: LDXA_I ldxa [%r31, + 0x0098] %asi, %r19 | |
2542 | .word 0xc3ec402a ! 44: PREFETCHA_R prefetcha [%r17, %r10] 0x01, #one_read | |
2543 | .word 0xc369f123 ! 45: PREFETCH_I prefetch [%r7 + 0xfffff123], #one_read | |
2544 | br_longdelay4_80_26: | |
2545 | nop | |
2546 | not %g0, %r12 | |
2547 | jmp %r12 | |
2548 | .word 0x9d902003 ! 46: WRPR_WSTATE_I wrpr %r0, 0x0003, %wstate | |
2549 | setx 0xc5a46be0ed9682c5, %r1, %r28 | |
2550 | stxa %r28, [%g0] 0x73 | |
2551 | intvec_80_27: | |
2552 | .word 0x39400001 ! 47: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2553 | .word 0x87ad0a47 ! 48: FCMPd fcmpd %fcc<n>, %f20, %f38 | |
2554 | .word 0xe677c000 ! 49: STX_R stx %r19, [%r31 + %r0] | |
2555 | intveclr_80_29: | |
2556 | nop | |
2557 | ta T_CHANGE_HPRIV | |
2558 | setx 0x838f3165c7b52503, %r1, %r28 | |
2559 | stxa %r28, [%g0] 0x72 | |
2560 | ta T_CHANGE_NONHPRIV | |
2561 | .word 0x25400001 ! 50: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2562 | mondo_80_30: | |
2563 | nop | |
2564 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2565 | ta T_CHANGE_PRIV | |
2566 | stxa %r9, [%r0+0x3d0] %asi | |
2567 | .word 0x9d90400c ! 51: WRPR_WSTATE_R wrpr %r1, %r12, %wstate | |
2568 | .word 0xe63fe1db ! 52: STD_I std %r19, [%r31 + 0x01db] | |
2569 | .word 0xa781281f ! 53: WR_GRAPHICS_STATUS_REG_I wr %r4, 0x081f, %- | |
2570 | .word 0xe71fc000 ! 54: LDDF_R ldd [%r31, %r0], %f19 | |
2571 | .word 0x36800001 ! 1: BGE bge,a <label_0x1> | |
2572 | .word 0x8d90305d ! 55: WRPR_PSTATE_I wrpr %r0, 0x105d, %pstate | |
2573 | splash_tba_80_32: | |
2574 | nop | |
2575 | ta T_CHANGE_PRIV | |
2576 | set 0x120000, %r12 | |
2577 | .word 0x8b90000c ! 56: WRPR_TBA_R wrpr %r0, %r12, %tba | |
2578 | .word 0xa9b0c486 ! 57: FCMPLE32 fcmple32 %d34, %d6, %r20 | |
2579 | splash_tick_80_34: | |
2580 | nop | |
2581 | ta T_CHANGE_HPRIV | |
2582 | best_set_reg(0x5ca48d7c08c164dc, %r16, %r17) | |
2583 | .word 0x89800011 ! 58: WRTICK_R wr %r0, %r17, %tick | |
2584 | ibp_80_35: | |
2585 | nop | |
2586 | ta T_CHANGE_HPRIV | |
2587 | mov 8, %r18 | |
2588 | rd %asi, %r12 | |
2589 | wr %r0, 0x41, %asi | |
2590 | set sync_thr_counter4, %r23 | |
2591 | #ifndef SPC | |
2592 | ldxa [%g0]0x63, %r8 | |
2593 | and %r8, 0x38, %r8 ! Core ID | |
2594 | add %r8, %r23, %r23 | |
2595 | #else | |
2596 | mov 0, %r8 | |
2597 | #endif | |
2598 | mov 0x80, %r16 | |
2599 | ibp_startwait80_35: | |
2600 | cas [%r23],%g0,%r16 !lock | |
2601 | brz,a %r16, continue_ibp_80_35 | |
2602 | mov (~0x80&0xf0), %r16 | |
2603 | ld [%r23], %r16 | |
2604 | ibp_wait80_35: | |
2605 | brnz %r16, ibp_wait80_35 | |
2606 | ld [%r23], %r16 | |
2607 | ba ibp_startwait80_35 | |
2608 | mov 0x80, %r16 | |
2609 | continue_ibp_80_35: | |
2610 | sllx %r16, %r8, %r16 !Mask for my core only | |
2611 | ldxa [0x58]%asi, %r17 !Running_status | |
2612 | wait_for_stat_80_35: | |
2613 | ldxa [0x50]%asi, %r13 !Running_rw | |
2614 | cmp %r13, %r17 | |
2615 | bne,a %xcc, wait_for_stat_80_35 | |
2616 | ldxa [0x58]%asi, %r17 !Running_status | |
2617 | stxa %r16, [0x68]%asi !Park (W1C) | |
2618 | ldxa [0x50]%asi, %r14 !Running_rw | |
2619 | wait_for_ibp_80_35: | |
2620 | ldxa [0x58]%asi, %r17 !Running_status | |
2621 | cmp %r14, %r17 | |
2622 | bne,a %xcc, wait_for_ibp_80_35 | |
2623 | ldxa [0x50]%asi, %r14 !Running_rw | |
2624 | ibp_doit80_35: | |
2625 | best_set_reg(0x00000050a4e5b7c7,%r19, %r20) | |
2626 | stxa %r20, [%r18]0x42 | |
2627 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
2628 | st %g0, [%r23] !clear lock | |
2629 | wr %r0, %r12, %asi !restore %asi | |
2630 | .word 0xe8bfc030 ! 59: STDA_R stda %r20, [%r31 + %r16] 0x01 | |
2631 | .word 0xe8cfe100 ! 60: LDSBA_I ldsba [%r31, + 0x0100] %asi, %r20 | |
2632 | .word 0x91a489d2 ! 61: FDIVd fdivd %f18, %f18, %f8 | |
2633 | ceter_80_37: | |
2634 | nop | |
2635 | ta T_CHANGE_HPRIV | |
2636 | mov 7, %r17 | |
2637 | sllx %r17, 60, %r17 | |
2638 | mov 0x18, %r16 | |
2639 | stxa %r17, [%r16]0x4c | |
2640 | ta T_CHANGE_NONHPRIV | |
2641 | .word 0xa9410000 ! 62: RDTICK rd %tick, %r20 | |
2642 | .word 0xd31fe020 ! 63: LDDF_I ldd [%r31, 0x0020], %f9 | |
2643 | mondo_80_39: | |
2644 | nop | |
2645 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2646 | stxa %r20, [%r0+0x3d8] %asi | |
2647 | .word 0x9d924013 ! 64: WRPR_WSTATE_R wrpr %r9, %r19, %wstate | |
2648 | .word 0xc36fe1ce ! 65: PREFETCH_I prefetch [%r31 + 0x01ce], #one_read | |
2649 | fpinit_80_41: | |
2650 | nop | |
2651 | setx fp_data_quads, %r19, %r20 | |
2652 | ldd [%r20], %f0 | |
2653 | ldd [%r20+8], %f4 | |
2654 | ld [%r20+16], %fsr | |
2655 | ld [%r20+24], %r19 | |
2656 | wr %r19, %g0, %gsr | |
2657 | .word 0x87a80a44 ! 66: FCMPd fcmpd %fcc<n>, %f0, %f4 | |
2658 | nop | |
2659 | ta T_CHANGE_HPRIV ! macro | |
2660 | donret_80_42: | |
2661 | rd %pc, %r12 | |
2662 | add %r12, (donretarg_80_42-donret_80_42+4), %r12 | |
2663 | add %r12, 0x4, %r11 ! seq tnpc | |
2664 | wrpr %g0, 0x1, %tl | |
2665 | wrpr %g0, %r12, %tpc | |
2666 | wrpr %g0, %r11, %tnpc | |
2667 | set (0x00f9ec00 | (0x58 << 24)), %r13 | |
2668 | and %r12, 0xfff, %r14 | |
2669 | sllx %r14, 30, %r14 | |
2670 | or %r13, %r14, %r20 | |
2671 | wrpr %r20, %g0, %tstate | |
2672 | wrhpr %g0, 0xf4c, %htstate | |
2673 | ta T_CHANGE_NONHPRIV ! rand=1 (80) | |
2674 | retry | |
2675 | donretarg_80_42: | |
2676 | .word 0xd26fe031 ! 67: LDSTUB_I ldstub %r9, [%r31 + 0x0031] | |
2677 | ibp_80_43: | |
2678 | nop | |
2679 | ta T_CHANGE_HPRIV | |
2680 | mov 8, %r18 | |
2681 | rd %asi, %r12 | |
2682 | wr %r0, 0x41, %asi | |
2683 | set sync_thr_counter4, %r23 | |
2684 | #ifndef SPC | |
2685 | ldxa [%g0]0x63, %r8 | |
2686 | and %r8, 0x38, %r8 ! Core ID | |
2687 | add %r8, %r23, %r23 | |
2688 | #else | |
2689 | mov 0, %r8 | |
2690 | #endif | |
2691 | mov 0x80, %r16 | |
2692 | ibp_startwait80_43: | |
2693 | cas [%r23],%g0,%r16 !lock | |
2694 | brz,a %r16, continue_ibp_80_43 | |
2695 | mov (~0x80&0xf0), %r16 | |
2696 | ld [%r23], %r16 | |
2697 | ibp_wait80_43: | |
2698 | brnz %r16, ibp_wait80_43 | |
2699 | ld [%r23], %r16 | |
2700 | ba ibp_startwait80_43 | |
2701 | mov 0x80, %r16 | |
2702 | continue_ibp_80_43: | |
2703 | sllx %r16, %r8, %r16 !Mask for my core only | |
2704 | ldxa [0x58]%asi, %r17 !Running_status | |
2705 | wait_for_stat_80_43: | |
2706 | ldxa [0x50]%asi, %r13 !Running_rw | |
2707 | cmp %r13, %r17 | |
2708 | bne,a %xcc, wait_for_stat_80_43 | |
2709 | ldxa [0x58]%asi, %r17 !Running_status | |
2710 | stxa %r16, [0x68]%asi !Park (W1C) | |
2711 | ldxa [0x50]%asi, %r14 !Running_rw | |
2712 | wait_for_ibp_80_43: | |
2713 | ldxa [0x58]%asi, %r17 !Running_status | |
2714 | cmp %r14, %r17 | |
2715 | bne,a %xcc, wait_for_ibp_80_43 | |
2716 | ldxa [0x50]%asi, %r14 !Running_rw | |
2717 | ibp_doit80_43: | |
2718 | best_set_reg(0x00000040acf7c7aa,%r19, %r20) | |
2719 | stxa %r20, [%r18]0x42 | |
2720 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
2721 | st %g0, [%r23] !clear lock | |
2722 | wr %r0, %r12, %asi !restore %asi | |
2723 | .word 0xa7a489b1 ! 68: FDIVs fdivs %f18, %f17, %f19 | |
2724 | splash_tba_80_44: | |
2725 | nop | |
2726 | ta T_CHANGE_PRIV | |
2727 | set 0x120000, %r12 | |
2728 | .word 0x8b90000c ! 69: WRPR_TBA_R wrpr %r0, %r12, %tba | |
2729 | jmptr_80_45: | |
2730 | nop | |
2731 | best_set_reg(0xe0a00000, %r20, %r27) | |
2732 | .word 0xb7c6c000 ! 70: JMPL_R jmpl %r27 + %r0, %r27 | |
2733 | .word 0xe6dfe1e8 ! 71: LDXA_I ldxa [%r31, + 0x01e8] %asi, %r19 | |
2734 | .word 0xe737e0bc ! 72: STQF_I - %f19, [0x00bc, %r31] | |
2735 | nop | |
2736 | mov 0x80, %g3 | |
2737 | stxa %g3, [%g3] 0x57 | |
2738 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
2739 | .word 0xe65fc000 ! 73: LDX_R ldx [%r31 + %r0], %r19 | |
2740 | set 0x2f12, %l3 | |
2741 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT | |
2742 | .word 0x95b507c5 ! 74: PDIST pdistn %d20, %d36, %d10 | |
2743 | .word 0xd22fe160 ! 75: STB_I stb %r9, [%r31 + 0x0160] | |
2744 | nop | |
2745 | mov 0x80, %g3 | |
2746 | stxa %g3, [%g3] 0x57 | |
2747 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 | |
2748 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
2749 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
2750 | .word 0xd25fc000 ! 76: LDX_R ldx [%r31 + %r0], %r9 | |
2751 | cmp_80_46: | |
2752 | nop | |
2753 | ta T_CHANGE_HPRIV | |
2754 | rd %asi, %r12 | |
2755 | wr %r0, 0x41, %asi | |
2756 | set sync_thr_counter4, %r23 | |
2757 | #ifndef SPC | |
2758 | ldxa [%g0]0x63, %r8 | |
2759 | and %r8, 0x38, %r8 ! Core ID | |
2760 | add %r8, %r23, %r23 | |
2761 | mov 0xff, %r9 | |
2762 | xor %r9, 0x80, %r9 | |
2763 | sllx %r9, %r8, %r9 ! My core mask | |
2764 | #else | |
2765 | mov 0, %r8 | |
2766 | mov 0xff, %r9 | |
2767 | xor %r9, 0x80, %r9 ! My core mask | |
2768 | #endif | |
2769 | mov 0x80, %r10 | |
2770 | cmp_startwait80_46: | |
2771 | cas [%r23],%g0,%r10 !lock | |
2772 | brz,a %r10, continue_cmp_80_46 | |
2773 | ldxa [0x50]%asi, %r13 !Running_rw | |
2774 | ld [%r23], %r10 | |
2775 | cmp_wait80_46: | |
2776 | brnz,a %r10, cmp_wait80_46 | |
2777 | ld [%r23], %r10 | |
2778 | ba cmp_startwait80_46 | |
2779 | mov 0x80, %r10 | |
2780 | continue_cmp_80_46: | |
2781 | ldxa [0x58]%asi, %r14 !Running_status | |
2782 | xnor %r14, %r13, %r14 !Bits equal | |
2783 | brz,a %r8, cmp_multi_core_80_46 | |
2784 | mov 0x62, %r17 | |
2785 | best_set_reg(0x4232431ecbb23edc, %r16, %r17) | |
2786 | cmp_multi_core_80_46: | |
2787 | and %r14, %r17, %r14 !Apply set/clear mask to bits equal | |
2788 | and %r14, %r9, %r14 !Apply core-mask | |
2789 | stxa %r14, [0x60]%asi | |
2790 | st %g0, [%r23] !clear lock | |
2791 | wr %g0, %r12, %asi | |
2792 | .word 0x91944014 ! 77: WRPR_PIL_R wrpr %r17, %r20, %pil | |
2793 | .word 0xd297c032 ! 78: LDUHA_R lduha [%r31, %r18] 0x01, %r9 | |
2794 | .word 0x83d020b5 ! 79: Tcc_I te icc_or_xcc, %r0 + 181 | |
2795 | splash_tick_80_48: | |
2796 | nop | |
2797 | ta T_CHANGE_HPRIV | |
2798 | best_set_reg(0x9a622a9fd7397fad, %r16, %r17) | |
2799 | .word 0x89800011 ! 80: WRTICK_R wr %r0, %r17, %tick | |
2800 | splash_tba_80_49: | |
2801 | nop | |
2802 | ta T_CHANGE_PRIV | |
2803 | setx 0x00000000003a0000, %r11, %r12 | |
2804 | .word 0x8b90000c ! 81: WRPR_TBA_R wrpr %r0, %r12, %tba | |
2805 | intveclr_80_50: | |
2806 | nop | |
2807 | ta T_CHANGE_HPRIV | |
2808 | setx 0x33e31affa379bd8a, %r1, %r28 | |
2809 | stxa %r28, [%g0] 0x72 | |
2810 | .word 0x25400001 ! 82: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
2811 | nop | |
2812 | mov 0x80, %g3 | |
2813 | stxa %g3, [%g3] 0x5f | |
2814 | .word 0xd25fc000 ! 83: LDX_R ldx [%r31 + %r0], %r9 | |
2815 | .word 0xd337e00a ! 84: STQF_I - %f9, [0x000a, %r31] | |
2816 | memptr_80_51: | |
2817 | set user_data_start, %r31 | |
2818 | .word 0x8580f41c ! 85: WRCCR_I wr %r3, 0x141c, %ccr | |
2819 | invalw | |
2820 | mov 0xb3, %r30 | |
2821 | .word 0x91d0001e ! 86: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
2822 | .word 0xd327c000 ! 87: STF_R st %f9, [%r0, %r31] | |
2823 | jmptr_80_52: | |
2824 | nop | |
2825 | best_set_reg(0xe0a00000, %r20, %r27) | |
2826 | .word 0xb7c6c000 ! 88: JMPL_R jmpl %r27 + %r0, %r27 | |
2827 | setx 0x3fd1d7940d24a498, %r1, %r28 | |
2828 | stxa %r28, [%g0] 0x73 | |
2829 | intvec_80_53: | |
2830 | .word 0x39400001 ! 89: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
2831 | jmptr_80_54: | |
2832 | nop | |
2833 | best_set_reg(0xe0a00000, %r20, %r27) | |
2834 | .word 0xb7c6c000 ! 90: JMPL_R jmpl %r27 + %r0, %r27 | |
2835 | pmu_80_55: | |
2836 | nop | |
2837 | setx 0xfffffffffffff3e1, %g1, %g7 | |
2838 | .word 0xa3800007 ! 91: WR_PERF_COUNTER_R wr %r0, %r7, %- | |
2839 | .word 0xd2800c60 ! 92: LDUWA_R lduwa [%r0, %r0] 0x63, %r9 | |
2840 | nop | |
2841 | ta T_CHANGE_HPRIV | |
2842 | mov 0x80+1, %r10 | |
2843 | set sync_thr_counter5, %r23 | |
2844 | #ifndef SPC | |
2845 | ldxa [%g0]0x63, %o1 | |
2846 | and %o1, 0x38, %o1 | |
2847 | add %o1, %r23, %r23 | |
2848 | sllx %o1, 5, %o3 !(CID*256) | |
2849 | #endif | |
2850 | cas [%r23],%g0,%r10 !lock | |
2851 | brnz %r10, cwq_80_56 | |
2852 | rd %asi, %r12 | |
2853 | wr %g0, 0x40, %asi | |
2854 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
2855 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
2856 | cmp %l1, 1 | |
2857 | bne cwq_80_56 | |
2858 | set CWQ_BASE, %l6 | |
2859 | #ifndef SPC | |
2860 | add %l6, %o3, %l6 | |
2861 | #endif | |
2862 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
2863 | best_set_reg(0x206100b0, %l1, %l2) !# Control Word | |
2864 | sllx %l2, 32, %l2 | |
2865 | stx %l2, [%l6 + 0x0] | |
2866 | membar #Sync | |
2867 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
2868 | sub %l2, 0x40, %l2 | |
2869 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
2870 | wr %r12, %g0, %asi | |
2871 | st %g0, [%r23] | |
2872 | cwq_80_56: | |
2873 | ta T_CHANGE_NONHPRIV | |
2874 | .word 0xa7414000 ! 93: RDPC rd %pc, %r19 | |
2875 | brcommon3_80_57: | |
2876 | nop | |
2877 | setx common_target, %r12, %r27 | |
2878 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
2879 | ba,a .+12 | |
2880 | .word 0xe06fe0f0 ! 1: LDSTUB_I ldstub %r16, [%r31 + 0x00f0] | |
2881 | ba,a .+8 | |
2882 | jmpl %r27+0, %r27 | |
2883 | .word 0xe1e7e010 ! 94: CASA_R casa [%r31] %asi, %r16, %r16 | |
2884 | splash_lsu_80_58: | |
2885 | nop | |
2886 | ta T_CHANGE_HPRIV | |
2887 | set 0x68a958a8, %r2 | |
2888 | mov 0x3, %r1 | |
2889 | sllx %r1, 32, %r1 | |
2890 | or %r1, %r2, %r2 | |
2891 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
2892 | ta T_CHANGE_NONHPRIV | |
2893 | .word 0x3d400001 ! 95: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
2894 | mondo_80_59: | |
2895 | nop | |
2896 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
2897 | ta T_CHANGE_PRIV | |
2898 | stxa %r8, [%r0+0x3e0] %asi | |
2899 | .word 0x9d90c012 ! 96: WRPR_WSTATE_R wrpr %r3, %r18, %wstate | |
2900 | ibp_80_60: | |
2901 | nop | |
2902 | ta T_CHANGE_HPRIV | |
2903 | mov 8, %r18 | |
2904 | rd %asi, %r12 | |
2905 | wr %r0, 0x41, %asi | |
2906 | set sync_thr_counter4, %r23 | |
2907 | #ifndef SPC | |
2908 | ldxa [%g0]0x63, %r8 | |
2909 | and %r8, 0x38, %r8 ! Core ID | |
2910 | add %r8, %r23, %r23 | |
2911 | #else | |
2912 | mov 0, %r8 | |
2913 | #endif | |
2914 | mov 0x80, %r16 | |
2915 | ibp_startwait80_60: | |
2916 | cas [%r23],%g0,%r16 !lock | |
2917 | brz,a %r16, continue_ibp_80_60 | |
2918 | mov (~0x80&0xf0), %r16 | |
2919 | ld [%r23], %r16 | |
2920 | ibp_wait80_60: | |
2921 | brnz %r16, ibp_wait80_60 | |
2922 | ld [%r23], %r16 | |
2923 | ba ibp_startwait80_60 | |
2924 | mov 0x80, %r16 | |
2925 | continue_ibp_80_60: | |
2926 | sllx %r16, %r8, %r16 !Mask for my core only | |
2927 | ldxa [0x58]%asi, %r17 !Running_status | |
2928 | wait_for_stat_80_60: | |
2929 | ldxa [0x50]%asi, %r13 !Running_rw | |
2930 | cmp %r13, %r17 | |
2931 | bne,a %xcc, wait_for_stat_80_60 | |
2932 | ldxa [0x58]%asi, %r17 !Running_status | |
2933 | stxa %r16, [0x68]%asi !Park (W1C) | |
2934 | ldxa [0x50]%asi, %r14 !Running_rw | |
2935 | wait_for_ibp_80_60: | |
2936 | ldxa [0x58]%asi, %r17 !Running_status | |
2937 | cmp %r14, %r17 | |
2938 | bne,a %xcc, wait_for_ibp_80_60 | |
2939 | ldxa [0x50]%asi, %r14 !Running_rw | |
2940 | ibp_doit80_60: | |
2941 | best_set_reg(0x000000401dc7aa0f,%r19, %r20) | |
2942 | stxa %r20, [%r18]0x42 | |
2943 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
2944 | st %g0, [%r23] !clear lock | |
2945 | wr %r0, %r12, %asi !restore %asi | |
2946 | ta T_CHANGE_NONHPRIV | |
2947 | .word 0xe19fe0a0 ! 97: LDDFA_I ldda [%r31, 0x00a0], %f16 | |
2948 | .word 0xc19fde00 ! 98: LDDFA_R ldda [%r31, %r0], %f0 | |
2949 | nop | |
2950 | ta T_CHANGE_HPRIV | |
2951 | mov 0x80+1, %r10 | |
2952 | set sync_thr_counter5, %r23 | |
2953 | #ifndef SPC | |
2954 | ldxa [%g0]0x63, %o1 | |
2955 | and %o1, 0x38, %o1 | |
2956 | add %o1, %r23, %r23 | |
2957 | sllx %o1, 5, %o3 !(CID*256) | |
2958 | #endif | |
2959 | cas [%r23],%g0,%r10 !lock | |
2960 | brnz %r10, cwq_80_61 | |
2961 | rd %asi, %r12 | |
2962 | wr %g0, 0x40, %asi | |
2963 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
2964 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
2965 | cmp %l1, 1 | |
2966 | bne cwq_80_61 | |
2967 | set CWQ_BASE, %l6 | |
2968 | #ifndef SPC | |
2969 | add %l6, %o3, %l6 | |
2970 | #endif | |
2971 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
2972 | best_set_reg(0x206100f0, %l1, %l2) !# Control Word | |
2973 | sllx %l2, 32, %l2 | |
2974 | stx %l2, [%l6 + 0x0] | |
2975 | membar #Sync | |
2976 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
2977 | sub %l2, 0x40, %l2 | |
2978 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
2979 | wr %r12, %g0, %asi | |
2980 | st %g0, [%r23] | |
2981 | cwq_80_61: | |
2982 | ta T_CHANGE_NONHPRIV | |
2983 | .word 0x93414000 ! 99: RDPC rd %pc, %r9 | |
2984 | .word 0xdb37e007 ! 100: STQF_I - %f13, [0x0007, %r31] | |
2985 | .word 0xc3ec4031 ! 101: PREFETCHA_R prefetcha [%r17, %r17] 0x01, #one_read | |
2986 | splash_tick_80_63: | |
2987 | nop | |
2988 | ta T_CHANGE_HPRIV | |
2989 | best_set_reg(0x89ce993dd4e0bdba, %r16, %r17) | |
2990 | .word 0x89800011 ! 102: WRTICK_R wr %r0, %r17, %tick | |
2991 | cwp_80_64: | |
2992 | set user_data_start, %o7 | |
2993 | .word 0x93902007 ! 103: WRPR_CWP_I wrpr %r0, 0x0007, %cwp | |
2994 | splash_lsu_80_65: | |
2995 | nop | |
2996 | ta T_CHANGE_HPRIV | |
2997 | set 0x561b8935, %r2 | |
2998 | mov 0x2, %r1 | |
2999 | sllx %r1, 32, %r1 | |
3000 | or %r1, %r2, %r2 | |
3001 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3002 | ta T_CHANGE_NONHPRIV | |
3003 | .word 0x3d400001 ! 104: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3004 | splash_lsu_80_66: | |
3005 | nop | |
3006 | ta T_CHANGE_HPRIV | |
3007 | set 0xbb662c67, %r2 | |
3008 | mov 0x6, %r1 | |
3009 | sllx %r1, 32, %r1 | |
3010 | or %r1, %r2, %r2 | |
3011 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
3012 | .word 0x3d400001 ! 105: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
3013 | fpinit_80_67: | |
3014 | nop | |
3015 | setx fp_data_quads, %r19, %r20 | |
3016 | ldd [%r20], %f0 | |
3017 | ldd [%r20+8], %f4 | |
3018 | ld [%r20+16], %fsr | |
3019 | ld [%r20+24], %r19 | |
3020 | wr %r19, %g0, %gsr | |
3021 | .word 0x8db00484 ! 106: FCMPLE32 fcmple32 %d0, %d4, %r6 | |
3022 | ibp_80_68: | |
3023 | nop | |
3024 | ta T_CHANGE_HPRIV | |
3025 | mov 8, %r18 | |
3026 | rd %asi, %r12 | |
3027 | wr %r0, 0x41, %asi | |
3028 | set sync_thr_counter4, %r23 | |
3029 | #ifndef SPC | |
3030 | ldxa [%g0]0x63, %r8 | |
3031 | and %r8, 0x38, %r8 ! Core ID | |
3032 | add %r8, %r23, %r23 | |
3033 | #else | |
3034 | mov 0, %r8 | |
3035 | #endif | |
3036 | mov 0x80, %r16 | |
3037 | ibp_startwait80_68: | |
3038 | cas [%r23],%g0,%r16 !lock | |
3039 | brz,a %r16, continue_ibp_80_68 | |
3040 | mov (~0x80&0xf0), %r16 | |
3041 | ld [%r23], %r16 | |
3042 | ibp_wait80_68: | |
3043 | brnz %r16, ibp_wait80_68 | |
3044 | ld [%r23], %r16 | |
3045 | ba ibp_startwait80_68 | |
3046 | mov 0x80, %r16 | |
3047 | continue_ibp_80_68: | |
3048 | sllx %r16, %r8, %r16 !Mask for my core only | |
3049 | ldxa [0x58]%asi, %r17 !Running_status | |
3050 | wait_for_stat_80_68: | |
3051 | ldxa [0x50]%asi, %r13 !Running_rw | |
3052 | cmp %r13, %r17 | |
3053 | bne,a %xcc, wait_for_stat_80_68 | |
3054 | ldxa [0x58]%asi, %r17 !Running_status | |
3055 | stxa %r16, [0x68]%asi !Park (W1C) | |
3056 | ldxa [0x50]%asi, %r14 !Running_rw | |
3057 | wait_for_ibp_80_68: | |
3058 | ldxa [0x58]%asi, %r17 !Running_status | |
3059 | cmp %r14, %r17 | |
3060 | bne,a %xcc, wait_for_ibp_80_68 | |
3061 | ldxa [0x50]%asi, %r14 !Running_rw | |
3062 | ibp_doit80_68: | |
3063 | best_set_reg(0x00000040c1ea0f7b,%r19, %r20) | |
3064 | stxa %r20, [%r18]0x42 | |
3065 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
3066 | st %g0, [%r23] !clear lock | |
3067 | wr %r0, %r12, %asi !restore %asi | |
3068 | ta T_CHANGE_NONHPRIV | |
3069 | .word 0x93a489a8 ! 107: FDIVs fdivs %f18, %f8, %f9 | |
3070 | cerer_80_69: | |
3071 | nop | |
3072 | ta T_CHANGE_HPRIV | |
3073 | best_set_reg(0xf5da2eecb26deb75, %r26, %r27) | |
3074 | sethi %hi(0x20008000), %r26 ! Set ITTM/DTTM | |
3075 | sllx %r26, 32, %r26 | |
3076 | or %r26, %r27, %r27 | |
3077 | mov 0x10, %r26 | |
3078 | stxa %r27, [%r26]0x4c | |
3079 | ta T_CHANGE_NONHPRIV | |
3080 | .word 0x8143e011 ! 108: MEMBAR membar #LoadLoad | #Lookaside | |
3081 | intveclr_80_70: | |
3082 | nop | |
3083 | ta T_CHANGE_HPRIV | |
3084 | setx 0xcbaf51f9023ae5c8, %r1, %r28 | |
3085 | stxa %r28, [%g0] 0x72 | |
3086 | .word 0x25400001 ! 109: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3087 | nop | |
3088 | ta T_CHANGE_HPRIV | |
3089 | mov 0x80, %r10 | |
3090 | set sync_thr_counter6, %r23 | |
3091 | #ifndef SPC | |
3092 | ldxa [%g0]0x63, %o1 | |
3093 | and %o1, 0x38, %o1 | |
3094 | add %o1, %r23, %r23 | |
3095 | #endif | |
3096 | cas [%r23],%g0,%r10 !lock | |
3097 | brnz %r10, sma_80_71 | |
3098 | rd %asi, %r12 | |
3099 | wr %g0, 0x40, %asi | |
3100 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 | |
3101 | set 0x000a1fff, %g1 | |
3102 | stxa %g1, [%g0 + 0x80] %asi | |
3103 | wr %r12, %g0, %asi | |
3104 | st %g0, [%r23] | |
3105 | sma_80_71: | |
3106 | ta T_CHANGE_NONHPRIV | |
3107 | .word 0xd7e7e011 ! 110: CASA_R casa [%r31] %asi, %r17, %r11 | |
3108 | .word 0xe1bfe180 ! 111: STDFA_I stda %f16, [0x0180, %r31] | |
3109 | nop | |
3110 | ta T_CHANGE_HPRIV ! macro | |
3111 | donret_80_72: | |
3112 | rd %pc, %r12 | |
3113 | add %r12, (donretarg_80_72-donret_80_72), %r12 | |
3114 | add %r12, 0x8, %r11 ! nonseq tnpc | |
3115 | wrpr %g0, 0x1, %tl | |
3116 | wrpr %g0, %r12, %tpc | |
3117 | wrpr %g0, %r11, %tnpc | |
3118 | set (0x00ba7d00 | (0x83 << 24)), %r13 | |
3119 | and %r12, 0xfff, %r14 | |
3120 | sllx %r14, 30, %r14 | |
3121 | or %r13, %r14, %r20 | |
3122 | wrpr %r20, %g0, %tstate | |
3123 | wrhpr %g0, 0x1455, %htstate | |
3124 | ta T_CHANGE_NONPRIV ! rand=0 (80) | |
3125 | .word 0x35400001 ! 1: FBPUE fbue,a,pn %fcc0, <label_0x1> | |
3126 | retry | |
3127 | donretarg_80_72: | |
3128 | .word 0x95a149c5 ! 112: FDIVd fdivd %f36, %f36, %f10 | |
3129 | ibp_80_73: | |
3130 | nop | |
3131 | ta T_CHANGE_HPRIV | |
3132 | mov 8, %r18 | |
3133 | rd %asi, %r12 | |
3134 | wr %r0, 0x41, %asi | |
3135 | set sync_thr_counter4, %r23 | |
3136 | #ifndef SPC | |
3137 | ldxa [%g0]0x63, %r8 | |
3138 | and %r8, 0x38, %r8 ! Core ID | |
3139 | add %r8, %r23, %r23 | |
3140 | #else | |
3141 | mov 0, %r8 | |
3142 | #endif | |
3143 | mov 0x80, %r16 | |
3144 | ibp_startwait80_73: | |
3145 | cas [%r23],%g0,%r16 !lock | |
3146 | brz,a %r16, continue_ibp_80_73 | |
3147 | mov (~0x80&0xf0), %r16 | |
3148 | ld [%r23], %r16 | |
3149 | ibp_wait80_73: | |
3150 | brnz %r16, ibp_wait80_73 | |
3151 | ld [%r23], %r16 | |
3152 | ba ibp_startwait80_73 | |
3153 | mov 0x80, %r16 | |
3154 | continue_ibp_80_73: | |
3155 | sllx %r16, %r8, %r16 !Mask for my core only | |
3156 | ldxa [0x58]%asi, %r17 !Running_status | |
3157 | wait_for_stat_80_73: | |
3158 | ldxa [0x50]%asi, %r13 !Running_rw | |
3159 | cmp %r13, %r17 | |
3160 | bne,a %xcc, wait_for_stat_80_73 | |
3161 | ldxa [0x58]%asi, %r17 !Running_status | |
3162 | stxa %r16, [0x68]%asi !Park (W1C) | |
3163 | ldxa [0x50]%asi, %r14 !Running_rw | |
3164 | wait_for_ibp_80_73: | |
3165 | ldxa [0x58]%asi, %r17 !Running_status | |
3166 | cmp %r14, %r17 | |
3167 | bne,a %xcc, wait_for_ibp_80_73 | |
3168 | ldxa [0x50]%asi, %r14 !Running_rw | |
3169 | ibp_doit80_73: | |
3170 | best_set_reg(0x0000004083cf7b7e,%r19, %r20) | |
3171 | stxa %r20, [%r18]0x42 | |
3172 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
3173 | st %g0, [%r23] !clear lock | |
3174 | wr %r0, %r12, %asi !restore %asi | |
3175 | .word 0xd297c033 ! 113: LDUHA_R lduha [%r31, %r19] 0x01, %r9 | |
3176 | .word 0xe1bfdc00 ! 114: STDFA_R stda %f16, [%r0, %r31] | |
3177 | .word 0x8d903103 ! 115: WRPR_PSTATE_I wrpr %r0, 0x1103, %pstate | |
3178 | .word 0x87802010 ! 116: WRASI_I wr %r0, 0x0010, %asi | |
3179 | #if (defined SPC || defined CMP1) | |
3180 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_76) + 0, 16, 16)) -> intp(6,0,9) | |
3181 | #else | |
3182 | setx 0x5c4b5afdde9a152e, %r1, %r28 | |
3183 | stxa %r28, [%g0] 0x73 | |
3184 | #endif | |
3185 | intvec_80_76: | |
3186 | .word 0x39400001 ! 117: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3187 | ibp_80_77: | |
3188 | nop | |
3189 | ta T_CHANGE_HPRIV | |
3190 | mov 8, %r18 | |
3191 | rd %asi, %r12 | |
3192 | wr %r0, 0x41, %asi | |
3193 | set sync_thr_counter4, %r23 | |
3194 | #ifndef SPC | |
3195 | ldxa [%g0]0x63, %r8 | |
3196 | and %r8, 0x38, %r8 ! Core ID | |
3197 | add %r8, %r23, %r23 | |
3198 | #else | |
3199 | mov 0, %r8 | |
3200 | #endif | |
3201 | mov 0x80, %r16 | |
3202 | ibp_startwait80_77: | |
3203 | cas [%r23],%g0,%r16 !lock | |
3204 | brz,a %r16, continue_ibp_80_77 | |
3205 | mov (~0x80&0xf0), %r16 | |
3206 | ld [%r23], %r16 | |
3207 | ibp_wait80_77: | |
3208 | brnz %r16, ibp_wait80_77 | |
3209 | ld [%r23], %r16 | |
3210 | ba ibp_startwait80_77 | |
3211 | mov 0x80, %r16 | |
3212 | continue_ibp_80_77: | |
3213 | sllx %r16, %r8, %r16 !Mask for my core only | |
3214 | ldxa [0x58]%asi, %r17 !Running_status | |
3215 | wait_for_stat_80_77: | |
3216 | ldxa [0x50]%asi, %r13 !Running_rw | |
3217 | cmp %r13, %r17 | |
3218 | bne,a %xcc, wait_for_stat_80_77 | |
3219 | ldxa [0x58]%asi, %r17 !Running_status | |
3220 | stxa %r16, [0x68]%asi !Park (W1C) | |
3221 | ldxa [0x50]%asi, %r14 !Running_rw | |
3222 | wait_for_ibp_80_77: | |
3223 | ldxa [0x58]%asi, %r17 !Running_status | |
3224 | cmp %r14, %r17 | |
3225 | bne,a %xcc, wait_for_ibp_80_77 | |
3226 | ldxa [0x50]%asi, %r14 !Running_rw | |
3227 | ibp_doit80_77: | |
3228 | best_set_reg(0x00000040f0fb7e47,%r19, %r20) | |
3229 | stxa %r20, [%r18]0x42 | |
3230 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
3231 | st %g0, [%r23] !clear lock | |
3232 | wr %r0, %r12, %asi !restore %asi | |
3233 | ta T_CHANGE_NONHPRIV | |
3234 | .word 0xc3eb4022 ! 118: PREFETCHA_R prefetcha [%r13, %r2] 0x01, #one_read | |
3235 | .word 0x83d020b2 ! 119: Tcc_I te icc_or_xcc, %r0 + 178 | |
3236 | mondo_80_78: | |
3237 | nop | |
3238 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3239 | ta T_CHANGE_PRIV | |
3240 | stxa %r17, [%r0+0x3e8] %asi | |
3241 | .word 0x9d918007 ! 120: WRPR_WSTATE_R wrpr %r6, %r7, %wstate | |
3242 | ibp_80_79: | |
3243 | nop | |
3244 | ta T_CHANGE_HPRIV | |
3245 | mov 8, %r18 | |
3246 | rd %asi, %r12 | |
3247 | wr %r0, 0x41, %asi | |
3248 | set sync_thr_counter4, %r23 | |
3249 | #ifndef SPC | |
3250 | ldxa [%g0]0x63, %r8 | |
3251 | and %r8, 0x38, %r8 ! Core ID | |
3252 | add %r8, %r23, %r23 | |
3253 | #else | |
3254 | mov 0, %r8 | |
3255 | #endif | |
3256 | mov 0x80, %r16 | |
3257 | ibp_startwait80_79: | |
3258 | cas [%r23],%g0,%r16 !lock | |
3259 | brz,a %r16, continue_ibp_80_79 | |
3260 | mov (~0x80&0xf0), %r16 | |
3261 | ld [%r23], %r16 | |
3262 | ibp_wait80_79: | |
3263 | brnz %r16, ibp_wait80_79 | |
3264 | ld [%r23], %r16 | |
3265 | ba ibp_startwait80_79 | |
3266 | mov 0x80, %r16 | |
3267 | continue_ibp_80_79: | |
3268 | sllx %r16, %r8, %r16 !Mask for my core only | |
3269 | ldxa [0x58]%asi, %r17 !Running_status | |
3270 | wait_for_stat_80_79: | |
3271 | ldxa [0x50]%asi, %r13 !Running_rw | |
3272 | cmp %r13, %r17 | |
3273 | bne,a %xcc, wait_for_stat_80_79 | |
3274 | ldxa [0x58]%asi, %r17 !Running_status | |
3275 | stxa %r16, [0x68]%asi !Park (W1C) | |
3276 | ldxa [0x50]%asi, %r14 !Running_rw | |
3277 | wait_for_ibp_80_79: | |
3278 | ldxa [0x58]%asi, %r17 !Running_status | |
3279 | cmp %r14, %r17 | |
3280 | bne,a %xcc, wait_for_ibp_80_79 | |
3281 | ldxa [0x50]%asi, %r14 !Running_rw | |
3282 | ibp_doit80_79: | |
3283 | best_set_reg(0x00000040b3fe476c,%r19, %r20) | |
3284 | stxa %r20, [%r18]0x42 | |
3285 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
3286 | st %g0, [%r23] !clear lock | |
3287 | wr %r0, %r12, %asi !restore %asi | |
3288 | .word 0xe19fdf20 ! 121: LDDFA_R ldda [%r31, %r0], %f16 | |
3289 | ibp_80_80: | |
3290 | nop | |
3291 | ta T_CHANGE_HPRIV | |
3292 | mov 8, %r18 | |
3293 | rd %asi, %r12 | |
3294 | wr %r0, 0x41, %asi | |
3295 | set sync_thr_counter4, %r23 | |
3296 | #ifndef SPC | |
3297 | ldxa [%g0]0x63, %r8 | |
3298 | and %r8, 0x38, %r8 ! Core ID | |
3299 | add %r8, %r23, %r23 | |
3300 | #else | |
3301 | mov 0, %r8 | |
3302 | #endif | |
3303 | mov 0x80, %r16 | |
3304 | ibp_startwait80_80: | |
3305 | cas [%r23],%g0,%r16 !lock | |
3306 | brz,a %r16, continue_ibp_80_80 | |
3307 | mov (~0x80&0xf0), %r16 | |
3308 | ld [%r23], %r16 | |
3309 | ibp_wait80_80: | |
3310 | brnz %r16, ibp_wait80_80 | |
3311 | ld [%r23], %r16 | |
3312 | ba ibp_startwait80_80 | |
3313 | mov 0x80, %r16 | |
3314 | continue_ibp_80_80: | |
3315 | sllx %r16, %r8, %r16 !Mask for my core only | |
3316 | ldxa [0x58]%asi, %r17 !Running_status | |
3317 | wait_for_stat_80_80: | |
3318 | ldxa [0x50]%asi, %r13 !Running_rw | |
3319 | cmp %r13, %r17 | |
3320 | bne,a %xcc, wait_for_stat_80_80 | |
3321 | ldxa [0x58]%asi, %r17 !Running_status | |
3322 | stxa %r16, [0x68]%asi !Park (W1C) | |
3323 | ldxa [0x50]%asi, %r14 !Running_rw | |
3324 | wait_for_ibp_80_80: | |
3325 | ldxa [0x58]%asi, %r17 !Running_status | |
3326 | cmp %r14, %r17 | |
3327 | bne,a %xcc, wait_for_ibp_80_80 | |
3328 | ldxa [0x50]%asi, %r14 !Running_rw | |
3329 | ibp_doit80_80: | |
3330 | best_set_reg(0x00000050cbc76cd3,%r19, %r20) | |
3331 | stxa %r20, [%r18]0x42 | |
3332 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
3333 | st %g0, [%r23] !clear lock | |
3334 | wr %r0, %r12, %asi !restore %asi | |
3335 | ta T_CHANGE_NONHPRIV | |
3336 | .word 0xa7b40484 ! 122: FCMPLE32 fcmple32 %d16, %d4, %r19 | |
3337 | .word 0x8d802000 ! 123: WRFPRS_I wr %r0, 0x0000, %fprs | |
3338 | splash_hpstate_80_81: | |
3339 | ta T_CHANGE_NONHPRIV | |
3340 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
3341 | .word 0x819821b4 ! 124: WRHPR_HPSTATE_I wrhpr %r0, 0x01b4, %hpstate | |
3342 | ibp_80_82: | |
3343 | nop | |
3344 | ta T_CHANGE_HPRIV | |
3345 | mov 8, %r18 | |
3346 | rd %asi, %r12 | |
3347 | wr %r0, 0x41, %asi | |
3348 | set sync_thr_counter4, %r23 | |
3349 | #ifndef SPC | |
3350 | ldxa [%g0]0x63, %r8 | |
3351 | and %r8, 0x38, %r8 ! Core ID | |
3352 | add %r8, %r23, %r23 | |
3353 | #else | |
3354 | mov 0, %r8 | |
3355 | #endif | |
3356 | mov 0x80, %r16 | |
3357 | ibp_startwait80_82: | |
3358 | cas [%r23],%g0,%r16 !lock | |
3359 | brz,a %r16, continue_ibp_80_82 | |
3360 | mov (~0x80&0xf0), %r16 | |
3361 | ld [%r23], %r16 | |
3362 | ibp_wait80_82: | |
3363 | brnz %r16, ibp_wait80_82 | |
3364 | ld [%r23], %r16 | |
3365 | ba ibp_startwait80_82 | |
3366 | mov 0x80, %r16 | |
3367 | continue_ibp_80_82: | |
3368 | sllx %r16, %r8, %r16 !Mask for my core only | |
3369 | ldxa [0x58]%asi, %r17 !Running_status | |
3370 | wait_for_stat_80_82: | |
3371 | ldxa [0x50]%asi, %r13 !Running_rw | |
3372 | cmp %r13, %r17 | |
3373 | bne,a %xcc, wait_for_stat_80_82 | |
3374 | ldxa [0x58]%asi, %r17 !Running_status | |
3375 | stxa %r16, [0x68]%asi !Park (W1C) | |
3376 | ldxa [0x50]%asi, %r14 !Running_rw | |
3377 | wait_for_ibp_80_82: | |
3378 | ldxa [0x58]%asi, %r17 !Running_status | |
3379 | cmp %r14, %r17 | |
3380 | bne,a %xcc, wait_for_ibp_80_82 | |
3381 | ldxa [0x50]%asi, %r14 !Running_rw | |
3382 | ibp_doit80_82: | |
3383 | best_set_reg(0x0000005010ecd3f6,%r19, %r20) | |
3384 | stxa %r20, [%r18]0x42 | |
3385 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
3386 | st %g0, [%r23] !clear lock | |
3387 | wr %r0, %r12, %asi !restore %asi | |
3388 | ta T_CHANGE_NONHPRIV | |
3389 | .word 0xd13fc009 ! 125: STDF_R std %f8, [%r9, %r31] | |
3390 | nop | |
3391 | ta T_CHANGE_HPRIV ! macro | |
3392 | donret_80_83: | |
3393 | rd %pc, %r12 | |
3394 | add %r12, (donretarg_80_83-donret_80_83+4), %r12 | |
3395 | add %r12, 0x4, %r11 ! seq tnpc | |
3396 | wrpr %g0, 0x2, %tl | |
3397 | wrpr %g0, %r12, %tpc | |
3398 | wrpr %g0, %r11, %tnpc | |
3399 | set (0x0040a300 | (22 << 24)), %r13 | |
3400 | and %r12, 0xfff, %r14 | |
3401 | sllx %r14, 30, %r14 | |
3402 | or %r13, %r14, %r20 | |
3403 | wrpr %r20, %g0, %tstate | |
3404 | wrhpr %g0, 0x71f, %htstate | |
3405 | ta T_CHANGE_NONHPRIV ! rand=1 (80) | |
3406 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
3407 | done | |
3408 | donretarg_80_83: | |
3409 | .word 0x22800001 ! 126: BE be,a <label_0x1> | |
3410 | .word 0xd11fc008 ! 127: LDDF_R ldd [%r31, %r8], %f8 | |
3411 | nop | |
3412 | mov 0x80, %g3 | |
3413 | stxa %g3, [%g3] 0x57 | |
3414 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
3415 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
3416 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 | |
3417 | .word 0xd05fc000 ! 128: LDX_R ldx [%r31 + %r0], %r8 | |
3418 | .word 0x24800001 ! 129: BLE ble,a <label_0x1> | |
3419 | memptr_80_85: | |
3420 | set 0x60540000, %r31 | |
3421 | .word 0x8581707f ! 130: WRCCR_I wr %r5, 0x107f, %ccr | |
3422 | .word 0x22800001 ! 131: BE be,a <label_0x1> | |
3423 | ibp_80_86: | |
3424 | nop | |
3425 | ta T_CHANGE_HPRIV | |
3426 | mov 8, %r18 | |
3427 | rd %asi, %r12 | |
3428 | wr %r0, 0x41, %asi | |
3429 | set sync_thr_counter4, %r23 | |
3430 | #ifndef SPC | |
3431 | ldxa [%g0]0x63, %r8 | |
3432 | and %r8, 0x38, %r8 ! Core ID | |
3433 | add %r8, %r23, %r23 | |
3434 | #else | |
3435 | mov 0, %r8 | |
3436 | #endif | |
3437 | mov 0x80, %r16 | |
3438 | ibp_startwait80_86: | |
3439 | cas [%r23],%g0,%r16 !lock | |
3440 | brz,a %r16, continue_ibp_80_86 | |
3441 | mov (~0x80&0xf0), %r16 | |
3442 | ld [%r23], %r16 | |
3443 | ibp_wait80_86: | |
3444 | brnz %r16, ibp_wait80_86 | |
3445 | ld [%r23], %r16 | |
3446 | ba ibp_startwait80_86 | |
3447 | mov 0x80, %r16 | |
3448 | continue_ibp_80_86: | |
3449 | sllx %r16, %r8, %r16 !Mask for my core only | |
3450 | ldxa [0x58]%asi, %r17 !Running_status | |
3451 | wait_for_stat_80_86: | |
3452 | ldxa [0x50]%asi, %r13 !Running_rw | |
3453 | cmp %r13, %r17 | |
3454 | bne,a %xcc, wait_for_stat_80_86 | |
3455 | ldxa [0x58]%asi, %r17 !Running_status | |
3456 | stxa %r16, [0x68]%asi !Park (W1C) | |
3457 | ldxa [0x50]%asi, %r14 !Running_rw | |
3458 | wait_for_ibp_80_86: | |
3459 | ldxa [0x58]%asi, %r17 !Running_status | |
3460 | cmp %r14, %r17 | |
3461 | bne,a %xcc, wait_for_ibp_80_86 | |
3462 | ldxa [0x50]%asi, %r14 !Running_rw | |
3463 | ibp_doit80_86: | |
3464 | best_set_reg(0x000000400ad3f62f,%r19, %r20) | |
3465 | stxa %r20, [%r18]0x42 | |
3466 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
3467 | st %g0, [%r23] !clear lock | |
3468 | wr %r0, %r12, %asi !restore %asi | |
3469 | .word 0xe19fdb60 ! 132: LDDFA_R ldda [%r31, %r0], %f16 | |
3470 | cmp_80_87: | |
3471 | nop | |
3472 | ta T_CHANGE_HPRIV | |
3473 | rd %asi, %r12 | |
3474 | wr %r0, 0x41, %asi | |
3475 | set sync_thr_counter4, %r23 | |
3476 | #ifndef SPC | |
3477 | ldxa [%g0]0x63, %r8 | |
3478 | and %r8, 0x38, %r8 ! Core ID | |
3479 | add %r8, %r23, %r23 | |
3480 | mov 0xff, %r9 | |
3481 | xor %r9, 0x80, %r9 | |
3482 | sllx %r9, %r8, %r9 ! My core mask | |
3483 | #else | |
3484 | mov 0, %r8 | |
3485 | mov 0xff, %r9 | |
3486 | xor %r9, 0x80, %r9 ! My core mask | |
3487 | #endif | |
3488 | mov 0x80, %r10 | |
3489 | cmp_startwait80_87: | |
3490 | cas [%r23],%g0,%r10 !lock | |
3491 | brz,a %r10, continue_cmp_80_87 | |
3492 | ldxa [0x50]%asi, %r13 !Running_rw | |
3493 | ld [%r23], %r10 | |
3494 | cmp_wait80_87: | |
3495 | brnz,a %r10, cmp_wait80_87 | |
3496 | ld [%r23], %r10 | |
3497 | ba cmp_startwait80_87 | |
3498 | mov 0x80, %r10 | |
3499 | continue_cmp_80_87: | |
3500 | ldxa [0x58]%asi, %r14 !Running_status | |
3501 | xnor %r14, %r13, %r14 !Bits equal | |
3502 | brz,a %r8, cmp_multi_core_80_87 | |
3503 | mov 57, %r17 | |
3504 | best_set_reg(0x0eabbe140cc308f1, %r16, %r17) | |
3505 | cmp_multi_core_80_87: | |
3506 | and %r14, %r17, %r14 !Apply set/clear mask to bits equal | |
3507 | and %r14, %r9, %r14 !Apply core-mask | |
3508 | stxa %r14, [0x68]%asi | |
3509 | st %g0, [%r23] !clear lock | |
3510 | wr %g0, %r12, %asi | |
3511 | .word 0x91a00171 ! 133: FABSq dis not found | |
3512 | ||
3513 | .word 0xdad7e130 ! 134: LDSHA_I ldsha [%r31, + 0x0130] %asi, %r13 | |
3514 | .word 0x9f80367a ! 135: SIR sir 0x167a | |
3515 | fpinit_80_89: | |
3516 | nop | |
3517 | setx fp_data_quads, %r19, %r20 | |
3518 | ldd [%r20], %f0 | |
3519 | ldd [%r20+8], %f4 | |
3520 | ld [%r20+16], %fsr | |
3521 | ld [%r20+24], %r19 | |
3522 | wr %r19, %g0, %gsr | |
3523 | .word 0x89b00484 ! 136: FCMPLE32 fcmple32 %d0, %d4, %r4 | |
3524 | br_badelay2_80_90: | |
3525 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
3526 | allclean | |
3527 | .word 0xa1b40307 ! 137: ALIGNADDRESS alignaddr %r16, %r7, %r16 | |
3528 | .word 0xe137e192 ! 138: STQF_I - %f16, [0x0192, %r31] | |
3529 | fpinit_80_91: | |
3530 | nop | |
3531 | setx fp_data_quads, %r19, %r20 | |
3532 | ldd [%r20], %f0 | |
3533 | ldd [%r20+8], %f4 | |
3534 | ld [%r20+16], %fsr | |
3535 | ld [%r20+24], %r19 | |
3536 | wr %r19, %g0, %gsr | |
3537 | .word 0x87a80a44 ! 139: FCMPd fcmpd %fcc<n>, %f0, %f4 | |
3538 | .word 0x3c800001 ! 1: BPOS bpos,a <label_0x1> | |
3539 | .word 0x8d903cf5 ! 140: WRPR_PSTATE_I wrpr %r0, 0x1cf5, %pstate | |
3540 | ibp_80_93: | |
3541 | nop | |
3542 | ta T_CHANGE_HPRIV | |
3543 | mov 8, %r18 | |
3544 | rd %asi, %r12 | |
3545 | wr %r0, 0x41, %asi | |
3546 | set sync_thr_counter4, %r23 | |
3547 | #ifndef SPC | |
3548 | ldxa [%g0]0x63, %r8 | |
3549 | and %r8, 0x38, %r8 ! Core ID | |
3550 | add %r8, %r23, %r23 | |
3551 | #else | |
3552 | mov 0, %r8 | |
3553 | #endif | |
3554 | mov 0x80, %r16 | |
3555 | ibp_startwait80_93: | |
3556 | cas [%r23],%g0,%r16 !lock | |
3557 | brz,a %r16, continue_ibp_80_93 | |
3558 | mov (~0x80&0xf0), %r16 | |
3559 | ld [%r23], %r16 | |
3560 | ibp_wait80_93: | |
3561 | brnz %r16, ibp_wait80_93 | |
3562 | ld [%r23], %r16 | |
3563 | ba ibp_startwait80_93 | |
3564 | mov 0x80, %r16 | |
3565 | continue_ibp_80_93: | |
3566 | sllx %r16, %r8, %r16 !Mask for my core only | |
3567 | ldxa [0x58]%asi, %r17 !Running_status | |
3568 | wait_for_stat_80_93: | |
3569 | ldxa [0x50]%asi, %r13 !Running_rw | |
3570 | cmp %r13, %r17 | |
3571 | bne,a %xcc, wait_for_stat_80_93 | |
3572 | ldxa [0x58]%asi, %r17 !Running_status | |
3573 | stxa %r16, [0x68]%asi !Park (W1C) | |
3574 | ldxa [0x50]%asi, %r14 !Running_rw | |
3575 | wait_for_ibp_80_93: | |
3576 | ldxa [0x58]%asi, %r17 !Running_status | |
3577 | cmp %r14, %r17 | |
3578 | bne,a %xcc, wait_for_ibp_80_93 | |
3579 | ldxa [0x50]%asi, %r14 !Running_rw | |
3580 | ibp_doit80_93: | |
3581 | best_set_reg(0x00000040f9f62fdf,%r19, %r20) | |
3582 | stxa %r20, [%r18]0x42 | |
3583 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
3584 | st %g0, [%r23] !clear lock | |
3585 | wr %r0, %r12, %asi !restore %asi | |
3586 | .word 0xa7a449d2 ! 141: FDIVd fdivd %f48, %f18, %f50 | |
3587 | .word 0x95a000cd ! 142: FNEGd fnegd %f44, %f10 | |
3588 | set 0x3eae, %l3 | |
3589 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT | |
3590 | .word 0xa3b4c7d0 ! 143: PDIST pdistn %d50, %d16, %d48 | |
3591 | invalw | |
3592 | mov 0x35, %r30 | |
3593 | .word 0x91d0001e ! 144: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3594 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
3595 | reduce_priv_lvl_80_94: | |
3596 | ta T_CHANGE_NONPRIV ! macro | |
3597 | memptr_80_95: | |
3598 | set 0x60540000, %r31 | |
3599 | .word 0x858161b0 ! 146: WRCCR_I wr %r5, 0x01b0, %ccr | |
3600 | dvapa_80_96: | |
3601 | nop | |
3602 | ta T_CHANGE_HPRIV | |
3603 | mov 0xb56, %r20 | |
3604 | mov 0x4, %r19 | |
3605 | sllx %r20, 23, %r20 | |
3606 | or %r19, %r20, %r19 | |
3607 | stxa %r19, [%g0] ASI_LSU_CONTROL | |
3608 | mov 0x38, %r18 | |
3609 | stxa %r31, [%r18]0x58 | |
3610 | ta T_CHANGE_NONHPRIV | |
3611 | .word 0xe69fe0a0 ! 147: LDDA_I ldda [%r31, + 0x00a0] %asi, %r19 | |
3612 | splash_decr_80_97: | |
3613 | nop | |
3614 | ta T_CHANGE_HPRIV | |
3615 | mov 8, %r1 | |
3616 | stxa %r8, [%r1] 0x45 | |
3617 | .word 0xa7824014 ! 148: WR_GRAPHICS_STATUS_REG_R wr %r9, %r20, %- | |
3618 | .word 0xe637e0d2 ! 149: STH_I sth %r19, [%r31 + 0x00d2] | |
3619 | #if (defined SPC || defined CMP1) | |
3620 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_98) + 56, 16, 16)) -> intp(1,0,15) | |
3621 | #else | |
3622 | setx 0x6e63ba1cd7798e42, %r1, %r28 | |
3623 | stxa %r28, [%g0] 0x73 | |
3624 | #endif | |
3625 | intvec_80_98: | |
3626 | .word 0x39400001 ! 150: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3627 | intveclr_80_99: | |
3628 | nop | |
3629 | ta T_CHANGE_HPRIV | |
3630 | setx 0xe7f26770c09d57a6, %r1, %r28 | |
3631 | stxa %r28, [%g0] 0x72 | |
3632 | ta T_CHANGE_NONHPRIV | |
3633 | .word 0x25400001 ! 151: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3634 | .word 0xe6800b80 ! 152: LDUWA_R lduwa [%r0, %r0] 0x5c, %r19 | |
3635 | .word 0xe62fe0d9 ! 153: STB_I stb %r19, [%r31 + 0x00d9] | |
3636 | mondo_80_100: | |
3637 | nop | |
3638 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
3639 | stxa %r20, [%r0+0x3e8] %asi | |
3640 | .word 0x9d944008 ! 154: WRPR_WSTATE_R wrpr %r17, %r8, %wstate | |
3641 | .word 0xa350c000 ! 155: RDPR_TT rdpr %tt, %r17 | |
3642 | .word 0x3a800001 ! 156: BCC bcc,a <label_0x1> | |
3643 | brcommon2_80_101: | |
3644 | nop | |
3645 | setx common_target, %r12, %r27 | |
3646 | ba,a .+12 | |
3647 | .word 0xd9144008 ! 1: LDQF_R - [%r17, %r8], %f12 | |
3648 | ba,a .+8 | |
3649 | jmpl %r27+0, %r27 | |
3650 | .word 0xc19fe1a0 ! 157: LDDFA_I ldda [%r31, 0x01a0], %f0 | |
3651 | tagged_80_102: | |
3652 | tsubcctv %r18, 0x1e35, %r17 | |
3653 | .word 0xd407e0ec ! 158: LDUW_I lduw [%r31 + 0x00ec], %r10 | |
3654 | splash_cmpr_80_103: | |
3655 | mov 1, %r18 | |
3656 | sllx %r18, 63, %r18 | |
3657 | rd %tick, %r17 | |
3658 | add %r17, 0x70, %r17 | |
3659 | or %r17, %r18, %r17 | |
3660 | .word 0xaf800011 ! 159: WR_TICK_CMPR_REG_R wr %r0, %r17, %- | |
3661 | .word 0xd5e7c033 ! 160: CASA_I casa [%r31] 0x 1, %r19, %r10 | |
3662 | br_longdelay2_80_104: | |
3663 | .word 0x23400001 ! 1: FBPNE fbne,a,pn %fcc0, <label_0x1> | |
3664 | .word 0x95b7c4d4 ! 161: FCMPNE32 fcmpne32 %d62, %d20, %r10 | |
3665 | nop | |
3666 | ta T_CHANGE_HPRIV | |
3667 | mov 0x80+1, %r10 | |
3668 | set sync_thr_counter5, %r23 | |
3669 | #ifndef SPC | |
3670 | ldxa [%g0]0x63, %o1 | |
3671 | and %o1, 0x38, %o1 | |
3672 | add %o1, %r23, %r23 | |
3673 | sllx %o1, 5, %o3 !(CID*256) | |
3674 | #endif | |
3675 | cas [%r23],%g0,%r10 !lock | |
3676 | brnz %r10, cwq_80_105 | |
3677 | rd %asi, %r12 | |
3678 | wr %g0, 0x40, %asi | |
3679 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
3680 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
3681 | cmp %l1, 1 | |
3682 | bne cwq_80_105 | |
3683 | set CWQ_BASE, %l6 | |
3684 | #ifndef SPC | |
3685 | add %l6, %o3, %l6 | |
3686 | #endif | |
3687 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
3688 | best_set_reg(0x206100c0, %l1, %l2) !# Control Word | |
3689 | sllx %l2, 32, %l2 | |
3690 | stx %l2, [%l6 + 0x0] | |
3691 | membar #Sync | |
3692 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
3693 | sub %l2, 0x40, %l2 | |
3694 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
3695 | wr %r12, %g0, %asi | |
3696 | st %g0, [%r23] | |
3697 | cwq_80_105: | |
3698 | ta T_CHANGE_NONHPRIV | |
3699 | .word 0xa9414000 ! 162: RDPC rd %pc, %r20 | |
3700 | splash_hpstate_80_106: | |
3701 | ta T_CHANGE_NONHPRIV | |
3702 | .word 0x28800001 ! 1: BLEU bleu,a <label_0x1> | |
3703 | .word 0x81983eed ! 163: WRHPR_HPSTATE_I wrhpr %r0, 0x1eed, %hpstate | |
3704 | trapasi_80_107: | |
3705 | nop | |
3706 | mov 0x28, %r1 ! (VA for ASI 0x5a) | |
3707 | .word 0xd4d04b40 ! 164: LDSHA_R ldsha [%r1, %r0] 0x5a, %r10 | |
3708 | .word 0xc1bfe1c0 ! 165: STDFA_I stda %f0, [0x01c0, %r31] | |
3709 | splash_hpstate_80_108: | |
3710 | ta T_CHANGE_NONHPRIV | |
3711 | .word 0x8198369e ! 166: WRHPR_HPSTATE_I wrhpr %r0, 0x169e, %hpstate | |
3712 | otherw | |
3713 | mov 0x34, %r30 | |
3714 | .word 0x91d0001e ! 167: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3715 | .word 0x8d802004 ! 168: WRFPRS_I wr %r0, 0x0004, %fprs | |
3716 | .word 0xd43fe178 ! 169: STD_I std %r10, [%r31 + 0x0178] | |
3717 | jmptr_80_109: | |
3718 | nop | |
3719 | best_set_reg(0xe1a00000, %r20, %r27) | |
3720 | .word 0xb7c6c000 ! 170: JMPL_R jmpl %r27 + %r0, %r27 | |
3721 | jmptr_80_110: | |
3722 | nop | |
3723 | best_set_reg(0xe1a00000, %r20, %r27) | |
3724 | .word 0xb7c6c000 ! 171: JMPL_R jmpl %r27 + %r0, %r27 | |
3725 | nop | |
3726 | mov 0x80, %g3 | |
3727 | stxa %g3, [%g3] 0x5f | |
3728 | .word 0xd45fc000 ! 172: LDX_R ldx [%r31 + %r0], %r10 | |
3729 | .word 0xe1bfe0e0 ! 173: STDFA_I stda %f16, [0x00e0, %r31] | |
3730 | .word 0xd51fe080 ! 174: LDDF_I ldd [%r31, 0x0080], %f10 | |
3731 | .word 0xd44fe0e0 ! 175: LDSB_I ldsb [%r31 + 0x00e0], %r10 | |
3732 | cmp_80_112: | |
3733 | nop | |
3734 | ta T_CHANGE_HPRIV | |
3735 | rd %asi, %r12 | |
3736 | wr %r0, 0x41, %asi | |
3737 | set sync_thr_counter4, %r23 | |
3738 | #ifndef SPC | |
3739 | ldxa [%g0]0x63, %r8 | |
3740 | and %r8, 0x38, %r8 ! Core ID | |
3741 | add %r8, %r23, %r23 | |
3742 | mov 0xff, %r9 | |
3743 | xor %r9, 0x80, %r9 | |
3744 | sllx %r9, %r8, %r9 ! My core mask | |
3745 | #else | |
3746 | mov 0, %r8 | |
3747 | mov 0xff, %r9 | |
3748 | xor %r9, 0x80, %r9 ! My core mask | |
3749 | #endif | |
3750 | mov 0x80, %r10 | |
3751 | cmp_startwait80_112: | |
3752 | cas [%r23],%g0,%r10 !lock | |
3753 | brz,a %r10, continue_cmp_80_112 | |
3754 | ldxa [0x50]%asi, %r13 !Running_rw | |
3755 | ld [%r23], %r10 | |
3756 | cmp_wait80_112: | |
3757 | brnz,a %r10, cmp_wait80_112 | |
3758 | ld [%r23], %r10 | |
3759 | ba cmp_startwait80_112 | |
3760 | mov 0x80, %r10 | |
3761 | continue_cmp_80_112: | |
3762 | ldxa [0x58]%asi, %r14 !Running_status | |
3763 | xnor %r14, %r13, %r14 !Bits equal | |
3764 | brz,a %r8, cmp_multi_core_80_112 | |
3765 | mov 0x57, %r17 | |
3766 | best_set_reg(0xef6e0c0effc24af4, %r16, %r17) | |
3767 | cmp_multi_core_80_112: | |
3768 | and %r14, %r17, %r14 !Apply set/clear mask to bits equal | |
3769 | and %r14, %r9, %r14 !Apply core-mask | |
3770 | stxa %r14, [0x60]%asi | |
3771 | st %g0, [%r23] !clear lock | |
3772 | wr %g0, %r12, %asi | |
3773 | ta T_CHANGE_NONHPRIV | |
3774 | .word 0x9193400b ! 176: WRPR_PIL_R wrpr %r13, %r11, %pil | |
3775 | trapasi_80_113: | |
3776 | nop | |
3777 | mov 0x0, %r1 ! (VA for ASI 0x4c) | |
3778 | .word 0xd4d04980 ! 177: LDSHA_R ldsha [%r1, %r0] 0x4c, %r10 | |
3779 | intveclr_80_114: | |
3780 | nop | |
3781 | ta T_CHANGE_HPRIV | |
3782 | setx 0x65020c4bf953a4df, %r1, %r28 | |
3783 | stxa %r28, [%g0] 0x72 | |
3784 | ta T_CHANGE_NONHPRIV | |
3785 | .word 0x25400001 ! 178: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3786 | ibp_80_115: | |
3787 | nop | |
3788 | ta T_CHANGE_HPRIV | |
3789 | mov 8, %r18 | |
3790 | rd %asi, %r12 | |
3791 | wr %r0, 0x41, %asi | |
3792 | set sync_thr_counter4, %r23 | |
3793 | #ifndef SPC | |
3794 | ldxa [%g0]0x63, %r8 | |
3795 | and %r8, 0x38, %r8 ! Core ID | |
3796 | add %r8, %r23, %r23 | |
3797 | #else | |
3798 | mov 0, %r8 | |
3799 | #endif | |
3800 | mov 0x80, %r16 | |
3801 | ibp_startwait80_115: | |
3802 | cas [%r23],%g0,%r16 !lock | |
3803 | brz,a %r16, continue_ibp_80_115 | |
3804 | mov (~0x80&0xf0), %r16 | |
3805 | ld [%r23], %r16 | |
3806 | ibp_wait80_115: | |
3807 | brnz %r16, ibp_wait80_115 | |
3808 | ld [%r23], %r16 | |
3809 | ba ibp_startwait80_115 | |
3810 | mov 0x80, %r16 | |
3811 | continue_ibp_80_115: | |
3812 | sllx %r16, %r8, %r16 !Mask for my core only | |
3813 | ldxa [0x58]%asi, %r17 !Running_status | |
3814 | wait_for_stat_80_115: | |
3815 | ldxa [0x50]%asi, %r13 !Running_rw | |
3816 | cmp %r13, %r17 | |
3817 | bne,a %xcc, wait_for_stat_80_115 | |
3818 | ldxa [0x58]%asi, %r17 !Running_status | |
3819 | stxa %r16, [0x68]%asi !Park (W1C) | |
3820 | ldxa [0x50]%asi, %r14 !Running_rw | |
3821 | wait_for_ibp_80_115: | |
3822 | ldxa [0x58]%asi, %r17 !Running_status | |
3823 | cmp %r14, %r17 | |
3824 | bne,a %xcc, wait_for_ibp_80_115 | |
3825 | ldxa [0x50]%asi, %r14 !Running_rw | |
3826 | ibp_doit80_115: | |
3827 | best_set_reg(0x00000050bbefdf4b,%r19, %r20) | |
3828 | stxa %r20, [%r18]0x42 | |
3829 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
3830 | st %g0, [%r23] !clear lock | |
3831 | wr %r0, %r12, %asi !restore %asi | |
3832 | .word 0xc19fe160 ! 179: LDDFA_I ldda [%r31, 0x0160], %f0 | |
3833 | .word 0xc30fc000 ! 180: LDXFSR_R ld-fsr [%r31, %r0], %f1 | |
3834 | nop | |
3835 | ta T_CHANGE_HPRIV | |
3836 | mov 0x80+1, %r10 | |
3837 | set sync_thr_counter5, %r23 | |
3838 | #ifndef SPC | |
3839 | ldxa [%g0]0x63, %o1 | |
3840 | and %o1, 0x38, %o1 | |
3841 | add %o1, %r23, %r23 | |
3842 | sllx %o1, 5, %o3 !(CID*256) | |
3843 | #endif | |
3844 | cas [%r23],%g0,%r10 !lock | |
3845 | brnz %r10, cwq_80_116 | |
3846 | rd %asi, %r12 | |
3847 | wr %g0, 0x40, %asi | |
3848 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
3849 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
3850 | cmp %l1, 1 | |
3851 | bne cwq_80_116 | |
3852 | set CWQ_BASE, %l6 | |
3853 | #ifndef SPC | |
3854 | add %l6, %o3, %l6 | |
3855 | #endif | |
3856 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
3857 | best_set_reg(0x20610080, %l1, %l2) !# Control Word | |
3858 | sllx %l2, 32, %l2 | |
3859 | stx %l2, [%l6 + 0x0] | |
3860 | membar #Sync | |
3861 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
3862 | sub %l2, 0x40, %l2 | |
3863 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
3864 | wr %r12, %g0, %asi | |
3865 | st %g0, [%r23] | |
3866 | cwq_80_116: | |
3867 | ta T_CHANGE_NONHPRIV | |
3868 | .word 0x99414000 ! 181: RDPC rd %pc, %r12 | |
3869 | splash_cmpr_80_117: | |
3870 | mov 1, %r18 | |
3871 | sllx %r18, 63, %r18 | |
3872 | rd %tick, %r17 | |
3873 | add %r17, 0x100, %r17 | |
3874 | or %r17, %r18, %r17 | |
3875 | ta T_CHANGE_PRIV | |
3876 | .word 0xaf800011 ! 182: WR_TICK_CMPR_REG_R wr %r0, %r17, %- | |
3877 | intveclr_80_118: | |
3878 | nop | |
3879 | ta T_CHANGE_HPRIV | |
3880 | setx 0xd65c149f772f8a9e, %r1, %r28 | |
3881 | stxa %r28, [%g0] 0x72 | |
3882 | .word 0x25400001 ! 183: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3883 | .word 0xe0dfe0e8 ! 184: LDXA_I ldxa [%r31, + 0x00e8] %asi, %r16 | |
3884 | intveclr_80_119: | |
3885 | nop | |
3886 | ta T_CHANGE_HPRIV | |
3887 | setx 0x5321dd69d1452d98, %r1, %r28 | |
3888 | stxa %r28, [%g0] 0x72 | |
3889 | .word 0x25400001 ! 185: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
3890 | #if (defined SPC || defined CMP1) | |
3891 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_120) + 0, 16, 16)) -> intp(4,0,0) | |
3892 | #else | |
3893 | setx 0x594fc42e6e72eaa2, %r1, %r28 | |
3894 | stxa %r28, [%g0] 0x73 | |
3895 | #endif | |
3896 | intvec_80_120: | |
3897 | .word 0x39400001 ! 186: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
3898 | set 0x3af7, %l3 | |
3899 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT | |
3900 | .word 0xa3b447d3 ! 187: PDIST pdistn %d48, %d50, %d48 | |
3901 | otherw | |
3902 | mov 0xb2, %r30 | |
3903 | .word 0x91d0001e ! 188: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
3904 | splash_decr_80_121: | |
3905 | nop | |
3906 | ta T_CHANGE_HPRIV | |
3907 | mov 8, %r1 | |
3908 | stxa %r15, [%r1] 0x45 | |
3909 | .word 0xa7808011 ! 189: WR_GRAPHICS_STATUS_REG_R wr %r2, %r17, %- | |
3910 | .word 0xda97e058 ! 190: LDUHA_I lduha [%r31, + 0x0058] %asi, %r13 | |
3911 | .word 0x879cf1b2 ! 191: WRHPR_HINTP_I wrhpr %r19, 0x11b2, %hintp | |
3912 | .word 0x91d02034 ! 192: Tcc_I ta icc_or_xcc, %r0 + 52 | |
3913 | splash_decr_80_122: | |
3914 | nop | |
3915 | ta T_CHANGE_HPRIV | |
3916 | mov 8, %r1 | |
3917 | stxa %r14, [%r1] 0x45 | |
3918 | .word 0xa780c011 ! 193: WR_GRAPHICS_STATUS_REG_R wr %r3, %r17, %- | |
3919 | dvapa_80_123: | |
3920 | nop | |
3921 | ta T_CHANGE_HPRIV | |
3922 | mov 0xed5, %r20 | |
3923 | mov 0xf, %r19 | |
3924 | sllx %r20, 23, %r20 | |
3925 | or %r19, %r20, %r19 | |
3926 | stxa %r19, [%g0] ASI_LSU_CONTROL | |
3927 | mov 0x38, %r18 | |
3928 | stxa %r31, [%r18]0x58 | |
3929 | ta T_CHANGE_NONHPRIV | |
3930 | .word 0x99702a39 ! 194: POPC_I popc 0x0a39, %r12 | |
3931 | brcommon3_80_124: | |
3932 | nop | |
3933 | setx common_target, %r12, %r27 | |
3934 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
3935 | ba,a .+12 | |
3936 | .word 0xd3e7c02c ! 1: CASA_I casa [%r31] 0x 1, %r12, %r9 | |
3937 | ba,a .+8 | |
3938 | jmpl %r27+0, %r27 | |
3939 | .word 0xd297c029 ! 195: LDUHA_R lduha [%r31, %r9] 0x01, %r9 | |
3940 | .word 0xc30fc000 ! 196: LDXFSR_R ld-fsr [%r31, %r0], %f1 | |
3941 | dvapa_80_125: | |
3942 | nop | |
3943 | ta T_CHANGE_HPRIV | |
3944 | mov 0xaa5, %r20 | |
3945 | mov 0x1c, %r19 | |
3946 | sllx %r20, 23, %r20 | |
3947 | or %r19, %r20, %r19 | |
3948 | stxa %r19, [%g0] ASI_LSU_CONTROL | |
3949 | mov 0x38, %r18 | |
3950 | stxa %r31, [%r18]0x58 | |
3951 | ta T_CHANGE_NONHPRIV | |
3952 | .word 0x91b18492 ! 197: FCMPLE32 fcmple32 %d6, %d18, %r8 | |
3953 | memptr_80_126: | |
3954 | set user_data_start, %r31 | |
3955 | .word 0x8581a6c6 ! 198: WRCCR_I wr %r6, 0x06c6, %ccr | |
3956 | .word 0xc1bfe120 ! 199: STDFA_I stda %f0, [0x0120, %r31] | |
3957 | trapasi_80_128: | |
3958 | nop | |
3959 | mov 0x0, %r1 ! (VA for ASI 0x73) | |
3960 | .word 0xe0884e60 ! 200: LDUBA_R lduba [%r1, %r0] 0x73, %r16 | |
3961 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
3962 | reduce_priv_lvl_80_129: | |
3963 | ta T_CHANGE_NONHPRIV ! macro | |
3964 | cmpenall_80_130: | |
3965 | nop | |
3966 | nop | |
3967 | ta T_CHANGE_HPRIV | |
3968 | rd %asi, %r12 | |
3969 | wr %r0, 0x41, %asi | |
3970 | set sync_thr_counter4, %r23 | |
3971 | #ifndef SPC | |
3972 | ldxa [%g0]0x63, %r8 | |
3973 | and %r8, 0x38, %r8 ! Core ID | |
3974 | add %r8, %r23, %r23 | |
3975 | mov 0xff, %r9 | |
3976 | sllx %r9, %r8, %r9 ! My core mask | |
3977 | #else | |
3978 | mov 0xff, %r9 ! My core mask | |
3979 | #endif | |
3980 | cmpenall_startwait80_130: | |
3981 | mov 0x80, %r10 | |
3982 | cas [%r23],%g0,%r10 !lock | |
3983 | brz,a %r10, continue_cmpenall_80_130 | |
3984 | nop | |
3985 | cmpenall_wait80_130: | |
3986 | ld [%r23], %r10 | |
3987 | brnz %r10, cmpenall_wait80_130 | |
3988 | nop | |
3989 | ba,a cmpenall_startwait80_130 | |
3990 | continue_cmpenall_80_130: | |
3991 | ldxa [0x58]%asi, %r14 !Running_status | |
3992 | wait_for_cmpstat_80_130: | |
3993 | ldxa [0x50]%asi, %r13 !Running_rw | |
3994 | cmp %r13, %r14 | |
3995 | bne,a %xcc, wait_for_cmpstat_80_130 | |
3996 | ldxa [0x58]%asi, %r14 !Running_status | |
3997 | ldxa [0x10]%asi, %r14 !Get enabled threads | |
3998 | and %r14, %r9, %r14 !My core mask | |
3999 | stxa %r14, [0x60]%asi !W1S | |
4000 | ldxa [0x58]%asi, %r16 !Running_status | |
4001 | wait_for_cmpstat2_80_130: | |
4002 | and %r16, %r9, %r16 !My core mask | |
4003 | cmp %r14, %r16 | |
4004 | bne,a %xcc, wait_for_cmpstat2_80_130 | |
4005 | ldxa [0x58]%asi, %r16 !Running_status | |
4006 | st %g0, [%r23] !clear lock | |
4007 | nop | |
4008 | nop | |
4009 | ta T_CHANGE_PRIV | |
4010 | wrpr %g0, %g0, %gl | |
4011 | nop | |
4012 | nop | |
4013 | setx join_lbl_0_0, %g1, %g2 | |
4014 | jmp %g2 | |
4015 | nop | |
4016 | fork_lbl_0_7: | |
4017 | ta T_CHANGE_NONHPRIV | |
4018 | .word 0xe08008a0 ! 1: LDUWA_R lduwa [%r0, %r0] 0x45, %r16 | |
4019 | .word 0xe19fc2c0 ! 2: LDDFA_R ldda [%r31, %r0], %f16 | |
4020 | .word 0xe0800c20 ! 3: LDUWA_R lduwa [%r0, %r0] 0x61, %r16 | |
4021 | .word 0x89800011 ! 4: WRTICK_R wr %r0, %r17, %tick | |
4022 | .word 0x8d802004 ! 5: WRFPRS_I wr %r0, 0x0004, %fprs | |
4023 | .word 0x38800001 ! 1: BGU bgu,a <label_0x1> | |
4024 | .word 0x8d90276d ! 6: WRPR_PSTATE_I wrpr %r0, 0x076d, %pstate | |
4025 | .word 0xe0bfc020 ! 7: STDA_R stda %r16, [%r31 + %r0] 0x01 | |
4026 | #if (defined SPC || defined CMP1) | |
4027 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_2) + 40, 16, 16)) -> intp(5,0,27) | |
4028 | #else | |
4029 | setx 0xf684cb5605a2a8d1, %r1, %r28 | |
4030 | stxa %r28, [%g0] 0x73 | |
4031 | #endif | |
4032 | intvec_40_2: | |
4033 | .word 0x39400001 ! 8: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4034 | .word 0xc32fc000 ! 9: STXFSR_R st-sfr %f1, [%r0, %r31] | |
4035 | splash_lsu_40_3: | |
4036 | nop | |
4037 | ta T_CHANGE_HPRIV | |
4038 | set 0x93c68c65, %r2 | |
4039 | mov 0x3, %r1 | |
4040 | sllx %r1, 32, %r1 | |
4041 | or %r1, %r2, %r2 | |
4042 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4043 | ta T_CHANGE_NONHPRIV | |
4044 | .word 0x3d400001 ! 10: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4045 | .word 0x2a780001 ! 11: BPCS <illegal instruction> | |
4046 | .word 0xa7850011 ! 12: WR_GRAPHICS_STATUS_REG_R wr %r20, %r17, %- | |
4047 | fpinit_40_5: | |
4048 | nop | |
4049 | setx fp_data_quads, %r19, %r20 | |
4050 | ldd [%r20], %f0 | |
4051 | ldd [%r20+8], %f4 | |
4052 | ld [%r20+16], %fsr | |
4053 | ld [%r20+24], %r19 | |
4054 | wr %r19, %g0, %gsr | |
4055 | .word 0x89a009c4 ! 13: FDIVd fdivd %f0, %f4, %f4 | |
4056 | invalw | |
4057 | mov 0x33, %r30 | |
4058 | .word 0x91d0001e ! 14: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
4059 | .word 0x879c000c ! 15: WRHPR_HINTP_R wrhpr %r16, %r12, %hintp | |
4060 | .word 0x95703cae ! 16: POPC_I popc 0x1cae, %r10 | |
4061 | .word 0x8780201c ! 17: WRASI_I wr %r0, 0x001c, %asi | |
4062 | iaw_40_6: | |
4063 | nop | |
4064 | ta T_CHANGE_HPRIV | |
4065 | mov 8, %r18 | |
4066 | rd %asi, %r12 | |
4067 | wr %r0, 0x41, %asi | |
4068 | set sync_thr_counter4, %r23 | |
4069 | #ifndef SPC | |
4070 | ldxa [%g0]0x63, %r8 | |
4071 | and %r8, 0x38, %r8 ! Core ID | |
4072 | add %r8, %r23, %r23 | |
4073 | #else | |
4074 | mov 0, %r8 | |
4075 | #endif | |
4076 | mov 0x40, %r16 | |
4077 | iaw_startwait40_6: | |
4078 | cas [%r23],%g0,%r16 !lock | |
4079 | brz,a %r16, continue_iaw_40_6 | |
4080 | mov (~0x40&0xf0), %r16 | |
4081 | ld [%r23], %r16 | |
4082 | iaw_wait40_6: | |
4083 | brnz %r16, iaw_wait40_6 | |
4084 | ld [%r23], %r16 | |
4085 | ba iaw_startwait40_6 | |
4086 | mov 0x40, %r16 | |
4087 | continue_iaw_40_6: | |
4088 | sllx %r16, %r8, %r16 !Mask for my core only | |
4089 | ldxa [0x58]%asi, %r17 !Running_status | |
4090 | wait_for_stat_40_6: | |
4091 | ldxa [0x50]%asi, %r13 !Running_rw | |
4092 | cmp %r13, %r17 | |
4093 | bne,a %xcc, wait_for_stat_40_6 | |
4094 | ldxa [0x58]%asi, %r17 !Running_status | |
4095 | stxa %r16, [0x68]%asi !Park (W1C) | |
4096 | ldxa [0x50]%asi, %r14 !Running_rw | |
4097 | wait_for_iaw_40_6: | |
4098 | ldxa [0x58]%asi, %r17 !Running_status | |
4099 | cmp %r14, %r17 | |
4100 | bne,a %xcc, wait_for_iaw_40_6 | |
4101 | ldxa [0x50]%asi, %r14 !Running_rw | |
4102 | iaw_doit40_6: | |
4103 | mov 0x38, %r18 | |
4104 | iaw4_40_6: | |
4105 | setx common_target, %r20, %r19 | |
4106 | or %r19, 0x1, %r19 | |
4107 | stxa %r19, [%r18]0x50 | |
4108 | stxa %r16, [0x60] %asi ! Unpark (W1S) | |
4109 | st %g0, [%r23] !clear lock | |
4110 | wr %r0, %r12, %asi ! restore %asi | |
4111 | ta T_CHANGE_NONHPRIV | |
4112 | .word 0xc3eb4021 ! 18: PREFETCHA_R prefetcha [%r13, %r1] 0x01, #one_read | |
4113 | .word 0x9ba00165 ! 19: FABSq dis not found | |
4114 | ||
4115 | .word 0xe49fe0e8 ! 20: LDDA_I ldda [%r31, + 0x00e8] %asi, %r18 | |
4116 | .word 0xe44fe058 ! 21: LDSB_I ldsb [%r31 + 0x0058], %r18 | |
4117 | memptr_40_8: | |
4118 | set 0x60140000, %r31 | |
4119 | .word 0x8582b50c ! 22: WRCCR_I wr %r10, 0x150c, %ccr | |
4120 | splash_tba_40_9: | |
4121 | nop | |
4122 | ta T_CHANGE_PRIV | |
4123 | setx 0x0000000400380000, %r11, %r12 | |
4124 | .word 0x8b90000c ! 23: WRPR_TBA_R wrpr %r0, %r12, %tba | |
4125 | nop | |
4126 | ta T_CHANGE_HPRIV | |
4127 | mov 0x40+1, %r10 | |
4128 | set sync_thr_counter5, %r23 | |
4129 | #ifndef SPC | |
4130 | ldxa [%g0]0x63, %o1 | |
4131 | and %o1, 0x38, %o1 | |
4132 | add %o1, %r23, %r23 | |
4133 | sllx %o1, 5, %o3 !(CID*256) | |
4134 | #endif | |
4135 | cas [%r23],%g0,%r10 !lock | |
4136 | brnz %r10, cwq_40_10 | |
4137 | rd %asi, %r12 | |
4138 | wr %g0, 0x40, %asi | |
4139 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
4140 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
4141 | cmp %l1, 1 | |
4142 | bne cwq_40_10 | |
4143 | set CWQ_BASE, %l6 | |
4144 | #ifndef SPC | |
4145 | add %l6, %o3, %l6 | |
4146 | #endif | |
4147 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
4148 | best_set_reg(0x206100f0, %l1, %l2) !# Control Word | |
4149 | sllx %l2, 32, %l2 | |
4150 | stx %l2, [%l6 + 0x0] | |
4151 | membar #Sync | |
4152 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
4153 | sub %l2, 0x40, %l2 | |
4154 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
4155 | wr %r12, %g0, %asi | |
4156 | st %g0, [%r23] | |
4157 | cwq_40_10: | |
4158 | ta T_CHANGE_NONHPRIV | |
4159 | .word 0xa5414000 ! 24: RDPC rd %pc, %r18 | |
4160 | .word 0x8d90350d ! 25: WRPR_PSTATE_I wrpr %r0, 0x150d, %pstate | |
4161 | brcommon1_40_12: | |
4162 | nop | |
4163 | setx common_target, %r12, %r27 | |
4164 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
4165 | ba,a .+12 | |
4166 | .word 0xa17021e0 ! 1: POPC_I popc 0x01e0, %r16 | |
4167 | ba,a .+8 | |
4168 | jmpl %r27+0, %r27 | |
4169 | .word 0xa77026b4 ! 26: POPC_I popc 0x06b4, %r19 | |
4170 | intveclr_40_13: | |
4171 | nop | |
4172 | ta T_CHANGE_HPRIV | |
4173 | setx 0x1c18c1b8cc9c1bdb, %r1, %r28 | |
4174 | stxa %r28, [%g0] 0x72 | |
4175 | ta T_CHANGE_NONHPRIV | |
4176 | .word 0x25400001 ! 27: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4177 | splash_lsu_40_14: | |
4178 | nop | |
4179 | ta T_CHANGE_HPRIV | |
4180 | set 0x682b5b4b, %r2 | |
4181 | mov 0x2, %r1 | |
4182 | sllx %r1, 32, %r1 | |
4183 | or %r1, %r2, %r2 | |
4184 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4185 | ta T_CHANGE_NONHPRIV | |
4186 | .word 0x3d400001 ! 28: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4187 | splash_cmpr_40_15: | |
4188 | mov 1, %r18 | |
4189 | sllx %r18, 63, %r18 | |
4190 | rd %tick, %r17 | |
4191 | add %r17, 0x60, %r17 | |
4192 | or %r17, %r18, %r17 | |
4193 | ta T_CHANGE_HPRIV | |
4194 | wrhpr %r17, %g0, %hsys_tick_cmpr | |
4195 | .word 0xaf800011 ! 29: WR_TICK_CMPR_REG_R wr %r0, %r17, %- | |
4196 | brcommon1_40_16: | |
4197 | nop | |
4198 | setx common_target, %r12, %r27 | |
4199 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
4200 | ba,a .+12 | |
4201 | .word 0xa9b7c7d4 ! 1: PDIST pdistn %d62, %d20, %d20 | |
4202 | ba,a .+8 | |
4203 | jmpl %r27+0, %r27 | |
4204 | .word 0x9970207a ! 30: POPC_I popc 0x007a, %r12 | |
4205 | .word 0xd03fc000 ! 31: STD_R std %r8, [%r31 + %r0] | |
4206 | splash_tba_40_17: | |
4207 | nop | |
4208 | ta T_CHANGE_PRIV | |
4209 | setx 0x0000000400380000, %r11, %r12 | |
4210 | .word 0x8b90000c ! 32: WRPR_TBA_R wrpr %r0, %r12, %tba | |
4211 | ibp_40_18: | |
4212 | nop | |
4213 | .word 0xd11fc00d ! 33: LDDF_R ldd [%r31, %r13], %f8 | |
4214 | .word 0xd127c000 ! 34: STF_R st %f8, [%r0, %r31] | |
4215 | .word 0xd0c7e188 ! 35: LDSWA_I ldswa [%r31, + 0x0188] %asi, %r8 | |
4216 | ibp_40_19: | |
4217 | nop | |
4218 | .word 0xc32fc00b ! 36: STXFSR_R st-sfr %f1, [%r11, %r31] | |
4219 | splash_cmpr_40_20: | |
4220 | mov 0, %r18 | |
4221 | sllx %r18, 63, %r18 | |
4222 | rd %tick, %r17 | |
4223 | add %r17, 0x70, %r17 | |
4224 | or %r17, %r18, %r17 | |
4225 | .word 0xaf800011 ! 37: WR_TICK_CMPR_REG_R wr %r0, %r17, %- | |
4226 | .word 0xc19fe0e0 ! 38: LDDFA_I ldda [%r31, 0x00e0], %f0 | |
4227 | nop | |
4228 | ta T_CHANGE_HPRIV | |
4229 | mov 0x40+1, %r10 | |
4230 | set sync_thr_counter5, %r23 | |
4231 | #ifndef SPC | |
4232 | ldxa [%g0]0x63, %o1 | |
4233 | and %o1, 0x38, %o1 | |
4234 | add %o1, %r23, %r23 | |
4235 | sllx %o1, 5, %o3 !(CID*256) | |
4236 | #endif | |
4237 | cas [%r23],%g0,%r10 !lock | |
4238 | brnz %r10, cwq_40_21 | |
4239 | rd %asi, %r12 | |
4240 | wr %g0, 0x40, %asi | |
4241 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
4242 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
4243 | cmp %l1, 1 | |
4244 | bne cwq_40_21 | |
4245 | set CWQ_BASE, %l6 | |
4246 | #ifndef SPC | |
4247 | add %l6, %o3, %l6 | |
4248 | #endif | |
4249 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
4250 | best_set_reg(0x206100e0, %l1, %l2) !# Control Word | |
4251 | sllx %l2, 32, %l2 | |
4252 | stx %l2, [%l6 + 0x0] | |
4253 | membar #Sync | |
4254 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
4255 | sub %l2, 0x40, %l2 | |
4256 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
4257 | wr %r12, %g0, %asi | |
4258 | st %g0, [%r23] | |
4259 | cwq_40_21: | |
4260 | ta T_CHANGE_NONHPRIV | |
4261 | .word 0x95414000 ! 39: RDPC rd %pc, %r10 | |
4262 | .word 0x87a9ca53 ! 40: FCMPd fcmpd %fcc<n>, %f38, %f50 | |
4263 | jmptr_40_23: | |
4264 | nop | |
4265 | best_set_reg(0xe1200000, %r20, %r27) | |
4266 | .word 0xb7c6c000 ! 41: JMPL_R jmpl %r27 + %r0, %r27 | |
4267 | .word 0x93508000 ! 42: RDPR_TSTATE <illegal instruction> | |
4268 | .word 0xe6dfe158 ! 43: LDXA_I ldxa [%r31, + 0x0158] %asi, %r19 | |
4269 | iaw_40_24: | |
4270 | nop | |
4271 | ta T_CHANGE_HPRIV | |
4272 | mov 8, %r18 | |
4273 | rd %asi, %r12 | |
4274 | wr %r0, 0x41, %asi | |
4275 | set sync_thr_counter4, %r23 | |
4276 | #ifndef SPC | |
4277 | ldxa [%g0]0x63, %r8 | |
4278 | and %r8, 0x38, %r8 ! Core ID | |
4279 | add %r8, %r23, %r23 | |
4280 | #else | |
4281 | mov 0, %r8 | |
4282 | #endif | |
4283 | mov 0x40, %r16 | |
4284 | iaw_startwait40_24: | |
4285 | cas [%r23],%g0,%r16 !lock | |
4286 | brz,a %r16, continue_iaw_40_24 | |
4287 | mov (~0x40&0xf0), %r16 | |
4288 | ld [%r23], %r16 | |
4289 | iaw_wait40_24: | |
4290 | brnz %r16, iaw_wait40_24 | |
4291 | ld [%r23], %r16 | |
4292 | ba iaw_startwait40_24 | |
4293 | mov 0x40, %r16 | |
4294 | continue_iaw_40_24: | |
4295 | sllx %r16, %r8, %r16 !Mask for my core only | |
4296 | ldxa [0x58]%asi, %r17 !Running_status | |
4297 | wait_for_stat_40_24: | |
4298 | ldxa [0x50]%asi, %r13 !Running_rw | |
4299 | cmp %r13, %r17 | |
4300 | bne,a %xcc, wait_for_stat_40_24 | |
4301 | ldxa [0x58]%asi, %r17 !Running_status | |
4302 | stxa %r16, [0x68]%asi !Park (W1C) | |
4303 | ldxa [0x50]%asi, %r14 !Running_rw | |
4304 | wait_for_iaw_40_24: | |
4305 | ldxa [0x58]%asi, %r17 !Running_status | |
4306 | cmp %r14, %r17 | |
4307 | bne,a %xcc, wait_for_iaw_40_24 | |
4308 | ldxa [0x50]%asi, %r14 !Running_rw | |
4309 | iaw_doit40_24: | |
4310 | mov 0x38, %r18 | |
4311 | iaw0_40_24: | |
4312 | rd %pc, %r19 | |
4313 | add %r19, (16+5), %r19 | |
4314 | stxa %r19, [%r18]0x50 | |
4315 | stxa %r16, [0x60] %asi ! Unpark (W1S) | |
4316 | st %g0, [%r23] !clear lock | |
4317 | wr %r0, %r12, %asi ! restore %asi | |
4318 | ta T_CHANGE_NONHPRIV | |
4319 | .word 0x91702a9e ! 44: POPC_I popc 0x0a9e, %r8 | |
4320 | .word 0x24ccc001 ! 45: BRLEZ brlez,a,pt %r19,<label_0xcc001> | |
4321 | br_longdelay4_40_26: | |
4322 | nop | |
4323 | not %g0, %r12 | |
4324 | jmp %r12 | |
4325 | .word 0x9d902003 ! 46: WRPR_WSTATE_I wrpr %r0, 0x0003, %wstate | |
4326 | setx 0xdf7a3f95675d5bc5, %r1, %r28 | |
4327 | stxa %r28, [%g0] 0x73 | |
4328 | intvec_40_27: | |
4329 | .word 0x39400001 ! 47: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4330 | .word 0x97a049d2 ! 48: FDIVd fdivd %f32, %f18, %f42 | |
4331 | .word 0xe677c000 ! 49: STX_R stx %r19, [%r31 + %r0] | |
4332 | intveclr_40_29: | |
4333 | nop | |
4334 | ta T_CHANGE_HPRIV | |
4335 | setx 0xc7179a7059bf4264, %r1, %r28 | |
4336 | stxa %r28, [%g0] 0x72 | |
4337 | ta T_CHANGE_NONHPRIV | |
4338 | .word 0x25400001 ! 50: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4339 | mondo_40_30: | |
4340 | nop | |
4341 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
4342 | ta T_CHANGE_PRIV | |
4343 | stxa %r1, [%r0+0x3d0] %asi | |
4344 | .word 0x9d94c007 ! 51: WRPR_WSTATE_R wrpr %r19, %r7, %wstate | |
4345 | .word 0xe63fe090 ! 52: STD_I std %r19, [%r31 + 0x0090] | |
4346 | .word 0xa784251b ! 53: WR_GRAPHICS_STATUS_REG_I wr %r16, 0x051b, %- | |
4347 | .word 0xe71fc000 ! 54: LDDF_R ldd [%r31, %r0], %f19 | |
4348 | .word 0x36800001 ! 1: BGE bge,a <label_0x1> | |
4349 | .word 0x8d903801 ! 55: WRPR_PSTATE_I wrpr %r0, 0x1801, %pstate | |
4350 | splash_tba_40_32: | |
4351 | nop | |
4352 | ta T_CHANGE_PRIV | |
4353 | set 0x120000, %r12 | |
4354 | .word 0x8b90000c ! 56: WRPR_TBA_R wrpr %r0, %r12, %tba | |
4355 | .word 0xc3ec4026 ! 57: PREFETCHA_R prefetcha [%r17, %r6] 0x01, #one_read | |
4356 | .word 0x89800011 ! 58: WRTICK_R wr %r0, %r17, %tick | |
4357 | ibp_40_35: | |
4358 | nop | |
4359 | .word 0xe897c02a ! 59: LDUHA_R lduha [%r31, %r10] 0x01, %r20 | |
4360 | .word 0xe8cfe1e8 ! 60: LDSBA_I ldsba [%r31, + 0x01e8] %asi, %r20 | |
4361 | iaw_40_36: | |
4362 | nop | |
4363 | ta T_CHANGE_HPRIV | |
4364 | mov 8, %r18 | |
4365 | rd %asi, %r12 | |
4366 | wr %r0, 0x41, %asi | |
4367 | set sync_thr_counter4, %r23 | |
4368 | #ifndef SPC | |
4369 | ldxa [%g0]0x63, %r8 | |
4370 | and %r8, 0x38, %r8 ! Core ID | |
4371 | add %r8, %r23, %r23 | |
4372 | #else | |
4373 | mov 0, %r8 | |
4374 | #endif | |
4375 | mov 0x40, %r16 | |
4376 | iaw_startwait40_36: | |
4377 | cas [%r23],%g0,%r16 !lock | |
4378 | brz,a %r16, continue_iaw_40_36 | |
4379 | mov (~0x40&0xf0), %r16 | |
4380 | ld [%r23], %r16 | |
4381 | iaw_wait40_36: | |
4382 | brnz %r16, iaw_wait40_36 | |
4383 | ld [%r23], %r16 | |
4384 | ba iaw_startwait40_36 | |
4385 | mov 0x40, %r16 | |
4386 | continue_iaw_40_36: | |
4387 | sllx %r16, %r8, %r16 !Mask for my core only | |
4388 | ldxa [0x58]%asi, %r17 !Running_status | |
4389 | wait_for_stat_40_36: | |
4390 | ldxa [0x50]%asi, %r13 !Running_rw | |
4391 | cmp %r13, %r17 | |
4392 | bne,a %xcc, wait_for_stat_40_36 | |
4393 | ldxa [0x58]%asi, %r17 !Running_status | |
4394 | stxa %r16, [0x68]%asi !Park (W1C) | |
4395 | ldxa [0x50]%asi, %r14 !Running_rw | |
4396 | wait_for_iaw_40_36: | |
4397 | ldxa [0x58]%asi, %r17 !Running_status | |
4398 | cmp %r14, %r17 | |
4399 | bne,a %xcc, wait_for_iaw_40_36 | |
4400 | ldxa [0x50]%asi, %r14 !Running_rw | |
4401 | iaw_doit40_36: | |
4402 | mov 0x38, %r18 | |
4403 | iaw2_40_36: | |
4404 | rdpr %tba, %r19 | |
4405 | mov 0x221, %r20 | |
4406 | sllx %r20, 5, %r20 | |
4407 | add %r20, %r19, %r19 | |
4408 | stxa %r19, [%r18]0x50 | |
4409 | stxa %r16, [0x60] %asi ! Unpark (W1S) | |
4410 | st %g0, [%r23] !clear lock | |
4411 | wr %r0, %r12, %asi ! restore %asi | |
4412 | ta T_CHANGE_NONHPRIV | |
4413 | .word 0x9ba489d2 ! 61: FDIVd fdivd %f18, %f18, %f44 | |
4414 | ceter_40_37: | |
4415 | nop | |
4416 | ta T_CHANGE_HPRIV | |
4417 | mov 7, %r17 | |
4418 | sllx %r17, 60, %r17 | |
4419 | mov 0x18, %r16 | |
4420 | stxa %r17, [%r16]0x4c | |
4421 | ta T_CHANGE_NONHPRIV | |
4422 | .word 0xa9410000 ! 62: RDTICK rd %tick, %r20 | |
4423 | iaw_40_38: | |
4424 | nop | |
4425 | ta T_CHANGE_HPRIV | |
4426 | mov 8, %r18 | |
4427 | rd %asi, %r12 | |
4428 | wr %r0, 0x41, %asi | |
4429 | set sync_thr_counter4, %r23 | |
4430 | #ifndef SPC | |
4431 | ldxa [%g0]0x63, %r8 | |
4432 | and %r8, 0x38, %r8 ! Core ID | |
4433 | add %r8, %r23, %r23 | |
4434 | #else | |
4435 | mov 0, %r8 | |
4436 | #endif | |
4437 | mov 0x40, %r16 | |
4438 | iaw_startwait40_38: | |
4439 | cas [%r23],%g0,%r16 !lock | |
4440 | brz,a %r16, continue_iaw_40_38 | |
4441 | mov (~0x40&0xf0), %r16 | |
4442 | ld [%r23], %r16 | |
4443 | iaw_wait40_38: | |
4444 | brnz %r16, iaw_wait40_38 | |
4445 | ld [%r23], %r16 | |
4446 | ba iaw_startwait40_38 | |
4447 | mov 0x40, %r16 | |
4448 | continue_iaw_40_38: | |
4449 | sllx %r16, %r8, %r16 !Mask for my core only | |
4450 | ldxa [0x58]%asi, %r17 !Running_status | |
4451 | wait_for_stat_40_38: | |
4452 | ldxa [0x50]%asi, %r13 !Running_rw | |
4453 | cmp %r13, %r17 | |
4454 | bne,a %xcc, wait_for_stat_40_38 | |
4455 | ldxa [0x58]%asi, %r17 !Running_status | |
4456 | stxa %r16, [0x68]%asi !Park (W1C) | |
4457 | ldxa [0x50]%asi, %r14 !Running_rw | |
4458 | wait_for_iaw_40_38: | |
4459 | ldxa [0x58]%asi, %r17 !Running_status | |
4460 | cmp %r14, %r17 | |
4461 | bne,a %xcc, wait_for_iaw_40_38 | |
4462 | ldxa [0x50]%asi, %r14 !Running_rw | |
4463 | iaw_doit40_38: | |
4464 | mov 0x38, %r18 | |
4465 | iaw4_40_38: | |
4466 | setx common_target, %r20, %r19 | |
4467 | or %r19, 0x1, %r19 | |
4468 | stxa %r19, [%r18]0x50 | |
4469 | stxa %r16, [0x60] %asi ! Unpark (W1S) | |
4470 | st %g0, [%r23] !clear lock | |
4471 | wr %r0, %r12, %asi ! restore %asi | |
4472 | ta T_CHANGE_NONHPRIV | |
4473 | .word 0xc32fc009 ! 63: STXFSR_R st-sfr %f1, [%r9, %r31] | |
4474 | mondo_40_39: | |
4475 | nop | |
4476 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
4477 | stxa %r16, [%r0+0x3d0] %asi | |
4478 | .word 0x9d930012 ! 64: WRPR_WSTATE_R wrpr %r12, %r18, %wstate | |
4479 | .word 0xc32fc000 ! 65: STXFSR_R st-sfr %f1, [%r0, %r31] | |
4480 | fpinit_40_41: | |
4481 | nop | |
4482 | setx fp_data_quads, %r19, %r20 | |
4483 | ldd [%r20], %f0 | |
4484 | ldd [%r20+8], %f4 | |
4485 | ld [%r20+16], %fsr | |
4486 | ld [%r20+24], %r19 | |
4487 | wr %r19, %g0, %gsr | |
4488 | .word 0x87a80a44 ! 66: FCMPd fcmpd %fcc<n>, %f0, %f4 | |
4489 | nop | |
4490 | ta T_CHANGE_HPRIV ! macro | |
4491 | donret_40_42: | |
4492 | rd %pc, %r12 | |
4493 | add %r12, (donretarg_40_42-donret_40_42+4), %r12 | |
4494 | add %r12, 0x4, %r11 ! seq tnpc | |
4495 | wrpr %g0, 0x2, %tl | |
4496 | wrpr %g0, %r12, %tpc | |
4497 | wrpr %g0, %r11, %tnpc | |
4498 | set (0x005bf800 | (32 << 24)), %r13 | |
4499 | and %r12, 0xfff, %r14 | |
4500 | sllx %r14, 30, %r14 | |
4501 | or %r13, %r14, %r20 | |
4502 | wrpr %r20, %g0, %tstate | |
4503 | wrhpr %g0, 0x377, %htstate | |
4504 | ta T_CHANGE_NONHPRIV ! rand=1 (40) | |
4505 | retry | |
4506 | donretarg_40_42: | |
4507 | .word 0xd26fe056 ! 67: LDSTUB_I ldstub %r9, [%r31 + 0x0056] | |
4508 | ibp_40_43: | |
4509 | nop | |
4510 | .word 0xc3e88027 ! 68: PREFETCHA_R prefetcha [%r2, %r7] 0x01, #one_read | |
4511 | splash_tba_40_44: | |
4512 | nop | |
4513 | ta T_CHANGE_PRIV | |
4514 | set 0x120000, %r12 | |
4515 | .word 0x8b90000c ! 69: WRPR_TBA_R wrpr %r0, %r12, %tba | |
4516 | jmptr_40_45: | |
4517 | nop | |
4518 | best_set_reg(0xe1200000, %r20, %r27) | |
4519 | .word 0xb7c6c000 ! 70: JMPL_R jmpl %r27 + %r0, %r27 | |
4520 | .word 0xe6dfe168 ! 71: LDXA_I ldxa [%r31, + 0x0168] %asi, %r19 | |
4521 | .word 0xe737e06a ! 72: STQF_I - %f19, [0x006a, %r31] | |
4522 | nop | |
4523 | mov 0x80, %g3 | |
4524 | stxa %g3, [%g3] 0x57 | |
4525 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
4526 | .word 0xe65fc000 ! 73: LDX_R ldx [%r31 + %r0], %r19 | |
4527 | set 0x9dc, %l3 | |
4528 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT | |
4529 | .word 0xa5b347ca ! 74: PDIST pdistn %d44, %d10, %d18 | |
4530 | .word 0xd22fe103 ! 75: STB_I stb %r9, [%r31 + 0x0103] | |
4531 | nop | |
4532 | mov 0x80, %g3 | |
4533 | stxa %g3, [%g3] 0x5f | |
4534 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
4535 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
4536 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
4537 | .word 0xd25fc000 ! 76: LDX_R ldx [%r31 + %r0], %r9 | |
4538 | .word 0x9194c005 ! 77: WRPR_PIL_R wrpr %r19, %r5, %pil | |
4539 | iaw_40_47: | |
4540 | nop | |
4541 | ta T_CHANGE_HPRIV | |
4542 | mov 8, %r18 | |
4543 | rd %asi, %r12 | |
4544 | wr %r0, 0x41, %asi | |
4545 | set sync_thr_counter4, %r23 | |
4546 | #ifndef SPC | |
4547 | ldxa [%g0]0x63, %r8 | |
4548 | and %r8, 0x38, %r8 ! Core ID | |
4549 | add %r8, %r23, %r23 | |
4550 | #else | |
4551 | mov 0, %r8 | |
4552 | #endif | |
4553 | mov 0x40, %r16 | |
4554 | iaw_startwait40_47: | |
4555 | cas [%r23],%g0,%r16 !lock | |
4556 | brz,a %r16, continue_iaw_40_47 | |
4557 | mov (~0x40&0xf0), %r16 | |
4558 | ld [%r23], %r16 | |
4559 | iaw_wait40_47: | |
4560 | brnz %r16, iaw_wait40_47 | |
4561 | ld [%r23], %r16 | |
4562 | ba iaw_startwait40_47 | |
4563 | mov 0x40, %r16 | |
4564 | continue_iaw_40_47: | |
4565 | sllx %r16, %r8, %r16 !Mask for my core only | |
4566 | ldxa [0x58]%asi, %r17 !Running_status | |
4567 | wait_for_stat_40_47: | |
4568 | ldxa [0x50]%asi, %r13 !Running_rw | |
4569 | cmp %r13, %r17 | |
4570 | bne,a %xcc, wait_for_stat_40_47 | |
4571 | ldxa [0x58]%asi, %r17 !Running_status | |
4572 | stxa %r16, [0x68]%asi !Park (W1C) | |
4573 | ldxa [0x50]%asi, %r14 !Running_rw | |
4574 | wait_for_iaw_40_47: | |
4575 | ldxa [0x58]%asi, %r17 !Running_status | |
4576 | cmp %r14, %r17 | |
4577 | bne,a %xcc, wait_for_iaw_40_47 | |
4578 | ldxa [0x50]%asi, %r14 !Running_rw | |
4579 | iaw_doit40_47: | |
4580 | mov 0x38, %r18 | |
4581 | iaw4_40_47: | |
4582 | setx common_target, %r20, %r19 | |
4583 | or %r19, 0x1, %r19 | |
4584 | stxa %r19, [%r18]0x50 | |
4585 | stxa %r16, [0x60] %asi ! Unpark (W1S) | |
4586 | st %g0, [%r23] !clear lock | |
4587 | wr %r0, %r12, %asi ! restore %asi | |
4588 | ta T_CHANGE_NONHPRIV | |
4589 | .word 0xd23fe0c0 ! 78: STD_I std %r9, [%r31 + 0x00c0] | |
4590 | .word 0x91d020b3 ! 79: Tcc_I ta icc_or_xcc, %r0 + 179 | |
4591 | .word 0x89800011 ! 80: WRTICK_R wr %r0, %r17, %tick | |
4592 | splash_tba_40_49: | |
4593 | nop | |
4594 | ta T_CHANGE_PRIV | |
4595 | setx 0x0000000400380000, %r11, %r12 | |
4596 | .word 0x8b90000c ! 81: WRPR_TBA_R wrpr %r0, %r12, %tba | |
4597 | intveclr_40_50: | |
4598 | nop | |
4599 | ta T_CHANGE_HPRIV | |
4600 | setx 0x5dea91aaefafd4d0, %r1, %r28 | |
4601 | stxa %r28, [%g0] 0x72 | |
4602 | .word 0x25400001 ! 82: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4603 | nop | |
4604 | mov 0x80, %g3 | |
4605 | stxa %g3, [%g3] 0x5f | |
4606 | .word 0xd25fc000 ! 83: LDX_R ldx [%r31 + %r0], %r9 | |
4607 | .word 0xd337e014 ! 84: STQF_I - %f9, [0x0014, %r31] | |
4608 | memptr_40_51: | |
4609 | set user_data_start, %r31 | |
4610 | .word 0x8580acd3 ! 85: WRCCR_I wr %r2, 0x0cd3, %ccr | |
4611 | invalw | |
4612 | mov 0xb5, %r30 | |
4613 | .word 0x83d0001e ! 86: Tcc_R te icc_or_xcc, %r0 + %r30 | |
4614 | .word 0xd327c000 ! 87: STF_R st %f9, [%r0, %r31] | |
4615 | jmptr_40_52: | |
4616 | nop | |
4617 | best_set_reg(0xe1200000, %r20, %r27) | |
4618 | .word 0xb7c6c000 ! 88: JMPL_R jmpl %r27 + %r0, %r27 | |
4619 | setx 0xc633e1b6d0fcab6b, %r1, %r28 | |
4620 | stxa %r28, [%g0] 0x73 | |
4621 | intvec_40_53: | |
4622 | .word 0x39400001 ! 89: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4623 | jmptr_40_54: | |
4624 | nop | |
4625 | best_set_reg(0xe1200000, %r20, %r27) | |
4626 | .word 0xb7c6c000 ! 90: JMPL_R jmpl %r27 + %r0, %r27 | |
4627 | pmu_40_55: | |
4628 | nop | |
4629 | setx 0xfffffe36fffffcbd, %g1, %g7 | |
4630 | .word 0xa3800007 ! 91: WR_PERF_COUNTER_R wr %r0, %r7, %- | |
4631 | .word 0xd2800c20 ! 92: LDUWA_R lduwa [%r0, %r0] 0x61, %r9 | |
4632 | nop | |
4633 | ta T_CHANGE_HPRIV | |
4634 | mov 0x40+1, %r10 | |
4635 | set sync_thr_counter5, %r23 | |
4636 | #ifndef SPC | |
4637 | ldxa [%g0]0x63, %o1 | |
4638 | and %o1, 0x38, %o1 | |
4639 | add %o1, %r23, %r23 | |
4640 | sllx %o1, 5, %o3 !(CID*256) | |
4641 | #endif | |
4642 | cas [%r23],%g0,%r10 !lock | |
4643 | brnz %r10, cwq_40_56 | |
4644 | rd %asi, %r12 | |
4645 | wr %g0, 0x40, %asi | |
4646 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
4647 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
4648 | cmp %l1, 1 | |
4649 | bne cwq_40_56 | |
4650 | set CWQ_BASE, %l6 | |
4651 | #ifndef SPC | |
4652 | add %l6, %o3, %l6 | |
4653 | #endif | |
4654 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
4655 | best_set_reg(0x20610060, %l1, %l2) !# Control Word | |
4656 | sllx %l2, 32, %l2 | |
4657 | stx %l2, [%l6 + 0x0] | |
4658 | membar #Sync | |
4659 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
4660 | sub %l2, 0x40, %l2 | |
4661 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
4662 | wr %r12, %g0, %asi | |
4663 | st %g0, [%r23] | |
4664 | cwq_40_56: | |
4665 | ta T_CHANGE_NONHPRIV | |
4666 | .word 0x9b414000 ! 93: RDPC rd %pc, %r13 | |
4667 | brcommon3_40_57: | |
4668 | nop | |
4669 | setx common_target, %r12, %r27 | |
4670 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
4671 | ba,a .+12 | |
4672 | .word 0xe06fe000 ! 1: LDSTUB_I ldstub %r16, [%r31 + 0x0000] | |
4673 | ba,a .+8 | |
4674 | jmpl %r27+0, %r27 | |
4675 | .word 0xe09fe010 ! 94: LDDA_I ldda [%r31, + 0x0010] %asi, %r16 | |
4676 | splash_lsu_40_58: | |
4677 | nop | |
4678 | ta T_CHANGE_HPRIV | |
4679 | set 0x55aecd64, %r2 | |
4680 | mov 0x3, %r1 | |
4681 | sllx %r1, 32, %r1 | |
4682 | or %r1, %r2, %r2 | |
4683 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4684 | ta T_CHANGE_NONHPRIV | |
4685 | .word 0x3d400001 ! 95: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4686 | mondo_40_59: | |
4687 | nop | |
4688 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
4689 | ta T_CHANGE_PRIV | |
4690 | stxa %r9, [%r0+0x3e8] %asi | |
4691 | .word 0x9d920005 ! 96: WRPR_WSTATE_R wrpr %r8, %r5, %wstate | |
4692 | ibp_40_60: | |
4693 | nop | |
4694 | ta T_CHANGE_NONHPRIV | |
4695 | .word 0xc19fdf20 ! 97: LDDFA_R ldda [%r31, %r0], %f0 | |
4696 | .word 0xc19fda00 ! 98: LDDFA_R ldda [%r31, %r0], %f0 | |
4697 | nop | |
4698 | ta T_CHANGE_HPRIV | |
4699 | mov 0x40+1, %r10 | |
4700 | set sync_thr_counter5, %r23 | |
4701 | #ifndef SPC | |
4702 | ldxa [%g0]0x63, %o1 | |
4703 | and %o1, 0x38, %o1 | |
4704 | add %o1, %r23, %r23 | |
4705 | sllx %o1, 5, %o3 !(CID*256) | |
4706 | #endif | |
4707 | cas [%r23],%g0,%r10 !lock | |
4708 | brnz %r10, cwq_40_61 | |
4709 | rd %asi, %r12 | |
4710 | wr %g0, 0x40, %asi | |
4711 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
4712 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
4713 | cmp %l1, 1 | |
4714 | bne cwq_40_61 | |
4715 | set CWQ_BASE, %l6 | |
4716 | #ifndef SPC | |
4717 | add %l6, %o3, %l6 | |
4718 | #endif | |
4719 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
4720 | best_set_reg(0x20610070, %l1, %l2) !# Control Word | |
4721 | sllx %l2, 32, %l2 | |
4722 | stx %l2, [%l6 + 0x0] | |
4723 | membar #Sync | |
4724 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
4725 | sub %l2, 0x40, %l2 | |
4726 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
4727 | wr %r12, %g0, %asi | |
4728 | st %g0, [%r23] | |
4729 | cwq_40_61: | |
4730 | ta T_CHANGE_NONHPRIV | |
4731 | .word 0x99414000 ! 99: RDPC rd %pc, %r12 | |
4732 | .word 0xdb37e0e1 ! 100: STQF_I - %f13, [0x00e1, %r31] | |
4733 | iaw_40_62: | |
4734 | nop | |
4735 | ta T_CHANGE_HPRIV | |
4736 | mov 8, %r18 | |
4737 | rd %asi, %r12 | |
4738 | wr %r0, 0x41, %asi | |
4739 | set sync_thr_counter4, %r23 | |
4740 | #ifndef SPC | |
4741 | ldxa [%g0]0x63, %r8 | |
4742 | and %r8, 0x38, %r8 ! Core ID | |
4743 | add %r8, %r23, %r23 | |
4744 | #else | |
4745 | mov 0, %r8 | |
4746 | #endif | |
4747 | mov 0x40, %r16 | |
4748 | iaw_startwait40_62: | |
4749 | cas [%r23],%g0,%r16 !lock | |
4750 | brz,a %r16, continue_iaw_40_62 | |
4751 | mov (~0x40&0xf0), %r16 | |
4752 | ld [%r23], %r16 | |
4753 | iaw_wait40_62: | |
4754 | brnz %r16, iaw_wait40_62 | |
4755 | ld [%r23], %r16 | |
4756 | ba iaw_startwait40_62 | |
4757 | mov 0x40, %r16 | |
4758 | continue_iaw_40_62: | |
4759 | sllx %r16, %r8, %r16 !Mask for my core only | |
4760 | ldxa [0x58]%asi, %r17 !Running_status | |
4761 | wait_for_stat_40_62: | |
4762 | ldxa [0x50]%asi, %r13 !Running_rw | |
4763 | cmp %r13, %r17 | |
4764 | bne,a %xcc, wait_for_stat_40_62 | |
4765 | ldxa [0x58]%asi, %r17 !Running_status | |
4766 | stxa %r16, [0x68]%asi !Park (W1C) | |
4767 | ldxa [0x50]%asi, %r14 !Running_rw | |
4768 | wait_for_iaw_40_62: | |
4769 | ldxa [0x58]%asi, %r17 !Running_status | |
4770 | cmp %r14, %r17 | |
4771 | bne,a %xcc, wait_for_iaw_40_62 | |
4772 | ldxa [0x50]%asi, %r14 !Running_rw | |
4773 | iaw_doit40_62: | |
4774 | mov 0x38, %r18 | |
4775 | iaw4_40_62: | |
4776 | setx common_target, %r20, %r19 | |
4777 | or %r19, 0x1, %r19 | |
4778 | stxa %r19, [%r18]0x50 | |
4779 | stxa %r16, [0x60] %asi ! Unpark (W1S) | |
4780 | st %g0, [%r23] !clear lock | |
4781 | wr %r0, %r12, %asi ! restore %asi | |
4782 | ta T_CHANGE_NONHPRIV | |
4783 | .word 0xa1a109b2 ! 101: FDIVs fdivs %f4, %f18, %f16 | |
4784 | .word 0x89800011 ! 102: WRTICK_R wr %r0, %r17, %tick | |
4785 | cwp_40_64: | |
4786 | set user_data_start, %o7 | |
4787 | .word 0x93902002 ! 103: WRPR_CWP_I wrpr %r0, 0x0002, %cwp | |
4788 | splash_lsu_40_65: | |
4789 | nop | |
4790 | ta T_CHANGE_HPRIV | |
4791 | set 0xaef4f28c, %r2 | |
4792 | mov 0x1, %r1 | |
4793 | sllx %r1, 32, %r1 | |
4794 | or %r1, %r2, %r2 | |
4795 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4796 | ta T_CHANGE_NONHPRIV | |
4797 | .word 0x3d400001 ! 104: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4798 | splash_lsu_40_66: | |
4799 | nop | |
4800 | ta T_CHANGE_HPRIV | |
4801 | set 0x33f952b1, %r2 | |
4802 | mov 0x5, %r1 | |
4803 | sllx %r1, 32, %r1 | |
4804 | or %r1, %r2, %r2 | |
4805 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
4806 | .word 0x3d400001 ! 105: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
4807 | fpinit_40_67: | |
4808 | nop | |
4809 | setx fp_data_quads, %r19, %r20 | |
4810 | ldd [%r20], %f0 | |
4811 | ldd [%r20+8], %f4 | |
4812 | ld [%r20+16], %fsr | |
4813 | ld [%r20+24], %r19 | |
4814 | wr %r19, %g0, %gsr | |
4815 | .word 0x8da009a4 ! 106: FDIVs fdivs %f0, %f4, %f6 | |
4816 | ibp_40_68: | |
4817 | nop | |
4818 | ta T_CHANGE_NONHPRIV | |
4819 | .word 0xa17025cc ! 107: POPC_I popc 0x05cc, %r16 | |
4820 | ta T_CHANGE_NONHPRIV | |
4821 | .word 0x8143e011 ! 108: MEMBAR membar #LoadLoad | #Lookaside | |
4822 | intveclr_40_70: | |
4823 | nop | |
4824 | ta T_CHANGE_HPRIV | |
4825 | setx 0xd902b1ccb60d0c9d, %r1, %r28 | |
4826 | stxa %r28, [%g0] 0x72 | |
4827 | .word 0x25400001 ! 109: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4828 | nop | |
4829 | ta T_CHANGE_HPRIV | |
4830 | mov 0x40, %r10 | |
4831 | set sync_thr_counter6, %r23 | |
4832 | #ifndef SPC | |
4833 | ldxa [%g0]0x63, %o1 | |
4834 | and %o1, 0x38, %o1 | |
4835 | add %o1, %r23, %r23 | |
4836 | #endif | |
4837 | cas [%r23],%g0,%r10 !lock | |
4838 | brnz %r10, sma_40_71 | |
4839 | rd %asi, %r12 | |
4840 | wr %g0, 0x40, %asi | |
4841 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 | |
4842 | set 0x000e1fff, %g1 | |
4843 | stxa %g1, [%g0 + 0x80] %asi | |
4844 | wr %r12, %g0, %asi | |
4845 | st %g0, [%r23] | |
4846 | sma_40_71: | |
4847 | ta T_CHANGE_NONHPRIV | |
4848 | .word 0xd7e7e00b ! 110: CASA_R casa [%r31] %asi, %r11, %r11 | |
4849 | .word 0xc1bfe000 ! 111: STDFA_I stda %f0, [0x0000, %r31] | |
4850 | nop | |
4851 | ta T_CHANGE_HPRIV ! macro | |
4852 | donret_40_72: | |
4853 | rd %pc, %r12 | |
4854 | add %r12, (donretarg_40_72-donret_40_72), %r12 | |
4855 | add %r12, 0x8, %r11 ! nonseq tnpc | |
4856 | wrpr %g0, 0x2, %tl | |
4857 | wrpr %g0, %r12, %tpc | |
4858 | wrpr %g0, %r11, %tnpc | |
4859 | set (0x00b7c100 | (28 << 24)), %r13 | |
4860 | and %r12, 0xfff, %r14 | |
4861 | sllx %r14, 30, %r14 | |
4862 | or %r13, %r14, %r20 | |
4863 | wrpr %r20, %g0, %tstate | |
4864 | wrhpr %g0, 0xd17, %htstate | |
4865 | ta T_CHANGE_NONPRIV ! rand=0 (40) | |
4866 | .word 0x38800001 ! 1: BGU bgu,a <label_0x1> | |
4867 | retry | |
4868 | donretarg_40_72: | |
4869 | .word 0xa3a309cc ! 112: FDIVd fdivd %f12, %f12, %f48 | |
4870 | ibp_40_73: | |
4871 | nop | |
4872 | .word 0xd297c034 ! 113: LDUHA_R lduha [%r31, %r20] 0x01, %r9 | |
4873 | iaw_40_74: | |
4874 | nop | |
4875 | ta T_CHANGE_HPRIV | |
4876 | mov 8, %r18 | |
4877 | rd %asi, %r12 | |
4878 | wr %r0, 0x41, %asi | |
4879 | set sync_thr_counter4, %r23 | |
4880 | #ifndef SPC | |
4881 | ldxa [%g0]0x63, %r8 | |
4882 | and %r8, 0x38, %r8 ! Core ID | |
4883 | add %r8, %r23, %r23 | |
4884 | #else | |
4885 | mov 0, %r8 | |
4886 | #endif | |
4887 | mov 0x40, %r16 | |
4888 | iaw_startwait40_74: | |
4889 | cas [%r23],%g0,%r16 !lock | |
4890 | brz,a %r16, continue_iaw_40_74 | |
4891 | mov (~0x40&0xf0), %r16 | |
4892 | ld [%r23], %r16 | |
4893 | iaw_wait40_74: | |
4894 | brnz %r16, iaw_wait40_74 | |
4895 | ld [%r23], %r16 | |
4896 | ba iaw_startwait40_74 | |
4897 | mov 0x40, %r16 | |
4898 | continue_iaw_40_74: | |
4899 | sllx %r16, %r8, %r16 !Mask for my core only | |
4900 | ldxa [0x58]%asi, %r17 !Running_status | |
4901 | wait_for_stat_40_74: | |
4902 | ldxa [0x50]%asi, %r13 !Running_rw | |
4903 | cmp %r13, %r17 | |
4904 | bne,a %xcc, wait_for_stat_40_74 | |
4905 | ldxa [0x58]%asi, %r17 !Running_status | |
4906 | stxa %r16, [0x68]%asi !Park (W1C) | |
4907 | ldxa [0x50]%asi, %r14 !Running_rw | |
4908 | wait_for_iaw_40_74: | |
4909 | ldxa [0x58]%asi, %r17 !Running_status | |
4910 | cmp %r14, %r17 | |
4911 | bne,a %xcc, wait_for_iaw_40_74 | |
4912 | ldxa [0x50]%asi, %r14 !Running_rw | |
4913 | iaw_doit40_74: | |
4914 | mov 0x38, %r18 | |
4915 | iaw1_40_74: | |
4916 | best_set_reg(0x00000000e0a00000, %r20, %r19) | |
4917 | or %r19, 0x1, %r19 | |
4918 | stxa %r19, [%r18]0x50 | |
4919 | stxa %r16, [0x60] %asi ! Unpark (W1S) | |
4920 | st %g0, [%r23] !clear lock | |
4921 | wr %r0, %r12, %asi ! restore %asi | |
4922 | ta T_CHANGE_NONHPRIV | |
4923 | .word 0xc1bfdf20 ! 114: STDFA_R stda %f0, [%r0, %r31] | |
4924 | .word 0x8d90225f ! 115: WRPR_PSTATE_I wrpr %r0, 0x025f, %pstate | |
4925 | .word 0x87802004 ! 116: WRASI_I wr %r0, 0x0004, %asi | |
4926 | #if (defined SPC || defined CMP1) | |
4927 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_76) + 8, 16, 16)) -> intp(0,0,16) | |
4928 | #else | |
4929 | setx 0xcec1a4e4b65786f0, %r1, %r28 | |
4930 | stxa %r28, [%g0] 0x73 | |
4931 | #endif | |
4932 | intvec_40_76: | |
4933 | .word 0x39400001 ! 117: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
4934 | ibp_40_77: | |
4935 | nop | |
4936 | ta T_CHANGE_NONHPRIV | |
4937 | .word 0x97a449c7 ! 118: FDIVd fdivd %f48, %f38, %f42 | |
4938 | .word 0x91d02032 ! 119: Tcc_I ta icc_or_xcc, %r0 + 50 | |
4939 | mondo_40_78: | |
4940 | nop | |
4941 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
4942 | ta T_CHANGE_PRIV | |
4943 | stxa %r5, [%r0+0x3d0] %asi | |
4944 | .word 0x9d948011 ! 120: WRPR_WSTATE_R wrpr %r18, %r17, %wstate | |
4945 | ibp_40_79: | |
4946 | nop | |
4947 | .word 0xc19fdc00 ! 121: LDDFA_R ldda [%r31, %r0], %f0 | |
4948 | ibp_40_80: | |
4949 | nop | |
4950 | ta T_CHANGE_NONHPRIV | |
4951 | .word 0xa1702b60 ! 122: POPC_I popc 0x0b60, %r16 | |
4952 | .word 0x8d802000 ! 123: WRFPRS_I wr %r0, 0x0000, %fprs | |
4953 | splash_hpstate_40_81: | |
4954 | ta T_CHANGE_NONHPRIV | |
4955 | .word 0x2b400001 ! 1: FBPUG fbug,a,pn %fcc0, <label_0x1> | |
4956 | .word 0x8198261f ! 124: WRHPR_HPSTATE_I wrhpr %r0, 0x061f, %hpstate | |
4957 | ibp_40_82: | |
4958 | nop | |
4959 | ta T_CHANGE_NONHPRIV | |
4960 | .word 0xd11fe110 ! 125: LDDF_I ldd [%r31, 0x0110], %f8 | |
4961 | nop | |
4962 | ta T_CHANGE_HPRIV ! macro | |
4963 | donret_40_83: | |
4964 | rd %pc, %r12 | |
4965 | add %r12, (donretarg_40_83-donret_40_83+4), %r12 | |
4966 | add %r12, 0x4, %r11 ! seq tnpc | |
4967 | wrpr %g0, 0x2, %tl | |
4968 | wrpr %g0, %r12, %tpc | |
4969 | wrpr %g0, %r11, %tnpc | |
4970 | set (0x00221a00 | (32 << 24)), %r13 | |
4971 | and %r12, 0xfff, %r14 | |
4972 | sllx %r14, 30, %r14 | |
4973 | or %r13, %r14, %r20 | |
4974 | wrpr %r20, %g0, %tstate | |
4975 | wrhpr %g0, 0x14d4, %htstate | |
4976 | ta T_CHANGE_NONHPRIV ! rand=1 (40) | |
4977 | .word 0x25400001 ! 1: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
4978 | done | |
4979 | donretarg_40_83: | |
4980 | .word 0x37400001 ! 126: FBPGE fbge,a,pn %fcc0, <label_0x1> | |
4981 | iaw_40_84: | |
4982 | nop | |
4983 | ta T_CHANGE_HPRIV | |
4984 | mov 8, %r18 | |
4985 | rd %asi, %r12 | |
4986 | wr %r0, 0x41, %asi | |
4987 | set sync_thr_counter4, %r23 | |
4988 | #ifndef SPC | |
4989 | ldxa [%g0]0x63, %r8 | |
4990 | and %r8, 0x38, %r8 ! Core ID | |
4991 | add %r8, %r23, %r23 | |
4992 | #else | |
4993 | mov 0, %r8 | |
4994 | #endif | |
4995 | mov 0x40, %r16 | |
4996 | iaw_startwait40_84: | |
4997 | cas [%r23],%g0,%r16 !lock | |
4998 | brz,a %r16, continue_iaw_40_84 | |
4999 | mov (~0x40&0xf0), %r16 | |
5000 | ld [%r23], %r16 | |
5001 | iaw_wait40_84: | |
5002 | brnz %r16, iaw_wait40_84 | |
5003 | ld [%r23], %r16 | |
5004 | ba iaw_startwait40_84 | |
5005 | mov 0x40, %r16 | |
5006 | continue_iaw_40_84: | |
5007 | sllx %r16, %r8, %r16 !Mask for my core only | |
5008 | ldxa [0x58]%asi, %r17 !Running_status | |
5009 | wait_for_stat_40_84: | |
5010 | ldxa [0x50]%asi, %r13 !Running_rw | |
5011 | cmp %r13, %r17 | |
5012 | bne,a %xcc, wait_for_stat_40_84 | |
5013 | ldxa [0x58]%asi, %r17 !Running_status | |
5014 | stxa %r16, [0x68]%asi !Park (W1C) | |
5015 | ldxa [0x50]%asi, %r14 !Running_rw | |
5016 | wait_for_iaw_40_84: | |
5017 | ldxa [0x58]%asi, %r17 !Running_status | |
5018 | cmp %r14, %r17 | |
5019 | bne,a %xcc, wait_for_iaw_40_84 | |
5020 | ldxa [0x50]%asi, %r14 !Running_rw | |
5021 | iaw_doit40_84: | |
5022 | mov 0x38, %r18 | |
5023 | iaw2_40_84: | |
5024 | rdpr %tba, %r19 | |
5025 | mov 0x211, %r20 | |
5026 | sllx %r20, 5, %r20 | |
5027 | add %r20, %r19, %r19 | |
5028 | stxa %r19, [%r18]0x50 | |
5029 | stxa %r16, [0x60] %asi ! Unpark (W1S) | |
5030 | st %g0, [%r23] !clear lock | |
5031 | wr %r0, %r12, %asi ! restore %asi | |
5032 | ta T_CHANGE_NONHPRIV | |
5033 | .word 0xd097c02a ! 127: LDUHA_R lduha [%r31, %r10] 0x01, %r8 | |
5034 | nop | |
5035 | mov 0x80, %g3 | |
5036 | stxa %g3, [%g3] 0x5f | |
5037 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 | |
5038 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
5039 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
5040 | .word 0xd05fc000 ! 128: LDX_R ldx [%r31 + %r0], %r8 | |
5041 | .word 0x24800001 ! 129: BLE ble,a <label_0x1> | |
5042 | memptr_40_85: | |
5043 | set 0x60340000, %r31 | |
5044 | .word 0x85826459 ! 130: WRCCR_I wr %r9, 0x0459, %ccr | |
5045 | .word 0x22800001 ! 131: BE be,a <label_0x1> | |
5046 | ibp_40_86: | |
5047 | nop | |
5048 | .word 0xe19fdf20 ! 132: LDDFA_R ldda [%r31, %r0], %f16 | |
5049 | .word 0xa9a00174 ! 133: FABSq dis not found | |
5050 | ||
5051 | .word 0xdad7e100 ! 134: LDSHA_I ldsha [%r31, + 0x0100] %asi, %r13 | |
5052 | .word 0xc36d2921 ! 135: PREFETCH_I prefetch [%r20 + 0x0921], #one_read | |
5053 | fpinit_40_89: | |
5054 | nop | |
5055 | setx fp_data_quads, %r19, %r20 | |
5056 | ldd [%r20], %f0 | |
5057 | ldd [%r20+8], %f4 | |
5058 | ld [%r20+16], %fsr | |
5059 | ld [%r20+24], %r19 | |
5060 | wr %r19, %g0, %gsr | |
5061 | .word 0x87a80a44 ! 136: FCMPd fcmpd %fcc<n>, %f0, %f4 | |
5062 | br_badelay2_40_90: | |
5063 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
5064 | allclean | |
5065 | .word 0x95b40310 ! 137: ALIGNADDRESS alignaddr %r16, %r16, %r10 | |
5066 | .word 0xe137e060 ! 138: STQF_I - %f16, [0x0060, %r31] | |
5067 | fpinit_40_91: | |
5068 | nop | |
5069 | setx fp_data_quads, %r19, %r20 | |
5070 | ldd [%r20], %f0 | |
5071 | ldd [%r20+8], %f4 | |
5072 | ld [%r20+16], %fsr | |
5073 | ld [%r20+24], %r19 | |
5074 | wr %r19, %g0, %gsr | |
5075 | .word 0x87a80a44 ! 139: FCMPd fcmpd %fcc<n>, %f0, %f4 | |
5076 | .word 0x27400001 ! 1: FBPUL fbul,a,pn %fcc0, <label_0x1> | |
5077 | .word 0x8d90361a ! 140: WRPR_PSTATE_I wrpr %r0, 0x161a, %pstate | |
5078 | ibp_40_93: | |
5079 | nop | |
5080 | .word 0x95702e73 ! 141: POPC_I popc 0x0e73, %r10 | |
5081 | .word 0x99a000cb ! 142: FNEGd fnegd %f42, %f12 | |
5082 | set 0xdfe, %l3 | |
5083 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT | |
5084 | .word 0xa7b087d1 ! 143: PDIST pdistn %d2, %d48, %d50 | |
5085 | invalw | |
5086 | mov 0x32, %r30 | |
5087 | .word 0x93d0001e ! 144: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
5088 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl | |
5089 | reduce_priv_lvl_40_94: | |
5090 | ta T_CHANGE_NONPRIV ! macro | |
5091 | memptr_40_95: | |
5092 | set 0x60140000, %r31 | |
5093 | .word 0x8584a970 ! 146: WRCCR_I wr %r18, 0x0970, %ccr | |
5094 | dvapa_40_96: | |
5095 | nop | |
5096 | ta T_CHANGE_HPRIV | |
5097 | mov 0xe3a, %r20 | |
5098 | mov 0x15, %r19 | |
5099 | sllx %r20, 23, %r20 | |
5100 | or %r19, %r20, %r19 | |
5101 | stxa %r19, [%g0] ASI_LSU_CONTROL | |
5102 | mov 0x38, %r18 | |
5103 | stxa %r31, [%r18]0x58 | |
5104 | ta T_CHANGE_NONHPRIV | |
5105 | .word 0xe69fc02d ! 147: LDDA_R ldda [%r31, %r13] 0x01, %r19 | |
5106 | .word 0xa7850001 ! 148: WR_GRAPHICS_STATUS_REG_R wr %r20, %r1, %- | |
5107 | .word 0xe637e086 ! 149: STH_I sth %r19, [%r31 + 0x0086] | |
5108 | #if (defined SPC || defined CMP1) | |
5109 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_98) + 24, 16, 16)) -> intp(7,0,21) | |
5110 | #else | |
5111 | setx 0xdd083d62bf292d7d, %r1, %r28 | |
5112 | stxa %r28, [%g0] 0x73 | |
5113 | #endif | |
5114 | intvec_40_98: | |
5115 | .word 0x39400001 ! 150: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
5116 | intveclr_40_99: | |
5117 | nop | |
5118 | ta T_CHANGE_HPRIV | |
5119 | setx 0xe49f4ccc99fd2716, %r1, %r28 | |
5120 | stxa %r28, [%g0] 0x72 | |
5121 | ta T_CHANGE_NONHPRIV | |
5122 | .word 0x25400001 ! 151: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
5123 | .word 0xe6800c40 ! 152: LDUWA_R lduwa [%r0, %r0] 0x62, %r19 | |
5124 | .word 0xe62fe109 ! 153: STB_I stb %r19, [%r31 + 0x0109] | |
5125 | mondo_40_100: | |
5126 | nop | |
5127 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
5128 | stxa %r20, [%r0+0x3d8] %asi | |
5129 | .word 0x9d944007 ! 154: WRPR_WSTATE_R wrpr %r17, %r7, %wstate | |
5130 | .word 0x9950c000 ! 155: RDPR_TT <illegal instruction> | |
5131 | .word 0x3a800001 ! 156: BCC bcc,a <label_0x1> | |
5132 | brcommon2_40_101: | |
5133 | nop | |
5134 | setx common_target, %r12, %r27 | |
5135 | ba,a .+12 | |
5136 | .word 0x91b7c711 ! 1: FMULD8SUx16 fmuld8ulx16 %f31, %f17, %d8 | |
5137 | ba,a .+8 | |
5138 | jmpl %r27+0, %r27 | |
5139 | .word 0xc1bfe0a0 ! 157: STDFA_I stda %f0, [0x00a0, %r31] | |
5140 | tagged_40_102: | |
5141 | tsubcctv %r16, 0x1402, %r17 | |
5142 | .word 0xd407e1c2 ! 158: LDUW_I lduw [%r31 + 0x01c2], %r10 | |
5143 | splash_cmpr_40_103: | |
5144 | mov 0, %r18 | |
5145 | sllx %r18, 63, %r18 | |
5146 | rd %tick, %r17 | |
5147 | add %r17, 0x80, %r17 | |
5148 | or %r17, %r18, %r17 | |
5149 | .word 0xb3800011 ! 159: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
5150 | .word 0xd5e7c032 ! 160: CASA_I casa [%r31] 0x 1, %r18, %r10 | |
5151 | br_longdelay2_40_104: | |
5152 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
5153 | .word 0x87afca52 ! 161: FCMPd fcmpd %fcc<n>, %f62, %f18 | |
5154 | nop | |
5155 | ta T_CHANGE_HPRIV | |
5156 | mov 0x40+1, %r10 | |
5157 | set sync_thr_counter5, %r23 | |
5158 | #ifndef SPC | |
5159 | ldxa [%g0]0x63, %o1 | |
5160 | and %o1, 0x38, %o1 | |
5161 | add %o1, %r23, %r23 | |
5162 | sllx %o1, 5, %o3 !(CID*256) | |
5163 | #endif | |
5164 | cas [%r23],%g0,%r10 !lock | |
5165 | brnz %r10, cwq_40_105 | |
5166 | rd %asi, %r12 | |
5167 | wr %g0, 0x40, %asi | |
5168 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
5169 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
5170 | cmp %l1, 1 | |
5171 | bne cwq_40_105 | |
5172 | set CWQ_BASE, %l6 | |
5173 | #ifndef SPC | |
5174 | add %l6, %o3, %l6 | |
5175 | #endif | |
5176 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
5177 | best_set_reg(0x206100a0, %l1, %l2) !# Control Word | |
5178 | sllx %l2, 32, %l2 | |
5179 | stx %l2, [%l6 + 0x0] | |
5180 | membar #Sync | |
5181 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
5182 | sub %l2, 0x40, %l2 | |
5183 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
5184 | wr %r12, %g0, %asi | |
5185 | st %g0, [%r23] | |
5186 | cwq_40_105: | |
5187 | ta T_CHANGE_NONHPRIV | |
5188 | .word 0xa5414000 ! 162: RDPC rd %pc, %r18 | |
5189 | splash_hpstate_40_106: | |
5190 | ta T_CHANGE_NONHPRIV | |
5191 | .word 0x3e800001 ! 1: BVC bvc,a <label_0x1> | |
5192 | .word 0x81983fc7 ! 163: WRHPR_HPSTATE_I wrhpr %r0, 0x1fc7, %hpstate | |
5193 | trapasi_40_107: | |
5194 | nop | |
5195 | mov 0x20, %r1 ! (VA for ASI 0x5a) | |
5196 | .word 0xd4904b40 ! 164: LDUHA_R lduha [%r1, %r0] 0x5a, %r10 | |
5197 | .word 0xe1bfe160 ! 165: STDFA_I stda %f16, [0x0160, %r31] | |
5198 | splash_hpstate_40_108: | |
5199 | ta T_CHANGE_NONHPRIV | |
5200 | .word 0x81982ec7 ! 166: WRHPR_HPSTATE_I wrhpr %r0, 0x0ec7, %hpstate | |
5201 | otherw | |
5202 | mov 0xb5, %r30 | |
5203 | .word 0x83d0001e ! 167: Tcc_R te icc_or_xcc, %r0 + %r30 | |
5204 | .word 0x8d802000 ! 168: WRFPRS_I wr %r0, 0x0000, %fprs | |
5205 | .word 0xd43fe078 ! 169: STD_I std %r10, [%r31 + 0x0078] | |
5206 | jmptr_40_109: | |
5207 | nop | |
5208 | best_set_reg(0xe0200000, %r20, %r27) | |
5209 | .word 0xb7c6c000 ! 170: JMPL_R jmpl %r27 + %r0, %r27 | |
5210 | jmptr_40_110: | |
5211 | nop | |
5212 | best_set_reg(0xe0200000, %r20, %r27) | |
5213 | .word 0xb7c6c000 ! 171: JMPL_R jmpl %r27 + %r0, %r27 | |
5214 | nop | |
5215 | mov 0x80, %g3 | |
5216 | stxa %g3, [%g3] 0x5f | |
5217 | .word 0xd45fc000 ! 172: LDX_R ldx [%r31 + %r0], %r10 | |
5218 | iaw_40_111: | |
5219 | nop | |
5220 | ta T_CHANGE_HPRIV | |
5221 | mov 8, %r18 | |
5222 | rd %asi, %r12 | |
5223 | wr %r0, 0x41, %asi | |
5224 | set sync_thr_counter4, %r23 | |
5225 | #ifndef SPC | |
5226 | ldxa [%g0]0x63, %r8 | |
5227 | and %r8, 0x38, %r8 ! Core ID | |
5228 | add %r8, %r23, %r23 | |
5229 | #else | |
5230 | mov 0, %r8 | |
5231 | #endif | |
5232 | mov 0x40, %r16 | |
5233 | iaw_startwait40_111: | |
5234 | cas [%r23],%g0,%r16 !lock | |
5235 | brz,a %r16, continue_iaw_40_111 | |
5236 | mov (~0x40&0xf0), %r16 | |
5237 | ld [%r23], %r16 | |
5238 | iaw_wait40_111: | |
5239 | brnz %r16, iaw_wait40_111 | |
5240 | ld [%r23], %r16 | |
5241 | ba iaw_startwait40_111 | |
5242 | mov 0x40, %r16 | |
5243 | continue_iaw_40_111: | |
5244 | sllx %r16, %r8, %r16 !Mask for my core only | |
5245 | ldxa [0x58]%asi, %r17 !Running_status | |
5246 | wait_for_stat_40_111: | |
5247 | ldxa [0x50]%asi, %r13 !Running_rw | |
5248 | cmp %r13, %r17 | |
5249 | bne,a %xcc, wait_for_stat_40_111 | |
5250 | ldxa [0x58]%asi, %r17 !Running_status | |
5251 | stxa %r16, [0x68]%asi !Park (W1C) | |
5252 | ldxa [0x50]%asi, %r14 !Running_rw | |
5253 | wait_for_iaw_40_111: | |
5254 | ldxa [0x58]%asi, %r17 !Running_status | |
5255 | cmp %r14, %r17 | |
5256 | bne,a %xcc, wait_for_iaw_40_111 | |
5257 | ldxa [0x50]%asi, %r14 !Running_rw | |
5258 | iaw_doit40_111: | |
5259 | mov 0x38, %r18 | |
5260 | iaw4_40_111: | |
5261 | setx common_target, %r20, %r19 | |
5262 | or %r19, 0x1, %r19 | |
5263 | stxa %r19, [%r18]0x50 | |
5264 | stxa %r16, [0x60] %asi ! Unpark (W1S) | |
5265 | st %g0, [%r23] !clear lock | |
5266 | wr %r0, %r12, %asi ! restore %asi | |
5267 | ta T_CHANGE_NONHPRIV | |
5268 | .word 0xc19fe160 ! 173: LDDFA_I ldda [%r31, 0x0160], %f0 | |
5269 | .word 0xd51fe138 ! 174: LDDF_I ldd [%r31, 0x0138], %f10 | |
5270 | .word 0xd44fe048 ! 175: LDSB_I ldsb [%r31 + 0x0048], %r10 | |
5271 | .word 0x91940010 ! 176: WRPR_PIL_R wrpr %r16, %r16, %pil | |
5272 | trapasi_40_113: | |
5273 | nop | |
5274 | mov 0x0, %r1 ! (VA for ASI 0x4c) | |
5275 | .word 0xd4c84980 ! 177: LDSBA_R ldsba [%r1, %r0] 0x4c, %r10 | |
5276 | intveclr_40_114: | |
5277 | nop | |
5278 | ta T_CHANGE_HPRIV | |
5279 | setx 0x4f33151ca4a75faf, %r1, %r28 | |
5280 | stxa %r28, [%g0] 0x72 | |
5281 | ta T_CHANGE_NONHPRIV | |
5282 | .word 0x25400001 ! 178: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
5283 | ibp_40_115: | |
5284 | nop | |
5285 | .word 0xc1bfe180 ! 179: STDFA_I stda %f0, [0x0180, %r31] | |
5286 | .word 0xc30fc000 ! 180: LDXFSR_R ld-fsr [%r31, %r0], %f1 | |
5287 | nop | |
5288 | ta T_CHANGE_HPRIV | |
5289 | mov 0x40+1, %r10 | |
5290 | set sync_thr_counter5, %r23 | |
5291 | #ifndef SPC | |
5292 | ldxa [%g0]0x63, %o1 | |
5293 | and %o1, 0x38, %o1 | |
5294 | add %o1, %r23, %r23 | |
5295 | sllx %o1, 5, %o3 !(CID*256) | |
5296 | #endif | |
5297 | cas [%r23],%g0,%r10 !lock | |
5298 | brnz %r10, cwq_40_116 | |
5299 | rd %asi, %r12 | |
5300 | wr %g0, 0x40, %asi | |
5301 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
5302 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
5303 | cmp %l1, 1 | |
5304 | bne cwq_40_116 | |
5305 | set CWQ_BASE, %l6 | |
5306 | #ifndef SPC | |
5307 | add %l6, %o3, %l6 | |
5308 | #endif | |
5309 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
5310 | best_set_reg(0x20610020, %l1, %l2) !# Control Word | |
5311 | sllx %l2, 32, %l2 | |
5312 | stx %l2, [%l6 + 0x0] | |
5313 | membar #Sync | |
5314 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
5315 | sub %l2, 0x40, %l2 | |
5316 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
5317 | wr %r12, %g0, %asi | |
5318 | st %g0, [%r23] | |
5319 | cwq_40_116: | |
5320 | ta T_CHANGE_NONHPRIV | |
5321 | .word 0x99414000 ! 181: RDPC rd %pc, %r12 | |
5322 | splash_cmpr_40_117: | |
5323 | mov 1, %r18 | |
5324 | sllx %r18, 63, %r18 | |
5325 | rd %tick, %r17 | |
5326 | add %r17, 0x50, %r17 | |
5327 | or %r17, %r18, %r17 | |
5328 | ta T_CHANGE_PRIV | |
5329 | .word 0xb3800011 ! 182: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
5330 | intveclr_40_118: | |
5331 | nop | |
5332 | ta T_CHANGE_HPRIV | |
5333 | setx 0xd002c562da68a75a, %r1, %r28 | |
5334 | stxa %r28, [%g0] 0x72 | |
5335 | .word 0x25400001 ! 183: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
5336 | .word 0xe0dfe038 ! 184: LDXA_I ldxa [%r31, + 0x0038] %asi, %r16 | |
5337 | intveclr_40_119: | |
5338 | nop | |
5339 | ta T_CHANGE_HPRIV | |
5340 | setx 0x4a6561a2fb78120b, %r1, %r28 | |
5341 | stxa %r28, [%g0] 0x72 | |
5342 | .word 0x25400001 ! 185: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
5343 | #if (defined SPC || defined CMP1) | |
5344 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_120) + 40, 16, 16)) -> intp(5,0,7) | |
5345 | #else | |
5346 | setx 0x41a5092e9cbc85d8, %r1, %r28 | |
5347 | stxa %r28, [%g0] 0x73 | |
5348 | #endif | |
5349 | intvec_40_120: | |
5350 | .word 0x39400001 ! 186: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
5351 | set 0x1a72, %l3 | |
5352 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT | |
5353 | .word 0x95b087cb ! 187: PDIST pdistn %d2, %d42, %d10 | |
5354 | otherw | |
5355 | mov 0xb4, %r30 | |
5356 | .word 0x91d0001e ! 188: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
5357 | .word 0xa7840005 ! 189: WR_GRAPHICS_STATUS_REG_R wr %r16, %r5, %- | |
5358 | .word 0xda97e048 ! 190: LDUHA_I lduha [%r31, + 0x0048] %asi, %r13 | |
5359 | .word 0x879c6060 ! 191: WRHPR_HINTP_I wrhpr %r17, 0x0060, %hintp | |
5360 | .word 0x83d020b3 ! 192: Tcc_I te icc_or_xcc, %r0 + 179 | |
5361 | .word 0xa7850003 ! 193: WR_GRAPHICS_STATUS_REG_R wr %r20, %r3, %- | |
5362 | dvapa_40_123: | |
5363 | nop | |
5364 | ta T_CHANGE_HPRIV | |
5365 | mov 0xeac, %r20 | |
5366 | mov 0x2, %r19 | |
5367 | sllx %r20, 23, %r20 | |
5368 | or %r19, %r20, %r19 | |
5369 | stxa %r19, [%g0] ASI_LSU_CONTROL | |
5370 | mov 0x38, %r18 | |
5371 | stxa %r31, [%r18]0x58 | |
5372 | ta T_CHANGE_NONHPRIV | |
5373 | .word 0x95b50492 ! 194: FCMPLE32 fcmple32 %d20, %d18, %r10 | |
5374 | brcommon3_40_124: | |
5375 | nop | |
5376 | setx common_target, %r12, %r27 | |
5377 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
5378 | ba,a .+12 | |
5379 | .word 0xd3e7c031 ! 1: CASA_I casa [%r31] 0x 1, %r17, %r9 | |
5380 | ba,a .+8 | |
5381 | jmpl %r27+0, %r27 | |
5382 | .word 0xd2dfc02d ! 195: LDXA_R ldxa [%r31, %r13] 0x01, %r9 | |
5383 | .word 0xc30fc000 ! 196: LDXFSR_R ld-fsr [%r31, %r0], %f1 | |
5384 | dvapa_40_125: | |
5385 | nop | |
5386 | ta T_CHANGE_HPRIV | |
5387 | mov 0xd7c, %r20 | |
5388 | mov 0x6, %r19 | |
5389 | sllx %r20, 23, %r20 | |
5390 | or %r19, %r20, %r19 | |
5391 | stxa %r19, [%g0] ASI_LSU_CONTROL | |
5392 | mov 0x38, %r18 | |
5393 | stxa %r31, [%r18]0x58 | |
5394 | ta T_CHANGE_NONHPRIV | |
5395 | .word 0xc3ec0025 ! 197: PREFETCHA_R prefetcha [%r16, %r5] 0x01, #one_read | |
5396 | memptr_40_126: | |
5397 | set user_data_start, %r31 | |
5398 | .word 0x8584a8b7 ! 198: WRCCR_I wr %r18, 0x08b7, %ccr | |
5399 | iaw_40_127: | |
5400 | nop | |
5401 | ta T_CHANGE_HPRIV | |
5402 | mov 8, %r18 | |
5403 | rd %asi, %r12 | |
5404 | wr %r0, 0x41, %asi | |
5405 | set sync_thr_counter4, %r23 | |
5406 | #ifndef SPC | |
5407 | ldxa [%g0]0x63, %r8 | |
5408 | and %r8, 0x38, %r8 ! Core ID | |
5409 | add %r8, %r23, %r23 | |
5410 | #else | |
5411 | mov 0, %r8 | |
5412 | #endif | |
5413 | mov 0x40, %r16 | |
5414 | iaw_startwait40_127: | |
5415 | cas [%r23],%g0,%r16 !lock | |
5416 | brz,a %r16, continue_iaw_40_127 | |
5417 | mov (~0x40&0xf0), %r16 | |
5418 | ld [%r23], %r16 | |
5419 | iaw_wait40_127: | |
5420 | brnz %r16, iaw_wait40_127 | |
5421 | ld [%r23], %r16 | |
5422 | ba iaw_startwait40_127 | |
5423 | mov 0x40, %r16 | |
5424 | continue_iaw_40_127: | |
5425 | sllx %r16, %r8, %r16 !Mask for my core only | |
5426 | ldxa [0x58]%asi, %r17 !Running_status | |
5427 | wait_for_stat_40_127: | |
5428 | ldxa [0x50]%asi, %r13 !Running_rw | |
5429 | cmp %r13, %r17 | |
5430 | bne,a %xcc, wait_for_stat_40_127 | |
5431 | ldxa [0x58]%asi, %r17 !Running_status | |
5432 | stxa %r16, [0x68]%asi !Park (W1C) | |
5433 | ldxa [0x50]%asi, %r14 !Running_rw | |
5434 | wait_for_iaw_40_127: | |
5435 | ldxa [0x58]%asi, %r17 !Running_status | |
5436 | cmp %r14, %r17 | |
5437 | bne,a %xcc, wait_for_iaw_40_127 | |
5438 | ldxa [0x50]%asi, %r14 !Running_rw | |
5439 | iaw_doit40_127: | |
5440 | mov 0x38, %r18 | |
5441 | iaw4_40_127: | |
5442 | setx common_target, %r20, %r19 | |
5443 | or %r19, 0x1, %r19 | |
5444 | stxa %r19, [%r18]0x50 | |
5445 | stxa %r16, [0x60] %asi ! Unpark (W1S) | |
5446 | st %g0, [%r23] !clear lock | |
5447 | wr %r0, %r12, %asi ! restore %asi | |
5448 | ta T_CHANGE_NONHPRIV | |
5449 | .word 0xe19fe020 ! 199: LDDFA_I ldda [%r31, 0x0020], %f16 | |
5450 | trapasi_40_128: | |
5451 | nop | |
5452 | mov 0x0, %r1 ! (VA for ASI 0x73) | |
5453 | .word 0xe0884e60 ! 200: LDUBA_R lduba [%r1, %r0] 0x73, %r16 | |
5454 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl | |
5455 | reduce_priv_lvl_40_129: | |
5456 | ta T_CHANGE_NONHPRIV ! macro | |
5457 | nop | |
5458 | nop | |
5459 | ta T_CHANGE_PRIV | |
5460 | wrpr %g0, %g0, %gl | |
5461 | nop | |
5462 | nop | |
5463 | setx join_lbl_0_0, %g1, %g2 | |
5464 | jmp %g2 | |
5465 | nop | |
5466 | fork_lbl_0_6: | |
5467 | ta T_CHANGE_NONHPRIV | |
5468 | .word 0xe0800b00 ! 1: LDUWA_R lduwa [%r0, %r0] 0x58, %r16 | |
5469 | .word 0xe19fd960 ! 2: LDDFA_R ldda [%r31, %r0], %f16 | |
5470 | .word 0xe08008a0 ! 3: LDUWA_R lduwa [%r0, %r0] 0x45, %r16 | |
5471 | .word 0x89800011 ! 4: WRTICK_R wr %r0, %r17, %tick | |
5472 | .word 0x8d802004 ! 5: WRFPRS_I wr %r0, 0x0004, %fprs | |
5473 | .word 0x29400001 ! 1: FBPL fbl,a,pn %fcc0, <label_0x1> | |
5474 | .word 0x8d9033c8 ! 6: WRPR_PSTATE_I wrpr %r0, 0x13c8, %pstate | |
5475 | .word 0xe0bfc020 ! 7: STDA_R stda %r16, [%r31 + %r0] 0x01 | |
5476 | #if (defined SPC || defined CMP1) | |
5477 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_2) + 40, 16, 16)) -> intp(6,0,10) | |
5478 | #else | |
5479 | setx 0xe0af905dd5df8bcf, %r1, %r28 | |
5480 | stxa %r28, [%g0] 0x73 | |
5481 | #endif | |
5482 | intvec_20_2: | |
5483 | .word 0x39400001 ! 8: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
5484 | .word 0xc32fc000 ! 9: STXFSR_R st-sfr %f1, [%r0, %r31] | |
5485 | splash_lsu_20_3: | |
5486 | nop | |
5487 | ta T_CHANGE_HPRIV | |
5488 | set 0x90561031, %r2 | |
5489 | mov 0x7, %r1 | |
5490 | sllx %r1, 32, %r1 | |
5491 | or %r1, %r2, %r2 | |
5492 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
5493 | ta T_CHANGE_NONHPRIV | |
5494 | .word 0x3d400001 ! 10: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
5495 | .word 0x2a780001 ! 11: BPCS <illegal instruction> | |
5496 | .word 0xa7844003 ! 12: WR_GRAPHICS_STATUS_REG_R wr %r17, %r3, %- | |
5497 | fpinit_20_5: | |
5498 | nop | |
5499 | setx fp_data_quads, %r19, %r20 | |
5500 | ldd [%r20], %f0 | |
5501 | ldd [%r20+8], %f4 | |
5502 | ld [%r20+16], %fsr | |
5503 | ld [%r20+24], %r19 | |
5504 | wr %r19, %g0, %gsr | |
5505 | .word 0x87a80a44 ! 13: FCMPd fcmpd %fcc<n>, %f0, %f4 | |
5506 | invalw | |
5507 | mov 0xb4, %r30 | |
5508 | .word 0x91d0001e ! 14: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
5509 | .word 0x87998002 ! 15: WRHPR_HINTP_R wrhpr %r6, %r2, %hintp | |
5510 | .word 0xa770321e ! 16: POPC_I popc 0x121e, %r19 | |
5511 | .word 0x87802089 ! 17: WRASI_I wr %r0, 0x0089, %asi | |
5512 | .word 0x97a049c4 ! 18: FDIVd fdivd %f32, %f4, %f42 | |
5513 | .word 0xa3a00170 ! 19: FABSq dis not found | |
5514 | ||
5515 | .word 0xe49fe010 ! 20: LDDA_I ldda [%r31, + 0x0010] %asi, %r18 | |
5516 | .word 0xe44fe018 ! 21: LDSB_I ldsb [%r31 + 0x0018], %r18 | |
5517 | memptr_20_8: | |
5518 | set 0x60340000, %r31 | |
5519 | .word 0x858429b4 ! 22: WRCCR_I wr %r16, 0x09b4, %ccr | |
5520 | splash_tba_20_9: | |
5521 | nop | |
5522 | ta T_CHANGE_PRIV | |
5523 | setx 0x00000004003a0000, %r11, %r12 | |
5524 | .word 0x8b90000c ! 23: WRPR_TBA_R wrpr %r0, %r12, %tba | |
5525 | nop | |
5526 | ta T_CHANGE_HPRIV | |
5527 | mov 0x20+1, %r10 | |
5528 | set sync_thr_counter5, %r23 | |
5529 | #ifndef SPC | |
5530 | ldxa [%g0]0x63, %o1 | |
5531 | and %o1, 0x38, %o1 | |
5532 | add %o1, %r23, %r23 | |
5533 | sllx %o1, 5, %o3 !(CID*256) | |
5534 | #endif | |
5535 | cas [%r23],%g0,%r10 !lock | |
5536 | brnz %r10, cwq_20_10 | |
5537 | rd %asi, %r12 | |
5538 | wr %g0, 0x40, %asi | |
5539 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
5540 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
5541 | cmp %l1, 1 | |
5542 | bne cwq_20_10 | |
5543 | set CWQ_BASE, %l6 | |
5544 | #ifndef SPC | |
5545 | add %l6, %o3, %l6 | |
5546 | #endif | |
5547 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
5548 | best_set_reg(0x20610070, %l1, %l2) !# Control Word | |
5549 | sllx %l2, 32, %l2 | |
5550 | stx %l2, [%l6 + 0x0] | |
5551 | membar #Sync | |
5552 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
5553 | sub %l2, 0x40, %l2 | |
5554 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
5555 | wr %r12, %g0, %asi | |
5556 | st %g0, [%r23] | |
5557 | cwq_20_10: | |
5558 | ta T_CHANGE_NONHPRIV | |
5559 | .word 0xa3414000 ! 24: RDPC rd %pc, %r17 | |
5560 | .word 0x8d903862 ! 25: WRPR_PSTATE_I wrpr %r0, 0x1862, %pstate | |
5561 | brcommon1_20_12: | |
5562 | nop | |
5563 | setx common_target, %r12, %r27 | |
5564 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
5565 | ba,a .+12 | |
5566 | .word 0xa1702010 ! 1: POPC_I popc 0x0010, %r16 | |
5567 | ba,a .+8 | |
5568 | jmpl %r27+0, %r27 | |
5569 | .word 0xc3ea0024 ! 26: PREFETCHA_R prefetcha [%r8, %r4] 0x01, #one_read | |
5570 | intveclr_20_13: | |
5571 | nop | |
5572 | ta T_CHANGE_HPRIV | |
5573 | setx 0x69614f46d6d905ac, %r1, %r28 | |
5574 | stxa %r28, [%g0] 0x72 | |
5575 | ta T_CHANGE_NONHPRIV | |
5576 | .word 0x25400001 ! 27: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
5577 | splash_lsu_20_14: | |
5578 | nop | |
5579 | ta T_CHANGE_HPRIV | |
5580 | set 0x2abc23c4, %r2 | |
5581 | mov 0x2, %r1 | |
5582 | sllx %r1, 32, %r1 | |
5583 | or %r1, %r2, %r2 | |
5584 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
5585 | ta T_CHANGE_NONHPRIV | |
5586 | .word 0x3d400001 ! 28: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
5587 | splash_cmpr_20_15: | |
5588 | mov 0, %r18 | |
5589 | sllx %r18, 63, %r18 | |
5590 | rd %tick, %r17 | |
5591 | add %r17, 0x100, %r17 | |
5592 | or %r17, %r18, %r17 | |
5593 | ta T_CHANGE_HPRIV | |
5594 | wrhpr %r17, %g0, %hsys_tick_cmpr | |
5595 | .word 0xb3800011 ! 29: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
5596 | brcommon1_20_16: | |
5597 | nop | |
5598 | setx common_target, %r12, %r27 | |
5599 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
5600 | ba,a .+12 | |
5601 | .word 0xa9b7c7c8 ! 1: PDIST pdistn %d62, %d8, %d20 | |
5602 | ba,a .+8 | |
5603 | jmpl %r27+0, %r27 | |
5604 | .word 0xc3eac030 ! 30: PREFETCHA_R prefetcha [%r11, %r16] 0x01, #one_read | |
5605 | .word 0xd03fc000 ! 31: STD_R std %r8, [%r31 + %r0] | |
5606 | splash_tba_20_17: | |
5607 | nop | |
5608 | ta T_CHANGE_PRIV | |
5609 | setx 0x00000004003a0000, %r11, %r12 | |
5610 | .word 0x8b90000c ! 32: WRPR_TBA_R wrpr %r0, %r12, %tba | |
5611 | ibp_20_18: | |
5612 | nop | |
5613 | .word 0xd1e7e011 ! 33: CASA_R casa [%r31] %asi, %r17, %r8 | |
5614 | .word 0xd127c000 ! 34: STF_R st %f8, [%r0, %r31] | |
5615 | .word 0xd0c7e168 ! 35: LDSWA_I ldswa [%r31, + 0x0168] %asi, %r8 | |
5616 | ibp_20_19: | |
5617 | nop | |
5618 | .word 0xd13fc011 ! 36: STDF_R std %f8, [%r17, %r31] | |
5619 | splash_cmpr_20_20: | |
5620 | mov 0, %r18 | |
5621 | sllx %r18, 63, %r18 | |
5622 | rd %tick, %r17 | |
5623 | add %r17, 0x70, %r17 | |
5624 | or %r17, %r18, %r17 | |
5625 | .word 0xb3800011 ! 37: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
5626 | .word 0xc19fe080 ! 38: LDDFA_I ldda [%r31, 0x0080], %f0 | |
5627 | nop | |
5628 | ta T_CHANGE_HPRIV | |
5629 | mov 0x20+1, %r10 | |
5630 | set sync_thr_counter5, %r23 | |
5631 | #ifndef SPC | |
5632 | ldxa [%g0]0x63, %o1 | |
5633 | and %o1, 0x38, %o1 | |
5634 | add %o1, %r23, %r23 | |
5635 | sllx %o1, 5, %o3 !(CID*256) | |
5636 | #endif | |
5637 | cas [%r23],%g0,%r10 !lock | |
5638 | brnz %r10, cwq_20_21 | |
5639 | rd %asi, %r12 | |
5640 | wr %g0, 0x40, %asi | |
5641 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
5642 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
5643 | cmp %l1, 1 | |
5644 | bne cwq_20_21 | |
5645 | set CWQ_BASE, %l6 | |
5646 | #ifndef SPC | |
5647 | add %l6, %o3, %l6 | |
5648 | #endif | |
5649 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
5650 | best_set_reg(0x20610070, %l1, %l2) !# Control Word | |
5651 | sllx %l2, 32, %l2 | |
5652 | stx %l2, [%l6 + 0x0] | |
5653 | membar #Sync | |
5654 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
5655 | sub %l2, 0x40, %l2 | |
5656 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
5657 | wr %r12, %g0, %asi | |
5658 | st %g0, [%r23] | |
5659 | cwq_20_21: | |
5660 | ta T_CHANGE_NONHPRIV | |
5661 | .word 0x9b414000 ! 39: RDPC rd %pc, %r13 | |
5662 | unsupttte_20_22: | |
5663 | nop | |
5664 | ta T_CHANGE_HPRIV | |
5665 | mov 1, %r20 | |
5666 | sllx %r20, 63, %r20 | |
5667 | or %r20, 2,%r20 | |
5668 | stxa %r20, [%g0]0x5c ! D unsupported page size .. | |
5669 | ta T_CHANGE_NONHPRIV | |
5670 | .word 0x91a349d2 ! 40: FDIVd fdivd %f44, %f18, %f8 | |
5671 | jmptr_20_23: | |
5672 | nop | |
5673 | best_set_reg(0xe1a00000, %r20, %r27) | |
5674 | .word 0xb7c6c000 ! 41: JMPL_R jmpl %r27 + %r0, %r27 | |
5675 | .word 0x97508000 ! 42: RDPR_TSTATE <illegal instruction> | |
5676 | .word 0xe6dfe0a0 ! 43: LDXA_I ldxa [%r31, + 0x00a0] %asi, %r19 | |
5677 | .word 0xa9703b46 ! 44: POPC_I popc 0x1b46, %r20 | |
5678 | fbge skip_20_25 | |
5679 | fbne,a,pn %fcc0, skip_20_25 | |
5680 | .align 128 | |
5681 | skip_20_25: | |
5682 | .word 0x9f803c11 ! 45: SIR sir 0x1c11 | |
5683 | br_longdelay4_20_26: | |
5684 | nop | |
5685 | not %g0, %r12 | |
5686 | jmp %r12 | |
5687 | .word 0x9d902005 ! 46: WRPR_WSTATE_I wrpr %r0, 0x0005, %wstate | |
5688 | setx 0x652c86ffe3fecb95, %r1, %r28 | |
5689 | stxa %r28, [%g0] 0x73 | |
5690 | intvec_20_27: | |
5691 | .word 0x39400001 ! 47: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
5692 | unsupttte_20_28: | |
5693 | nop | |
5694 | ta T_CHANGE_HPRIV | |
5695 | mov 1, %r20 | |
5696 | sllx %r20, 63, %r20 | |
5697 | or %r20, 2,%r20 | |
5698 | stxa %r20, [%g0]0x5c ! D unsupported page size .. | |
5699 | ta T_CHANGE_NONHPRIV | |
5700 | .word 0x87aaca4a ! 48: FCMPd fcmpd %fcc<n>, %f42, %f10 | |
5701 | .word 0xe677c000 ! 49: STX_R stx %r19, [%r31 + %r0] | |
5702 | intveclr_20_29: | |
5703 | nop | |
5704 | ta T_CHANGE_HPRIV | |
5705 | setx 0xdf903d4772088b49, %r1, %r28 | |
5706 | stxa %r28, [%g0] 0x72 | |
5707 | ta T_CHANGE_NONHPRIV | |
5708 | .word 0x25400001 ! 50: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
5709 | mondo_20_30: | |
5710 | nop | |
5711 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
5712 | ta T_CHANGE_PRIV | |
5713 | stxa %r16, [%r0+0x3d0] %asi | |
5714 | .word 0x9d90c006 ! 51: WRPR_WSTATE_R wrpr %r3, %r6, %wstate | |
5715 | .word 0xe63fe0c6 ! 52: STD_I std %r19, [%r31 + 0x00c6] | |
5716 | .word 0xa784fac8 ! 53: WR_GRAPHICS_STATUS_REG_I wr %r19, 0x1ac8, %- | |
5717 | .word 0xe71fc000 ! 54: LDDF_R ldd [%r31, %r0], %f19 | |
5718 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
5719 | .word 0x8d903bd1 ! 55: WRPR_PSTATE_I wrpr %r0, 0x1bd1, %pstate | |
5720 | splash_tba_20_32: | |
5721 | nop | |
5722 | ta T_CHANGE_PRIV | |
5723 | set 0x120000, %r12 | |
5724 | .word 0x8b90000c ! 56: WRPR_TBA_R wrpr %r0, %r12, %tba | |
5725 | unsupttte_20_33: | |
5726 | nop | |
5727 | ta T_CHANGE_HPRIV | |
5728 | mov 1, %r20 | |
5729 | sllx %r20, 63, %r20 | |
5730 | or %r20, 2,%r20 | |
5731 | stxa %r20, [%g0]0x54 ! I unsupported page size .. | |
5732 | ta T_CHANGE_NONHPRIV | |
5733 | .word 0xa3a489a1 ! 57: FDIVs fdivs %f18, %f1, %f17 | |
5734 | .word 0x89800011 ! 58: WRTICK_R wr %r0, %r17, %tick | |
5735 | ibp_20_35: | |
5736 | nop | |
5737 | .word 0xe89fc029 ! 59: LDDA_R ldda [%r31, %r9] 0x01, %r20 | |
5738 | .word 0xe8cfe1b8 ! 60: LDSBA_I ldsba [%r31, + 0x01b8] %asi, %r20 | |
5739 | .word 0xa3703972 ! 61: POPC_I popc 0x1972, %r17 | |
5740 | ceter_20_37: | |
5741 | nop | |
5742 | ta T_CHANGE_HPRIV | |
5743 | mov 7, %r17 | |
5744 | sllx %r17, 60, %r17 | |
5745 | mov 0x18, %r16 | |
5746 | stxa %r17, [%r16]0x4c | |
5747 | ta T_CHANGE_NONHPRIV | |
5748 | .word 0x95410000 ! 62: RDTICK rd %tick, %r10 | |
5749 | .word 0xd31fe030 ! 63: LDDF_I ldd [%r31, 0x0030], %f9 | |
5750 | mondo_20_39: | |
5751 | nop | |
5752 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
5753 | stxa %r10, [%r0+0x3d0] %asi | |
5754 | .word 0x9d94400d ! 64: WRPR_WSTATE_R wrpr %r17, %r13, %wstate | |
5755 | bg,a skip_20_40 | |
5756 | fbl skip_20_40 | |
5757 | .align 2048 | |
5758 | skip_20_40: | |
5759 | .word 0xc30fc000 ! 65: LDXFSR_R ld-fsr [%r31, %r0], %f1 | |
5760 | fpinit_20_41: | |
5761 | nop | |
5762 | setx fp_data_quads, %r19, %r20 | |
5763 | ldd [%r20], %f0 | |
5764 | ldd [%r20+8], %f4 | |
5765 | ld [%r20+16], %fsr | |
5766 | ld [%r20+24], %r19 | |
5767 | wr %r19, %g0, %gsr | |
5768 | .word 0x89a009a4 ! 66: FDIVs fdivs %f0, %f4, %f4 | |
5769 | nop | |
5770 | ta T_CHANGE_HPRIV ! macro | |
5771 | donret_20_42: | |
5772 | rd %pc, %r12 | |
5773 | add %r12, (donretarg_20_42-donret_20_42+4), %r12 | |
5774 | add %r12, 0x4, %r11 ! seq tnpc | |
5775 | wrpr %g0, 0x1, %tl | |
5776 | wrpr %g0, %r12, %tpc | |
5777 | wrpr %g0, %r11, %tnpc | |
5778 | set (0x00c5d700 | (0x4f << 24)), %r13 | |
5779 | and %r12, 0xfff, %r14 | |
5780 | sllx %r14, 30, %r14 | |
5781 | or %r13, %r14, %r20 | |
5782 | wrpr %r20, %g0, %tstate | |
5783 | wrhpr %g0, 0xfc9, %htstate | |
5784 | ta T_CHANGE_NONHPRIV ! rand=1 (20) | |
5785 | retry | |
5786 | donretarg_20_42: | |
5787 | .word 0xd26fe080 ! 67: LDSTUB_I ldstub %r9, [%r31 + 0x0080] | |
5788 | ibp_20_43: | |
5789 | nop | |
5790 | .word 0xa7a4c9b0 ! 68: FDIVs fdivs %f19, %f16, %f19 | |
5791 | splash_tba_20_44: | |
5792 | nop | |
5793 | ta T_CHANGE_PRIV | |
5794 | set 0x120000, %r12 | |
5795 | .word 0x8b90000c ! 69: WRPR_TBA_R wrpr %r0, %r12, %tba | |
5796 | jmptr_20_45: | |
5797 | nop | |
5798 | best_set_reg(0xe1a00000, %r20, %r27) | |
5799 | .word 0xb7c6c000 ! 70: JMPL_R jmpl %r27 + %r0, %r27 | |
5800 | .word 0xe6dfe180 ! 71: LDXA_I ldxa [%r31, + 0x0180] %asi, %r19 | |
5801 | .word 0xe737e0c1 ! 72: STQF_I - %f19, [0x00c1, %r31] | |
5802 | nop | |
5803 | mov 0x80, %g3 | |
5804 | stxa %g3, [%g3] 0x57 | |
5805 | .word 0xe65fc000 ! 73: LDX_R ldx [%r31 + %r0], %r19 | |
5806 | set 0x16b2, %l3 | |
5807 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT | |
5808 | .word 0xa1b4c7c3 ! 74: PDIST pdistn %d50, %d34, %d16 | |
5809 | .word 0xd22fe174 ! 75: STB_I stb %r9, [%r31 + 0x0174] | |
5810 | nop | |
5811 | mov 0x80, %g3 | |
5812 | stxa %g3, [%g3] 0x57 | |
5813 | .word 0xd25fc000 ! 76: LDX_R ldx [%r31 + %r0], %r9 | |
5814 | .word 0x9194c013 ! 77: WRPR_PIL_R wrpr %r19, %r19, %pil | |
5815 | .word 0xd29fe050 ! 78: LDDA_I ldda [%r31, + 0x0050] %asi, %r9 | |
5816 | .word 0x83d02033 ! 79: Tcc_I te icc_or_xcc, %r0 + 51 | |
5817 | .word 0x89800011 ! 80: WRTICK_R wr %r0, %r17, %tick | |
5818 | splash_tba_20_49: | |
5819 | nop | |
5820 | ta T_CHANGE_PRIV | |
5821 | setx 0x00000004003a0000, %r11, %r12 | |
5822 | .word 0x8b90000c ! 81: WRPR_TBA_R wrpr %r0, %r12, %tba | |
5823 | intveclr_20_50: | |
5824 | nop | |
5825 | ta T_CHANGE_HPRIV | |
5826 | setx 0x32f6c0d2643b6bae, %r1, %r28 | |
5827 | stxa %r28, [%g0] 0x72 | |
5828 | .word 0x25400001 ! 82: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
5829 | nop | |
5830 | mov 0x80, %g3 | |
5831 | stxa %g3, [%g3] 0x5f | |
5832 | .word 0xd25fc000 ! 83: LDX_R ldx [%r31 + %r0], %r9 | |
5833 | .word 0xd337e192 ! 84: STQF_I - %f9, [0x0192, %r31] | |
5834 | memptr_20_51: | |
5835 | set user_data_start, %r31 | |
5836 | .word 0x85843954 ! 85: WRCCR_I wr %r16, 0x1954, %ccr | |
5837 | invalw | |
5838 | mov 0xb0, %r30 | |
5839 | .word 0x91d0001e ! 86: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
5840 | .word 0xd327c000 ! 87: STF_R st %f9, [%r0, %r31] | |
5841 | jmptr_20_52: | |
5842 | nop | |
5843 | best_set_reg(0xe1a00000, %r20, %r27) | |
5844 | .word 0xb7c6c000 ! 88: JMPL_R jmpl %r27 + %r0, %r27 | |
5845 | setx 0xb83f66312b07aaa2, %r1, %r28 | |
5846 | stxa %r28, [%g0] 0x73 | |
5847 | intvec_20_53: | |
5848 | .word 0x39400001 ! 89: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
5849 | jmptr_20_54: | |
5850 | nop | |
5851 | best_set_reg(0xe1a00000, %r20, %r27) | |
5852 | .word 0xb7c6c000 ! 90: JMPL_R jmpl %r27 + %r0, %r27 | |
5853 | pmu_20_55: | |
5854 | nop | |
5855 | setx 0xfffff0e3fffffead, %g1, %g7 | |
5856 | .word 0xa3800007 ! 91: WR_PERF_COUNTER_R wr %r0, %r7, %- | |
5857 | .word 0xd28008a0 ! 92: LDUWA_R lduwa [%r0, %r0] 0x45, %r9 | |
5858 | nop | |
5859 | ta T_CHANGE_HPRIV | |
5860 | mov 0x20+1, %r10 | |
5861 | set sync_thr_counter5, %r23 | |
5862 | #ifndef SPC | |
5863 | ldxa [%g0]0x63, %o1 | |
5864 | and %o1, 0x38, %o1 | |
5865 | add %o1, %r23, %r23 | |
5866 | sllx %o1, 5, %o3 !(CID*256) | |
5867 | #endif | |
5868 | cas [%r23],%g0,%r10 !lock | |
5869 | brnz %r10, cwq_20_56 | |
5870 | rd %asi, %r12 | |
5871 | wr %g0, 0x40, %asi | |
5872 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
5873 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
5874 | cmp %l1, 1 | |
5875 | bne cwq_20_56 | |
5876 | set CWQ_BASE, %l6 | |
5877 | #ifndef SPC | |
5878 | add %l6, %o3, %l6 | |
5879 | #endif | |
5880 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
5881 | best_set_reg(0x206100c0, %l1, %l2) !# Control Word | |
5882 | sllx %l2, 32, %l2 | |
5883 | stx %l2, [%l6 + 0x0] | |
5884 | membar #Sync | |
5885 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
5886 | sub %l2, 0x40, %l2 | |
5887 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
5888 | wr %r12, %g0, %asi | |
5889 | st %g0, [%r23] | |
5890 | cwq_20_56: | |
5891 | ta T_CHANGE_NONHPRIV | |
5892 | .word 0xa5414000 ! 93: RDPC rd %pc, %r18 | |
5893 | brcommon3_20_57: | |
5894 | nop | |
5895 | setx common_target, %r12, %r27 | |
5896 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
5897 | ba,a .+12 | |
5898 | .word 0xe06fe1f0 ! 1: LDSTUB_I ldstub %r16, [%r31 + 0x01f0] | |
5899 | ba,a .+8 | |
5900 | jmpl %r27+0, %r27 | |
5901 | .word 0xe09fc032 ! 94: LDDA_R ldda [%r31, %r18] 0x01, %r16 | |
5902 | splash_lsu_20_58: | |
5903 | nop | |
5904 | ta T_CHANGE_HPRIV | |
5905 | set 0x8afad2ee, %r2 | |
5906 | mov 0x1, %r1 | |
5907 | sllx %r1, 32, %r1 | |
5908 | or %r1, %r2, %r2 | |
5909 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
5910 | ta T_CHANGE_NONHPRIV | |
5911 | .word 0x3d400001 ! 95: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
5912 | mondo_20_59: | |
5913 | nop | |
5914 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
5915 | ta T_CHANGE_PRIV | |
5916 | stxa %r19, [%r0+0x3d8] %asi | |
5917 | .word 0x9d950014 ! 96: WRPR_WSTATE_R wrpr %r20, %r20, %wstate | |
5918 | ibp_20_60: | |
5919 | nop | |
5920 | ta T_CHANGE_NONHPRIV | |
5921 | .word 0xc1bfdb60 ! 97: STDFA_R stda %f0, [%r0, %r31] | |
5922 | .word 0xe19fdc00 ! 98: LDDFA_R ldda [%r31, %r0], %f16 | |
5923 | nop | |
5924 | ta T_CHANGE_HPRIV | |
5925 | mov 0x20+1, %r10 | |
5926 | set sync_thr_counter5, %r23 | |
5927 | #ifndef SPC | |
5928 | ldxa [%g0]0x63, %o1 | |
5929 | and %o1, 0x38, %o1 | |
5930 | add %o1, %r23, %r23 | |
5931 | sllx %o1, 5, %o3 !(CID*256) | |
5932 | #endif | |
5933 | cas [%r23],%g0,%r10 !lock | |
5934 | brnz %r10, cwq_20_61 | |
5935 | rd %asi, %r12 | |
5936 | wr %g0, 0x40, %asi | |
5937 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
5938 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
5939 | cmp %l1, 1 | |
5940 | bne cwq_20_61 | |
5941 | set CWQ_BASE, %l6 | |
5942 | #ifndef SPC | |
5943 | add %l6, %o3, %l6 | |
5944 | #endif | |
5945 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
5946 | best_set_reg(0x20610000, %l1, %l2) !# Control Word | |
5947 | sllx %l2, 32, %l2 | |
5948 | stx %l2, [%l6 + 0x0] | |
5949 | membar #Sync | |
5950 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
5951 | sub %l2, 0x40, %l2 | |
5952 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
5953 | wr %r12, %g0, %asi | |
5954 | st %g0, [%r23] | |
5955 | cwq_20_61: | |
5956 | ta T_CHANGE_NONHPRIV | |
5957 | .word 0xa5414000 ! 99: RDPC rd %pc, %r18 | |
5958 | .word 0xdb37e124 ! 100: STQF_I - %f13, [0x0124, %r31] | |
5959 | .word 0xc3ec0032 ! 101: PREFETCHA_R prefetcha [%r16, %r18] 0x01, #one_read | |
5960 | .word 0x89800011 ! 102: WRTICK_R wr %r0, %r17, %tick | |
5961 | cwp_20_64: | |
5962 | set user_data_start, %o7 | |
5963 | .word 0x93902003 ! 103: WRPR_CWP_I wrpr %r0, 0x0003, %cwp | |
5964 | splash_lsu_20_65: | |
5965 | nop | |
5966 | ta T_CHANGE_HPRIV | |
5967 | set 0x306bbf04, %r2 | |
5968 | mov 0x4, %r1 | |
5969 | sllx %r1, 32, %r1 | |
5970 | or %r1, %r2, %r2 | |
5971 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
5972 | ta T_CHANGE_NONHPRIV | |
5973 | .word 0x3d400001 ! 104: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
5974 | splash_lsu_20_66: | |
5975 | nop | |
5976 | ta T_CHANGE_HPRIV | |
5977 | set 0x0c098d9c, %r2 | |
5978 | mov 0x2, %r1 | |
5979 | sllx %r1, 32, %r1 | |
5980 | or %r1, %r2, %r2 | |
5981 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
5982 | .word 0x3d400001 ! 105: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
5983 | fpinit_20_67: | |
5984 | nop | |
5985 | setx fp_data_quads, %r19, %r20 | |
5986 | ldd [%r20], %f0 | |
5987 | ldd [%r20+8], %f4 | |
5988 | ld [%r20+16], %fsr | |
5989 | ld [%r20+24], %r19 | |
5990 | wr %r19, %g0, %gsr | |
5991 | .word 0xc3e82fe8 ! 106: PREFETCHA_I prefetcha [%r0, + 0x0fe8] %asi, #one_read | |
5992 | ibp_20_68: | |
5993 | nop | |
5994 | ta T_CHANGE_NONHPRIV | |
5995 | .word 0xc3ec002a ! 107: PREFETCHA_R prefetcha [%r16, %r10] 0x01, #one_read | |
5996 | ta T_CHANGE_NONHPRIV | |
5997 | .word 0x8143e011 ! 108: MEMBAR membar #LoadLoad | #Lookaside | |
5998 | intveclr_20_70: | |
5999 | nop | |
6000 | ta T_CHANGE_HPRIV | |
6001 | setx 0x06f3ff2907523cda, %r1, %r28 | |
6002 | stxa %r28, [%g0] 0x72 | |
6003 | .word 0x25400001 ! 109: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
6004 | nop | |
6005 | ta T_CHANGE_HPRIV | |
6006 | mov 0x20, %r10 | |
6007 | set sync_thr_counter6, %r23 | |
6008 | #ifndef SPC | |
6009 | ldxa [%g0]0x63, %o1 | |
6010 | and %o1, 0x38, %o1 | |
6011 | add %o1, %r23, %r23 | |
6012 | #endif | |
6013 | cas [%r23],%g0,%r10 !lock | |
6014 | brnz %r10, sma_20_71 | |
6015 | rd %asi, %r12 | |
6016 | wr %g0, 0x40, %asi | |
6017 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 | |
6018 | set 0x00121fff, %g1 | |
6019 | stxa %g1, [%g0 + 0x80] %asi | |
6020 | wr %r12, %g0, %asi | |
6021 | st %g0, [%r23] | |
6022 | sma_20_71: | |
6023 | ta T_CHANGE_NONHPRIV | |
6024 | .word 0xd7e7e012 ! 110: CASA_R casa [%r31] %asi, %r18, %r11 | |
6025 | .word 0xe1bfe060 ! 111: STDFA_I stda %f16, [0x0060, %r31] | |
6026 | nop | |
6027 | ta T_CHANGE_HPRIV ! macro | |
6028 | donret_20_72: | |
6029 | rd %pc, %r12 | |
6030 | add %r12, (donretarg_20_72-donret_20_72), %r12 | |
6031 | add %r12, 0x8, %r11 ! nonseq tnpc | |
6032 | wrpr %g0, 0x1, %tl | |
6033 | wrpr %g0, %r12, %tpc | |
6034 | wrpr %g0, %r11, %tnpc | |
6035 | set (0x000fa900 | (32 << 24)), %r13 | |
6036 | and %r12, 0xfff, %r14 | |
6037 | sllx %r14, 30, %r14 | |
6038 | or %r13, %r14, %r20 | |
6039 | wrpr %r20, %g0, %tstate | |
6040 | wrhpr %g0, 0x897, %htstate | |
6041 | ta T_CHANGE_NONPRIV ! rand=0 (20) | |
6042 | .word 0x23400001 ! 1: FBPNE fbne,a,pn %fcc0, <label_0x1> | |
6043 | retry | |
6044 | donretarg_20_72: | |
6045 | .word 0x9ba409cb ! 112: FDIVd fdivd %f16, %f42, %f44 | |
6046 | ibp_20_73: | |
6047 | nop | |
6048 | .word 0xc32fc011 ! 113: STXFSR_R st-sfr %f1, [%r17, %r31] | |
6049 | .word 0xc1bfdb60 ! 114: STDFA_R stda %f0, [%r0, %r31] | |
6050 | .word 0x8d903172 ! 115: WRPR_PSTATE_I wrpr %r0, 0x1172, %pstate | |
6051 | .word 0x87802058 ! 116: WRASI_I wr %r0, 0x0058, %asi | |
6052 | #if (defined SPC || defined CMP1) | |
6053 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_76) + 40, 16, 16)) -> intp(2,0,8) | |
6054 | #else | |
6055 | setx 0x993df71598200c8f, %r1, %r28 | |
6056 | stxa %r28, [%g0] 0x73 | |
6057 | #endif | |
6058 | intvec_20_76: | |
6059 | .word 0x39400001 ! 117: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
6060 | ibp_20_77: | |
6061 | nop | |
6062 | ta T_CHANGE_NONHPRIV | |
6063 | .word 0xa5702f2f ! 118: POPC_I popc 0x0f2f, %r18 | |
6064 | .word 0x91d02035 ! 119: Tcc_I ta icc_or_xcc, %r0 + 53 | |
6065 | mondo_20_78: | |
6066 | nop | |
6067 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
6068 | ta T_CHANGE_PRIV | |
6069 | stxa %r1, [%r0+0x3c8] %asi | |
6070 | .word 0x9d920014 ! 120: WRPR_WSTATE_R wrpr %r8, %r20, %wstate | |
6071 | ibp_20_79: | |
6072 | nop | |
6073 | .word 0xe19fe1a0 ! 121: LDDFA_I ldda [%r31, 0x01a0], %f16 | |
6074 | ibp_20_80: | |
6075 | nop | |
6076 | ta T_CHANGE_NONHPRIV | |
6077 | .word 0xc3eac023 ! 122: PREFETCHA_R prefetcha [%r11, %r3] 0x01, #one_read | |
6078 | .word 0x8d802004 ! 123: WRFPRS_I wr %r0, 0x0004, %fprs | |
6079 | splash_hpstate_20_81: | |
6080 | ta T_CHANGE_NONHPRIV | |
6081 | .word 0x35400001 ! 1: FBPUE fbue,a,pn %fcc0, <label_0x1> | |
6082 | .word 0x81982d94 ! 124: WRHPR_HPSTATE_I wrhpr %r0, 0x0d94, %hpstate | |
6083 | ibp_20_82: | |
6084 | nop | |
6085 | ta T_CHANGE_NONHPRIV | |
6086 | .word 0xc32fc008 ! 125: STXFSR_R st-sfr %f1, [%r8, %r31] | |
6087 | nop | |
6088 | ta T_CHANGE_HPRIV ! macro | |
6089 | donret_20_83: | |
6090 | rd %pc, %r12 | |
6091 | add %r12, (donretarg_20_83-donret_20_83+4), %r12 | |
6092 | add %r12, 0x4, %r11 ! seq tnpc | |
6093 | wrpr %g0, 0x2, %tl | |
6094 | wrpr %g0, %r12, %tpc | |
6095 | wrpr %g0, %r11, %tnpc | |
6096 | set (0x00228a00 | (0x83 << 24)), %r13 | |
6097 | and %r12, 0xfff, %r14 | |
6098 | sllx %r14, 30, %r14 | |
6099 | or %r13, %r14, %r20 | |
6100 | wrpr %r20, %g0, %tstate | |
6101 | wrhpr %g0, 0x655, %htstate | |
6102 | ta T_CHANGE_NONHPRIV ! rand=1 (20) | |
6103 | .word 0x2c800001 ! 1: BNEG bneg,a <label_0x1> | |
6104 | done | |
6105 | donretarg_20_83: | |
6106 | .word 0x25400001 ! 126: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
6107 | .word 0xd1e7e00b ! 127: CASA_R casa [%r31] %asi, %r11, %r8 | |
6108 | nop | |
6109 | mov 0x80, %g3 | |
6110 | stxa %g3, [%g3] 0x5f | |
6111 | .word 0xd05fc000 ! 128: LDX_R ldx [%r31 + %r0], %r8 | |
6112 | .word 0x24800001 ! 129: BLE ble,a <label_0x1> | |
6113 | memptr_20_85: | |
6114 | set 0x60540000, %r31 | |
6115 | .word 0x85833144 ! 130: WRCCR_I wr %r12, 0x1144, %ccr | |
6116 | .word 0x22800001 ! 131: BE be,a <label_0x1> | |
6117 | ibp_20_86: | |
6118 | nop | |
6119 | .word 0xc1bfe020 ! 132: STDFA_I stda %f0, [0x0020, %r31] | |
6120 | .word 0xa7a00170 ! 133: FABSq dis not found | |
6121 | ||
6122 | .word 0xdad7e128 ! 134: LDSHA_I ldsha [%r31, + 0x0128] %asi, %r13 | |
6123 | brz,pt %r5, skip_20_88 | |
6124 | bvs skip_20_88 | |
6125 | .align 1024 | |
6126 | skip_20_88: | |
6127 | .word 0x24cb0001 ! 135: BRLEZ brlez,a,pt %r12,<label_0xb0001> | |
6128 | fpinit_20_89: | |
6129 | nop | |
6130 | setx fp_data_quads, %r19, %r20 | |
6131 | ldd [%r20], %f0 | |
6132 | ldd [%r20+8], %f4 | |
6133 | ld [%r20+16], %fsr | |
6134 | ld [%r20+24], %r19 | |
6135 | wr %r19, %g0, %gsr | |
6136 | .word 0x87a80a44 ! 136: FCMPd fcmpd %fcc<n>, %f0, %f4 | |
6137 | br_badelay2_20_90: | |
6138 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
6139 | allclean | |
6140 | .word 0x97b20306 ! 137: ALIGNADDRESS alignaddr %r8, %r6, %r11 | |
6141 | .word 0xe137e11a ! 138: STQF_I - %f16, [0x011a, %r31] | |
6142 | fpinit_20_91: | |
6143 | nop | |
6144 | setx fp_data_quads, %r19, %r20 | |
6145 | ldd [%r20], %f0 | |
6146 | ldd [%r20+8], %f4 | |
6147 | ld [%r20+16], %fsr | |
6148 | ld [%r20+24], %r19 | |
6149 | wr %r19, %g0, %gsr | |
6150 | .word 0x87a80a44 ! 139: FCMPd fcmpd %fcc<n>, %f0, %f4 | |
6151 | .word 0x2f400001 ! 1: FBPU fbu,a,pn %fcc0, <label_0x1> | |
6152 | .word 0x8d9036ff ! 140: WRPR_PSTATE_I wrpr %r0, 0x16ff, %pstate | |
6153 | ibp_20_93: | |
6154 | nop | |
6155 | .word 0xc3ec402d ! 141: PREFETCHA_R prefetcha [%r17, %r13] 0x01, #one_read | |
6156 | .word 0x95a000d0 ! 142: FNEGd fnegd %f16, %f10 | |
6157 | set 0x1e57, %l3 | |
6158 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT | |
6159 | .word 0xa1b4c7c2 ! 143: PDIST pdistn %d50, %d2, %d16 | |
6160 | invalw | |
6161 | mov 0x30, %r30 | |
6162 | .word 0x83d0001e ! 144: Tcc_R te icc_or_xcc, %r0 + %r30 | |
6163 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
6164 | reduce_priv_lvl_20_94: | |
6165 | ta T_CHANGE_NONPRIV ! macro | |
6166 | memptr_20_95: | |
6167 | set 0x60340000, %r31 | |
6168 | .word 0x8584edbc ! 146: WRCCR_I wr %r19, 0x0dbc, %ccr | |
6169 | dvapa_20_96: | |
6170 | nop | |
6171 | ta T_CHANGE_HPRIV | |
6172 | mov 0xdfb, %r20 | |
6173 | mov 0x17, %r19 | |
6174 | sllx %r20, 23, %r20 | |
6175 | or %r19, %r20, %r19 | |
6176 | stxa %r19, [%g0] ASI_LSU_CONTROL | |
6177 | mov 0x38, %r18 | |
6178 | stxa %r31, [%r18]0x58 | |
6179 | ta T_CHANGE_NONHPRIV | |
6180 | .word 0xe73fc010 ! 147: STDF_R std %f19, [%r16, %r31] | |
6181 | .word 0xa7844001 ! 148: WR_GRAPHICS_STATUS_REG_R wr %r17, %r1, %- | |
6182 | .word 0xe637e178 ! 149: STH_I sth %r19, [%r31 + 0x0178] | |
6183 | #if (defined SPC || defined CMP1) | |
6184 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_98) + 32, 16, 16)) -> intp(0,0,31) | |
6185 | #else | |
6186 | setx 0x72c6476983d61638, %r1, %r28 | |
6187 | stxa %r28, [%g0] 0x73 | |
6188 | #endif | |
6189 | intvec_20_98: | |
6190 | .word 0x39400001 ! 150: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
6191 | intveclr_20_99: | |
6192 | nop | |
6193 | ta T_CHANGE_HPRIV | |
6194 | setx 0x8d19a04437ee58bd, %r1, %r28 | |
6195 | stxa %r28, [%g0] 0x72 | |
6196 | ta T_CHANGE_NONHPRIV | |
6197 | .word 0x25400001 ! 151: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
6198 | .word 0xe6800bc0 ! 152: LDUWA_R lduwa [%r0, %r0] 0x5e, %r19 | |
6199 | .word 0xe62fe0dc ! 153: STB_I stb %r19, [%r31 + 0x00dc] | |
6200 | mondo_20_100: | |
6201 | nop | |
6202 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
6203 | stxa %r18, [%r0+0x3e0] %asi | |
6204 | .word 0x9d924011 ! 154: WRPR_WSTATE_R wrpr %r9, %r17, %wstate | |
6205 | .word 0x9950c000 ! 155: RDPR_TT <illegal instruction> | |
6206 | .word 0x3a800001 ! 156: BCC bcc,a <label_0x1> | |
6207 | brcommon2_20_101: | |
6208 | nop | |
6209 | setx common_target, %r12, %r27 | |
6210 | ba,a .+12 | |
6211 | .word 0xe7150004 ! 1: LDQF_R - [%r20, %r4], %f19 | |
6212 | ba,a .+8 | |
6213 | jmpl %r27+0, %r27 | |
6214 | .word 0xe19fe000 ! 157: LDDFA_I ldda [%r31, 0x0000], %f16 | |
6215 | tagged_20_102: | |
6216 | tsubcctv %r4, 0x1358, %r17 | |
6217 | .word 0xd407e12c ! 158: LDUW_I lduw [%r31 + 0x012c], %r10 | |
6218 | splash_cmpr_20_103: | |
6219 | mov 0, %r18 | |
6220 | sllx %r18, 63, %r18 | |
6221 | rd %tick, %r17 | |
6222 | add %r17, 0x50, %r17 | |
6223 | or %r17, %r18, %r17 | |
6224 | .word 0xaf800011 ! 159: WR_TICK_CMPR_REG_R wr %r0, %r17, %- | |
6225 | .word 0xd5e7c033 ! 160: CASA_I casa [%r31] 0x 1, %r19, %r10 | |
6226 | br_longdelay2_20_104: | |
6227 | .word 0x2b400001 ! 1: FBPUG fbug,a,pn %fcc0, <label_0x1> | |
6228 | .word 0x24cfc001 ! 161: BRLEZ brlez,a,pt %r31,<label_0xfc001> | |
6229 | nop | |
6230 | ta T_CHANGE_HPRIV | |
6231 | mov 0x20+1, %r10 | |
6232 | set sync_thr_counter5, %r23 | |
6233 | #ifndef SPC | |
6234 | ldxa [%g0]0x63, %o1 | |
6235 | and %o1, 0x38, %o1 | |
6236 | add %o1, %r23, %r23 | |
6237 | sllx %o1, 5, %o3 !(CID*256) | |
6238 | #endif | |
6239 | cas [%r23],%g0,%r10 !lock | |
6240 | brnz %r10, cwq_20_105 | |
6241 | rd %asi, %r12 | |
6242 | wr %g0, 0x40, %asi | |
6243 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
6244 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
6245 | cmp %l1, 1 | |
6246 | bne cwq_20_105 | |
6247 | set CWQ_BASE, %l6 | |
6248 | #ifndef SPC | |
6249 | add %l6, %o3, %l6 | |
6250 | #endif | |
6251 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
6252 | best_set_reg(0x20610050, %l1, %l2) !# Control Word | |
6253 | sllx %l2, 32, %l2 | |
6254 | stx %l2, [%l6 + 0x0] | |
6255 | membar #Sync | |
6256 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
6257 | sub %l2, 0x40, %l2 | |
6258 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
6259 | wr %r12, %g0, %asi | |
6260 | st %g0, [%r23] | |
6261 | cwq_20_105: | |
6262 | ta T_CHANGE_NONHPRIV | |
6263 | .word 0xa1414000 ! 162: RDPC rd %pc, %r16 | |
6264 | splash_hpstate_20_106: | |
6265 | ta T_CHANGE_NONHPRIV | |
6266 | .word 0x38800001 ! 1: BGU bgu,a <label_0x1> | |
6267 | .word 0x81982b8f ! 163: WRHPR_HPSTATE_I wrhpr %r0, 0x0b8f, %hpstate | |
6268 | trapasi_20_107: | |
6269 | nop | |
6270 | mov 0x0, %r1 ! (VA for ASI 0x5a) | |
6271 | .word 0xd4c04b40 ! 164: LDSWA_R ldswa [%r1, %r0] 0x5a, %r10 | |
6272 | .word 0xc1bfe180 ! 165: STDFA_I stda %f0, [0x0180, %r31] | |
6273 | splash_hpstate_20_108: | |
6274 | ta T_CHANGE_NONHPRIV | |
6275 | .word 0x819820dd ! 166: WRHPR_HPSTATE_I wrhpr %r0, 0x00dd, %hpstate | |
6276 | otherw | |
6277 | mov 0x33, %r30 | |
6278 | .word 0x93d0001e ! 167: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
6279 | .word 0x8d802004 ! 168: WRFPRS_I wr %r0, 0x0004, %fprs | |
6280 | .word 0xd43fe1c0 ! 169: STD_I std %r10, [%r31 + 0x01c0] | |
6281 | jmptr_20_109: | |
6282 | nop | |
6283 | best_set_reg(0xe0a00000, %r20, %r27) | |
6284 | .word 0xb7c6c000 ! 170: JMPL_R jmpl %r27 + %r0, %r27 | |
6285 | jmptr_20_110: | |
6286 | nop | |
6287 | best_set_reg(0xe0a00000, %r20, %r27) | |
6288 | .word 0xb7c6c000 ! 171: JMPL_R jmpl %r27 + %r0, %r27 | |
6289 | nop | |
6290 | mov 0x80, %g3 | |
6291 | stxa %g3, [%g3] 0x5f | |
6292 | .word 0xd45fc000 ! 172: LDX_R ldx [%r31 + %r0], %r10 | |
6293 | .word 0xe19fe160 ! 173: LDDFA_I ldda [%r31, 0x0160], %f16 | |
6294 | .word 0xd51fe048 ! 174: LDDF_I ldd [%r31, 0x0048], %f10 | |
6295 | .word 0xd44fe1b8 ! 175: LDSB_I ldsb [%r31 + 0x01b8], %r10 | |
6296 | .word 0x91934013 ! 176: WRPR_PIL_R wrpr %r13, %r19, %pil | |
6297 | trapasi_20_113: | |
6298 | nop | |
6299 | mov 0x20, %r1 ! (VA for ASI 0x4c) | |
6300 | .word 0xd4904980 ! 177: LDUHA_R lduha [%r1, %r0] 0x4c, %r10 | |
6301 | intveclr_20_114: | |
6302 | nop | |
6303 | ta T_CHANGE_HPRIV | |
6304 | setx 0xb6d5358f9182465d, %r1, %r28 | |
6305 | stxa %r28, [%g0] 0x72 | |
6306 | ta T_CHANGE_NONHPRIV | |
6307 | .word 0x25400001 ! 178: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
6308 | ibp_20_115: | |
6309 | nop | |
6310 | .word 0xe19fdc00 ! 179: LDDFA_R ldda [%r31, %r0], %f16 | |
6311 | .word 0xc30fc000 ! 180: LDXFSR_R ld-fsr [%r31, %r0], %f1 | |
6312 | nop | |
6313 | ta T_CHANGE_HPRIV | |
6314 | mov 0x20+1, %r10 | |
6315 | set sync_thr_counter5, %r23 | |
6316 | #ifndef SPC | |
6317 | ldxa [%g0]0x63, %o1 | |
6318 | and %o1, 0x38, %o1 | |
6319 | add %o1, %r23, %r23 | |
6320 | sllx %o1, 5, %o3 !(CID*256) | |
6321 | #endif | |
6322 | cas [%r23],%g0,%r10 !lock | |
6323 | brnz %r10, cwq_20_116 | |
6324 | rd %asi, %r12 | |
6325 | wr %g0, 0x40, %asi | |
6326 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
6327 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
6328 | cmp %l1, 1 | |
6329 | bne cwq_20_116 | |
6330 | set CWQ_BASE, %l6 | |
6331 | #ifndef SPC | |
6332 | add %l6, %o3, %l6 | |
6333 | #endif | |
6334 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
6335 | best_set_reg(0x206100c0, %l1, %l2) !# Control Word | |
6336 | sllx %l2, 32, %l2 | |
6337 | stx %l2, [%l6 + 0x0] | |
6338 | membar #Sync | |
6339 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
6340 | sub %l2, 0x40, %l2 | |
6341 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
6342 | wr %r12, %g0, %asi | |
6343 | st %g0, [%r23] | |
6344 | cwq_20_116: | |
6345 | ta T_CHANGE_NONHPRIV | |
6346 | .word 0xa1414000 ! 181: RDPC rd %pc, %r16 | |
6347 | splash_cmpr_20_117: | |
6348 | mov 0, %r18 | |
6349 | sllx %r18, 63, %r18 | |
6350 | rd %tick, %r17 | |
6351 | add %r17, 0x80, %r17 | |
6352 | or %r17, %r18, %r17 | |
6353 | ta T_CHANGE_PRIV | |
6354 | .word 0xaf800011 ! 182: WR_TICK_CMPR_REG_R wr %r0, %r17, %- | |
6355 | intveclr_20_118: | |
6356 | nop | |
6357 | ta T_CHANGE_HPRIV | |
6358 | setx 0x4ae8310246683cd0, %r1, %r28 | |
6359 | stxa %r28, [%g0] 0x72 | |
6360 | .word 0x25400001 ! 183: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
6361 | .word 0xe0dfe0a8 ! 184: LDXA_I ldxa [%r31, + 0x00a8] %asi, %r16 | |
6362 | intveclr_20_119: | |
6363 | nop | |
6364 | ta T_CHANGE_HPRIV | |
6365 | setx 0x89e0f53a818c82b0, %r1, %r28 | |
6366 | stxa %r28, [%g0] 0x72 | |
6367 | .word 0x25400001 ! 185: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
6368 | #if (defined SPC || defined CMP1) | |
6369 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_120) + 32, 16, 16)) -> intp(2,0,14) | |
6370 | #else | |
6371 | setx 0xe0c95aa21fabee2d, %r1, %r28 | |
6372 | stxa %r28, [%g0] 0x73 | |
6373 | #endif | |
6374 | intvec_20_120: | |
6375 | .word 0x39400001 ! 186: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
6376 | set 0xf0c, %l3 | |
6377 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT | |
6378 | .word 0xa7b4c7d3 ! 187: PDIST pdistn %d50, %d50, %d50 | |
6379 | otherw | |
6380 | mov 0x31, %r30 | |
6381 | .word 0x91d0001e ! 188: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
6382 | .word 0xa7820012 ! 189: WR_GRAPHICS_STATUS_REG_R wr %r8, %r18, %- | |
6383 | .word 0xda97e1e8 ! 190: LDUHA_I lduha [%r31, + 0x01e8] %asi, %r13 | |
6384 | .word 0x879ce990 ! 191: WRHPR_HINTP_I wrhpr %r19, 0x0990, %hintp | |
6385 | .word 0x83d02034 ! 192: Tcc_I te icc_or_xcc, %r0 + 52 | |
6386 | .word 0xa7810014 ! 193: WR_GRAPHICS_STATUS_REG_R wr %r4, %r20, %- | |
6387 | dvapa_20_123: | |
6388 | nop | |
6389 | ta T_CHANGE_HPRIV | |
6390 | mov 0xdbf, %r20 | |
6391 | mov 0x4, %r19 | |
6392 | sllx %r20, 23, %r20 | |
6393 | or %r19, %r20, %r19 | |
6394 | stxa %r19, [%g0] ASI_LSU_CONTROL | |
6395 | mov 0x38, %r18 | |
6396 | stxa %r31, [%r18]0x58 | |
6397 | ta T_CHANGE_NONHPRIV | |
6398 | .word 0x87ac4a51 ! 194: FCMPd fcmpd %fcc<n>, %f48, %f48 | |
6399 | brcommon3_20_124: | |
6400 | nop | |
6401 | setx common_target, %r12, %r27 | |
6402 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
6403 | ba,a .+12 | |
6404 | .word 0xd3e7c02c ! 1: CASA_I casa [%r31] 0x 1, %r12, %r9 | |
6405 | ba,a .+8 | |
6406 | jmpl %r27+0, %r27 | |
6407 | .word 0xd29fc02d ! 195: LDDA_R ldda [%r31, %r13] 0x01, %r9 | |
6408 | .word 0xc30fc000 ! 196: LDXFSR_R ld-fsr [%r31, %r0], %f1 | |
6409 | dvapa_20_125: | |
6410 | nop | |
6411 | ta T_CHANGE_HPRIV | |
6412 | mov 0x9f2, %r20 | |
6413 | mov 0x10, %r19 | |
6414 | sllx %r20, 23, %r20 | |
6415 | or %r19, %r20, %r19 | |
6416 | stxa %r19, [%g0] ASI_LSU_CONTROL | |
6417 | mov 0x38, %r18 | |
6418 | stxa %r31, [%r18]0x58 | |
6419 | ta T_CHANGE_NONHPRIV | |
6420 | .word 0x97b147cc ! 197: PDIST pdistn %d36, %d12, %d42 | |
6421 | memptr_20_126: | |
6422 | set user_data_start, %r31 | |
6423 | .word 0x8584fa7c ! 198: WRCCR_I wr %r19, 0x1a7c, %ccr | |
6424 | .word 0xc1bfc2c0 ! 199: STDFA_R stda %f0, [%r0, %r31] | |
6425 | trapasi_20_128: | |
6426 | nop | |
6427 | mov 0x0, %r1 ! (VA for ASI 0x73) | |
6428 | .word 0xe0c84e60 ! 200: LDSBA_R ldsba [%r1, %r0] 0x73, %r16 | |
6429 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
6430 | reduce_priv_lvl_20_129: | |
6431 | ta T_CHANGE_NONHPRIV ! macro | |
6432 | nop | |
6433 | nop | |
6434 | ta T_CHANGE_PRIV | |
6435 | wrpr %g0, %g0, %gl | |
6436 | nop | |
6437 | nop | |
6438 | setx join_lbl_0_0, %g1, %g2 | |
6439 | jmp %g2 | |
6440 | nop | |
6441 | fork_lbl_0_5: | |
6442 | ta T_CHANGE_NONHPRIV | |
6443 | .word 0xe08008a0 ! 1: LDUWA_R lduwa [%r0, %r0] 0x45, %r16 | |
6444 | .word 0xe19fdb60 ! 2: LDDFA_R ldda [%r31, %r0], %f16 | |
6445 | .word 0xe08008a0 ! 3: LDUWA_R lduwa [%r0, %r0] 0x45, %r16 | |
6446 | .word 0x89800011 ! 4: WRTICK_R wr %r0, %r17, %tick | |
6447 | .word 0x8d802004 ! 5: WRFPRS_I wr %r0, 0x0004, %fprs | |
6448 | .word 0x2d400001 ! 1: FBPG fbg,a,pn %fcc0, <label_0x1> | |
6449 | .word 0x8d903e0b ! 6: WRPR_PSTATE_I wrpr %r0, 0x1e0b, %pstate | |
6450 | .word 0xe0bfc020 ! 7: STDA_R stda %r16, [%r31 + %r0] 0x01 | |
6451 | #if (defined SPC || defined CMP1) | |
6452 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_2) + 56, 16, 16)) -> intp(7,0,19) | |
6453 | #else | |
6454 | setx 0xa587d25567803154, %r1, %r28 | |
6455 | stxa %r28, [%g0] 0x73 | |
6456 | #endif | |
6457 | intvec_10_2: | |
6458 | .word 0x39400001 ! 8: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
6459 | .word 0xc32fc000 ! 9: STXFSR_R st-sfr %f1, [%r0, %r31] | |
6460 | splash_lsu_10_3: | |
6461 | nop | |
6462 | ta T_CHANGE_HPRIV | |
6463 | set 0xab3a8358, %r2 | |
6464 | mov 0x5, %r1 | |
6465 | sllx %r1, 32, %r1 | |
6466 | or %r1, %r2, %r2 | |
6467 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
6468 | ta T_CHANGE_NONHPRIV | |
6469 | .word 0x3d400001 ! 10: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
6470 | .word 0x2a780001 ! 11: BPCS <illegal instruction> | |
6471 | .word 0xa784800b ! 12: WR_GRAPHICS_STATUS_REG_R wr %r18, %r11, %- | |
6472 | fpinit_10_5: | |
6473 | nop | |
6474 | setx fp_data_quads, %r19, %r20 | |
6475 | ldd [%r20], %f0 | |
6476 | ldd [%r20+8], %f4 | |
6477 | ld [%r20+16], %fsr | |
6478 | ld [%r20+24], %r19 | |
6479 | wr %r19, %g0, %gsr | |
6480 | .word 0x91a009c4 ! 13: FDIVd fdivd %f0, %f4, %f8 | |
6481 | invalw | |
6482 | mov 0x35, %r30 | |
6483 | .word 0x91d0001e ! 14: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
6484 | .word 0x879c4009 ! 15: WRHPR_HINTP_R wrhpr %r17, %r9, %hintp | |
6485 | .word 0xa5703641 ! 16: POPC_I popc 0x1641, %r18 | |
6486 | .word 0x87802058 ! 17: WRASI_I wr %r0, 0x0058, %asi | |
6487 | .word 0xa7a109aa ! 18: FDIVs fdivs %f4, %f10, %f19 | |
6488 | .word 0xa9a00161 ! 19: FABSq dis not found | |
6489 | ||
6490 | .word 0xe49fe0c0 ! 20: LDDA_I ldda [%r31, + 0x00c0] %asi, %r18 | |
6491 | .word 0xe44fe148 ! 21: LDSB_I ldsb [%r31 + 0x0148], %r18 | |
6492 | memptr_10_8: | |
6493 | set 0x60340000, %r31 | |
6494 | .word 0x85837b95 ! 22: WRCCR_I wr %r13, 0x1b95, %ccr | |
6495 | splash_tba_10_9: | |
6496 | nop | |
6497 | ta T_CHANGE_PRIV | |
6498 | setx 0x0000000000380000, %r11, %r12 | |
6499 | .word 0x8b90000c ! 23: WRPR_TBA_R wrpr %r0, %r12, %tba | |
6500 | nop | |
6501 | ta T_CHANGE_HPRIV | |
6502 | mov 0x10+1, %r10 | |
6503 | set sync_thr_counter5, %r23 | |
6504 | #ifndef SPC | |
6505 | ldxa [%g0]0x63, %o1 | |
6506 | and %o1, 0x38, %o1 | |
6507 | add %o1, %r23, %r23 | |
6508 | sllx %o1, 5, %o3 !(CID*256) | |
6509 | #endif | |
6510 | cas [%r23],%g0,%r10 !lock | |
6511 | brnz %r10, cwq_10_10 | |
6512 | rd %asi, %r12 | |
6513 | wr %g0, 0x40, %asi | |
6514 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
6515 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
6516 | cmp %l1, 1 | |
6517 | bne cwq_10_10 | |
6518 | set CWQ_BASE, %l6 | |
6519 | #ifndef SPC | |
6520 | add %l6, %o3, %l6 | |
6521 | #endif | |
6522 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
6523 | best_set_reg(0x206100b0, %l1, %l2) !# Control Word | |
6524 | sllx %l2, 32, %l2 | |
6525 | stx %l2, [%l6 + 0x0] | |
6526 | membar #Sync | |
6527 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
6528 | sub %l2, 0x40, %l2 | |
6529 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
6530 | wr %r12, %g0, %asi | |
6531 | st %g0, [%r23] | |
6532 | cwq_10_10: | |
6533 | ta T_CHANGE_NONHPRIV | |
6534 | .word 0xa9414000 ! 24: RDPC rd %pc, %r20 | |
6535 | .word 0x8d903b5d ! 25: WRPR_PSTATE_I wrpr %r0, 0x1b5d, %pstate | |
6536 | brcommon1_10_12: | |
6537 | nop | |
6538 | setx common_target, %r12, %r27 | |
6539 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
6540 | ba,a .+12 | |
6541 | .word 0xa1702190 ! 1: POPC_I popc 0x0190, %r16 | |
6542 | ba,a .+8 | |
6543 | jmpl %r27+0, %r27 | |
6544 | .word 0xa9a449c9 ! 26: FDIVd fdivd %f48, %f40, %f20 | |
6545 | intveclr_10_13: | |
6546 | nop | |
6547 | ta T_CHANGE_HPRIV | |
6548 | setx 0x1c1a7285575e7b55, %r1, %r28 | |
6549 | stxa %r28, [%g0] 0x72 | |
6550 | ta T_CHANGE_NONHPRIV | |
6551 | .word 0x25400001 ! 27: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
6552 | splash_lsu_10_14: | |
6553 | nop | |
6554 | ta T_CHANGE_HPRIV | |
6555 | set 0xd6693bd4, %r2 | |
6556 | mov 0x5, %r1 | |
6557 | sllx %r1, 32, %r1 | |
6558 | or %r1, %r2, %r2 | |
6559 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
6560 | ta T_CHANGE_NONHPRIV | |
6561 | .word 0x3d400001 ! 28: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
6562 | splash_cmpr_10_15: | |
6563 | mov 0, %r18 | |
6564 | sllx %r18, 63, %r18 | |
6565 | rd %tick, %r17 | |
6566 | add %r17, 0x100, %r17 | |
6567 | or %r17, %r18, %r17 | |
6568 | ta T_CHANGE_HPRIV | |
6569 | wrhpr %r17, %g0, %hsys_tick_cmpr | |
6570 | .word 0xaf800011 ! 29: WR_TICK_CMPR_REG_R wr %r0, %r17, %- | |
6571 | brcommon1_10_16: | |
6572 | nop | |
6573 | setx common_target, %r12, %r27 | |
6574 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
6575 | ba,a .+12 | |
6576 | .word 0xa9b7c7d4 ! 1: PDIST pdistn %d62, %d20, %d20 | |
6577 | ba,a .+8 | |
6578 | jmpl %r27+0, %r27 | |
6579 | .word 0x97703953 ! 30: POPC_I popc 0x1953, %r11 | |
6580 | .word 0xd03fc000 ! 31: STD_R std %r8, [%r31 + %r0] | |
6581 | splash_tba_10_17: | |
6582 | nop | |
6583 | ta T_CHANGE_PRIV | |
6584 | setx 0x0000000000380000, %r11, %r12 | |
6585 | .word 0x8b90000c ! 32: WRPR_TBA_R wrpr %r0, %r12, %tba | |
6586 | ibp_10_18: | |
6587 | nop | |
6588 | .word 0xd11fe0c0 ! 33: LDDF_I ldd [%r31, 0x00c0], %f8 | |
6589 | .word 0xd127c000 ! 34: STF_R st %f8, [%r0, %r31] | |
6590 | .word 0xd0c7e058 ! 35: LDSWA_I ldswa [%r31, + 0x0058] %asi, %r8 | |
6591 | ibp_10_19: | |
6592 | nop | |
6593 | .word 0xd0dfc032 ! 36: LDXA_R ldxa [%r31, %r18] 0x01, %r8 | |
6594 | splash_cmpr_10_20: | |
6595 | mov 0, %r18 | |
6596 | sllx %r18, 63, %r18 | |
6597 | rd %tick, %r17 | |
6598 | add %r17, 0x60, %r17 | |
6599 | or %r17, %r18, %r17 | |
6600 | .word 0xb3800011 ! 37: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
6601 | .word 0xe19fe1c0 ! 38: LDDFA_I ldda [%r31, 0x01c0], %f16 | |
6602 | nop | |
6603 | ta T_CHANGE_HPRIV | |
6604 | mov 0x10+1, %r10 | |
6605 | set sync_thr_counter5, %r23 | |
6606 | #ifndef SPC | |
6607 | ldxa [%g0]0x63, %o1 | |
6608 | and %o1, 0x38, %o1 | |
6609 | add %o1, %r23, %r23 | |
6610 | sllx %o1, 5, %o3 !(CID*256) | |
6611 | #endif | |
6612 | cas [%r23],%g0,%r10 !lock | |
6613 | brnz %r10, cwq_10_21 | |
6614 | rd %asi, %r12 | |
6615 | wr %g0, 0x40, %asi | |
6616 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
6617 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
6618 | cmp %l1, 1 | |
6619 | bne cwq_10_21 | |
6620 | set CWQ_BASE, %l6 | |
6621 | #ifndef SPC | |
6622 | add %l6, %o3, %l6 | |
6623 | #endif | |
6624 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
6625 | best_set_reg(0x206100e0, %l1, %l2) !# Control Word | |
6626 | sllx %l2, 32, %l2 | |
6627 | stx %l2, [%l6 + 0x0] | |
6628 | membar #Sync | |
6629 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
6630 | sub %l2, 0x40, %l2 | |
6631 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
6632 | wr %r12, %g0, %asi | |
6633 | st %g0, [%r23] | |
6634 | cwq_10_21: | |
6635 | ta T_CHANGE_NONHPRIV | |
6636 | .word 0xa1414000 ! 39: RDPC rd %pc, %r16 | |
6637 | unsupttte_10_22: | |
6638 | nop | |
6639 | ta T_CHANGE_HPRIV | |
6640 | mov 1, %r20 | |
6641 | sllx %r20, 63, %r20 | |
6642 | or %r20, 2,%r20 | |
6643 | stxa %r20, [%g0]0x5c ! D unsupported page size .. | |
6644 | ta T_CHANGE_NONHPRIV | |
6645 | .word 0x95a209aa ! 40: FDIVs fdivs %f8, %f10, %f10 | |
6646 | jmptr_10_23: | |
6647 | nop | |
6648 | best_set_reg(0xe0200000, %r20, %r27) | |
6649 | .word 0xb7c6c000 ! 41: JMPL_R jmpl %r27 + %r0, %r27 | |
6650 | .word 0xa7508000 ! 42: RDPR_TSTATE <illegal instruction> | |
6651 | .word 0xe6dfe180 ! 43: LDXA_I ldxa [%r31, + 0x0180] %asi, %r19 | |
6652 | .word 0x99a189a1 ! 44: FDIVs fdivs %f6, %f1, %f12 | |
6653 | fblg,a,pn %fcc0, skip_10_25 | |
6654 | be,a skip_10_25 | |
6655 | .align 128 | |
6656 | skip_10_25: | |
6657 | .word 0xa1a509c9 ! 45: FDIVd fdivd %f20, %f40, %f16 | |
6658 | br_longdelay4_10_26: | |
6659 | nop | |
6660 | not %g0, %r12 | |
6661 | jmp %r12 | |
6662 | .word 0x9d902000 ! 46: WRPR_WSTATE_I wrpr %r0, 0x0000, %wstate | |
6663 | setx 0xa1b472e66b91a7a8, %r1, %r28 | |
6664 | stxa %r28, [%g0] 0x73 | |
6665 | intvec_10_27: | |
6666 | .word 0x39400001 ! 47: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
6667 | unsupttte_10_28: | |
6668 | nop | |
6669 | ta T_CHANGE_HPRIV | |
6670 | mov 1, %r20 | |
6671 | sllx %r20, 63, %r20 | |
6672 | or %r20, 2,%r20 | |
6673 | stxa %r20, [%g0]0x5c ! D unsupported page size .. | |
6674 | ta T_CHANGE_NONHPRIV | |
6675 | .word 0x87ab0a46 ! 48: FCMPd fcmpd %fcc<n>, %f12, %f6 | |
6676 | .word 0xe677c000 ! 49: STX_R stx %r19, [%r31 + %r0] | |
6677 | intveclr_10_29: | |
6678 | nop | |
6679 | ta T_CHANGE_HPRIV | |
6680 | setx 0x645368b8f7623f00, %r1, %r28 | |
6681 | stxa %r28, [%g0] 0x72 | |
6682 | ta T_CHANGE_NONHPRIV | |
6683 | .word 0x25400001 ! 50: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
6684 | mondo_10_30: | |
6685 | nop | |
6686 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
6687 | ta T_CHANGE_PRIV | |
6688 | stxa %r20, [%r0+0x3e0] %asi | |
6689 | .word 0x9d944010 ! 51: WRPR_WSTATE_R wrpr %r17, %r16, %wstate | |
6690 | .word 0xe63fe030 ! 52: STD_I std %r19, [%r31 + 0x0030] | |
6691 | .word 0xa781a83e ! 53: WR_GRAPHICS_STATUS_REG_I wr %r6, 0x083e, %- | |
6692 | .word 0xe71fc000 ! 54: LDDF_R ldd [%r31, %r0], %f19 | |
6693 | .word 0x38800001 ! 1: BGU bgu,a <label_0x1> | |
6694 | .word 0x8d902abe ! 55: WRPR_PSTATE_I wrpr %r0, 0x0abe, %pstate | |
6695 | splash_tba_10_32: | |
6696 | nop | |
6697 | ta T_CHANGE_PRIV | |
6698 | set 0x120000, %r12 | |
6699 | .word 0x8b90000c ! 56: WRPR_TBA_R wrpr %r0, %r12, %tba | |
6700 | unsupttte_10_33: | |
6701 | nop | |
6702 | ta T_CHANGE_HPRIV | |
6703 | mov 1, %r20 | |
6704 | sllx %r20, 63, %r20 | |
6705 | or %r20, 2,%r20 | |
6706 | stxa %r20, [%g0]0x54 ! I unsupported page size .. | |
6707 | ta T_CHANGE_NONHPRIV | |
6708 | .word 0x87aaca53 ! 57: FCMPd fcmpd %fcc<n>, %f42, %f50 | |
6709 | .word 0x89800011 ! 58: WRTICK_R wr %r0, %r17, %tick | |
6710 | ibp_10_35: | |
6711 | nop | |
6712 | .word 0xe8bfc02a ! 59: STDA_R stda %r20, [%r31 + %r10] 0x01 | |
6713 | .word 0xe8cfe1a8 ! 60: LDSBA_I ldsba [%r31, + 0x01a8] %asi, %r20 | |
6714 | .word 0xa3a509b0 ! 61: FDIVs fdivs %f20, %f16, %f17 | |
6715 | ceter_10_37: | |
6716 | nop | |
6717 | ta T_CHANGE_HPRIV | |
6718 | mov 7, %r17 | |
6719 | sllx %r17, 60, %r17 | |
6720 | mov 0x18, %r16 | |
6721 | stxa %r17, [%r16]0x4c | |
6722 | ta T_CHANGE_NONHPRIV | |
6723 | .word 0x97410000 ! 62: RDTICK rd %tick, %r11 | |
6724 | .word 0xd297c02d ! 63: LDUHA_R lduha [%r31, %r13] 0x01, %r9 | |
6725 | mondo_10_39: | |
6726 | nop | |
6727 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
6728 | stxa %r6, [%r0+0x3e0] %asi | |
6729 | .word 0x9d948011 ! 64: WRPR_WSTATE_R wrpr %r18, %r17, %wstate | |
6730 | brgz,pn %r5, skip_10_40 | |
6731 | brz,pt %r10, skip_10_40 | |
6732 | .align 2048 | |
6733 | skip_10_40: | |
6734 | .word 0xd3e7c020 ! 65: CASA_I casa [%r31] 0x 1, %r0, %r9 | |
6735 | fpinit_10_41: | |
6736 | nop | |
6737 | setx fp_data_quads, %r19, %r20 | |
6738 | ldd [%r20], %f0 | |
6739 | ldd [%r20+8], %f4 | |
6740 | ld [%r20+16], %fsr | |
6741 | ld [%r20+24], %r19 | |
6742 | wr %r19, %g0, %gsr | |
6743 | .word 0x89a009c4 ! 66: FDIVd fdivd %f0, %f4, %f4 | |
6744 | nop | |
6745 | ta T_CHANGE_HPRIV ! macro | |
6746 | donret_10_42: | |
6747 | rd %pc, %r12 | |
6748 | add %r12, (donretarg_10_42-donret_10_42+4), %r12 | |
6749 | add %r12, 0x4, %r11 ! seq tnpc | |
6750 | wrpr %g0, 0x2, %tl | |
6751 | wrpr %g0, %r12, %tpc | |
6752 | wrpr %g0, %r11, %tnpc | |
6753 | set (0x00658400 | (28 << 24)), %r13 | |
6754 | and %r12, 0xfff, %r14 | |
6755 | sllx %r14, 30, %r14 | |
6756 | or %r13, %r14, %r20 | |
6757 | wrpr %r20, %g0, %tstate | |
6758 | wrhpr %g0, 0x1c43, %htstate | |
6759 | ta T_CHANGE_NONHPRIV ! rand=1 (10) | |
6760 | retry | |
6761 | donretarg_10_42: | |
6762 | .word 0xd26fe1e3 ! 67: LDSTUB_I ldstub %r9, [%r31 + 0x01e3] | |
6763 | ibp_10_43: | |
6764 | nop | |
6765 | .word 0x91b507d0 ! 68: PDIST pdistn %d20, %d16, %d8 | |
6766 | splash_tba_10_44: | |
6767 | nop | |
6768 | ta T_CHANGE_PRIV | |
6769 | set 0x120000, %r12 | |
6770 | .word 0x8b90000c ! 69: WRPR_TBA_R wrpr %r0, %r12, %tba | |
6771 | jmptr_10_45: | |
6772 | nop | |
6773 | best_set_reg(0xe0200000, %r20, %r27) | |
6774 | .word 0xb7c6c000 ! 70: JMPL_R jmpl %r27 + %r0, %r27 | |
6775 | .word 0xe6dfe1a0 ! 71: LDXA_I ldxa [%r31, + 0x01a0] %asi, %r19 | |
6776 | .word 0xe737e0f1 ! 72: STQF_I - %f19, [0x00f1, %r31] | |
6777 | nop | |
6778 | mov 0x80, %g3 | |
6779 | stxa %g3, [%g3] 0x57 | |
6780 | .word 0xe65fc000 ! 73: LDX_R ldx [%r31 + %r0], %r19 | |
6781 | set 0x3b64, %l3 | |
6782 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT | |
6783 | .word 0xa1b207c4 ! 74: PDIST pdistn %d8, %d4, %d16 | |
6784 | .word 0xd22fe137 ! 75: STB_I stb %r9, [%r31 + 0x0137] | |
6785 | nop | |
6786 | mov 0x80, %g3 | |
6787 | stxa %g3, [%g3] 0x57 | |
6788 | .word 0xd25fc000 ! 76: LDX_R ldx [%r31 + %r0], %r9 | |
6789 | .word 0x9194800d ! 77: WRPR_PIL_R wrpr %r18, %r13, %pil | |
6790 | .word 0xd3e7e012 ! 78: CASA_R casa [%r31] %asi, %r18, %r9 | |
6791 | .word 0x91d02033 ! 79: Tcc_I ta icc_or_xcc, %r0 + 51 | |
6792 | .word 0x89800011 ! 80: WRTICK_R wr %r0, %r17, %tick | |
6793 | splash_tba_10_49: | |
6794 | nop | |
6795 | ta T_CHANGE_PRIV | |
6796 | setx 0x0000000000380000, %r11, %r12 | |
6797 | .word 0x8b90000c ! 81: WRPR_TBA_R wrpr %r0, %r12, %tba | |
6798 | intveclr_10_50: | |
6799 | nop | |
6800 | ta T_CHANGE_HPRIV | |
6801 | setx 0x153ff68237553918, %r1, %r28 | |
6802 | stxa %r28, [%g0] 0x72 | |
6803 | .word 0x25400001 ! 82: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
6804 | nop | |
6805 | mov 0x80, %g3 | |
6806 | stxa %g3, [%g3] 0x5f | |
6807 | .word 0xd25fc000 ! 83: LDX_R ldx [%r31 + %r0], %r9 | |
6808 | .word 0xd337e130 ! 84: STQF_I - %f9, [0x0130, %r31] | |
6809 | memptr_10_51: | |
6810 | set user_data_start, %r31 | |
6811 | .word 0x8581f452 ! 85: WRCCR_I wr %r7, 0x1452, %ccr | |
6812 | invalw | |
6813 | mov 0xb1, %r30 | |
6814 | .word 0x91d0001e ! 86: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
6815 | .word 0xd327c000 ! 87: STF_R st %f9, [%r0, %r31] | |
6816 | jmptr_10_52: | |
6817 | nop | |
6818 | best_set_reg(0xe0200000, %r20, %r27) | |
6819 | .word 0xb7c6c000 ! 88: JMPL_R jmpl %r27 + %r0, %r27 | |
6820 | setx 0xdc2e0ebd727a68f9, %r1, %r28 | |
6821 | stxa %r28, [%g0] 0x73 | |
6822 | intvec_10_53: | |
6823 | .word 0x39400001 ! 89: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
6824 | jmptr_10_54: | |
6825 | nop | |
6826 | best_set_reg(0xe0200000, %r20, %r27) | |
6827 | .word 0xb7c6c000 ! 90: JMPL_R jmpl %r27 + %r0, %r27 | |
6828 | pmu_10_55: | |
6829 | nop | |
6830 | setx 0xfffff5d0fffff424, %g1, %g7 | |
6831 | .word 0xa3800007 ! 91: WR_PERF_COUNTER_R wr %r0, %r7, %- | |
6832 | .word 0xd2800ba0 ! 92: LDUWA_R lduwa [%r0, %r0] 0x5d, %r9 | |
6833 | nop | |
6834 | ta T_CHANGE_HPRIV | |
6835 | mov 0x10+1, %r10 | |
6836 | set sync_thr_counter5, %r23 | |
6837 | #ifndef SPC | |
6838 | ldxa [%g0]0x63, %o1 | |
6839 | and %o1, 0x38, %o1 | |
6840 | add %o1, %r23, %r23 | |
6841 | sllx %o1, 5, %o3 !(CID*256) | |
6842 | #endif | |
6843 | cas [%r23],%g0,%r10 !lock | |
6844 | brnz %r10, cwq_10_56 | |
6845 | rd %asi, %r12 | |
6846 | wr %g0, 0x40, %asi | |
6847 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
6848 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
6849 | cmp %l1, 1 | |
6850 | bne cwq_10_56 | |
6851 | set CWQ_BASE, %l6 | |
6852 | #ifndef SPC | |
6853 | add %l6, %o3, %l6 | |
6854 | #endif | |
6855 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
6856 | best_set_reg(0x206100b0, %l1, %l2) !# Control Word | |
6857 | sllx %l2, 32, %l2 | |
6858 | stx %l2, [%l6 + 0x0] | |
6859 | membar #Sync | |
6860 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
6861 | sub %l2, 0x40, %l2 | |
6862 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
6863 | wr %r12, %g0, %asi | |
6864 | st %g0, [%r23] | |
6865 | cwq_10_56: | |
6866 | ta T_CHANGE_NONHPRIV | |
6867 | .word 0xa7414000 ! 93: RDPC rd %pc, %r19 | |
6868 | brcommon3_10_57: | |
6869 | nop | |
6870 | setx common_target, %r12, %r27 | |
6871 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
6872 | ba,a .+12 | |
6873 | .word 0xe06fe1e0 ! 1: LDSTUB_I ldstub %r16, [%r31 + 0x01e0] | |
6874 | ba,a .+8 | |
6875 | jmpl %r27+0, %r27 | |
6876 | .word 0xe09fc028 ! 94: LDDA_R ldda [%r31, %r8] 0x01, %r16 | |
6877 | splash_lsu_10_58: | |
6878 | nop | |
6879 | ta T_CHANGE_HPRIV | |
6880 | set 0x6ae4293b, %r2 | |
6881 | mov 0x2, %r1 | |
6882 | sllx %r1, 32, %r1 | |
6883 | or %r1, %r2, %r2 | |
6884 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
6885 | ta T_CHANGE_NONHPRIV | |
6886 | .word 0x3d400001 ! 95: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
6887 | mondo_10_59: | |
6888 | nop | |
6889 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
6890 | ta T_CHANGE_PRIV | |
6891 | stxa %r17, [%r0+0x3e0] %asi | |
6892 | .word 0x9d930008 ! 96: WRPR_WSTATE_R wrpr %r12, %r8, %wstate | |
6893 | ibp_10_60: | |
6894 | nop | |
6895 | ta T_CHANGE_NONHPRIV | |
6896 | .word 0xc19fd920 ! 97: LDDFA_R ldda [%r31, %r0], %f0 | |
6897 | .word 0xc19fdb60 ! 98: LDDFA_R ldda [%r31, %r0], %f0 | |
6898 | nop | |
6899 | ta T_CHANGE_HPRIV | |
6900 | mov 0x10+1, %r10 | |
6901 | set sync_thr_counter5, %r23 | |
6902 | #ifndef SPC | |
6903 | ldxa [%g0]0x63, %o1 | |
6904 | and %o1, 0x38, %o1 | |
6905 | add %o1, %r23, %r23 | |
6906 | sllx %o1, 5, %o3 !(CID*256) | |
6907 | #endif | |
6908 | cas [%r23],%g0,%r10 !lock | |
6909 | brnz %r10, cwq_10_61 | |
6910 | rd %asi, %r12 | |
6911 | wr %g0, 0x40, %asi | |
6912 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
6913 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
6914 | cmp %l1, 1 | |
6915 | bne cwq_10_61 | |
6916 | set CWQ_BASE, %l6 | |
6917 | #ifndef SPC | |
6918 | add %l6, %o3, %l6 | |
6919 | #endif | |
6920 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
6921 | best_set_reg(0x20610060, %l1, %l2) !# Control Word | |
6922 | sllx %l2, 32, %l2 | |
6923 | stx %l2, [%l6 + 0x0] | |
6924 | membar #Sync | |
6925 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
6926 | sub %l2, 0x40, %l2 | |
6927 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
6928 | wr %r12, %g0, %asi | |
6929 | st %g0, [%r23] | |
6930 | cwq_10_61: | |
6931 | ta T_CHANGE_NONHPRIV | |
6932 | .word 0x93414000 ! 99: RDPC rd %pc, %r9 | |
6933 | .word 0xdb37e0fa ! 100: STQF_I - %f13, [0x00fa, %r31] | |
6934 | .word 0xa9702fe8 ! 101: POPC_I popc 0x0fe8, %r20 | |
6935 | .word 0x89800011 ! 102: WRTICK_R wr %r0, %r17, %tick | |
6936 | cwp_10_64: | |
6937 | set user_data_start, %o7 | |
6938 | .word 0x93902004 ! 103: WRPR_CWP_I wrpr %r0, 0x0004, %cwp | |
6939 | splash_lsu_10_65: | |
6940 | nop | |
6941 | ta T_CHANGE_HPRIV | |
6942 | set 0xe46b03ae, %r2 | |
6943 | mov 0x5, %r1 | |
6944 | sllx %r1, 32, %r1 | |
6945 | or %r1, %r2, %r2 | |
6946 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
6947 | ta T_CHANGE_NONHPRIV | |
6948 | .word 0x3d400001 ! 104: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
6949 | splash_lsu_10_66: | |
6950 | nop | |
6951 | ta T_CHANGE_HPRIV | |
6952 | set 0xe2a9818f, %r2 | |
6953 | mov 0x6, %r1 | |
6954 | sllx %r1, 32, %r1 | |
6955 | or %r1, %r2, %r2 | |
6956 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
6957 | .word 0x3d400001 ! 105: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
6958 | fpinit_10_67: | |
6959 | nop | |
6960 | setx fp_data_quads, %r19, %r20 | |
6961 | ldd [%r20], %f0 | |
6962 | ldd [%r20+8], %f4 | |
6963 | ld [%r20+16], %fsr | |
6964 | ld [%r20+24], %r19 | |
6965 | wr %r19, %g0, %gsr | |
6966 | .word 0x87a80a44 ! 106: FCMPd fcmpd %fcc<n>, %f0, %f4 | |
6967 | ibp_10_68: | |
6968 | nop | |
6969 | ta T_CHANGE_NONHPRIV | |
6970 | .word 0x87acca49 ! 107: FCMPd fcmpd %fcc<n>, %f50, %f40 | |
6971 | ta T_CHANGE_NONHPRIV | |
6972 | .word 0x8143e011 ! 108: MEMBAR membar #LoadLoad | #Lookaside | |
6973 | intveclr_10_70: | |
6974 | nop | |
6975 | ta T_CHANGE_HPRIV | |
6976 | setx 0xed6a6e9ebab02557, %r1, %r28 | |
6977 | stxa %r28, [%g0] 0x72 | |
6978 | .word 0x25400001 ! 109: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
6979 | nop | |
6980 | ta T_CHANGE_HPRIV | |
6981 | mov 0x10, %r10 | |
6982 | set sync_thr_counter6, %r23 | |
6983 | #ifndef SPC | |
6984 | ldxa [%g0]0x63, %o1 | |
6985 | and %o1, 0x38, %o1 | |
6986 | add %o1, %r23, %r23 | |
6987 | #endif | |
6988 | cas [%r23],%g0,%r10 !lock | |
6989 | brnz %r10, sma_10_71 | |
6990 | rd %asi, %r12 | |
6991 | wr %g0, 0x40, %asi | |
6992 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 | |
6993 | set 0x001e1fff, %g1 | |
6994 | stxa %g1, [%g0 + 0x80] %asi | |
6995 | wr %r12, %g0, %asi | |
6996 | st %g0, [%r23] | |
6997 | sma_10_71: | |
6998 | ta T_CHANGE_NONHPRIV | |
6999 | .word 0xd7e7e00b ! 110: CASA_R casa [%r31] %asi, %r11, %r11 | |
7000 | .word 0xc1bfe040 ! 111: STDFA_I stda %f0, [0x0040, %r31] | |
7001 | nop | |
7002 | ta T_CHANGE_HPRIV ! macro | |
7003 | donret_10_72: | |
7004 | rd %pc, %r12 | |
7005 | add %r12, (donretarg_10_72-donret_10_72), %r12 | |
7006 | add %r12, 0x8, %r11 ! nonseq tnpc | |
7007 | wrpr %g0, 0x2, %tl | |
7008 | wrpr %g0, %r12, %tpc | |
7009 | wrpr %g0, %r11, %tnpc | |
7010 | set (0x004cd600 | (16 << 24)), %r13 | |
7011 | and %r12, 0xfff, %r14 | |
7012 | sllx %r14, 30, %r14 | |
7013 | or %r13, %r14, %r20 | |
7014 | wrpr %r20, %g0, %tstate | |
7015 | wrhpr %g0, 0x41d, %htstate | |
7016 | ta T_CHANGE_NONPRIV ! rand=0 (10) | |
7017 | .word 0x27400001 ! 1: FBPUL fbul,a,pn %fcc0, <label_0x1> | |
7018 | retry | |
7019 | donretarg_10_72: | |
7020 | .word 0xa9a409d0 ! 112: FDIVd fdivd %f16, %f16, %f20 | |
7021 | ibp_10_73: | |
7022 | nop | |
7023 | .word 0xd3e7e010 ! 113: CASA_R casa [%r31] %asi, %r16, %r9 | |
7024 | .word 0xe19fe1e0 ! 114: LDDFA_I ldda [%r31, 0x01e0], %f16 | |
7025 | .word 0x8d9036cd ! 115: WRPR_PSTATE_I wrpr %r0, 0x16cd, %pstate | |
7026 | .word 0x87802083 ! 116: WRASI_I wr %r0, 0x0083, %asi | |
7027 | #if (defined SPC || defined CMP1) | |
7028 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_76) + 48, 16, 16)) -> intp(1,0,31) | |
7029 | #else | |
7030 | setx 0xf21ea6f0853b3714, %r1, %r28 | |
7031 | stxa %r28, [%g0] 0x73 | |
7032 | #endif | |
7033 | intvec_10_76: | |
7034 | .word 0x39400001 ! 117: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
7035 | ibp_10_77: | |
7036 | nop | |
7037 | ta T_CHANGE_NONHPRIV | |
7038 | .word 0xa5a489a3 ! 118: FDIVs fdivs %f18, %f3, %f18 | |
7039 | .word 0x93d02033 ! 119: Tcc_I tne icc_or_xcc, %r0 + 51 | |
7040 | mondo_10_78: | |
7041 | nop | |
7042 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
7043 | ta T_CHANGE_PRIV | |
7044 | stxa %r1, [%r0+0x3c8] %asi | |
7045 | .word 0x9d940008 ! 120: WRPR_WSTATE_R wrpr %r16, %r8, %wstate | |
7046 | ibp_10_79: | |
7047 | nop | |
7048 | .word 0xc1bfe180 ! 121: STDFA_I stda %f0, [0x0180, %r31] | |
7049 | ibp_10_80: | |
7050 | nop | |
7051 | ta T_CHANGE_NONHPRIV | |
7052 | .word 0xc3eb0034 ! 122: PREFETCHA_R prefetcha [%r12, %r20] 0x01, #one_read | |
7053 | .word 0x8d802004 ! 123: WRFPRS_I wr %r0, 0x0004, %fprs | |
7054 | splash_hpstate_10_81: | |
7055 | ta T_CHANGE_NONHPRIV | |
7056 | .word 0x2ac9c001 ! 1: BRNZ brnz,a,pt %r7,<label_0x9c001> | |
7057 | .word 0x819826b7 ! 124: WRHPR_HPSTATE_I wrhpr %r0, 0x06b7, %hpstate | |
7058 | ibp_10_82: | |
7059 | nop | |
7060 | ta T_CHANGE_NONHPRIV | |
7061 | .word 0xd11fc012 ! 125: LDDF_R ldd [%r31, %r18], %f8 | |
7062 | nop | |
7063 | ta T_CHANGE_HPRIV ! macro | |
7064 | donret_10_83: | |
7065 | rd %pc, %r12 | |
7066 | add %r12, (donretarg_10_83-donret_10_83+4), %r12 | |
7067 | add %r12, 0x4, %r11 ! seq tnpc | |
7068 | wrpr %g0, 0x1, %tl | |
7069 | wrpr %g0, %r12, %tpc | |
7070 | wrpr %g0, %r11, %tnpc | |
7071 | set (0x00ca2a00 | (32 << 24)), %r13 | |
7072 | and %r12, 0xfff, %r14 | |
7073 | sllx %r14, 30, %r14 | |
7074 | or %r13, %r14, %r20 | |
7075 | wrpr %r20, %g0, %tstate | |
7076 | wrhpr %g0, 0x1ed9, %htstate | |
7077 | ta T_CHANGE_NONHPRIV ! rand=1 (10) | |
7078 | .word 0x21400001 ! 1: FBPN fbn,a,pn %fcc0, <label_0x1> | |
7079 | done | |
7080 | donretarg_10_83: | |
7081 | .word 0x26cc0001 ! 126: BRLZ brlz,a,pt %r16,<label_0xc0001> | |
7082 | .word 0xd0bfc031 ! 127: STDA_R stda %r8, [%r31 + %r17] 0x01 | |
7083 | nop | |
7084 | mov 0x80, %g3 | |
7085 | stxa %g3, [%g3] 0x5f | |
7086 | .word 0xd05fc000 ! 128: LDX_R ldx [%r31 + %r0], %r8 | |
7087 | .word 0x24800001 ! 129: BLE ble,a <label_0x1> | |
7088 | memptr_10_85: | |
7089 | set 0x60340000, %r31 | |
7090 | .word 0x8584b211 ! 130: WRCCR_I wr %r18, 0x1211, %ccr | |
7091 | .word 0x22800001 ! 131: BE be,a <label_0x1> | |
7092 | ibp_10_86: | |
7093 | nop | |
7094 | .word 0xc1bfe180 ! 132: STDFA_I stda %f0, [0x0180, %r31] | |
7095 | .word 0xa3a00166 ! 133: FABSq dis not found | |
7096 | ||
7097 | .word 0xdad7e058 ! 134: LDSHA_I ldsha [%r31, + 0x0058] %asi, %r13 | |
7098 | bcs skip_10_88 | |
7099 | be skip_10_88 | |
7100 | .align 1024 | |
7101 | skip_10_88: | |
7102 | .word 0x93a449c5 ! 135: FDIVd fdivd %f48, %f36, %f40 | |
7103 | fpinit_10_89: | |
7104 | nop | |
7105 | setx fp_data_quads, %r19, %r20 | |
7106 | ldd [%r20], %f0 | |
7107 | ldd [%r20+8], %f4 | |
7108 | ld [%r20+16], %fsr | |
7109 | ld [%r20+24], %r19 | |
7110 | wr %r19, %g0, %gsr | |
7111 | .word 0x91a009a4 ! 136: FDIVs fdivs %f0, %f4, %f8 | |
7112 | br_badelay2_10_90: | |
7113 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
7114 | allclean | |
7115 | .word 0x95b08301 ! 137: ALIGNADDRESS alignaddr %r2, %r1, %r10 | |
7116 | .word 0xe137e070 ! 138: STQF_I - %f16, [0x0070, %r31] | |
7117 | fpinit_10_91: | |
7118 | nop | |
7119 | setx fp_data_quads, %r19, %r20 | |
7120 | ldd [%r20], %f0 | |
7121 | ldd [%r20+8], %f4 | |
7122 | ld [%r20+16], %fsr | |
7123 | ld [%r20+24], %r19 | |
7124 | wr %r19, %g0, %gsr | |
7125 | .word 0xc3e8273e ! 139: PREFETCHA_I prefetcha [%r0, + 0x073e] %asi, #one_read | |
7126 | .word 0x36800001 ! 1: BGE bge,a <label_0x1> | |
7127 | .word 0x8d903cf5 ! 140: WRPR_PSTATE_I wrpr %r0, 0x1cf5, %pstate | |
7128 | ibp_10_93: | |
7129 | nop | |
7130 | .word 0xa5b14492 ! 141: FCMPLE32 fcmple32 %d36, %d18, %r18 | |
7131 | .word 0xa7a000c9 ! 142: FNEGd fnegd %f40, %f50 | |
7132 | set 0x2ad1, %l3 | |
7133 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT | |
7134 | .word 0x9bb187cc ! 143: PDIST pdistn %d6, %d12, %d44 | |
7135 | invalw | |
7136 | mov 0xb0, %r30 | |
7137 | .word 0x91d0001e ! 144: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
7138 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
7139 | reduce_priv_lvl_10_94: | |
7140 | ta T_CHANGE_NONPRIV ! macro | |
7141 | memptr_10_95: | |
7142 | set 0x60340000, %r31 | |
7143 | .word 0x8584a96f ! 146: WRCCR_I wr %r18, 0x096f, %ccr | |
7144 | dvapa_10_96: | |
7145 | nop | |
7146 | ta T_CHANGE_HPRIV | |
7147 | mov 0x9ed, %r20 | |
7148 | mov 0x9, %r19 | |
7149 | sllx %r20, 23, %r20 | |
7150 | or %r19, %r20, %r19 | |
7151 | stxa %r19, [%g0] ASI_LSU_CONTROL | |
7152 | mov 0x38, %r18 | |
7153 | stxa %r31, [%r18]0x58 | |
7154 | ta T_CHANGE_NONHPRIV | |
7155 | .word 0xe7e7e011 ! 147: CASA_R casa [%r31] %asi, %r17, %r19 | |
7156 | .word 0xa784c003 ! 148: WR_GRAPHICS_STATUS_REG_R wr %r19, %r3, %- | |
7157 | .word 0xe637e0e6 ! 149: STH_I sth %r19, [%r31 + 0x00e6] | |
7158 | #if (defined SPC || defined CMP1) | |
7159 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_98) + 40, 16, 16)) -> intp(4,0,4) | |
7160 | #else | |
7161 | setx 0x2155ddce77765283, %r1, %r28 | |
7162 | stxa %r28, [%g0] 0x73 | |
7163 | #endif | |
7164 | intvec_10_98: | |
7165 | .word 0x39400001 ! 150: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
7166 | intveclr_10_99: | |
7167 | nop | |
7168 | ta T_CHANGE_HPRIV | |
7169 | setx 0x02616b63abb65de4, %r1, %r28 | |
7170 | stxa %r28, [%g0] 0x72 | |
7171 | ta T_CHANGE_NONHPRIV | |
7172 | .word 0x25400001 ! 151: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
7173 | .word 0xe6800b40 ! 152: LDUWA_R lduwa [%r0, %r0] 0x5a, %r19 | |
7174 | .word 0xe62fe15f ! 153: STB_I stb %r19, [%r31 + 0x015f] | |
7175 | mondo_10_100: | |
7176 | nop | |
7177 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
7178 | stxa %r18, [%r0+0x3c8] %asi | |
7179 | .word 0x9d91000a ! 154: WRPR_WSTATE_R wrpr %r4, %r10, %wstate | |
7180 | .word 0xa750c000 ! 155: RDPR_TT <illegal instruction> | |
7181 | .word 0x3a800001 ! 156: BCC bcc,a <label_0x1> | |
7182 | brcommon2_10_101: | |
7183 | nop | |
7184 | setx common_target, %r12, %r27 | |
7185 | ba,a .+12 | |
7186 | .word 0x91b7c70b ! 1: FMULD8SUx16 fmuld8ulx16 %f31, %f11, %d8 | |
7187 | ba,a .+8 | |
7188 | jmpl %r27+0, %r27 | |
7189 | .word 0xc19fc3e0 ! 157: LDDFA_R ldda [%r31, %r0], %f0 | |
7190 | tagged_10_102: | |
7191 | tsubcctv %r19, 0x10d7, %r16 | |
7192 | .word 0xd407e05c ! 158: LDUW_I lduw [%r31 + 0x005c], %r10 | |
7193 | splash_cmpr_10_103: | |
7194 | mov 0, %r18 | |
7195 | sllx %r18, 63, %r18 | |
7196 | rd %tick, %r17 | |
7197 | add %r17, 0x100, %r17 | |
7198 | or %r17, %r18, %r17 | |
7199 | .word 0xaf800011 ! 159: WR_TICK_CMPR_REG_R wr %r0, %r17, %- | |
7200 | .word 0xd5e7c034 ! 160: CASA_I casa [%r31] 0x 1, %r20, %r10 | |
7201 | br_longdelay2_10_104: | |
7202 | .word 0x25400001 ! 1: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
7203 | .word 0x24cfc001 ! 161: BRLEZ brlez,a,pt %r31,<label_0xfc001> | |
7204 | nop | |
7205 | ta T_CHANGE_HPRIV | |
7206 | mov 0x10+1, %r10 | |
7207 | set sync_thr_counter5, %r23 | |
7208 | #ifndef SPC | |
7209 | ldxa [%g0]0x63, %o1 | |
7210 | and %o1, 0x38, %o1 | |
7211 | add %o1, %r23, %r23 | |
7212 | sllx %o1, 5, %o3 !(CID*256) | |
7213 | #endif | |
7214 | cas [%r23],%g0,%r10 !lock | |
7215 | brnz %r10, cwq_10_105 | |
7216 | rd %asi, %r12 | |
7217 | wr %g0, 0x40, %asi | |
7218 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
7219 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
7220 | cmp %l1, 1 | |
7221 | bne cwq_10_105 | |
7222 | set CWQ_BASE, %l6 | |
7223 | #ifndef SPC | |
7224 | add %l6, %o3, %l6 | |
7225 | #endif | |
7226 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
7227 | best_set_reg(0x20610020, %l1, %l2) !# Control Word | |
7228 | sllx %l2, 32, %l2 | |
7229 | stx %l2, [%l6 + 0x0] | |
7230 | membar #Sync | |
7231 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
7232 | sub %l2, 0x40, %l2 | |
7233 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
7234 | wr %r12, %g0, %asi | |
7235 | st %g0, [%r23] | |
7236 | cwq_10_105: | |
7237 | ta T_CHANGE_NONHPRIV | |
7238 | .word 0xa3414000 ! 162: RDPC rd %pc, %r17 | |
7239 | splash_hpstate_10_106: | |
7240 | ta T_CHANGE_NONHPRIV | |
7241 | .word 0x2a800001 ! 1: BCS bcs,a <label_0x1> | |
7242 | .word 0x8198398b ! 163: WRHPR_HPSTATE_I wrhpr %r0, 0x198b, %hpstate | |
7243 | trapasi_10_107: | |
7244 | nop | |
7245 | mov 0x20, %r1 ! (VA for ASI 0x5a) | |
7246 | .word 0xd4d04b40 ! 164: LDSHA_R ldsha [%r1, %r0] 0x5a, %r10 | |
7247 | .word 0xc1bfe020 ! 165: STDFA_I stda %f0, [0x0020, %r31] | |
7248 | splash_hpstate_10_108: | |
7249 | ta T_CHANGE_NONHPRIV | |
7250 | .word 0x81983cd6 ! 166: WRHPR_HPSTATE_I wrhpr %r0, 0x1cd6, %hpstate | |
7251 | otherw | |
7252 | mov 0x34, %r30 | |
7253 | .word 0x93d0001e ! 167: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
7254 | .word 0x8d802000 ! 168: WRFPRS_I wr %r0, 0x0000, %fprs | |
7255 | .word 0xd43fe119 ! 169: STD_I std %r10, [%r31 + 0x0119] | |
7256 | jmptr_10_109: | |
7257 | nop | |
7258 | best_set_reg(0xe1200000, %r20, %r27) | |
7259 | .word 0xb7c6c000 ! 170: JMPL_R jmpl %r27 + %r0, %r27 | |
7260 | jmptr_10_110: | |
7261 | nop | |
7262 | best_set_reg(0xe1200000, %r20, %r27) | |
7263 | .word 0xb7c6c000 ! 171: JMPL_R jmpl %r27 + %r0, %r27 | |
7264 | nop | |
7265 | mov 0x80, %g3 | |
7266 | stxa %g3, [%g3] 0x5f | |
7267 | .word 0xd45fc000 ! 172: LDX_R ldx [%r31 + %r0], %r10 | |
7268 | .word 0xe19fdf20 ! 173: LDDFA_R ldda [%r31, %r0], %f16 | |
7269 | .word 0xd51fe000 ! 174: LDDF_I ldd [%r31, 0x0000], %f10 | |
7270 | .word 0xd44fe048 ! 175: LDSB_I ldsb [%r31 + 0x0048], %r10 | |
7271 | .word 0x9194800d ! 176: WRPR_PIL_R wrpr %r18, %r13, %pil | |
7272 | trapasi_10_113: | |
7273 | nop | |
7274 | mov 0x0, %r1 ! (VA for ASI 0x4c) | |
7275 | .word 0xd4d04980 ! 177: LDSHA_R ldsha [%r1, %r0] 0x4c, %r10 | |
7276 | intveclr_10_114: | |
7277 | nop | |
7278 | ta T_CHANGE_HPRIV | |
7279 | setx 0xfd8b8390a1d93c08, %r1, %r28 | |
7280 | stxa %r28, [%g0] 0x72 | |
7281 | ta T_CHANGE_NONHPRIV | |
7282 | .word 0x25400001 ! 178: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
7283 | ibp_10_115: | |
7284 | nop | |
7285 | .word 0xc1bfe020 ! 179: STDFA_I stda %f0, [0x0020, %r31] | |
7286 | .word 0xc30fc000 ! 180: LDXFSR_R ld-fsr [%r31, %r0], %f1 | |
7287 | nop | |
7288 | ta T_CHANGE_HPRIV | |
7289 | mov 0x10+1, %r10 | |
7290 | set sync_thr_counter5, %r23 | |
7291 | #ifndef SPC | |
7292 | ldxa [%g0]0x63, %o1 | |
7293 | and %o1, 0x38, %o1 | |
7294 | add %o1, %r23, %r23 | |
7295 | sllx %o1, 5, %o3 !(CID*256) | |
7296 | #endif | |
7297 | cas [%r23],%g0,%r10 !lock | |
7298 | brnz %r10, cwq_10_116 | |
7299 | rd %asi, %r12 | |
7300 | wr %g0, 0x40, %asi | |
7301 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
7302 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
7303 | cmp %l1, 1 | |
7304 | bne cwq_10_116 | |
7305 | set CWQ_BASE, %l6 | |
7306 | #ifndef SPC | |
7307 | add %l6, %o3, %l6 | |
7308 | #endif | |
7309 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
7310 | best_set_reg(0x206100a0, %l1, %l2) !# Control Word | |
7311 | sllx %l2, 32, %l2 | |
7312 | stx %l2, [%l6 + 0x0] | |
7313 | membar #Sync | |
7314 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
7315 | sub %l2, 0x40, %l2 | |
7316 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
7317 | wr %r12, %g0, %asi | |
7318 | st %g0, [%r23] | |
7319 | cwq_10_116: | |
7320 | ta T_CHANGE_NONHPRIV | |
7321 | .word 0xa5414000 ! 181: RDPC rd %pc, %r18 | |
7322 | splash_cmpr_10_117: | |
7323 | mov 0, %r18 | |
7324 | sllx %r18, 63, %r18 | |
7325 | rd %tick, %r17 | |
7326 | add %r17, 0x100, %r17 | |
7327 | or %r17, %r18, %r17 | |
7328 | ta T_CHANGE_PRIV | |
7329 | .word 0xb3800011 ! 182: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
7330 | intveclr_10_118: | |
7331 | nop | |
7332 | ta T_CHANGE_HPRIV | |
7333 | setx 0x5c7ec9eadd2b7c11, %r1, %r28 | |
7334 | stxa %r28, [%g0] 0x72 | |
7335 | .word 0x25400001 ! 183: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
7336 | .word 0xe0dfe1b8 ! 184: LDXA_I ldxa [%r31, + 0x01b8] %asi, %r16 | |
7337 | intveclr_10_119: | |
7338 | nop | |
7339 | ta T_CHANGE_HPRIV | |
7340 | setx 0x4b549685cb1180dc, %r1, %r28 | |
7341 | stxa %r28, [%g0] 0x72 | |
7342 | .word 0x25400001 ! 185: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
7343 | #if (defined SPC || defined CMP1) | |
7344 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_120) + 48, 16, 16)) -> intp(2,0,31) | |
7345 | #else | |
7346 | setx 0xa56892bc94cb678a, %r1, %r28 | |
7347 | stxa %r28, [%g0] 0x73 | |
7348 | #endif | |
7349 | intvec_10_120: | |
7350 | .word 0x39400001 ! 186: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
7351 | set 0x1dfe, %l3 | |
7352 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT | |
7353 | .word 0xa1b407c4 ! 187: PDIST pdistn %d16, %d4, %d16 | |
7354 | otherw | |
7355 | mov 0x34, %r30 | |
7356 | .word 0x83d0001e ! 188: Tcc_R te icc_or_xcc, %r0 + %r30 | |
7357 | .word 0xa7820007 ! 189: WR_GRAPHICS_STATUS_REG_R wr %r8, %r7, %- | |
7358 | .word 0xda97e008 ! 190: LDUHA_I lduha [%r31, + 0x0008] %asi, %r13 | |
7359 | .word 0x879b317e ! 191: WRHPR_HINTP_I wrhpr %r12, 0x117e, %hintp | |
7360 | .word 0x91d020b4 ! 192: Tcc_I ta icc_or_xcc, %r0 + 180 | |
7361 | .word 0xa781c004 ! 193: WR_GRAPHICS_STATUS_REG_R wr %r7, %r4, %- | |
7362 | dvapa_10_123: | |
7363 | nop | |
7364 | ta T_CHANGE_HPRIV | |
7365 | mov 0xa45, %r20 | |
7366 | mov 0x5, %r19 | |
7367 | sllx %r20, 23, %r20 | |
7368 | or %r19, %r20, %r19 | |
7369 | stxa %r19, [%g0] ASI_LSU_CONTROL | |
7370 | mov 0x38, %r18 | |
7371 | stxa %r31, [%r18]0x58 | |
7372 | ta T_CHANGE_NONHPRIV | |
7373 | .word 0x87a98a52 ! 194: FCMPd fcmpd %fcc<n>, %f6, %f18 | |
7374 | brcommon3_10_124: | |
7375 | nop | |
7376 | setx common_target, %r12, %r27 | |
7377 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
7378 | ba,a .+12 | |
7379 | .word 0xd3e7c031 ! 1: CASA_I casa [%r31] 0x 1, %r17, %r9 | |
7380 | ba,a .+8 | |
7381 | jmpl %r27+0, %r27 | |
7382 | .word 0xd3e7e011 ! 195: CASA_R casa [%r31] %asi, %r17, %r9 | |
7383 | .word 0xc30fc000 ! 196: LDXFSR_R ld-fsr [%r31, %r0], %f1 | |
7384 | dvapa_10_125: | |
7385 | nop | |
7386 | ta T_CHANGE_HPRIV | |
7387 | mov 0x901, %r20 | |
7388 | mov 0x1f, %r19 | |
7389 | sllx %r20, 23, %r20 | |
7390 | or %r19, %r20, %r19 | |
7391 | stxa %r19, [%g0] ASI_LSU_CONTROL | |
7392 | mov 0x38, %r18 | |
7393 | stxa %r31, [%r18]0x58 | |
7394 | ta T_CHANGE_NONHPRIV | |
7395 | .word 0x9f80222c ! 197: SIR sir 0x022c | |
7396 | memptr_10_126: | |
7397 | set user_data_start, %r31 | |
7398 | .word 0x8584a43a ! 198: WRCCR_I wr %r18, 0x043a, %ccr | |
7399 | .word 0xe19fc3e0 ! 199: LDDFA_R ldda [%r31, %r0], %f16 | |
7400 | trapasi_10_128: | |
7401 | nop | |
7402 | mov 0x0, %r1 ! (VA for ASI 0x73) | |
7403 | .word 0xe0d04e60 ! 200: LDSHA_R ldsha [%r1, %r0] 0x73, %r16 | |
7404 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl | |
7405 | reduce_priv_lvl_10_129: | |
7406 | ta T_CHANGE_NONHPRIV ! macro | |
7407 | nop | |
7408 | nop | |
7409 | ta T_CHANGE_PRIV | |
7410 | wrpr %g0, %g0, %gl | |
7411 | nop | |
7412 | nop | |
7413 | setx join_lbl_0_0, %g1, %g2 | |
7414 | jmp %g2 | |
7415 | nop | |
7416 | fork_lbl_0_4: | |
7417 | ta T_CHANGE_NONHPRIV | |
7418 | .word 0xe08008a0 ! 1: LDUWA_R lduwa [%r0, %r0] 0x45, %r16 | |
7419 | .word 0xe19fdf20 ! 2: LDDFA_R ldda [%r31, %r0], %f16 | |
7420 | .word 0xe08008a0 ! 3: LDUWA_R lduwa [%r0, %r0] 0x45, %r16 | |
7421 | .word 0x89800011 ! 4: WRTICK_R wr %r0, %r17, %tick | |
7422 | .word 0x8d802004 ! 5: WRFPRS_I wr %r0, 0x0004, %fprs | |
7423 | .word 0x3f400001 ! 1: FBPO fbo,a,pn %fcc0, <label_0x1> | |
7424 | .word 0x8d9033ce ! 6: WRPR_PSTATE_I wrpr %r0, 0x13ce, %pstate | |
7425 | .word 0xe0bfc020 ! 7: STDA_R stda %r16, [%r31 + %r0] 0x01 | |
7426 | #if (defined SPC || defined CMP1) | |
7427 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_2) + 16, 16, 16)) -> intp(3,0,11) | |
7428 | #else | |
7429 | setx 0x873bc2ffa4dc00db, %r1, %r28 | |
7430 | stxa %r28, [%g0] 0x73 | |
7431 | #endif | |
7432 | intvec_8_2: | |
7433 | .word 0x39400001 ! 8: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
7434 | .word 0xc32fc000 ! 9: STXFSR_R st-sfr %f1, [%r0, %r31] | |
7435 | splash_lsu_8_3: | |
7436 | nop | |
7437 | ta T_CHANGE_HPRIV | |
7438 | set 0xef623113, %r2 | |
7439 | mov 0x3, %r1 | |
7440 | sllx %r1, 32, %r1 | |
7441 | or %r1, %r2, %r2 | |
7442 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
7443 | ta T_CHANGE_NONHPRIV | |
7444 | .word 0x3d400001 ! 10: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
7445 | .word 0x2a780001 ! 11: BPCS <illegal instruction> | |
7446 | splash_decr_8_4: | |
7447 | nop | |
7448 | ta T_CHANGE_HPRIV | |
7449 | mov 8, %r1 | |
7450 | stxa %r10, [%r1] 0x45 | |
7451 | .word 0xa7840012 ! 12: WR_GRAPHICS_STATUS_REG_R wr %r16, %r18, %- | |
7452 | fpinit_8_5: | |
7453 | nop | |
7454 | setx fp_data_quads, %r19, %r20 | |
7455 | ldd [%r20], %f0 | |
7456 | ldd [%r20+8], %f4 | |
7457 | ld [%r20+16], %fsr | |
7458 | ld [%r20+24], %r19 | |
7459 | wr %r19, %g0, %gsr | |
7460 | .word 0x91a009a4 ! 13: FDIVs fdivs %f0, %f4, %f8 | |
7461 | invalw | |
7462 | mov 0xb2, %r30 | |
7463 | .word 0x93d0001e ! 14: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
7464 | .word 0x879c400c ! 15: WRHPR_HINTP_R wrhpr %r17, %r12, %hintp | |
7465 | .word 0xa1703467 ! 16: POPC_I popc 0x1467, %r16 | |
7466 | .word 0x8780208a ! 17: WRASI_I wr %r0, 0x008a, %asi | |
7467 | iaw_8_6: | |
7468 | nop | |
7469 | ta T_CHANGE_HPRIV | |
7470 | mov 8, %r18 | |
7471 | rd %asi, %r12 | |
7472 | wr %r0, 0x41, %asi | |
7473 | set sync_thr_counter4, %r23 | |
7474 | #ifndef SPC | |
7475 | ldxa [%g0]0x63, %r8 | |
7476 | and %r8, 0x38, %r8 ! Core ID | |
7477 | add %r8, %r23, %r23 | |
7478 | #else | |
7479 | mov 0, %r8 | |
7480 | #endif | |
7481 | mov 0x8, %r16 | |
7482 | iaw_startwait8_6: | |
7483 | cas [%r23],%g0,%r16 !lock | |
7484 | brz,a %r16, continue_iaw_8_6 | |
7485 | mov (~0x8&0xf), %r16 | |
7486 | ld [%r23], %r16 | |
7487 | iaw_wait8_6: | |
7488 | brnz %r16, iaw_wait8_6 | |
7489 | ld [%r23], %r16 | |
7490 | ba iaw_startwait8_6 | |
7491 | mov 0x8, %r16 | |
7492 | continue_iaw_8_6: | |
7493 | sllx %r16, %r8, %r16 !Mask for my core only | |
7494 | ldxa [0x58]%asi, %r17 !Running_status | |
7495 | wait_for_stat_8_6: | |
7496 | ldxa [0x50]%asi, %r13 !Running_rw | |
7497 | cmp %r13, %r17 | |
7498 | bne,a %xcc, wait_for_stat_8_6 | |
7499 | ldxa [0x58]%asi, %r17 !Running_status | |
7500 | stxa %r16, [0x68]%asi !Park (W1C) | |
7501 | ldxa [0x50]%asi, %r14 !Running_rw | |
7502 | wait_for_iaw_8_6: | |
7503 | ldxa [0x58]%asi, %r17 !Running_status | |
7504 | cmp %r14, %r17 | |
7505 | bne,a %xcc, wait_for_iaw_8_6 | |
7506 | ldxa [0x50]%asi, %r14 !Running_rw | |
7507 | iaw_doit8_6: | |
7508 | mov 0x38, %r18 | |
7509 | iaw4_8_6: | |
7510 | setx common_target, %r20, %r19 | |
7511 | or %r19, 0x1, %r19 | |
7512 | stxa %r19, [%r18]0x50 | |
7513 | stxa %r16, [0x60] %asi ! Unpark (W1S) | |
7514 | st %g0, [%r23] !clear lock | |
7515 | wr %r0, %r12, %asi ! restore %asi | |
7516 | ta T_CHANGE_NONHPRIV | |
7517 | .word 0xa7b4848b ! 18: FCMPLE32 fcmple32 %d18, %d42, %r19 | |
7518 | .word 0x9ba00170 ! 19: FABSq dis not found | |
7519 | ||
7520 | .word 0xe49fe0b8 ! 20: LDDA_I ldda [%r31, + 0x00b8] %asi, %r18 | |
7521 | .word 0xe44fe1d0 ! 21: LDSB_I ldsb [%r31 + 0x01d0], %r18 | |
7522 | memptr_8_8: | |
7523 | set 0x60140000, %r31 | |
7524 | .word 0x8584eba3 ! 22: WRCCR_I wr %r19, 0x0ba3, %ccr | |
7525 | splash_tba_8_9: | |
7526 | nop | |
7527 | ta T_CHANGE_PRIV | |
7528 | setx 0x00000000003a0000, %r11, %r12 | |
7529 | .word 0x8b90000c ! 23: WRPR_TBA_R wrpr %r0, %r12, %tba | |
7530 | nop | |
7531 | ta T_CHANGE_HPRIV | |
7532 | mov 0x8+1, %r10 | |
7533 | set sync_thr_counter5, %r23 | |
7534 | #ifndef SPC | |
7535 | ldxa [%g0]0x63, %o1 | |
7536 | and %o1, 0x38, %o1 | |
7537 | add %o1, %r23, %r23 | |
7538 | sllx %o1, 5, %o3 !(CID*256) | |
7539 | #endif | |
7540 | cas [%r23],%g0,%r10 !lock | |
7541 | brnz %r10, cwq_8_10 | |
7542 | rd %asi, %r12 | |
7543 | wr %g0, 0x40, %asi | |
7544 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
7545 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
7546 | cmp %l1, 1 | |
7547 | bne cwq_8_10 | |
7548 | set CWQ_BASE, %l6 | |
7549 | #ifndef SPC | |
7550 | add %l6, %o3, %l6 | |
7551 | #endif | |
7552 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
7553 | best_set_reg(0x20610030, %l1, %l2) !# Control Word | |
7554 | sllx %l2, 32, %l2 | |
7555 | stx %l2, [%l6 + 0x0] | |
7556 | membar #Sync | |
7557 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
7558 | sub %l2, 0x40, %l2 | |
7559 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
7560 | wr %r12, %g0, %asi | |
7561 | st %g0, [%r23] | |
7562 | cwq_8_10: | |
7563 | ta T_CHANGE_NONHPRIV | |
7564 | .word 0xa1414000 ! 24: RDPC rd %pc, %r16 | |
7565 | .word 0x8d903a8a ! 25: WRPR_PSTATE_I wrpr %r0, 0x1a8a, %pstate | |
7566 | brcommon1_8_12: | |
7567 | nop | |
7568 | setx common_target, %r12, %r27 | |
7569 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
7570 | ba,a .+12 | |
7571 | .word 0xa1702090 ! 1: POPC_I popc 0x0090, %r16 | |
7572 | ba,a .+8 | |
7573 | jmpl %r27+0, %r27 | |
7574 | .word 0x87ac8a4d ! 26: FCMPd fcmpd %fcc<n>, %f18, %f44 | |
7575 | intveclr_8_13: | |
7576 | nop | |
7577 | ta T_CHANGE_HPRIV | |
7578 | setx 0x2e1c9b9d88028234, %r1, %r28 | |
7579 | stxa %r28, [%g0] 0x72 | |
7580 | ta T_CHANGE_NONHPRIV | |
7581 | .word 0x25400001 ! 27: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
7582 | splash_lsu_8_14: | |
7583 | nop | |
7584 | ta T_CHANGE_HPRIV | |
7585 | set 0x543c992b, %r2 | |
7586 | mov 0x6, %r1 | |
7587 | sllx %r1, 32, %r1 | |
7588 | or %r1, %r2, %r2 | |
7589 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
7590 | ta T_CHANGE_NONHPRIV | |
7591 | .word 0x3d400001 ! 28: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
7592 | splash_cmpr_8_15: | |
7593 | mov 0, %r18 | |
7594 | sllx %r18, 63, %r18 | |
7595 | rd %tick, %r17 | |
7596 | add %r17, 0x100, %r17 | |
7597 | or %r17, %r18, %r17 | |
7598 | ta T_CHANGE_HPRIV | |
7599 | wrhpr %r17, %g0, %hsys_tick_cmpr | |
7600 | .word 0xb3800011 ! 29: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
7601 | brcommon1_8_16: | |
7602 | nop | |
7603 | setx common_target, %r12, %r27 | |
7604 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
7605 | ba,a .+12 | |
7606 | .word 0xa9b7c7d3 ! 1: PDIST pdistn %d62, %d50, %d20 | |
7607 | ba,a .+8 | |
7608 | jmpl %r27+0, %r27 | |
7609 | .word 0x93a089aa ! 30: FDIVs fdivs %f2, %f10, %f9 | |
7610 | .word 0xd03fc000 ! 31: STD_R std %r8, [%r31 + %r0] | |
7611 | splash_tba_8_17: | |
7612 | nop | |
7613 | ta T_CHANGE_PRIV | |
7614 | setx 0x00000000003a0000, %r11, %r12 | |
7615 | .word 0x8b90000c ! 32: WRPR_TBA_R wrpr %r0, %r12, %tba | |
7616 | ibp_8_18: | |
7617 | nop | |
7618 | .word 0xd11fc008 ! 33: LDDF_R ldd [%r31, %r8], %f8 | |
7619 | .word 0xd127c000 ! 34: STF_R st %f8, [%r0, %r31] | |
7620 | .word 0xd0c7e190 ! 35: LDSWA_I ldswa [%r31, + 0x0190] %asi, %r8 | |
7621 | ibp_8_19: | |
7622 | nop | |
7623 | .word 0xd0dfc034 ! 36: LDXA_R ldxa [%r31, %r20] 0x01, %r8 | |
7624 | splash_cmpr_8_20: | |
7625 | mov 1, %r18 | |
7626 | sllx %r18, 63, %r18 | |
7627 | rd %tick, %r17 | |
7628 | add %r17, 0x60, %r17 | |
7629 | or %r17, %r18, %r17 | |
7630 | .word 0xaf800011 ! 37: WR_TICK_CMPR_REG_R wr %r0, %r17, %- | |
7631 | .word 0xe19fe0a0 ! 38: LDDFA_I ldda [%r31, 0x00a0], %f16 | |
7632 | nop | |
7633 | ta T_CHANGE_HPRIV | |
7634 | mov 0x8+1, %r10 | |
7635 | set sync_thr_counter5, %r23 | |
7636 | #ifndef SPC | |
7637 | ldxa [%g0]0x63, %o1 | |
7638 | and %o1, 0x38, %o1 | |
7639 | add %o1, %r23, %r23 | |
7640 | sllx %o1, 5, %o3 !(CID*256) | |
7641 | #endif | |
7642 | cas [%r23],%g0,%r10 !lock | |
7643 | brnz %r10, cwq_8_21 | |
7644 | rd %asi, %r12 | |
7645 | wr %g0, 0x40, %asi | |
7646 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
7647 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
7648 | cmp %l1, 1 | |
7649 | bne cwq_8_21 | |
7650 | set CWQ_BASE, %l6 | |
7651 | #ifndef SPC | |
7652 | add %l6, %o3, %l6 | |
7653 | #endif | |
7654 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
7655 | best_set_reg(0x20610040, %l1, %l2) !# Control Word | |
7656 | sllx %l2, 32, %l2 | |
7657 | stx %l2, [%l6 + 0x0] | |
7658 | membar #Sync | |
7659 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
7660 | sub %l2, 0x40, %l2 | |
7661 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
7662 | wr %r12, %g0, %asi | |
7663 | st %g0, [%r23] | |
7664 | cwq_8_21: | |
7665 | ta T_CHANGE_NONHPRIV | |
7666 | .word 0xa3414000 ! 39: RDPC rd %pc, %r17 | |
7667 | unsupttte_8_22: | |
7668 | nop | |
7669 | ta T_CHANGE_HPRIV | |
7670 | mov 1, %r20 | |
7671 | sllx %r20, 63, %r20 | |
7672 | or %r20, 2,%r20 | |
7673 | stxa %r20, [%g0]0x5c ! D unsupported page size .. | |
7674 | ta T_CHANGE_NONHPRIV | |
7675 | .word 0x9ba089b3 ! 40: FDIVs fdivs %f2, %f19, %f13 | |
7676 | jmptr_8_23: | |
7677 | nop | |
7678 | best_set_reg(0xe0a00000, %r20, %r27) | |
7679 | .word 0xb7c6c000 ! 41: JMPL_R jmpl %r27 + %r0, %r27 | |
7680 | .word 0x93508000 ! 42: RDPR_TSTATE <illegal instruction> | |
7681 | .word 0xe6dfe098 ! 43: LDXA_I ldxa [%r31, + 0x0098] %asi, %r19 | |
7682 | iaw_8_24: | |
7683 | nop | |
7684 | ta T_CHANGE_HPRIV | |
7685 | mov 8, %r18 | |
7686 | rd %asi, %r12 | |
7687 | wr %r0, 0x41, %asi | |
7688 | set sync_thr_counter4, %r23 | |
7689 | #ifndef SPC | |
7690 | ldxa [%g0]0x63, %r8 | |
7691 | and %r8, 0x38, %r8 ! Core ID | |
7692 | add %r8, %r23, %r23 | |
7693 | #else | |
7694 | mov 0, %r8 | |
7695 | #endif | |
7696 | mov 0x8, %r16 | |
7697 | iaw_startwait8_24: | |
7698 | cas [%r23],%g0,%r16 !lock | |
7699 | brz,a %r16, continue_iaw_8_24 | |
7700 | mov (~0x8&0xf), %r16 | |
7701 | ld [%r23], %r16 | |
7702 | iaw_wait8_24: | |
7703 | brnz %r16, iaw_wait8_24 | |
7704 | ld [%r23], %r16 | |
7705 | ba iaw_startwait8_24 | |
7706 | mov 0x8, %r16 | |
7707 | continue_iaw_8_24: | |
7708 | sllx %r16, %r8, %r16 !Mask for my core only | |
7709 | ldxa [0x58]%asi, %r17 !Running_status | |
7710 | wait_for_stat_8_24: | |
7711 | ldxa [0x50]%asi, %r13 !Running_rw | |
7712 | cmp %r13, %r17 | |
7713 | bne,a %xcc, wait_for_stat_8_24 | |
7714 | ldxa [0x58]%asi, %r17 !Running_status | |
7715 | stxa %r16, [0x68]%asi !Park (W1C) | |
7716 | ldxa [0x50]%asi, %r14 !Running_rw | |
7717 | wait_for_iaw_8_24: | |
7718 | ldxa [0x58]%asi, %r17 !Running_status | |
7719 | cmp %r14, %r17 | |
7720 | bne,a %xcc, wait_for_iaw_8_24 | |
7721 | ldxa [0x50]%asi, %r14 !Running_rw | |
7722 | iaw_doit8_24: | |
7723 | mov 0x38, %r18 | |
7724 | iaw0_8_24: | |
7725 | rd %pc, %r19 | |
7726 | add %r19, (16+1), %r19 | |
7727 | stxa %r19, [%r18]0x50 | |
7728 | stxa %r16, [0x60] %asi ! Unpark (W1S) | |
7729 | st %g0, [%r23] !clear lock | |
7730 | wr %r0, %r12, %asi ! restore %asi | |
7731 | ta T_CHANGE_NONHPRIV | |
7732 | .word 0x99b28482 ! 44: FCMPLE32 fcmple32 %d10, %d2, %r12 | |
7733 | ba,a skip_8_25 | |
7734 | fbul skip_8_25 | |
7735 | .align 128 | |
7736 | skip_8_25: | |
7737 | .word 0xc36cbc29 ! 45: PREFETCH_I prefetch [%r18 + 0xfffffc29], #one_read | |
7738 | br_longdelay4_8_26: | |
7739 | nop | |
7740 | not %g0, %r12 | |
7741 | jmp %r12 | |
7742 | .word 0x9d902003 ! 46: WRPR_WSTATE_I wrpr %r0, 0x0003, %wstate | |
7743 | setx 0x9f0a55e5dc840f57, %r1, %r28 | |
7744 | stxa %r28, [%g0] 0x73 | |
7745 | intvec_8_27: | |
7746 | .word 0x39400001 ! 47: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
7747 | unsupttte_8_28: | |
7748 | nop | |
7749 | ta T_CHANGE_HPRIV | |
7750 | mov 1, %r20 | |
7751 | sllx %r20, 63, %r20 | |
7752 | or %r20, 2,%r20 | |
7753 | stxa %r20, [%g0]0x5c ! D unsupported page size .. | |
7754 | ta T_CHANGE_NONHPRIV | |
7755 | .word 0x9ba309b1 ! 48: FDIVs fdivs %f12, %f17, %f13 | |
7756 | .word 0xe677c000 ! 49: STX_R stx %r19, [%r31 + %r0] | |
7757 | intveclr_8_29: | |
7758 | nop | |
7759 | ta T_CHANGE_HPRIV | |
7760 | setx 0x32360dbf98097d70, %r1, %r28 | |
7761 | stxa %r28, [%g0] 0x72 | |
7762 | ta T_CHANGE_NONHPRIV | |
7763 | .word 0x25400001 ! 50: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
7764 | mondo_8_30: | |
7765 | nop | |
7766 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
7767 | ta T_CHANGE_PRIV | |
7768 | stxa %r17, [%r0+0x3e0] %asi | |
7769 | .word 0x9d94c010 ! 51: WRPR_WSTATE_R wrpr %r19, %r16, %wstate | |
7770 | .word 0xe63fe050 ! 52: STD_I std %r19, [%r31 + 0x0050] | |
7771 | .word 0xa7846d7b ! 53: WR_GRAPHICS_STATUS_REG_I wr %r17, 0x0d7b, %- | |
7772 | .word 0xe71fc000 ! 54: LDDF_R ldd [%r31, %r0], %f19 | |
7773 | .word 0x37400001 ! 1: FBPGE fbge,a,pn %fcc0, <label_0x1> | |
7774 | .word 0x8d902611 ! 55: WRPR_PSTATE_I wrpr %r0, 0x0611, %pstate | |
7775 | splash_tba_8_32: | |
7776 | nop | |
7777 | ta T_CHANGE_PRIV | |
7778 | set 0x120000, %r12 | |
7779 | .word 0x8b90000c ! 56: WRPR_TBA_R wrpr %r0, %r12, %tba | |
7780 | unsupttte_8_33: | |
7781 | nop | |
7782 | ta T_CHANGE_HPRIV | |
7783 | mov 1, %r20 | |
7784 | sllx %r20, 63, %r20 | |
7785 | or %r20, 2,%r20 | |
7786 | stxa %r20, [%g0]0x54 ! I unsupported page size .. | |
7787 | ta T_CHANGE_NONHPRIV | |
7788 | .word 0x87a94a46 ! 57: FCMPd fcmpd %fcc<n>, %f36, %f6 | |
7789 | .word 0x89800011 ! 58: WRTICK_R wr %r0, %r17, %tick | |
7790 | ibp_8_35: | |
7791 | nop | |
7792 | .word 0xe8bfc034 ! 59: STDA_R stda %r20, [%r31 + %r20] 0x01 | |
7793 | .word 0xe8cfe060 ! 60: LDSBA_I ldsba [%r31, + 0x0060] %asi, %r20 | |
7794 | iaw_8_36: | |
7795 | nop | |
7796 | ta T_CHANGE_HPRIV | |
7797 | mov 8, %r18 | |
7798 | rd %asi, %r12 | |
7799 | wr %r0, 0x41, %asi | |
7800 | set sync_thr_counter4, %r23 | |
7801 | #ifndef SPC | |
7802 | ldxa [%g0]0x63, %r8 | |
7803 | and %r8, 0x38, %r8 ! Core ID | |
7804 | add %r8, %r23, %r23 | |
7805 | #else | |
7806 | mov 0, %r8 | |
7807 | #endif | |
7808 | mov 0x8, %r16 | |
7809 | iaw_startwait8_36: | |
7810 | cas [%r23],%g0,%r16 !lock | |
7811 | brz,a %r16, continue_iaw_8_36 | |
7812 | mov (~0x8&0xf), %r16 | |
7813 | ld [%r23], %r16 | |
7814 | iaw_wait8_36: | |
7815 | brnz %r16, iaw_wait8_36 | |
7816 | ld [%r23], %r16 | |
7817 | ba iaw_startwait8_36 | |
7818 | mov 0x8, %r16 | |
7819 | continue_iaw_8_36: | |
7820 | sllx %r16, %r8, %r16 !Mask for my core only | |
7821 | ldxa [0x58]%asi, %r17 !Running_status | |
7822 | wait_for_stat_8_36: | |
7823 | ldxa [0x50]%asi, %r13 !Running_rw | |
7824 | cmp %r13, %r17 | |
7825 | bne,a %xcc, wait_for_stat_8_36 | |
7826 | ldxa [0x58]%asi, %r17 !Running_status | |
7827 | stxa %r16, [0x68]%asi !Park (W1C) | |
7828 | ldxa [0x50]%asi, %r14 !Running_rw | |
7829 | wait_for_iaw_8_36: | |
7830 | ldxa [0x58]%asi, %r17 !Running_status | |
7831 | cmp %r14, %r17 | |
7832 | bne,a %xcc, wait_for_iaw_8_36 | |
7833 | ldxa [0x50]%asi, %r14 !Running_rw | |
7834 | iaw_doit8_36: | |
7835 | mov 0x38, %r18 | |
7836 | iaw2_8_36: | |
7837 | rdpr %tba, %r19 | |
7838 | mov 0x120, %r20 | |
7839 | sllx %r20, 5, %r20 | |
7840 | add %r20, %r19, %r19 | |
7841 | stxa %r19, [%r18]0x50 | |
7842 | stxa %r16, [0x60] %asi ! Unpark (W1S) | |
7843 | st %g0, [%r23] !clear lock | |
7844 | wr %r0, %r12, %asi ! restore %asi | |
7845 | ta T_CHANGE_NONHPRIV | |
7846 | .word 0xa3b187d3 ! 61: PDIST pdistn %d6, %d50, %d48 | |
7847 | ceter_8_37: | |
7848 | nop | |
7849 | ta T_CHANGE_HPRIV | |
7850 | mov 7, %r17 | |
7851 | sllx %r17, 60, %r17 | |
7852 | mov 0x18, %r16 | |
7853 | stxa %r17, [%r16]0x4c | |
7854 | ta T_CHANGE_NONHPRIV | |
7855 | .word 0xa1410000 ! 62: RDTICK rd %tick, %r16 | |
7856 | iaw_8_38: | |
7857 | nop | |
7858 | ta T_CHANGE_HPRIV | |
7859 | mov 8, %r18 | |
7860 | rd %asi, %r12 | |
7861 | wr %r0, 0x41, %asi | |
7862 | set sync_thr_counter4, %r23 | |
7863 | #ifndef SPC | |
7864 | ldxa [%g0]0x63, %r8 | |
7865 | and %r8, 0x38, %r8 ! Core ID | |
7866 | add %r8, %r23, %r23 | |
7867 | #else | |
7868 | mov 0, %r8 | |
7869 | #endif | |
7870 | mov 0x8, %r16 | |
7871 | iaw_startwait8_38: | |
7872 | cas [%r23],%g0,%r16 !lock | |
7873 | brz,a %r16, continue_iaw_8_38 | |
7874 | mov (~0x8&0xf), %r16 | |
7875 | ld [%r23], %r16 | |
7876 | iaw_wait8_38: | |
7877 | brnz %r16, iaw_wait8_38 | |
7878 | ld [%r23], %r16 | |
7879 | ba iaw_startwait8_38 | |
7880 | mov 0x8, %r16 | |
7881 | continue_iaw_8_38: | |
7882 | sllx %r16, %r8, %r16 !Mask for my core only | |
7883 | ldxa [0x58]%asi, %r17 !Running_status | |
7884 | wait_for_stat_8_38: | |
7885 | ldxa [0x50]%asi, %r13 !Running_rw | |
7886 | cmp %r13, %r17 | |
7887 | bne,a %xcc, wait_for_stat_8_38 | |
7888 | ldxa [0x58]%asi, %r17 !Running_status | |
7889 | stxa %r16, [0x68]%asi !Park (W1C) | |
7890 | ldxa [0x50]%asi, %r14 !Running_rw | |
7891 | wait_for_iaw_8_38: | |
7892 | ldxa [0x58]%asi, %r17 !Running_status | |
7893 | cmp %r14, %r17 | |
7894 | bne,a %xcc, wait_for_iaw_8_38 | |
7895 | ldxa [0x50]%asi, %r14 !Running_rw | |
7896 | iaw_doit8_38: | |
7897 | mov 0x38, %r18 | |
7898 | iaw4_8_38: | |
7899 | setx common_target, %r20, %r19 | |
7900 | or %r19, 0x1, %r19 | |
7901 | stxa %r19, [%r18]0x50 | |
7902 | stxa %r16, [0x60] %asi ! Unpark (W1S) | |
7903 | st %g0, [%r23] !clear lock | |
7904 | wr %r0, %r12, %asi ! restore %asi | |
7905 | ta T_CHANGE_NONHPRIV | |
7906 | .word 0xd3e7e014 ! 63: CASA_R casa [%r31] %asi, %r20, %r9 | |
7907 | mondo_8_39: | |
7908 | nop | |
7909 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
7910 | stxa %r17, [%r0+0x3e8] %asi | |
7911 | .word 0x9d950014 ! 64: WRPR_WSTATE_R wrpr %r20, %r20, %wstate | |
7912 | bg,a skip_8_40 | |
7913 | fble skip_8_40 | |
7914 | .align 2048 | |
7915 | skip_8_40: | |
7916 | .word 0xd23fc000 ! 65: STD_R std %r9, [%r31 + %r0] | |
7917 | fpinit_8_41: | |
7918 | nop | |
7919 | setx fp_data_quads, %r19, %r20 | |
7920 | ldd [%r20], %f0 | |
7921 | ldd [%r20+8], %f4 | |
7922 | ld [%r20+16], %fsr | |
7923 | ld [%r20+24], %r19 | |
7924 | wr %r19, %g0, %gsr | |
7925 | .word 0x87a80a44 ! 66: FCMPd fcmpd %fcc<n>, %f0, %f4 | |
7926 | nop | |
7927 | ta T_CHANGE_HPRIV ! macro | |
7928 | donret_8_42: | |
7929 | rd %pc, %r12 | |
7930 | add %r12, (donretarg_8_42-donret_8_42+4), %r12 | |
7931 | add %r12, 0x4, %r11 ! seq tnpc | |
7932 | wrpr %g0, 0x1, %tl | |
7933 | wrpr %g0, %r12, %tpc | |
7934 | wrpr %g0, %r11, %tnpc | |
7935 | set (0x002f4d00 | (0x83 << 24)), %r13 | |
7936 | and %r12, 0xfff, %r14 | |
7937 | sllx %r14, 30, %r14 | |
7938 | or %r13, %r14, %r20 | |
7939 | wrpr %r20, %g0, %tstate | |
7940 | wrhpr %g0, 0x15ce, %htstate | |
7941 | ta T_CHANGE_NONHPRIV ! rand=1 (8) | |
7942 | retry | |
7943 | donretarg_8_42: | |
7944 | .word 0xd26fe055 ! 67: LDSTUB_I ldstub %r9, [%r31 + 0x0055] | |
7945 | ibp_8_43: | |
7946 | nop | |
7947 | .word 0xa1a449b1 ! 68: FDIVs fdivs %f17, %f17, %f16 | |
7948 | splash_tba_8_44: | |
7949 | nop | |
7950 | ta T_CHANGE_PRIV | |
7951 | set 0x120000, %r12 | |
7952 | .word 0x8b90000c ! 69: WRPR_TBA_R wrpr %r0, %r12, %tba | |
7953 | jmptr_8_45: | |
7954 | nop | |
7955 | best_set_reg(0xe0a00000, %r20, %r27) | |
7956 | .word 0xb7c6c000 ! 70: JMPL_R jmpl %r27 + %r0, %r27 | |
7957 | .word 0xe6dfe1a8 ! 71: LDXA_I ldxa [%r31, + 0x01a8] %asi, %r19 | |
7958 | .word 0xe737e0a8 ! 72: STQF_I - %f19, [0x00a8, %r31] | |
7959 | nop | |
7960 | mov 0x80, %g3 | |
7961 | stxa %g3, [%g3] 0x5f | |
7962 | .word 0xe65fc000 ! 73: LDX_R ldx [%r31 + %r0], %r19 | |
7963 | set 0x3ccf, %l3 | |
7964 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT | |
7965 | .word 0x97b507d2 ! 74: PDIST pdistn %d20, %d18, %d42 | |
7966 | .word 0xd22fe0f7 ! 75: STB_I stb %r9, [%r31 + 0x00f7] | |
7967 | nop | |
7968 | mov 0x80, %g3 | |
7969 | stxa %g3, [%g3] 0x5f | |
7970 | .word 0xd25fc000 ! 76: LDX_R ldx [%r31 + %r0], %r9 | |
7971 | .word 0x9190c004 ! 77: WRPR_PIL_R wrpr %r3, %r4, %pil | |
7972 | iaw_8_47: | |
7973 | nop | |
7974 | ta T_CHANGE_HPRIV | |
7975 | mov 8, %r18 | |
7976 | rd %asi, %r12 | |
7977 | wr %r0, 0x41, %asi | |
7978 | set sync_thr_counter4, %r23 | |
7979 | #ifndef SPC | |
7980 | ldxa [%g0]0x63, %r8 | |
7981 | and %r8, 0x38, %r8 ! Core ID | |
7982 | add %r8, %r23, %r23 | |
7983 | #else | |
7984 | mov 0, %r8 | |
7985 | #endif | |
7986 | mov 0x8, %r16 | |
7987 | iaw_startwait8_47: | |
7988 | cas [%r23],%g0,%r16 !lock | |
7989 | brz,a %r16, continue_iaw_8_47 | |
7990 | mov (~0x8&0xf), %r16 | |
7991 | ld [%r23], %r16 | |
7992 | iaw_wait8_47: | |
7993 | brnz %r16, iaw_wait8_47 | |
7994 | ld [%r23], %r16 | |
7995 | ba iaw_startwait8_47 | |
7996 | mov 0x8, %r16 | |
7997 | continue_iaw_8_47: | |
7998 | sllx %r16, %r8, %r16 !Mask for my core only | |
7999 | ldxa [0x58]%asi, %r17 !Running_status | |
8000 | wait_for_stat_8_47: | |
8001 | ldxa [0x50]%asi, %r13 !Running_rw | |
8002 | cmp %r13, %r17 | |
8003 | bne,a %xcc, wait_for_stat_8_47 | |
8004 | ldxa [0x58]%asi, %r17 !Running_status | |
8005 | stxa %r16, [0x68]%asi !Park (W1C) | |
8006 | ldxa [0x50]%asi, %r14 !Running_rw | |
8007 | wait_for_iaw_8_47: | |
8008 | ldxa [0x58]%asi, %r17 !Running_status | |
8009 | cmp %r14, %r17 | |
8010 | bne,a %xcc, wait_for_iaw_8_47 | |
8011 | ldxa [0x50]%asi, %r14 !Running_rw | |
8012 | iaw_doit8_47: | |
8013 | mov 0x38, %r18 | |
8014 | iaw4_8_47: | |
8015 | setx common_target, %r20, %r19 | |
8016 | or %r19, 0x1, %r19 | |
8017 | stxa %r19, [%r18]0x50 | |
8018 | stxa %r16, [0x60] %asi ! Unpark (W1S) | |
8019 | st %g0, [%r23] !clear lock | |
8020 | wr %r0, %r12, %asi ! restore %asi | |
8021 | ta T_CHANGE_NONHPRIV | |
8022 | .word 0xd31fe1e0 ! 78: LDDF_I ldd [%r31, 0x01e0], %f9 | |
8023 | .word 0x93d02032 ! 79: Tcc_I tne icc_or_xcc, %r0 + 50 | |
8024 | .word 0x89800011 ! 80: WRTICK_R wr %r0, %r17, %tick | |
8025 | splash_tba_8_49: | |
8026 | nop | |
8027 | ta T_CHANGE_PRIV | |
8028 | setx 0x00000000003a0000, %r11, %r12 | |
8029 | .word 0x8b90000c ! 81: WRPR_TBA_R wrpr %r0, %r12, %tba | |
8030 | intveclr_8_50: | |
8031 | nop | |
8032 | ta T_CHANGE_HPRIV | |
8033 | setx 0xfc30ea0a6a3887bc, %r1, %r28 | |
8034 | stxa %r28, [%g0] 0x72 | |
8035 | .word 0x25400001 ! 82: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
8036 | nop | |
8037 | mov 0x80, %g3 | |
8038 | stxa %g3, [%g3] 0x5f | |
8039 | .word 0xd25fc000 ! 83: LDX_R ldx [%r31 + %r0], %r9 | |
8040 | .word 0xd337e04a ! 84: STQF_I - %f9, [0x004a, %r31] | |
8041 | memptr_8_51: | |
8042 | set user_data_start, %r31 | |
8043 | .word 0x8581201a ! 85: WRCCR_I wr %r4, 0x001a, %ccr | |
8044 | invalw | |
8045 | mov 0xb2, %r30 | |
8046 | .word 0x83d0001e ! 86: Tcc_R te icc_or_xcc, %r0 + %r30 | |
8047 | .word 0xd327c000 ! 87: STF_R st %f9, [%r0, %r31] | |
8048 | jmptr_8_52: | |
8049 | nop | |
8050 | best_set_reg(0xe0a00000, %r20, %r27) | |
8051 | .word 0xb7c6c000 ! 88: JMPL_R jmpl %r27 + %r0, %r27 | |
8052 | setx 0xe0b2c2274147251f, %r1, %r28 | |
8053 | stxa %r28, [%g0] 0x73 | |
8054 | intvec_8_53: | |
8055 | .word 0x39400001 ! 89: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
8056 | jmptr_8_54: | |
8057 | nop | |
8058 | best_set_reg(0xe0a00000, %r20, %r27) | |
8059 | .word 0xb7c6c000 ! 90: JMPL_R jmpl %r27 + %r0, %r27 | |
8060 | pmu_8_55: | |
8061 | nop | |
8062 | setx 0xfffffa4efffff001, %g1, %g7 | |
8063 | .word 0xa3800007 ! 91: WR_PERF_COUNTER_R wr %r0, %r7, %- | |
8064 | .word 0xd2800c60 ! 92: LDUWA_R lduwa [%r0, %r0] 0x63, %r9 | |
8065 | nop | |
8066 | ta T_CHANGE_HPRIV | |
8067 | mov 0x8+1, %r10 | |
8068 | set sync_thr_counter5, %r23 | |
8069 | #ifndef SPC | |
8070 | ldxa [%g0]0x63, %o1 | |
8071 | and %o1, 0x38, %o1 | |
8072 | add %o1, %r23, %r23 | |
8073 | sllx %o1, 5, %o3 !(CID*256) | |
8074 | #endif | |
8075 | cas [%r23],%g0,%r10 !lock | |
8076 | brnz %r10, cwq_8_56 | |
8077 | rd %asi, %r12 | |
8078 | wr %g0, 0x40, %asi | |
8079 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
8080 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
8081 | cmp %l1, 1 | |
8082 | bne cwq_8_56 | |
8083 | set CWQ_BASE, %l6 | |
8084 | #ifndef SPC | |
8085 | add %l6, %o3, %l6 | |
8086 | #endif | |
8087 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
8088 | best_set_reg(0x20610070, %l1, %l2) !# Control Word | |
8089 | sllx %l2, 32, %l2 | |
8090 | stx %l2, [%l6 + 0x0] | |
8091 | membar #Sync | |
8092 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
8093 | sub %l2, 0x40, %l2 | |
8094 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
8095 | wr %r12, %g0, %asi | |
8096 | st %g0, [%r23] | |
8097 | cwq_8_56: | |
8098 | ta T_CHANGE_NONHPRIV | |
8099 | .word 0x9b414000 ! 93: RDPC rd %pc, %r13 | |
8100 | brcommon3_8_57: | |
8101 | nop | |
8102 | setx common_target, %r12, %r27 | |
8103 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
8104 | ba,a .+12 | |
8105 | .word 0xe06fe0f0 ! 1: LDSTUB_I ldstub %r16, [%r31 + 0x00f0] | |
8106 | ba,a .+8 | |
8107 | jmpl %r27+0, %r27 | |
8108 | .word 0xe09fe000 ! 94: LDDA_I ldda [%r31, + 0x0000] %asi, %r16 | |
8109 | splash_lsu_8_58: | |
8110 | nop | |
8111 | ta T_CHANGE_HPRIV | |
8112 | set 0x6a6fb0b4, %r2 | |
8113 | mov 0x2, %r1 | |
8114 | sllx %r1, 32, %r1 | |
8115 | or %r1, %r2, %r2 | |
8116 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
8117 | ta T_CHANGE_NONHPRIV | |
8118 | .word 0x3d400001 ! 95: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
8119 | mondo_8_59: | |
8120 | nop | |
8121 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
8122 | ta T_CHANGE_PRIV | |
8123 | stxa %r5, [%r0+0x3c8] %asi | |
8124 | .word 0x9d920005 ! 96: WRPR_WSTATE_R wrpr %r8, %r5, %wstate | |
8125 | ibp_8_60: | |
8126 | nop | |
8127 | ta T_CHANGE_NONHPRIV | |
8128 | .word 0xe19fe000 ! 97: LDDFA_I ldda [%r31, 0x0000], %f16 | |
8129 | .word 0xc19fd920 ! 98: LDDFA_R ldda [%r31, %r0], %f0 | |
8130 | nop | |
8131 | ta T_CHANGE_HPRIV | |
8132 | mov 0x8+1, %r10 | |
8133 | set sync_thr_counter5, %r23 | |
8134 | #ifndef SPC | |
8135 | ldxa [%g0]0x63, %o1 | |
8136 | and %o1, 0x38, %o1 | |
8137 | add %o1, %r23, %r23 | |
8138 | sllx %o1, 5, %o3 !(CID*256) | |
8139 | #endif | |
8140 | cas [%r23],%g0,%r10 !lock | |
8141 | brnz %r10, cwq_8_61 | |
8142 | rd %asi, %r12 | |
8143 | wr %g0, 0x40, %asi | |
8144 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
8145 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
8146 | cmp %l1, 1 | |
8147 | bne cwq_8_61 | |
8148 | set CWQ_BASE, %l6 | |
8149 | #ifndef SPC | |
8150 | add %l6, %o3, %l6 | |
8151 | #endif | |
8152 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
8153 | best_set_reg(0x206100b0, %l1, %l2) !# Control Word | |
8154 | sllx %l2, 32, %l2 | |
8155 | stx %l2, [%l6 + 0x0] | |
8156 | membar #Sync | |
8157 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
8158 | sub %l2, 0x40, %l2 | |
8159 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
8160 | wr %r12, %g0, %asi | |
8161 | st %g0, [%r23] | |
8162 | cwq_8_61: | |
8163 | ta T_CHANGE_NONHPRIV | |
8164 | .word 0x91414000 ! 99: RDPC rd %pc, %r8 | |
8165 | .word 0xdb37e09c ! 100: STQF_I - %f13, [0x009c, %r31] | |
8166 | iaw_8_62: | |
8167 | nop | |
8168 | ta T_CHANGE_HPRIV | |
8169 | mov 8, %r18 | |
8170 | rd %asi, %r12 | |
8171 | wr %r0, 0x41, %asi | |
8172 | set sync_thr_counter4, %r23 | |
8173 | #ifndef SPC | |
8174 | ldxa [%g0]0x63, %r8 | |
8175 | and %r8, 0x38, %r8 ! Core ID | |
8176 | add %r8, %r23, %r23 | |
8177 | #else | |
8178 | mov 0, %r8 | |
8179 | #endif | |
8180 | mov 0x8, %r16 | |
8181 | iaw_startwait8_62: | |
8182 | cas [%r23],%g0,%r16 !lock | |
8183 | brz,a %r16, continue_iaw_8_62 | |
8184 | mov (~0x8&0xf), %r16 | |
8185 | ld [%r23], %r16 | |
8186 | iaw_wait8_62: | |
8187 | brnz %r16, iaw_wait8_62 | |
8188 | ld [%r23], %r16 | |
8189 | ba iaw_startwait8_62 | |
8190 | mov 0x8, %r16 | |
8191 | continue_iaw_8_62: | |
8192 | sllx %r16, %r8, %r16 !Mask for my core only | |
8193 | ldxa [0x58]%asi, %r17 !Running_status | |
8194 | wait_for_stat_8_62: | |
8195 | ldxa [0x50]%asi, %r13 !Running_rw | |
8196 | cmp %r13, %r17 | |
8197 | bne,a %xcc, wait_for_stat_8_62 | |
8198 | ldxa [0x58]%asi, %r17 !Running_status | |
8199 | stxa %r16, [0x68]%asi !Park (W1C) | |
8200 | ldxa [0x50]%asi, %r14 !Running_rw | |
8201 | wait_for_iaw_8_62: | |
8202 | ldxa [0x58]%asi, %r17 !Running_status | |
8203 | cmp %r14, %r17 | |
8204 | bne,a %xcc, wait_for_iaw_8_62 | |
8205 | ldxa [0x50]%asi, %r14 !Running_rw | |
8206 | iaw_doit8_62: | |
8207 | mov 0x38, %r18 | |
8208 | iaw4_8_62: | |
8209 | setx common_target, %r20, %r19 | |
8210 | or %r19, 0x1, %r19 | |
8211 | stxa %r19, [%r18]0x50 | |
8212 | stxa %r16, [0x60] %asi ! Unpark (W1S) | |
8213 | st %g0, [%r23] !clear lock | |
8214 | wr %r0, %r12, %asi ! restore %asi | |
8215 | ta T_CHANGE_NONHPRIV | |
8216 | .word 0x91a289a3 ! 101: FDIVs fdivs %f10, %f3, %f8 | |
8217 | .word 0x89800011 ! 102: WRTICK_R wr %r0, %r17, %tick | |
8218 | cwp_8_64: | |
8219 | set user_data_start, %o7 | |
8220 | .word 0x93902005 ! 103: WRPR_CWP_I wrpr %r0, 0x0005, %cwp | |
8221 | splash_lsu_8_65: | |
8222 | nop | |
8223 | ta T_CHANGE_HPRIV | |
8224 | set 0xd8e50aa5, %r2 | |
8225 | mov 0x6, %r1 | |
8226 | sllx %r1, 32, %r1 | |
8227 | or %r1, %r2, %r2 | |
8228 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
8229 | ta T_CHANGE_NONHPRIV | |
8230 | .word 0x3d400001 ! 104: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
8231 | splash_lsu_8_66: | |
8232 | nop | |
8233 | ta T_CHANGE_HPRIV | |
8234 | set 0x45d4437d, %r2 | |
8235 | mov 0x5, %r1 | |
8236 | sllx %r1, 32, %r1 | |
8237 | or %r1, %r2, %r2 | |
8238 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
8239 | .word 0x3d400001 ! 105: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
8240 | fpinit_8_67: | |
8241 | nop | |
8242 | setx fp_data_quads, %r19, %r20 | |
8243 | ldd [%r20], %f0 | |
8244 | ldd [%r20+8], %f4 | |
8245 | ld [%r20+16], %fsr | |
8246 | ld [%r20+24], %r19 | |
8247 | wr %r19, %g0, %gsr | |
8248 | .word 0x8da009a4 ! 106: FDIVs fdivs %f0, %f4, %f6 | |
8249 | ibp_8_68: | |
8250 | nop | |
8251 | ta T_CHANGE_NONHPRIV | |
8252 | .word 0xa5a309b1 ! 107: FDIVs fdivs %f12, %f17, %f18 | |
8253 | ta T_CHANGE_NONHPRIV | |
8254 | .word 0x8143e011 ! 108: MEMBAR membar #LoadLoad | #Lookaside | |
8255 | intveclr_8_70: | |
8256 | nop | |
8257 | ta T_CHANGE_HPRIV | |
8258 | setx 0x21fb51e43fba7450, %r1, %r28 | |
8259 | stxa %r28, [%g0] 0x72 | |
8260 | .word 0x25400001 ! 109: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
8261 | nop | |
8262 | ta T_CHANGE_HPRIV | |
8263 | mov 0x8, %r10 | |
8264 | set sync_thr_counter6, %r23 | |
8265 | #ifndef SPC | |
8266 | ldxa [%g0]0x63, %o1 | |
8267 | and %o1, 0x38, %o1 | |
8268 | add %o1, %r23, %r23 | |
8269 | #endif | |
8270 | cas [%r23],%g0,%r10 !lock | |
8271 | brnz %r10, sma_8_71 | |
8272 | rd %asi, %r12 | |
8273 | wr %g0, 0x40, %asi | |
8274 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 | |
8275 | set 0x000e1fff, %g1 | |
8276 | stxa %g1, [%g0 + 0x80] %asi | |
8277 | wr %r12, %g0, %asi | |
8278 | st %g0, [%r23] | |
8279 | sma_8_71: | |
8280 | ta T_CHANGE_NONHPRIV | |
8281 | .word 0xd7e7e013 ! 110: CASA_R casa [%r31] %asi, %r19, %r11 | |
8282 | .word 0xe1bfe180 ! 111: STDFA_I stda %f16, [0x0180, %r31] | |
8283 | nop | |
8284 | ta T_CHANGE_HPRIV ! macro | |
8285 | donret_8_72: | |
8286 | rd %pc, %r12 | |
8287 | add %r12, (donretarg_8_72-donret_8_72), %r12 | |
8288 | add %r12, 0x8, %r11 ! nonseq tnpc | |
8289 | wrpr %g0, 0x2, %tl | |
8290 | wrpr %g0, %r12, %tpc | |
8291 | wrpr %g0, %r11, %tnpc | |
8292 | set (0x1500 | (28 << 24)), %r13 | |
8293 | and %r12, 0xfff, %r14 | |
8294 | sllx %r14, 30, %r14 | |
8295 | or %r13, %r14, %r20 | |
8296 | wrpr %r20, %g0, %tstate | |
8297 | wrhpr %g0, 0xb97, %htstate | |
8298 | ta T_CHANGE_NONPRIV ! rand=0 (8) | |
8299 | .word 0x34800001 ! 1: BG bg,a <label_0x1> | |
8300 | retry | |
8301 | donretarg_8_72: | |
8302 | .word 0x97a509d0 ! 112: FDIVd fdivd %f20, %f16, %f42 | |
8303 | ibp_8_73: | |
8304 | nop | |
8305 | .word 0xd31fe060 ! 113: LDDF_I ldd [%r31, 0x0060], %f9 | |
8306 | iaw_8_74: | |
8307 | nop | |
8308 | ta T_CHANGE_HPRIV | |
8309 | mov 8, %r18 | |
8310 | rd %asi, %r12 | |
8311 | wr %r0, 0x41, %asi | |
8312 | set sync_thr_counter4, %r23 | |
8313 | #ifndef SPC | |
8314 | ldxa [%g0]0x63, %r8 | |
8315 | and %r8, 0x38, %r8 ! Core ID | |
8316 | add %r8, %r23, %r23 | |
8317 | #else | |
8318 | mov 0, %r8 | |
8319 | #endif | |
8320 | mov 0x8, %r16 | |
8321 | iaw_startwait8_74: | |
8322 | cas [%r23],%g0,%r16 !lock | |
8323 | brz,a %r16, continue_iaw_8_74 | |
8324 | mov (~0x8&0xf), %r16 | |
8325 | ld [%r23], %r16 | |
8326 | iaw_wait8_74: | |
8327 | brnz %r16, iaw_wait8_74 | |
8328 | ld [%r23], %r16 | |
8329 | ba iaw_startwait8_74 | |
8330 | mov 0x8, %r16 | |
8331 | continue_iaw_8_74: | |
8332 | sllx %r16, %r8, %r16 !Mask for my core only | |
8333 | ldxa [0x58]%asi, %r17 !Running_status | |
8334 | wait_for_stat_8_74: | |
8335 | ldxa [0x50]%asi, %r13 !Running_rw | |
8336 | cmp %r13, %r17 | |
8337 | bne,a %xcc, wait_for_stat_8_74 | |
8338 | ldxa [0x58]%asi, %r17 !Running_status | |
8339 | stxa %r16, [0x68]%asi !Park (W1C) | |
8340 | ldxa [0x50]%asi, %r14 !Running_rw | |
8341 | wait_for_iaw_8_74: | |
8342 | ldxa [0x58]%asi, %r17 !Running_status | |
8343 | cmp %r14, %r17 | |
8344 | bne,a %xcc, wait_for_iaw_8_74 | |
8345 | ldxa [0x50]%asi, %r14 !Running_rw | |
8346 | iaw_doit8_74: | |
8347 | mov 0x38, %r18 | |
8348 | iaw1_8_74: | |
8349 | best_set_reg(0x00000000e1200000, %r20, %r19) | |
8350 | or %r19, 0x1, %r19 | |
8351 | stxa %r19, [%r18]0x50 | |
8352 | stxa %r16, [0x60] %asi ! Unpark (W1S) | |
8353 | st %g0, [%r23] !clear lock | |
8354 | wr %r0, %r12, %asi ! restore %asi | |
8355 | ta T_CHANGE_NONHPRIV | |
8356 | .word 0xe19fdf20 ! 114: LDDFA_R ldda [%r31, %r0], %f16 | |
8357 | .word 0x8d90292f ! 115: WRPR_PSTATE_I wrpr %r0, 0x092f, %pstate | |
8358 | .word 0x87802082 ! 116: WRASI_I wr %r0, 0x0082, %asi | |
8359 | #if (defined SPC || defined CMP1) | |
8360 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_76) + 48, 16, 16)) -> intp(1,0,22) | |
8361 | #else | |
8362 | setx 0xdf2013c9df9adf58, %r1, %r28 | |
8363 | stxa %r28, [%g0] 0x73 | |
8364 | #endif | |
8365 | intvec_8_76: | |
8366 | .word 0x39400001 ! 117: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
8367 | ibp_8_77: | |
8368 | nop | |
8369 | ta T_CHANGE_NONHPRIV | |
8370 | .word 0xa7a409c5 ! 118: FDIVd fdivd %f16, %f36, %f50 | |
8371 | .word 0x91d02032 ! 119: Tcc_I ta icc_or_xcc, %r0 + 50 | |
8372 | mondo_8_78: | |
8373 | nop | |
8374 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
8375 | ta T_CHANGE_PRIV | |
8376 | stxa %r11, [%r0+0x3c0] %asi | |
8377 | .word 0x9d908001 ! 120: WRPR_WSTATE_R wrpr %r2, %r1, %wstate | |
8378 | ibp_8_79: | |
8379 | nop | |
8380 | .word 0xe19fe100 ! 121: LDDFA_I ldda [%r31, 0x0100], %f16 | |
8381 | ibp_8_80: | |
8382 | nop | |
8383 | ta T_CHANGE_NONHPRIV | |
8384 | .word 0xa1702f2f ! 122: POPC_I popc 0x0f2f, %r16 | |
8385 | .word 0x8d802000 ! 123: WRFPRS_I wr %r0, 0x0000, %fprs | |
8386 | splash_hpstate_8_81: | |
8387 | ta T_CHANGE_NONHPRIV | |
8388 | .word 0x22cc4001 ! 1: BRZ brz,a,pt %r17,<label_0xc4001> | |
8389 | .word 0x819836cd ! 124: WRHPR_HPSTATE_I wrhpr %r0, 0x16cd, %hpstate | |
8390 | ibp_8_82: | |
8391 | nop | |
8392 | ta T_CHANGE_NONHPRIV | |
8393 | .word 0xd13fc009 ! 125: STDF_R std %f8, [%r9, %r31] | |
8394 | nop | |
8395 | ta T_CHANGE_HPRIV ! macro | |
8396 | donret_8_83: | |
8397 | rd %pc, %r12 | |
8398 | add %r12, (donretarg_8_83-donret_8_83+4), %r12 | |
8399 | add %r12, 0x4, %r11 ! seq tnpc | |
8400 | wrpr %g0, 0x2, %tl | |
8401 | wrpr %g0, %r12, %tpc | |
8402 | wrpr %g0, %r11, %tnpc | |
8403 | set (0x00e98e00 | (20 << 24)), %r13 | |
8404 | and %r12, 0xfff, %r14 | |
8405 | sllx %r14, 30, %r14 | |
8406 | or %r13, %r14, %r20 | |
8407 | wrpr %r20, %g0, %tstate | |
8408 | wrhpr %g0, 0x9cb, %htstate | |
8409 | ta T_CHANGE_NONHPRIV ! rand=1 (8) | |
8410 | .word 0x22800001 ! 1: BE be,a <label_0x1> | |
8411 | done | |
8412 | donretarg_8_83: | |
8413 | .word 0x3c800001 ! 126: BPOS bpos,a <label_0x1> | |
8414 | iaw_8_84: | |
8415 | nop | |
8416 | ta T_CHANGE_HPRIV | |
8417 | mov 8, %r18 | |
8418 | rd %asi, %r12 | |
8419 | wr %r0, 0x41, %asi | |
8420 | set sync_thr_counter4, %r23 | |
8421 | #ifndef SPC | |
8422 | ldxa [%g0]0x63, %r8 | |
8423 | and %r8, 0x38, %r8 ! Core ID | |
8424 | add %r8, %r23, %r23 | |
8425 | #else | |
8426 | mov 0, %r8 | |
8427 | #endif | |
8428 | mov 0x8, %r16 | |
8429 | iaw_startwait8_84: | |
8430 | cas [%r23],%g0,%r16 !lock | |
8431 | brz,a %r16, continue_iaw_8_84 | |
8432 | mov (~0x8&0xf), %r16 | |
8433 | ld [%r23], %r16 | |
8434 | iaw_wait8_84: | |
8435 | brnz %r16, iaw_wait8_84 | |
8436 | ld [%r23], %r16 | |
8437 | ba iaw_startwait8_84 | |
8438 | mov 0x8, %r16 | |
8439 | continue_iaw_8_84: | |
8440 | sllx %r16, %r8, %r16 !Mask for my core only | |
8441 | ldxa [0x58]%asi, %r17 !Running_status | |
8442 | wait_for_stat_8_84: | |
8443 | ldxa [0x50]%asi, %r13 !Running_rw | |
8444 | cmp %r13, %r17 | |
8445 | bne,a %xcc, wait_for_stat_8_84 | |
8446 | ldxa [0x58]%asi, %r17 !Running_status | |
8447 | stxa %r16, [0x68]%asi !Park (W1C) | |
8448 | ldxa [0x50]%asi, %r14 !Running_rw | |
8449 | wait_for_iaw_8_84: | |
8450 | ldxa [0x58]%asi, %r17 !Running_status | |
8451 | cmp %r14, %r17 | |
8452 | bne,a %xcc, wait_for_iaw_8_84 | |
8453 | ldxa [0x50]%asi, %r14 !Running_rw | |
8454 | iaw_doit8_84: | |
8455 | mov 0x38, %r18 | |
8456 | iaw2_8_84: | |
8457 | rdpr %tba, %r19 | |
8458 | mov 0x11, %r20 | |
8459 | sllx %r20, 5, %r20 | |
8460 | add %r20, %r19, %r19 | |
8461 | stxa %r19, [%r18]0x50 | |
8462 | stxa %r16, [0x60] %asi ! Unpark (W1S) | |
8463 | st %g0, [%r23] !clear lock | |
8464 | wr %r0, %r12, %asi ! restore %asi | |
8465 | ta T_CHANGE_NONHPRIV | |
8466 | .word 0xd09fc033 ! 127: LDDA_R ldda [%r31, %r19] 0x01, %r8 | |
8467 | nop | |
8468 | mov 0x80, %g3 | |
8469 | stxa %g3, [%g3] 0x5f | |
8470 | .word 0xd05fc000 ! 128: LDX_R ldx [%r31 + %r0], %r8 | |
8471 | .word 0x24800001 ! 129: BLE ble,a <label_0x1> | |
8472 | memptr_8_85: | |
8473 | set 0x60340000, %r31 | |
8474 | .word 0x85847284 ! 130: WRCCR_I wr %r17, 0x1284, %ccr | |
8475 | .word 0x22800001 ! 131: BE be,a <label_0x1> | |
8476 | ibp_8_86: | |
8477 | nop | |
8478 | .word 0xe19fde00 ! 132: LDDFA_R ldda [%r31, %r0], %f16 | |
8479 | .word 0xa9a00174 ! 133: FABSq dis not found | |
8480 | ||
8481 | .word 0xdad7e130 ! 134: LDSHA_I ldsha [%r31, + 0x0130] %asi, %r13 | |
8482 | fblg skip_8_88 | |
8483 | bl skip_8_88 | |
8484 | .align 1024 | |
8485 | skip_8_88: | |
8486 | .word 0x39400001 ! 135: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
8487 | fpinit_8_89: | |
8488 | nop | |
8489 | setx fp_data_quads, %r19, %r20 | |
8490 | ldd [%r20], %f0 | |
8491 | ldd [%r20+8], %f4 | |
8492 | ld [%r20+16], %fsr | |
8493 | ld [%r20+24], %r19 | |
8494 | wr %r19, %g0, %gsr | |
8495 | .word 0x91a009a4 ! 136: FDIVs fdivs %f0, %f4, %f8 | |
8496 | br_badelay2_8_90: | |
8497 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
8498 | allclean | |
8499 | .word 0xa3b44311 ! 137: ALIGNADDRESS alignaddr %r17, %r17, %r17 | |
8500 | .word 0xe137e05a ! 138: STQF_I - %f16, [0x005a, %r31] | |
8501 | fpinit_8_91: | |
8502 | nop | |
8503 | setx fp_data_quads, %r19, %r20 | |
8504 | ldd [%r20], %f0 | |
8505 | ldd [%r20+8], %f4 | |
8506 | ld [%r20+16], %fsr | |
8507 | ld [%r20+24], %r19 | |
8508 | wr %r19, %g0, %gsr | |
8509 | .word 0x87a80a44 ! 139: FCMPd fcmpd %fcc<n>, %f0, %f4 | |
8510 | .word 0x27400001 ! 1: FBPUL fbul,a,pn %fcc0, <label_0x1> | |
8511 | .word 0x8d90382e ! 140: WRPR_PSTATE_I wrpr %r0, 0x182e, %pstate | |
8512 | ibp_8_93: | |
8513 | nop | |
8514 | .word 0xc3ec8022 ! 141: PREFETCHA_R prefetcha [%r18, %r2] 0x01, #one_read | |
8515 | .word 0x9ba000cb ! 142: FNEGd fnegd %f42, %f44 | |
8516 | set 0x3e79, %l3 | |
8517 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT | |
8518 | .word 0x95b487d2 ! 143: PDIST pdistn %d18, %d18, %d10 | |
8519 | invalw | |
8520 | mov 0xb0, %r30 | |
8521 | .word 0x83d0001e ! 144: Tcc_R te icc_or_xcc, %r0 + %r30 | |
8522 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
8523 | reduce_priv_lvl_8_94: | |
8524 | ta T_CHANGE_NONPRIV ! macro | |
8525 | memptr_8_95: | |
8526 | set 0x60340000, %r31 | |
8527 | .word 0x8584275f ! 146: WRCCR_I wr %r16, 0x075f, %ccr | |
8528 | dvapa_8_96: | |
8529 | nop | |
8530 | ta T_CHANGE_HPRIV | |
8531 | mov 0xf6f, %r20 | |
8532 | mov 0x0, %r19 | |
8533 | sllx %r20, 23, %r20 | |
8534 | or %r19, %r20, %r19 | |
8535 | stxa %r19, [%g0] ASI_LSU_CONTROL | |
8536 | mov 0x38, %r18 | |
8537 | stxa %r31, [%r18]0x58 | |
8538 | ta T_CHANGE_NONHPRIV | |
8539 | .word 0xe6dfc033 ! 147: LDXA_R ldxa [%r31, %r19] 0x01, %r19 | |
8540 | splash_decr_8_97: | |
8541 | nop | |
8542 | ta T_CHANGE_HPRIV | |
8543 | mov 8, %r1 | |
8544 | stxa %r15, [%r1] 0x45 | |
8545 | .word 0xa7808013 ! 148: WR_GRAPHICS_STATUS_REG_R wr %r2, %r19, %- | |
8546 | .word 0xe637e0b8 ! 149: STH_I sth %r19, [%r31 + 0x00b8] | |
8547 | #if (defined SPC || defined CMP1) | |
8548 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_98) + 40, 16, 16)) -> intp(0,0,26) | |
8549 | #else | |
8550 | setx 0x85373312c419a067, %r1, %r28 | |
8551 | stxa %r28, [%g0] 0x73 | |
8552 | #endif | |
8553 | intvec_8_98: | |
8554 | .word 0x39400001 ! 150: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
8555 | intveclr_8_99: | |
8556 | nop | |
8557 | ta T_CHANGE_HPRIV | |
8558 | setx 0x7c0570486605b9d5, %r1, %r28 | |
8559 | stxa %r28, [%g0] 0x72 | |
8560 | ta T_CHANGE_NONHPRIV | |
8561 | .word 0x25400001 ! 151: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
8562 | .word 0xe6800bc0 ! 152: LDUWA_R lduwa [%r0, %r0] 0x5e, %r19 | |
8563 | .word 0xe62fe02a ! 153: STB_I stb %r19, [%r31 + 0x002a] | |
8564 | mondo_8_100: | |
8565 | nop | |
8566 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
8567 | stxa %r13, [%r0+0x3c0] %asi | |
8568 | .word 0x9d94c010 ! 154: WRPR_WSTATE_R wrpr %r19, %r16, %wstate | |
8569 | .word 0x9b50c000 ! 155: RDPR_TT <illegal instruction> | |
8570 | .word 0x3a800001 ! 156: BCC bcc,a <label_0x1> | |
8571 | brcommon2_8_101: | |
8572 | nop | |
8573 | setx common_target, %r12, %r27 | |
8574 | ba,a .+12 | |
8575 | .word 0xe3148009 ! 1: LDQF_R - [%r18, %r9], %f17 | |
8576 | ba,a .+8 | |
8577 | jmpl %r27+0, %r27 | |
8578 | .word 0xc1bfd920 ! 157: STDFA_R stda %f0, [%r0, %r31] | |
8579 | tagged_8_102: | |
8580 | tsubcctv %r19, 0x12c0, %r2 | |
8581 | .word 0xd407e054 ! 158: LDUW_I lduw [%r31 + 0x0054], %r10 | |
8582 | splash_cmpr_8_103: | |
8583 | mov 0, %r18 | |
8584 | sllx %r18, 63, %r18 | |
8585 | rd %tick, %r17 | |
8586 | add %r17, 0x50, %r17 | |
8587 | or %r17, %r18, %r17 | |
8588 | .word 0xaf800011 ! 159: WR_TICK_CMPR_REG_R wr %r0, %r17, %- | |
8589 | .word 0xd5e7c031 ! 160: CASA_I casa [%r31] 0x 1, %r17, %r10 | |
8590 | br_longdelay2_8_104: | |
8591 | .word 0x25400001 ! 1: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
8592 | .word 0x87afca51 ! 161: FCMPd fcmpd %fcc<n>, %f62, %f48 | |
8593 | nop | |
8594 | ta T_CHANGE_HPRIV | |
8595 | mov 0x8+1, %r10 | |
8596 | set sync_thr_counter5, %r23 | |
8597 | #ifndef SPC | |
8598 | ldxa [%g0]0x63, %o1 | |
8599 | and %o1, 0x38, %o1 | |
8600 | add %o1, %r23, %r23 | |
8601 | sllx %o1, 5, %o3 !(CID*256) | |
8602 | #endif | |
8603 | cas [%r23],%g0,%r10 !lock | |
8604 | brnz %r10, cwq_8_105 | |
8605 | rd %asi, %r12 | |
8606 | wr %g0, 0x40, %asi | |
8607 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
8608 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
8609 | cmp %l1, 1 | |
8610 | bne cwq_8_105 | |
8611 | set CWQ_BASE, %l6 | |
8612 | #ifndef SPC | |
8613 | add %l6, %o3, %l6 | |
8614 | #endif | |
8615 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
8616 | best_set_reg(0x20610060, %l1, %l2) !# Control Word | |
8617 | sllx %l2, 32, %l2 | |
8618 | stx %l2, [%l6 + 0x0] | |
8619 | membar #Sync | |
8620 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
8621 | sub %l2, 0x40, %l2 | |
8622 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
8623 | wr %r12, %g0, %asi | |
8624 | st %g0, [%r23] | |
8625 | cwq_8_105: | |
8626 | ta T_CHANGE_NONHPRIV | |
8627 | .word 0xa7414000 ! 162: RDPC rd %pc, %r19 | |
8628 | splash_hpstate_8_106: | |
8629 | ta T_CHANGE_NONHPRIV | |
8630 | .word 0x36800001 ! 1: BGE bge,a <label_0x1> | |
8631 | .word 0x81982dc4 ! 163: WRHPR_HPSTATE_I wrhpr %r0, 0x0dc4, %hpstate | |
8632 | trapasi_8_107: | |
8633 | nop | |
8634 | mov 0x8, %r1 ! (VA for ASI 0x5a) | |
8635 | .word 0xd4c04b40 ! 164: LDSWA_R ldswa [%r1, %r0] 0x5a, %r10 | |
8636 | .word 0xe1bfe080 ! 165: STDFA_I stda %f16, [0x0080, %r31] | |
8637 | splash_hpstate_8_108: | |
8638 | ta T_CHANGE_NONHPRIV | |
8639 | .word 0x8198355d ! 166: WRHPR_HPSTATE_I wrhpr %r0, 0x155d, %hpstate | |
8640 | otherw | |
8641 | mov 0x34, %r30 | |
8642 | .word 0x91d0001e ! 167: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
8643 | .word 0x8d802000 ! 168: WRFPRS_I wr %r0, 0x0000, %fprs | |
8644 | .word 0xd43fe020 ! 169: STD_I std %r10, [%r31 + 0x0020] | |
8645 | jmptr_8_109: | |
8646 | nop | |
8647 | best_set_reg(0xe1a00000, %r20, %r27) | |
8648 | .word 0xb7c6c000 ! 170: JMPL_R jmpl %r27 + %r0, %r27 | |
8649 | jmptr_8_110: | |
8650 | nop | |
8651 | best_set_reg(0xe1a00000, %r20, %r27) | |
8652 | .word 0xb7c6c000 ! 171: JMPL_R jmpl %r27 + %r0, %r27 | |
8653 | nop | |
8654 | mov 0x80, %g3 | |
8655 | stxa %g3, [%g3] 0x5f | |
8656 | .word 0xd45fc000 ! 172: LDX_R ldx [%r31 + %r0], %r10 | |
8657 | iaw_8_111: | |
8658 | nop | |
8659 | ta T_CHANGE_HPRIV | |
8660 | mov 8, %r18 | |
8661 | rd %asi, %r12 | |
8662 | wr %r0, 0x41, %asi | |
8663 | set sync_thr_counter4, %r23 | |
8664 | #ifndef SPC | |
8665 | ldxa [%g0]0x63, %r8 | |
8666 | and %r8, 0x38, %r8 ! Core ID | |
8667 | add %r8, %r23, %r23 | |
8668 | #else | |
8669 | mov 0, %r8 | |
8670 | #endif | |
8671 | mov 0x8, %r16 | |
8672 | iaw_startwait8_111: | |
8673 | cas [%r23],%g0,%r16 !lock | |
8674 | brz,a %r16, continue_iaw_8_111 | |
8675 | mov (~0x8&0xf), %r16 | |
8676 | ld [%r23], %r16 | |
8677 | iaw_wait8_111: | |
8678 | brnz %r16, iaw_wait8_111 | |
8679 | ld [%r23], %r16 | |
8680 | ba iaw_startwait8_111 | |
8681 | mov 0x8, %r16 | |
8682 | continue_iaw_8_111: | |
8683 | sllx %r16, %r8, %r16 !Mask for my core only | |
8684 | ldxa [0x58]%asi, %r17 !Running_status | |
8685 | wait_for_stat_8_111: | |
8686 | ldxa [0x50]%asi, %r13 !Running_rw | |
8687 | cmp %r13, %r17 | |
8688 | bne,a %xcc, wait_for_stat_8_111 | |
8689 | ldxa [0x58]%asi, %r17 !Running_status | |
8690 | stxa %r16, [0x68]%asi !Park (W1C) | |
8691 | ldxa [0x50]%asi, %r14 !Running_rw | |
8692 | wait_for_iaw_8_111: | |
8693 | ldxa [0x58]%asi, %r17 !Running_status | |
8694 | cmp %r14, %r17 | |
8695 | bne,a %xcc, wait_for_iaw_8_111 | |
8696 | ldxa [0x50]%asi, %r14 !Running_rw | |
8697 | iaw_doit8_111: | |
8698 | mov 0x38, %r18 | |
8699 | iaw4_8_111: | |
8700 | setx common_target, %r20, %r19 | |
8701 | or %r19, 0x1, %r19 | |
8702 | stxa %r19, [%r18]0x50 | |
8703 | stxa %r16, [0x60] %asi ! Unpark (W1S) | |
8704 | st %g0, [%r23] !clear lock | |
8705 | wr %r0, %r12, %asi ! restore %asi | |
8706 | ta T_CHANGE_NONHPRIV | |
8707 | .word 0xe1bfdb60 ! 173: STDFA_R stda %f16, [%r0, %r31] | |
8708 | .word 0xd51fe168 ! 174: LDDF_I ldd [%r31, 0x0168], %f10 | |
8709 | .word 0xd44fe100 ! 175: LDSB_I ldsb [%r31 + 0x0100], %r10 | |
8710 | .word 0x91924011 ! 176: WRPR_PIL_R wrpr %r9, %r17, %pil | |
8711 | trapasi_8_113: | |
8712 | nop | |
8713 | mov 0x10, %r1 ! (VA for ASI 0x4c) | |
8714 | .word 0xd4d04980 ! 177: LDSHA_R ldsha [%r1, %r0] 0x4c, %r10 | |
8715 | intveclr_8_114: | |
8716 | nop | |
8717 | ta T_CHANGE_HPRIV | |
8718 | setx 0xf4a6c275e792f059, %r1, %r28 | |
8719 | stxa %r28, [%g0] 0x72 | |
8720 | ta T_CHANGE_NONHPRIV | |
8721 | .word 0x25400001 ! 178: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
8722 | ibp_8_115: | |
8723 | nop | |
8724 | .word 0xc19fe000 ! 179: LDDFA_I ldda [%r31, 0x0000], %f0 | |
8725 | .word 0xc30fc000 ! 180: LDXFSR_R ld-fsr [%r31, %r0], %f1 | |
8726 | nop | |
8727 | ta T_CHANGE_HPRIV | |
8728 | mov 0x8+1, %r10 | |
8729 | set sync_thr_counter5, %r23 | |
8730 | #ifndef SPC | |
8731 | ldxa [%g0]0x63, %o1 | |
8732 | and %o1, 0x38, %o1 | |
8733 | add %o1, %r23, %r23 | |
8734 | sllx %o1, 5, %o3 !(CID*256) | |
8735 | #endif | |
8736 | cas [%r23],%g0,%r10 !lock | |
8737 | brnz %r10, cwq_8_116 | |
8738 | rd %asi, %r12 | |
8739 | wr %g0, 0x40, %asi | |
8740 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
8741 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
8742 | cmp %l1, 1 | |
8743 | bne cwq_8_116 | |
8744 | set CWQ_BASE, %l6 | |
8745 | #ifndef SPC | |
8746 | add %l6, %o3, %l6 | |
8747 | #endif | |
8748 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
8749 | best_set_reg(0x206100b0, %l1, %l2) !# Control Word | |
8750 | sllx %l2, 32, %l2 | |
8751 | stx %l2, [%l6 + 0x0] | |
8752 | membar #Sync | |
8753 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
8754 | sub %l2, 0x40, %l2 | |
8755 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
8756 | wr %r12, %g0, %asi | |
8757 | st %g0, [%r23] | |
8758 | cwq_8_116: | |
8759 | ta T_CHANGE_NONHPRIV | |
8760 | .word 0xa1414000 ! 181: RDPC rd %pc, %r16 | |
8761 | splash_cmpr_8_117: | |
8762 | mov 0, %r18 | |
8763 | sllx %r18, 63, %r18 | |
8764 | rd %tick, %r17 | |
8765 | add %r17, 0x70, %r17 | |
8766 | or %r17, %r18, %r17 | |
8767 | ta T_CHANGE_PRIV | |
8768 | .word 0xb3800011 ! 182: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
8769 | intveclr_8_118: | |
8770 | nop | |
8771 | ta T_CHANGE_HPRIV | |
8772 | setx 0xdb0450b78dcbb1ed, %r1, %r28 | |
8773 | stxa %r28, [%g0] 0x72 | |
8774 | .word 0x25400001 ! 183: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
8775 | .word 0xe0dfe0a0 ! 184: LDXA_I ldxa [%r31, + 0x00a0] %asi, %r16 | |
8776 | intveclr_8_119: | |
8777 | nop | |
8778 | ta T_CHANGE_HPRIV | |
8779 | setx 0x1442cbfd995c1bc2, %r1, %r28 | |
8780 | stxa %r28, [%g0] 0x72 | |
8781 | .word 0x25400001 ! 185: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
8782 | #if (defined SPC || defined CMP1) | |
8783 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_120) + 8, 16, 16)) -> intp(3,0,13) | |
8784 | #else | |
8785 | setx 0xd6411c2f9f5b8a7c, %r1, %r28 | |
8786 | stxa %r28, [%g0] 0x73 | |
8787 | #endif | |
8788 | intvec_8_120: | |
8789 | .word 0x39400001 ! 186: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
8790 | set 0x15b, %l3 | |
8791 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT | |
8792 | .word 0x9bb447d4 ! 187: PDIST pdistn %d48, %d20, %d44 | |
8793 | otherw | |
8794 | mov 0xb2, %r30 | |
8795 | .word 0x91d0001e ! 188: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
8796 | splash_decr_8_121: | |
8797 | nop | |
8798 | ta T_CHANGE_HPRIV | |
8799 | mov 8, %r1 | |
8800 | stxa %r18, [%r1] 0x45 | |
8801 | .word 0xa7844014 ! 189: WR_GRAPHICS_STATUS_REG_R wr %r17, %r20, %- | |
8802 | .word 0xda97e040 ! 190: LDUHA_I lduha [%r31, + 0x0040] %asi, %r13 | |
8803 | .word 0x879ce921 ! 191: WRHPR_HINTP_I wrhpr %r19, 0x0921, %hintp | |
8804 | .word 0x83d02035 ! 192: Tcc_I te icc_or_xcc, %r0 + 53 | |
8805 | splash_decr_8_122: | |
8806 | nop | |
8807 | ta T_CHANGE_HPRIV | |
8808 | mov 8, %r1 | |
8809 | stxa %r18, [%r1] 0x45 | |
8810 | .word 0xa781c00c ! 193: WR_GRAPHICS_STATUS_REG_R wr %r7, %r12, %- | |
8811 | dvapa_8_123: | |
8812 | nop | |
8813 | ta T_CHANGE_HPRIV | |
8814 | mov 0xf93, %r20 | |
8815 | mov 0x3, %r19 | |
8816 | sllx %r20, 23, %r20 | |
8817 | or %r19, %r20, %r19 | |
8818 | stxa %r19, [%g0] ASI_LSU_CONTROL | |
8819 | mov 0x38, %r18 | |
8820 | stxa %r31, [%r18]0x58 | |
8821 | ta T_CHANGE_NONHPRIV | |
8822 | .word 0x91a289a8 ! 194: FDIVs fdivs %f10, %f8, %f8 | |
8823 | brcommon3_8_124: | |
8824 | nop | |
8825 | setx common_target, %r12, %r27 | |
8826 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
8827 | ba,a .+12 | |
8828 | .word 0xd3e7c031 ! 1: CASA_I casa [%r31] 0x 1, %r17, %r9 | |
8829 | ba,a .+8 | |
8830 | jmpl %r27+0, %r27 | |
8831 | .word 0xd29fc034 ! 195: LDDA_R ldda [%r31, %r20] 0x01, %r9 | |
8832 | .word 0xc30fc000 ! 196: LDXFSR_R ld-fsr [%r31, %r0], %f1 | |
8833 | dvapa_8_125: | |
8834 | nop | |
8835 | ta T_CHANGE_HPRIV | |
8836 | mov 0xdda, %r20 | |
8837 | mov 0x19, %r19 | |
8838 | sllx %r20, 23, %r20 | |
8839 | or %r19, %r20, %r19 | |
8840 | stxa %r19, [%g0] ASI_LSU_CONTROL | |
8841 | mov 0x38, %r18 | |
8842 | stxa %r31, [%r18]0x58 | |
8843 | ta T_CHANGE_NONHPRIV | |
8844 | .word 0xa3b247d4 ! 197: PDIST pdistn %d40, %d20, %d48 | |
8845 | memptr_8_126: | |
8846 | set user_data_start, %r31 | |
8847 | .word 0x8584a624 ! 198: WRCCR_I wr %r18, 0x0624, %ccr | |
8848 | iaw_8_127: | |
8849 | nop | |
8850 | ta T_CHANGE_HPRIV | |
8851 | mov 8, %r18 | |
8852 | rd %asi, %r12 | |
8853 | wr %r0, 0x41, %asi | |
8854 | set sync_thr_counter4, %r23 | |
8855 | #ifndef SPC | |
8856 | ldxa [%g0]0x63, %r8 | |
8857 | and %r8, 0x38, %r8 ! Core ID | |
8858 | add %r8, %r23, %r23 | |
8859 | #else | |
8860 | mov 0, %r8 | |
8861 | #endif | |
8862 | mov 0x8, %r16 | |
8863 | iaw_startwait8_127: | |
8864 | cas [%r23],%g0,%r16 !lock | |
8865 | brz,a %r16, continue_iaw_8_127 | |
8866 | mov (~0x8&0xf), %r16 | |
8867 | ld [%r23], %r16 | |
8868 | iaw_wait8_127: | |
8869 | brnz %r16, iaw_wait8_127 | |
8870 | ld [%r23], %r16 | |
8871 | ba iaw_startwait8_127 | |
8872 | mov 0x8, %r16 | |
8873 | continue_iaw_8_127: | |
8874 | sllx %r16, %r8, %r16 !Mask for my core only | |
8875 | ldxa [0x58]%asi, %r17 !Running_status | |
8876 | wait_for_stat_8_127: | |
8877 | ldxa [0x50]%asi, %r13 !Running_rw | |
8878 | cmp %r13, %r17 | |
8879 | bne,a %xcc, wait_for_stat_8_127 | |
8880 | ldxa [0x58]%asi, %r17 !Running_status | |
8881 | stxa %r16, [0x68]%asi !Park (W1C) | |
8882 | ldxa [0x50]%asi, %r14 !Running_rw | |
8883 | wait_for_iaw_8_127: | |
8884 | ldxa [0x58]%asi, %r17 !Running_status | |
8885 | cmp %r14, %r17 | |
8886 | bne,a %xcc, wait_for_iaw_8_127 | |
8887 | ldxa [0x50]%asi, %r14 !Running_rw | |
8888 | iaw_doit8_127: | |
8889 | mov 0x38, %r18 | |
8890 | iaw4_8_127: | |
8891 | setx common_target, %r20, %r19 | |
8892 | or %r19, 0x1, %r19 | |
8893 | stxa %r19, [%r18]0x50 | |
8894 | stxa %r16, [0x60] %asi ! Unpark (W1S) | |
8895 | st %g0, [%r23] !clear lock | |
8896 | wr %r0, %r12, %asi ! restore %asi | |
8897 | ta T_CHANGE_NONHPRIV | |
8898 | .word 0xe19fe160 ! 199: LDDFA_I ldda [%r31, 0x0160], %f16 | |
8899 | trapasi_8_128: | |
8900 | nop | |
8901 | mov 0x0, %r1 ! (VA for ASI 0x73) | |
8902 | .word 0xe0904e60 ! 200: LDUHA_R lduha [%r1, %r0] 0x73, %r16 | |
8903 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
8904 | reduce_priv_lvl_8_129: | |
8905 | ta T_CHANGE_NONHPRIV ! macro | |
8906 | nop | |
8907 | nop | |
8908 | ta T_CHANGE_PRIV | |
8909 | wrpr %g0, %g0, %gl | |
8910 | nop | |
8911 | nop | |
8912 | setx join_lbl_0_0, %g1, %g2 | |
8913 | jmp %g2 | |
8914 | nop | |
8915 | fork_lbl_0_3: | |
8916 | ta T_CHANGE_NONHPRIV | |
8917 | .word 0xe08008a0 ! 1: LDUWA_R lduwa [%r0, %r0] 0x45, %r16 | |
8918 | .word 0xe19fda00 ! 2: LDDFA_R ldda [%r31, %r0], %f16 | |
8919 | .word 0xe0800b20 ! 3: LDUWA_R lduwa [%r0, %r0] 0x59, %r16 | |
8920 | .word 0x89800011 ! 4: WRTICK_R wr %r0, %r17, %tick | |
8921 | .word 0x8d802000 ! 5: WRFPRS_I wr %r0, 0x0000, %fprs | |
8922 | .word 0x22c98001 ! 1: BRZ brz,a,pt %r6,<label_0x98001> | |
8923 | .word 0x8d90359d ! 6: WRPR_PSTATE_I wrpr %r0, 0x159d, %pstate | |
8924 | .word 0xe0bfc020 ! 7: STDA_R stda %r16, [%r31 + %r0] 0x01 | |
8925 | #if (defined SPC || defined CMP1) | |
8926 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_2) + 8, 16, 16)) -> intp(6,0,12) | |
8927 | #else | |
8928 | setx 0xf9022915486c79ce, %r1, %r28 | |
8929 | stxa %r28, [%g0] 0x73 | |
8930 | #endif | |
8931 | intvec_4_2: | |
8932 | .word 0x39400001 ! 8: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
8933 | .word 0xc32fc000 ! 9: STXFSR_R st-sfr %f1, [%r0, %r31] | |
8934 | splash_lsu_4_3: | |
8935 | nop | |
8936 | ta T_CHANGE_HPRIV | |
8937 | set 0x78ad10a6, %r2 | |
8938 | mov 0x7, %r1 | |
8939 | sllx %r1, 32, %r1 | |
8940 | or %r1, %r2, %r2 | |
8941 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
8942 | ta T_CHANGE_NONHPRIV | |
8943 | .word 0x3d400001 ! 10: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
8944 | .word 0x2a780001 ! 11: BPCS <illegal instruction> | |
8945 | .word 0xa7814008 ! 12: WR_GRAPHICS_STATUS_REG_R wr %r5, %r8, %- | |
8946 | fpinit_4_5: | |
8947 | nop | |
8948 | setx fp_data_quads, %r19, %r20 | |
8949 | ldd [%r20], %f0 | |
8950 | ldd [%r20+8], %f4 | |
8951 | ld [%r20+16], %fsr | |
8952 | ld [%r20+24], %r19 | |
8953 | wr %r19, %g0, %gsr | |
8954 | .word 0xc3e8366f ! 13: PREFETCHA_I prefetcha [%r0, + 0xfffff66f] %asi, #one_read | |
8955 | invalw | |
8956 | mov 0xb4, %r30 | |
8957 | .word 0x91d0001e ! 14: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
8958 | .word 0x879a800a ! 15: WRHPR_HINTP_R wrhpr %r10, %r10, %hintp | |
8959 | .word 0x95703fd4 ! 16: POPC_I popc 0x1fd4, %r10 | |
8960 | .word 0x87802058 ! 17: WRASI_I wr %r0, 0x0058, %asi | |
8961 | .word 0xa5a1c9a9 ! 18: FDIVs fdivs %f7, %f9, %f18 | |
8962 | .word 0xa5a00169 ! 19: FABSq dis not found | |
8963 | ||
8964 | .word 0xe49fe000 ! 20: LDDA_I ldda [%r31, + 0x0000] %asi, %r18 | |
8965 | .word 0xe44fe0e0 ! 21: LDSB_I ldsb [%r31 + 0x00e0], %r18 | |
8966 | memptr_4_8: | |
8967 | set 0x60540000, %r31 | |
8968 | .word 0x85806023 ! 22: WRCCR_I wr %r1, 0x0023, %ccr | |
8969 | splash_tba_4_9: | |
8970 | nop | |
8971 | ta T_CHANGE_PRIV | |
8972 | setx 0x0000000400380000, %r11, %r12 | |
8973 | .word 0x8b90000c ! 23: WRPR_TBA_R wrpr %r0, %r12, %tba | |
8974 | nop | |
8975 | ta T_CHANGE_HPRIV | |
8976 | mov 0x4+1, %r10 | |
8977 | set sync_thr_counter5, %r23 | |
8978 | #ifndef SPC | |
8979 | ldxa [%g0]0x63, %o1 | |
8980 | and %o1, 0x38, %o1 | |
8981 | add %o1, %r23, %r23 | |
8982 | sllx %o1, 5, %o3 !(CID*256) | |
8983 | #endif | |
8984 | cas [%r23],%g0,%r10 !lock | |
8985 | brnz %r10, cwq_4_10 | |
8986 | rd %asi, %r12 | |
8987 | wr %g0, 0x40, %asi | |
8988 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
8989 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
8990 | cmp %l1, 1 | |
8991 | bne cwq_4_10 | |
8992 | set CWQ_BASE, %l6 | |
8993 | #ifndef SPC | |
8994 | add %l6, %o3, %l6 | |
8995 | #endif | |
8996 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
8997 | best_set_reg(0x20610010, %l1, %l2) !# Control Word | |
8998 | sllx %l2, 32, %l2 | |
8999 | stx %l2, [%l6 + 0x0] | |
9000 | membar #Sync | |
9001 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
9002 | sub %l2, 0x40, %l2 | |
9003 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
9004 | wr %r12, %g0, %asi | |
9005 | st %g0, [%r23] | |
9006 | cwq_4_10: | |
9007 | ta T_CHANGE_NONHPRIV | |
9008 | .word 0x91414000 ! 24: RDPC rd %pc, %r8 | |
9009 | .word 0x8d9029db ! 25: WRPR_PSTATE_I wrpr %r0, 0x09db, %pstate | |
9010 | brcommon1_4_12: | |
9011 | nop | |
9012 | setx common_target, %r12, %r27 | |
9013 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
9014 | ba,a .+12 | |
9015 | .word 0xa1702020 ! 1: POPC_I popc 0x0020, %r16 | |
9016 | ba,a .+8 | |
9017 | jmpl %r27+0, %r27 | |
9018 | .word 0xa7a309d0 ! 26: FDIVd fdivd %f12, %f16, %f50 | |
9019 | intveclr_4_13: | |
9020 | nop | |
9021 | ta T_CHANGE_HPRIV | |
9022 | setx 0x0154e99635e15282, %r1, %r28 | |
9023 | stxa %r28, [%g0] 0x72 | |
9024 | ta T_CHANGE_NONHPRIV | |
9025 | .word 0x25400001 ! 27: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
9026 | splash_lsu_4_14: | |
9027 | nop | |
9028 | ta T_CHANGE_HPRIV | |
9029 | set 0xa1d50679, %r2 | |
9030 | mov 0x6, %r1 | |
9031 | sllx %r1, 32, %r1 | |
9032 | or %r1, %r2, %r2 | |
9033 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
9034 | ta T_CHANGE_NONHPRIV | |
9035 | .word 0x3d400001 ! 28: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
9036 | splash_cmpr_4_15: | |
9037 | mov 0, %r18 | |
9038 | sllx %r18, 63, %r18 | |
9039 | rd %tick, %r17 | |
9040 | add %r17, 0x80, %r17 | |
9041 | or %r17, %r18, %r17 | |
9042 | ta T_CHANGE_HPRIV | |
9043 | wrhpr %r17, %g0, %hsys_tick_cmpr | |
9044 | .word 0xaf800011 ! 29: WR_TICK_CMPR_REG_R wr %r0, %r17, %- | |
9045 | brcommon1_4_16: | |
9046 | nop | |
9047 | setx common_target, %r12, %r27 | |
9048 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
9049 | ba,a .+12 | |
9050 | .word 0xa9b7c7d1 ! 1: PDIST pdistn %d62, %d48, %d20 | |
9051 | ba,a .+8 | |
9052 | jmpl %r27+0, %r27 | |
9053 | .word 0x87a9ca54 ! 30: FCMPd fcmpd %fcc<n>, %f38, %f20 | |
9054 | .word 0xd03fc000 ! 31: STD_R std %r8, [%r31 + %r0] | |
9055 | splash_tba_4_17: | |
9056 | nop | |
9057 | ta T_CHANGE_PRIV | |
9058 | setx 0x0000000400380000, %r11, %r12 | |
9059 | .word 0x8b90000c ! 32: WRPR_TBA_R wrpr %r0, %r12, %tba | |
9060 | ibp_4_18: | |
9061 | nop | |
9062 | ta T_CHANGE_HPRIV | |
9063 | mov 8, %r18 | |
9064 | rd %asi, %r12 | |
9065 | wr %r0, 0x41, %asi | |
9066 | set sync_thr_counter4, %r23 | |
9067 | #ifndef SPC | |
9068 | ldxa [%g0]0x63, %r8 | |
9069 | and %r8, 0x38, %r8 ! Core ID | |
9070 | add %r8, %r23, %r23 | |
9071 | #else | |
9072 | mov 0, %r8 | |
9073 | #endif | |
9074 | mov 0x4, %r16 | |
9075 | ibp_startwait4_18: | |
9076 | cas [%r23],%g0,%r16 !lock | |
9077 | brz,a %r16, continue_ibp_4_18 | |
9078 | mov (~0x4&0xf), %r16 | |
9079 | ld [%r23], %r16 | |
9080 | ibp_wait4_18: | |
9081 | brnz %r16, ibp_wait4_18 | |
9082 | ld [%r23], %r16 | |
9083 | ba ibp_startwait4_18 | |
9084 | mov 0x4, %r16 | |
9085 | continue_ibp_4_18: | |
9086 | sllx %r16, %r8, %r16 !Mask for my core only | |
9087 | ldxa [0x58]%asi, %r17 !Running_status | |
9088 | wait_for_stat_4_18: | |
9089 | ldxa [0x50]%asi, %r13 !Running_rw | |
9090 | cmp %r13, %r17 | |
9091 | bne,a %xcc, wait_for_stat_4_18 | |
9092 | ldxa [0x58]%asi, %r17 !Running_status | |
9093 | stxa %r16, [0x68]%asi !Park (W1C) | |
9094 | ldxa [0x50]%asi, %r14 !Running_rw | |
9095 | wait_for_ibp_4_18: | |
9096 | ldxa [0x58]%asi, %r17 !Running_status | |
9097 | cmp %r14, %r17 | |
9098 | bne,a %xcc, wait_for_ibp_4_18 | |
9099 | ldxa [0x50]%asi, %r14 !Running_rw | |
9100 | ibp_doit4_18: | |
9101 | best_set_reg(0x00000050d0c00e5b,%r19, %r20) | |
9102 | stxa %r20, [%r18]0x42 | |
9103 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
9104 | st %g0, [%r23] !clear lock | |
9105 | wr %r0, %r12, %asi !restore %asi | |
9106 | .word 0xd1e7e012 ! 33: CASA_R casa [%r31] %asi, %r18, %r8 | |
9107 | .word 0xd127c000 ! 34: STF_R st %f8, [%r0, %r31] | |
9108 | .word 0xd0c7e1d8 ! 35: LDSWA_I ldswa [%r31, + 0x01d8] %asi, %r8 | |
9109 | ibp_4_19: | |
9110 | nop | |
9111 | ta T_CHANGE_HPRIV | |
9112 | mov 8, %r18 | |
9113 | rd %asi, %r12 | |
9114 | wr %r0, 0x41, %asi | |
9115 | set sync_thr_counter4, %r23 | |
9116 | #ifndef SPC | |
9117 | ldxa [%g0]0x63, %r8 | |
9118 | and %r8, 0x38, %r8 ! Core ID | |
9119 | add %r8, %r23, %r23 | |
9120 | #else | |
9121 | mov 0, %r8 | |
9122 | #endif | |
9123 | mov 0x4, %r16 | |
9124 | ibp_startwait4_19: | |
9125 | cas [%r23],%g0,%r16 !lock | |
9126 | brz,a %r16, continue_ibp_4_19 | |
9127 | mov (~0x4&0xf), %r16 | |
9128 | ld [%r23], %r16 | |
9129 | ibp_wait4_19: | |
9130 | brnz %r16, ibp_wait4_19 | |
9131 | ld [%r23], %r16 | |
9132 | ba ibp_startwait4_19 | |
9133 | mov 0x4, %r16 | |
9134 | continue_ibp_4_19: | |
9135 | sllx %r16, %r8, %r16 !Mask for my core only | |
9136 | ldxa [0x58]%asi, %r17 !Running_status | |
9137 | wait_for_stat_4_19: | |
9138 | ldxa [0x50]%asi, %r13 !Running_rw | |
9139 | cmp %r13, %r17 | |
9140 | bne,a %xcc, wait_for_stat_4_19 | |
9141 | ldxa [0x58]%asi, %r17 !Running_status | |
9142 | stxa %r16, [0x68]%asi !Park (W1C) | |
9143 | ldxa [0x50]%asi, %r14 !Running_rw | |
9144 | wait_for_ibp_4_19: | |
9145 | ldxa [0x58]%asi, %r17 !Running_status | |
9146 | cmp %r14, %r17 | |
9147 | bne,a %xcc, wait_for_ibp_4_19 | |
9148 | ldxa [0x50]%asi, %r14 !Running_rw | |
9149 | ibp_doit4_19: | |
9150 | best_set_reg(0x0000004099ce5b7c,%r19, %r20) | |
9151 | stxa %r20, [%r18]0x42 | |
9152 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
9153 | st %g0, [%r23] !clear lock | |
9154 | wr %r0, %r12, %asi !restore %asi | |
9155 | .word 0xc32fc012 ! 36: STXFSR_R st-sfr %f1, [%r18, %r31] | |
9156 | splash_cmpr_4_20: | |
9157 | mov 0, %r18 | |
9158 | sllx %r18, 63, %r18 | |
9159 | rd %tick, %r17 | |
9160 | add %r17, 0x100, %r17 | |
9161 | or %r17, %r18, %r17 | |
9162 | .word 0xb3800011 ! 37: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
9163 | .word 0xc19fe0a0 ! 38: LDDFA_I ldda [%r31, 0x00a0], %f0 | |
9164 | nop | |
9165 | ta T_CHANGE_HPRIV | |
9166 | mov 0x4+1, %r10 | |
9167 | set sync_thr_counter5, %r23 | |
9168 | #ifndef SPC | |
9169 | ldxa [%g0]0x63, %o1 | |
9170 | and %o1, 0x38, %o1 | |
9171 | add %o1, %r23, %r23 | |
9172 | sllx %o1, 5, %o3 !(CID*256) | |
9173 | #endif | |
9174 | cas [%r23],%g0,%r10 !lock | |
9175 | brnz %r10, cwq_4_21 | |
9176 | rd %asi, %r12 | |
9177 | wr %g0, 0x40, %asi | |
9178 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
9179 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
9180 | cmp %l1, 1 | |
9181 | bne cwq_4_21 | |
9182 | set CWQ_BASE, %l6 | |
9183 | #ifndef SPC | |
9184 | add %l6, %o3, %l6 | |
9185 | #endif | |
9186 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
9187 | best_set_reg(0x20610050, %l1, %l2) !# Control Word | |
9188 | sllx %l2, 32, %l2 | |
9189 | stx %l2, [%l6 + 0x0] | |
9190 | membar #Sync | |
9191 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
9192 | sub %l2, 0x40, %l2 | |
9193 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
9194 | wr %r12, %g0, %asi | |
9195 | st %g0, [%r23] | |
9196 | cwq_4_21: | |
9197 | ta T_CHANGE_NONHPRIV | |
9198 | .word 0xa5414000 ! 39: RDPC rd %pc, %r18 | |
9199 | unsupttte_4_22: | |
9200 | nop | |
9201 | ta T_CHANGE_HPRIV | |
9202 | mov 1, %r20 | |
9203 | sllx %r20, 63, %r20 | |
9204 | or %r20, 2,%r20 | |
9205 | stxa %r20, [%g0]0x5c ! D unsupported page size .. | |
9206 | ta T_CHANGE_NONHPRIV | |
9207 | .word 0xa3b2c48a ! 40: FCMPLE32 fcmple32 %d42, %d10, %r17 | |
9208 | jmptr_4_23: | |
9209 | nop | |
9210 | best_set_reg(0xe1200000, %r20, %r27) | |
9211 | .word 0xb7c6c000 ! 41: JMPL_R jmpl %r27 + %r0, %r27 | |
9212 | .word 0x91508000 ! 42: RDPR_TSTATE <illegal instruction> | |
9213 | .word 0xe6dfe168 ! 43: LDXA_I ldxa [%r31, + 0x0168] %asi, %r19 | |
9214 | .word 0x93a489d1 ! 44: FDIVd fdivd %f18, %f48, %f40 | |
9215 | bvc skip_4_25 | |
9216 | bge,a skip_4_25 | |
9217 | .align 128 | |
9218 | skip_4_25: | |
9219 | .word 0xc3686eb9 ! 45: PREFETCH_I prefetch [%r1 + 0x0eb9], #one_read | |
9220 | br_longdelay4_4_26: | |
9221 | nop | |
9222 | not %g0, %r12 | |
9223 | jmp %r12 | |
9224 | .word 0x9d902005 ! 46: WRPR_WSTATE_I wrpr %r0, 0x0005, %wstate | |
9225 | setx 0x2329f954f38dfa3a, %r1, %r28 | |
9226 | stxa %r28, [%g0] 0x73 | |
9227 | intvec_4_27: | |
9228 | .word 0x39400001 ! 47: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
9229 | unsupttte_4_28: | |
9230 | nop | |
9231 | ta T_CHANGE_HPRIV | |
9232 | mov 1, %r20 | |
9233 | sllx %r20, 63, %r20 | |
9234 | or %r20, 2,%r20 | |
9235 | stxa %r20, [%g0]0x5c ! D unsupported page size .. | |
9236 | ta T_CHANGE_NONHPRIV | |
9237 | .word 0xa5b44490 ! 48: FCMPLE32 fcmple32 %d48, %d16, %r18 | |
9238 | .word 0xe677c000 ! 49: STX_R stx %r19, [%r31 + %r0] | |
9239 | intveclr_4_29: | |
9240 | nop | |
9241 | ta T_CHANGE_HPRIV | |
9242 | setx 0xc8ec7450355b0864, %r1, %r28 | |
9243 | stxa %r28, [%g0] 0x72 | |
9244 | ta T_CHANGE_NONHPRIV | |
9245 | .word 0x25400001 ! 50: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
9246 | mondo_4_30: | |
9247 | nop | |
9248 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
9249 | ta T_CHANGE_PRIV | |
9250 | stxa %r13, [%r0+0x3c0] %asi | |
9251 | .word 0x9d914012 ! 51: WRPR_WSTATE_R wrpr %r5, %r18, %wstate | |
9252 | .word 0xe63fe071 ! 52: STD_I std %r19, [%r31 + 0x0071] | |
9253 | .word 0xa780797d ! 53: WR_GRAPHICS_STATUS_REG_I wr %r1, 0x197d, %- | |
9254 | .word 0xe71fc000 ! 54: LDDF_R ldd [%r31, %r0], %f19 | |
9255 | .word 0x3c800001 ! 1: BPOS bpos,a <label_0x1> | |
9256 | .word 0x8d903508 ! 55: WRPR_PSTATE_I wrpr %r0, 0x1508, %pstate | |
9257 | splash_tba_4_32: | |
9258 | nop | |
9259 | ta T_CHANGE_PRIV | |
9260 | set 0x120000, %r12 | |
9261 | .word 0x8b90000c ! 56: WRPR_TBA_R wrpr %r0, %r12, %tba | |
9262 | unsupttte_4_33: | |
9263 | nop | |
9264 | ta T_CHANGE_HPRIV | |
9265 | mov 1, %r20 | |
9266 | sllx %r20, 63, %r20 | |
9267 | or %r20, 2,%r20 | |
9268 | stxa %r20, [%g0]0x54 ! I unsupported page size .. | |
9269 | ta T_CHANGE_NONHPRIV | |
9270 | .word 0xa1a489aa ! 57: FDIVs fdivs %f18, %f10, %f16 | |
9271 | .word 0x89800011 ! 58: WRTICK_R wr %r0, %r17, %tick | |
9272 | ibp_4_35: | |
9273 | nop | |
9274 | ta T_CHANGE_HPRIV | |
9275 | mov 8, %r18 | |
9276 | rd %asi, %r12 | |
9277 | wr %r0, 0x41, %asi | |
9278 | set sync_thr_counter4, %r23 | |
9279 | #ifndef SPC | |
9280 | ldxa [%g0]0x63, %r8 | |
9281 | and %r8, 0x38, %r8 ! Core ID | |
9282 | add %r8, %r23, %r23 | |
9283 | #else | |
9284 | mov 0, %r8 | |
9285 | #endif | |
9286 | mov 0x4, %r16 | |
9287 | ibp_startwait4_35: | |
9288 | cas [%r23],%g0,%r16 !lock | |
9289 | brz,a %r16, continue_ibp_4_35 | |
9290 | mov (~0x4&0xf), %r16 | |
9291 | ld [%r23], %r16 | |
9292 | ibp_wait4_35: | |
9293 | brnz %r16, ibp_wait4_35 | |
9294 | ld [%r23], %r16 | |
9295 | ba ibp_startwait4_35 | |
9296 | mov 0x4, %r16 | |
9297 | continue_ibp_4_35: | |
9298 | sllx %r16, %r8, %r16 !Mask for my core only | |
9299 | ldxa [0x58]%asi, %r17 !Running_status | |
9300 | wait_for_stat_4_35: | |
9301 | ldxa [0x50]%asi, %r13 !Running_rw | |
9302 | cmp %r13, %r17 | |
9303 | bne,a %xcc, wait_for_stat_4_35 | |
9304 | ldxa [0x58]%asi, %r17 !Running_status | |
9305 | stxa %r16, [0x68]%asi !Park (W1C) | |
9306 | ldxa [0x50]%asi, %r14 !Running_rw | |
9307 | wait_for_ibp_4_35: | |
9308 | ldxa [0x58]%asi, %r17 !Running_status | |
9309 | cmp %r14, %r17 | |
9310 | bne,a %xcc, wait_for_ibp_4_35 | |
9311 | ldxa [0x50]%asi, %r14 !Running_rw | |
9312 | ibp_doit4_35: | |
9313 | best_set_reg(0x00000050f0db7c7a,%r19, %r20) | |
9314 | stxa %r20, [%r18]0x42 | |
9315 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
9316 | st %g0, [%r23] !clear lock | |
9317 | wr %r0, %r12, %asi !restore %asi | |
9318 | .word 0xe89fc02d ! 59: LDDA_R ldda [%r31, %r13] 0x01, %r20 | |
9319 | .word 0xe8cfe178 ! 60: LDSBA_I ldsba [%r31, + 0x0178] %asi, %r20 | |
9320 | .word 0x87a98a52 ! 61: FCMPd fcmpd %fcc<n>, %f6, %f18 | |
9321 | ceter_4_37: | |
9322 | nop | |
9323 | ta T_CHANGE_HPRIV | |
9324 | mov 2, %r17 | |
9325 | sllx %r17, 60, %r17 | |
9326 | mov 0x18, %r16 | |
9327 | stxa %r17, [%r16]0x4c | |
9328 | ta T_CHANGE_NONHPRIV | |
9329 | .word 0x95410000 ! 62: RDTICK rd %tick, %r10 | |
9330 | .word 0xd2dfc02d ! 63: LDXA_R ldxa [%r31, %r13] 0x01, %r9 | |
9331 | mondo_4_39: | |
9332 | nop | |
9333 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
9334 | stxa %r7, [%r0+0x3d0] %asi | |
9335 | .word 0x9d920011 ! 64: WRPR_WSTATE_R wrpr %r8, %r17, %wstate | |
9336 | fble skip_4_40 | |
9337 | bl,a skip_4_40 | |
9338 | .align 2048 | |
9339 | skip_4_40: | |
9340 | .word 0xc36fe14d ! 65: PREFETCH_I prefetch [%r31 + 0x014d], #one_read | |
9341 | fpinit_4_41: | |
9342 | nop | |
9343 | setx fp_data_quads, %r19, %r20 | |
9344 | ldd [%r20], %f0 | |
9345 | ldd [%r20+8], %f4 | |
9346 | ld [%r20+16], %fsr | |
9347 | ld [%r20+24], %r19 | |
9348 | wr %r19, %g0, %gsr | |
9349 | .word 0x87a80a44 ! 66: FCMPd fcmpd %fcc<n>, %f0, %f4 | |
9350 | nop | |
9351 | ta T_CHANGE_HPRIV ! macro | |
9352 | donret_4_42: | |
9353 | rd %pc, %r12 | |
9354 | add %r12, (donretarg_4_42-donret_4_42+4), %r12 | |
9355 | add %r12, 0x4, %r11 ! seq tnpc | |
9356 | wrpr %g0, 0x2, %tl | |
9357 | wrpr %g0, %r12, %tpc | |
9358 | wrpr %g0, %r11, %tnpc | |
9359 | set (0x008bf800 | (0x80 << 24)), %r13 | |
9360 | and %r12, 0xfff, %r14 | |
9361 | sllx %r14, 30, %r14 | |
9362 | or %r13, %r14, %r20 | |
9363 | wrpr %r20, %g0, %tstate | |
9364 | wrhpr %g0, 0x1f74, %htstate | |
9365 | ta T_CHANGE_NONHPRIV ! rand=1 (4) | |
9366 | retry | |
9367 | donretarg_4_42: | |
9368 | .word 0xd26fe1a5 ! 67: LDSTUB_I ldstub %r9, [%r31 + 0x01a5] | |
9369 | ibp_4_43: | |
9370 | nop | |
9371 | ta T_CHANGE_HPRIV | |
9372 | mov 8, %r18 | |
9373 | rd %asi, %r12 | |
9374 | wr %r0, 0x41, %asi | |
9375 | set sync_thr_counter4, %r23 | |
9376 | #ifndef SPC | |
9377 | ldxa [%g0]0x63, %r8 | |
9378 | and %r8, 0x38, %r8 ! Core ID | |
9379 | add %r8, %r23, %r23 | |
9380 | #else | |
9381 | mov 0, %r8 | |
9382 | #endif | |
9383 | mov 0x4, %r16 | |
9384 | ibp_startwait4_43: | |
9385 | cas [%r23],%g0,%r16 !lock | |
9386 | brz,a %r16, continue_ibp_4_43 | |
9387 | mov (~0x4&0xf), %r16 | |
9388 | ld [%r23], %r16 | |
9389 | ibp_wait4_43: | |
9390 | brnz %r16, ibp_wait4_43 | |
9391 | ld [%r23], %r16 | |
9392 | ba ibp_startwait4_43 | |
9393 | mov 0x4, %r16 | |
9394 | continue_ibp_4_43: | |
9395 | sllx %r16, %r8, %r16 !Mask for my core only | |
9396 | ldxa [0x58]%asi, %r17 !Running_status | |
9397 | wait_for_stat_4_43: | |
9398 | ldxa [0x50]%asi, %r13 !Running_rw | |
9399 | cmp %r13, %r17 | |
9400 | bne,a %xcc, wait_for_stat_4_43 | |
9401 | ldxa [0x58]%asi, %r17 !Running_status | |
9402 | stxa %r16, [0x68]%asi !Park (W1C) | |
9403 | ldxa [0x50]%asi, %r14 !Running_rw | |
9404 | wait_for_ibp_4_43: | |
9405 | ldxa [0x58]%asi, %r17 !Running_status | |
9406 | cmp %r14, %r17 | |
9407 | bne,a %xcc, wait_for_ibp_4_43 | |
9408 | ldxa [0x50]%asi, %r14 !Running_rw | |
9409 | ibp_doit4_43: | |
9410 | best_set_reg(0x0000004002fc7aa0,%r19, %r20) | |
9411 | stxa %r20, [%r18]0x42 | |
9412 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
9413 | st %g0, [%r23] !clear lock | |
9414 | wr %r0, %r12, %asi !restore %asi | |
9415 | .word 0xa5a289b3 ! 68: FDIVs fdivs %f10, %f19, %f18 | |
9416 | splash_tba_4_44: | |
9417 | nop | |
9418 | ta T_CHANGE_PRIV | |
9419 | set 0x120000, %r12 | |
9420 | .word 0x8b90000c ! 69: WRPR_TBA_R wrpr %r0, %r12, %tba | |
9421 | jmptr_4_45: | |
9422 | nop | |
9423 | best_set_reg(0xe1200000, %r20, %r27) | |
9424 | .word 0xb7c6c000 ! 70: JMPL_R jmpl %r27 + %r0, %r27 | |
9425 | .word 0xe6dfe078 ! 71: LDXA_I ldxa [%r31, + 0x0078] %asi, %r19 | |
9426 | .word 0xe737e1f1 ! 72: STQF_I - %f19, [0x01f1, %r31] | |
9427 | nop | |
9428 | mov 0x80, %g3 | |
9429 | stxa %g3, [%g3] 0x5f | |
9430 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 | |
9431 | .word 0xe65fc000 ! 73: LDX_R ldx [%r31 + %r0], %r19 | |
9432 | set 0x244b, %l3 | |
9433 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT | |
9434 | .word 0xa7b087d4 ! 74: PDIST pdistn %d2, %d20, %d50 | |
9435 | .word 0xd22fe180 ! 75: STB_I stb %r9, [%r31 + 0x0180] | |
9436 | nop | |
9437 | mov 0x80, %g3 | |
9438 | stxa %g3, [%g3] 0x57 | |
9439 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
9440 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
9441 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
9442 | .word 0xd25fc000 ! 76: LDX_R ldx [%r31 + %r0], %r9 | |
9443 | .word 0x9193400c ! 77: WRPR_PIL_R wrpr %r13, %r12, %pil | |
9444 | .word 0xd2bfc02c ! 78: STDA_R stda %r9, [%r31 + %r12] 0x01 | |
9445 | .word 0x93d02033 ! 79: Tcc_I tne icc_or_xcc, %r0 + 51 | |
9446 | .word 0x89800011 ! 80: WRTICK_R wr %r0, %r17, %tick | |
9447 | splash_tba_4_49: | |
9448 | nop | |
9449 | ta T_CHANGE_PRIV | |
9450 | setx 0x0000000400380000, %r11, %r12 | |
9451 | .word 0x8b90000c ! 81: WRPR_TBA_R wrpr %r0, %r12, %tba | |
9452 | intveclr_4_50: | |
9453 | nop | |
9454 | ta T_CHANGE_HPRIV | |
9455 | setx 0xe7880972600a6208, %r1, %r28 | |
9456 | stxa %r28, [%g0] 0x72 | |
9457 | .word 0x25400001 ! 82: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
9458 | nop | |
9459 | mov 0x80, %g3 | |
9460 | stxa %g3, [%g3] 0x57 | |
9461 | .word 0xd25fc000 ! 83: LDX_R ldx [%r31 + %r0], %r9 | |
9462 | .word 0xd337e160 ! 84: STQF_I - %f9, [0x0160, %r31] | |
9463 | memptr_4_51: | |
9464 | set user_data_start, %r31 | |
9465 | .word 0x85817319 ! 85: WRCCR_I wr %r5, 0x1319, %ccr | |
9466 | invalw | |
9467 | mov 0xb0, %r30 | |
9468 | .word 0x93d0001e ! 86: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
9469 | .word 0xd327c000 ! 87: STF_R st %f9, [%r0, %r31] | |
9470 | jmptr_4_52: | |
9471 | nop | |
9472 | best_set_reg(0xe1200000, %r20, %r27) | |
9473 | .word 0xb7c6c000 ! 88: JMPL_R jmpl %r27 + %r0, %r27 | |
9474 | setx 0xbcec3ee8a5f7afa8, %r1, %r28 | |
9475 | stxa %r28, [%g0] 0x73 | |
9476 | intvec_4_53: | |
9477 | .word 0x39400001 ! 89: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
9478 | jmptr_4_54: | |
9479 | nop | |
9480 | best_set_reg(0xe1200000, %r20, %r27) | |
9481 | .word 0xb7c6c000 ! 90: JMPL_R jmpl %r27 + %r0, %r27 | |
9482 | pmu_4_55: | |
9483 | nop | |
9484 | setx 0xfffff719fffff072, %g1, %g7 | |
9485 | .word 0xa3800007 ! 91: WR_PERF_COUNTER_R wr %r0, %r7, %- | |
9486 | .word 0xd2800a80 ! 92: LDUWA_R lduwa [%r0, %r0] 0x54, %r9 | |
9487 | nop | |
9488 | ta T_CHANGE_HPRIV | |
9489 | mov 0x4+1, %r10 | |
9490 | set sync_thr_counter5, %r23 | |
9491 | #ifndef SPC | |
9492 | ldxa [%g0]0x63, %o1 | |
9493 | and %o1, 0x38, %o1 | |
9494 | add %o1, %r23, %r23 | |
9495 | sllx %o1, 5, %o3 !(CID*256) | |
9496 | #endif | |
9497 | cas [%r23],%g0,%r10 !lock | |
9498 | brnz %r10, cwq_4_56 | |
9499 | rd %asi, %r12 | |
9500 | wr %g0, 0x40, %asi | |
9501 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
9502 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
9503 | cmp %l1, 1 | |
9504 | bne cwq_4_56 | |
9505 | set CWQ_BASE, %l6 | |
9506 | #ifndef SPC | |
9507 | add %l6, %o3, %l6 | |
9508 | #endif | |
9509 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
9510 | best_set_reg(0x206100f0, %l1, %l2) !# Control Word | |
9511 | sllx %l2, 32, %l2 | |
9512 | stx %l2, [%l6 + 0x0] | |
9513 | membar #Sync | |
9514 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
9515 | sub %l2, 0x40, %l2 | |
9516 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
9517 | wr %r12, %g0, %asi | |
9518 | st %g0, [%r23] | |
9519 | cwq_4_56: | |
9520 | ta T_CHANGE_NONHPRIV | |
9521 | .word 0x99414000 ! 93: RDPC rd %pc, %r12 | |
9522 | brcommon3_4_57: | |
9523 | nop | |
9524 | setx common_target, %r12, %r27 | |
9525 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
9526 | ba,a .+12 | |
9527 | .word 0xe06fe1f0 ! 1: LDSTUB_I ldstub %r16, [%r31 + 0x01f0] | |
9528 | ba,a .+8 | |
9529 | jmpl %r27+0, %r27 | |
9530 | .word 0xe11fc011 ! 94: LDDF_R ldd [%r31, %r17], %f16 | |
9531 | splash_lsu_4_58: | |
9532 | nop | |
9533 | ta T_CHANGE_HPRIV | |
9534 | set 0xe3dc0ee9, %r2 | |
9535 | mov 0x1, %r1 | |
9536 | sllx %r1, 32, %r1 | |
9537 | or %r1, %r2, %r2 | |
9538 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
9539 | ta T_CHANGE_NONHPRIV | |
9540 | .word 0x3d400001 ! 95: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
9541 | mondo_4_59: | |
9542 | nop | |
9543 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
9544 | ta T_CHANGE_PRIV | |
9545 | stxa %r16, [%r0+0x3c8] %asi | |
9546 | .word 0x9d914014 ! 96: WRPR_WSTATE_R wrpr %r5, %r20, %wstate | |
9547 | ibp_4_60: | |
9548 | nop | |
9549 | ta T_CHANGE_HPRIV | |
9550 | mov 8, %r18 | |
9551 | rd %asi, %r12 | |
9552 | wr %r0, 0x41, %asi | |
9553 | set sync_thr_counter4, %r23 | |
9554 | #ifndef SPC | |
9555 | ldxa [%g0]0x63, %r8 | |
9556 | and %r8, 0x38, %r8 ! Core ID | |
9557 | add %r8, %r23, %r23 | |
9558 | #else | |
9559 | mov 0, %r8 | |
9560 | #endif | |
9561 | mov 0x4, %r16 | |
9562 | ibp_startwait4_60: | |
9563 | cas [%r23],%g0,%r16 !lock | |
9564 | brz,a %r16, continue_ibp_4_60 | |
9565 | mov (~0x4&0xf), %r16 | |
9566 | ld [%r23], %r16 | |
9567 | ibp_wait4_60: | |
9568 | brnz %r16, ibp_wait4_60 | |
9569 | ld [%r23], %r16 | |
9570 | ba ibp_startwait4_60 | |
9571 | mov 0x4, %r16 | |
9572 | continue_ibp_4_60: | |
9573 | sllx %r16, %r8, %r16 !Mask for my core only | |
9574 | ldxa [0x58]%asi, %r17 !Running_status | |
9575 | wait_for_stat_4_60: | |
9576 | ldxa [0x50]%asi, %r13 !Running_rw | |
9577 | cmp %r13, %r17 | |
9578 | bne,a %xcc, wait_for_stat_4_60 | |
9579 | ldxa [0x58]%asi, %r17 !Running_status | |
9580 | stxa %r16, [0x68]%asi !Park (W1C) | |
9581 | ldxa [0x50]%asi, %r14 !Running_rw | |
9582 | wait_for_ibp_4_60: | |
9583 | ldxa [0x58]%asi, %r17 !Running_status | |
9584 | cmp %r14, %r17 | |
9585 | bne,a %xcc, wait_for_ibp_4_60 | |
9586 | ldxa [0x50]%asi, %r14 !Running_rw | |
9587 | ibp_doit4_60: | |
9588 | best_set_reg(0x000000402cfaa0f7,%r19, %r20) | |
9589 | stxa %r20, [%r18]0x42 | |
9590 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
9591 | st %g0, [%r23] !clear lock | |
9592 | wr %r0, %r12, %asi !restore %asi | |
9593 | ta T_CHANGE_NONHPRIV | |
9594 | .word 0xc1bfde00 ! 97: STDFA_R stda %f0, [%r0, %r31] | |
9595 | .word 0xe19fc2c0 ! 98: LDDFA_R ldda [%r31, %r0], %f16 | |
9596 | nop | |
9597 | ta T_CHANGE_HPRIV | |
9598 | mov 0x4+1, %r10 | |
9599 | set sync_thr_counter5, %r23 | |
9600 | #ifndef SPC | |
9601 | ldxa [%g0]0x63, %o1 | |
9602 | and %o1, 0x38, %o1 | |
9603 | add %o1, %r23, %r23 | |
9604 | sllx %o1, 5, %o3 !(CID*256) | |
9605 | #endif | |
9606 | cas [%r23],%g0,%r10 !lock | |
9607 | brnz %r10, cwq_4_61 | |
9608 | rd %asi, %r12 | |
9609 | wr %g0, 0x40, %asi | |
9610 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
9611 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
9612 | cmp %l1, 1 | |
9613 | bne cwq_4_61 | |
9614 | set CWQ_BASE, %l6 | |
9615 | #ifndef SPC | |
9616 | add %l6, %o3, %l6 | |
9617 | #endif | |
9618 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
9619 | best_set_reg(0x206100d0, %l1, %l2) !# Control Word | |
9620 | sllx %l2, 32, %l2 | |
9621 | stx %l2, [%l6 + 0x0] | |
9622 | membar #Sync | |
9623 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
9624 | sub %l2, 0x40, %l2 | |
9625 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
9626 | wr %r12, %g0, %asi | |
9627 | st %g0, [%r23] | |
9628 | cwq_4_61: | |
9629 | ta T_CHANGE_NONHPRIV | |
9630 | .word 0x99414000 ! 99: RDPC rd %pc, %r12 | |
9631 | .word 0xdb37e174 ! 100: STQF_I - %f13, [0x0174, %r31] | |
9632 | .word 0xa1a049a5 ! 101: FDIVs fdivs %f1, %f5, %f16 | |
9633 | .word 0x89800011 ! 102: WRTICK_R wr %r0, %r17, %tick | |
9634 | cwp_4_64: | |
9635 | set user_data_start, %o7 | |
9636 | .word 0x93902001 ! 103: WRPR_CWP_I wrpr %r0, 0x0001, %cwp | |
9637 | splash_lsu_4_65: | |
9638 | nop | |
9639 | ta T_CHANGE_HPRIV | |
9640 | set 0x8b6f95b4, %r2 | |
9641 | mov 0x2, %r1 | |
9642 | sllx %r1, 32, %r1 | |
9643 | or %r1, %r2, %r2 | |
9644 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
9645 | ta T_CHANGE_NONHPRIV | |
9646 | .word 0x3d400001 ! 104: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
9647 | splash_lsu_4_66: | |
9648 | nop | |
9649 | ta T_CHANGE_HPRIV | |
9650 | set 0x36db950a, %r2 | |
9651 | mov 0x7, %r1 | |
9652 | sllx %r1, 32, %r1 | |
9653 | or %r1, %r2, %r2 | |
9654 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
9655 | .word 0x3d400001 ! 105: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
9656 | fpinit_4_67: | |
9657 | nop | |
9658 | setx fp_data_quads, %r19, %r20 | |
9659 | ldd [%r20], %f0 | |
9660 | ldd [%r20+8], %f4 | |
9661 | ld [%r20+16], %fsr | |
9662 | ld [%r20+24], %r19 | |
9663 | wr %r19, %g0, %gsr | |
9664 | .word 0x89a009a4 ! 106: FDIVs fdivs %f0, %f4, %f4 | |
9665 | ibp_4_68: | |
9666 | nop | |
9667 | ta T_CHANGE_HPRIV | |
9668 | mov 8, %r18 | |
9669 | rd %asi, %r12 | |
9670 | wr %r0, 0x41, %asi | |
9671 | set sync_thr_counter4, %r23 | |
9672 | #ifndef SPC | |
9673 | ldxa [%g0]0x63, %r8 | |
9674 | and %r8, 0x38, %r8 ! Core ID | |
9675 | add %r8, %r23, %r23 | |
9676 | #else | |
9677 | mov 0, %r8 | |
9678 | #endif | |
9679 | mov 0x4, %r16 | |
9680 | ibp_startwait4_68: | |
9681 | cas [%r23],%g0,%r16 !lock | |
9682 | brz,a %r16, continue_ibp_4_68 | |
9683 | mov (~0x4&0xf), %r16 | |
9684 | ld [%r23], %r16 | |
9685 | ibp_wait4_68: | |
9686 | brnz %r16, ibp_wait4_68 | |
9687 | ld [%r23], %r16 | |
9688 | ba ibp_startwait4_68 | |
9689 | mov 0x4, %r16 | |
9690 | continue_ibp_4_68: | |
9691 | sllx %r16, %r8, %r16 !Mask for my core only | |
9692 | ldxa [0x58]%asi, %r17 !Running_status | |
9693 | wait_for_stat_4_68: | |
9694 | ldxa [0x50]%asi, %r13 !Running_rw | |
9695 | cmp %r13, %r17 | |
9696 | bne,a %xcc, wait_for_stat_4_68 | |
9697 | ldxa [0x58]%asi, %r17 !Running_status | |
9698 | stxa %r16, [0x68]%asi !Park (W1C) | |
9699 | ldxa [0x50]%asi, %r14 !Running_rw | |
9700 | wait_for_ibp_4_68: | |
9701 | ldxa [0x58]%asi, %r17 !Running_status | |
9702 | cmp %r14, %r17 | |
9703 | bne,a %xcc, wait_for_ibp_4_68 | |
9704 | ldxa [0x50]%asi, %r14 !Running_rw | |
9705 | ibp_doit4_68: | |
9706 | best_set_reg(0x00000040d9e0f7b7,%r19, %r20) | |
9707 | stxa %r20, [%r18]0x42 | |
9708 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
9709 | st %g0, [%r23] !clear lock | |
9710 | wr %r0, %r12, %asi !restore %asi | |
9711 | ta T_CHANGE_NONHPRIV | |
9712 | .word 0xa9a4c9d3 ! 107: FDIVd fdivd %f50, %f50, %f20 | |
9713 | ta T_CHANGE_NONHPRIV | |
9714 | .word 0x8143e011 ! 108: MEMBAR membar #LoadLoad | #Lookaside | |
9715 | intveclr_4_70: | |
9716 | nop | |
9717 | ta T_CHANGE_HPRIV | |
9718 | setx 0x77abbaa2aadd7513, %r1, %r28 | |
9719 | stxa %r28, [%g0] 0x72 | |
9720 | .word 0x25400001 ! 109: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
9721 | nop | |
9722 | ta T_CHANGE_HPRIV | |
9723 | mov 0x4, %r10 | |
9724 | set sync_thr_counter6, %r23 | |
9725 | #ifndef SPC | |
9726 | ldxa [%g0]0x63, %o1 | |
9727 | and %o1, 0x38, %o1 | |
9728 | add %o1, %r23, %r23 | |
9729 | #endif | |
9730 | cas [%r23],%g0,%r10 !lock | |
9731 | brnz %r10, sma_4_71 | |
9732 | rd %asi, %r12 | |
9733 | wr %g0, 0x40, %asi | |
9734 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 | |
9735 | set 0x001a1fff, %g1 | |
9736 | stxa %g1, [%g0 + 0x80] %asi | |
9737 | wr %r12, %g0, %asi | |
9738 | st %g0, [%r23] | |
9739 | sma_4_71: | |
9740 | ta T_CHANGE_NONHPRIV | |
9741 | .word 0xd7e7e011 ! 110: CASA_R casa [%r31] %asi, %r17, %r11 | |
9742 | .word 0xc1bfe0e0 ! 111: STDFA_I stda %f0, [0x00e0, %r31] | |
9743 | nop | |
9744 | ta T_CHANGE_HPRIV ! macro | |
9745 | donret_4_72: | |
9746 | rd %pc, %r12 | |
9747 | add %r12, (donretarg_4_72-donret_4_72), %r12 | |
9748 | add %r12, 0x8, %r11 ! nonseq tnpc | |
9749 | wrpr %g0, 0x1, %tl | |
9750 | wrpr %g0, %r12, %tpc | |
9751 | wrpr %g0, %r11, %tnpc | |
9752 | set (0x00422500 | (32 << 24)), %r13 | |
9753 | and %r12, 0xfff, %r14 | |
9754 | sllx %r14, 30, %r14 | |
9755 | or %r13, %r14, %r20 | |
9756 | wrpr %r20, %g0, %tstate | |
9757 | wrhpr %g0, 0x171f, %htstate | |
9758 | ta T_CHANGE_NONPRIV ! rand=0 (4) | |
9759 | .word 0x29400001 ! 1: FBPL fbl,a,pn %fcc0, <label_0x1> | |
9760 | retry | |
9761 | donretarg_4_72: | |
9762 | .word 0x9ba2c9d0 ! 112: FDIVd fdivd %f42, %f16, %f44 | |
9763 | ibp_4_73: | |
9764 | nop | |
9765 | ta T_CHANGE_HPRIV | |
9766 | mov 8, %r18 | |
9767 | rd %asi, %r12 | |
9768 | wr %r0, 0x41, %asi | |
9769 | set sync_thr_counter4, %r23 | |
9770 | #ifndef SPC | |
9771 | ldxa [%g0]0x63, %r8 | |
9772 | and %r8, 0x38, %r8 ! Core ID | |
9773 | add %r8, %r23, %r23 | |
9774 | #else | |
9775 | mov 0, %r8 | |
9776 | #endif | |
9777 | mov 0x4, %r16 | |
9778 | ibp_startwait4_73: | |
9779 | cas [%r23],%g0,%r16 !lock | |
9780 | brz,a %r16, continue_ibp_4_73 | |
9781 | mov (~0x4&0xf), %r16 | |
9782 | ld [%r23], %r16 | |
9783 | ibp_wait4_73: | |
9784 | brnz %r16, ibp_wait4_73 | |
9785 | ld [%r23], %r16 | |
9786 | ba ibp_startwait4_73 | |
9787 | mov 0x4, %r16 | |
9788 | continue_ibp_4_73: | |
9789 | sllx %r16, %r8, %r16 !Mask for my core only | |
9790 | ldxa [0x58]%asi, %r17 !Running_status | |
9791 | wait_for_stat_4_73: | |
9792 | ldxa [0x50]%asi, %r13 !Running_rw | |
9793 | cmp %r13, %r17 | |
9794 | bne,a %xcc, wait_for_stat_4_73 | |
9795 | ldxa [0x58]%asi, %r17 !Running_status | |
9796 | stxa %r16, [0x68]%asi !Park (W1C) | |
9797 | ldxa [0x50]%asi, %r14 !Running_rw | |
9798 | wait_for_ibp_4_73: | |
9799 | ldxa [0x58]%asi, %r17 !Running_status | |
9800 | cmp %r14, %r17 | |
9801 | bne,a %xcc, wait_for_ibp_4_73 | |
9802 | ldxa [0x50]%asi, %r14 !Running_rw | |
9803 | ibp_doit4_73: | |
9804 | best_set_reg(0x00000050a3f7b7e4,%r19, %r20) | |
9805 | stxa %r20, [%r18]0x42 | |
9806 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
9807 | st %g0, [%r23] !clear lock | |
9808 | wr %r0, %r12, %asi !restore %asi | |
9809 | .word 0xd23fe080 ! 113: STD_I std %r9, [%r31 + 0x0080] | |
9810 | .word 0xc1bfe1c0 ! 114: STDFA_I stda %f0, [0x01c0, %r31] | |
9811 | .word 0x8d9038ef ! 115: WRPR_PSTATE_I wrpr %r0, 0x18ef, %pstate | |
9812 | .word 0x8780208b ! 116: WRASI_I wr %r0, 0x008b, %asi | |
9813 | #if (defined SPC || defined CMP1) | |
9814 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_76) + 0, 16, 16)) -> intp(0,0,21) | |
9815 | #else | |
9816 | setx 0xfec32658d7f71aa3, %r1, %r28 | |
9817 | stxa %r28, [%g0] 0x73 | |
9818 | #endif | |
9819 | intvec_4_76: | |
9820 | .word 0x39400001 ! 117: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
9821 | ibp_4_77: | |
9822 | nop | |
9823 | ta T_CHANGE_HPRIV | |
9824 | mov 8, %r18 | |
9825 | rd %asi, %r12 | |
9826 | wr %r0, 0x41, %asi | |
9827 | set sync_thr_counter4, %r23 | |
9828 | #ifndef SPC | |
9829 | ldxa [%g0]0x63, %r8 | |
9830 | and %r8, 0x38, %r8 ! Core ID | |
9831 | add %r8, %r23, %r23 | |
9832 | #else | |
9833 | mov 0, %r8 | |
9834 | #endif | |
9835 | mov 0x4, %r16 | |
9836 | ibp_startwait4_77: | |
9837 | cas [%r23],%g0,%r16 !lock | |
9838 | brz,a %r16, continue_ibp_4_77 | |
9839 | mov (~0x4&0xf), %r16 | |
9840 | ld [%r23], %r16 | |
9841 | ibp_wait4_77: | |
9842 | brnz %r16, ibp_wait4_77 | |
9843 | ld [%r23], %r16 | |
9844 | ba ibp_startwait4_77 | |
9845 | mov 0x4, %r16 | |
9846 | continue_ibp_4_77: | |
9847 | sllx %r16, %r8, %r16 !Mask for my core only | |
9848 | ldxa [0x58]%asi, %r17 !Running_status | |
9849 | wait_for_stat_4_77: | |
9850 | ldxa [0x50]%asi, %r13 !Running_rw | |
9851 | cmp %r13, %r17 | |
9852 | bne,a %xcc, wait_for_stat_4_77 | |
9853 | ldxa [0x58]%asi, %r17 !Running_status | |
9854 | stxa %r16, [0x68]%asi !Park (W1C) | |
9855 | ldxa [0x50]%asi, %r14 !Running_rw | |
9856 | wait_for_ibp_4_77: | |
9857 | ldxa [0x58]%asi, %r17 !Running_status | |
9858 | cmp %r14, %r17 | |
9859 | bne,a %xcc, wait_for_ibp_4_77 | |
9860 | ldxa [0x50]%asi, %r14 !Running_rw | |
9861 | ibp_doit4_77: | |
9862 | best_set_reg(0x00000040d0f7e476,%r19, %r20) | |
9863 | stxa %r20, [%r18]0x42 | |
9864 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
9865 | st %g0, [%r23] !clear lock | |
9866 | wr %r0, %r12, %asi !restore %asi | |
9867 | ta T_CHANGE_NONHPRIV | |
9868 | .word 0xa3b4c493 ! 118: FCMPLE32 fcmple32 %d50, %d50, %r17 | |
9869 | .word 0x93d02033 ! 119: Tcc_I tne icc_or_xcc, %r0 + 51 | |
9870 | mondo_4_78: | |
9871 | nop | |
9872 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
9873 | ta T_CHANGE_PRIV | |
9874 | stxa %r20, [%r0+0x3c0] %asi | |
9875 | .word 0x9d940010 ! 120: WRPR_WSTATE_R wrpr %r16, %r16, %wstate | |
9876 | ibp_4_79: | |
9877 | nop | |
9878 | ta T_CHANGE_HPRIV | |
9879 | mov 8, %r18 | |
9880 | rd %asi, %r12 | |
9881 | wr %r0, 0x41, %asi | |
9882 | set sync_thr_counter4, %r23 | |
9883 | #ifndef SPC | |
9884 | ldxa [%g0]0x63, %r8 | |
9885 | and %r8, 0x38, %r8 ! Core ID | |
9886 | add %r8, %r23, %r23 | |
9887 | #else | |
9888 | mov 0, %r8 | |
9889 | #endif | |
9890 | mov 0x4, %r16 | |
9891 | ibp_startwait4_79: | |
9892 | cas [%r23],%g0,%r16 !lock | |
9893 | brz,a %r16, continue_ibp_4_79 | |
9894 | mov (~0x4&0xf), %r16 | |
9895 | ld [%r23], %r16 | |
9896 | ibp_wait4_79: | |
9897 | brnz %r16, ibp_wait4_79 | |
9898 | ld [%r23], %r16 | |
9899 | ba ibp_startwait4_79 | |
9900 | mov 0x4, %r16 | |
9901 | continue_ibp_4_79: | |
9902 | sllx %r16, %r8, %r16 !Mask for my core only | |
9903 | ldxa [0x58]%asi, %r17 !Running_status | |
9904 | wait_for_stat_4_79: | |
9905 | ldxa [0x50]%asi, %r13 !Running_rw | |
9906 | cmp %r13, %r17 | |
9907 | bne,a %xcc, wait_for_stat_4_79 | |
9908 | ldxa [0x58]%asi, %r17 !Running_status | |
9909 | stxa %r16, [0x68]%asi !Park (W1C) | |
9910 | ldxa [0x50]%asi, %r14 !Running_rw | |
9911 | wait_for_ibp_4_79: | |
9912 | ldxa [0x58]%asi, %r17 !Running_status | |
9913 | cmp %r14, %r17 | |
9914 | bne,a %xcc, wait_for_ibp_4_79 | |
9915 | ldxa [0x50]%asi, %r14 !Running_rw | |
9916 | ibp_doit4_79: | |
9917 | best_set_reg(0x00000050d6e476cd,%r19, %r20) | |
9918 | stxa %r20, [%r18]0x42 | |
9919 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
9920 | st %g0, [%r23] !clear lock | |
9921 | wr %r0, %r12, %asi !restore %asi | |
9922 | .word 0xe1bfda00 ! 121: STDFA_R stda %f16, [%r0, %r31] | |
9923 | ibp_4_80: | |
9924 | nop | |
9925 | ta T_CHANGE_HPRIV | |
9926 | mov 8, %r18 | |
9927 | rd %asi, %r12 | |
9928 | wr %r0, 0x41, %asi | |
9929 | set sync_thr_counter4, %r23 | |
9930 | #ifndef SPC | |
9931 | ldxa [%g0]0x63, %r8 | |
9932 | and %r8, 0x38, %r8 ! Core ID | |
9933 | add %r8, %r23, %r23 | |
9934 | #else | |
9935 | mov 0, %r8 | |
9936 | #endif | |
9937 | mov 0x4, %r16 | |
9938 | ibp_startwait4_80: | |
9939 | cas [%r23],%g0,%r16 !lock | |
9940 | brz,a %r16, continue_ibp_4_80 | |
9941 | mov (~0x4&0xf), %r16 | |
9942 | ld [%r23], %r16 | |
9943 | ibp_wait4_80: | |
9944 | brnz %r16, ibp_wait4_80 | |
9945 | ld [%r23], %r16 | |
9946 | ba ibp_startwait4_80 | |
9947 | mov 0x4, %r16 | |
9948 | continue_ibp_4_80: | |
9949 | sllx %r16, %r8, %r16 !Mask for my core only | |
9950 | ldxa [0x58]%asi, %r17 !Running_status | |
9951 | wait_for_stat_4_80: | |
9952 | ldxa [0x50]%asi, %r13 !Running_rw | |
9953 | cmp %r13, %r17 | |
9954 | bne,a %xcc, wait_for_stat_4_80 | |
9955 | ldxa [0x58]%asi, %r17 !Running_status | |
9956 | stxa %r16, [0x68]%asi !Park (W1C) | |
9957 | ldxa [0x50]%asi, %r14 !Running_rw | |
9958 | wait_for_ibp_4_80: | |
9959 | ldxa [0x58]%asi, %r17 !Running_status | |
9960 | cmp %r14, %r17 | |
9961 | bne,a %xcc, wait_for_ibp_4_80 | |
9962 | ldxa [0x50]%asi, %r14 !Running_rw | |
9963 | ibp_doit4_80: | |
9964 | best_set_reg(0x00000050a4f6cd3f,%r19, %r20) | |
9965 | stxa %r20, [%r18]0x42 | |
9966 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
9967 | st %g0, [%r23] !clear lock | |
9968 | wr %r0, %r12, %asi !restore %asi | |
9969 | ta T_CHANGE_NONHPRIV | |
9970 | .word 0x87acca51 ! 122: FCMPd fcmpd %fcc<n>, %f50, %f48 | |
9971 | .word 0x8d802004 ! 123: WRFPRS_I wr %r0, 0x0004, %fprs | |
9972 | splash_hpstate_4_81: | |
9973 | ta T_CHANGE_NONHPRIV | |
9974 | .word 0x24800001 ! 1: BLE ble,a <label_0x1> | |
9975 | .word 0x81983b3d ! 124: WRHPR_HPSTATE_I wrhpr %r0, 0x1b3d, %hpstate | |
9976 | ibp_4_82: | |
9977 | nop | |
9978 | ta T_CHANGE_HPRIV | |
9979 | mov 8, %r18 | |
9980 | rd %asi, %r12 | |
9981 | wr %r0, 0x41, %asi | |
9982 | set sync_thr_counter4, %r23 | |
9983 | #ifndef SPC | |
9984 | ldxa [%g0]0x63, %r8 | |
9985 | and %r8, 0x38, %r8 ! Core ID | |
9986 | add %r8, %r23, %r23 | |
9987 | #else | |
9988 | mov 0, %r8 | |
9989 | #endif | |
9990 | mov 0x4, %r16 | |
9991 | ibp_startwait4_82: | |
9992 | cas [%r23],%g0,%r16 !lock | |
9993 | brz,a %r16, continue_ibp_4_82 | |
9994 | mov (~0x4&0xf), %r16 | |
9995 | ld [%r23], %r16 | |
9996 | ibp_wait4_82: | |
9997 | brnz %r16, ibp_wait4_82 | |
9998 | ld [%r23], %r16 | |
9999 | ba ibp_startwait4_82 | |
10000 | mov 0x4, %r16 | |
10001 | continue_ibp_4_82: | |
10002 | sllx %r16, %r8, %r16 !Mask for my core only | |
10003 | ldxa [0x58]%asi, %r17 !Running_status | |
10004 | wait_for_stat_4_82: | |
10005 | ldxa [0x50]%asi, %r13 !Running_rw | |
10006 | cmp %r13, %r17 | |
10007 | bne,a %xcc, wait_for_stat_4_82 | |
10008 | ldxa [0x58]%asi, %r17 !Running_status | |
10009 | stxa %r16, [0x68]%asi !Park (W1C) | |
10010 | ldxa [0x50]%asi, %r14 !Running_rw | |
10011 | wait_for_ibp_4_82: | |
10012 | ldxa [0x58]%asi, %r17 !Running_status | |
10013 | cmp %r14, %r17 | |
10014 | bne,a %xcc, wait_for_ibp_4_82 | |
10015 | ldxa [0x50]%asi, %r14 !Running_rw | |
10016 | ibp_doit4_82: | |
10017 | best_set_reg(0x00000040becd3f62,%r19, %r20) | |
10018 | stxa %r20, [%r18]0x42 | |
10019 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
10020 | st %g0, [%r23] !clear lock | |
10021 | wr %r0, %r12, %asi !restore %asi | |
10022 | ta T_CHANGE_NONHPRIV | |
10023 | .word 0xd13fc012 ! 125: STDF_R std %f8, [%r18, %r31] | |
10024 | nop | |
10025 | ta T_CHANGE_HPRIV ! macro | |
10026 | donret_4_83: | |
10027 | rd %pc, %r12 | |
10028 | add %r12, (donretarg_4_83-donret_4_83+4), %r12 | |
10029 | add %r12, 0x4, %r11 ! seq tnpc | |
10030 | wrpr %g0, 0x1, %tl | |
10031 | wrpr %g0, %r12, %tpc | |
10032 | wrpr %g0, %r11, %tnpc | |
10033 | set (0x000c9200 | (0x58 << 24)), %r13 | |
10034 | and %r12, 0xfff, %r14 | |
10035 | sllx %r14, 30, %r14 | |
10036 | or %r13, %r14, %r20 | |
10037 | wrpr %r20, %g0, %tstate | |
10038 | wrhpr %g0, 0x8e5, %htstate | |
10039 | ta T_CHANGE_NONHPRIV ! rand=1 (4) | |
10040 | .word 0x25400001 ! 1: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
10041 | done | |
10042 | donretarg_4_83: | |
10043 | .word 0x23400001 ! 126: FBPNE fbne,a,pn %fcc0, <label_0x1> | |
10044 | .word 0xd09fc02a ! 127: LDDA_R ldda [%r31, %r10] 0x01, %r8 | |
10045 | nop | |
10046 | mov 0x80, %g3 | |
10047 | stxa %g3, [%g3] 0x5f | |
10048 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
10049 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
10050 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 | |
10051 | .word 0xd05fc000 ! 128: LDX_R ldx [%r31 + %r0], %r8 | |
10052 | .word 0x24800001 ! 129: BLE ble,a <label_0x1> | |
10053 | memptr_4_85: | |
10054 | set 0x60340000, %r31 | |
10055 | .word 0x85842477 ! 130: WRCCR_I wr %r16, 0x0477, %ccr | |
10056 | .word 0x22800001 ! 131: BE be,a <label_0x1> | |
10057 | ibp_4_86: | |
10058 | nop | |
10059 | ta T_CHANGE_HPRIV | |
10060 | mov 8, %r18 | |
10061 | rd %asi, %r12 | |
10062 | wr %r0, 0x41, %asi | |
10063 | set sync_thr_counter4, %r23 | |
10064 | #ifndef SPC | |
10065 | ldxa [%g0]0x63, %r8 | |
10066 | and %r8, 0x38, %r8 ! Core ID | |
10067 | add %r8, %r23, %r23 | |
10068 | #else | |
10069 | mov 0, %r8 | |
10070 | #endif | |
10071 | mov 0x4, %r16 | |
10072 | ibp_startwait4_86: | |
10073 | cas [%r23],%g0,%r16 !lock | |
10074 | brz,a %r16, continue_ibp_4_86 | |
10075 | mov (~0x4&0xf), %r16 | |
10076 | ld [%r23], %r16 | |
10077 | ibp_wait4_86: | |
10078 | brnz %r16, ibp_wait4_86 | |
10079 | ld [%r23], %r16 | |
10080 | ba ibp_startwait4_86 | |
10081 | mov 0x4, %r16 | |
10082 | continue_ibp_4_86: | |
10083 | sllx %r16, %r8, %r16 !Mask for my core only | |
10084 | ldxa [0x58]%asi, %r17 !Running_status | |
10085 | wait_for_stat_4_86: | |
10086 | ldxa [0x50]%asi, %r13 !Running_rw | |
10087 | cmp %r13, %r17 | |
10088 | bne,a %xcc, wait_for_stat_4_86 | |
10089 | ldxa [0x58]%asi, %r17 !Running_status | |
10090 | stxa %r16, [0x68]%asi !Park (W1C) | |
10091 | ldxa [0x50]%asi, %r14 !Running_rw | |
10092 | wait_for_ibp_4_86: | |
10093 | ldxa [0x58]%asi, %r17 !Running_status | |
10094 | cmp %r14, %r17 | |
10095 | bne,a %xcc, wait_for_ibp_4_86 | |
10096 | ldxa [0x50]%asi, %r14 !Running_rw | |
10097 | ibp_doit4_86: | |
10098 | best_set_reg(0x00000040e5ff62fd,%r19, %r20) | |
10099 | stxa %r20, [%r18]0x42 | |
10100 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
10101 | st %g0, [%r23] !clear lock | |
10102 | wr %r0, %r12, %asi !restore %asi | |
10103 | .word 0xc1bfd920 ! 132: STDFA_R stda %f0, [%r0, %r31] | |
10104 | .word 0xa5a0016a ! 133: FABSq dis not found | |
10105 | ||
10106 | .word 0xdad7e1e8 ! 134: LDSHA_I ldsha [%r31, + 0x01e8] %asi, %r13 | |
10107 | brgez,pt %r11, skip_4_88 | |
10108 | brz,a,pn %r2, skip_4_88 | |
10109 | .align 1024 | |
10110 | skip_4_88: | |
10111 | .word 0x39400001 ! 135: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
10112 | fpinit_4_89: | |
10113 | nop | |
10114 | setx fp_data_quads, %r19, %r20 | |
10115 | ldd [%r20], %f0 | |
10116 | ldd [%r20+8], %f4 | |
10117 | ld [%r20+16], %fsr | |
10118 | ld [%r20+24], %r19 | |
10119 | wr %r19, %g0, %gsr | |
10120 | .word 0x8da009a4 ! 136: FDIVs fdivs %f0, %f4, %f6 | |
10121 | br_badelay2_4_90: | |
10122 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
10123 | allclean | |
10124 | .word 0xa9b14312 ! 137: ALIGNADDRESS alignaddr %r5, %r18, %r20 | |
10125 | .word 0xe137e16c ! 138: STQF_I - %f16, [0x016c, %r31] | |
10126 | fpinit_4_91: | |
10127 | nop | |
10128 | setx fp_data_quads, %r19, %r20 | |
10129 | ldd [%r20], %f0 | |
10130 | ldd [%r20+8], %f4 | |
10131 | ld [%r20+16], %fsr | |
10132 | ld [%r20+24], %r19 | |
10133 | wr %r19, %g0, %gsr | |
10134 | .word 0xc3e8273e ! 139: PREFETCHA_I prefetcha [%r0, + 0x073e] %asi, #one_read | |
10135 | .word 0x33400001 ! 1: FBPE fbe,a,pn %fcc0, <label_0x1> | |
10136 | .word 0x8d903591 ! 140: WRPR_PSTATE_I wrpr %r0, 0x1591, %pstate | |
10137 | ibp_4_93: | |
10138 | nop | |
10139 | ta T_CHANGE_HPRIV | |
10140 | mov 8, %r18 | |
10141 | rd %asi, %r12 | |
10142 | wr %r0, 0x41, %asi | |
10143 | set sync_thr_counter4, %r23 | |
10144 | #ifndef SPC | |
10145 | ldxa [%g0]0x63, %r8 | |
10146 | and %r8, 0x38, %r8 ! Core ID | |
10147 | add %r8, %r23, %r23 | |
10148 | #else | |
10149 | mov 0, %r8 | |
10150 | #endif | |
10151 | mov 0x4, %r16 | |
10152 | ibp_startwait4_93: | |
10153 | cas [%r23],%g0,%r16 !lock | |
10154 | brz,a %r16, continue_ibp_4_93 | |
10155 | mov (~0x4&0xf), %r16 | |
10156 | ld [%r23], %r16 | |
10157 | ibp_wait4_93: | |
10158 | brnz %r16, ibp_wait4_93 | |
10159 | ld [%r23], %r16 | |
10160 | ba ibp_startwait4_93 | |
10161 | mov 0x4, %r16 | |
10162 | continue_ibp_4_93: | |
10163 | sllx %r16, %r8, %r16 !Mask for my core only | |
10164 | ldxa [0x58]%asi, %r17 !Running_status | |
10165 | wait_for_stat_4_93: | |
10166 | ldxa [0x50]%asi, %r13 !Running_rw | |
10167 | cmp %r13, %r17 | |
10168 | bne,a %xcc, wait_for_stat_4_93 | |
10169 | ldxa [0x58]%asi, %r17 !Running_status | |
10170 | stxa %r16, [0x68]%asi !Park (W1C) | |
10171 | ldxa [0x50]%asi, %r14 !Running_rw | |
10172 | wait_for_ibp_4_93: | |
10173 | ldxa [0x58]%asi, %r17 !Running_status | |
10174 | cmp %r14, %r17 | |
10175 | bne,a %xcc, wait_for_ibp_4_93 | |
10176 | ldxa [0x50]%asi, %r14 !Running_rw | |
10177 | ibp_doit4_93: | |
10178 | best_set_reg(0x000000503ee2fdf4,%r19, %r20) | |
10179 | stxa %r20, [%r18]0x42 | |
10180 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
10181 | st %g0, [%r23] !clear lock | |
10182 | wr %r0, %r12, %asi !restore %asi | |
10183 | .word 0xa570394d ! 141: POPC_I popc 0x194d, %r18 | |
10184 | .word 0xa9a000d2 ! 142: FNEGd fnegd %f18, %f20 | |
10185 | set 0x3309, %l3 | |
10186 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT | |
10187 | .word 0xa1b487c6 ! 143: PDIST pdistn %d18, %d6, %d16 | |
10188 | invalw | |
10189 | mov 0xb1, %r30 | |
10190 | .word 0x91d0001e ! 144: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
10191 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl | |
10192 | reduce_priv_lvl_4_94: | |
10193 | ta T_CHANGE_NONPRIV ! macro | |
10194 | memptr_4_95: | |
10195 | set 0x60540000, %r31 | |
10196 | .word 0x8584ec62 ! 146: WRCCR_I wr %r19, 0x0c62, %ccr | |
10197 | dvapa_4_96: | |
10198 | nop | |
10199 | ta T_CHANGE_HPRIV | |
10200 | mov 0xc12, %r20 | |
10201 | mov 0x1c, %r19 | |
10202 | sllx %r20, 23, %r20 | |
10203 | or %r19, %r20, %r19 | |
10204 | stxa %r19, [%g0] ASI_LSU_CONTROL | |
10205 | mov 0x38, %r18 | |
10206 | stxa %r31, [%r18]0x58 | |
10207 | ta T_CHANGE_NONHPRIV | |
10208 | .word 0xe6bfc029 ! 147: STDA_R stda %r19, [%r31 + %r9] 0x01 | |
10209 | .word 0xa780c011 ! 148: WR_GRAPHICS_STATUS_REG_R wr %r3, %r17, %- | |
10210 | .word 0xe637e132 ! 149: STH_I sth %r19, [%r31 + 0x0132] | |
10211 | #if (defined SPC || defined CMP1) | |
10212 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_98) + 8, 16, 16)) -> intp(4,0,3) | |
10213 | #else | |
10214 | setx 0x6ba502414ded985a, %r1, %r28 | |
10215 | stxa %r28, [%g0] 0x73 | |
10216 | #endif | |
10217 | intvec_4_98: | |
10218 | .word 0x39400001 ! 150: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
10219 | intveclr_4_99: | |
10220 | nop | |
10221 | ta T_CHANGE_HPRIV | |
10222 | setx 0x85b7a9dd4d6ba59a, %r1, %r28 | |
10223 | stxa %r28, [%g0] 0x72 | |
10224 | ta T_CHANGE_NONHPRIV | |
10225 | .word 0x25400001 ! 151: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
10226 | .word 0xe6800b80 ! 152: LDUWA_R lduwa [%r0, %r0] 0x5c, %r19 | |
10227 | .word 0xe62fe0ca ! 153: STB_I stb %r19, [%r31 + 0x00ca] | |
10228 | mondo_4_100: | |
10229 | nop | |
10230 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
10231 | stxa %r19, [%r0+0x3e8] %asi | |
10232 | .word 0x9d94c010 ! 154: WRPR_WSTATE_R wrpr %r19, %r16, %wstate | |
10233 | .word 0x9550c000 ! 155: RDPR_TT <illegal instruction> | |
10234 | .word 0x3a800001 ! 156: BCC bcc,a <label_0x1> | |
10235 | brcommon2_4_101: | |
10236 | nop | |
10237 | setx common_target, %r12, %r27 | |
10238 | ba,a .+12 | |
10239 | .word 0x91b7c70a ! 1: FMULD8SUx16 fmuld8ulx16 %f31, %f10, %d8 | |
10240 | ba,a .+8 | |
10241 | jmpl %r27+0, %r27 | |
10242 | .word 0xe1bfe040 ! 157: STDFA_I stda %f16, [0x0040, %r31] | |
10243 | tagged_4_102: | |
10244 | tsubcctv %r16, 0x1543, %r9 | |
10245 | .word 0xd407e08c ! 158: LDUW_I lduw [%r31 + 0x008c], %r10 | |
10246 | splash_cmpr_4_103: | |
10247 | mov 1, %r18 | |
10248 | sllx %r18, 63, %r18 | |
10249 | rd %tick, %r17 | |
10250 | add %r17, 0x80, %r17 | |
10251 | or %r17, %r18, %r17 | |
10252 | .word 0xb3800011 ! 159: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
10253 | .word 0xd5e7c031 ! 160: CASA_I casa [%r31] 0x 1, %r17, %r10 | |
10254 | br_longdelay2_4_104: | |
10255 | .word 0x26c88001 ! 1: BRLZ brlz,a,pt %r2,<label_0x88001> | |
10256 | .word 0x95b7c4c9 ! 161: FCMPNE32 fcmpne32 %d62, %d40, %r10 | |
10257 | nop | |
10258 | ta T_CHANGE_HPRIV | |
10259 | mov 0x4+1, %r10 | |
10260 | set sync_thr_counter5, %r23 | |
10261 | #ifndef SPC | |
10262 | ldxa [%g0]0x63, %o1 | |
10263 | and %o1, 0x38, %o1 | |
10264 | add %o1, %r23, %r23 | |
10265 | sllx %o1, 5, %o3 !(CID*256) | |
10266 | #endif | |
10267 | cas [%r23],%g0,%r10 !lock | |
10268 | brnz %r10, cwq_4_105 | |
10269 | rd %asi, %r12 | |
10270 | wr %g0, 0x40, %asi | |
10271 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
10272 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
10273 | cmp %l1, 1 | |
10274 | bne cwq_4_105 | |
10275 | set CWQ_BASE, %l6 | |
10276 | #ifndef SPC | |
10277 | add %l6, %o3, %l6 | |
10278 | #endif | |
10279 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
10280 | best_set_reg(0x20610050, %l1, %l2) !# Control Word | |
10281 | sllx %l2, 32, %l2 | |
10282 | stx %l2, [%l6 + 0x0] | |
10283 | membar #Sync | |
10284 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
10285 | sub %l2, 0x40, %l2 | |
10286 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
10287 | wr %r12, %g0, %asi | |
10288 | st %g0, [%r23] | |
10289 | cwq_4_105: | |
10290 | ta T_CHANGE_NONHPRIV | |
10291 | .word 0x99414000 ! 162: RDPC rd %pc, %r12 | |
10292 | splash_hpstate_4_106: | |
10293 | ta T_CHANGE_NONHPRIV | |
10294 | .word 0x38800001 ! 1: BGU bgu,a <label_0x1> | |
10295 | .word 0x81982d4d ! 163: WRHPR_HPSTATE_I wrhpr %r0, 0x0d4d, %hpstate | |
10296 | trapasi_4_107: | |
10297 | nop | |
10298 | mov 0x0, %r1 ! (VA for ASI 0x5a) | |
10299 | .word 0xd4884b40 ! 164: LDUBA_R lduba [%r1, %r0] 0x5a, %r10 | |
10300 | .word 0xe1bfe040 ! 165: STDFA_I stda %f16, [0x0040, %r31] | |
10301 | splash_hpstate_4_108: | |
10302 | ta T_CHANGE_NONHPRIV | |
10303 | .word 0x8198358f ! 166: WRHPR_HPSTATE_I wrhpr %r0, 0x158f, %hpstate | |
10304 | otherw | |
10305 | mov 0xb4, %r30 | |
10306 | .word 0x93d0001e ! 167: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
10307 | .word 0x8d802000 ! 168: WRFPRS_I wr %r0, 0x0000, %fprs | |
10308 | .word 0xd43fe1c8 ! 169: STD_I std %r10, [%r31 + 0x01c8] | |
10309 | jmptr_4_109: | |
10310 | nop | |
10311 | best_set_reg(0xe0200000, %r20, %r27) | |
10312 | .word 0xb7c6c000 ! 170: JMPL_R jmpl %r27 + %r0, %r27 | |
10313 | jmptr_4_110: | |
10314 | nop | |
10315 | best_set_reg(0xe0200000, %r20, %r27) | |
10316 | .word 0xb7c6c000 ! 171: JMPL_R jmpl %r27 + %r0, %r27 | |
10317 | nop | |
10318 | mov 0x80, %g3 | |
10319 | stxa %g3, [%g3] 0x57 | |
10320 | .word 0xd45fc000 ! 172: LDX_R ldx [%r31 + %r0], %r10 | |
10321 | .word 0xc1bfdb60 ! 173: STDFA_R stda %f0, [%r0, %r31] | |
10322 | .word 0xd51fe0c8 ! 174: LDDF_I ldd [%r31, 0x00c8], %f10 | |
10323 | .word 0xd44fe1d8 ! 175: LDSB_I ldsb [%r31 + 0x01d8], %r10 | |
10324 | .word 0x91930011 ! 176: WRPR_PIL_R wrpr %r12, %r17, %pil | |
10325 | trapasi_4_113: | |
10326 | nop | |
10327 | mov 0x10, %r1 ! (VA for ASI 0x4c) | |
10328 | .word 0xd4c04980 ! 177: LDSWA_R ldswa [%r1, %r0] 0x4c, %r10 | |
10329 | intveclr_4_114: | |
10330 | nop | |
10331 | ta T_CHANGE_HPRIV | |
10332 | setx 0x095dec9c3a4abbf3, %r1, %r28 | |
10333 | stxa %r28, [%g0] 0x72 | |
10334 | ta T_CHANGE_NONHPRIV | |
10335 | .word 0x25400001 ! 178: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
10336 | ibp_4_115: | |
10337 | nop | |
10338 | ta T_CHANGE_HPRIV | |
10339 | mov 8, %r18 | |
10340 | rd %asi, %r12 | |
10341 | wr %r0, 0x41, %asi | |
10342 | set sync_thr_counter4, %r23 | |
10343 | #ifndef SPC | |
10344 | ldxa [%g0]0x63, %r8 | |
10345 | and %r8, 0x38, %r8 ! Core ID | |
10346 | add %r8, %r23, %r23 | |
10347 | #else | |
10348 | mov 0, %r8 | |
10349 | #endif | |
10350 | mov 0x4, %r16 | |
10351 | ibp_startwait4_115: | |
10352 | cas [%r23],%g0,%r16 !lock | |
10353 | brz,a %r16, continue_ibp_4_115 | |
10354 | mov (~0x4&0xf), %r16 | |
10355 | ld [%r23], %r16 | |
10356 | ibp_wait4_115: | |
10357 | brnz %r16, ibp_wait4_115 | |
10358 | ld [%r23], %r16 | |
10359 | ba ibp_startwait4_115 | |
10360 | mov 0x4, %r16 | |
10361 | continue_ibp_4_115: | |
10362 | sllx %r16, %r8, %r16 !Mask for my core only | |
10363 | ldxa [0x58]%asi, %r17 !Running_status | |
10364 | wait_for_stat_4_115: | |
10365 | ldxa [0x50]%asi, %r13 !Running_rw | |
10366 | cmp %r13, %r17 | |
10367 | bne,a %xcc, wait_for_stat_4_115 | |
10368 | ldxa [0x58]%asi, %r17 !Running_status | |
10369 | stxa %r16, [0x68]%asi !Park (W1C) | |
10370 | ldxa [0x50]%asi, %r14 !Running_rw | |
10371 | wait_for_ibp_4_115: | |
10372 | ldxa [0x58]%asi, %r17 !Running_status | |
10373 | cmp %r14, %r17 | |
10374 | bne,a %xcc, wait_for_ibp_4_115 | |
10375 | ldxa [0x50]%asi, %r14 !Running_rw | |
10376 | ibp_doit4_115: | |
10377 | best_set_reg(0x00000050b8fdf4b9,%r19, %r20) | |
10378 | stxa %r20, [%r18]0x42 | |
10379 | stxa %r16, [0x60] %asi !Unpark (W1S) | |
10380 | st %g0, [%r23] !clear lock | |
10381 | wr %r0, %r12, %asi !restore %asi | |
10382 | .word 0xc19fdf20 ! 179: LDDFA_R ldda [%r31, %r0], %f0 | |
10383 | .word 0xc30fc000 ! 180: LDXFSR_R ld-fsr [%r31, %r0], %f1 | |
10384 | nop | |
10385 | ta T_CHANGE_HPRIV | |
10386 | mov 0x4+1, %r10 | |
10387 | set sync_thr_counter5, %r23 | |
10388 | #ifndef SPC | |
10389 | ldxa [%g0]0x63, %o1 | |
10390 | and %o1, 0x38, %o1 | |
10391 | add %o1, %r23, %r23 | |
10392 | sllx %o1, 5, %o3 !(CID*256) | |
10393 | #endif | |
10394 | cas [%r23],%g0,%r10 !lock | |
10395 | brnz %r10, cwq_4_116 | |
10396 | rd %asi, %r12 | |
10397 | wr %g0, 0x40, %asi | |
10398 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
10399 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
10400 | cmp %l1, 1 | |
10401 | bne cwq_4_116 | |
10402 | set CWQ_BASE, %l6 | |
10403 | #ifndef SPC | |
10404 | add %l6, %o3, %l6 | |
10405 | #endif | |
10406 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
10407 | best_set_reg(0x206100b0, %l1, %l2) !# Control Word | |
10408 | sllx %l2, 32, %l2 | |
10409 | stx %l2, [%l6 + 0x0] | |
10410 | membar #Sync | |
10411 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
10412 | sub %l2, 0x40, %l2 | |
10413 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
10414 | wr %r12, %g0, %asi | |
10415 | st %g0, [%r23] | |
10416 | cwq_4_116: | |
10417 | ta T_CHANGE_NONHPRIV | |
10418 | .word 0xa3414000 ! 181: RDPC rd %pc, %r17 | |
10419 | splash_cmpr_4_117: | |
10420 | mov 0, %r18 | |
10421 | sllx %r18, 63, %r18 | |
10422 | rd %tick, %r17 | |
10423 | add %r17, 0x60, %r17 | |
10424 | or %r17, %r18, %r17 | |
10425 | ta T_CHANGE_PRIV | |
10426 | .word 0xb3800011 ! 182: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
10427 | intveclr_4_118: | |
10428 | nop | |
10429 | ta T_CHANGE_HPRIV | |
10430 | setx 0xf328ca06fab28c5e, %r1, %r28 | |
10431 | stxa %r28, [%g0] 0x72 | |
10432 | .word 0x25400001 ! 183: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
10433 | .word 0xe0dfe170 ! 184: LDXA_I ldxa [%r31, + 0x0170] %asi, %r16 | |
10434 | intveclr_4_119: | |
10435 | nop | |
10436 | ta T_CHANGE_HPRIV | |
10437 | setx 0xc3695fcfd4e2f50e, %r1, %r28 | |
10438 | stxa %r28, [%g0] 0x72 | |
10439 | .word 0x25400001 ! 185: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
10440 | #if (defined SPC || defined CMP1) | |
10441 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_120) + 24, 16, 16)) -> intp(0,0,21) | |
10442 | #else | |
10443 | setx 0xd546744c3377672d, %r1, %r28 | |
10444 | stxa %r28, [%g0] 0x73 | |
10445 | #endif | |
10446 | intvec_4_120: | |
10447 | .word 0x39400001 ! 186: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
10448 | set 0x23d7, %l3 | |
10449 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT | |
10450 | .word 0xa3b407c7 ! 187: PDIST pdistn %d16, %d38, %d48 | |
10451 | otherw | |
10452 | mov 0xb2, %r30 | |
10453 | .word 0x91d0001e ! 188: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
10454 | .word 0xa7844006 ! 189: WR_GRAPHICS_STATUS_REG_R wr %r17, %r6, %- | |
10455 | .word 0xda97e158 ! 190: LDUHA_I lduha [%r31, + 0x0158] %asi, %r13 | |
10456 | .word 0x879c2573 ! 191: WRHPR_HINTP_I wrhpr %r16, 0x0573, %hintp | |
10457 | .word 0x83d020b4 ! 192: Tcc_I te icc_or_xcc, %r0 + 180 | |
10458 | .word 0xa7810006 ! 193: WR_GRAPHICS_STATUS_REG_R wr %r4, %r6, %- | |
10459 | dvapa_4_123: | |
10460 | nop | |
10461 | ta T_CHANGE_HPRIV | |
10462 | mov 0xed8, %r20 | |
10463 | mov 0x1c, %r19 | |
10464 | sllx %r20, 23, %r20 | |
10465 | or %r19, %r20, %r19 | |
10466 | stxa %r19, [%g0] ASI_LSU_CONTROL | |
10467 | mov 0x38, %r18 | |
10468 | stxa %r31, [%r18]0x58 | |
10469 | ta T_CHANGE_NONHPRIV | |
10470 | .word 0x97b18481 ! 194: FCMPLE32 fcmple32 %d6, %d32, %r11 | |
10471 | brcommon3_4_124: | |
10472 | nop | |
10473 | setx common_target, %r12, %r27 | |
10474 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
10475 | ba,a .+12 | |
10476 | .word 0xd3e7c030 ! 1: CASA_I casa [%r31] 0x 1, %r16, %r9 | |
10477 | ba,a .+8 | |
10478 | jmpl %r27+0, %r27 | |
10479 | .word 0xd33fc014 ! 195: STDF_R std %f9, [%r20, %r31] | |
10480 | .word 0xc30fc000 ! 196: LDXFSR_R ld-fsr [%r31, %r0], %f1 | |
10481 | dvapa_4_125: | |
10482 | nop | |
10483 | ta T_CHANGE_HPRIV | |
10484 | mov 0x873, %r20 | |
10485 | mov 0x11, %r19 | |
10486 | sllx %r20, 23, %r20 | |
10487 | or %r19, %r20, %r19 | |
10488 | stxa %r19, [%g0] ASI_LSU_CONTROL | |
10489 | mov 0x38, %r18 | |
10490 | stxa %r31, [%r18]0x58 | |
10491 | ta T_CHANGE_NONHPRIV | |
10492 | .word 0x87a90a46 ! 197: FCMPd fcmpd %fcc<n>, %f4, %f6 | |
10493 | memptr_4_126: | |
10494 | set user_data_start, %r31 | |
10495 | .word 0x8580bf35 ! 198: WRCCR_I wr %r2, 0x1f35, %ccr | |
10496 | .word 0xc19fdb60 ! 199: LDDFA_R ldda [%r31, %r0], %f0 | |
10497 | trapasi_4_128: | |
10498 | nop | |
10499 | mov 0x0, %r1 ! (VA for ASI 0x73) | |
10500 | .word 0xe0d84e60 ! 200: LDXA_R ldxa [%r1, %r0] 0x73, %r16 | |
10501 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
10502 | reduce_priv_lvl_4_129: | |
10503 | ta T_CHANGE_NONHPRIV ! macro | |
10504 | nop | |
10505 | nop | |
10506 | ta T_CHANGE_PRIV | |
10507 | wrpr %g0, %g0, %gl | |
10508 | nop | |
10509 | nop | |
10510 | setx join_lbl_0_0, %g1, %g2 | |
10511 | jmp %g2 | |
10512 | nop | |
10513 | fork_lbl_0_2: | |
10514 | ta T_CHANGE_NONHPRIV | |
10515 | .word 0xe08008a0 ! 1: LDUWA_R lduwa [%r0, %r0] 0x45, %r16 | |
10516 | .word 0xe19fde00 ! 2: LDDFA_R ldda [%r31, %r0], %f16 | |
10517 | .word 0xe08008a0 ! 3: LDUWA_R lduwa [%r0, %r0] 0x45, %r16 | |
10518 | .word 0x89800011 ! 4: WRTICK_R wr %r0, %r17, %tick | |
10519 | .word 0x8d802000 ! 5: WRFPRS_I wr %r0, 0x0000, %fprs | |
10520 | .word 0x21400001 ! 1: FBPN fbn,a,pn %fcc0, <label_0x1> | |
10521 | .word 0x8d9031ef ! 6: WRPR_PSTATE_I wrpr %r0, 0x11ef, %pstate | |
10522 | .word 0xe0bfc020 ! 7: STDA_R stda %r16, [%r31 + %r0] 0x01 | |
10523 | #if (defined SPC || defined CMP1) | |
10524 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_2) + 48, 16, 16)) -> intp(6,0,27) | |
10525 | #else | |
10526 | setx 0x70fc39ac9a3a3da7, %r1, %r28 | |
10527 | stxa %r28, [%g0] 0x73 | |
10528 | #endif | |
10529 | intvec_2_2: | |
10530 | .word 0x39400001 ! 8: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
10531 | .word 0xc32fc000 ! 9: STXFSR_R st-sfr %f1, [%r0, %r31] | |
10532 | splash_lsu_2_3: | |
10533 | nop | |
10534 | ta T_CHANGE_HPRIV | |
10535 | set 0xaa472341, %r2 | |
10536 | mov 0x3, %r1 | |
10537 | sllx %r1, 32, %r1 | |
10538 | or %r1, %r2, %r2 | |
10539 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
10540 | ta T_CHANGE_NONHPRIV | |
10541 | .word 0x3d400001 ! 10: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
10542 | .word 0x2a780001 ! 11: BPCS <illegal instruction> | |
10543 | splash_decr_2_4: | |
10544 | nop | |
10545 | ta T_CHANGE_HPRIV | |
10546 | mov 8, %r1 | |
10547 | stxa %r16, [%r1] 0x45 | |
10548 | .word 0xa7850001 ! 12: WR_GRAPHICS_STATUS_REG_R wr %r20, %r1, %- | |
10549 | fpinit_2_5: | |
10550 | nop | |
10551 | setx fp_data_quads, %r19, %r20 | |
10552 | ldd [%r20], %f0 | |
10553 | ldd [%r20+8], %f4 | |
10554 | ld [%r20+16], %fsr | |
10555 | ld [%r20+24], %r19 | |
10556 | wr %r19, %g0, %gsr | |
10557 | .word 0x89a009a4 ! 13: FDIVs fdivs %f0, %f4, %f4 | |
10558 | invalw | |
10559 | mov 0xb1, %r30 | |
10560 | .word 0x93d0001e ! 14: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
10561 | .word 0x879b4012 ! 15: WRHPR_HINTP_R wrhpr %r13, %r18, %hintp | |
10562 | .word 0x977020fa ! 16: POPC_I popc 0x00fa, %r11 | |
10563 | .word 0x87802058 ! 17: WRASI_I wr %r0, 0x0058, %asi | |
10564 | .word 0x95702c74 ! 18: POPC_I popc 0x0c74, %r10 | |
10565 | .word 0xa1a00170 ! 19: FABSq dis not found | |
10566 | ||
10567 | .word 0xe49fe178 ! 20: LDDA_I ldda [%r31, + 0x0178] %asi, %r18 | |
10568 | .word 0xe44fe0b8 ! 21: LDSB_I ldsb [%r31 + 0x00b8], %r18 | |
10569 | memptr_2_8: | |
10570 | set 0x60140000, %r31 | |
10571 | .word 0x8580b6ec ! 22: WRCCR_I wr %r2, 0x16ec, %ccr | |
10572 | splash_tba_2_9: | |
10573 | nop | |
10574 | ta T_CHANGE_PRIV | |
10575 | setx 0x00000004003a0000, %r11, %r12 | |
10576 | .word 0x8b90000c ! 23: WRPR_TBA_R wrpr %r0, %r12, %tba | |
10577 | nop | |
10578 | ta T_CHANGE_HPRIV | |
10579 | mov 0x2+1, %r10 | |
10580 | set sync_thr_counter5, %r23 | |
10581 | #ifndef SPC | |
10582 | ldxa [%g0]0x63, %o1 | |
10583 | and %o1, 0x38, %o1 | |
10584 | add %o1, %r23, %r23 | |
10585 | sllx %o1, 5, %o3 !(CID*256) | |
10586 | #endif | |
10587 | cas [%r23],%g0,%r10 !lock | |
10588 | brnz %r10, cwq_2_10 | |
10589 | rd %asi, %r12 | |
10590 | wr %g0, 0x40, %asi | |
10591 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
10592 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
10593 | cmp %l1, 1 | |
10594 | bne cwq_2_10 | |
10595 | set CWQ_BASE, %l6 | |
10596 | #ifndef SPC | |
10597 | add %l6, %o3, %l6 | |
10598 | #endif | |
10599 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
10600 | best_set_reg(0x20610080, %l1, %l2) !# Control Word | |
10601 | sllx %l2, 32, %l2 | |
10602 | stx %l2, [%l6 + 0x0] | |
10603 | membar #Sync | |
10604 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
10605 | sub %l2, 0x40, %l2 | |
10606 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
10607 | wr %r12, %g0, %asi | |
10608 | st %g0, [%r23] | |
10609 | cwq_2_10: | |
10610 | ta T_CHANGE_NONHPRIV | |
10611 | .word 0xa1414000 ! 24: RDPC rd %pc, %r16 | |
10612 | .word 0x8d903639 ! 25: WRPR_PSTATE_I wrpr %r0, 0x1639, %pstate | |
10613 | brcommon1_2_12: | |
10614 | nop | |
10615 | setx common_target, %r12, %r27 | |
10616 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
10617 | ba,a .+12 | |
10618 | .word 0xa1702160 ! 1: POPC_I popc 0x0160, %r16 | |
10619 | ba,a .+8 | |
10620 | jmpl %r27+0, %r27 | |
10621 | .word 0x9170302d ! 26: POPC_I popc 0x102d, %r8 | |
10622 | intveclr_2_13: | |
10623 | nop | |
10624 | ta T_CHANGE_HPRIV | |
10625 | setx 0x1c3063cbafe5e15d, %r1, %r28 | |
10626 | stxa %r28, [%g0] 0x72 | |
10627 | ta T_CHANGE_NONHPRIV | |
10628 | .word 0x25400001 ! 27: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
10629 | splash_lsu_2_14: | |
10630 | nop | |
10631 | ta T_CHANGE_HPRIV | |
10632 | set 0x6feba5a1, %r2 | |
10633 | mov 0x4, %r1 | |
10634 | sllx %r1, 32, %r1 | |
10635 | or %r1, %r2, %r2 | |
10636 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
10637 | ta T_CHANGE_NONHPRIV | |
10638 | .word 0x3d400001 ! 28: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
10639 | splash_cmpr_2_15: | |
10640 | mov 0, %r18 | |
10641 | sllx %r18, 63, %r18 | |
10642 | rd %tick, %r17 | |
10643 | add %r17, 0x70, %r17 | |
10644 | or %r17, %r18, %r17 | |
10645 | ta T_CHANGE_HPRIV | |
10646 | wrhpr %r17, %g0, %hsys_tick_cmpr | |
10647 | .word 0xb3800011 ! 29: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
10648 | brcommon1_2_16: | |
10649 | nop | |
10650 | setx common_target, %r12, %r27 | |
10651 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
10652 | ba,a .+12 | |
10653 | .word 0xa9b7c7c9 ! 1: PDIST pdistn %d62, %d40, %d20 | |
10654 | ba,a .+8 | |
10655 | jmpl %r27+0, %r27 | |
10656 | .word 0x9f802c3e ! 30: SIR sir 0x0c3e | |
10657 | .word 0xd03fc000 ! 31: STD_R std %r8, [%r31 + %r0] | |
10658 | splash_tba_2_17: | |
10659 | nop | |
10660 | ta T_CHANGE_PRIV | |
10661 | setx 0x00000004003a0000, %r11, %r12 | |
10662 | .word 0x8b90000c ! 32: WRPR_TBA_R wrpr %r0, %r12, %tba | |
10663 | ibp_2_18: | |
10664 | nop | |
10665 | .word 0x9f8020d0 ! 33: SIR sir 0x00d0 | |
10666 | .word 0xd127c000 ! 34: STF_R st %f8, [%r0, %r31] | |
10667 | .word 0xd0c7e1c0 ! 35: LDSWA_I ldswa [%r31, + 0x01c0] %asi, %r8 | |
10668 | ibp_2_19: | |
10669 | nop | |
10670 | .word 0xd097c028 ! 36: LDUHA_R lduha [%r31, %r8] 0x01, %r8 | |
10671 | splash_cmpr_2_20: | |
10672 | mov 0, %r18 | |
10673 | sllx %r18, 63, %r18 | |
10674 | rd %tick, %r17 | |
10675 | add %r17, 0x60, %r17 | |
10676 | or %r17, %r18, %r17 | |
10677 | .word 0xb3800011 ! 37: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
10678 | .word 0xc19fe020 ! 38: LDDFA_I ldda [%r31, 0x0020], %f0 | |
10679 | nop | |
10680 | ta T_CHANGE_HPRIV | |
10681 | mov 0x2+1, %r10 | |
10682 | set sync_thr_counter5, %r23 | |
10683 | #ifndef SPC | |
10684 | ldxa [%g0]0x63, %o1 | |
10685 | and %o1, 0x38, %o1 | |
10686 | add %o1, %r23, %r23 | |
10687 | sllx %o1, 5, %o3 !(CID*256) | |
10688 | #endif | |
10689 | cas [%r23],%g0,%r10 !lock | |
10690 | brnz %r10, cwq_2_21 | |
10691 | rd %asi, %r12 | |
10692 | wr %g0, 0x40, %asi | |
10693 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
10694 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
10695 | cmp %l1, 1 | |
10696 | bne cwq_2_21 | |
10697 | set CWQ_BASE, %l6 | |
10698 | #ifndef SPC | |
10699 | add %l6, %o3, %l6 | |
10700 | #endif | |
10701 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
10702 | best_set_reg(0x206100f0, %l1, %l2) !# Control Word | |
10703 | sllx %l2, 32, %l2 | |
10704 | stx %l2, [%l6 + 0x0] | |
10705 | membar #Sync | |
10706 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
10707 | sub %l2, 0x40, %l2 | |
10708 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
10709 | wr %r12, %g0, %asi | |
10710 | st %g0, [%r23] | |
10711 | cwq_2_21: | |
10712 | ta T_CHANGE_NONHPRIV | |
10713 | .word 0xa7414000 ! 39: RDPC rd %pc, %r19 | |
10714 | unsupttte_2_22: | |
10715 | nop | |
10716 | ta T_CHANGE_HPRIV | |
10717 | mov 1, %r20 | |
10718 | sllx %r20, 63, %r20 | |
10719 | or %r20, 2,%r20 | |
10720 | stxa %r20, [%g0]0x5c ! D unsupported page size .. | |
10721 | ta T_CHANGE_NONHPRIV | |
10722 | .word 0xc3e84030 ! 40: PREFETCHA_R prefetcha [%r1, %r16] 0x01, #one_read | |
10723 | jmptr_2_23: | |
10724 | nop | |
10725 | best_set_reg(0xe1a00000, %r20, %r27) | |
10726 | .word 0xb7c6c000 ! 41: JMPL_R jmpl %r27 + %r0, %r27 | |
10727 | .word 0xa7508000 ! 42: RDPR_TSTATE <illegal instruction> | |
10728 | .word 0xe6dfe098 ! 43: LDXA_I ldxa [%r31, + 0x0098] %asi, %r19 | |
10729 | .word 0xa7b24482 ! 44: FCMPLE32 fcmple32 %d40, %d2, %r19 | |
10730 | fbug,a,pn %fcc0, skip_2_25 | |
10731 | fbule skip_2_25 | |
10732 | .align 128 | |
10733 | skip_2_25: | |
10734 | .word 0xa3b104d1 ! 45: FCMPNE32 fcmpne32 %d4, %d48, %r17 | |
10735 | br_longdelay4_2_26: | |
10736 | nop | |
10737 | not %g0, %r12 | |
10738 | jmp %r12 | |
10739 | .word 0x9d902005 ! 46: WRPR_WSTATE_I wrpr %r0, 0x0005, %wstate | |
10740 | setx 0xe5c6b96d0b0dfe0e, %r1, %r28 | |
10741 | stxa %r28, [%g0] 0x73 | |
10742 | intvec_2_27: | |
10743 | .word 0x39400001 ! 47: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
10744 | unsupttte_2_28: | |
10745 | nop | |
10746 | ta T_CHANGE_HPRIV | |
10747 | mov 1, %r20 | |
10748 | sllx %r20, 63, %r20 | |
10749 | or %r20, 2,%r20 | |
10750 | stxa %r20, [%g0]0x5c ! D unsupported page size .. | |
10751 | ta T_CHANGE_NONHPRIV | |
10752 | .word 0xa1b50487 ! 48: FCMPLE32 fcmple32 %d20, %d38, %r16 | |
10753 | .word 0xe677c000 ! 49: STX_R stx %r19, [%r31 + %r0] | |
10754 | intveclr_2_29: | |
10755 | nop | |
10756 | ta T_CHANGE_HPRIV | |
10757 | setx 0x41f8db6d3f7b0ecc, %r1, %r28 | |
10758 | stxa %r28, [%g0] 0x72 | |
10759 | ta T_CHANGE_NONHPRIV | |
10760 | .word 0x25400001 ! 50: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
10761 | mondo_2_30: | |
10762 | nop | |
10763 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
10764 | ta T_CHANGE_PRIV | |
10765 | stxa %r20, [%r0+0x3e8] %asi | |
10766 | .word 0x9d94c012 ! 51: WRPR_WSTATE_R wrpr %r19, %r18, %wstate | |
10767 | .word 0xe63fe073 ! 52: STD_I std %r19, [%r31 + 0x0073] | |
10768 | .word 0xa784734a ! 53: WR_GRAPHICS_STATUS_REG_I wr %r17, 0x134a, %- | |
10769 | .word 0xe71fc000 ! 54: LDDF_R ldd [%r31, %r0], %f19 | |
10770 | .word 0x3a800001 ! 1: BCC bcc,a <label_0x1> | |
10771 | .word 0x8d9032a9 ! 55: WRPR_PSTATE_I wrpr %r0, 0x12a9, %pstate | |
10772 | splash_tba_2_32: | |
10773 | nop | |
10774 | ta T_CHANGE_PRIV | |
10775 | set 0x120000, %r12 | |
10776 | .word 0x8b90000c ! 56: WRPR_TBA_R wrpr %r0, %r12, %tba | |
10777 | unsupttte_2_33: | |
10778 | nop | |
10779 | ta T_CHANGE_HPRIV | |
10780 | mov 1, %r20 | |
10781 | sllx %r20, 63, %r20 | |
10782 | or %r20, 2,%r20 | |
10783 | stxa %r20, [%g0]0x54 ! I unsupported page size .. | |
10784 | ta T_CHANGE_NONHPRIV | |
10785 | .word 0x87ab0a4d ! 57: FCMPd fcmpd %fcc<n>, %f12, %f44 | |
10786 | .word 0x89800011 ! 58: WRTICK_R wr %r0, %r17, %tick | |
10787 | ibp_2_35: | |
10788 | nop | |
10789 | .word 0xe9e7e00c ! 59: CASA_R casa [%r31] %asi, %r12, %r20 | |
10790 | .word 0xe8cfe158 ! 60: LDSBA_I ldsba [%r31, + 0x0158] %asi, %r20 | |
10791 | .word 0x97b0c481 ! 61: FCMPLE32 fcmple32 %d34, %d32, %r11 | |
10792 | ceter_2_37: | |
10793 | nop | |
10794 | ta T_CHANGE_HPRIV | |
10795 | mov 1, %r17 | |
10796 | sllx %r17, 60, %r17 | |
10797 | mov 0x18, %r16 | |
10798 | stxa %r17, [%r16]0x4c | |
10799 | ta T_CHANGE_NONHPRIV | |
10800 | .word 0x97410000 ! 62: RDTICK rd %tick, %r11 | |
10801 | .word 0xd31fe110 ! 63: LDDF_I ldd [%r31, 0x0110], %f9 | |
10802 | mondo_2_39: | |
10803 | nop | |
10804 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
10805 | stxa %r6, [%r0+0x3c0] %asi | |
10806 | .word 0x9d944011 ! 64: WRPR_WSTATE_R wrpr %r17, %r17, %wstate | |
10807 | ble,a skip_2_40 | |
10808 | fbug skip_2_40 | |
10809 | .align 2048 | |
10810 | skip_2_40: | |
10811 | .word 0xc32fc000 ! 65: STXFSR_R st-sfr %f1, [%r0, %r31] | |
10812 | fpinit_2_41: | |
10813 | nop | |
10814 | setx fp_data_quads, %r19, %r20 | |
10815 | ldd [%r20], %f0 | |
10816 | ldd [%r20+8], %f4 | |
10817 | ld [%r20+16], %fsr | |
10818 | ld [%r20+24], %r19 | |
10819 | wr %r19, %g0, %gsr | |
10820 | .word 0xc3e83972 ! 66: PREFETCHA_I prefetcha [%r0, + 0xfffff972] %asi, #one_read | |
10821 | nop | |
10822 | ta T_CHANGE_HPRIV ! macro | |
10823 | donret_2_42: | |
10824 | rd %pc, %r12 | |
10825 | add %r12, (donretarg_2_42-donret_2_42+4), %r12 | |
10826 | add %r12, 0x4, %r11 ! seq tnpc | |
10827 | wrpr %g0, 0x1, %tl | |
10828 | wrpr %g0, %r12, %tpc | |
10829 | wrpr %g0, %r11, %tnpc | |
10830 | set (0x00525d00 | (16 << 24)), %r13 | |
10831 | and %r12, 0xfff, %r14 | |
10832 | sllx %r14, 30, %r14 | |
10833 | or %r13, %r14, %r20 | |
10834 | wrpr %r20, %g0, %tstate | |
10835 | wrhpr %g0, 0x1c9b, %htstate | |
10836 | ta T_CHANGE_NONHPRIV ! rand=1 (2) | |
10837 | retry | |
10838 | donretarg_2_42: | |
10839 | .word 0xd26fe001 ! 67: LDSTUB_I ldstub %r9, [%r31 + 0x0001] | |
10840 | ibp_2_43: | |
10841 | nop | |
10842 | .word 0xa7a209a1 ! 68: FDIVs fdivs %f8, %f1, %f19 | |
10843 | splash_tba_2_44: | |
10844 | nop | |
10845 | ta T_CHANGE_PRIV | |
10846 | set 0x120000, %r12 | |
10847 | .word 0x8b90000c ! 69: WRPR_TBA_R wrpr %r0, %r12, %tba | |
10848 | jmptr_2_45: | |
10849 | nop | |
10850 | best_set_reg(0xe1a00000, %r20, %r27) | |
10851 | .word 0xb7c6c000 ! 70: JMPL_R jmpl %r27 + %r0, %r27 | |
10852 | .word 0xe6dfe0d0 ! 71: LDXA_I ldxa [%r31, + 0x00d0] %asi, %r19 | |
10853 | .word 0xe737e1b8 ! 72: STQF_I - %f19, [0x01b8, %r31] | |
10854 | nop | |
10855 | mov 0x80, %g3 | |
10856 | stxa %g3, [%g3] 0x5f | |
10857 | .word 0xe65fc000 ! 73: LDX_R ldx [%r31 + %r0], %r19 | |
10858 | set 0x2088, %l3 | |
10859 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT | |
10860 | .word 0x9bb407c4 ! 74: PDIST pdistn %d16, %d4, %d44 | |
10861 | .word 0xd22fe14e ! 75: STB_I stb %r9, [%r31 + 0x014e] | |
10862 | nop | |
10863 | mov 0x80, %g3 | |
10864 | stxa %g3, [%g3] 0x5f | |
10865 | .word 0xd25fc000 ! 76: LDX_R ldx [%r31 + %r0], %r9 | |
10866 | .word 0x9194c010 ! 77: WRPR_PIL_R wrpr %r19, %r16, %pil | |
10867 | .word 0xd2dfc029 ! 78: LDXA_R ldxa [%r31, %r9] 0x01, %r9 | |
10868 | .word 0x91d020b5 ! 79: Tcc_I ta icc_or_xcc, %r0 + 181 | |
10869 | .word 0x89800011 ! 80: WRTICK_R wr %r0, %r17, %tick | |
10870 | splash_tba_2_49: | |
10871 | nop | |
10872 | ta T_CHANGE_PRIV | |
10873 | setx 0x00000004003a0000, %r11, %r12 | |
10874 | .word 0x8b90000c ! 81: WRPR_TBA_R wrpr %r0, %r12, %tba | |
10875 | intveclr_2_50: | |
10876 | nop | |
10877 | ta T_CHANGE_HPRIV | |
10878 | setx 0xb0ca4ba384ea2cdc, %r1, %r28 | |
10879 | stxa %r28, [%g0] 0x72 | |
10880 | .word 0x25400001 ! 82: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
10881 | nop | |
10882 | mov 0x80, %g3 | |
10883 | stxa %g3, [%g3] 0x5f | |
10884 | .word 0xd25fc000 ! 83: LDX_R ldx [%r31 + %r0], %r9 | |
10885 | .word 0xd337e1e2 ! 84: STQF_I - %f9, [0x01e2, %r31] | |
10886 | memptr_2_51: | |
10887 | set user_data_start, %r31 | |
10888 | .word 0x8583638d ! 85: WRCCR_I wr %r13, 0x038d, %ccr | |
10889 | invalw | |
10890 | mov 0x32, %r30 | |
10891 | .word 0x83d0001e ! 86: Tcc_R te icc_or_xcc, %r0 + %r30 | |
10892 | .word 0xd327c000 ! 87: STF_R st %f9, [%r0, %r31] | |
10893 | jmptr_2_52: | |
10894 | nop | |
10895 | best_set_reg(0xe1a00000, %r20, %r27) | |
10896 | .word 0xb7c6c000 ! 88: JMPL_R jmpl %r27 + %r0, %r27 | |
10897 | setx 0x26c829ce6d02c3c3, %r1, %r28 | |
10898 | stxa %r28, [%g0] 0x73 | |
10899 | intvec_2_53: | |
10900 | .word 0x39400001 ! 89: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
10901 | jmptr_2_54: | |
10902 | nop | |
10903 | best_set_reg(0xe1a00000, %r20, %r27) | |
10904 | .word 0xb7c6c000 ! 90: JMPL_R jmpl %r27 + %r0, %r27 | |
10905 | pmu_2_55: | |
10906 | nop | |
10907 | setx 0xfffff3c4fffffe4a, %g1, %g7 | |
10908 | .word 0xa3800007 ! 91: WR_PERF_COUNTER_R wr %r0, %r7, %- | |
10909 | .word 0xd28008a0 ! 92: LDUWA_R lduwa [%r0, %r0] 0x45, %r9 | |
10910 | nop | |
10911 | ta T_CHANGE_HPRIV | |
10912 | mov 0x2+1, %r10 | |
10913 | set sync_thr_counter5, %r23 | |
10914 | #ifndef SPC | |
10915 | ldxa [%g0]0x63, %o1 | |
10916 | and %o1, 0x38, %o1 | |
10917 | add %o1, %r23, %r23 | |
10918 | sllx %o1, 5, %o3 !(CID*256) | |
10919 | #endif | |
10920 | cas [%r23],%g0,%r10 !lock | |
10921 | brnz %r10, cwq_2_56 | |
10922 | rd %asi, %r12 | |
10923 | wr %g0, 0x40, %asi | |
10924 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
10925 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
10926 | cmp %l1, 1 | |
10927 | bne cwq_2_56 | |
10928 | set CWQ_BASE, %l6 | |
10929 | #ifndef SPC | |
10930 | add %l6, %o3, %l6 | |
10931 | #endif | |
10932 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
10933 | best_set_reg(0x20610040, %l1, %l2) !# Control Word | |
10934 | sllx %l2, 32, %l2 | |
10935 | stx %l2, [%l6 + 0x0] | |
10936 | membar #Sync | |
10937 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
10938 | sub %l2, 0x40, %l2 | |
10939 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
10940 | wr %r12, %g0, %asi | |
10941 | st %g0, [%r23] | |
10942 | cwq_2_56: | |
10943 | ta T_CHANGE_NONHPRIV | |
10944 | .word 0x95414000 ! 93: RDPC rd %pc, %r10 | |
10945 | brcommon3_2_57: | |
10946 | nop | |
10947 | setx common_target, %r12, %r27 | |
10948 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
10949 | ba,a .+12 | |
10950 | .word 0xe06fe170 ! 1: LDSTUB_I ldstub %r16, [%r31 + 0x0170] | |
10951 | ba,a .+8 | |
10952 | jmpl %r27+0, %r27 | |
10953 | .word 0xc32fc012 ! 94: STXFSR_R st-sfr %f1, [%r18, %r31] | |
10954 | splash_lsu_2_58: | |
10955 | nop | |
10956 | ta T_CHANGE_HPRIV | |
10957 | set 0xca3837ae, %r2 | |
10958 | mov 0x1, %r1 | |
10959 | sllx %r1, 32, %r1 | |
10960 | or %r1, %r2, %r2 | |
10961 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
10962 | ta T_CHANGE_NONHPRIV | |
10963 | .word 0x3d400001 ! 95: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
10964 | mondo_2_59: | |
10965 | nop | |
10966 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
10967 | ta T_CHANGE_PRIV | |
10968 | stxa %r18, [%r0+0x3e0] %asi | |
10969 | .word 0x9d90c011 ! 96: WRPR_WSTATE_R wrpr %r3, %r17, %wstate | |
10970 | ibp_2_60: | |
10971 | nop | |
10972 | ta T_CHANGE_NONHPRIV | |
10973 | .word 0xc1bfd920 ! 97: STDFA_R stda %f0, [%r0, %r31] | |
10974 | .word 0xc19fc3e0 ! 98: LDDFA_R ldda [%r31, %r0], %f0 | |
10975 | nop | |
10976 | ta T_CHANGE_HPRIV | |
10977 | mov 0x2+1, %r10 | |
10978 | set sync_thr_counter5, %r23 | |
10979 | #ifndef SPC | |
10980 | ldxa [%g0]0x63, %o1 | |
10981 | and %o1, 0x38, %o1 | |
10982 | add %o1, %r23, %r23 | |
10983 | sllx %o1, 5, %o3 !(CID*256) | |
10984 | #endif | |
10985 | cas [%r23],%g0,%r10 !lock | |
10986 | brnz %r10, cwq_2_61 | |
10987 | rd %asi, %r12 | |
10988 | wr %g0, 0x40, %asi | |
10989 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
10990 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
10991 | cmp %l1, 1 | |
10992 | bne cwq_2_61 | |
10993 | set CWQ_BASE, %l6 | |
10994 | #ifndef SPC | |
10995 | add %l6, %o3, %l6 | |
10996 | #endif | |
10997 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
10998 | best_set_reg(0x206100f0, %l1, %l2) !# Control Word | |
10999 | sllx %l2, 32, %l2 | |
11000 | stx %l2, [%l6 + 0x0] | |
11001 | membar #Sync | |
11002 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
11003 | sub %l2, 0x40, %l2 | |
11004 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
11005 | wr %r12, %g0, %asi | |
11006 | st %g0, [%r23] | |
11007 | cwq_2_61: | |
11008 | ta T_CHANGE_NONHPRIV | |
11009 | .word 0xa5414000 ! 99: RDPC rd %pc, %r18 | |
11010 | .word 0xdb37e064 ! 100: STQF_I - %f13, [0x0064, %r31] | |
11011 | .word 0x87ab4a46 ! 101: FCMPd fcmpd %fcc<n>, %f44, %f6 | |
11012 | .word 0x89800011 ! 102: WRTICK_R wr %r0, %r17, %tick | |
11013 | cwp_2_64: | |
11014 | set user_data_start, %o7 | |
11015 | .word 0x93902006 ! 103: WRPR_CWP_I wrpr %r0, 0x0006, %cwp | |
11016 | splash_lsu_2_65: | |
11017 | nop | |
11018 | ta T_CHANGE_HPRIV | |
11019 | set 0x0ebf7d1f, %r2 | |
11020 | mov 0x4, %r1 | |
11021 | sllx %r1, 32, %r1 | |
11022 | or %r1, %r2, %r2 | |
11023 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
11024 | ta T_CHANGE_NONHPRIV | |
11025 | .word 0x3d400001 ! 104: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
11026 | splash_lsu_2_66: | |
11027 | nop | |
11028 | ta T_CHANGE_HPRIV | |
11029 | set 0xace73cc6, %r2 | |
11030 | mov 0x5, %r1 | |
11031 | sllx %r1, 32, %r1 | |
11032 | or %r1, %r2, %r2 | |
11033 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
11034 | .word 0x3d400001 ! 105: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
11035 | fpinit_2_67: | |
11036 | nop | |
11037 | setx fp_data_quads, %r19, %r20 | |
11038 | ldd [%r20], %f0 | |
11039 | ldd [%r20+8], %f4 | |
11040 | ld [%r20+16], %fsr | |
11041 | ld [%r20+24], %r19 | |
11042 | wr %r19, %g0, %gsr | |
11043 | .word 0xc3e82fe8 ! 106: PREFETCHA_I prefetcha [%r0, + 0x0fe8] %asi, #one_read | |
11044 | ibp_2_68: | |
11045 | nop | |
11046 | ta T_CHANGE_NONHPRIV | |
11047 | .word 0xc3ec0032 ! 107: PREFETCHA_R prefetcha [%r16, %r18] 0x01, #one_read | |
11048 | ta T_CHANGE_NONHPRIV | |
11049 | .word 0x8143e011 ! 108: MEMBAR membar #LoadLoad | #Lookaside | |
11050 | intveclr_2_70: | |
11051 | nop | |
11052 | ta T_CHANGE_HPRIV | |
11053 | setx 0x10332766f4e81f17, %r1, %r28 | |
11054 | stxa %r28, [%g0] 0x72 | |
11055 | .word 0x25400001 ! 109: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
11056 | nop | |
11057 | ta T_CHANGE_HPRIV | |
11058 | mov 0x2, %r10 | |
11059 | set sync_thr_counter6, %r23 | |
11060 | #ifndef SPC | |
11061 | ldxa [%g0]0x63, %o1 | |
11062 | and %o1, 0x38, %o1 | |
11063 | add %o1, %r23, %r23 | |
11064 | #endif | |
11065 | cas [%r23],%g0,%r10 !lock | |
11066 | brnz %r10, sma_2_71 | |
11067 | rd %asi, %r12 | |
11068 | wr %g0, 0x40, %asi | |
11069 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 | |
11070 | set 0x000a1fff, %g1 | |
11071 | stxa %g1, [%g0 + 0x80] %asi | |
11072 | wr %r12, %g0, %asi | |
11073 | st %g0, [%r23] | |
11074 | sma_2_71: | |
11075 | ta T_CHANGE_NONHPRIV | |
11076 | .word 0xd7e7e014 ! 110: CASA_R casa [%r31] %asi, %r20, %r11 | |
11077 | .word 0xe1bfe160 ! 111: STDFA_I stda %f16, [0x0160, %r31] | |
11078 | nop | |
11079 | ta T_CHANGE_HPRIV ! macro | |
11080 | donret_2_72: | |
11081 | rd %pc, %r12 | |
11082 | add %r12, (donretarg_2_72-donret_2_72), %r12 | |
11083 | add %r12, 0x8, %r11 ! nonseq tnpc | |
11084 | wrpr %g0, 0x1, %tl | |
11085 | wrpr %g0, %r12, %tpc | |
11086 | wrpr %g0, %r11, %tnpc | |
11087 | set (0x00f42800 | (0x8b << 24)), %r13 | |
11088 | and %r12, 0xfff, %r14 | |
11089 | sllx %r14, 30, %r14 | |
11090 | or %r13, %r14, %r20 | |
11091 | wrpr %r20, %g0, %tstate | |
11092 | wrhpr %g0, 0xe95, %htstate | |
11093 | ta T_CHANGE_NONPRIV ! rand=0 (2) | |
11094 | .word 0x2ac90001 ! 1: BRNZ brnz,a,pt %r4,<label_0x90001> | |
11095 | retry | |
11096 | donretarg_2_72: | |
11097 | .word 0x93a0c9d4 ! 112: FDIVd fdivd %f34, %f20, %f40 | |
11098 | ibp_2_73: | |
11099 | nop | |
11100 | .word 0xd297c029 ! 113: LDUHA_R lduha [%r31, %r9] 0x01, %r9 | |
11101 | .word 0xe1bfe120 ! 114: STDFA_I stda %f16, [0x0120, %r31] | |
11102 | .word 0x8d903d55 ! 115: WRPR_PSTATE_I wrpr %r0, 0x1d55, %pstate | |
11103 | .word 0x87802082 ! 116: WRASI_I wr %r0, 0x0082, %asi | |
11104 | #if (defined SPC || defined CMP1) | |
11105 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_76) + 16, 16, 16)) -> intp(4,0,25) | |
11106 | #else | |
11107 | setx 0xbc94eb1716237f30, %r1, %r28 | |
11108 | stxa %r28, [%g0] 0x73 | |
11109 | #endif | |
11110 | intvec_2_76: | |
11111 | .word 0x39400001 ! 117: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
11112 | ibp_2_77: | |
11113 | nop | |
11114 | ta T_CHANGE_NONHPRIV | |
11115 | .word 0xc3ecc028 ! 118: PREFETCHA_R prefetcha [%r19, %r8] 0x01, #one_read | |
11116 | .word 0x91d02034 ! 119: Tcc_I ta icc_or_xcc, %r0 + 52 | |
11117 | mondo_2_78: | |
11118 | nop | |
11119 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
11120 | ta T_CHANGE_PRIV | |
11121 | stxa %r1, [%r0+0x3c0] %asi | |
11122 | .word 0x9d90c005 ! 120: WRPR_WSTATE_R wrpr %r3, %r5, %wstate | |
11123 | ibp_2_79: | |
11124 | nop | |
11125 | .word 0xc1bfe180 ! 121: STDFA_I stda %f0, [0x0180, %r31] | |
11126 | ibp_2_80: | |
11127 | nop | |
11128 | ta T_CHANGE_NONHPRIV | |
11129 | .word 0xa1a049c7 ! 122: FDIVd fdivd %f32, %f38, %f16 | |
11130 | .word 0x8d802004 ! 123: WRFPRS_I wr %r0, 0x0004, %fprs | |
11131 | splash_hpstate_2_81: | |
11132 | ta T_CHANGE_NONHPRIV | |
11133 | .word 0x26800001 ! 1: BL bl,a <label_0x1> | |
11134 | .word 0x81983387 ! 124: WRHPR_HPSTATE_I wrhpr %r0, 0x1387, %hpstate | |
11135 | ibp_2_82: | |
11136 | nop | |
11137 | ta T_CHANGE_NONHPRIV | |
11138 | .word 0xd0dfc028 ! 125: LDXA_R ldxa [%r31, %r8] 0x01, %r8 | |
11139 | nop | |
11140 | ta T_CHANGE_HPRIV ! macro | |
11141 | donret_2_83: | |
11142 | rd %pc, %r12 | |
11143 | add %r12, (donretarg_2_83-donret_2_83+4), %r12 | |
11144 | add %r12, 0x4, %r11 ! seq tnpc | |
11145 | wrpr %g0, 0x2, %tl | |
11146 | wrpr %g0, %r12, %tpc | |
11147 | wrpr %g0, %r11, %tnpc | |
11148 | set (0x00a21000 | (0x55 << 24)), %r13 | |
11149 | and %r12, 0xfff, %r14 | |
11150 | sllx %r14, 30, %r14 | |
11151 | or %r13, %r14, %r20 | |
11152 | wrpr %r20, %g0, %tstate | |
11153 | wrhpr %g0, 0xf15, %htstate | |
11154 | ta T_CHANGE_NONHPRIV ! rand=1 (2) | |
11155 | .word 0x33400001 ! 1: FBPE fbe,a,pn %fcc0, <label_0x1> | |
11156 | done | |
11157 | donretarg_2_83: | |
11158 | .word 0x3d400001 ! 126: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
11159 | .word 0xc32fc00b ! 127: STXFSR_R st-sfr %f1, [%r11, %r31] | |
11160 | nop | |
11161 | mov 0x80, %g3 | |
11162 | stxa %g3, [%g3] 0x57 | |
11163 | .word 0xd05fc000 ! 128: LDX_R ldx [%r31 + %r0], %r8 | |
11164 | .word 0x24800001 ! 129: BLE ble,a <label_0x1> | |
11165 | memptr_2_85: | |
11166 | set 0x60740000, %r31 | |
11167 | .word 0x8580f85b ! 130: WRCCR_I wr %r3, 0x185b, %ccr | |
11168 | .word 0x22800001 ! 131: BE be,a <label_0x1> | |
11169 | ibp_2_86: | |
11170 | nop | |
11171 | .word 0xe19fe0e0 ! 132: LDDFA_I ldda [%r31, 0x00e0], %f16 | |
11172 | .word 0xa9a00174 ! 133: FABSq dis not found | |
11173 | ||
11174 | .word 0xdad7e100 ! 134: LDSHA_I ldsha [%r31, + 0x0100] %asi, %r13 | |
11175 | bg,a skip_2_88 | |
11176 | bneg skip_2_88 | |
11177 | .align 1024 | |
11178 | skip_2_88: | |
11179 | .word 0x9f80273e ! 135: SIR sir 0x073e | |
11180 | fpinit_2_89: | |
11181 | nop | |
11182 | setx fp_data_quads, %r19, %r20 | |
11183 | ldd [%r20], %f0 | |
11184 | ldd [%r20+8], %f4 | |
11185 | ld [%r20+16], %fsr | |
11186 | ld [%r20+24], %r19 | |
11187 | wr %r19, %g0, %gsr | |
11188 | .word 0x87a80a44 ! 136: FCMPd fcmpd %fcc<n>, %f0, %f4 | |
11189 | br_badelay2_2_90: | |
11190 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
11191 | allclean | |
11192 | .word 0x93b18305 ! 137: ALIGNADDRESS alignaddr %r6, %r5, %r9 | |
11193 | .word 0xe137e066 ! 138: STQF_I - %f16, [0x0066, %r31] | |
11194 | fpinit_2_91: | |
11195 | nop | |
11196 | setx fp_data_quads, %r19, %r20 | |
11197 | ldd [%r20], %f0 | |
11198 | ldd [%r20+8], %f4 | |
11199 | ld [%r20+16], %fsr | |
11200 | ld [%r20+24], %r19 | |
11201 | wr %r19, %g0, %gsr | |
11202 | .word 0x91a009c4 ! 139: FDIVd fdivd %f0, %f4, %f8 | |
11203 | .word 0x23400001 ! 1: FBPNE fbne,a,pn %fcc0, <label_0x1> | |
11204 | .word 0x8d903c70 ! 140: WRPR_PSTATE_I wrpr %r0, 0x1c70, %pstate | |
11205 | ibp_2_93: | |
11206 | nop | |
11207 | .word 0xa7703859 ! 141: POPC_I popc 0x1859, %r19 | |
11208 | .word 0xa7a000d1 ! 142: FNEGd fnegd %f48, %f50 | |
11209 | set 0x163, %l3 | |
11210 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT | |
11211 | .word 0x99b307c6 ! 143: PDIST pdistn %d12, %d6, %d12 | |
11212 | invalw | |
11213 | mov 0xb5, %r30 | |
11214 | .word 0x93d0001e ! 144: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
11215 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl | |
11216 | reduce_priv_lvl_2_94: | |
11217 | ta T_CHANGE_NONPRIV ! macro | |
11218 | memptr_2_95: | |
11219 | set 0x60340000, %r31 | |
11220 | .word 0x8584bc63 ! 146: WRCCR_I wr %r18, 0x1c63, %ccr | |
11221 | dvapa_2_96: | |
11222 | nop | |
11223 | ta T_CHANGE_HPRIV | |
11224 | mov 0x8f3, %r20 | |
11225 | mov 0x14, %r19 | |
11226 | sllx %r20, 23, %r20 | |
11227 | or %r19, %r20, %r19 | |
11228 | stxa %r19, [%g0] ASI_LSU_CONTROL | |
11229 | mov 0x38, %r18 | |
11230 | stxa %r31, [%r18]0x58 | |
11231 | ta T_CHANGE_NONHPRIV | |
11232 | .word 0xe69fe150 ! 147: LDDA_I ldda [%r31, + 0x0150] %asi, %r19 | |
11233 | splash_decr_2_97: | |
11234 | nop | |
11235 | ta T_CHANGE_HPRIV | |
11236 | mov 8, %r1 | |
11237 | stxa %r10, [%r1] 0x45 | |
11238 | .word 0xa7804013 ! 148: WR_GRAPHICS_STATUS_REG_R wr %r1, %r19, %- | |
11239 | .word 0xe637e0f2 ! 149: STH_I sth %r19, [%r31 + 0x00f2] | |
11240 | #if (defined SPC || defined CMP1) | |
11241 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_98) + 16, 16, 16)) -> intp(0,0,23) | |
11242 | #else | |
11243 | setx 0xde03745a0a60370f, %r1, %r28 | |
11244 | stxa %r28, [%g0] 0x73 | |
11245 | #endif | |
11246 | intvec_2_98: | |
11247 | .word 0x39400001 ! 150: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
11248 | intveclr_2_99: | |
11249 | nop | |
11250 | ta T_CHANGE_HPRIV | |
11251 | setx 0xe9d1cb5d876509a2, %r1, %r28 | |
11252 | stxa %r28, [%g0] 0x72 | |
11253 | ta T_CHANGE_NONHPRIV | |
11254 | .word 0x25400001 ! 151: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
11255 | .word 0xe68008a0 ! 152: LDUWA_R lduwa [%r0, %r0] 0x45, %r19 | |
11256 | .word 0xe62fe146 ! 153: STB_I stb %r19, [%r31 + 0x0146] | |
11257 | mondo_2_100: | |
11258 | nop | |
11259 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
11260 | stxa %r13, [%r0+0x3d8] %asi | |
11261 | .word 0x9d934010 ! 154: WRPR_WSTATE_R wrpr %r13, %r16, %wstate | |
11262 | .word 0xa150c000 ! 155: RDPR_TT <illegal instruction> | |
11263 | .word 0x3a800001 ! 156: BCC bcc,a <label_0x1> | |
11264 | brcommon2_2_101: | |
11265 | nop | |
11266 | setx common_target, %r12, %r27 | |
11267 | ba,a .+12 | |
11268 | .word 0xd5148012 ! 1: LDQF_R - [%r18, %r18], %f10 | |
11269 | ba,a .+8 | |
11270 | jmpl %r27+0, %r27 | |
11271 | .word 0xe19fe000 ! 157: LDDFA_I ldda [%r31, 0x0000], %f16 | |
11272 | tagged_2_102: | |
11273 | tsubcctv %r16, 0x1b66, %r16 | |
11274 | .word 0xd407e050 ! 158: LDUW_I lduw [%r31 + 0x0050], %r10 | |
11275 | splash_cmpr_2_103: | |
11276 | mov 0, %r18 | |
11277 | sllx %r18, 63, %r18 | |
11278 | rd %tick, %r17 | |
11279 | add %r17, 0x80, %r17 | |
11280 | or %r17, %r18, %r17 | |
11281 | .word 0xb3800011 ! 159: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
11282 | .word 0xd5e7c02b ! 160: CASA_I casa [%r31] 0x 1, %r11, %r10 | |
11283 | br_longdelay2_2_104: | |
11284 | .word 0x25400001 ! 1: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
11285 | .word 0x95a7c9d4 ! 161: FDIVd fdivd %f62, %f20, %f10 | |
11286 | nop | |
11287 | ta T_CHANGE_HPRIV | |
11288 | mov 0x2+1, %r10 | |
11289 | set sync_thr_counter5, %r23 | |
11290 | #ifndef SPC | |
11291 | ldxa [%g0]0x63, %o1 | |
11292 | and %o1, 0x38, %o1 | |
11293 | add %o1, %r23, %r23 | |
11294 | sllx %o1, 5, %o3 !(CID*256) | |
11295 | #endif | |
11296 | cas [%r23],%g0,%r10 !lock | |
11297 | brnz %r10, cwq_2_105 | |
11298 | rd %asi, %r12 | |
11299 | wr %g0, 0x40, %asi | |
11300 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
11301 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
11302 | cmp %l1, 1 | |
11303 | bne cwq_2_105 | |
11304 | set CWQ_BASE, %l6 | |
11305 | #ifndef SPC | |
11306 | add %l6, %o3, %l6 | |
11307 | #endif | |
11308 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
11309 | best_set_reg(0x20610080, %l1, %l2) !# Control Word | |
11310 | sllx %l2, 32, %l2 | |
11311 | stx %l2, [%l6 + 0x0] | |
11312 | membar #Sync | |
11313 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
11314 | sub %l2, 0x40, %l2 | |
11315 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
11316 | wr %r12, %g0, %asi | |
11317 | st %g0, [%r23] | |
11318 | cwq_2_105: | |
11319 | ta T_CHANGE_NONHPRIV | |
11320 | .word 0xa3414000 ! 162: RDPC rd %pc, %r17 | |
11321 | splash_hpstate_2_106: | |
11322 | ta T_CHANGE_NONHPRIV | |
11323 | .word 0x2b400001 ! 1: FBPUG fbug,a,pn %fcc0, <label_0x1> | |
11324 | .word 0x8198339c ! 163: WRHPR_HPSTATE_I wrhpr %r0, 0x139c, %hpstate | |
11325 | trapasi_2_107: | |
11326 | nop | |
11327 | mov 0x10, %r1 ! (VA for ASI 0x5a) | |
11328 | .word 0xd4d04b40 ! 164: LDSHA_R ldsha [%r1, %r0] 0x5a, %r10 | |
11329 | .word 0xe1bfe1e0 ! 165: STDFA_I stda %f16, [0x01e0, %r31] | |
11330 | splash_hpstate_2_108: | |
11331 | ta T_CHANGE_NONHPRIV | |
11332 | .word 0x81982d05 ! 166: WRHPR_HPSTATE_I wrhpr %r0, 0x0d05, %hpstate | |
11333 | otherw | |
11334 | mov 0xb0, %r30 | |
11335 | .word 0x83d0001e ! 167: Tcc_R te icc_or_xcc, %r0 + %r30 | |
11336 | .word 0x8d802000 ! 168: WRFPRS_I wr %r0, 0x0000, %fprs | |
11337 | .word 0xd43fe0e8 ! 169: STD_I std %r10, [%r31 + 0x00e8] | |
11338 | jmptr_2_109: | |
11339 | nop | |
11340 | best_set_reg(0xe0a00000, %r20, %r27) | |
11341 | .word 0xb7c6c000 ! 170: JMPL_R jmpl %r27 + %r0, %r27 | |
11342 | jmptr_2_110: | |
11343 | nop | |
11344 | best_set_reg(0xe0a00000, %r20, %r27) | |
11345 | .word 0xb7c6c000 ! 171: JMPL_R jmpl %r27 + %r0, %r27 | |
11346 | nop | |
11347 | mov 0x80, %g3 | |
11348 | stxa %g3, [%g3] 0x57 | |
11349 | .word 0xd45fc000 ! 172: LDX_R ldx [%r31 + %r0], %r10 | |
11350 | .word 0xc19fd920 ! 173: LDDFA_R ldda [%r31, %r0], %f0 | |
11351 | .word 0xd51fe118 ! 174: LDDF_I ldd [%r31, 0x0118], %f10 | |
11352 | .word 0xd44fe0e0 ! 175: LDSB_I ldsb [%r31 + 0x00e0], %r10 | |
11353 | .word 0x91924004 ! 176: WRPR_PIL_R wrpr %r9, %r4, %pil | |
11354 | trapasi_2_113: | |
11355 | nop | |
11356 | mov 0x10, %r1 ! (VA for ASI 0x4c) | |
11357 | .word 0xd4904980 ! 177: LDUHA_R lduha [%r1, %r0] 0x4c, %r10 | |
11358 | intveclr_2_114: | |
11359 | nop | |
11360 | ta T_CHANGE_HPRIV | |
11361 | setx 0x6eb5656978bd07b0, %r1, %r28 | |
11362 | stxa %r28, [%g0] 0x72 | |
11363 | ta T_CHANGE_NONHPRIV | |
11364 | .word 0x25400001 ! 178: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
11365 | ibp_2_115: | |
11366 | nop | |
11367 | .word 0xc1bfdc00 ! 179: STDFA_R stda %f0, [%r0, %r31] | |
11368 | .word 0xc30fc000 ! 180: LDXFSR_R ld-fsr [%r31, %r0], %f1 | |
11369 | nop | |
11370 | ta T_CHANGE_HPRIV | |
11371 | mov 0x2+1, %r10 | |
11372 | set sync_thr_counter5, %r23 | |
11373 | #ifndef SPC | |
11374 | ldxa [%g0]0x63, %o1 | |
11375 | and %o1, 0x38, %o1 | |
11376 | add %o1, %r23, %r23 | |
11377 | sllx %o1, 5, %o3 !(CID*256) | |
11378 | #endif | |
11379 | cas [%r23],%g0,%r10 !lock | |
11380 | brnz %r10, cwq_2_116 | |
11381 | rd %asi, %r12 | |
11382 | wr %g0, 0x40, %asi | |
11383 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
11384 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
11385 | cmp %l1, 1 | |
11386 | bne cwq_2_116 | |
11387 | set CWQ_BASE, %l6 | |
11388 | #ifndef SPC | |
11389 | add %l6, %o3, %l6 | |
11390 | #endif | |
11391 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
11392 | best_set_reg(0x20610080, %l1, %l2) !# Control Word | |
11393 | sllx %l2, 32, %l2 | |
11394 | stx %l2, [%l6 + 0x0] | |
11395 | membar #Sync | |
11396 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
11397 | sub %l2, 0x40, %l2 | |
11398 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
11399 | wr %r12, %g0, %asi | |
11400 | st %g0, [%r23] | |
11401 | cwq_2_116: | |
11402 | ta T_CHANGE_NONHPRIV | |
11403 | .word 0x9b414000 ! 181: RDPC rd %pc, %r13 | |
11404 | splash_cmpr_2_117: | |
11405 | mov 0, %r18 | |
11406 | sllx %r18, 63, %r18 | |
11407 | rd %tick, %r17 | |
11408 | add %r17, 0x60, %r17 | |
11409 | or %r17, %r18, %r17 | |
11410 | ta T_CHANGE_PRIV | |
11411 | .word 0xb3800011 ! 182: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
11412 | intveclr_2_118: | |
11413 | nop | |
11414 | ta T_CHANGE_HPRIV | |
11415 | setx 0x1b925fce746aaf7e, %r1, %r28 | |
11416 | stxa %r28, [%g0] 0x72 | |
11417 | .word 0x25400001 ! 183: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
11418 | .word 0xe0dfe098 ! 184: LDXA_I ldxa [%r31, + 0x0098] %asi, %r16 | |
11419 | intveclr_2_119: | |
11420 | nop | |
11421 | ta T_CHANGE_HPRIV | |
11422 | setx 0x2595ad93bce9ce0b, %r1, %r28 | |
11423 | stxa %r28, [%g0] 0x72 | |
11424 | .word 0x25400001 ! 185: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
11425 | #if (defined SPC || defined CMP1) | |
11426 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_120) + 48, 16, 16)) -> intp(2,0,11) | |
11427 | #else | |
11428 | setx 0x81a1f04261a0f8fc, %r1, %r28 | |
11429 | stxa %r28, [%g0] 0x73 | |
11430 | #endif | |
11431 | intvec_2_120: | |
11432 | .word 0x39400001 ! 186: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
11433 | set 0x75f, %l3 | |
11434 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT | |
11435 | .word 0xa3b447d3 ! 187: PDIST pdistn %d48, %d50, %d48 | |
11436 | otherw | |
11437 | mov 0xb4, %r30 | |
11438 | .word 0x91d0001e ! 188: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
11439 | splash_decr_2_121: | |
11440 | nop | |
11441 | ta T_CHANGE_HPRIV | |
11442 | mov 8, %r1 | |
11443 | stxa %r9, [%r1] 0x45 | |
11444 | .word 0xa7848004 ! 189: WR_GRAPHICS_STATUS_REG_R wr %r18, %r4, %- | |
11445 | .word 0xda97e040 ! 190: LDUHA_I lduha [%r31, + 0x0040] %asi, %r13 | |
11446 | .word 0x8799213a ! 191: WRHPR_HINTP_I wrhpr %r4, 0x013a, %hintp | |
11447 | .word 0x91d02033 ! 192: Tcc_I ta icc_or_xcc, %r0 + 51 | |
11448 | splash_decr_2_122: | |
11449 | nop | |
11450 | ta T_CHANGE_HPRIV | |
11451 | mov 8, %r1 | |
11452 | stxa %r6, [%r1] 0x45 | |
11453 | .word 0xa783000d ! 193: WR_GRAPHICS_STATUS_REG_R wr %r12, %r13, %- | |
11454 | dvapa_2_123: | |
11455 | nop | |
11456 | ta T_CHANGE_HPRIV | |
11457 | mov 0xaba, %r20 | |
11458 | mov 0xe, %r19 | |
11459 | sllx %r20, 23, %r20 | |
11460 | or %r19, %r20, %r19 | |
11461 | stxa %r19, [%g0] ASI_LSU_CONTROL | |
11462 | mov 0x38, %r18 | |
11463 | stxa %r31, [%r18]0x58 | |
11464 | ta T_CHANGE_NONHPRIV | |
11465 | .word 0x9f8039e0 ! 194: SIR sir 0x19e0 | |
11466 | brcommon3_2_124: | |
11467 | nop | |
11468 | setx common_target, %r12, %r27 | |
11469 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
11470 | ba,a .+12 | |
11471 | .word 0xd3e7c02c ! 1: CASA_I casa [%r31] 0x 1, %r12, %r9 | |
11472 | ba,a .+8 | |
11473 | jmpl %r27+0, %r27 | |
11474 | .word 0xd2bfc02c ! 195: STDA_R stda %r9, [%r31 + %r12] 0x01 | |
11475 | .word 0xc30fc000 ! 196: LDXFSR_R ld-fsr [%r31, %r0], %f1 | |
11476 | dvapa_2_125: | |
11477 | nop | |
11478 | ta T_CHANGE_HPRIV | |
11479 | mov 0xfa5, %r20 | |
11480 | mov 0x12, %r19 | |
11481 | sllx %r20, 23, %r20 | |
11482 | or %r19, %r20, %r19 | |
11483 | stxa %r19, [%g0] ASI_LSU_CONTROL | |
11484 | mov 0x38, %r18 | |
11485 | stxa %r31, [%r18]0x58 | |
11486 | ta T_CHANGE_NONHPRIV | |
11487 | .word 0x9b7032be ! 197: POPC_I popc 0x12be, %r13 | |
11488 | memptr_2_126: | |
11489 | set user_data_start, %r31 | |
11490 | .word 0x85852469 ! 198: WRCCR_I wr %r20, 0x0469, %ccr | |
11491 | .word 0xc1bfe000 ! 199: STDFA_I stda %f0, [0x0000, %r31] | |
11492 | trapasi_2_128: | |
11493 | nop | |
11494 | mov 0x0, %r1 ! (VA for ASI 0x73) | |
11495 | .word 0xe0d04e60 ! 200: LDSHA_R ldsha [%r1, %r0] 0x73, %r16 | |
11496 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl | |
11497 | reduce_priv_lvl_2_129: | |
11498 | ta T_CHANGE_NONHPRIV ! macro | |
11499 | nop | |
11500 | nop | |
11501 | ta T_CHANGE_PRIV | |
11502 | wrpr %g0, %g0, %gl | |
11503 | nop | |
11504 | nop | |
11505 | setx join_lbl_0_0, %g1, %g2 | |
11506 | jmp %g2 | |
11507 | nop | |
11508 | fork_lbl_0_1: | |
11509 | ta T_CHANGE_NONHPRIV | |
11510 | .word 0xe08008a0 ! 1: LDUWA_R lduwa [%r0, %r0] 0x45, %r16 | |
11511 | .word 0xe19fda00 ! 2: LDDFA_R ldda [%r31, %r0], %f16 | |
11512 | .word 0xe08008a0 ! 3: LDUWA_R lduwa [%r0, %r0] 0x45, %r16 | |
11513 | .word 0x89800011 ! 4: WRTICK_R wr %r0, %r17, %tick | |
11514 | .word 0x8d802004 ! 5: WRFPRS_I wr %r0, 0x0004, %fprs | |
11515 | .word 0x28800001 ! 1: BLEU bleu,a <label_0x1> | |
11516 | .word 0x8d903e3f ! 6: WRPR_PSTATE_I wrpr %r0, 0x1e3f, %pstate | |
11517 | .word 0xe0bfc020 ! 7: STDA_R stda %r16, [%r31 + %r0] 0x01 | |
11518 | #if (defined SPC || defined CMP1) | |
11519 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_2) + 16, 16, 16)) -> intp(3,0,21) | |
11520 | #else | |
11521 | setx 0x864829281e011335, %r1, %r28 | |
11522 | stxa %r28, [%g0] 0x73 | |
11523 | #endif | |
11524 | intvec_1_2: | |
11525 | .word 0x39400001 ! 8: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
11526 | .word 0xc32fc000 ! 9: STXFSR_R st-sfr %f1, [%r0, %r31] | |
11527 | splash_lsu_1_3: | |
11528 | nop | |
11529 | ta T_CHANGE_HPRIV | |
11530 | set 0x7a439636, %r2 | |
11531 | mov 0x3, %r1 | |
11532 | sllx %r1, 32, %r1 | |
11533 | or %r1, %r2, %r2 | |
11534 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
11535 | ta T_CHANGE_NONHPRIV | |
11536 | .word 0x3d400001 ! 10: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
11537 | .word 0x2a780001 ! 11: BPCS <illegal instruction> | |
11538 | splash_decr_1_4: | |
11539 | nop | |
11540 | ta T_CHANGE_HPRIV | |
11541 | mov 8, %r1 | |
11542 | stxa %r13, [%r1] 0x45 | |
11543 | .word 0xa7828004 ! 12: WR_GRAPHICS_STATUS_REG_R wr %r10, %r4, %- | |
11544 | fpinit_1_5: | |
11545 | nop | |
11546 | setx fp_data_quads, %r19, %r20 | |
11547 | ldd [%r20], %f0 | |
11548 | ldd [%r20+8], %f4 | |
11549 | ld [%r20+16], %fsr | |
11550 | ld [%r20+24], %r19 | |
11551 | wr %r19, %g0, %gsr | |
11552 | .word 0x91a009a4 ! 13: FDIVs fdivs %f0, %f4, %f8 | |
11553 | invalw | |
11554 | mov 0xb5, %r30 | |
11555 | .word 0x91d0001e ! 14: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
11556 | .word 0x879cc012 ! 15: WRHPR_HINTP_R wrhpr %r19, %r18, %hintp | |
11557 | .word 0xa7703f5a ! 16: POPC_I popc 0x1f5a, %r19 | |
11558 | .word 0x8780201c ! 17: WRASI_I wr %r0, 0x001c, %asi | |
11559 | .word 0xc3e9002a ! 18: PREFETCHA_R prefetcha [%r4, %r10] 0x01, #one_read | |
11560 | .word 0xa5a00174 ! 19: FABSq dis not found | |
11561 | ||
11562 | .word 0xe49fe1f0 ! 20: LDDA_I ldda [%r31, + 0x01f0] %asi, %r18 | |
11563 | .word 0xe44fe158 ! 21: LDSB_I ldsb [%r31 + 0x0158], %r18 | |
11564 | memptr_1_8: | |
11565 | set 0x60140000, %r31 | |
11566 | .word 0x8582ab00 ! 22: WRCCR_I wr %r10, 0x0b00, %ccr | |
11567 | splash_tba_1_9: | |
11568 | nop | |
11569 | ta T_CHANGE_PRIV | |
11570 | setx 0x0000000000380000, %r11, %r12 | |
11571 | .word 0x8b90000c ! 23: WRPR_TBA_R wrpr %r0, %r12, %tba | |
11572 | nop | |
11573 | ta T_CHANGE_HPRIV | |
11574 | mov 0x1+1, %r10 | |
11575 | set sync_thr_counter5, %r23 | |
11576 | #ifndef SPC | |
11577 | ldxa [%g0]0x63, %o1 | |
11578 | and %o1, 0x38, %o1 | |
11579 | add %o1, %r23, %r23 | |
11580 | sllx %o1, 5, %o3 !(CID*256) | |
11581 | #endif | |
11582 | cas [%r23],%g0,%r10 !lock | |
11583 | brnz %r10, cwq_1_10 | |
11584 | rd %asi, %r12 | |
11585 | wr %g0, 0x40, %asi | |
11586 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
11587 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
11588 | cmp %l1, 1 | |
11589 | bne cwq_1_10 | |
11590 | set CWQ_BASE, %l6 | |
11591 | #ifndef SPC | |
11592 | add %l6, %o3, %l6 | |
11593 | #endif | |
11594 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
11595 | best_set_reg(0x206100a0, %l1, %l2) !# Control Word | |
11596 | sllx %l2, 32, %l2 | |
11597 | stx %l2, [%l6 + 0x0] | |
11598 | membar #Sync | |
11599 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
11600 | sub %l2, 0x40, %l2 | |
11601 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
11602 | wr %r12, %g0, %asi | |
11603 | st %g0, [%r23] | |
11604 | cwq_1_10: | |
11605 | ta T_CHANGE_NONHPRIV | |
11606 | .word 0xa1414000 ! 24: RDPC rd %pc, %r16 | |
11607 | .word 0x8d9033bd ! 25: WRPR_PSTATE_I wrpr %r0, 0x13bd, %pstate | |
11608 | brcommon1_1_12: | |
11609 | nop | |
11610 | setx common_target, %r12, %r27 | |
11611 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
11612 | ba,a .+12 | |
11613 | .word 0xa1702040 ! 1: POPC_I popc 0x0040, %r16 | |
11614 | ba,a .+8 | |
11615 | jmpl %r27+0, %r27 | |
11616 | .word 0xa9a189a1 ! 26: FDIVs fdivs %f6, %f1, %f20 | |
11617 | intveclr_1_13: | |
11618 | nop | |
11619 | ta T_CHANGE_HPRIV | |
11620 | setx 0x12d34a0fa10bc542, %r1, %r28 | |
11621 | stxa %r28, [%g0] 0x72 | |
11622 | ta T_CHANGE_NONHPRIV | |
11623 | .word 0x25400001 ! 27: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
11624 | splash_lsu_1_14: | |
11625 | nop | |
11626 | ta T_CHANGE_HPRIV | |
11627 | set 0x911b5386, %r2 | |
11628 | mov 0x6, %r1 | |
11629 | sllx %r1, 32, %r1 | |
11630 | or %r1, %r2, %r2 | |
11631 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
11632 | ta T_CHANGE_NONHPRIV | |
11633 | .word 0x3d400001 ! 28: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
11634 | splash_cmpr_1_15: | |
11635 | mov 0, %r18 | |
11636 | sllx %r18, 63, %r18 | |
11637 | rd %tick, %r17 | |
11638 | add %r17, 0x70, %r17 | |
11639 | or %r17, %r18, %r17 | |
11640 | ta T_CHANGE_HPRIV | |
11641 | wrhpr %r17, %g0, %hsys_tick_cmpr | |
11642 | .word 0xb3800011 ! 29: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
11643 | brcommon1_1_16: | |
11644 | nop | |
11645 | setx common_target, %r12, %r27 | |
11646 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
11647 | ba,a .+12 | |
11648 | .word 0xa9b7c7d2 ! 1: PDIST pdistn %d62, %d18, %d20 | |
11649 | ba,a .+8 | |
11650 | jmpl %r27+0, %r27 | |
11651 | .word 0x91702d27 ! 30: POPC_I popc 0x0d27, %r8 | |
11652 | .word 0xd03fc000 ! 31: STD_R std %r8, [%r31 + %r0] | |
11653 | splash_tba_1_17: | |
11654 | nop | |
11655 | ta T_CHANGE_PRIV | |
11656 | setx 0x0000000000380000, %r11, %r12 | |
11657 | .word 0x8b90000c ! 32: WRPR_TBA_R wrpr %r0, %r12, %tba | |
11658 | ibp_1_18: | |
11659 | nop | |
11660 | .word 0xd09fc02b ! 33: LDDA_R ldda [%r31, %r11] 0x01, %r8 | |
11661 | .word 0xd127c000 ! 34: STF_R st %f8, [%r0, %r31] | |
11662 | .word 0xd0c7e118 ! 35: LDSWA_I ldswa [%r31, + 0x0118] %asi, %r8 | |
11663 | ibp_1_19: | |
11664 | nop | |
11665 | .word 0xd0bfc02b ! 36: STDA_R stda %r8, [%r31 + %r11] 0x01 | |
11666 | splash_cmpr_1_20: | |
11667 | mov 0, %r18 | |
11668 | sllx %r18, 63, %r18 | |
11669 | rd %tick, %r17 | |
11670 | add %r17, 0x80, %r17 | |
11671 | or %r17, %r18, %r17 | |
11672 | .word 0xb3800011 ! 37: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
11673 | .word 0xc19fe000 ! 38: LDDFA_I ldda [%r31, 0x0000], %f0 | |
11674 | nop | |
11675 | ta T_CHANGE_HPRIV | |
11676 | mov 0x1+1, %r10 | |
11677 | set sync_thr_counter5, %r23 | |
11678 | #ifndef SPC | |
11679 | ldxa [%g0]0x63, %o1 | |
11680 | and %o1, 0x38, %o1 | |
11681 | add %o1, %r23, %r23 | |
11682 | sllx %o1, 5, %o3 !(CID*256) | |
11683 | #endif | |
11684 | cas [%r23],%g0,%r10 !lock | |
11685 | brnz %r10, cwq_1_21 | |
11686 | rd %asi, %r12 | |
11687 | wr %g0, 0x40, %asi | |
11688 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
11689 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
11690 | cmp %l1, 1 | |
11691 | bne cwq_1_21 | |
11692 | set CWQ_BASE, %l6 | |
11693 | #ifndef SPC | |
11694 | add %l6, %o3, %l6 | |
11695 | #endif | |
11696 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
11697 | best_set_reg(0x206100c0, %l1, %l2) !# Control Word | |
11698 | sllx %l2, 32, %l2 | |
11699 | stx %l2, [%l6 + 0x0] | |
11700 | membar #Sync | |
11701 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
11702 | sub %l2, 0x40, %l2 | |
11703 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
11704 | wr %r12, %g0, %asi | |
11705 | st %g0, [%r23] | |
11706 | cwq_1_21: | |
11707 | ta T_CHANGE_NONHPRIV | |
11708 | .word 0x91414000 ! 39: RDPC rd %pc, %r8 | |
11709 | .word 0xc3eb0024 ! 40: PREFETCHA_R prefetcha [%r12, %r4] 0x01, #one_read | |
11710 | jmptr_1_23: | |
11711 | nop | |
11712 | best_set_reg(0xe0200000, %r20, %r27) | |
11713 | .word 0xb7c6c000 ! 41: JMPL_R jmpl %r27 + %r0, %r27 | |
11714 | .word 0xa7508000 ! 42: RDPR_TSTATE <illegal instruction> | |
11715 | .word 0xe6dfe0c0 ! 43: LDXA_I ldxa [%r31, + 0x00c0] %asi, %r19 | |
11716 | .word 0x95a109c9 ! 44: FDIVd fdivd %f4, %f40, %f10 | |
11717 | .word 0x9f80217f ! 45: SIR sir 0x017f | |
11718 | br_longdelay4_1_26: | |
11719 | nop | |
11720 | not %g0, %r12 | |
11721 | jmp %r12 | |
11722 | .word 0x9d902002 ! 46: WRPR_WSTATE_I wrpr %r0, 0x0002, %wstate | |
11723 | setx 0xbe6d4826d4c92419, %r1, %r28 | |
11724 | stxa %r28, [%g0] 0x73 | |
11725 | intvec_1_27: | |
11726 | .word 0x39400001 ! 47: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
11727 | .word 0xa7b44493 ! 48: FCMPLE32 fcmple32 %d48, %d50, %r19 | |
11728 | .word 0xe677c000 ! 49: STX_R stx %r19, [%r31 + %r0] | |
11729 | intveclr_1_29: | |
11730 | nop | |
11731 | ta T_CHANGE_HPRIV | |
11732 | setx 0xe19ffcc836aa4d81, %r1, %r28 | |
11733 | stxa %r28, [%g0] 0x72 | |
11734 | ta T_CHANGE_NONHPRIV | |
11735 | .word 0x25400001 ! 50: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
11736 | mondo_1_30: | |
11737 | nop | |
11738 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
11739 | ta T_CHANGE_PRIV | |
11740 | stxa %r19, [%r0+0x3c8] %asi | |
11741 | .word 0x9d948011 ! 51: WRPR_WSTATE_R wrpr %r18, %r17, %wstate | |
11742 | .word 0xe63fe138 ! 52: STD_I std %r19, [%r31 + 0x0138] | |
11743 | .word 0xa784720a ! 53: WR_GRAPHICS_STATUS_REG_I wr %r17, 0x120a, %- | |
11744 | .word 0xe71fc000 ! 54: LDDF_R ldd [%r31, %r0], %f19 | |
11745 | .word 0x2accc001 ! 1: BRNZ brnz,a,pt %r19,<label_0xcc001> | |
11746 | .word 0x8d9029a3 ! 55: WRPR_PSTATE_I wrpr %r0, 0x09a3, %pstate | |
11747 | splash_tba_1_32: | |
11748 | nop | |
11749 | ta T_CHANGE_PRIV | |
11750 | set 0x120000, %r12 | |
11751 | .word 0x8b90000c ! 56: WRPR_TBA_R wrpr %r0, %r12, %tba | |
11752 | .word 0xa9a409d3 ! 57: FDIVd fdivd %f16, %f50, %f20 | |
11753 | .word 0x89800011 ! 58: WRTICK_R wr %r0, %r17, %tick | |
11754 | ibp_1_35: | |
11755 | nop | |
11756 | .word 0xc32fc00b ! 59: STXFSR_R st-sfr %f1, [%r11, %r31] | |
11757 | .word 0xe8cfe008 ! 60: LDSBA_I ldsba [%r31, + 0x0008] %asi, %r20 | |
11758 | .word 0x9ba209b3 ! 61: FDIVs fdivs %f8, %f19, %f13 | |
11759 | ceter_1_37: | |
11760 | nop | |
11761 | ta T_CHANGE_HPRIV | |
11762 | mov 7, %r17 | |
11763 | sllx %r17, 60, %r17 | |
11764 | mov 0x18, %r16 | |
11765 | stxa %r17, [%r16]0x4c | |
11766 | ta T_CHANGE_NONHPRIV | |
11767 | .word 0x93410000 ! 62: RDTICK rd %tick, %r9 | |
11768 | .word 0xd31fe040 ! 63: LDDF_I ldd [%r31, 0x0040], %f9 | |
11769 | mondo_1_39: | |
11770 | nop | |
11771 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
11772 | stxa %r20, [%r0+0x3e8] %asi | |
11773 | .word 0x9d920004 ! 64: WRPR_WSTATE_R wrpr %r8, %r4, %wstate | |
11774 | .word 0xc30fc000 ! 65: LDXFSR_R ld-fsr [%r31, %r0], %f1 | |
11775 | fpinit_1_41: | |
11776 | nop | |
11777 | setx fp_data_quads, %r19, %r20 | |
11778 | ldd [%r20], %f0 | |
11779 | ldd [%r20+8], %f4 | |
11780 | ld [%r20+16], %fsr | |
11781 | ld [%r20+24], %r19 | |
11782 | wr %r19, %g0, %gsr | |
11783 | .word 0x87a80a44 ! 66: FCMPd fcmpd %fcc<n>, %f0, %f4 | |
11784 | nop | |
11785 | ta T_CHANGE_HPRIV ! macro | |
11786 | donret_1_42: | |
11787 | rd %pc, %r12 | |
11788 | add %r12, (donretarg_1_42-donret_1_42+4), %r12 | |
11789 | add %r12, 0x4, %r11 ! seq tnpc | |
11790 | wrpr %g0, 0x1, %tl | |
11791 | wrpr %g0, %r12, %tpc | |
11792 | wrpr %g0, %r11, %tnpc | |
11793 | set (0x0091d700 | (0x89 << 24)), %r13 | |
11794 | and %r12, 0xfff, %r14 | |
11795 | sllx %r14, 30, %r14 | |
11796 | or %r13, %r14, %r20 | |
11797 | wrpr %r20, %g0, %tstate | |
11798 | wrhpr %g0, 0xed9, %htstate | |
11799 | ta T_CHANGE_NONHPRIV ! rand=1 (1) | |
11800 | retry | |
11801 | donretarg_1_42: | |
11802 | .word 0xd26fe055 ! 67: LDSTUB_I ldstub %r9, [%r31 + 0x0055] | |
11803 | ibp_1_43: | |
11804 | nop | |
11805 | .word 0xc3ed0032 ! 68: PREFETCHA_R prefetcha [%r20, %r18] 0x01, #one_read | |
11806 | splash_tba_1_44: | |
11807 | nop | |
11808 | ta T_CHANGE_PRIV | |
11809 | set 0x120000, %r12 | |
11810 | .word 0x8b90000c ! 69: WRPR_TBA_R wrpr %r0, %r12, %tba | |
11811 | jmptr_1_45: | |
11812 | nop | |
11813 | best_set_reg(0xe0200000, %r20, %r27) | |
11814 | .word 0xb7c6c000 ! 70: JMPL_R jmpl %r27 + %r0, %r27 | |
11815 | .word 0xe6dfe0a8 ! 71: LDXA_I ldxa [%r31, + 0x00a8] %asi, %r19 | |
11816 | .word 0xe737e098 ! 72: STQF_I - %f19, [0x0098, %r31] | |
11817 | nop | |
11818 | mov 0x80, %g3 | |
11819 | stxa %g3, [%g3] 0x57 | |
11820 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
11821 | .word 0xe65fc000 ! 73: LDX_R ldx [%r31 + %r0], %r19 | |
11822 | set 0x27e9, %l3 | |
11823 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT | |
11824 | .word 0x93b4c7d4 ! 74: PDIST pdistn %d50, %d20, %d40 | |
11825 | .word 0xd22fe158 ! 75: STB_I stb %r9, [%r31 + 0x0158] | |
11826 | nop | |
11827 | mov 0x80, %g3 | |
11828 | stxa %g3, [%g3] 0x5f | |
11829 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
11830 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 | |
11831 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
11832 | .word 0xd25fc000 ! 76: LDX_R ldx [%r31 + %r0], %r9 | |
11833 | .word 0x9194c014 ! 77: WRPR_PIL_R wrpr %r19, %r20, %pil | |
11834 | .word 0xd33fc00c ! 78: STDF_R std %f9, [%r12, %r31] | |
11835 | .word 0x91d020b5 ! 79: Tcc_I ta icc_or_xcc, %r0 + 181 | |
11836 | .word 0x89800011 ! 80: WRTICK_R wr %r0, %r17, %tick | |
11837 | splash_tba_1_49: | |
11838 | nop | |
11839 | ta T_CHANGE_PRIV | |
11840 | setx 0x0000000000380000, %r11, %r12 | |
11841 | .word 0x8b90000c ! 81: WRPR_TBA_R wrpr %r0, %r12, %tba | |
11842 | intveclr_1_50: | |
11843 | nop | |
11844 | ta T_CHANGE_HPRIV | |
11845 | setx 0xc6abd848c920c73c, %r1, %r28 | |
11846 | stxa %r28, [%g0] 0x72 | |
11847 | .word 0x25400001 ! 82: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
11848 | nop | |
11849 | mov 0x80, %g3 | |
11850 | stxa %g3, [%g3] 0x5f | |
11851 | .word 0xd25fc000 ! 83: LDX_R ldx [%r31 + %r0], %r9 | |
11852 | .word 0xd337e1ac ! 84: STQF_I - %f9, [0x01ac, %r31] | |
11853 | memptr_1_51: | |
11854 | set user_data_start, %r31 | |
11855 | .word 0x8581646f ! 85: WRCCR_I wr %r5, 0x046f, %ccr | |
11856 | invalw | |
11857 | mov 0xb1, %r30 | |
11858 | .word 0x83d0001e ! 86: Tcc_R te icc_or_xcc, %r0 + %r30 | |
11859 | .word 0xd327c000 ! 87: STF_R st %f9, [%r0, %r31] | |
11860 | jmptr_1_52: | |
11861 | nop | |
11862 | best_set_reg(0xe0200000, %r20, %r27) | |
11863 | .word 0xb7c6c000 ! 88: JMPL_R jmpl %r27 + %r0, %r27 | |
11864 | setx 0x7edcfa3ff8215ece, %r1, %r28 | |
11865 | stxa %r28, [%g0] 0x73 | |
11866 | intvec_1_53: | |
11867 | .word 0x39400001 ! 89: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
11868 | jmptr_1_54: | |
11869 | nop | |
11870 | best_set_reg(0xe0200000, %r20, %r27) | |
11871 | .word 0xb7c6c000 ! 90: JMPL_R jmpl %r27 + %r0, %r27 | |
11872 | pmu_1_55: | |
11873 | nop | |
11874 | setx 0xfffff549fffffd38, %g1, %g7 | |
11875 | .word 0xa3800007 ! 91: WR_PERF_COUNTER_R wr %r0, %r7, %- | |
11876 | .word 0xd28008a0 ! 92: LDUWA_R lduwa [%r0, %r0] 0x45, %r9 | |
11877 | nop | |
11878 | ta T_CHANGE_HPRIV | |
11879 | mov 0x1+1, %r10 | |
11880 | set sync_thr_counter5, %r23 | |
11881 | #ifndef SPC | |
11882 | ldxa [%g0]0x63, %o1 | |
11883 | and %o1, 0x38, %o1 | |
11884 | add %o1, %r23, %r23 | |
11885 | sllx %o1, 5, %o3 !(CID*256) | |
11886 | #endif | |
11887 | cas [%r23],%g0,%r10 !lock | |
11888 | brnz %r10, cwq_1_56 | |
11889 | rd %asi, %r12 | |
11890 | wr %g0, 0x40, %asi | |
11891 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
11892 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
11893 | cmp %l1, 1 | |
11894 | bne cwq_1_56 | |
11895 | set CWQ_BASE, %l6 | |
11896 | #ifndef SPC | |
11897 | add %l6, %o3, %l6 | |
11898 | #endif | |
11899 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
11900 | best_set_reg(0x206100b0, %l1, %l2) !# Control Word | |
11901 | sllx %l2, 32, %l2 | |
11902 | stx %l2, [%l6 + 0x0] | |
11903 | membar #Sync | |
11904 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
11905 | sub %l2, 0x40, %l2 | |
11906 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
11907 | wr %r12, %g0, %asi | |
11908 | st %g0, [%r23] | |
11909 | cwq_1_56: | |
11910 | ta T_CHANGE_NONHPRIV | |
11911 | .word 0xa1414000 ! 93: RDPC rd %pc, %r16 | |
11912 | brcommon3_1_57: | |
11913 | nop | |
11914 | setx common_target, %r12, %r27 | |
11915 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
11916 | ba,a .+12 | |
11917 | .word 0xe06fe0a0 ! 1: LDSTUB_I ldstub %r16, [%r31 + 0x00a0] | |
11918 | ba,a .+8 | |
11919 | jmpl %r27+0, %r27 | |
11920 | .word 0xe09fc030 ! 94: LDDA_R ldda [%r31, %r16] 0x01, %r16 | |
11921 | splash_lsu_1_58: | |
11922 | nop | |
11923 | ta T_CHANGE_HPRIV | |
11924 | set 0x7d51e587, %r2 | |
11925 | mov 0x4, %r1 | |
11926 | sllx %r1, 32, %r1 | |
11927 | or %r1, %r2, %r2 | |
11928 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
11929 | ta T_CHANGE_NONHPRIV | |
11930 | .word 0x3d400001 ! 95: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
11931 | mondo_1_59: | |
11932 | nop | |
11933 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
11934 | ta T_CHANGE_PRIV | |
11935 | stxa %r13, [%r0+0x3e0] %asi | |
11936 | .word 0x9d950013 ! 96: WRPR_WSTATE_R wrpr %r20, %r19, %wstate | |
11937 | ibp_1_60: | |
11938 | nop | |
11939 | ta T_CHANGE_NONHPRIV | |
11940 | .word 0xe19fda00 ! 97: LDDFA_R ldda [%r31, %r0], %f16 | |
11941 | .word 0xe19fda00 ! 98: LDDFA_R ldda [%r31, %r0], %f16 | |
11942 | nop | |
11943 | ta T_CHANGE_HPRIV | |
11944 | mov 0x1+1, %r10 | |
11945 | set sync_thr_counter5, %r23 | |
11946 | #ifndef SPC | |
11947 | ldxa [%g0]0x63, %o1 | |
11948 | and %o1, 0x38, %o1 | |
11949 | add %o1, %r23, %r23 | |
11950 | sllx %o1, 5, %o3 !(CID*256) | |
11951 | #endif | |
11952 | cas [%r23],%g0,%r10 !lock | |
11953 | brnz %r10, cwq_1_61 | |
11954 | rd %asi, %r12 | |
11955 | wr %g0, 0x40, %asi | |
11956 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
11957 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
11958 | cmp %l1, 1 | |
11959 | bne cwq_1_61 | |
11960 | set CWQ_BASE, %l6 | |
11961 | #ifndef SPC | |
11962 | add %l6, %o3, %l6 | |
11963 | #endif | |
11964 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
11965 | best_set_reg(0x206100a0, %l1, %l2) !# Control Word | |
11966 | sllx %l2, 32, %l2 | |
11967 | stx %l2, [%l6 + 0x0] | |
11968 | membar #Sync | |
11969 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
11970 | sub %l2, 0x40, %l2 | |
11971 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
11972 | wr %r12, %g0, %asi | |
11973 | st %g0, [%r23] | |
11974 | cwq_1_61: | |
11975 | ta T_CHANGE_NONHPRIV | |
11976 | .word 0x9b414000 ! 99: RDPC rd %pc, %r13 | |
11977 | .word 0xdb37e140 ! 100: STQF_I - %f13, [0x0140, %r31] | |
11978 | .word 0xc3eb4024 ! 101: PREFETCHA_R prefetcha [%r13, %r4] 0x01, #one_read | |
11979 | .word 0x89800011 ! 102: WRTICK_R wr %r0, %r17, %tick | |
11980 | cwp_1_64: | |
11981 | set user_data_start, %o7 | |
11982 | .word 0x93902007 ! 103: WRPR_CWP_I wrpr %r0, 0x0007, %cwp | |
11983 | splash_lsu_1_65: | |
11984 | nop | |
11985 | ta T_CHANGE_HPRIV | |
11986 | set 0x8ae569f7, %r2 | |
11987 | mov 0x2, %r1 | |
11988 | sllx %r1, 32, %r1 | |
11989 | or %r1, %r2, %r2 | |
11990 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
11991 | ta T_CHANGE_NONHPRIV | |
11992 | .word 0x3d400001 ! 104: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
11993 | splash_lsu_1_66: | |
11994 | nop | |
11995 | ta T_CHANGE_HPRIV | |
11996 | set 0x44754d2a, %r2 | |
11997 | mov 0x2, %r1 | |
11998 | sllx %r1, 32, %r1 | |
11999 | or %r1, %r2, %r2 | |
12000 | stxa %r2, [%r0] ASI_LSU_CONTROL | |
12001 | .word 0x3d400001 ! 105: FBPULE fbule,a,pn %fcc0, <label_0x1> | |
12002 | fpinit_1_67: | |
12003 | nop | |
12004 | setx fp_data_quads, %r19, %r20 | |
12005 | ldd [%r20], %f0 | |
12006 | ldd [%r20+8], %f4 | |
12007 | ld [%r20+16], %fsr | |
12008 | ld [%r20+24], %r19 | |
12009 | wr %r19, %g0, %gsr | |
12010 | .word 0x89a009a4 ! 106: FDIVs fdivs %f0, %f4, %f4 | |
12011 | ibp_1_68: | |
12012 | nop | |
12013 | ta T_CHANGE_NONHPRIV | |
12014 | .word 0x97a409a4 ! 107: FDIVs fdivs %f16, %f4, %f11 | |
12015 | ta T_CHANGE_NONHPRIV | |
12016 | .word 0x8143e011 ! 108: MEMBAR membar #LoadLoad | #Lookaside | |
12017 | intveclr_1_70: | |
12018 | nop | |
12019 | ta T_CHANGE_HPRIV | |
12020 | setx 0x003f33467c26414a, %r1, %r28 | |
12021 | stxa %r28, [%g0] 0x72 | |
12022 | .word 0x25400001 ! 109: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
12023 | nop | |
12024 | ta T_CHANGE_HPRIV | |
12025 | mov 0x1, %r10 | |
12026 | set sync_thr_counter6, %r23 | |
12027 | #ifndef SPC | |
12028 | ldxa [%g0]0x63, %o1 | |
12029 | and %o1, 0x38, %o1 | |
12030 | add %o1, %r23, %r23 | |
12031 | #endif | |
12032 | cas [%r23],%g0,%r10 !lock | |
12033 | brnz %r10, sma_1_71 | |
12034 | rd %asi, %r12 | |
12035 | wr %g0, 0x40, %asi | |
12036 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 | |
12037 | set 0x00021fff, %g1 | |
12038 | stxa %g1, [%g0 + 0x80] %asi | |
12039 | wr %r12, %g0, %asi | |
12040 | st %g0, [%r23] | |
12041 | sma_1_71: | |
12042 | ta T_CHANGE_NONHPRIV | |
12043 | .word 0xd7e7e009 ! 110: CASA_R casa [%r31] %asi, %r9, %r11 | |
12044 | .word 0xc1bfe160 ! 111: STDFA_I stda %f0, [0x0160, %r31] | |
12045 | nop | |
12046 | ta T_CHANGE_HPRIV ! macro | |
12047 | donret_1_72: | |
12048 | rd %pc, %r12 | |
12049 | add %r12, (donretarg_1_72-donret_1_72), %r12 | |
12050 | add %r12, 0x8, %r11 ! nonseq tnpc | |
12051 | wrpr %g0, 0x2, %tl | |
12052 | wrpr %g0, %r12, %tpc | |
12053 | wrpr %g0, %r11, %tnpc | |
12054 | set (0x0045b400 | (4 << 24)), %r13 | |
12055 | and %r12, 0xfff, %r14 | |
12056 | sllx %r14, 30, %r14 | |
12057 | or %r13, %r14, %r20 | |
12058 | wrpr %r20, %g0, %tstate | |
12059 | wrhpr %g0, 0xd8c, %htstate | |
12060 | ta T_CHANGE_NONPRIV ! rand=0 (1) | |
12061 | .word 0x3a800001 ! 1: BCC bcc,a <label_0x1> | |
12062 | retry | |
12063 | donretarg_1_72: | |
12064 | .word 0x93a449c8 ! 112: FDIVd fdivd %f48, %f8, %f40 | |
12065 | ibp_1_73: | |
12066 | nop | |
12067 | .word 0xd2dfc034 ! 113: LDXA_R ldxa [%r31, %r20] 0x01, %r9 | |
12068 | .word 0xc19fe180 ! 114: LDDFA_I ldda [%r31, 0x0180], %f0 | |
12069 | .word 0x8d903e8d ! 115: WRPR_PSTATE_I wrpr %r0, 0x1e8d, %pstate | |
12070 | .word 0x8780201c ! 116: WRASI_I wr %r0, 0x001c, %asi | |
12071 | #if (defined SPC || defined CMP1) | |
12072 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_76) + 8, 16, 16)) -> intp(6,0,12) | |
12073 | #else | |
12074 | setx 0x2c0eea58c154aa2a, %r1, %r28 | |
12075 | stxa %r28, [%g0] 0x73 | |
12076 | #endif | |
12077 | intvec_1_76: | |
12078 | .word 0x39400001 ! 117: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
12079 | ibp_1_77: | |
12080 | nop | |
12081 | ta T_CHANGE_NONHPRIV | |
12082 | .word 0x97b487d1 ! 118: PDIST pdistn %d18, %d48, %d42 | |
12083 | .word 0x93d02032 ! 119: Tcc_I tne icc_or_xcc, %r0 + 50 | |
12084 | mondo_1_78: | |
12085 | nop | |
12086 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
12087 | ta T_CHANGE_PRIV | |
12088 | stxa %r7, [%r0+0x3e0] %asi | |
12089 | .word 0x9d92c004 ! 120: WRPR_WSTATE_R wrpr %r11, %r4, %wstate | |
12090 | ibp_1_79: | |
12091 | nop | |
12092 | .word 0xc19fda00 ! 121: LDDFA_R ldda [%r31, %r0], %f0 | |
12093 | ibp_1_80: | |
12094 | nop | |
12095 | ta T_CHANGE_NONHPRIV | |
12096 | .word 0x91a2c9c2 ! 122: FDIVd fdivd %f42, %f2, %f8 | |
12097 | .word 0x8d802004 ! 123: WRFPRS_I wr %r0, 0x0004, %fprs | |
12098 | splash_hpstate_1_81: | |
12099 | ta T_CHANGE_NONHPRIV | |
12100 | .word 0x25400001 ! 1: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
12101 | .word 0x81982497 ! 124: WRHPR_HPSTATE_I wrhpr %r0, 0x0497, %hpstate | |
12102 | ibp_1_82: | |
12103 | nop | |
12104 | ta T_CHANGE_NONHPRIV | |
12105 | .word 0xc32fc00a ! 125: STXFSR_R st-sfr %f1, [%r10, %r31] | |
12106 | nop | |
12107 | ta T_CHANGE_HPRIV ! macro | |
12108 | donret_1_83: | |
12109 | rd %pc, %r12 | |
12110 | add %r12, (donretarg_1_83-donret_1_83+4), %r12 | |
12111 | add %r12, 0x4, %r11 ! seq tnpc | |
12112 | wrpr %g0, 0x2, %tl | |
12113 | wrpr %g0, %r12, %tpc | |
12114 | wrpr %g0, %r11, %tnpc | |
12115 | set (0x008d6600 | (0x4f << 24)), %r13 | |
12116 | and %r12, 0xfff, %r14 | |
12117 | sllx %r14, 30, %r14 | |
12118 | or %r13, %r14, %r20 | |
12119 | wrpr %r20, %g0, %tstate | |
12120 | wrhpr %g0, 0x1d55, %htstate | |
12121 | ta T_CHANGE_NONHPRIV ! rand=1 (1) | |
12122 | .word 0x24cc4001 ! 1: BRLEZ brlez,a,pt %r17,<label_0xc4001> | |
12123 | done | |
12124 | donretarg_1_83: | |
12125 | .word 0x3a800001 ! 126: BCC bcc,a <label_0x1> | |
12126 | .word 0xd09fc033 ! 127: LDDA_R ldda [%r31, %r19] 0x01, %r8 | |
12127 | nop | |
12128 | mov 0x80, %g3 | |
12129 | stxa %g3, [%g3] 0x57 | |
12130 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
12131 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate | |
12132 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 | |
12133 | .word 0xd05fc000 ! 128: LDX_R ldx [%r31 + %r0], %r8 | |
12134 | .word 0x24800001 ! 129: BLE ble,a <label_0x1> | |
12135 | memptr_1_85: | |
12136 | set 0x60740000, %r31 | |
12137 | .word 0x85846102 ! 130: WRCCR_I wr %r17, 0x0102, %ccr | |
12138 | .word 0x22800001 ! 131: BE be,a <label_0x1> | |
12139 | ibp_1_86: | |
12140 | nop | |
12141 | .word 0xc19fd960 ! 132: LDDFA_R ldda [%r31, %r0], %f0 | |
12142 | .word 0x9ba00165 ! 133: FABSq dis not found | |
12143 | ||
12144 | .word 0xdad7e010 ! 134: LDSHA_I ldsha [%r31, + 0x0010] %asi, %r13 | |
12145 | .word 0x93a0c9c6 ! 135: FDIVd fdivd %f34, %f6, %f40 | |
12146 | fpinit_1_89: | |
12147 | nop | |
12148 | setx fp_data_quads, %r19, %r20 | |
12149 | ldd [%r20], %f0 | |
12150 | ldd [%r20+8], %f4 | |
12151 | ld [%r20+16], %fsr | |
12152 | ld [%r20+24], %r19 | |
12153 | wr %r19, %g0, %gsr | |
12154 | .word 0x8da009c4 ! 136: FDIVd fdivd %f0, %f4, %f6 | |
12155 | br_badelay2_1_90: | |
12156 | .word 0x20800001 ! 1: BN bn,a <label_0x1> | |
12157 | allclean | |
12158 | .word 0xa1b28310 ! 137: ALIGNADDRESS alignaddr %r10, %r16, %r16 | |
12159 | .word 0xe137e09c ! 138: STQF_I - %f16, [0x009c, %r31] | |
12160 | fpinit_1_91: | |
12161 | nop | |
12162 | setx fp_data_quads, %r19, %r20 | |
12163 | ldd [%r20], %f0 | |
12164 | ldd [%r20+8], %f4 | |
12165 | ld [%r20+16], %fsr | |
12166 | ld [%r20+24], %r19 | |
12167 | wr %r19, %g0, %gsr | |
12168 | .word 0xc3e8273e ! 139: PREFETCHA_I prefetcha [%r0, + 0x073e] %asi, #one_read | |
12169 | .word 0x2cc9c001 ! 1: BRGZ brgz,a,pt %r7,<label_0x9c001> | |
12170 | .word 0x8d903fe4 ! 140: WRPR_PSTATE_I wrpr %r0, 0x1fe4, %pstate | |
12171 | ibp_1_93: | |
12172 | nop | |
12173 | .word 0x9ba4c9a7 ! 141: FDIVs fdivs %f19, %f7, %f13 | |
12174 | .word 0x99a000c6 ! 142: FNEGd fnegd %f6, %f12 | |
12175 | set 0x15e3, %l3 | |
12176 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT | |
12177 | .word 0xa7b207cc ! 143: PDIST pdistn %d8, %d12, %d50 | |
12178 | invalw | |
12179 | mov 0xb2, %r30 | |
12180 | .word 0x83d0001e ! 144: Tcc_R te icc_or_xcc, %r0 + %r30 | |
12181 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
12182 | reduce_priv_lvl_1_94: | |
12183 | ta T_CHANGE_NONPRIV ! macro | |
12184 | memptr_1_95: | |
12185 | set 0x60140000, %r31 | |
12186 | .word 0x8584fc0f ! 146: WRCCR_I wr %r19, 0x1c0f, %ccr | |
12187 | dvapa_1_96: | |
12188 | nop | |
12189 | ta T_CHANGE_HPRIV | |
12190 | mov 0xfd1, %r20 | |
12191 | mov 0x19, %r19 | |
12192 | sllx %r20, 23, %r20 | |
12193 | or %r19, %r20, %r19 | |
12194 | stxa %r19, [%g0] ASI_LSU_CONTROL | |
12195 | mov 0x38, %r18 | |
12196 | stxa %r31, [%r18]0x58 | |
12197 | ta T_CHANGE_NONHPRIV | |
12198 | .word 0xe69fe060 ! 147: LDDA_I ldda [%r31, + 0x0060] %asi, %r19 | |
12199 | splash_decr_1_97: | |
12200 | nop | |
12201 | ta T_CHANGE_HPRIV | |
12202 | mov 8, %r1 | |
12203 | stxa %r14, [%r1] 0x45 | |
12204 | .word 0xa7850008 ! 148: WR_GRAPHICS_STATUS_REG_R wr %r20, %r8, %- | |
12205 | .word 0xe637e1f0 ! 149: STH_I sth %r19, [%r31 + 0x01f0] | |
12206 | #if (defined SPC || defined CMP1) | |
12207 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_98) + 48, 16, 16)) -> intp(0,0,21) | |
12208 | #else | |
12209 | setx 0xac86ccda092db929, %r1, %r28 | |
12210 | stxa %r28, [%g0] 0x73 | |
12211 | #endif | |
12212 | intvec_1_98: | |
12213 | .word 0x39400001 ! 150: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
12214 | intveclr_1_99: | |
12215 | nop | |
12216 | ta T_CHANGE_HPRIV | |
12217 | setx 0xf1afd04ecaf253ea, %r1, %r28 | |
12218 | stxa %r28, [%g0] 0x72 | |
12219 | ta T_CHANGE_NONHPRIV | |
12220 | .word 0x25400001 ! 151: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
12221 | .word 0xe6800be0 ! 152: LDUWA_R lduwa [%r0, %r0] 0x5f, %r19 | |
12222 | .word 0xe62fe0bd ! 153: STB_I stb %r19, [%r31 + 0x00bd] | |
12223 | mondo_1_100: | |
12224 | nop | |
12225 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi | |
12226 | stxa %r4, [%r0+0x3c0] %asi | |
12227 | .word 0x9d948004 ! 154: WRPR_WSTATE_R wrpr %r18, %r4, %wstate | |
12228 | .word 0x9150c000 ! 155: RDPR_TT <illegal instruction> | |
12229 | .word 0x3a800001 ! 156: BCC bcc,a <label_0x1> | |
12230 | brcommon2_1_101: | |
12231 | nop | |
12232 | setx common_target, %r12, %r27 | |
12233 | ba,a .+12 | |
12234 | .word 0x91b7c713 ! 1: FMULD8SUx16 fmuld8ulx16 %f31, %f19, %d8 | |
12235 | ba,a .+8 | |
12236 | jmpl %r27+0, %r27 | |
12237 | .word 0xe1bfe160 ! 157: STDFA_I stda %f16, [0x0160, %r31] | |
12238 | tagged_1_102: | |
12239 | tsubcctv %r18, 0x15dc, %r5 | |
12240 | .word 0xd407e12c ! 158: LDUW_I lduw [%r31 + 0x012c], %r10 | |
12241 | splash_cmpr_1_103: | |
12242 | mov 1, %r18 | |
12243 | sllx %r18, 63, %r18 | |
12244 | rd %tick, %r17 | |
12245 | add %r17, 0x50, %r17 | |
12246 | or %r17, %r18, %r17 | |
12247 | .word 0xaf800011 ! 159: WR_TICK_CMPR_REG_R wr %r0, %r17, %- | |
12248 | .word 0xd5e7c031 ! 160: CASA_I casa [%r31] 0x 1, %r17, %r10 | |
12249 | br_longdelay2_1_104: | |
12250 | .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
12251 | .word 0x39400001 ! 161: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
12252 | nop | |
12253 | ta T_CHANGE_HPRIV | |
12254 | mov 0x1+1, %r10 | |
12255 | set sync_thr_counter5, %r23 | |
12256 | #ifndef SPC | |
12257 | ldxa [%g0]0x63, %o1 | |
12258 | and %o1, 0x38, %o1 | |
12259 | add %o1, %r23, %r23 | |
12260 | sllx %o1, 5, %o3 !(CID*256) | |
12261 | #endif | |
12262 | cas [%r23],%g0,%r10 !lock | |
12263 | brnz %r10, cwq_1_105 | |
12264 | rd %asi, %r12 | |
12265 | wr %g0, 0x40, %asi | |
12266 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
12267 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
12268 | cmp %l1, 1 | |
12269 | bne cwq_1_105 | |
12270 | set CWQ_BASE, %l6 | |
12271 | #ifndef SPC | |
12272 | add %l6, %o3, %l6 | |
12273 | #endif | |
12274 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
12275 | best_set_reg(0x206100b0, %l1, %l2) !# Control Word | |
12276 | sllx %l2, 32, %l2 | |
12277 | stx %l2, [%l6 + 0x0] | |
12278 | membar #Sync | |
12279 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
12280 | sub %l2, 0x40, %l2 | |
12281 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
12282 | wr %r12, %g0, %asi | |
12283 | st %g0, [%r23] | |
12284 | cwq_1_105: | |
12285 | ta T_CHANGE_NONHPRIV | |
12286 | .word 0x95414000 ! 162: RDPC rd %pc, %r10 | |
12287 | splash_hpstate_1_106: | |
12288 | ta T_CHANGE_NONHPRIV | |
12289 | .word 0x3a800001 ! 1: BCC bcc,a <label_0x1> | |
12290 | .word 0x81982e5f ! 163: WRHPR_HPSTATE_I wrhpr %r0, 0x0e5f, %hpstate | |
12291 | trapasi_1_107: | |
12292 | nop | |
12293 | mov 0x10, %r1 ! (VA for ASI 0x5a) | |
12294 | .word 0xd4d84b40 ! 164: LDXA_R ldxa [%r1, %r0] 0x5a, %r10 | |
12295 | .word 0xe1bfe160 ! 165: STDFA_I stda %f16, [0x0160, %r31] | |
12296 | splash_hpstate_1_108: | |
12297 | ta T_CHANGE_NONHPRIV | |
12298 | .word 0x81983acf ! 166: WRHPR_HPSTATE_I wrhpr %r0, 0x1acf, %hpstate | |
12299 | otherw | |
12300 | mov 0xb1, %r30 | |
12301 | .word 0x93d0001e ! 167: Tcc_R tne icc_or_xcc, %r0 + %r30 | |
12302 | .word 0x8d802000 ! 168: WRFPRS_I wr %r0, 0x0000, %fprs | |
12303 | .word 0xd43fe121 ! 169: STD_I std %r10, [%r31 + 0x0121] | |
12304 | jmptr_1_109: | |
12305 | nop | |
12306 | best_set_reg(0xe1200000, %r20, %r27) | |
12307 | .word 0xb7c6c000 ! 170: JMPL_R jmpl %r27 + %r0, %r27 | |
12308 | jmptr_1_110: | |
12309 | nop | |
12310 | best_set_reg(0xe1200000, %r20, %r27) | |
12311 | .word 0xb7c6c000 ! 171: JMPL_R jmpl %r27 + %r0, %r27 | |
12312 | nop | |
12313 | mov 0x80, %g3 | |
12314 | stxa %g3, [%g3] 0x57 | |
12315 | .word 0xd45fc000 ! 172: LDX_R ldx [%r31 + %r0], %r10 | |
12316 | .word 0xe1bfdc00 ! 173: STDFA_R stda %f16, [%r0, %r31] | |
12317 | .word 0xd51fe128 ! 174: LDDF_I ldd [%r31, 0x0128], %f10 | |
12318 | .word 0xd44fe1d8 ! 175: LDSB_I ldsb [%r31 + 0x01d8], %r10 | |
12319 | .word 0x91948014 ! 176: WRPR_PIL_R wrpr %r18, %r20, %pil | |
12320 | trapasi_1_113: | |
12321 | nop | |
12322 | mov 0x20, %r1 ! (VA for ASI 0x4c) | |
12323 | .word 0xd4d04980 ! 177: LDSHA_R ldsha [%r1, %r0] 0x4c, %r10 | |
12324 | intveclr_1_114: | |
12325 | nop | |
12326 | ta T_CHANGE_HPRIV | |
12327 | setx 0x998579d80d5b64ce, %r1, %r28 | |
12328 | stxa %r28, [%g0] 0x72 | |
12329 | ta T_CHANGE_NONHPRIV | |
12330 | .word 0x25400001 ! 178: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
12331 | ibp_1_115: | |
12332 | nop | |
12333 | .word 0xc19fe180 ! 179: LDDFA_I ldda [%r31, 0x0180], %f0 | |
12334 | .word 0xc30fc000 ! 180: LDXFSR_R ld-fsr [%r31, %r0], %f1 | |
12335 | nop | |
12336 | ta T_CHANGE_HPRIV | |
12337 | mov 0x1+1, %r10 | |
12338 | set sync_thr_counter5, %r23 | |
12339 | #ifndef SPC | |
12340 | ldxa [%g0]0x63, %o1 | |
12341 | and %o1, 0x38, %o1 | |
12342 | add %o1, %r23, %r23 | |
12343 | sllx %o1, 5, %o3 !(CID*256) | |
12344 | #endif | |
12345 | cas [%r23],%g0,%r10 !lock | |
12346 | brnz %r10, cwq_1_116 | |
12347 | rd %asi, %r12 | |
12348 | wr %g0, 0x40, %asi | |
12349 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 | |
12350 | and %l1, 0x3, %l1 ! Check if busy/enabled .. | |
12351 | cmp %l1, 1 | |
12352 | bne cwq_1_116 | |
12353 | set CWQ_BASE, %l6 | |
12354 | #ifndef SPC | |
12355 | add %l6, %o3, %l6 | |
12356 | #endif | |
12357 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi | |
12358 | best_set_reg(0x206100b0, %l1, %l2) !# Control Word | |
12359 | sllx %l2, 32, %l2 | |
12360 | stx %l2, [%l6 + 0x0] | |
12361 | membar #Sync | |
12362 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 | |
12363 | sub %l2, 0x40, %l2 | |
12364 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi | |
12365 | wr %r12, %g0, %asi | |
12366 | st %g0, [%r23] | |
12367 | cwq_1_116: | |
12368 | ta T_CHANGE_NONHPRIV | |
12369 | .word 0xa1414000 ! 181: RDPC rd %pc, %r16 | |
12370 | splash_cmpr_1_117: | |
12371 | mov 0, %r18 | |
12372 | sllx %r18, 63, %r18 | |
12373 | rd %tick, %r17 | |
12374 | add %r17, 0x70, %r17 | |
12375 | or %r17, %r18, %r17 | |
12376 | ta T_CHANGE_PRIV | |
12377 | .word 0xb3800011 ! 182: WR_STICK_CMPR_REG_R wr %r0, %r17, %- | |
12378 | intveclr_1_118: | |
12379 | nop | |
12380 | ta T_CHANGE_HPRIV | |
12381 | setx 0x1df994f9eeae4ceb, %r1, %r28 | |
12382 | stxa %r28, [%g0] 0x72 | |
12383 | .word 0x25400001 ! 183: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
12384 | .word 0xe0dfe088 ! 184: LDXA_I ldxa [%r31, + 0x0088] %asi, %r16 | |
12385 | intveclr_1_119: | |
12386 | nop | |
12387 | ta T_CHANGE_HPRIV | |
12388 | setx 0x32df799cac974275, %r1, %r28 | |
12389 | stxa %r28, [%g0] 0x72 | |
12390 | .word 0x25400001 ! 185: FBPLG fblg,a,pn %fcc0, <label_0x1> | |
12391 | #if (defined SPC || defined CMP1) | |
12392 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_120) + 8, 16, 16)) -> intp(5,0,30) | |
12393 | #else | |
12394 | setx 0xb0b3ff9d3514afbc, %r1, %r28 | |
12395 | stxa %r28, [%g0] 0x73 | |
12396 | #endif | |
12397 | intvec_1_120: | |
12398 | .word 0x39400001 ! 186: FBPUGE fbuge,a,pn %fcc0, <label_0x1> | |
12399 | set 0x13ff, %l3 | |
12400 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT | |
12401 | .word 0x9bb1c7cb ! 187: PDIST pdistn %d38, %d42, %d44 | |
12402 | otherw | |
12403 | mov 0xb1, %r30 | |
12404 | .word 0x91d0001e ! 188: Tcc_R ta icc_or_xcc, %r0 + %r30 | |
12405 | splash_decr_1_121: | |
12406 | nop | |
12407 | ta T_CHANGE_HPRIV | |
12408 | mov 8, %r1 | |
12409 | stxa %r16, [%r1] 0x45 | |
12410 | .word 0xa7844009 ! 189: WR_GRAPHICS_STATUS_REG_R wr %r17, %r9, %- | |
12411 | .word 0xda97e058 ! 190: LDUHA_I lduha [%r31, + 0x0058] %asi, %r13 | |
12412 | .word 0x879b638f ! 191: WRHPR_HINTP_I wrhpr %r13, 0x038f, %hintp | |
12413 | .word 0x91d020b5 ! 192: Tcc_I ta icc_or_xcc, %r0 + 181 | |
12414 | splash_decr_1_122: | |
12415 | nop | |
12416 | ta T_CHANGE_HPRIV | |
12417 | mov 8, %r1 | |
12418 | stxa %r16, [%r1] 0x45 | |
12419 | .word 0xa7844010 ! 193: WR_GRAPHICS_STATUS_REG_R wr %r17, %r16, %- | |
12420 | dvapa_1_123: | |
12421 | nop | |
12422 | ta T_CHANGE_HPRIV | |
12423 | mov 0x8d8, %r20 | |
12424 | mov 0x5, %r19 | |
12425 | sllx %r20, 23, %r20 | |
12426 | or %r19, %r20, %r19 | |
12427 | stxa %r19, [%g0] ASI_LSU_CONTROL | |
12428 | mov 0x38, %r18 | |
12429 | stxa %r31, [%r18]0x58 | |
12430 | ta T_CHANGE_NONHPRIV | |
12431 | .word 0x93a4c9a2 ! 194: FDIVs fdivs %f19, %f2, %f9 | |
12432 | brcommon3_1_124: | |
12433 | nop | |
12434 | setx common_target, %r12, %r27 | |
12435 | lduw [%r27], %r12 ! Load common dest into dcache .. | |
12436 | ba,a .+12 | |
12437 | .word 0xd3e7c033 ! 1: CASA_I casa [%r31] 0x 1, %r19, %r9 | |
12438 | ba,a .+8 | |
12439 | jmpl %r27+0, %r27 | |
12440 | .word 0xd23fe0a0 ! 195: STD_I std %r9, [%r31 + 0x00a0] | |
12441 | .word 0xc30fc000 ! 196: LDXFSR_R ld-fsr [%r31, %r0], %f1 | |
12442 | dvapa_1_125: | |
12443 | nop | |
12444 | ta T_CHANGE_HPRIV | |
12445 | mov 0xde4, %r20 | |
12446 | mov 0x1, %r19 | |
12447 | sllx %r20, 23, %r20 | |
12448 | or %r19, %r20, %r19 | |
12449 | stxa %r19, [%g0] ASI_LSU_CONTROL | |
12450 | mov 0x38, %r18 | |
12451 | stxa %r31, [%r18]0x58 | |
12452 | ta T_CHANGE_NONHPRIV | |
12453 | .word 0xa1b4c7c1 ! 197: PDIST pdistn %d50, %d32, %d16 | |
12454 | memptr_1_126: | |
12455 | set user_data_start, %r31 | |
12456 | .word 0x8584f50f ! 198: WRCCR_I wr %r19, 0x150f, %ccr | |
12457 | .word 0xc19fda00 ! 199: LDDFA_R ldda [%r31, %r0], %f0 | |
12458 | trapasi_1_128: | |
12459 | nop | |
12460 | mov 0x0, %r1 ! (VA for ASI 0x73) | |
12461 | .word 0xe0c04e60 ! 200: LDSWA_R ldswa [%r1, %r0] 0x73, %r16 | |
12462 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl | |
12463 | reduce_priv_lvl_1_129: | |
12464 | ta T_CHANGE_NONHPRIV ! macro | |
12465 | nop | |
12466 | nop | |
12467 | ta T_CHANGE_PRIV | |
12468 | wrpr %g0, %g0, %gl | |
12469 | nop | |
12470 | nop | |
12471 | ||
12472 | join_lbl_0_0: | |
12473 | SECTION .MAIN | |
12474 | .text | |
12475 | diag_finish: | |
12476 | nop | |
12477 | nop | |
12478 | nop | |
12479 | ta T_CHANGE_HPRIV | |
12480 | best_set_reg(HV_TRAP_BASE_PA, %r1, %r2) | |
12481 | wrhpr %g2, %g0, %htba | |
12482 | ta T_GOOD_TRAP | |
12483 | nop | |
12484 | nop | |
12485 | nop | |
12486 | .data | |
12487 | .xword 0x0 | |
12488 | ! fp data rs1, rs2, fsr, gsr quads .. | |
12489 | .global fp_data_quads | |
12490 | fp_data_quads: | |
12491 | .xword 0x0044000000000000 | |
12492 | .xword 0x4028000000000000 | |
12493 | .xword 0x0fc0400400000000 | |
12494 | .xword 0x0000000000000000 | |
12495 | .xword 0x0041000000000000 | |
12496 | .xword 0x4022000000000000 | |
12497 | .xword 0x0600800000000000 | |
12498 | .xword 0x0000000000000000 | |
12499 | .xword 0x0220000000000000 | |
12500 | .xword 0x4140000000000000 | |
12501 | .xword 0x4fc0400400000000 | |
12502 | .xword 0x0000000000000000 | |
12503 | .xword 0x4090000000000000 | |
12504 | .xword 0x0090000000000000 | |
12505 | .xword 0x0f80400800000000 | |
12506 | .xword 0x0a00000000000000 | |
12507 | .align 128 | |
12508 | .global user_data_start | |
12509 | .data | |
12510 | user_data_start: | |
12511 | ||
12512 | .xword 0x3dc5d6a075f93f25 | |
12513 | .xword 0xd95195e8d5fa3106 | |
12514 | .xword 0xebc1e15e8656080a | |
12515 | .xword 0x995dd1ab4c15ef75 | |
12516 | .xword 0xd3429f94cbf9df37 | |
12517 | .xword 0x5011c46d098cd1d1 | |
12518 | .xword 0xcd2c3152b16c3d2a | |
12519 | .xword 0x71cac2f4df1f170e | |
12520 | .xword 0xadd4e29f8ba3072d | |
12521 | .xword 0xb87ecd88731b723e | |
12522 | .xword 0x9857f8f38d935b6a | |
12523 | .xword 0x3fd49c272adf35a8 | |
12524 | .xword 0x1577c508becb9c4a | |
12525 | .xword 0x69919cae37b9e537 | |
12526 | .xword 0xafd796fa0ee25e33 | |
12527 | .xword 0x4f5994d14d04cf3f | |
12528 | .xword 0x4cab6273a1ce6e29 | |
12529 | .xword 0x98ea410ecbb5b1be | |
12530 | .xword 0x7f945928e81009ab | |
12531 | .xword 0xce5a2282410ed932 | |
12532 | .xword 0x142427fc0fb9d0ba | |
12533 | .xword 0x4f4312662ca0a124 | |
12534 | .xword 0xb0876124e7fdbef6 | |
12535 | .xword 0x9c5009e273ab445d | |
12536 | .xword 0xef6cd964e0a31091 | |
12537 | .xword 0x929117a1c26a1a4a | |
12538 | .xword 0x58f11e246cb0ac38 | |
12539 | .xword 0xe908434ae0ad3afb | |
12540 | .xword 0xfceaf9b50b2fc57b | |
12541 | .xword 0x7502e6634880f575 | |
12542 | .xword 0x3f0a4911f5d17a34 | |
12543 | .xword 0xd17e1c5618a2523e | |
12544 | .xword 0xefbd44bc114a6b72 | |
12545 | .xword 0xa50cc98d70cb9cb3 | |
12546 | .xword 0xca58704cb2b1a90e | |
12547 | .xword 0x4a6c151cebba117e | |
12548 | .xword 0x9d0118ffdb1c828b | |
12549 | .xword 0xe5728c746185719f | |
12550 | .xword 0xe52a7cb8316f88c7 | |
12551 | .xword 0x4b97276eb35bb6c2 | |
12552 | .xword 0x8b443d0b1473e1a7 | |
12553 | .xword 0x3f56ce59beebda27 | |
12554 | .xword 0xf3951387254b99b8 | |
12555 | .xword 0x258fdee76bb94c01 | |
12556 | .xword 0xb9a2443feb0b4d03 | |
12557 | .xword 0xadc6ccc7fcad6201 | |
12558 | .xword 0x2447040d672ffd64 | |
12559 | .xword 0x6c71f84ee89ecb3b | |
12560 | .xword 0x8cc3f377f19d15bc | |
12561 | .xword 0x2a658567e05c6df3 | |
12562 | .xword 0xf60c49076a2ff4c3 | |
12563 | .xword 0xacb34b7bcbe758c2 | |
12564 | .xword 0x641a36a24efcb531 | |
12565 | .xword 0x5d38ea62545fd979 | |
12566 | .xword 0xeb479a9d21e541ab | |
12567 | .xword 0xdf26006951722f80 | |
12568 | .xword 0x4d2d3959870a51cd | |
12569 | .xword 0xe960cbccd4352ac6 | |
12570 | .xword 0x49ed5d335634b99d | |
12571 | .xword 0xee44906c9aadacfe | |
12572 | .xword 0x1ee279a79ce6bca8 | |
12573 | .xword 0x8d936ffa42ffd86e | |
12574 | .xword 0x6194e8184bcfa7cc | |
12575 | .xword 0x301466557cc1609b | |
12576 | .xword 0x1a611cd9d1da663d | |
12577 | .xword 0x19f0b11d6dcd4ff7 | |
12578 | .xword 0x0ec0d65012b7e02e | |
12579 | .xword 0x67370eb28d13f9b0 | |
12580 | .xword 0x00ffdb1037fcab57 | |
12581 | .xword 0x136fa0573ed11f91 | |
12582 | .xword 0xd5013599f6ee32a2 | |
12583 | .xword 0xd2a4892d49e3e0a0 | |
12584 | .xword 0x6ff37df74232a26f | |
12585 | .xword 0x7156636f79ffc217 | |
12586 | .xword 0x20f2b1a7b7a80a01 | |
12587 | .xword 0x543cb05b351ef590 | |
12588 | .xword 0x9065738df05fa371 | |
12589 | .xword 0x59ad8cc8c0e5fdf9 | |
12590 | .xword 0xc33355e0699f12a5 | |
12591 | .xword 0x9869ce87fb358c2e | |
12592 | .xword 0xdc432e270ee2035a | |
12593 | .xword 0xc8a78454dae5d5e7 | |
12594 | .xword 0xad76a55af8b18f63 | |
12595 | .xword 0xcd2768687a8ef6f9 | |
12596 | .xword 0x1139ea3e0573cc1c | |
12597 | .xword 0xe0ee152f5bb16a50 | |
12598 | .xword 0xc457a382cfb8140c | |
12599 | .xword 0x284317150ba56810 | |
12600 | .xword 0x2a095b9101944cbb | |
12601 | .xword 0xe3e2042b0668afad | |
12602 | .xword 0x68e7153c594b5480 | |
12603 | .xword 0x9038519de8867fe8 | |
12604 | .xword 0x0fbab1bbbf510d2c | |
12605 | .xword 0xd513be9895bcc929 | |
12606 | .xword 0xeb950d9cf9d29ff7 | |
12607 | .xword 0xc7e529766bfd0dfa | |
12608 | .xword 0x0d2367a92cab515e | |
12609 | .xword 0x46e4babd4b375840 | |
12610 | .xword 0xd82c7f1fb3e0d133 | |
12611 | .xword 0xda4dbe272c23871d | |
12612 | .xword 0x75c4cfc86379cdcd | |
12613 | .xword 0x553e563b2262a318 | |
12614 | .xword 0x2785865349190a3b | |
12615 | .xword 0x0a66438622639591 | |
12616 | .xword 0xc9115aaf9083f0fb | |
12617 | .xword 0xc65f52a220366326 | |
12618 | .xword 0xb38a7d9e668f3272 | |
12619 | .xword 0x449f683736b26c2d | |
12620 | .xword 0xf8763dd56e147dc9 | |
12621 | .xword 0x28e2f477f28e9bc9 | |
12622 | .xword 0x40a8773812fcc048 | |
12623 | .xword 0xaa766c60ac67e7ec | |
12624 | .xword 0xf6e1ae094faf9d4c | |
12625 | .xword 0x0f0be3e2a3b25528 | |
12626 | .xword 0x79f1e5152714961e | |
12627 | .xword 0xc8e9567536e8f081 | |
12628 | .xword 0x14dc47d135534d64 | |
12629 | .xword 0xee6f38457b4ba293 | |
12630 | .xword 0x11ff93e8fb0a2c0d | |
12631 | .xword 0x981a76e6f57a4e5f | |
12632 | .xword 0xfa4f03616b8c9cb6 | |
12633 | .xword 0x5610ca22df8a9683 | |
12634 | .xword 0x66bf7a928287fef0 | |
12635 | .xword 0xbad5dc7c0031e7da | |
12636 | .xword 0xac3d1117e1d84119 | |
12637 | .xword 0x8774460638d191c2 | |
12638 | .xword 0x7f128a56c0f7000b | |
12639 | .xword 0x18c0c8828e8d3060 | |
12640 | .xword 0xc0dab0de909a906c | |
12641 | .xword 0xf323f839f1a54521 | |
12642 | .xword 0x87e0c6a61df7aae0 | |
12643 | .xword 0x7ebcededec77d584 | |
12644 | .xword 0x9df2ea0232e33a73 | |
12645 | .xword 0x5e0a65b89d66da9a | |
12646 | .xword 0x3668f4c279196fb1 | |
12647 | .xword 0x2a1f77346bc74bdf | |
12648 | .xword 0x414a365ce8a7ba06 | |
12649 | .xword 0x959c425ef0512d98 | |
12650 | .xword 0x5a1f5d474a33517e | |
12651 | .xword 0xc1cc8dfaf596406a | |
12652 | .xword 0xd6be8c8fa2610088 | |
12653 | .xword 0x8c936c0c739e0471 | |
12654 | .xword 0xbbce96f29d275f37 | |
12655 | .xword 0xa9fd11de30db562e | |
12656 | .xword 0xb49701e6f08bc5a4 | |
12657 | .xword 0x84b5e86b0ded84db | |
12658 | .xword 0x65510e7c2ef135ca | |
12659 | .xword 0xeaa57a11873a23a4 | |
12660 | .xword 0x8ac2b534337cc2db | |
12661 | .xword 0x8950f55eccef72a5 | |
12662 | .xword 0xdb2337fa20395b52 | |
12663 | .xword 0x9b9c8da0b53a4f1d | |
12664 | .xword 0xe5f47ad41137cef1 | |
12665 | .xword 0xea9011400707df0f | |
12666 | .xword 0xbf7852bcbcc1d943 | |
12667 | .xword 0xd0e1cd39f7c4b011 | |
12668 | .xword 0x121a3ad9b0b7d678 | |
12669 | .xword 0xf1661d6ca9f90f60 | |
12670 | .xword 0x1e76a96257ec1a38 | |
12671 | .xword 0x9a24d9600364f27e | |
12672 | .xword 0x8efeb6756e241f7d | |
12673 | .xword 0x517b8610dcfcbd1c | |
12674 | .xword 0x496e9bf37c551ae8 | |
12675 | .xword 0x76eec375b9d149e9 | |
12676 | .xword 0x4d7941a08dc7ecba | |
12677 | .xword 0xd31c21b4ad42c797 | |
12678 | .xword 0x1d86131179dfd534 | |
12679 | .xword 0x8933fc10810db69f | |
12680 | .xword 0x9843237c36eb95db | |
12681 | .xword 0x105789fd9841411c | |
12682 | .xword 0x42a07d6ec62860ab | |
12683 | .xword 0x3aa32e0ce492d63c | |
12684 | .xword 0x34f0ca3185f8ab52 | |
12685 | .xword 0xf100946f144b3e3e | |
12686 | .xword 0x76da371202115795 | |
12687 | .xword 0x1639afa4eae09577 | |
12688 | .xword 0xf9c3d3e45f7ab30b | |
12689 | .xword 0xdba3055f77d6b1af | |
12690 | .xword 0xff446703d7d25daf | |
12691 | .xword 0x61f01a0fb214905e | |
12692 | .xword 0xae4a8dc62d48d7d4 | |
12693 | .xword 0x93f037342dbbdc82 | |
12694 | .xword 0x15618f1534e7b0da | |
12695 | .xword 0x04f8c2cc5c36f91a | |
12696 | .xword 0x2925e917480461c0 | |
12697 | .xword 0xb73c9f8d4fb99e4c | |
12698 | .xword 0xc362de628a11998a | |
12699 | .xword 0x33d74240aca8b54c | |
12700 | .xword 0xa2377b60a6c5a2af | |
12701 | .xword 0x83480ba8eea6c986 | |
12702 | .xword 0x3900f5d4fbb00f08 | |
12703 | .xword 0x504c4ecc4db30290 | |
12704 | .xword 0x035167316eb7d43d | |
12705 | .xword 0x956bbc254cf0b7e9 | |
12706 | .xword 0x87e699767cc629f5 | |
12707 | .xword 0xe041c75a6c74b56c | |
12708 | .xword 0x4262f5b035814cc9 | |
12709 | .xword 0xc3611234002ae98d | |
12710 | .xword 0x0539d5e88c71a103 | |
12711 | .xword 0xdd2ffbffe8d970a4 | |
12712 | .xword 0x63fc37771197e327 | |
12713 | .xword 0x00db8f5417e4fc12 | |
12714 | .xword 0xf3d851d1362b1212 | |
12715 | .xword 0x4e5ee9ba26d3764e | |
12716 | .xword 0x61f504d36faf6bbb | |
12717 | .xword 0xd51147ef6788b9c0 | |
12718 | .xword 0xe11d88a058bb6b04 | |
12719 | .xword 0x42d07f04631a9e74 | |
12720 | .xword 0x00c6edb4a963078b | |
12721 | .xword 0x16883314ba6d7873 | |
12722 | .xword 0x91dd048f29854661 | |
12723 | .xword 0x25646f06c058c4af | |
12724 | .xword 0xff41195bea2784fc | |
12725 | .xword 0x6b4cdb4f829952dc | |
12726 | .xword 0x2b993dece48be54e | |
12727 | .xword 0x88b1df077d4b66c7 | |
12728 | .xword 0xd311df76b9a3449c | |
12729 | .xword 0x8cbdb0c531e9ec9e | |
12730 | .xword 0x7fa20f58910ca12a | |
12731 | .xword 0xa0fc5d2183dbdc2e | |
12732 | .xword 0x8a727ee6c454f506 | |
12733 | .xword 0x6cb0a9e91a9834ee | |
12734 | .xword 0xdb7266afe89be053 | |
12735 | .xword 0x4058b48a2fcd0065 | |
12736 | .xword 0xd5d81996c594c499 | |
12737 | .xword 0xfcd61e8b366e6bb5 | |
12738 | .xword 0xe958391d7af226d7 | |
12739 | .xword 0x6f13616f4b1ecf9d | |
12740 | .xword 0x6cde6d21865684d2 | |
12741 | .xword 0x67eb467b4b3074eb | |
12742 | .xword 0xfd0f6af4d60369ba | |
12743 | .xword 0xb179d56ca323de3b | |
12744 | .xword 0xa6d79eb566a93a41 | |
12745 | .xword 0x73edcdc465021a82 | |
12746 | .xword 0x0d91122df8d40d8f | |
12747 | .xword 0x9099b6a053a48687 | |
12748 | .xword 0x72a042cdddf3887f | |
12749 | .xword 0x700e4583ba578a1c | |
12750 | .xword 0x14322618b27b8f87 | |
12751 | .xword 0x615d5041d3a797c9 | |
12752 | .xword 0xacf09b67dec65a1c | |
12753 | .xword 0xed38c2c0c09b34bb | |
12754 | .xword 0xe8408e4b8ec01204 | |
12755 | .xword 0x8d6ec44fc49bd181 | |
12756 | .xword 0xdb4ce594ebf66c5a | |
12757 | .xword 0x0decad08b9539561 | |
12758 | .xword 0x5a02a0ef950a1fa0 | |
12759 | .xword 0x6a903db6e39628b4 | |
12760 | .xword 0x6882bbd8b76fae8a | |
12761 | .xword 0xca3c636411fb04e5 | |
12762 | .xword 0xdb6c913fd532ba6f | |
12763 | .xword 0x544508694ea8ddf4 | |
12764 | .xword 0xca477de45eceb4ae | |
12765 | .xword 0x044d9e156092555d | |
12766 | .xword 0xec94a8e9ff599971 | |
12767 | .xword 0xb8eeaf6ec83d02ac | |
12768 | ||
12769 | SECTION .HTRAPS | |
12770 | .text | |
12771 | .global restore_range_regs | |
12772 | restore_range_regs: | |
12773 | wr %g0, ASI_MMU_REAL_RANGE, %asi | |
12774 | mov 1, %g1 | |
12775 | sllx %g1, 63, %g1 | |
12776 | ldxa [ASI_MMU_REAL_RANGE_0] %asi, %g2 | |
12777 | or %g2 ,%g1, %g2 | |
12778 | stxa %g2, [ASI_MMU_REAL_RANGE_0] %asi | |
12779 | ldxa [ASI_MMU_REAL_RANGE_1] %asi, %g2 | |
12780 | or %g2 ,%g1, %g2 | |
12781 | stxa %g2, [ASI_MMU_REAL_RANGE_1] %asi | |
12782 | ldxa [ASI_MMU_REAL_RANGE_2] %asi, %g2 | |
12783 | or %g2 ,%g1, %g2 | |
12784 | stxa %g2, [ASI_MMU_REAL_RANGE_2] %asi | |
12785 | ldxa [ASI_MMU_REAL_RANGE_3] %asi, %g2 | |
12786 | or %g2 ,%g1, %g2 | |
12787 | stxa %g2, [ASI_MMU_REAL_RANGE_3] %asi | |
12788 | retry | |
12789 | ||
12790 | .global wdog_2_ext | |
12791 | # 10 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_extensions.s" | |
12792 | SECTION .HTRAPS | |
12793 | .global wdog_2_ext | |
12794 | .global retry_with_base_tba | |
12795 | .global resolve_bad_tte | |
12796 | ||
12797 | .text | |
12798 | resolve_bad_tte: | |
12799 | !if pc[13:5]==0, then assume not a relocated handler | |
12800 | rdpr %tpc, %r4 | |
12801 | andn %r4, 0xf, %r4 | |
12802 | sllx %r4, 49, %r5 | |
12803 | brnz,a %r5, retry_with_base_tba | |
12804 | !assume %r27 is where we came from .. | |
12805 | fdivd %f0, %f4, %f12 | |
12806 | jmpl %r27+8, %r0 | |
12807 | fdivs %f0, %f4, %f12 | |
12808 | retry_with_base_tba: | |
12809 | best_set_reg(TRAP_BASE_VA, %r3, %r5) | |
12810 | cmp %r4, %r5 | |
12811 | bz htrap_5_ext_done | |
12812 | set 0x7fff, %r3 | |
12813 | and %r4, %r3, %r4 | |
12814 | or %r5, %r4, %r4 | |
12815 | wrpr %r4, %tpc | |
12816 | rdpr %tnpc, %r4 | |
12817 | and %r4, %r3, %r4 | |
12818 | or %r5, %r4, %r4 | |
12819 | wrpr %r4, %tnpc | |
12820 | retry | |
12821 | ||
12822 | htrap_5_ext: | |
12823 | rd %pc, %l2 | |
12824 | inc %l3 | |
12825 | add %l2, htrap_5_ext_done-htrap_5_ext, %l2 | |
12826 | rdpr %tl, %l3 | |
12827 | rdpr %tstate, %l4 | |
12828 | rdhpr %htstate, %l5 | |
12829 | or %l5, 0x4, %l5 | |
12830 | inc %l3 | |
12831 | wrpr %l3, %tl | |
12832 | wrpr %l2, %tpc | |
12833 | add %l2, 4, %l2 | |
12834 | wrpr %l2, %tnpc | |
12835 | wrpr %l4, %tstate | |
12836 | wrhpr %l5, %htstate | |
12837 | retry | |
12838 | htrap_5_ext_done: | |
12839 | done | |
12840 | ||
12841 | wdog_2_ext: | |
12842 | mov 0x1f, %l1 | |
12843 | stxa %l1, [%g0] ASI_LSU_CTL_REG | |
12844 | ! If TT != 2, then goto trap handler | |
12845 | rdpr %tt, %l1 | |
12846 | cmp %l1, 0x2 | |
12847 | bne wdog_2_goto_handler | |
12848 | nop | |
12849 | ! else done | |
12850 | done | |
12851 | wdog_2_goto_handler: | |
12852 | rdhpr %htstate, %l3 | |
12853 | and %l3, 0x4, %l3 ! If previously in hpriv mode, go to hpriv | |
12854 | brnz,a %l3, wdog_2_goto_handler_1 | |
12855 | rdhpr %htba, %l3 | |
12856 | srlx %l1, 7, %l3 ! Send priv sw traps to priv mode .. | |
12857 | cmp %l3, 0x2 ! 0x2 = priv sw trap, 0x3=hpriv sw trap .. | |
12858 | be,a wdog_2_goto_handler_1 | |
12859 | rdpr %tba, %l3 | |
12860 | rdhpr %htba, %l3 | |
12861 | wdog_2_goto_handler_1: | |
12862 | sllx %l1, 5, %l1 | |
12863 | add %l1, %l3, %l3 | |
12864 | jmp %l3 | |
12865 | nop | |
12866 | # 86 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_extensions.s" | |
12867 | ! Red mode other reset handler | |
12868 | ! Get htba, and tt and make trap address | |
12869 | ! Jump to trap handler .. | |
12870 | ||
12871 | SECTION .RED_SEC | |
12872 | .global red_other_ext | |
12873 | .global wdog_red_ext | |
12874 | .text | |
12875 | red_other_ext: | |
12876 | ! IF TL=6, shift stack by one .. | |
12877 | rdpr %tl, %l1 | |
12878 | cmp %l1, 6 | |
12879 | be start_tsa_shift | |
12880 | nop | |
12881 | ||
12882 | continue_red_other: | |
12883 | mov 0x1f, %l1 | |
12884 | stxa %l1, [%g0] ASI_LSU_CTL_REG | |
12885 | ||
12886 | rdpr %tt, %l1 | |
12887 | ||
12888 | rdhpr %htstate, %l2 | |
12889 | and %l2, 0x4, %l2 ! If previously in hpriv mode, go to hpriv | |
12890 | brnz,a %l2, red_goto_handler | |
12891 | rdhpr %htba, %l2 | |
12892 | srlx %l1, 7, %l2 ! Send priv sw traps to priv mode .. | |
12893 | cmp %l2, 0x2 ! 0x2 = priv sw trap, 0x3=hpriv sw trap .. | |
12894 | be,a red_goto_handler | |
12895 | rdpr %tba, %l2 | |
12896 | rdhpr %htba, %l2 | |
12897 | red_goto_handler: | |
12898 | ||
12899 | sllx %l1, 5, %l1 | |
12900 | add %l1, %l2, %l2 | |
12901 | rdhpr %hpstate, %l1 | |
12902 | jmp %l2 | |
12903 | wrhpr %l1, 0x20, %hpstate | |
12904 | nop | |
12905 | ||
12906 | wdog_red_ext: | |
12907 | ! Shift stack down by 1 ... | |
12908 | rdpr %tl, %l1 | |
12909 | cmp %l1, 6 | |
12910 | bl wdog_end | |
12911 | start_tsa_shift: | |
12912 | mov 0x2, %l2 | |
12913 | ||
12914 | tsa_shift: | |
12915 | wrpr %l2, %tl | |
12916 | rdpr %tt, %l3 | |
12917 | rdpr %tpc, %l4 | |
12918 | rdpr %tnpc, %l5 | |
12919 | rdpr %tstate, %l6 | |
12920 | rdhpr %htstate, %l7 | |
12921 | dec %l2 | |
12922 | wrpr %l2, %tl | |
12923 | wrpr %l3, %tt | |
12924 | wrpr %l4, %tpc | |
12925 | wrpr %l5, %tnpc | |
12926 | wrpr %l6, %tstate | |
12927 | wrhpr %l7, %htstate | |
12928 | add %l2, 2, %l2 | |
12929 | cmp %l2, %l1 | |
12930 | ble tsa_shift | |
12931 | nop | |
12932 | tsa_shift_done: | |
12933 | dec %l1 | |
12934 | wrpr %l1, %tl | |
12935 | ||
12936 | wdog_end: | |
12937 | ! If TT != 2, then goto trap handler | |
12938 | rdpr %tt, %l1 | |
12939 | ||
12940 | cmp %l1, 0x2 | |
12941 | bne continue_red_other | |
12942 | nop | |
12943 | ! else done | |
12944 | mov 0x1f, %l1 | |
12945 | stxa %l1, [%g0] ASI_LSU_CTL_REG | |
12946 | done | |
12947 | # 973 "diag.j" | |
12948 | ||
12949 | SECTION .CWQ_DATA DATA_VA =0x4000 | |
12950 | attr_data { | |
12951 | Name = .CWQ_DATA | |
12952 | hypervisor | |
12953 | } | |
12954 | ||
12955 | .data | |
12956 | .align 16 | |
12957 | .global msg | |
12958 | msg: | |
12959 | .xword 0xad32fa52374cc6ba | |
12960 | .xword 0x4cbf52280549003a | |
12961 | ||
12962 | .align 16 | |
12963 | .global results | |
12964 | results: | |
12965 | .xword 0xDEADBEEFDEADBEEF | |
12966 | .xword 0xDEADBEEFDEADBEEF | |
12967 | !# CWQ data area | |
12968 | !# CWQ_BASE for core N is CWQ_BASE+(N*256) | |
12969 | !# CWQ_LAST for core N is CWQ_LAST+(N*256) | |
12970 | .align 64 | |
12971 | .global CWQ_BASE | |
12972 | CWQ_BASE: | |
12973 | .xword 0xAAAAAAAAAAAAAAA | |
12974 | .xword 0xAAAAAAAAAAAAAAA | |
12975 | .xword 0xAAAAAAAAAAAAAAA | |
12976 | .xword 0xAAAAAAAAAAAAAAA | |
12977 | .xword 0xAAAAAAAAAAAAAAA | |
12978 | .xword 0xAAAAAAAAAAAAAAA | |
12979 | .xword 0xAAAAAAAAAAAAAAA | |
12980 | .xword 0xAAAAAAAAAAAAAAA | |
12981 | .xword 0xAAAAAAAAAAAAAAA | |
12982 | .xword 0xAAAAAAAAAAAAAAA | |
12983 | .xword 0xAAAAAAAAAAAAAAA | |
12984 | .xword 0xAAAAAAAAAAAAAAA | |
12985 | .xword 0xAAAAAAAAAAAAAAA | |
12986 | .xword 0xAAAAAAAAAAAAAAA | |
12987 | .xword 0xAAAAAAAAAAAAAAA | |
12988 | .xword 0xAAAAAAAAAAAAAAA | |
12989 | .xword 0xAAAAAAAAAAAAAAA | |
12990 | .xword 0xAAAAAAAAAAAAAAA | |
12991 | .xword 0xAAAAAAAAAAAAAAA | |
12992 | .xword 0xAAAAAAAAAAAAAAA | |
12993 | .xword 0xAAAAAAAAAAAAAAA | |
12994 | .xword 0xAAAAAAAAAAAAAAA | |
12995 | .xword 0xAAAAAAAAAAAAAAA | |
12996 | .xword 0xAAAAAAAAAAAAAAA | |
12997 | .global CWQ_LAST | |
12998 | .align 64 | |
12999 | CWQ_LAST: | |
13000 | .word 0x0 | |
13001 | .align 64 | |
13002 | cwq_base1: | |
13003 | .xword 0xAAAAAAAAAAAAAAA | |
13004 | .xword 0xAAAAAAAAAAAAAAA | |
13005 | .xword 0xAAAAAAAAAAAAAAA | |
13006 | .xword 0xAAAAAAAAAAAAAAA | |
13007 | .xword 0xAAAAAAAAAAAAAAA | |
13008 | .xword 0xAAAAAAAAAAAAAAA | |
13009 | .xword 0xAAAAAAAAAAAAAAA | |
13010 | .xword 0xAAAAAAAAAAAAAAA | |
13011 | .xword 0xAAAAAAAAAAAAAAA | |
13012 | .xword 0xAAAAAAAAAAAAAAA | |
13013 | .xword 0xAAAAAAAAAAAAAAA | |
13014 | .xword 0xAAAAAAAAAAAAAAA | |
13015 | .xword 0xAAAAAAAAAAAAAAA | |
13016 | .xword 0xAAAAAAAAAAAAAAA | |
13017 | .xword 0xAAAAAAAAAAAAAAA | |
13018 | .xword 0xAAAAAAAAAAAAAAA | |
13019 | .xword 0xAAAAAAAAAAAAAAA | |
13020 | .xword 0xAAAAAAAAAAAAAAA | |
13021 | .xword 0xAAAAAAAAAAAAAAA | |
13022 | .xword 0xAAAAAAAAAAAAAAA | |
13023 | .xword 0xAAAAAAAAAAAAAAA | |
13024 | .xword 0xAAAAAAAAAAAAAAA | |
13025 | .xword 0xAAAAAAAAAAAAAAA | |
13026 | .xword 0xAAAAAAAAAAAAAAA | |
13027 | .align 64 | |
13028 | cwq_last1: | |
13029 | .word 0x0 | |
13030 | .align 64 | |
13031 | .xword 0xAAAAAAAAAAAAAAA | |
13032 | .xword 0xAAAAAAAAAAAAAAA | |
13033 | .xword 0xAAAAAAAAAAAAAAA | |
13034 | .xword 0xAAAAAAAAAAAAAAA | |
13035 | .xword 0xAAAAAAAAAAAAAAA | |
13036 | .xword 0xAAAAAAAAAAAAAAA | |
13037 | .xword 0xAAAAAAAAAAAAAAA | |
13038 | .xword 0xAAAAAAAAAAAAAAA | |
13039 | .xword 0xAAAAAAAAAAAAAAA | |
13040 | .xword 0xAAAAAAAAAAAAAAA | |
13041 | .xword 0xAAAAAAAAAAAAAAA | |
13042 | .xword 0xAAAAAAAAAAAAAAA | |
13043 | .xword 0xAAAAAAAAAAAAAAA | |
13044 | .xword 0xAAAAAAAAAAAAAAA | |
13045 | .xword 0xAAAAAAAAAAAAAAA | |
13046 | .xword 0xAAAAAAAAAAAAAAA | |
13047 | .xword 0xAAAAAAAAAAAAAAA | |
13048 | .xword 0xAAAAAAAAAAAAAAA | |
13049 | .xword 0xAAAAAAAAAAAAAAA | |
13050 | .xword 0xAAAAAAAAAAAAAAA | |
13051 | .xword 0xAAAAAAAAAAAAAAA | |
13052 | .xword 0xAAAAAAAAAAAAAAA | |
13053 | .xword 0xAAAAAAAAAAAAAAA | |
13054 | .xword 0xAAAAAAAAAAAAAAA | |
13055 | .align 64 | |
13056 | .word 0x0 | |
13057 | .align 64 | |
13058 | .xword 0xAAAAAAAAAAAAAAA | |
13059 | .xword 0xAAAAAAAAAAAAAAA | |
13060 | .xword 0xAAAAAAAAAAAAAAA | |
13061 | .xword 0xAAAAAAAAAAAAAAA | |
13062 | .xword 0xAAAAAAAAAAAAAAA | |
13063 | .xword 0xAAAAAAAAAAAAAAA | |
13064 | .xword 0xAAAAAAAAAAAAAAA | |
13065 | .xword 0xAAAAAAAAAAAAAAA | |
13066 | .xword 0xAAAAAAAAAAAAAAA | |
13067 | .xword 0xAAAAAAAAAAAAAAA | |
13068 | .xword 0xAAAAAAAAAAAAAAA | |
13069 | .xword 0xAAAAAAAAAAAAAAA | |
13070 | .xword 0xAAAAAAAAAAAAAAA | |
13071 | .xword 0xAAAAAAAAAAAAAAA | |
13072 | .xword 0xAAAAAAAAAAAAAAA | |
13073 | .xword 0xAAAAAAAAAAAAAAA | |
13074 | .xword 0xAAAAAAAAAAAAAAA | |
13075 | .xword 0xAAAAAAAAAAAAAAA | |
13076 | .xword 0xAAAAAAAAAAAAAAA | |
13077 | .xword 0xAAAAAAAAAAAAAAA | |
13078 | .xword 0xAAAAAAAAAAAAAAA | |
13079 | .xword 0xAAAAAAAAAAAAAAA | |
13080 | .xword 0xAAAAAAAAAAAAAAA | |
13081 | .xword 0xAAAAAAAAAAAAAAA | |
13082 | .align 64 | |
13083 | .word 0x0 | |
13084 | .align 64 | |
13085 | .xword 0xAAAAAAAAAAAAAAA | |
13086 | .xword 0xAAAAAAAAAAAAAAA | |
13087 | .xword 0xAAAAAAAAAAAAAAA | |
13088 | .xword 0xAAAAAAAAAAAAAAA | |
13089 | .xword 0xAAAAAAAAAAAAAAA | |
13090 | .xword 0xAAAAAAAAAAAAAAA | |
13091 | .xword 0xAAAAAAAAAAAAAAA | |
13092 | .xword 0xAAAAAAAAAAAAAAA | |
13093 | .xword 0xAAAAAAAAAAAAAAA | |
13094 | .xword 0xAAAAAAAAAAAAAAA | |
13095 | .xword 0xAAAAAAAAAAAAAAA | |
13096 | .xword 0xAAAAAAAAAAAAAAA | |
13097 | .xword 0xAAAAAAAAAAAAAAA | |
13098 | .xword 0xAAAAAAAAAAAAAAA | |
13099 | .xword 0xAAAAAAAAAAAAAAA | |
13100 | .xword 0xAAAAAAAAAAAAAAA | |
13101 | .xword 0xAAAAAAAAAAAAAAA | |
13102 | .xword 0xAAAAAAAAAAAAAAA | |
13103 | .xword 0xAAAAAAAAAAAAAAA | |
13104 | .xword 0xAAAAAAAAAAAAAAA | |
13105 | .xword 0xAAAAAAAAAAAAAAA | |
13106 | .xword 0xAAAAAAAAAAAAAAA | |
13107 | .xword 0xAAAAAAAAAAAAAAA | |
13108 | .xword 0xAAAAAAAAAAAAAAA | |
13109 | .align 64 | |
13110 | .word 0x0 | |
13111 | .align 64 | |
13112 | .xword 0xAAAAAAAAAAAAAAA | |
13113 | .xword 0xAAAAAAAAAAAAAAA | |
13114 | .xword 0xAAAAAAAAAAAAAAA | |
13115 | .xword 0xAAAAAAAAAAAAAAA | |
13116 | .xword 0xAAAAAAAAAAAAAAA | |
13117 | .xword 0xAAAAAAAAAAAAAAA | |
13118 | .xword 0xAAAAAAAAAAAAAAA | |
13119 | .xword 0xAAAAAAAAAAAAAAA | |
13120 | .xword 0xAAAAAAAAAAAAAAA | |
13121 | .xword 0xAAAAAAAAAAAAAAA | |
13122 | .xword 0xAAAAAAAAAAAAAAA | |
13123 | .xword 0xAAAAAAAAAAAAAAA | |
13124 | .xword 0xAAAAAAAAAAAAAAA | |
13125 | .xword 0xAAAAAAAAAAAAAAA | |
13126 | .xword 0xAAAAAAAAAAAAAAA | |
13127 | .xword 0xAAAAAAAAAAAAAAA | |
13128 | .xword 0xAAAAAAAAAAAAAAA | |
13129 | .xword 0xAAAAAAAAAAAAAAA | |
13130 | .xword 0xAAAAAAAAAAAAAAA | |
13131 | .xword 0xAAAAAAAAAAAAAAA | |
13132 | .xword 0xAAAAAAAAAAAAAAA | |
13133 | .xword 0xAAAAAAAAAAAAAAA | |
13134 | .xword 0xAAAAAAAAAAAAAAA | |
13135 | .xword 0xAAAAAAAAAAAAAAA | |
13136 | .align 64 | |
13137 | .word 0x0 | |
13138 | .align 64 | |
13139 | .xword 0xAAAAAAAAAAAAAAA | |
13140 | .xword 0xAAAAAAAAAAAAAAA | |
13141 | .xword 0xAAAAAAAAAAAAAAA | |
13142 | .xword 0xAAAAAAAAAAAAAAA | |
13143 | .xword 0xAAAAAAAAAAAAAAA | |
13144 | .xword 0xAAAAAAAAAAAAAAA | |
13145 | .xword 0xAAAAAAAAAAAAAAA | |
13146 | .xword 0xAAAAAAAAAAAAAAA | |
13147 | .xword 0xAAAAAAAAAAAAAAA | |
13148 | .xword 0xAAAAAAAAAAAAAAA | |
13149 | .xword 0xAAAAAAAAAAAAAAA | |
13150 | .xword 0xAAAAAAAAAAAAAAA | |
13151 | .xword 0xAAAAAAAAAAAAAAA | |
13152 | .xword 0xAAAAAAAAAAAAAAA | |
13153 | .xword 0xAAAAAAAAAAAAAAA | |
13154 | .xword 0xAAAAAAAAAAAAAAA | |
13155 | .xword 0xAAAAAAAAAAAAAAA | |
13156 | .xword 0xAAAAAAAAAAAAAAA | |
13157 | .xword 0xAAAAAAAAAAAAAAA | |
13158 | .xword 0xAAAAAAAAAAAAAAA | |
13159 | .xword 0xAAAAAAAAAAAAAAA | |
13160 | .xword 0xAAAAAAAAAAAAAAA | |
13161 | .xword 0xAAAAAAAAAAAAAAA | |
13162 | .xword 0xAAAAAAAAAAAAAAA | |
13163 | .align 64 | |
13164 | .word 0x0 | |
13165 | .align 64 | |
13166 | .xword 0xAAAAAAAAAAAAAAA | |
13167 | .xword 0xAAAAAAAAAAAAAAA | |
13168 | .xword 0xAAAAAAAAAAAAAAA | |
13169 | .xword 0xAAAAAAAAAAAAAAA | |
13170 | .xword 0xAAAAAAAAAAAAAAA | |
13171 | .xword 0xAAAAAAAAAAAAAAA | |
13172 | .xword 0xAAAAAAAAAAAAAAA | |
13173 | .xword 0xAAAAAAAAAAAAAAA | |
13174 | .xword 0xAAAAAAAAAAAAAAA | |
13175 | .xword 0xAAAAAAAAAAAAAAA | |
13176 | .xword 0xAAAAAAAAAAAAAAA | |
13177 | .xword 0xAAAAAAAAAAAAAAA | |
13178 | .xword 0xAAAAAAAAAAAAAAA | |
13179 | .xword 0xAAAAAAAAAAAAAAA | |
13180 | .xword 0xAAAAAAAAAAAAAAA | |
13181 | .xword 0xAAAAAAAAAAAAAAA | |
13182 | .xword 0xAAAAAAAAAAAAAAA | |
13183 | .xword 0xAAAAAAAAAAAAAAA | |
13184 | .xword 0xAAAAAAAAAAAAAAA | |
13185 | .xword 0xAAAAAAAAAAAAAAA | |
13186 | .xword 0xAAAAAAAAAAAAAAA | |
13187 | .xword 0xAAAAAAAAAAAAAAA | |
13188 | .xword 0xAAAAAAAAAAAAAAA | |
13189 | .xword 0xAAAAAAAAAAAAAAA | |
13190 | .align 64 | |
13191 | .word 0x0 | |
13192 | ||
13193 | ||
13194 | ||
13195 | SECTION .MyHTRAPS_0 TEXT_VA = 0x0000000000280000, DATA_VA = 0x00000000002c0000 | |
13196 | attr_text { | |
13197 | Name = .MyHTRAPS_0, | |
13198 | RA = 0x0000000000280000, | |
13199 | PA = ra2pa(0x0000000000280000,0), | |
13200 | part_0_ctx_zero_tsb_config_3, | |
13201 | part_0_ctx_nonzero_tsb_config_3, | |
13202 | TTE_G = 1, | |
13203 | TTE_Context = 0, | |
13204 | TTE_V = 1, | |
13205 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
13206 | TTE_NFO = 0, | |
13207 | TTE_IE = 0, | |
13208 | TTE_Soft2 = 0, | |
13209 | TTE_Diag = 0, | |
13210 | TTE_Soft = 0, | |
13211 | TTE_L = 0, | |
13212 | TTE_CP = 1, | |
13213 | TTE_CV = 0, | |
13214 | TTE_E = 0, | |
13215 | TTE_P = 1, | |
13216 | TTE_W = 0, | |
13217 | TTE_X = 0 | |
13218 | } | |
13219 | ||
13220 | ||
13221 | attr_data { | |
13222 | Name = .MyHTRAPS_0, | |
13223 | RA = 0x00000000002c0000, | |
13224 | PA = ra2pa(0x00000000002c0000,0), | |
13225 | part_0_ctx_zero_tsb_config_3, | |
13226 | part_0_ctx_nonzero_tsb_config_3, | |
13227 | TTE_G = 1, | |
13228 | TTE_Context = 0, | |
13229 | TTE_V = 1, | |
13230 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
13231 | TTE_NFO = 0, | |
13232 | TTE_IE = 0, | |
13233 | TTE_Soft2 = 0, | |
13234 | TTE_Diag = 0, | |
13235 | TTE_Soft = 0, | |
13236 | TTE_L = 0, | |
13237 | TTE_CP = 1, | |
13238 | TTE_CV = 0, | |
13239 | TTE_E = 0, | |
13240 | TTE_P = 1, | |
13241 | TTE_W = 0 | |
13242 | } | |
13243 | ||
13244 | .text | |
13245 | #include "htraps.s" | |
13246 | #include "tlu_htraps_ext.s" | |
13247 | ||
13248 | ||
13249 | ||
13250 | SECTION .MyHTRAPS_1 TEXT_VA = 0x00000000002a0000, DATA_VA = 0x00000000002e0000 | |
13251 | attr_text { | |
13252 | Name = .MyHTRAPS_1, | |
13253 | RA = 0x00000000002a0000, | |
13254 | PA = ra2pa(0x00000000002a0000,0), | |
13255 | part_0_ctx_zero_tsb_config_3, | |
13256 | part_0_ctx_nonzero_tsb_config_3, | |
13257 | TTE_G = 1, | |
13258 | TTE_Context = 0, | |
13259 | TTE_V = 1, | |
13260 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
13261 | TTE_NFO = 0, | |
13262 | TTE_IE = 0, | |
13263 | TTE_Soft2 = 0, | |
13264 | TTE_Diag = 0, | |
13265 | TTE_Soft = 0, | |
13266 | TTE_L = 0, | |
13267 | TTE_CP = 1, | |
13268 | TTE_CV = 1, | |
13269 | TTE_E = 0, | |
13270 | TTE_P = 1, | |
13271 | TTE_W = 0, | |
13272 | TTE_X = 0 | |
13273 | } | |
13274 | ||
13275 | ||
13276 | attr_data { | |
13277 | Name = .MyHTRAPS_1, | |
13278 | RA = 0x00000000002e0000, | |
13279 | PA = ra2pa(0x00000000002e0000,0), | |
13280 | part_0_ctx_zero_tsb_config_3, | |
13281 | part_0_ctx_nonzero_tsb_config_3, | |
13282 | TTE_G = 1, | |
13283 | TTE_Context = 0, | |
13284 | TTE_V = 1, | |
13285 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
13286 | TTE_NFO = 0, | |
13287 | TTE_IE = 0, | |
13288 | TTE_Soft2 = 0, | |
13289 | TTE_Diag = 0, | |
13290 | TTE_Soft = 0, | |
13291 | TTE_L = 0, | |
13292 | TTE_CP = 0, | |
13293 | TTE_CV = 0, | |
13294 | TTE_E = 0, | |
13295 | TTE_P = 1, | |
13296 | TTE_W = 0 | |
13297 | } | |
13298 | ||
13299 | .text | |
13300 | #include "htraps.s" | |
13301 | #include "tlu_htraps_ext.s" | |
13302 | ||
13303 | ||
13304 | ||
13305 | SECTION .MyHTRAPS_2 TEXT_VA = 0x0000000200280000, DATA_VA = 0x00000002002c0000 | |
13306 | attr_text { | |
13307 | Name = .MyHTRAPS_2, | |
13308 | RA = 0x0000000200280000, | |
13309 | PA = ra2pa(0x0000000200280000,0), | |
13310 | part_0_ctx_zero_tsb_config_3, | |
13311 | part_0_ctx_nonzero_tsb_config_3, | |
13312 | TTE_G = 1, | |
13313 | TTE_Context = 0, | |
13314 | TTE_V = 1, | |
13315 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
13316 | TTE_NFO = 0, | |
13317 | TTE_IE = 0, | |
13318 | TTE_Soft2 = 0, | |
13319 | TTE_Diag = 0, | |
13320 | TTE_Soft = 0, | |
13321 | TTE_L = 0, | |
13322 | TTE_CP = 1, | |
13323 | TTE_CV = 0, | |
13324 | TTE_E = 1, | |
13325 | TTE_P = 1, | |
13326 | TTE_W = 0, | |
13327 | TTE_X = 0 | |
13328 | } | |
13329 | ||
13330 | ||
13331 | attr_data { | |
13332 | Name = .MyHTRAPS_2, | |
13333 | RA = 0x00000002002c0000, | |
13334 | PA = ra2pa(0x00000002002c0000,0), | |
13335 | part_0_ctx_zero_tsb_config_3, | |
13336 | part_0_ctx_nonzero_tsb_config_3, | |
13337 | TTE_G = 1, | |
13338 | TTE_Context = 0, | |
13339 | TTE_V = 1, | |
13340 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
13341 | TTE_NFO = 0, | |
13342 | TTE_IE = 0, | |
13343 | TTE_Soft2 = 0, | |
13344 | TTE_Diag = 0, | |
13345 | TTE_Soft = 0, | |
13346 | TTE_L = 0, | |
13347 | TTE_CP = 1, | |
13348 | TTE_CV = 1, | |
13349 | TTE_E = 0, | |
13350 | TTE_P = 1, | |
13351 | TTE_W = 0 | |
13352 | } | |
13353 | ||
13354 | .text | |
13355 | #include "htraps.s" | |
13356 | #include "tlu_htraps_ext.s" | |
13357 | ||
13358 | ||
13359 | ||
13360 | SECTION .MyHTRAPS_3 TEXT_VA = 0x00000002002a0000, DATA_VA = 0x00000002002e0000 | |
13361 | attr_text { | |
13362 | Name = .MyHTRAPS_3, | |
13363 | RA = 0x00000002002a0000, | |
13364 | PA = ra2pa(0x00000002002a0000,0), | |
13365 | part_0_ctx_zero_tsb_config_3, | |
13366 | part_0_ctx_nonzero_tsb_config_3, | |
13367 | TTE_G = 1, | |
13368 | TTE_Context = 0, | |
13369 | TTE_V = 1, | |
13370 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
13371 | TTE_NFO = 0, | |
13372 | TTE_IE = 0, | |
13373 | TTE_Soft2 = 0, | |
13374 | TTE_Diag = 0, | |
13375 | TTE_Soft = 0, | |
13376 | TTE_L = 0, | |
13377 | TTE_CP = 0, | |
13378 | TTE_CV = 1, | |
13379 | TTE_E = 1, | |
13380 | TTE_P = 1, | |
13381 | TTE_W = 0, | |
13382 | TTE_X = 0 | |
13383 | } | |
13384 | ||
13385 | ||
13386 | attr_data { | |
13387 | Name = .MyHTRAPS_3, | |
13388 | RA = 0x00000002002e0000, | |
13389 | PA = ra2pa(0x00000002002e0000,0), | |
13390 | part_0_ctx_zero_tsb_config_3, | |
13391 | part_0_ctx_nonzero_tsb_config_3, | |
13392 | TTE_G = 1, | |
13393 | TTE_Context = 0, | |
13394 | TTE_V = 1, | |
13395 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
13396 | TTE_NFO = 0, | |
13397 | TTE_IE = 0, | |
13398 | TTE_Soft2 = 0, | |
13399 | TTE_Diag = 0, | |
13400 | TTE_Soft = 0, | |
13401 | TTE_L = 0, | |
13402 | TTE_CP = 1, | |
13403 | TTE_CV = 0, | |
13404 | TTE_E = 0, | |
13405 | TTE_P = 1, | |
13406 | TTE_W = 0 | |
13407 | } | |
13408 | ||
13409 | .text | |
13410 | #include "htraps.s" | |
13411 | #include "tlu_htraps_ext.s" | |
13412 | ||
13413 | ||
13414 | ||
13415 | ||
13416 | ||
13417 | SECTION .MyTRAPS_0 TEXT_VA = 0x0000000000380000, DATA_VA = 0x00000000003c0000 | |
13418 | attr_text { | |
13419 | Name = .MyTRAPS_0, | |
13420 | RA = 0x0000000000380000, | |
13421 | PA = ra2pa(0x0000000000380000,0), | |
13422 | part_0_ctx_zero_tsb_config_3, | |
13423 | part_0_ctx_nonzero_tsb_config_3, | |
13424 | TTE_G = 1, | |
13425 | TTE_Context = 0, | |
13426 | TTE_V = 1, | |
13427 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
13428 | TTE_NFO = 1, | |
13429 | TTE_IE = 1, | |
13430 | TTE_Soft2 = 0, | |
13431 | TTE_Diag = 0, | |
13432 | TTE_Soft = 0, | |
13433 | TTE_L = 0, | |
13434 | TTE_CP = 1, | |
13435 | TTE_CV = 0, | |
13436 | TTE_E = 1, | |
13437 | TTE_P = 0, | |
13438 | TTE_W = 1, | |
13439 | TTE_X = 0 | |
13440 | } | |
13441 | ||
13442 | ||
13443 | attr_data { | |
13444 | Name = .MyTRAPS_0, | |
13445 | RA = 0x00000000003c0000, | |
13446 | PA = ra2pa(0x00000000003c0000,0), | |
13447 | part_0_ctx_zero_tsb_config_3, | |
13448 | part_0_ctx_nonzero_tsb_config_3, | |
13449 | TTE_G = 1, | |
13450 | TTE_Context = 0, | |
13451 | TTE_V = 1, | |
13452 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
13453 | TTE_NFO = 0, | |
13454 | TTE_IE = 0, | |
13455 | TTE_Soft2 = 0, | |
13456 | TTE_Diag = 0, | |
13457 | TTE_Soft = 0, | |
13458 | TTE_L = 0, | |
13459 | TTE_CP = 1, | |
13460 | TTE_CV = 0, | |
13461 | TTE_E = 0, | |
13462 | TTE_P = 1, | |
13463 | TTE_W = 0 | |
13464 | } | |
13465 | ||
13466 | #include "traps.s" | |
13467 | ||
13468 | ||
13469 | ||
13470 | SECTION .MyTRAPS_1 TEXT_VA = 0x00000000003a0000, DATA_VA = 0x00000000003e0000 | |
13471 | attr_text { | |
13472 | Name = .MyTRAPS_1, | |
13473 | RA = 0x00000000003a0000, | |
13474 | PA = ra2pa(0x00000000003a0000,0), | |
13475 | part_0_ctx_zero_tsb_config_3, | |
13476 | part_0_ctx_nonzero_tsb_config_3, | |
13477 | TTE_G = 1, | |
13478 | TTE_Context = 0, | |
13479 | TTE_V = 1, | |
13480 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
13481 | TTE_NFO = 0, | |
13482 | TTE_IE = 0, | |
13483 | TTE_Soft2 = 0, | |
13484 | TTE_Diag = 0, | |
13485 | TTE_Soft = 0, | |
13486 | TTE_L = 0, | |
13487 | TTE_CP = 1, | |
13488 | TTE_CV = 0, | |
13489 | TTE_E = 0, | |
13490 | TTE_P = 1, | |
13491 | TTE_W = 1, | |
13492 | TTE_X = 0 | |
13493 | } | |
13494 | ||
13495 | ||
13496 | attr_data { | |
13497 | Name = .MyTRAPS_1, | |
13498 | RA = 0x00000000003e0000, | |
13499 | PA = ra2pa(0x00000000003e0000,0), | |
13500 | part_0_ctx_zero_tsb_config_3, | |
13501 | part_0_ctx_nonzero_tsb_config_3, | |
13502 | TTE_G = 1, | |
13503 | TTE_Context = 0, | |
13504 | TTE_V = 1, | |
13505 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
13506 | TTE_NFO = 0, | |
13507 | TTE_IE = 0, | |
13508 | TTE_Soft2 = 0, | |
13509 | TTE_Diag = 0, | |
13510 | TTE_Soft = 0, | |
13511 | TTE_L = 0, | |
13512 | TTE_CP = 1, | |
13513 | TTE_CV = 1, | |
13514 | TTE_E = 0, | |
13515 | TTE_P = 1, | |
13516 | TTE_W = 1 | |
13517 | } | |
13518 | ||
13519 | #include "traps.s" | |
13520 | ||
13521 | ||
13522 | ||
13523 | SECTION .MyTRAPS_2 TEXT_VA = 0x0000000400380000, DATA_VA = 0x00000004003c0000 | |
13524 | attr_text { | |
13525 | Name = .MyTRAPS_2, | |
13526 | RA = 0x0000000400380000, | |
13527 | PA = ra2pa(0x0000000400380000,0), | |
13528 | part_0_ctx_zero_tsb_config_3, | |
13529 | part_0_ctx_nonzero_tsb_config_3, | |
13530 | TTE_G = 1, | |
13531 | TTE_Context = 0, | |
13532 | TTE_V = 1, | |
13533 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
13534 | TTE_NFO = 1, | |
13535 | TTE_IE = 1, | |
13536 | TTE_Soft2 = 0, | |
13537 | TTE_Diag = 0, | |
13538 | TTE_Soft = 0, | |
13539 | TTE_L = 0, | |
13540 | TTE_CP = 0, | |
13541 | TTE_CV = 1, | |
13542 | TTE_E = 1, | |
13543 | TTE_P = 0, | |
13544 | TTE_W = 1, | |
13545 | TTE_X = 0 | |
13546 | } | |
13547 | ||
13548 | ||
13549 | attr_data { | |
13550 | Name = .MyTRAPS_2, | |
13551 | RA = 0x00000004003c0000, | |
13552 | PA = ra2pa(0x00000004003c0000,0), | |
13553 | part_0_ctx_zero_tsb_config_3, | |
13554 | part_0_ctx_nonzero_tsb_config_3, | |
13555 | TTE_G = 1, | |
13556 | TTE_Context = 0, | |
13557 | TTE_V = 1, | |
13558 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
13559 | TTE_NFO = 1, | |
13560 | TTE_IE = 1, | |
13561 | TTE_Soft2 = 0, | |
13562 | TTE_Diag = 0, | |
13563 | TTE_Soft = 0, | |
13564 | TTE_L = 0, | |
13565 | TTE_CP = 0, | |
13566 | TTE_CV = 0, | |
13567 | TTE_E = 0, | |
13568 | TTE_P = 1, | |
13569 | TTE_W = 1 | |
13570 | } | |
13571 | ||
13572 | #include "traps.s" | |
13573 | ||
13574 | ||
13575 | ||
13576 | SECTION .MyTRAPS_3 TEXT_VA = 0x00000004003a0000, DATA_VA = 0x00000004003e0000 | |
13577 | attr_text { | |
13578 | Name = .MyTRAPS_3, | |
13579 | RA = 0x00000004003a0000, | |
13580 | PA = ra2pa(0x00000004003a0000,0), | |
13581 | part_0_ctx_zero_tsb_config_3, | |
13582 | part_0_ctx_nonzero_tsb_config_3, | |
13583 | TTE_G = 1, | |
13584 | TTE_Context = 0, | |
13585 | TTE_V = 1, | |
13586 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
13587 | TTE_NFO = 1, | |
13588 | TTE_IE = 1, | |
13589 | TTE_Soft2 = 0, | |
13590 | TTE_Diag = 0, | |
13591 | TTE_Soft = 0, | |
13592 | TTE_L = 0, | |
13593 | TTE_CP = 1, | |
13594 | TTE_CV = 1, | |
13595 | TTE_E = 1, | |
13596 | TTE_P = 0, | |
13597 | TTE_W = 1, | |
13598 | TTE_X = 0 | |
13599 | } | |
13600 | ||
13601 | ||
13602 | attr_data { | |
13603 | Name = .MyTRAPS_3, | |
13604 | RA = 0x00000004003e0000, | |
13605 | PA = ra2pa(0x00000004003e0000,0), | |
13606 | part_0_ctx_zero_tsb_config_3, | |
13607 | part_0_ctx_nonzero_tsb_config_3, | |
13608 | TTE_G = 1, | |
13609 | TTE_Context = 0, | |
13610 | TTE_V = 1, | |
13611 | TTE_Size = PART0_Z_PAGE_SIZE_3, | |
13612 | TTE_NFO = 0, | |
13613 | TTE_IE = 1, | |
13614 | TTE_Soft2 = 0, | |
13615 | TTE_Diag = 0, | |
13616 | TTE_Soft = 0, | |
13617 | TTE_L = 0, | |
13618 | TTE_CP = 1, | |
13619 | TTE_CV = 0, | |
13620 | TTE_E = 0, | |
13621 | TTE_P = 1, | |
13622 | TTE_W = 1 | |
13623 | } | |
13624 | ||
13625 | #include "traps.s" | |
13626 | ||
13627 | ||
13628 | ||
13629 | ||
13630 | ||
13631 | SECTION .MyDATA_0 TEXT_VA = 0x00000000e0140000, DATA_VA = 0x0000000060140000 | |
13632 | attr_data { | |
13633 | Name = .MyDATA_0, | |
13634 | RA = 0x0000000170100000, | |
13635 | PA = ra2pa(0x0000000170100000,0), | |
13636 | part_0_ctx_zero_tsb_config_0, | |
13637 | part_0_ctx_nonzero_tsb_config_0, | |
13638 | TTE_G = 1, | |
13639 | TTE_Context = PCONTEXT, | |
13640 | TTE_V = 1, | |
13641 | TTE_Size = 3, | |
13642 | TTE_NFO = 0, | |
13643 | TTE_IE = 1, | |
13644 | TTE_Soft2 = 0, | |
13645 | TTE_Diag = 0, | |
13646 | TTE_Soft = 0, | |
13647 | TTE_L = 0, | |
13648 | TTE_CP = 1, | |
13649 | TTE_CV = 0, | |
13650 | TTE_E = 0, | |
13651 | TTE_P = 0, | |
13652 | TTE_W = 0 | |
13653 | } | |
13654 | ||
13655 | ||
13656 | attr_data { | |
13657 | Name = .MyDATA_0, | |
13658 | RA = 0x0000000170100000, | |
13659 | PA = ra2pa(0x0000000170100000,0), | |
13660 | part_0_ctx_zero_tsb_config_1, | |
13661 | part_0_ctx_nonzero_tsb_config_1, | |
13662 | TTE_G = 1, | |
13663 | TTE_Context = SCONTEXT, | |
13664 | TTE_V = 1, | |
13665 | TTE_Size = 1, | |
13666 | TTE_NFO = 1, | |
13667 | TTE_IE = 1, | |
13668 | TTE_Soft2 = 0, | |
13669 | TTE_Diag = 0, | |
13670 | TTE_Soft = 0, | |
13671 | TTE_L = 0, | |
13672 | TTE_CP = 0, | |
13673 | TTE_CV = 0, | |
13674 | TTE_E = 0, | |
13675 | TTE_P = 0, | |
13676 | TTE_W = 1, | |
13677 | tsbonly | |
13678 | } | |
13679 | ||
13680 | ||
13681 | attr_data { | |
13682 | Name = .MyDATA_0, | |
13683 | hypervisor | |
13684 | } | |
13685 | ||
13686 | ||
13687 | attr_text { | |
13688 | Name = .MyDATA_0, | |
13689 | hypervisor | |
13690 | } | |
13691 | ||
13692 | .data | |
13693 | .xword 0x9e77ee7f704e3adb | |
13694 | .xword 0xac6d590e44408197 | |
13695 | .xword 0x5a1aa8a80e6e6de0 | |
13696 | .xword 0x5a39354fb4c3c01e | |
13697 | .xword 0x86166615052aac64 | |
13698 | .xword 0x8149d81174c1f9b3 | |
13699 | .xword 0x601baea331e12ffd | |
13700 | .xword 0x4cdaf2a080fe1eac | |
13701 | .xword 0x8042e608ccc7156a | |
13702 | .xword 0x711148b9c41272c9 | |
13703 | .xword 0x25dc88eca0327e7b | |
13704 | .xword 0xea6663fd7ef53f80 | |
13705 | .xword 0x94ac7d676e75015a | |
13706 | .xword 0x63e57a3c70edaddf | |
13707 | .xword 0x4cf263a216a9a2d3 | |
13708 | .xword 0xe5dfa39fc2ad9e23 | |
13709 | .xword 0x06719d8adfb5c3b2 | |
13710 | .xword 0x5c9d4f9e85f9f825 | |
13711 | .xword 0x025da98a332688b3 | |
13712 | .xword 0xd3ae867de122376c | |
13713 | .xword 0x5a7e277e0543a9cd | |
13714 | .xword 0x54c54327c286e9bb | |
13715 | .xword 0x36073b9ef40246e3 | |
13716 | .xword 0xc5dd0b2787140497 | |
13717 | .xword 0x6ba7a109169ae962 | |
13718 | .xword 0xd882236166c84f77 | |
13719 | .xword 0x87b8d90f4cf628d8 | |
13720 | .xword 0x6c822e2856382d94 | |
13721 | .xword 0xe7aebf6fcce8f616 | |
13722 | .xword 0x77091ede64b86a51 | |
13723 | .xword 0x853d810d7e19e3fa | |
13724 | .xword 0xef65f7a83d6ac9cb | |
13725 | ||
13726 | ||
13727 | ||
13728 | SECTION .MyDATA_1 TEXT_VA = 0x00000000e0340000, DATA_VA = 0x0000000060340000 | |
13729 | attr_data { | |
13730 | Name = .MyDATA_1, | |
13731 | RA = 0x0000000170300000, | |
13732 | PA = ra2pa(0x0000000170300000,0), | |
13733 | part_0_ctx_zero_tsb_config_0, | |
13734 | part_0_ctx_nonzero_tsb_config_0, | |
13735 | TTE_G = 1, | |
13736 | TTE_Context = PCONTEXT, | |
13737 | TTE_V = 1, | |
13738 | TTE_Size = 3, | |
13739 | TTE_NFO = 1, | |
13740 | TTE_IE = 0, | |
13741 | TTE_Soft2 = 0, | |
13742 | TTE_Diag = 0, | |
13743 | TTE_Soft = 0, | |
13744 | TTE_L = 0, | |
13745 | TTE_CP = 1, | |
13746 | TTE_CV = 0, | |
13747 | TTE_E = 0, | |
13748 | TTE_P = 0, | |
13749 | TTE_W = 1 | |
13750 | } | |
13751 | ||
13752 | ||
13753 | attr_data { | |
13754 | Name = .MyDATA_1, | |
13755 | RA = 0x0000000170300000, | |
13756 | PA = ra2pa(0x0000000170300000,0), | |
13757 | part_0_ctx_zero_tsb_config_1, | |
13758 | part_0_ctx_nonzero_tsb_config_1, | |
13759 | TTE_G = 1, | |
13760 | TTE_Context = SCONTEXT, | |
13761 | TTE_V = 1, | |
13762 | TTE_Size = 3, | |
13763 | TTE_NFO = 0, | |
13764 | TTE_IE = 1, | |
13765 | TTE_Soft2 = 0, | |
13766 | TTE_Diag = 0, | |
13767 | TTE_Soft = 0, | |
13768 | TTE_L = 0, | |
13769 | TTE_CP = 1, | |
13770 | TTE_CV = 0, | |
13771 | TTE_E = 0, | |
13772 | TTE_P = 0, | |
13773 | TTE_W = 1, | |
13774 | tsbonly | |
13775 | } | |
13776 | ||
13777 | ||
13778 | attr_data { | |
13779 | Name = .MyDATA_1, | |
13780 | hypervisor | |
13781 | } | |
13782 | ||
13783 | ||
13784 | attr_text { | |
13785 | Name = .MyDATA_1, | |
13786 | hypervisor | |
13787 | } | |
13788 | ||
13789 | .data | |
13790 | .xword 0x92a8f8fe4a6a939e | |
13791 | .xword 0x3c4c92c9f6ebeda8 | |
13792 | .xword 0x1cda48aadb472f57 | |
13793 | .xword 0x773664ff3b90fcd2 | |
13794 | .xword 0x1f005f406d045bf4 | |
13795 | .xword 0xd454e1d1a17e24bb | |
13796 | .xword 0x144cf830e9d3d833 | |
13797 | .xword 0x8ff11464fcd6d164 | |
13798 | .xword 0x770bddf6a1a7ff75 | |
13799 | .xword 0x55870209d88c58e9 | |
13800 | .xword 0xfda94d75d09e2598 | |
13801 | .xword 0x36851818583c7597 | |
13802 | .xword 0x3571a0fe19c972af | |
13803 | .xword 0xa33ecb849ed5452c | |
13804 | .xword 0x504f96d7b161999c | |
13805 | .xword 0x4eb0fa4f8f68d5ea | |
13806 | .xword 0xdc6676b71d11bef9 | |
13807 | .xword 0x518eedbf6b719c58 | |
13808 | .xword 0x0b0db53b3eda03eb | |
13809 | .xword 0xe44eeab3c4880bf2 | |
13810 | .xword 0x3ddd40fc4ab20669 | |
13811 | .xword 0x1d3408e50480e54f | |
13812 | .xword 0xa67cb2d9da7041dd | |
13813 | .xword 0x0e3f181241ab6cf0 | |
13814 | .xword 0x267544e03db946a8 | |
13815 | .xword 0xcf29c71dd296560b | |
13816 | .xword 0x0559f5d070aadaec | |
13817 | .xword 0x6e13ccc1627f5ef7 | |
13818 | .xword 0x93cddef3656ee1ba | |
13819 | .xword 0x43732b6e688968bf | |
13820 | .xword 0x31569bd1adb11161 | |
13821 | .xword 0xdc9da0b97376a03f | |
13822 | ||
13823 | ||
13824 | ||
13825 | SECTION .MyDATA_2 TEXT_VA = 0x00000000e0540000, DATA_VA = 0x0000000060540000 | |
13826 | attr_data { | |
13827 | Name = .MyDATA_2, | |
13828 | RA = 0x0000000170500000, | |
13829 | PA = ra2pa(0x0000000170500000,0), | |
13830 | part_0_ctx_zero_tsb_config_0, | |
13831 | part_0_ctx_nonzero_tsb_config_0, | |
13832 | TTE_G = 1, | |
13833 | TTE_Context = PCONTEXT, | |
13834 | TTE_V = 1, | |
13835 | TTE_Size = 0, | |
13836 | TTE_NFO = 1, | |
13837 | TTE_IE = 1, | |
13838 | TTE_Soft2 = 0, | |
13839 | TTE_Diag = 0, | |
13840 | TTE_Soft = 0, | |
13841 | TTE_L = 0, | |
13842 | TTE_CP = 1, | |
13843 | TTE_CV = 1, | |
13844 | TTE_E = 1, | |
13845 | TTE_P = 0, | |
13846 | TTE_W = 1 | |
13847 | } | |
13848 | ||
13849 | ||
13850 | attr_data { | |
13851 | Name = .MyDATA_2, | |
13852 | RA = 0x0000000170500000, | |
13853 | PA = ra2pa(0x0000000170500000,0), | |
13854 | part_0_ctx_zero_tsb_config_1, | |
13855 | part_0_ctx_nonzero_tsb_config_1, | |
13856 | TTE_G = 1, | |
13857 | TTE_Context = SCONTEXT, | |
13858 | TTE_V = 1, | |
13859 | TTE_Size = 0, | |
13860 | TTE_NFO = 1, | |
13861 | TTE_IE = 1, | |
13862 | TTE_Soft2 = 0, | |
13863 | TTE_Diag = 0, | |
13864 | TTE_Soft = 0, | |
13865 | TTE_L = 0, | |
13866 | TTE_CP = 1, | |
13867 | TTE_CV = 1, | |
13868 | TTE_E = 1, | |
13869 | TTE_P = 1, | |
13870 | TTE_W = 0, | |
13871 | tsbonly | |
13872 | } | |
13873 | ||
13874 | ||
13875 | attr_data { | |
13876 | Name = .MyDATA_2, | |
13877 | hypervisor | |
13878 | } | |
13879 | ||
13880 | ||
13881 | attr_text { | |
13882 | Name = .MyDATA_2, | |
13883 | hypervisor | |
13884 | } | |
13885 | ||
13886 | .data | |
13887 | .xword 0x5caa17143d80488c | |
13888 | .xword 0x798a87103de99cea | |
13889 | .xword 0x97f90bea7d04cc7a | |
13890 | .xword 0xf5f94e9c6d4a3b4b | |
13891 | .xword 0x179c1b2b4978e43e | |
13892 | .xword 0xf517942fe1e1d86b | |
13893 | .xword 0xeb1ac73349171b6d | |
13894 | .xword 0x9d6e3979df75f8f0 | |
13895 | .xword 0x252cfa8921d7a7c7 | |
13896 | .xword 0x4ca0d98a2d01fa3e | |
13897 | .xword 0xed18fdf8d3e31cd3 | |
13898 | .xword 0xaf5b211bd16f1891 | |
13899 | .xword 0x40f20af96c900cc9 | |
13900 | .xword 0x5f0bbdc9eb8c5ae4 | |
13901 | .xword 0x57584b9194f38e1e | |
13902 | .xword 0xfff540871fdf8ce6 | |
13903 | .xword 0xa44ba3dd7ea8ceaf | |
13904 | .xword 0xdfddafd8a1bd232f | |
13905 | .xword 0xf172efd30a8a3d50 | |
13906 | .xword 0x1c5e0093723abde3 | |
13907 | .xword 0xca335b90e865bf43 | |
13908 | .xword 0x261f7b0c39a4a1eb | |
13909 | .xword 0xb3112a05caf0353f | |
13910 | .xword 0xef7f2d4e1c22b7b1 | |
13911 | .xword 0x9ac6e82ebdd76dc7 | |
13912 | .xword 0xd01c28529a2b96db | |
13913 | .xword 0x1b03818db740a62b | |
13914 | .xword 0xf3d2c90679623c8d | |
13915 | .xword 0x1b86227bf401afe5 | |
13916 | .xword 0x6e8893805336905b | |
13917 | .xword 0x90f2d82094811372 | |
13918 | .xword 0xbd5ffcf4623a9b77 | |
13919 | ||
13920 | ||
13921 | ||
13922 | SECTION .MyDATA_3 TEXT_VA = 0x00000000e0740000, DATA_VA = 0x0000000060740000 | |
13923 | attr_data { | |
13924 | Name = .MyDATA_3, | |
13925 | RA = 0x0000000170700000, | |
13926 | PA = ra2pa(0x0000000170700000,0), | |
13927 | part_0_ctx_zero_tsb_config_0, | |
13928 | part_0_ctx_nonzero_tsb_config_0, | |
13929 | TTE_G = 1, | |
13930 | TTE_Context = PCONTEXT, | |
13931 | TTE_V = 1, | |
13932 | TTE_Size = 3, | |
13933 | TTE_NFO = 1, | |
13934 | TTE_IE = 0, | |
13935 | TTE_Soft2 = 0, | |
13936 | TTE_Diag = 0, | |
13937 | TTE_Soft = 0, | |
13938 | TTE_L = 0, | |
13939 | TTE_CP = 0, | |
13940 | TTE_CV = 1, | |
13941 | TTE_E = 0, | |
13942 | TTE_P = 1, | |
13943 | TTE_W = 0 | |
13944 | } | |
13945 | ||
13946 | ||
13947 | attr_data { | |
13948 | Name = .MyDATA_3, | |
13949 | RA = 0x0000000170700000, | |
13950 | PA = ra2pa(0x0000000170700000,0), | |
13951 | part_0_ctx_zero_tsb_config_1, | |
13952 | part_0_ctx_nonzero_tsb_config_1, | |
13953 | TTE_G = 1, | |
13954 | TTE_Context = SCONTEXT, | |
13955 | TTE_V = 1, | |
13956 | TTE_Size = 5, | |
13957 | TTE_NFO = 1, | |
13958 | TTE_IE = 0, | |
13959 | TTE_Soft2 = 0, | |
13960 | TTE_Diag = 0, | |
13961 | TTE_Soft = 0, | |
13962 | TTE_L = 0, | |
13963 | TTE_CP = 1, | |
13964 | TTE_CV = 1, | |
13965 | TTE_E = 0, | |
13966 | TTE_P = 0, | |
13967 | TTE_W = 1, | |
13968 | tsbonly | |
13969 | } | |
13970 | ||
13971 | ||
13972 | attr_data { | |
13973 | Name = .MyDATA_3, | |
13974 | hypervisor | |
13975 | } | |
13976 | ||
13977 | ||
13978 | attr_text { | |
13979 | Name = .MyDATA_3, | |
13980 | hypervisor | |
13981 | } | |
13982 | ||
13983 | .data | |
13984 | .xword 0xc41c3c41fd49c05e | |
13985 | .xword 0x8e38d39fba826ef1 | |
13986 | .xword 0x72caf50c13b85b36 | |
13987 | .xword 0xd31663a741386132 | |
13988 | .xword 0x85c0a9027ce27e6d | |
13989 | .xword 0x7191abd594beff85 | |
13990 | .xword 0xf3dd6559cc8e24b6 | |
13991 | .xword 0x9b9cfff64f8efc3b | |
13992 | .xword 0xd75454595850fa1e | |
13993 | .xword 0x3ad0259faf35ee66 | |
13994 | .xword 0xc250474aff6a0840 | |
13995 | .xword 0x4ab61a39426cdd24 | |
13996 | .xword 0x377896d4a92b9fac | |
13997 | .xword 0xe82a8056d3e7ffe1 | |
13998 | .xword 0x1b0d0dfddbdcc915 | |
13999 | .xword 0xc90f57fc0453d9c6 | |
14000 | .xword 0x886ec4a5b607e80b | |
14001 | .xword 0x36d02d80e03b5434 | |
14002 | .xword 0x62d978d6907714a4 | |
14003 | .xword 0x7db376b848f36ed1 | |
14004 | .xword 0xe4611a2fa8993908 | |
14005 | .xword 0x2cbaca15065bc58d | |
14006 | .xword 0x40639a747fa8e07c | |
14007 | .xword 0x307c6404ed193c20 | |
14008 | .xword 0x49806f05531fe453 | |
14009 | .xword 0x12064ebfc96affc4 | |
14010 | .xword 0x4b842ceed9ec5bd9 | |
14011 | .xword 0xe60bc6e281ca2e97 | |
14012 | .xword 0x19b4cfa4aa7e66d2 | |
14013 | .xword 0xc3b3d7dc0d1a722f | |
14014 | .xword 0xc7dc438a820a28e1 | |
14015 | .xword 0xc58457beb374bf9f | |
14016 | ||
14017 | ||
14018 | ||
14019 | ||
14020 | ||
14021 | SECTION .MyTEXT_0 TEXT_VA = 0x00000000e0200000 | |
14022 | attr_text { | |
14023 | Name = .MyTEXT_0, | |
14024 | RA = 0x00000000e0200000, | |
14025 | PA = ra2pa(0x00000000e0200000,0), | |
14026 | part_0_ctx_zero_tsb_config_1, | |
14027 | part_0_ctx_nonzero_tsb_config_1, | |
14028 | TTE_G = 1, | |
14029 | TTE_Context = PCONTEXT, | |
14030 | TTE_V = 1, | |
14031 | TTE_Size = 3, | |
14032 | TTE_NFO = 0, | |
14033 | TTE_IE = 1, | |
14034 | TTE_Soft2 = 0, | |
14035 | TTE_Diag = 0, | |
14036 | TTE_Soft = 0, | |
14037 | TTE_L = 0, | |
14038 | TTE_CP = 1, | |
14039 | TTE_CV = 1, | |
14040 | TTE_E = 1, | |
14041 | TTE_P = 1, | |
14042 | TTE_W = 0 | |
14043 | } | |
14044 | ||
14045 | .text | |
14046 | nuff_said_0: | |
14047 | fdivd %f0, %f4, %f6 | |
14048 | jmpl %r27+8, %r0 | |
14049 | fdivs %f0, %f4, %f8 | |
14050 | ||
14051 | ||
14052 | ||
14053 | SECTION .MyTEXT_1 TEXT_VA = 0x00000000e0a00000 | |
14054 | attr_text { | |
14055 | Name = .MyTEXT_1, | |
14056 | RA = 0x00000000e0a00000, | |
14057 | PA = ra2pa(0x00000000e0a00000,0), | |
14058 | part_0_ctx_zero_tsb_config_1, | |
14059 | part_0_ctx_nonzero_tsb_config_1, | |
14060 | TTE_G = 1, | |
14061 | TTE_Context = PCONTEXT, | |
14062 | TTE_V = 1, | |
14063 | TTE_Size = 0, | |
14064 | TTE_NFO = 0, | |
14065 | TTE_IE = 1, | |
14066 | TTE_Soft2 = 0, | |
14067 | TTE_Diag = 0, | |
14068 | TTE_Soft = 0, | |
14069 | TTE_L = 0, | |
14070 | TTE_CP = 0, | |
14071 | TTE_CV = 0, | |
14072 | TTE_E = 0, | |
14073 | TTE_P = 0, | |
14074 | TTE_W = 0 | |
14075 | } | |
14076 | ||
14077 | .text | |
14078 | nuff_said_1: | |
14079 | fdivs %f0, %f4, %f8 | |
14080 | jmpl %r27+8, %r0 | |
14081 | fdivd %f0, %f4, %f6 | |
14082 | ||
14083 | ||
14084 | ||
14085 | SECTION .MyTEXT_2 TEXT_VA = 0x00000000e1200000 | |
14086 | attr_text { | |
14087 | Name = .MyTEXT_2, | |
14088 | RA = 0x00000000e1200000, | |
14089 | PA = ra2pa(0x00000000e1200000,0), | |
14090 | part_0_ctx_zero_tsb_config_1, | |
14091 | part_0_ctx_nonzero_tsb_config_1, | |
14092 | TTE_G = 1, | |
14093 | TTE_Context = PCONTEXT, | |
14094 | TTE_V = 1, | |
14095 | TTE_Size = 0, | |
14096 | TTE_NFO = 0, | |
14097 | TTE_IE = 1, | |
14098 | TTE_Soft2 = 0, | |
14099 | TTE_Diag = 0, | |
14100 | TTE_Soft = 0, | |
14101 | TTE_L = 0, | |
14102 | TTE_CP = 0, | |
14103 | TTE_CV = 1, | |
14104 | TTE_E = 0, | |
14105 | TTE_P = 1, | |
14106 | TTE_W = 0 | |
14107 | } | |
14108 | ||
14109 | .text | |
14110 | nuff_said_2: | |
14111 | fdivd %f0, %f4, %f6 | |
14112 | jmpl %r27+8, %r0 | |
14113 | fdivs %f0, %f4, %f6 | |
14114 | ||
14115 | ||
14116 | ||
14117 | SECTION .MyTEXT_3 TEXT_VA = 0x00000000e1a00000 | |
14118 | attr_text { | |
14119 | Name = .MyTEXT_3, | |
14120 | RA = 0x00000000e1a00000, | |
14121 | PA = ra2pa(0x00000000e1a00000,0), | |
14122 | part_0_ctx_zero_tsb_config_1, | |
14123 | part_0_ctx_nonzero_tsb_config_1, | |
14124 | TTE_G = 1, | |
14125 | TTE_Context = PCONTEXT, | |
14126 | TTE_V = 1, | |
14127 | TTE_Size = 5, | |
14128 | TTE_NFO = 0, | |
14129 | TTE_IE = 0, | |
14130 | TTE_Soft2 = 0, | |
14131 | TTE_Diag = 0, | |
14132 | TTE_Soft = 0, | |
14133 | TTE_L = 0, | |
14134 | TTE_CP = 0, | |
14135 | TTE_CV = 0, | |
14136 | TTE_E = 0, | |
14137 | TTE_P = 0, | |
14138 | TTE_W = 0 | |
14139 | } | |
14140 | ||
14141 | .text | |
14142 | nuff_said_3: | |
14143 | fdivs %f0, %f4, %f4 | |
14144 | jmpl %r27+8, %r0 | |
14145 | fdivd %f0, %f4, %f6 | |
14146 | ||
14147 | ||
14148 | ||
14149 | ||
14150 | ||
14151 | SECTION .VaHOLE_0 TEXT_VA = 0x00007fffffffe000 | |
14152 | attr_text { | |
14153 | Name = .VaHOLE_0, | |
14154 | RA = 0x00000000ffffe000, | |
14155 | PA = ra2pa(0x00000000ffffe000,0), | |
14156 | part_0_ctx_zero_tsb_config_1, | |
14157 | part_0_ctx_nonzero_tsb_config_1, | |
14158 | TTE_G = 1, | |
14159 | TTE_Context = PCONTEXT, | |
14160 | TTE_V = 1, | |
14161 | TTE_Size = 0, | |
14162 | TTE_NFO = 0, | |
14163 | TTE_IE = 1, | |
14164 | TTE_Soft2 = 0, | |
14165 | TTE_Diag = 0, | |
14166 | TTE_Soft = 0, | |
14167 | TTE_L = 0, | |
14168 | TTE_CP = 0, | |
14169 | TTE_CV = 1, | |
14170 | TTE_E = 1, | |
14171 | TTE_P = 0, | |
14172 | TTE_W = 1, | |
14173 | TTE_X = 1 | |
14174 | } | |
14175 | ||
14176 | .text | |
14177 | .global vahole_target0 | |
14178 | .text | |
14179 | .global vahole_target1 | |
14180 | .text | |
14181 | .global vahole_target2 | |
14182 | .text | |
14183 | .global vahole_target3 | |
14184 | nop | |
14185 | .align 4096 | |
14186 | nop | |
14187 | .align 2048 | |
14188 | nop | |
14189 | .align 1024 | |
14190 | nop | |
14191 | .align 512 | |
14192 | nop | |
14193 | .align 256 | |
14194 | nop | |
14195 | .align 128 | |
14196 | nop | |
14197 | .align 64 | |
14198 | nop | |
14199 | nop | |
14200 | .align 16 | |
14201 | nop;nop;nop | |
14202 | vahole_target0: nop;nop | |
14203 | vahole_target1: nop | |
14204 | vahole_target2: nop;nop;nop | |
14205 | vahole_target3: nop;nop;nop | |
14206 | ||
14207 | ||
14208 | ||
14209 | ||
14210 | ||
14211 | SECTION .VaHOLEL_0 TEXT_VA = 0x00000000ffffe000 | |
14212 | attr_text { | |
14213 | Name = .VaHOLEL_0, | |
14214 | RA = 0x00000000ffffe000, | |
14215 | PA = ra2pa(0x00000000ffffe000,0), | |
14216 | part_0_ctx_zero_tsb_config_0, | |
14217 | part_0_ctx_nonzero_tsb_config_0, | |
14218 | TTE_G = 1, | |
14219 | TTE_Context = PCONTEXT, | |
14220 | TTE_V = 1, | |
14221 | TTE_Size = 1, | |
14222 | TTE_NFO = 0, | |
14223 | TTE_IE = 0, | |
14224 | TTE_Soft2 = 0, | |
14225 | TTE_Diag = 0, | |
14226 | TTE_Soft = 0, | |
14227 | TTE_L = 0, | |
14228 | TTE_CP = 1, | |
14229 | TTE_CV = 1, | |
14230 | TTE_E = 1, | |
14231 | TTE_P = 0, | |
14232 | TTE_W = 1, | |
14233 | TTE_X = 1, | |
14234 | tsbonly | |
14235 | } | |
14236 | ||
14237 | .text | |
14238 | nop | |
14239 | ||
14240 | ||
14241 | ||
14242 | ||
14243 | ||
14244 | SECTION .ZERO_0 TEXT_VA = 0x0000000000000000 | |
14245 | attr_text { | |
14246 | Name = .ZERO_0, | |
14247 | RA = 0x0000000000000000, | |
14248 | PA = ra2pa(0x0000000000000000,0), | |
14249 | part_0_ctx_zero_tsb_config_1, | |
14250 | part_0_ctx_nonzero_tsb_config_1, | |
14251 | TTE_G = 1, | |
14252 | TTE_Context = 0x44, | |
14253 | TTE_V = 1, | |
14254 | TTE_Size = 5, | |
14255 | TTE_NFO = 0, | |
14256 | TTE_IE = 0, | |
14257 | TTE_Soft2 = 0, | |
14258 | TTE_Diag = 0, | |
14259 | TTE_Soft = 0, | |
14260 | TTE_L = 0, | |
14261 | TTE_CP = 0, | |
14262 | TTE_CV = 0, | |
14263 | TTE_E = 1, | |
14264 | TTE_P = 0, | |
14265 | TTE_W = 1, | |
14266 | TTE_X = 1 | |
14267 | } | |
14268 | ||
14269 | ||
14270 | .text | |
14271 | nop | |
14272 | nop | |
14273 | jmpl %r27+8, %r0 | |
14274 | nop | |
14275 | nop | |
14276 | nop | |
14277 | nop | |
14278 | nop | |
14279 | ||
14280 | Power_On_Reset: | |
14281 | setx HRedmode_Reset_Handler, %g1, %g2 | |
14282 | jmp %g2 | |
14283 | nop | |
14284 | .align 32 | |
14285 | ||
14286 | Watchdog_Reset: | |
14287 | setx wdog_red_ext, %g1, %g2 | |
14288 | jmp %g2 | |
14289 | nop | |
14290 | .align 32 | |
14291 | ||
14292 | External_Reset: | |
14293 | My_External_Reset | |
14294 | ||
14295 | .align 32 | |
14296 | ||
14297 | Software_Initiated_Reset: | |
14298 | setx Software_Reset_Handler, %g1, %g2 | |
14299 | jmp %g2 | |
14300 | nop | |
14301 | ||
14302 | .align 32 | |
14303 | ||
14304 | ||
14305 | RED_Mode_Other_Reset: | |
14306 | ! IF TL=6, shift stack by one .. | |
14307 | rdpr %tl, %l1 | |
14308 | cmp %l1, 6 | |
14309 | be start_tsa_shift | |
14310 | nop | |
14311 | ||
14312 | continue_red_other: | |
14313 | mov 0x1f, %l1 | |
14314 | stxa %l1, [%g0] ASI_LSU_CTL_REG | |
14315 | ||
14316 | rdpr %tt, %l1 | |
14317 | ||
14318 | rdhpr %htstate, %l2 | |
14319 | and %l2, 0x4, %l2 ! If previously in hpriv mode, go to hpriv | |
14320 | brnz,a %l2, red_goto_handler | |
14321 | rdhpr %htba, %l2 | |
14322 | srlx %l1, 7, %l2 ! Send priv sw traps to priv mode .. | |
14323 | cmp %l2, 0x2 ! 0x2 = priv sw trap, 0x3=hpriv sw trap .. | |
14324 | be,a red_goto_handler | |
14325 | rdpr %tba, %l2 | |
14326 | rdhpr %htba, %l2 | |
14327 | red_goto_handler: | |
14328 | ||
14329 | sllx %l1, 5, %l1 | |
14330 | add %l1, %l2, %l2 | |
14331 | rdhpr %hpstate, %l1 | |
14332 | jmp %l2 | |
14333 | wrhpr %l1, 0x20, %hpstate | |
14334 | nop | |
14335 | ||
14336 | wdog_red_ext: | |
14337 | ! Shift stack down by 1 ... | |
14338 | rdpr %tl, %l1 | |
14339 | cmp %l1, 6 | |
14340 | bl wdog_end | |
14341 | start_tsa_shift: | |
14342 | mov 0x2, %l2 | |
14343 | ||
14344 | tsa_shift: | |
14345 | wrpr %l2, %tl | |
14346 | rdpr %tt, %l3 | |
14347 | rdpr %tpc, %l4 | |
14348 | rdpr %tnpc, %l5 | |
14349 | rdpr %tstate, %l6 | |
14350 | rdhpr %htstate, %l7 | |
14351 | dec %l2 | |
14352 | wrpr %l2, %tl | |
14353 | wrpr %l3, %tt | |
14354 | wrpr %l4, %tpc | |
14355 | wrpr %l5, %tnpc | |
14356 | wrpr %l6, %tstate | |
14357 | wrhpr %l7, %htstate | |
14358 | add %l2, 2, %l2 | |
14359 | cmp %l2, %l1 | |
14360 | ble tsa_shift | |
14361 | nop | |
14362 | tsa_shift_done: | |
14363 | dec %l1 | |
14364 | wrpr %l1, %tl | |
14365 | ||
14366 | wdog_end: | |
14367 | ! If TT != 2, then goto trap handler | |
14368 | rdpr %tt, %l1 | |
14369 | ||
14370 | cmp %l1, 0x2 | |
14371 | bne continue_red_other | |
14372 | nop | |
14373 | ! else done | |
14374 | mov 0x1f, %l1 | |
14375 | stxa %l1, [%g0] ASI_LSU_CTL_REG | |
14376 | done | |
14377 | ||
14378 | ||
14379 | ||
14380 | ||
14381 | ||
14382 | SECTION .VaHOLE_PA_0 TEXT_VA = 0x000000ffffffe000 | |
14383 | attr_text { | |
14384 | Name = .VAHOLE_PA_0, | |
14385 | hypervisor | |
14386 | } | |
14387 | ||
14388 | nop | |
14389 | .align 4096 | |
14390 | nop | |
14391 | .align 2048 | |
14392 | nop | |
14393 | .align 1024 | |
14394 | nop | |
14395 | .align 512 | |
14396 | nop | |
14397 | .align 256 | |
14398 | nop | |
14399 | .align 128 | |
14400 | nop | |
14401 | .align 64 | |
14402 | nop | |
14403 | nop | |
14404 | .align 16 | |
14405 | nop;nop;nop | |
14406 | nop | |
14407 | nop | |
14408 | jmpl %r27+8, %r0 | |
14409 | nop | |
14410 | nop | |
14411 | nop | |
14412 | jmpl %r27+8, %r0 | |
14413 | nop | |
14414 | ||
14415 | ||
14416 | ||
14417 | #if 0 | |
14418 | #endif |