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1 | // ========== Copyright Header Begin ========================================== |
2 | // | |
3 | // OpenSPARC T2 Processor File: niu_verilog_tasks.vri | |
4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
6 | // | |
7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
8 | // | |
9 | // This program is free software; you can redistribute it and/or modify | |
10 | // it under the terms of the GNU General Public License as published by | |
11 | // the Free Software Foundation; version 2 of the License. | |
12 | // | |
13 | // This program is distributed in the hope that it will be useful, | |
14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | // GNU General Public License for more details. | |
17 | // | |
18 | // You should have received a copy of the GNU General Public License | |
19 | // along with this program; if not, write to the Free Software | |
20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | // | |
22 | // For the avoidance of doubt, and except that if any non-GPL license | |
23 | // choice is available it will apply instead, Sun elects to use only | |
24 | // the General Public License version 2 (GPLv2) at this time for any | |
25 | // software where a choice of GPL license versions is made | |
26 | // available with the language indicating that GPLv2 or any later version | |
27 | // may be used, or where a choice of which version of the GPL is applied is | |
28 | // otherwise unspecified. | |
29 | // | |
30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
32 | // have any questions. | |
33 | // | |
34 | // ========== Copyright Header End ============================================ | |
35 | #ifdef N2_FC | |
36 | hdl_task force_vlan_tbl_entry(bit[15:0] mem_addr, bit[17:0] mem_wr_data) "tb_top.force_vlan_tbl_entry"; | |
37 | hdl_task force_rxc_cksum_be_partial() "tb_top.force_rxc_cksum_be_partial"; | |
38 | #else | |
39 | hdl_task assert_mdint(bit[2:0] id) "tb_top.assert_mdint"; | |
40 | hdl_task deassert_mdint(bit[2:0] id) "tb_top.deassert_mdint"; | |
41 | hdl_task check_mdint_status(bit[2:0] id, var bit status) "tb_top.check_mdint_status"; | |
42 | //following from vera_top.vr to consolidate all defines here | |
43 | hdl_task force_tcam_entry (bit [7:0] tcam_index, bit [199:0] tcam_key) "tb_top.force_tcam_entry" ; | |
44 | hdl_task backdoor_init_tcam () "tb_top.backdoor_init_tcam" ; | |
45 | hdl_task test_debug_port() "tb_top.test_debug_port" ; | |
46 | ||
47 | hdl_task niu_reset(bit[7:0] no_of_clocks) "tb_top.niu_reset"; | |
48 | hdl_task force_vlan_tbl_entry(bit[15:0] mem_addr, bit[17:0] mem_wr_data) "tb_top.force_vlan_tbl_entry"; | |
49 | hdl_task force_rxc_cksum_be_partial() "tb_top.force_rxc_cksum_be_partial"; | |
50 | #endif | |
51 |