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1 | // ========== Copyright Header Begin ========================================== |
2 | // | |
3 | // OpenSPARC T2 Processor File: sys_registers.vr | |
4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved | |
5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. | |
6 | // | |
7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. | |
8 | // | |
9 | // This program is free software; you can redistribute it and/or modify | |
10 | // it under the terms of the GNU General Public License as published by | |
11 | // the Free Software Foundation; version 2 of the License. | |
12 | // | |
13 | // This program is distributed in the hope that it will be useful, | |
14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | // GNU General Public License for more details. | |
17 | // | |
18 | // You should have received a copy of the GNU General Public License | |
19 | // along with this program; if not, write to the Free Software | |
20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | // | |
22 | // For the avoidance of doubt, and except that if any non-GPL license | |
23 | // choice is available it will apply instead, Sun elects to use only | |
24 | // the General Public License version 2 (GPLv2) at this time for any | |
25 | // software where a choice of GPL license versions is made | |
26 | // available with the language indicating that GPLv2 or any later version | |
27 | // may be used, or where a choice of which version of the GPL is applied is | |
28 | // otherwise unspecified. | |
29 | // | |
30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, | |
31 | // CA 95054 USA or visit www.sun.com if you need additional information or | |
32 | // have any questions. | |
33 | // | |
34 | // ========== Copyright Header End ============================================ | |
35 | #include <vera_defines.vrh> | |
36 | #include "std_display_class.vrh" | |
37 | #include "ccu_defines.vri" | |
38 | // #include "ccu_top.vri" | |
39 | #include "reg_top.vri" | |
40 | ||
41 | #include "tcu_tasks.vrh" | |
42 | ||
43 | class SystemRegs { | |
44 | string asiRegisterName; | |
45 | bit [39:0] asiAddr; | |
46 | bit [63:0] asiResetValue; | |
47 | bit [63:0] asiVeraValue; // This will keep track of the vera expected value | |
48 | bit [63:0] asiWriteableMask; | |
49 | bit [63:0] asiCurrentValue; | |
50 | SystemTap dft; | |
51 | reg__port cregSignalBind; | |
52 | ||
53 | string dispmonScope; | |
54 | StandardDisplay dbg; | |
55 | ||
56 | task new( StandardDisplay dbgIn | |
57 | , SystemTap dftIn | |
58 | , string asiRegisterNameIn | |
59 | , bit [39:0] asiAddrIn | |
60 | , bit [63:0] asiResetValueIn | |
61 | , bit [63:0] asiWriteableMaskIn | |
62 | , reg__port cregSignalBindIn | |
63 | ) { | |
64 | dispmonScope = "reg"; | |
65 | dbg = dbgIn; | |
66 | dft = dftIn; | |
67 | dbg.dispmon(dispmonScope, MON_INFO, "$Id: sys_registers.vr,v 1.1.1.1 2007/02/13 22:21:44 drp Exp $"); | |
68 | ||
69 | asiRegisterName = asiRegisterNameIn; | |
70 | asiAddr = asiAddrIn; | |
71 | asiResetValue = asiResetValueIn; | |
72 | asiVeraValue = asiResetValueIn; | |
73 | asiWriteableMask = asiWriteableMaskIn; | |
74 | cregSignalBind = cregSignalBindIn; | |
75 | } | |
76 | ||
77 | ||
78 | task ucbWrite(bit[63:0] writeValue) { | |
79 | dft.tap_creg_addr(asiAddr); | |
80 | dft.tap_creg_wdata(writeValue); | |
81 | dft.tap_iob_write(); | |
82 | asiVeraValue = writeValue; // Update testbench value (since we overwrote it) | |
83 | } | |
84 | ||
85 | function bit[63:0] ucbRead() { | |
86 | dft.tap_creg_addr(asiAddr); | |
87 | ucbRead = dft.tap_creg_rdata(); | |
88 | } | |
89 | ||
90 | task ucbCheckReadWrite() { | |
91 | bit [63:0] asiWriteValue; | |
92 | bit [63:0] asiExpectedValue; | |
93 | ||
94 | dbg.dispmon(dispmonScope, MON_INFO, psprintf("Checking R/W of ASI: %s", asiRegisterName)); | |
95 | asiWriteValue = ~asiCurrentValue; | |
96 | asiExpectedValue = (~(asiCurrentValue) & asiWriteableMask) | (~(asiWriteableMask) & asiCurrentValue); | |
97 | ucbWrite(asiWriteValue); | |
98 | void = ucbRead(); // To wait for the write to complete | |
99 | //--------------- Check wires at register ----------------- | |
100 | asiCurrentValue = cregSignalBind.$regBits; | |
101 | printCheckRegister(asiExpectedValue, asiCurrentValue); | |
102 | //--------------- Check UCB read return ------------------- | |
103 | asiCurrentValue = ucbRead(); | |
104 | printCheckRegister(asiExpectedValue, asiCurrentValue); | |
105 | } | |
106 | ||
107 | task checkReset() { | |
108 | asiCurrentValue = cregSignalBind.$regBits ; | |
109 | printCheckRegister((asiWriteableMask & asiResetValue), asiCurrentValue); | |
110 | } | |
111 | ||
112 | task printCheckRegister(bit[63:0] expectedValue, bit[63:0] actualValue) { | |
113 | dbg.dispmon(dispmonScope, MON_INFO, psprintf("Checking ASI reset: %s...", asiRegisterName)); | |
114 | if ( expectedValue !== actualValue) { | |
115 | dbg.dispmon(dispmonScope, MON_ERR, psprintf("ASI Expected: 64'b%b",expectedValue)); | |
116 | dbg.dispmon(dispmonScope, MON_ERR, psprintf("ASI Actual: 64'b%b",actualValue)); | |
117 | dbg.dispmon(dispmonScope, MON_ERR, psprintf("ERROR: Incorrect ASI register value: %s", asiRegisterName)); | |
118 | dbg.dispmon(dispmonScope, MON_ERR, psprintf("ASI Error: 64'b%b",expectedValue ^ actualValue)); | |
119 | } | |
120 | } | |
121 | ||
122 | task printCurrentRegister() { | |
123 | asiCurrentValue = cregSignalBind.$regBits; | |
124 | dbg.dispmon(dispmonScope, MON_ALWAYS, psprintf("ASI REG '%s' Current Value: 0x%h", asiRegisterName, asiCurrentValue)); | |
125 | } | |
126 | ||
127 | } | |
128 | ||
129 | ||
130 |