| 1 | // ========== Copyright Header Begin ========================================== |
| 2 | // |
| 3 | // OpenSPARC T2 Processor File: ccx.v |
| 4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved |
| 5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. |
| 6 | // |
| 7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 8 | // |
| 9 | // This program is free software; you can redistribute it and/or modify |
| 10 | // it under the terms of the GNU General Public License as published by |
| 11 | // the Free Software Foundation; version 2 of the License. |
| 12 | // |
| 13 | // This program is distributed in the hope that it will be useful, |
| 14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | // GNU General Public License for more details. |
| 17 | // |
| 18 | // You should have received a copy of the GNU General Public License |
| 19 | // along with this program; if not, write to the Free Software |
| 20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 21 | // |
| 22 | // For the avoidance of doubt, and except that if any non-GPL license |
| 23 | // choice is available it will apply instead, Sun elects to use only |
| 24 | // the General Public License version 2 (GPLv2) at this time for any |
| 25 | // software where a choice of GPL license versions is made |
| 26 | // available with the language indicating that GPLv2 or any later version |
| 27 | // may be used, or where a choice of which version of the GPL is applied is |
| 28 | // otherwise unspecified. |
| 29 | // |
| 30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
| 31 | // CA 95054 USA or visit www.sun.com if you need additional information or |
| 32 | // have any questions. |
| 33 | // |
| 34 | // ========== Copyright Header End ============================================ |
| 35 | `ifndef FPGA |
| 36 | module ccx ( |
| 37 | cmp_gclk_c2_ccx_left, |
| 38 | cmp_gclk_c2_ccx_right, |
| 39 | scan_in, |
| 40 | tcu_pce_ov, |
| 41 | gl_ccx_clk_stop_left, |
| 42 | gl_ccx_clk_stop_right, |
| 43 | tcu_aclk, |
| 44 | tcu_bclk, |
| 45 | tcu_scan_en, |
| 46 | cluster_arst_l, |
| 47 | tcu_atpg_mode, |
| 48 | scan_out, |
| 49 | cpu_rep0_in, |
| 50 | cpu_rep0_out, |
| 51 | cpu_rep1_in, |
| 52 | cpu_rep1_out, |
| 53 | ccx_lstg_in, |
| 54 | ccx_lstg_out, |
| 55 | ccx_rstg_in, |
| 56 | ccx_rstg_out, |
| 57 | spc0_pcx_data_pa, |
| 58 | spc0_pcx_req_pq, |
| 59 | spc0_pcx_atm_pq, |
| 60 | spc1_pcx_data_pa, |
| 61 | spc1_pcx_req_pq, |
| 62 | spc1_pcx_atm_pq, |
| 63 | spc2_pcx_data_pa, |
| 64 | spc2_pcx_req_pq, |
| 65 | spc2_pcx_atm_pq, |
| 66 | spc3_pcx_data_pa, |
| 67 | spc3_pcx_req_pq, |
| 68 | spc3_pcx_atm_pq, |
| 69 | spc4_pcx_data_pa, |
| 70 | spc4_pcx_req_pq, |
| 71 | spc4_pcx_atm_pq, |
| 72 | spc5_pcx_data_pa, |
| 73 | spc5_pcx_req_pq, |
| 74 | spc5_pcx_atm_pq, |
| 75 | spc6_pcx_data_pa, |
| 76 | spc6_pcx_req_pq, |
| 77 | spc6_pcx_atm_pq, |
| 78 | spc7_pcx_data_pa, |
| 79 | spc7_pcx_req_pq, |
| 80 | spc7_pcx_atm_pq, |
| 81 | io_pcx_stall_pq, |
| 82 | sctag0_pcx_stall_pq, |
| 83 | sctag1_pcx_stall_pq, |
| 84 | sctag2_pcx_stall_pq, |
| 85 | sctag3_pcx_stall_pq, |
| 86 | sctag4_pcx_stall_pq, |
| 87 | sctag5_pcx_stall_pq, |
| 88 | sctag6_pcx_stall_pq, |
| 89 | sctag7_pcx_stall_pq, |
| 90 | pcx_spc0_grant_px, |
| 91 | pcx_spc1_grant_px, |
| 92 | pcx_spc2_grant_px, |
| 93 | pcx_spc3_grant_px, |
| 94 | pcx_spc4_grant_px, |
| 95 | pcx_spc5_grant_px, |
| 96 | pcx_spc6_grant_px, |
| 97 | pcx_spc7_grant_px, |
| 98 | pcx_fpio_data_px2, |
| 99 | pcx_fpio_data_rdy_px1, |
| 100 | pcx_sctag0_atm_px1, |
| 101 | pcx_sctag0_data_px2, |
| 102 | pcx_sctag0_data_rdy_px1, |
| 103 | pcx_sctag1_atm_px1, |
| 104 | pcx_sctag1_data_px2, |
| 105 | pcx_sctag1_data_rdy_px1, |
| 106 | pcx_sctag2_atm_px1, |
| 107 | pcx_sctag2_data_px2, |
| 108 | pcx_sctag2_data_rdy_px1, |
| 109 | pcx_sctag3_atm_px1, |
| 110 | pcx_sctag3_data_px2, |
| 111 | pcx_sctag3_data_rdy_px1, |
| 112 | pcx_sctag4_atm_px1, |
| 113 | pcx_sctag4_data_px2, |
| 114 | pcx_sctag4_data_rdy_px1, |
| 115 | pcx_sctag5_atm_px1, |
| 116 | pcx_sctag5_data_px2, |
| 117 | pcx_sctag5_data_rdy_px1, |
| 118 | pcx_sctag6_atm_px1, |
| 119 | pcx_sctag6_data_px2, |
| 120 | pcx_sctag6_data_rdy_px1, |
| 121 | pcx_sctag7_atm_px1, |
| 122 | pcx_sctag7_data_px2, |
| 123 | pcx_sctag7_data_rdy_px1, |
| 124 | io_cpx_data_ca, |
| 125 | io_cpx_req_cq, |
| 126 | sctag0_cpx_atom_cq, |
| 127 | sctag0_cpx_data_ca, |
| 128 | sctag0_cpx_req_cq, |
| 129 | sctag1_cpx_atom_cq, |
| 130 | sctag1_cpx_data_ca, |
| 131 | sctag1_cpx_req_cq, |
| 132 | sctag2_cpx_atom_cq, |
| 133 | sctag2_cpx_data_ca, |
| 134 | sctag2_cpx_req_cq, |
| 135 | sctag3_cpx_atom_cq, |
| 136 | sctag3_cpx_data_ca, |
| 137 | sctag3_cpx_req_cq, |
| 138 | sctag4_cpx_atom_cq, |
| 139 | sctag4_cpx_data_ca, |
| 140 | sctag4_cpx_req_cq, |
| 141 | sctag5_cpx_atom_cq, |
| 142 | sctag5_cpx_data_ca, |
| 143 | sctag5_cpx_req_cq, |
| 144 | sctag6_cpx_atom_cq, |
| 145 | sctag6_cpx_data_ca, |
| 146 | sctag6_cpx_req_cq, |
| 147 | sctag7_cpx_atom_cq, |
| 148 | sctag7_cpx_data_ca, |
| 149 | sctag7_cpx_req_cq, |
| 150 | cpx_io_grant_cx, |
| 151 | cpx_sctag0_grant_cx, |
| 152 | cpx_sctag1_grant_cx, |
| 153 | cpx_sctag2_grant_cx, |
| 154 | cpx_sctag3_grant_cx, |
| 155 | cpx_sctag4_grant_cx, |
| 156 | cpx_sctag5_grant_cx, |
| 157 | cpx_sctag6_grant_cx, |
| 158 | cpx_sctag7_grant_cx, |
| 159 | cpx_spc0_data_cx2, |
| 160 | cpx_spc1_data_cx2, |
| 161 | cpx_spc2_data_cx2, |
| 162 | cpx_spc3_data_cx2, |
| 163 | cpx_spc4_data_cx2, |
| 164 | cpx_spc5_data_cx2, |
| 165 | cpx_spc6_data_cx2, |
| 166 | cpx_spc7_data_cx2); |
| 167 | wire [1:0] scan_in_buf; |
| 168 | wire tcu_pce_ov_buf; |
| 169 | wire tcu_aclk_buf; |
| 170 | wire tcu_bclk_buf; |
| 171 | wire tcu_scan_en_buf; |
| 172 | wire cluster_arst_l_buf; |
| 173 | wire tcu_atpg_mode_buf; |
| 174 | wire array_wr_inhibit_unused; |
| 175 | wire l2clk; |
| 176 | wire ccx_aclk; |
| 177 | wire ccx_bclk; |
| 178 | wire clkgen_scanout; |
| 179 | wire tcu_pce_ov_r; |
| 180 | wire aclk_wmr_r_unused; |
| 181 | wire wmr_protect_r_unused; |
| 182 | wire wmr_r_unused; |
| 183 | wire por_r_unused; |
| 184 | wire cmp_slow_sync_en_r_unused; |
| 185 | wire slow_cmp_sync_en_r_unused; |
| 186 | wire scan_out_0; |
| 187 | wire pcx_scan_out; |
| 188 | wire tstgl_scan_out; |
| 189 | wire scan_out_1; |
| 190 | |
| 191 | |
| 192 | // globals |
| 193 | //input gclk; // PINDEF:RIGHT |
| 194 | input cmp_gclk_c2_ccx_left; // PINDEF:RIGHT |
| 195 | input cmp_gclk_c2_ccx_right; // PINDEF:RIGHT |
| 196 | input [1:0] scan_in; // PINDEF:RIGHT arc=l2clk:30 cap=20 |
| 197 | input tcu_pce_ov; // PINDEF:RIGHT arc=l2clk:30 cap=20 |
| 198 | //input tcu_clk_stop; // PINDEF:RIGHT arc=l2clk:30 cap=20 |
| 199 | input gl_ccx_clk_stop_left; // PINDEF:RIGHT arc=l2clk:30 cap=20 |
| 200 | input gl_ccx_clk_stop_right; // PINDEF:RIGHT arc=l2clk:30 cap=20 |
| 201 | input tcu_aclk; // PINDEF:RIGHT |
| 202 | input tcu_bclk; // PINDEF:RIGHT |
| 203 | input tcu_scan_en; // PINDEF:RIGHT |
| 204 | input cluster_arst_l; // PINDEF:RIGHT |
| 205 | input tcu_atpg_mode; // PINDEF:RIGHT |
| 206 | output [1:0] scan_out; // PINDEF:LEFT arc=l2clk:30 cap=20 |
| 207 | |
| 208 | // top level repeater ports |
| 209 | |
| 210 | input [191:0] cpu_rep0_in; |
| 211 | output [191:0] cpu_rep0_out; |
| 212 | |
| 213 | input [191:0] cpu_rep1_in; |
| 214 | output [191:0] cpu_rep1_out; |
| 215 | |
| 216 | // TOP LEVEL STAGING FLOPS |
| 217 | input [159:0] ccx_lstg_in; |
| 218 | output [159:0] ccx_lstg_out; |
| 219 | |
| 220 | input [159:0] ccx_rstg_in; |
| 221 | output [159:0] ccx_rstg_out; |
| 222 | |
| 223 | // inputs from sparc core to pcx |
| 224 | input [129:0] spc0_pcx_data_pa; // PINDEF:TOP arc=l2clk:100 cap=20 |
| 225 | input [8:0] spc0_pcx_req_pq; // PINDEF:TOP arc=l2clk:50 cap=20 |
| 226 | input [8:0] spc0_pcx_atm_pq; // PINDEF:TOP arc=l2clk:50 cap=20 |
| 227 | input [129:0] spc1_pcx_data_pa; // PINDEF:TOP arc=l2clk:100 cap=20 |
| 228 | input [8:0] spc1_pcx_req_pq; // PINDEF:TOP arc=l2clk:50 cap=20 |
| 229 | input [8:0] spc1_pcx_atm_pq; // PINDEF:TOP arc=l2clk:50 cap=20 |
| 230 | input [129:0] spc2_pcx_data_pa; // PINDEF:BOT arc=l2clk:100 cap=20 |
| 231 | input [8:0] spc2_pcx_req_pq; // PINDEF:BOT arc=l2clk:50 cap=20 |
| 232 | input [8:0] spc2_pcx_atm_pq; // PINDEF:BOT arc=l2clk:50 cap=20 |
| 233 | input [129:0] spc3_pcx_data_pa; // PINDEF:BOT arc=l2clk:100 cap=20 |
| 234 | input [8:0] spc3_pcx_req_pq; // PINDEF:BOT arc=l2clk:50 cap=20 |
| 235 | input [8:0] spc3_pcx_atm_pq; // PINDEF:BOT arc=l2clk:50 cap=20 |
| 236 | input [129:0] spc4_pcx_data_pa; // PINDEF:TOP arc=l2clk:100 cap=20 |
| 237 | input [8:0] spc4_pcx_req_pq; // PINDEF:TOP arc=l2clk:50 cap=20 |
| 238 | input [8:0] spc4_pcx_atm_pq; // PINDEF:TOP arc=l2clk:50 cap=20 |
| 239 | input [129:0] spc5_pcx_data_pa; // PINDEF:TOP arc=l2clk:100 cap=20 |
| 240 | input [8:0] spc5_pcx_req_pq; // PINDEF:TOP arc=l2clk:50 cap=20 |
| 241 | input [8:0] spc5_pcx_atm_pq; // PINDEF:TOP arc=l2clk:50 cap=20 |
| 242 | input [129:0] spc6_pcx_data_pa; // PINDEF:BOT arc=l2clk:100 cap=20 |
| 243 | input [8:0] spc6_pcx_req_pq; // PINDEF:BOT arc=l2clk:50 cap=20 |
| 244 | input [8:0] spc6_pcx_atm_pq; // PINDEF:BOT arc=l2clk:50 cap=20 |
| 245 | input [129:0] spc7_pcx_data_pa; // PINDEF:BOT arc=l2clk:100 cap=20 |
| 246 | input [8:0] spc7_pcx_req_pq; // PINDEF:BOT arc=l2clk:50 cap=20 |
| 247 | input [8:0] spc7_pcx_atm_pq; // PINDEF:BOT arc=l2clk:50 cap=20 |
| 248 | |
| 249 | // inputs from l2 to pcx |
| 250 | input io_pcx_stall_pq; // PINDEF:TOP arc=l2clk:50 cap=20 |
| 251 | input sctag0_pcx_stall_pq; // PINDEF:TOP arc=l2clk:50 cap=20 |
| 252 | input sctag1_pcx_stall_pq; // PINDEF:TOP arc=l2clk:50 cap=20 |
| 253 | input sctag2_pcx_stall_pq; // PINDEF:BOT arc=l2clk:50 cap=20 |
| 254 | input sctag3_pcx_stall_pq; // PINDEF:BOT arc=l2clk:50 cap=20 |
| 255 | input sctag4_pcx_stall_pq; // PINDEF:TOP arc=l2clk:50 cap=20 |
| 256 | input sctag5_pcx_stall_pq; // PINDEF:TOP arc=l2clk:50 cap=20 |
| 257 | input sctag6_pcx_stall_pq; // PINDEF:BOT arc=l2clk:50 cap=20 |
| 258 | input sctag7_pcx_stall_pq; // PINDEF:BOT arc=l2clk:50 cap=20 |
| 259 | |
| 260 | |
| 261 | // outputs from pcx to sparc core |
| 262 | output [8:0] pcx_spc0_grant_px; // PINDEF:TOP arc=l2clk:100 drv=32x |
| 263 | output [8:0] pcx_spc1_grant_px; // PINDEF:TOP arc=l2clk:100 drv=32x |
| 264 | output [8:0] pcx_spc2_grant_px; // PINDEF:BOT arc=l2clk:100 drv=32x |
| 265 | output [8:0] pcx_spc3_grant_px; // PINDEF:BOT arc=l2clk:100 drv=32x |
| 266 | output [8:0] pcx_spc4_grant_px; // PINDEF:TOP arc=l2clk:100 drv=32x |
| 267 | output [8:0] pcx_spc5_grant_px; // PINDEF:TOP arc=l2clk:100 drv=32x |
| 268 | output [8:0] pcx_spc6_grant_px; // PINDEF:BOT arc=l2clk:100 drv=32x |
| 269 | output [8:0] pcx_spc7_grant_px; // PINDEF:BOT arc=l2clk:100 drv=32x |
| 270 | |
| 271 | |
| 272 | // outputs from pcx to l2 |
| 273 | output [129:0] pcx_fpio_data_px2; // PINDEF:TOP arc=l2clk:100 drv=32x |
| 274 | output pcx_fpio_data_rdy_px1; // PINDEF:TOP arc=l2clk:100 drv=32x |
| 275 | output pcx_sctag0_atm_px1; // PINDEF:TOP arc=l2clk:100 drv=32x |
| 276 | output [129:0] pcx_sctag0_data_px2; // PINDEF:TOP arc=l2clk:100 drv=32x |
| 277 | output pcx_sctag0_data_rdy_px1; // PINDEF:TOP arc=l2clk:100 drv=32x |
| 278 | output pcx_sctag1_atm_px1; // PINDEF:TOP arc=l2clk:100 drv=32x |
| 279 | output [129:0] pcx_sctag1_data_px2; // PINDEF:TOP arc=l2clk:100 drv=32x |
| 280 | output pcx_sctag1_data_rdy_px1; // PINDEF:TOP arc=l2clk:100 drv=32x |
| 281 | output pcx_sctag2_atm_px1; // PINDEF:BOT arc=l2clk:100 drv=32x |
| 282 | output [129:0] pcx_sctag2_data_px2; // PINDEF:BOT arc=l2clk:100 drv=32x |
| 283 | output pcx_sctag2_data_rdy_px1; // PINDEF:BOT arc=l2clk:100 drv=32x |
| 284 | output pcx_sctag3_atm_px1; // PINDEF:BOT arc=l2clk:100 drv=32x |
| 285 | output [129:0] pcx_sctag3_data_px2; // PINDEF:BOT arc=l2clk:100 drv=32x |
| 286 | output pcx_sctag3_data_rdy_px1; // PINDEF:BOT arc=l2clk:100 drv=32x |
| 287 | output pcx_sctag4_atm_px1; // PINDEF:TOP arc=l2clk:100 drv=32x |
| 288 | output [129:0] pcx_sctag4_data_px2; // PINDEF:TOP arc=l2clk:100 drv=32x |
| 289 | output pcx_sctag4_data_rdy_px1; // PINDEF:TOP arc=l2clk:100 drv=32x |
| 290 | output pcx_sctag5_atm_px1; // PINDEF:TOP arc=l2clk:100 drv=32x |
| 291 | output [129:0] pcx_sctag5_data_px2; // PINDEF:TOP arc=l2clk:100 drv=32x |
| 292 | output pcx_sctag5_data_rdy_px1; // PINDEF:TOP arc=l2clk:100 drv=32x |
| 293 | output pcx_sctag6_atm_px1; // PINDEF:BOT arc=l2clk:100 drv=32x |
| 294 | output [129:0] pcx_sctag6_data_px2; // PINDEF:BOT arc=l2clk:100 drv=32x |
| 295 | output pcx_sctag6_data_rdy_px1; // PINDEF:BOT arc=l2clk:100 drv=32x |
| 296 | output pcx_sctag7_atm_px1; // PINDEF:BOT arc=l2clk:100 drv=32x |
| 297 | output [129:0] pcx_sctag7_data_px2; // PINDEF:BOT arc=l2clk:100 drv=32x |
| 298 | output pcx_sctag7_data_rdy_px1; // PINDEF:BOT arc=l2clk:100 drv=32x |
| 299 | |
| 300 | |
| 301 | // inputs from l2 to cpx |
| 302 | input [145:0] io_cpx_data_ca; // PINDEF:TOP arc=l2clk:100 cap=20 |
| 303 | input [7:0] io_cpx_req_cq; // PINDEF:TOP arc=l2clk:50 cap=20 |
| 304 | input sctag0_cpx_atom_cq; // PINDEF:TOP arc=l2clk:50 cap=20 |
| 305 | input [145:0] sctag0_cpx_data_ca; // PINDEF:TOP arc=l2clk:100 cap=20 |
| 306 | input [7:0] sctag0_cpx_req_cq; // PINDEF:TOP arc=l2clk:50 cap=20 |
| 307 | input sctag1_cpx_atom_cq; // PINDEF:TOP arc=l2clk:50 cap=20 |
| 308 | input [145:0] sctag1_cpx_data_ca; // PINDEF:TOP arc=l2clk:100 cap=20 |
| 309 | input [7:0] sctag1_cpx_req_cq; // PINDEF:BOT arc=l2clk:50 cap=20 |
| 310 | input sctag2_cpx_atom_cq; // PINDEF:BOT arc=l2clk:50 cap=20 |
| 311 | input [145:0] sctag2_cpx_data_ca; // PINDEF:BOT arc=l2clk:100 cap=20 |
| 312 | input [7:0] sctag2_cpx_req_cq; // PINDEF:BOT arc=l2clk:50 cap=20 |
| 313 | input sctag3_cpx_atom_cq; // PINDEF:BOT arc=l2clk:50 cap=20 |
| 314 | input [145:0] sctag3_cpx_data_ca; // PINDEF:BOT arc=l2clk:100 cap=20 |
| 315 | input [7:0] sctag3_cpx_req_cq; // PINDEF:TOP arc=l2clk:50 cap=20 |
| 316 | input sctag4_cpx_atom_cq; // PINDEF:TOP arc=l2clk:50 cap=20 |
| 317 | input [145:0] sctag4_cpx_data_ca; // PINDEF:TOP arc=l2clk:100 cap=20 |
| 318 | input [7:0] sctag4_cpx_req_cq; // PINDEF:TOP arc=l2clk:50 cap=20 |
| 319 | input sctag5_cpx_atom_cq; // PINDEF:TOP arc=l2clk:50 cap=20 |
| 320 | input [145:0] sctag5_cpx_data_ca; // PINDEF:TOP arc=l2clk:100 cap=20 |
| 321 | input [7:0] sctag5_cpx_req_cq; // PINDEF:TOP arc=l2clk:50 cap=20 |
| 322 | input sctag6_cpx_atom_cq; // PINDEF:BOT arc=l2clk:50 cap=20 |
| 323 | input [145:0] sctag6_cpx_data_ca; // PINDEF:BOT arc=l2clk:100 cap=20 |
| 324 | input [7:0] sctag6_cpx_req_cq; // PINDEF:BOT arc=l2clk:50 cap=20 |
| 325 | input sctag7_cpx_atom_cq; // PINDEF:BOT arc=l2clk:50 cap=20 |
| 326 | input [145:0] sctag7_cpx_data_ca; // PINDEF:BOT arc=l2clk:100 cap=20 |
| 327 | input [7:0] sctag7_cpx_req_cq; // PINDEF:BOT arc=l2clk:50 cap=20 |
| 328 | |
| 329 | |
| 330 | // outputs from cpx to l2 |
| 331 | output [7:0] cpx_io_grant_cx; // PINDEF:TOP arc=l2clk:100 drv=32x |
| 332 | output [7:0] cpx_sctag0_grant_cx; // PINDEF:TOP arc=l2clk:100 drv=32x |
| 333 | output [7:0] cpx_sctag1_grant_cx; // PINDEF:TOP arc=l2clk:100 drv=32x |
| 334 | output [7:0] cpx_sctag2_grant_cx; // PINDEF:BOT arc=l2clk:100 drv=32x |
| 335 | output [7:0] cpx_sctag3_grant_cx; // PINDEF:BOT arc=l2clk:100 drv=32x |
| 336 | output [7:0] cpx_sctag4_grant_cx; // PINDEF:TOP arc=l2clk:100 drv=32x |
| 337 | output [7:0] cpx_sctag5_grant_cx; // PINDEF:TOP arc=l2clk:100 drv=32x |
| 338 | output [7:0] cpx_sctag6_grant_cx; // PINDEF:BOT arc=l2clk:100 drv=32x |
| 339 | output [7:0] cpx_sctag7_grant_cx; // PINDEF:BOT arc=l2clk:100 drv=32x |
| 340 | |
| 341 | // outputs from cpx to sparc core |
| 342 | output [145:0] cpx_spc0_data_cx2; // PINDEF:TOP arc=l2clk:100 drv=32x |
| 343 | output [145:0] cpx_spc1_data_cx2; // PINDEF:TOP arc=l2clk:100 drv=32x |
| 344 | output [145:0] cpx_spc2_data_cx2; // PINDEF:BOT arc=l2clk:100 drv=32x |
| 345 | output [145:0] cpx_spc3_data_cx2; // PINDEF:BOT arc=l2clk:100 drv=32x |
| 346 | output [145:0] cpx_spc4_data_cx2; // PINDEF:TOP arc=l2clk:100 drv=32x |
| 347 | output [145:0] cpx_spc5_data_cx2; // PINDEF:TOP arc=l2clk:100 drv=32x |
| 348 | output [145:0] cpx_spc6_data_cx2; // PINDEF:BOT arc=l2clk:100 drv=32x |
| 349 | output [145:0] cpx_spc7_data_cx2; // PINDEF:BOT arc=l2clk:100 drv=32x |
| 350 | |
| 351 | |
| 352 | // isolation buffer for test/scan/clk signals |
| 353 | |
| 354 | ccx_buff_macro__dbuff_32x__rep_1__stack_none__width_8 i_buf_test_r ( |
| 355 | .din ({scan_in[1:0],tcu_pce_ov, tcu_aclk, |
| 356 | tcu_bclk, tcu_scan_en, cluster_arst_l,tcu_atpg_mode}), |
| 357 | .dout ({scan_in_buf[1:0],tcu_pce_ov_buf,tcu_aclk_buf, |
| 358 | tcu_bclk_buf, tcu_scan_en_buf, cluster_arst_l_buf,tcu_atpg_mode_buf}) |
| 359 | ); |
| 360 | |
| 361 | |
| 362 | clkgen_ccx_cmp clk_ccx |
| 363 | ( |
| 364 | .array_wr_inhibit(array_wr_inhibit_unused), |
| 365 | .tcu_atpg_mode(tcu_atpg_mode_buf), |
| 366 | .tcu_wr_inhibit(1'b0), |
| 367 | .l2clk(l2clk), |
| 368 | .aclk(ccx_aclk), |
| 369 | .bclk(ccx_bclk), |
| 370 | .scan_out(clkgen_scanout), |
| 371 | .pce_ov(tcu_pce_ov_r), |
| 372 | .aclk_wmr(aclk_wmr_r_unused), |
| 373 | .wmr_protect(wmr_protect_r_unused), |
| 374 | .wmr_(wmr_r_unused), |
| 375 | .por_(por_r_unused), |
| 376 | .cmp_slow_sync_en(cmp_slow_sync_en_r_unused), |
| 377 | .slow_cmp_sync_en(slow_cmp_sync_en_r_unused), |
| 378 | .tcu_clk_stop_left(gl_ccx_clk_stop_left), |
| 379 | .tcu_clk_stop_right(gl_ccx_clk_stop_right), |
| 380 | .tcu_pce_ov(tcu_pce_ov_buf), |
| 381 | .rst_wmr_protect(1'b0), |
| 382 | .rst_wmr_(1'b1), |
| 383 | .rst_por_(1'b1), |
| 384 | .ccu_cmp_slow_sync_en(1'b0), |
| 385 | .ccu_slow_cmp_sync_en(1'b0), |
| 386 | .tcu_div_bypass_left(1'b0), |
| 387 | .tcu_div_bypass_right(1'b0), |
| 388 | .ccu_div_ph(1'b1), |
| 389 | .cluster_div_en(1'b0), |
| 390 | .gclk_left(cmp_gclk_c2_ccx_left), |
| 391 | .gclk_right(cmp_gclk_c2_ccx_right), |
| 392 | .cluster_arst_l_left(cluster_arst_l_buf), |
| 393 | .cluster_arst_l_right(cluster_arst_l_buf), |
| 394 | .clk_ext(1'b0), |
| 395 | .ccu_serdes_dtm(1'b0), |
| 396 | .tcu_aclk(tcu_aclk_buf), |
| 397 | .tcu_bclk(tcu_bclk_buf), |
| 398 | .scan_en(tcu_scan_en_buf), |
| 399 | .scan_in(scan_in_buf[0]) |
| 400 | ); |
| 401 | |
| 402 | //assign cmp_gclk_c2_ccx_left_unused = cmp_gclk_c2_ccx_left; |
| 403 | //assign gl_ccx_clk_stop_left_unused = gl_ccx_clk_stop_left; |
| 404 | |
| 405 | |
| 406 | /* |
| 407 | cpx AUTO_TEMPLATE( |
| 408 | .cpx_spc0_data_cx2 (spc0_data_cx2[149:0]), |
| 409 | .cpx_spc1_data_cx2 (spc1_data_cx2[149:0]), |
| 410 | .cpx_spc2_data_cx2 (spc2_data_cx2[149:0]), |
| 411 | .cpx_spc3_data_cx2 (spc3_data_cx2[149:0]), |
| 412 | .cpx_spc4_data_cx2 (spc4_data_cx2[149:0]), |
| 413 | .cpx_spc5_data_cx2 (spc5_data_cx2[149:0]), |
| 414 | .cpx_spc6_data_cx2 (spc6_data_cx2[149:0]), |
| 415 | .cpx_spc7_data_cx2 (spc7_data_cx2[149:0])); |
| 416 | */ |
| 417 | cpx cpx (/*AUTOINST*/ |
| 418 | // Outputs |
| 419 | .cpx_io_grant_cx (cpx_io_grant_cx[7:0]), |
| 420 | .cpx_sctag0_grant_cx (cpx_sctag0_grant_cx[7:0]), |
| 421 | .cpx_sctag1_grant_cx (cpx_sctag1_grant_cx[7:0]), |
| 422 | .cpx_sctag2_grant_cx (cpx_sctag2_grant_cx[7:0]), |
| 423 | .cpx_sctag3_grant_cx (cpx_sctag3_grant_cx[7:0]), |
| 424 | .cpx_sctag4_grant_cx (cpx_sctag4_grant_cx[7:0]), |
| 425 | .cpx_sctag5_grant_cx (cpx_sctag5_grant_cx[7:0]), |
| 426 | .cpx_sctag6_grant_cx (cpx_sctag6_grant_cx[7:0]), |
| 427 | .cpx_sctag7_grant_cx (cpx_sctag7_grant_cx[7:0]), |
| 428 | .cpx_spc0_data_cx2 (cpx_spc0_data_cx2[145:0]), // Templated |
| 429 | .cpx_spc1_data_cx2 (cpx_spc1_data_cx2[145:0]), // Templated |
| 430 | .cpx_spc2_data_cx2 (cpx_spc2_data_cx2[145:0]), // Templated |
| 431 | .cpx_spc3_data_cx2 (cpx_spc3_data_cx2[145:0]), // Templated |
| 432 | .cpx_spc4_data_cx2 (cpx_spc4_data_cx2[145:0]), // Templated |
| 433 | .cpx_spc5_data_cx2 (cpx_spc5_data_cx2[145:0]), // Templated |
| 434 | .cpx_spc6_data_cx2 (cpx_spc6_data_cx2[145:0]), // Templated |
| 435 | .cpx_spc7_data_cx2 (cpx_spc7_data_cx2[145:0]), // Templated |
| 436 | // Inputs |
| 437 | .io_cpx_data_ca (io_cpx_data_ca[145:0]), |
| 438 | .io_cpx_req_cq (io_cpx_req_cq[7:0]), |
| 439 | .sctag0_cpx_atom_cq (sctag0_cpx_atom_cq), |
| 440 | .sctag0_cpx_data_ca (sctag0_cpx_data_ca[145:0]), |
| 441 | .sctag0_cpx_req_cq (sctag0_cpx_req_cq[7:0]), |
| 442 | .sctag1_cpx_atom_cq (sctag1_cpx_atom_cq), |
| 443 | .sctag1_cpx_data_ca (sctag1_cpx_data_ca[145:0]), |
| 444 | .sctag1_cpx_req_cq (sctag1_cpx_req_cq[7:0]), |
| 445 | .sctag2_cpx_atom_cq (sctag2_cpx_atom_cq), |
| 446 | .sctag2_cpx_data_ca (sctag2_cpx_data_ca[145:0]), |
| 447 | .sctag2_cpx_req_cq (sctag2_cpx_req_cq[7:0]), |
| 448 | .sctag3_cpx_atom_cq (sctag3_cpx_atom_cq), |
| 449 | .sctag3_cpx_data_ca (sctag3_cpx_data_ca[145:0]), |
| 450 | .sctag3_cpx_req_cq (sctag3_cpx_req_cq[7:0]), |
| 451 | .sctag4_cpx_atom_cq (sctag4_cpx_atom_cq), |
| 452 | .sctag4_cpx_data_ca (sctag4_cpx_data_ca[145:0]), |
| 453 | .sctag4_cpx_req_cq (sctag4_cpx_req_cq[7:0]), |
| 454 | .sctag5_cpx_atom_cq (sctag5_cpx_atom_cq), |
| 455 | .sctag5_cpx_data_ca (sctag5_cpx_data_ca[145:0]), |
| 456 | .sctag5_cpx_req_cq (sctag5_cpx_req_cq[7:0]), |
| 457 | .sctag6_cpx_atom_cq (sctag6_cpx_atom_cq), |
| 458 | .sctag6_cpx_data_ca (sctag6_cpx_data_ca[145:0]), |
| 459 | .sctag6_cpx_req_cq (sctag6_cpx_req_cq[7:0]), |
| 460 | .sctag7_cpx_atom_cq (sctag7_cpx_atom_cq), |
| 461 | .sctag7_cpx_data_ca (sctag7_cpx_data_ca[145:0]), |
| 462 | .sctag7_cpx_req_cq (sctag7_cpx_req_cq[7:0]), |
| 463 | .scan_in(clkgen_scanout), |
| 464 | .scan_out(scan_out_0), |
| 465 | .l2clk (l2clk), |
| 466 | .ccx_aclk (ccx_aclk), |
| 467 | .ccx_bclk (ccx_bclk), |
| 468 | .tcu_scan_en (tcu_scan_en_buf), |
| 469 | .tcu_pce_ov (tcu_pce_ov_r)); |
| 470 | |
| 471 | pcx pcx (/*AUTOINST*/ |
| 472 | // Outputs |
| 473 | .pcx_fpio_data_px2 (pcx_fpio_data_px2[129:0]), |
| 474 | .pcx_fpio_data_rdy_px1 (pcx_fpio_data_rdy_px1), |
| 475 | .pcx_sctag0_atm_px1 (pcx_sctag0_atm_px1), |
| 476 | .pcx_sctag0_data_px2 (pcx_sctag0_data_px2[129:0]), |
| 477 | .pcx_sctag0_data_rdy_px1 (pcx_sctag0_data_rdy_px1), |
| 478 | .pcx_sctag1_atm_px1 (pcx_sctag1_atm_px1), |
| 479 | .pcx_sctag1_data_px2 (pcx_sctag1_data_px2[129:0]), |
| 480 | .pcx_sctag1_data_rdy_px1 (pcx_sctag1_data_rdy_px1), |
| 481 | .pcx_sctag2_atm_px1 (pcx_sctag2_atm_px1), |
| 482 | .pcx_sctag2_data_px2 (pcx_sctag2_data_px2[129:0]), |
| 483 | .pcx_sctag2_data_rdy_px1 (pcx_sctag2_data_rdy_px1), |
| 484 | .pcx_sctag3_atm_px1 (pcx_sctag3_atm_px1), |
| 485 | .pcx_sctag3_data_px2 (pcx_sctag3_data_px2[129:0]), |
| 486 | .pcx_sctag3_data_rdy_px1 (pcx_sctag3_data_rdy_px1), |
| 487 | .pcx_sctag4_atm_px1 (pcx_sctag4_atm_px1), |
| 488 | .pcx_sctag4_data_px2 (pcx_sctag4_data_px2[129:0]), |
| 489 | .pcx_sctag4_data_rdy_px1 (pcx_sctag4_data_rdy_px1), |
| 490 | .pcx_sctag5_atm_px1 (pcx_sctag5_atm_px1), |
| 491 | .pcx_sctag5_data_px2 (pcx_sctag5_data_px2[129:0]), |
| 492 | .pcx_sctag5_data_rdy_px1 (pcx_sctag5_data_rdy_px1), |
| 493 | .pcx_sctag6_atm_px1 (pcx_sctag6_atm_px1), |
| 494 | .pcx_sctag6_data_px2 (pcx_sctag6_data_px2[129:0]), |
| 495 | .pcx_sctag6_data_rdy_px1 (pcx_sctag6_data_rdy_px1), |
| 496 | .pcx_sctag7_atm_px1 (pcx_sctag7_atm_px1), |
| 497 | .pcx_sctag7_data_px2 (pcx_sctag7_data_px2[129:0]), |
| 498 | .pcx_sctag7_data_rdy_px1 (pcx_sctag7_data_rdy_px1), |
| 499 | .pcx_spc0_grant_px (pcx_spc0_grant_px[8:0]), |
| 500 | .pcx_spc1_grant_px (pcx_spc1_grant_px[8:0]), |
| 501 | .pcx_spc2_grant_px (pcx_spc2_grant_px[8:0]), |
| 502 | .pcx_spc3_grant_px (pcx_spc3_grant_px[8:0]), |
| 503 | .pcx_spc4_grant_px (pcx_spc4_grant_px[8:0]), |
| 504 | .pcx_spc5_grant_px (pcx_spc5_grant_px[8:0]), |
| 505 | .pcx_spc6_grant_px (pcx_spc6_grant_px[8:0]), |
| 506 | .pcx_spc7_grant_px (pcx_spc7_grant_px[8:0]), |
| 507 | // Inputs |
| 508 | .io_pcx_stall_pq (io_pcx_stall_pq), |
| 509 | .sctag0_pcx_stall_pq (sctag0_pcx_stall_pq), |
| 510 | .sctag1_pcx_stall_pq (sctag1_pcx_stall_pq), |
| 511 | .sctag2_pcx_stall_pq (sctag2_pcx_stall_pq), |
| 512 | .sctag3_pcx_stall_pq (sctag3_pcx_stall_pq), |
| 513 | .sctag4_pcx_stall_pq (sctag4_pcx_stall_pq), |
| 514 | .sctag5_pcx_stall_pq (sctag5_pcx_stall_pq), |
| 515 | .sctag6_pcx_stall_pq (sctag6_pcx_stall_pq), |
| 516 | .sctag7_pcx_stall_pq (sctag7_pcx_stall_pq), |
| 517 | .spc0_pcx_data_pa (spc0_pcx_data_pa[129:0]), |
| 518 | .spc0_pcx_req_pq (spc0_pcx_req_pq[8:0]), |
| 519 | .spc0_pcx_atm_pq (spc0_pcx_atm_pq[8:0]), |
| 520 | .spc1_pcx_data_pa (spc1_pcx_data_pa[129:0]), |
| 521 | .spc1_pcx_req_pq (spc1_pcx_req_pq[8:0]), |
| 522 | .spc1_pcx_atm_pq (spc1_pcx_atm_pq[8:0]), |
| 523 | .spc2_pcx_data_pa (spc2_pcx_data_pa[129:0]), |
| 524 | .spc2_pcx_req_pq (spc2_pcx_req_pq[8:0]), |
| 525 | .spc2_pcx_atm_pq (spc2_pcx_atm_pq[8:0]), |
| 526 | .spc3_pcx_data_pa (spc3_pcx_data_pa[129:0]), |
| 527 | .spc3_pcx_req_pq (spc3_pcx_req_pq[8:0]), |
| 528 | .spc3_pcx_atm_pq (spc3_pcx_atm_pq[8:0]), |
| 529 | .spc4_pcx_data_pa (spc4_pcx_data_pa[129:0]), |
| 530 | .spc4_pcx_req_pq (spc4_pcx_req_pq[8:0]), |
| 531 | .spc4_pcx_atm_pq (spc4_pcx_atm_pq[8:0]), |
| 532 | .spc5_pcx_data_pa (spc5_pcx_data_pa[129:0]), |
| 533 | .spc5_pcx_req_pq (spc5_pcx_req_pq[8:0]), |
| 534 | .spc5_pcx_atm_pq (spc5_pcx_atm_pq[8:0]), |
| 535 | .spc6_pcx_data_pa (spc6_pcx_data_pa[129:0]), |
| 536 | .spc6_pcx_req_pq (spc6_pcx_req_pq[8:0]), |
| 537 | .spc6_pcx_atm_pq (spc6_pcx_atm_pq[8:0]), |
| 538 | .spc7_pcx_data_pa (spc7_pcx_data_pa[129:0]), |
| 539 | .spc7_pcx_req_pq (spc7_pcx_req_pq[8:0]), |
| 540 | .spc7_pcx_atm_pq (spc7_pcx_atm_pq[8:0]), |
| 541 | .scan_in(scan_in_buf[1]), |
| 542 | .scan_out(pcx_scan_out), |
| 543 | .l2clk (l2clk), |
| 544 | .ccx_aclk (ccx_aclk), |
| 545 | .ccx_bclk (ccx_bclk), |
| 546 | .tcu_scan_en (tcu_scan_en_buf), |
| 547 | .tcu_pce_ov (tcu_pce_ov_r)); |
| 548 | |
| 549 | |
| 550 | // top level repeaters |
| 551 | |
| 552 | ccx_trep trep0( |
| 553 | .cpu_rep_in (cpu_rep0_in[191:0]), |
| 554 | .cpu_rep_out (cpu_rep0_out[191:0])); |
| 555 | |
| 556 | ccx_trep trep1( |
| 557 | .cpu_rep_in (cpu_rep1_in[191:0]), |
| 558 | .cpu_rep_out (cpu_rep1_out[191:0])); |
| 559 | |
| 560 | |
| 561 | // top level staging flops |
| 562 | |
| 563 | ccx_tstg tstgl ( |
| 564 | .din (ccx_lstg_in[159:0]), |
| 565 | .dout (ccx_lstg_out[159:0]), |
| 566 | .local_stop (1'b0), |
| 567 | .scan_in(pcx_scan_out), |
| 568 | .scan_out(tstgl_scan_out), |
| 569 | .l2clk (l2clk), |
| 570 | .tcu_aclk (ccx_aclk), |
| 571 | .tcu_bclk (ccx_bclk), |
| 572 | .tcu_scan_en (tcu_scan_en_buf), |
| 573 | .tcu_pce_ov (tcu_pce_ov_r)); |
| 574 | |
| 575 | ccx_tstg tstgr ( |
| 576 | .din (ccx_rstg_in[159:0]), |
| 577 | .dout (ccx_rstg_out[159:0]), |
| 578 | .local_stop (1'b0), |
| 579 | .scan_in(tstgl_scan_out), |
| 580 | .scan_out(scan_out_1), |
| 581 | .l2clk (l2clk), |
| 582 | .tcu_aclk (ccx_aclk), |
| 583 | .tcu_bclk (ccx_bclk), |
| 584 | .tcu_scan_en (tcu_scan_en_buf), |
| 585 | .tcu_pce_ov (tcu_pce_ov_r)); |
| 586 | |
| 587 | // buffer scanout |
| 588 | |
| 589 | ccx_buff_macro__dbuff_32x__rep_1__stack_none__width_2 i_buf_scan ( |
| 590 | .din ({scan_out_1, scan_out_0}), |
| 591 | .dout ({scan_out[1:0]}) |
| 592 | ); |
| 593 | |
| 594 | |
| 595 | |
| 596 | endmodule // ccx |
| 597 | |
| 598 | // |
| 599 | // buff macro |
| 600 | // |
| 601 | // |
| 602 | |
| 603 | |
| 604 | |
| 605 | |
| 606 | |
| 607 | module ccx_buff_macro__dbuff_32x__rep_1__stack_none__width_8 ( |
| 608 | din, |
| 609 | dout); |
| 610 | input [7:0] din; |
| 611 | output [7:0] dout; |
| 612 | |
| 613 | |
| 614 | |
| 615 | |
| 616 | |
| 617 | |
| 618 | buff #(8) d0_0 ( |
| 619 | .in(din[7:0]), |
| 620 | .out(dout[7:0]) |
| 621 | ); |
| 622 | |
| 623 | |
| 624 | endmodule |
| 625 | |
| 626 | |
| 627 | |
| 628 | // |
| 629 | // invert macro |
| 630 | // |
| 631 | // |
| 632 | |
| 633 | |
| 634 | |
| 635 | /* |
| 636 | |
| 637 | module ccx_inv_macro__dinv_32x__stack_150c__width_150 ( |
| 638 | din, |
| 639 | dout); |
| 640 | input [149:0] din; |
| 641 | output [149:0] dout; |
| 642 | |
| 643 | |
| 644 | |
| 645 | |
| 646 | |
| 647 | |
| 648 | inv #(150) d0_0 ( |
| 649 | .in(din[149:0]), |
| 650 | .out(dout[149:0]) |
| 651 | ); |
| 652 | |
| 653 | |
| 654 | |
| 655 | |
| 656 | |
| 657 | |
| 658 | |
| 659 | |
| 660 | |
| 661 | endmodule |
| 662 | |
| 663 | */ |
| 664 | |
| 665 | |
| 666 | // |
| 667 | // buff macro |
| 668 | // |
| 669 | // |
| 670 | |
| 671 | |
| 672 | |
| 673 | |
| 674 | |
| 675 | module ccx_buff_macro__dbuff_32x__rep_1__stack_none__width_2 ( |
| 676 | din, |
| 677 | dout); |
| 678 | input [1:0] din; |
| 679 | output [1:0] dout; |
| 680 | |
| 681 | |
| 682 | |
| 683 | |
| 684 | |
| 685 | |
| 686 | buff #(2) d0_0 ( |
| 687 | .in(din[1:0]), |
| 688 | .out(dout[1:0]) |
| 689 | ); |
| 690 | |
| 691 | |
| 692 | |
| 693 | |
| 694 | |
| 695 | |
| 696 | |
| 697 | |
| 698 | endmodule |
| 699 | |
| 700 | `endif // `ifndef FPGA |
| 701 | |
| 702 | `ifdef FPGA |
| 703 | `timescale 1 ns / 100 ps |
| 704 | module ccx(cmp_gclk_c2_ccx_left, cmp_gclk_c2_ccx_right, scan_in, tcu_pce_ov, |
| 705 | gl_ccx_clk_stop_left, gl_ccx_clk_stop_right, tcu_aclk, tcu_bclk, |
| 706 | tcu_scan_en, cluster_arst_l, tcu_atpg_mode, scan_out, cpu_rep0_in, |
| 707 | cpu_rep0_out, cpu_rep1_in, cpu_rep1_out, ccx_lstg_in, ccx_lstg_out, |
| 708 | ccx_rstg_in, ccx_rstg_out, spc0_pcx_data_pa, spc0_pcx_req_pq, |
| 709 | spc0_pcx_atm_pq, spc1_pcx_data_pa, spc1_pcx_req_pq, spc1_pcx_atm_pq, |
| 710 | spc2_pcx_data_pa, spc2_pcx_req_pq, spc2_pcx_atm_pq, spc3_pcx_data_pa, |
| 711 | spc3_pcx_req_pq, spc3_pcx_atm_pq, spc4_pcx_data_pa, spc4_pcx_req_pq, |
| 712 | spc4_pcx_atm_pq, spc5_pcx_data_pa, spc5_pcx_req_pq, spc5_pcx_atm_pq, |
| 713 | spc6_pcx_data_pa, spc6_pcx_req_pq, spc6_pcx_atm_pq, spc7_pcx_data_pa, |
| 714 | spc7_pcx_req_pq, spc7_pcx_atm_pq, io_pcx_stall_pq, sctag0_pcx_stall_pq, |
| 715 | sctag1_pcx_stall_pq, sctag2_pcx_stall_pq, sctag3_pcx_stall_pq, |
| 716 | sctag4_pcx_stall_pq, sctag5_pcx_stall_pq, sctag6_pcx_stall_pq, |
| 717 | sctag7_pcx_stall_pq, pcx_spc0_grant_px, pcx_spc1_grant_px, |
| 718 | pcx_spc2_grant_px, pcx_spc3_grant_px, pcx_spc4_grant_px, |
| 719 | pcx_spc5_grant_px, pcx_spc6_grant_px, pcx_spc7_grant_px, |
| 720 | pcx_fpio_data_px2, pcx_fpio_data_rdy_px1, pcx_sctag0_atm_px1, |
| 721 | pcx_sctag0_data_px2, pcx_sctag0_data_rdy_px1, pcx_sctag1_atm_px1, |
| 722 | pcx_sctag1_data_px2, pcx_sctag1_data_rdy_px1, pcx_sctag2_atm_px1, |
| 723 | pcx_sctag2_data_px2, pcx_sctag2_data_rdy_px1, pcx_sctag3_atm_px1, |
| 724 | pcx_sctag3_data_px2, pcx_sctag3_data_rdy_px1, pcx_sctag4_atm_px1, |
| 725 | pcx_sctag4_data_px2, pcx_sctag4_data_rdy_px1, pcx_sctag5_atm_px1, |
| 726 | pcx_sctag5_data_px2, pcx_sctag5_data_rdy_px1, pcx_sctag6_atm_px1, |
| 727 | pcx_sctag6_data_px2, pcx_sctag6_data_rdy_px1, pcx_sctag7_atm_px1, |
| 728 | pcx_sctag7_data_px2, pcx_sctag7_data_rdy_px1, io_cpx_data_ca, |
| 729 | io_cpx_req_cq, sctag0_cpx_atom_cq, sctag0_cpx_data_ca, |
| 730 | sctag0_cpx_req_cq, sctag1_cpx_atom_cq, sctag1_cpx_data_ca, |
| 731 | sctag1_cpx_req_cq, sctag2_cpx_atom_cq, sctag2_cpx_data_ca, |
| 732 | sctag2_cpx_req_cq, sctag3_cpx_atom_cq, sctag3_cpx_data_ca, |
| 733 | sctag3_cpx_req_cq, sctag4_cpx_atom_cq, sctag4_cpx_data_ca, |
| 734 | sctag4_cpx_req_cq, sctag5_cpx_atom_cq, sctag5_cpx_data_ca, |
| 735 | sctag5_cpx_req_cq, sctag6_cpx_atom_cq, sctag6_cpx_data_ca, |
| 736 | sctag6_cpx_req_cq, sctag7_cpx_atom_cq, sctag7_cpx_data_ca, |
| 737 | sctag7_cpx_req_cq, cpx_io_grant_cx, cpx_sctag0_grant_cx, |
| 738 | cpx_sctag1_grant_cx, cpx_sctag2_grant_cx, cpx_sctag3_grant_cx, |
| 739 | cpx_sctag4_grant_cx, cpx_sctag5_grant_cx, cpx_sctag6_grant_cx, |
| 740 | cpx_sctag7_grant_cx, cpx_spc0_data_cx2, cpx_spc1_data_cx2, |
| 741 | cpx_spc2_data_cx2, cpx_spc3_data_cx2, cpx_spc4_data_cx2, |
| 742 | cpx_spc5_data_cx2, cpx_spc6_data_cx2, cpx_spc7_data_cx2); |
| 743 | |
| 744 | input cmp_gclk_c2_ccx_left; |
| 745 | input cmp_gclk_c2_ccx_right; |
| 746 | input [1:0] scan_in; |
| 747 | input tcu_pce_ov; |
| 748 | input gl_ccx_clk_stop_left; |
| 749 | input gl_ccx_clk_stop_right; |
| 750 | input tcu_aclk; |
| 751 | input tcu_bclk; |
| 752 | input tcu_scan_en; |
| 753 | input cluster_arst_l; |
| 754 | input tcu_atpg_mode; |
| 755 | output [1:0] scan_out; |
| 756 | input [191:0] cpu_rep0_in; |
| 757 | output [191:0] cpu_rep0_out; |
| 758 | input [191:0] cpu_rep1_in; |
| 759 | output [191:0] cpu_rep1_out; |
| 760 | input [159:0] ccx_lstg_in; |
| 761 | output [159:0] ccx_lstg_out; |
| 762 | input [159:0] ccx_rstg_in; |
| 763 | output [159:0] ccx_rstg_out; |
| 764 | input [129:0] spc0_pcx_data_pa; |
| 765 | input [8:0] spc0_pcx_req_pq; |
| 766 | input [8:0] spc0_pcx_atm_pq; |
| 767 | input [129:0] spc1_pcx_data_pa; |
| 768 | input [8:0] spc1_pcx_req_pq; |
| 769 | input [8:0] spc1_pcx_atm_pq; |
| 770 | input [129:0] spc2_pcx_data_pa; |
| 771 | input [8:0] spc2_pcx_req_pq; |
| 772 | input [8:0] spc2_pcx_atm_pq; |
| 773 | input [129:0] spc3_pcx_data_pa; |
| 774 | input [8:0] spc3_pcx_req_pq; |
| 775 | input [8:0] spc3_pcx_atm_pq; |
| 776 | input [129:0] spc4_pcx_data_pa; |
| 777 | input [8:0] spc4_pcx_req_pq; |
| 778 | input [8:0] spc4_pcx_atm_pq; |
| 779 | input [129:0] spc5_pcx_data_pa; |
| 780 | input [8:0] spc5_pcx_req_pq; |
| 781 | input [8:0] spc5_pcx_atm_pq; |
| 782 | input [129:0] spc6_pcx_data_pa; |
| 783 | input [8:0] spc6_pcx_req_pq; |
| 784 | input [8:0] spc6_pcx_atm_pq; |
| 785 | input [129:0] spc7_pcx_data_pa; |
| 786 | input [8:0] spc7_pcx_req_pq; |
| 787 | input [8:0] spc7_pcx_atm_pq; |
| 788 | input io_pcx_stall_pq; |
| 789 | input sctag0_pcx_stall_pq; |
| 790 | input sctag1_pcx_stall_pq; |
| 791 | input sctag2_pcx_stall_pq; |
| 792 | input sctag3_pcx_stall_pq; |
| 793 | input sctag4_pcx_stall_pq; |
| 794 | input sctag5_pcx_stall_pq; |
| 795 | input sctag6_pcx_stall_pq; |
| 796 | input sctag7_pcx_stall_pq; |
| 797 | output [8:0] pcx_spc0_grant_px; |
| 798 | output [8:0] pcx_spc1_grant_px; |
| 799 | output [8:0] pcx_spc2_grant_px; |
| 800 | output [8:0] pcx_spc3_grant_px; |
| 801 | output [8:0] pcx_spc4_grant_px; |
| 802 | output [8:0] pcx_spc5_grant_px; |
| 803 | output [8:0] pcx_spc6_grant_px; |
| 804 | output [8:0] pcx_spc7_grant_px; |
| 805 | output [129:0] pcx_fpio_data_px2; |
| 806 | output pcx_fpio_data_rdy_px1; |
| 807 | output pcx_sctag0_atm_px1; |
| 808 | output [129:0] pcx_sctag0_data_px2; |
| 809 | output pcx_sctag0_data_rdy_px1; |
| 810 | output pcx_sctag1_atm_px1; |
| 811 | output [129:0] pcx_sctag1_data_px2; |
| 812 | output pcx_sctag1_data_rdy_px1; |
| 813 | output pcx_sctag2_atm_px1; |
| 814 | output [129:0] pcx_sctag2_data_px2; |
| 815 | output pcx_sctag2_data_rdy_px1; |
| 816 | output pcx_sctag3_atm_px1; |
| 817 | output [129:0] pcx_sctag3_data_px2; |
| 818 | output pcx_sctag3_data_rdy_px1; |
| 819 | output pcx_sctag4_atm_px1; |
| 820 | output [129:0] pcx_sctag4_data_px2; |
| 821 | output pcx_sctag4_data_rdy_px1; |
| 822 | output pcx_sctag5_atm_px1; |
| 823 | output [129:0] pcx_sctag5_data_px2; |
| 824 | output pcx_sctag5_data_rdy_px1; |
| 825 | output pcx_sctag6_atm_px1; |
| 826 | output [129:0] pcx_sctag6_data_px2; |
| 827 | output pcx_sctag6_data_rdy_px1; |
| 828 | output pcx_sctag7_atm_px1; |
| 829 | output [129:0] pcx_sctag7_data_px2; |
| 830 | output pcx_sctag7_data_rdy_px1; |
| 831 | input [145:0] io_cpx_data_ca; |
| 832 | input [7:0] io_cpx_req_cq; |
| 833 | input sctag0_cpx_atom_cq; |
| 834 | input [145:0] sctag0_cpx_data_ca; |
| 835 | input [7:0] sctag0_cpx_req_cq; |
| 836 | input sctag1_cpx_atom_cq; |
| 837 | input [145:0] sctag1_cpx_data_ca; |
| 838 | input [7:0] sctag1_cpx_req_cq; |
| 839 | input sctag2_cpx_atom_cq; |
| 840 | input [145:0] sctag2_cpx_data_ca; |
| 841 | input [7:0] sctag2_cpx_req_cq; |
| 842 | input sctag3_cpx_atom_cq; |
| 843 | input [145:0] sctag3_cpx_data_ca; |
| 844 | input [7:0] sctag3_cpx_req_cq; |
| 845 | input sctag4_cpx_atom_cq; |
| 846 | input [145:0] sctag4_cpx_data_ca; |
| 847 | input [7:0] sctag4_cpx_req_cq; |
| 848 | input sctag5_cpx_atom_cq; |
| 849 | input [145:0] sctag5_cpx_data_ca; |
| 850 | input [7:0] sctag5_cpx_req_cq; |
| 851 | input sctag6_cpx_atom_cq; |
| 852 | input [145:0] sctag6_cpx_data_ca; |
| 853 | input [7:0] sctag6_cpx_req_cq; |
| 854 | input sctag7_cpx_atom_cq; |
| 855 | input [145:0] sctag7_cpx_data_ca; |
| 856 | input [7:0] sctag7_cpx_req_cq; |
| 857 | output [7:0] cpx_io_grant_cx; |
| 858 | output [7:0] cpx_sctag0_grant_cx; |
| 859 | output [7:0] cpx_sctag1_grant_cx; |
| 860 | output [7:0] cpx_sctag2_grant_cx; |
| 861 | output [7:0] cpx_sctag3_grant_cx; |
| 862 | output [7:0] cpx_sctag4_grant_cx; |
| 863 | output [7:0] cpx_sctag5_grant_cx; |
| 864 | output [7:0] cpx_sctag6_grant_cx; |
| 865 | output [7:0] cpx_sctag7_grant_cx; |
| 866 | output [145:0] cpx_spc0_data_cx2; |
| 867 | output [145:0] cpx_spc1_data_cx2; |
| 868 | output [145:0] cpx_spc2_data_cx2; |
| 869 | output [145:0] cpx_spc3_data_cx2; |
| 870 | output [145:0] cpx_spc4_data_cx2; |
| 871 | output [145:0] cpx_spc5_data_cx2; |
| 872 | output [145:0] cpx_spc6_data_cx2; |
| 873 | output [145:0] cpx_spc7_data_cx2; |
| 874 | |
| 875 | wire [1:0] scan_in_buf; |
| 876 | wire tcu_pce_ov_buf; |
| 877 | wire tcu_aclk_buf; |
| 878 | wire tcu_bclk_buf; |
| 879 | wire tcu_scan_en_buf; |
| 880 | wire cluster_arst_l_buf; |
| 881 | wire tcu_atpg_mode_buf; |
| 882 | wire array_wr_inhibit_unused; |
| 883 | wire l2clk; |
| 884 | wire ccx_aclk; |
| 885 | wire ccx_bclk; |
| 886 | wire clkgen_scanout; |
| 887 | wire tcu_pce_ov_r; |
| 888 | wire aclk_wmr_r_unused; |
| 889 | wire wmr_protect_r_unused; |
| 890 | wire wmr_r_unused; |
| 891 | wire por_r_unused; |
| 892 | wire cmp_slow_sync_en_r_unused; |
| 893 | wire slow_cmp_sync_en_r_unused; |
| 894 | wire scan_out_0; |
| 895 | wire pcx_scan_out; |
| 896 | wire tstgl_scan_out; |
| 897 | wire scan_out_1; |
| 898 | |
| 899 | buff_macro__dbuff_32x__rep_1__stack_none__width_8 i_buf_test_r( |
| 900 | .din ({scan_in[1:0], tcu_pce_ov, |
| 901 | tcu_aclk, tcu_bclk, tcu_scan_en, cluster_arst_l, |
| 902 | tcu_atpg_mode}), |
| 903 | .dout ({scan_in_buf[1:0], |
| 904 | tcu_pce_ov_buf, tcu_aclk_buf, tcu_bclk_buf, tcu_scan_en_buf, |
| 905 | cluster_arst_l_buf, tcu_atpg_mode_buf})); |
| 906 | clkgen_ccx_cmp clk_ccx( |
| 907 | .array_wr_inhibit (array_wr_inhibit_unused), |
| 908 | .tcu_atpg_mode (tcu_atpg_mode_buf), |
| 909 | .tcu_wr_inhibit (1'b0), |
| 910 | .l2clk (l2clk), |
| 911 | .aclk (ccx_aclk), |
| 912 | .bclk (ccx_bclk), |
| 913 | .scan_out (clkgen_scanout), |
| 914 | .pce_ov (tcu_pce_ov_r), |
| 915 | .aclk_wmr (aclk_wmr_r_unused), |
| 916 | .wmr_protect (wmr_protect_r_unused), |
| 917 | .wmr_ (wmr_r_unused), |
| 918 | .por_ (por_r_unused), |
| 919 | .cmp_slow_sync_en (cmp_slow_sync_en_r_unused), |
| 920 | .slow_cmp_sync_en (slow_cmp_sync_en_r_unused), |
| 921 | .tcu_clk_stop_left (gl_ccx_clk_stop_left), |
| 922 | .tcu_clk_stop_right (gl_ccx_clk_stop_right), |
| 923 | .tcu_pce_ov (tcu_pce_ov_buf), |
| 924 | .rst_wmr_protect (1'b0), |
| 925 | .rst_wmr_ (1'b1), |
| 926 | .rst_por_ (1'b1), |
| 927 | .ccu_cmp_slow_sync_en (1'b0), |
| 928 | .ccu_slow_cmp_sync_en (1'b0), |
| 929 | .tcu_div_bypass_left (1'b0), |
| 930 | .tcu_div_bypass_right (1'b0), |
| 931 | .ccu_div_ph (1'b1), |
| 932 | .cluster_div_en (1'b0), |
| 933 | .gclk_left (cmp_gclk_c2_ccx_left), |
| 934 | .gclk_right (cmp_gclk_c2_ccx_right), |
| 935 | .cluster_arst_l_left (cluster_arst_l_buf), |
| 936 | .cluster_arst_l_right (cluster_arst_l_buf), |
| 937 | .clk_ext (1'b0), |
| 938 | .ccu_serdes_dtm (1'b0), |
| 939 | .tcu_aclk (tcu_aclk_buf), |
| 940 | .tcu_bclk (tcu_bclk_buf), |
| 941 | .scan_en (tcu_scan_en_buf), |
| 942 | .scan_in (scan_in_buf[0])); |
| 943 | cpx cpx( |
| 944 | .cpx_io_grant_cx (cpx_io_grant_cx[7:0]), |
| 945 | .cpx_sctag0_grant_cx (cpx_sctag0_grant_cx[7:0]), |
| 946 | .cpx_sctag1_grant_cx (cpx_sctag1_grant_cx[7:0]), |
| 947 | .cpx_sctag2_grant_cx (cpx_sctag2_grant_cx[7:0]), |
| 948 | .cpx_sctag3_grant_cx (cpx_sctag3_grant_cx[7:0]), |
| 949 | .cpx_sctag4_grant_cx (cpx_sctag4_grant_cx[7:0]), |
| 950 | .cpx_sctag5_grant_cx (cpx_sctag5_grant_cx[7:0]), |
| 951 | .cpx_sctag6_grant_cx (cpx_sctag6_grant_cx[7:0]), |
| 952 | .cpx_sctag7_grant_cx (cpx_sctag7_grant_cx[7:0]), |
| 953 | .cpx_spc0_data_cx2 (cpx_spc0_data_cx2[145:0]), |
| 954 | .cpx_spc1_data_cx2 (cpx_spc1_data_cx2[145:0]), |
| 955 | .cpx_spc2_data_cx2 (cpx_spc2_data_cx2[145:0]), |
| 956 | .cpx_spc3_data_cx2 (cpx_spc3_data_cx2[145:0]), |
| 957 | .cpx_spc4_data_cx2 (cpx_spc4_data_cx2[145:0]), |
| 958 | .cpx_spc5_data_cx2 (cpx_spc5_data_cx2[145:0]), |
| 959 | .cpx_spc6_data_cx2 (cpx_spc6_data_cx2[145:0]), |
| 960 | .cpx_spc7_data_cx2 (cpx_spc7_data_cx2[145:0]), |
| 961 | .io_cpx_data_ca (io_cpx_data_ca[145:0]), |
| 962 | .io_cpx_req_cq (io_cpx_req_cq[7:0]), |
| 963 | .sctag0_cpx_atom_cq (sctag0_cpx_atom_cq), |
| 964 | .sctag0_cpx_data_ca (sctag0_cpx_data_ca[145:0]), |
| 965 | .sctag0_cpx_req_cq (sctag0_cpx_req_cq[7:0]), |
| 966 | .sctag1_cpx_atom_cq (sctag1_cpx_atom_cq), |
| 967 | .sctag1_cpx_data_ca (sctag1_cpx_data_ca[145:0]), |
| 968 | .sctag1_cpx_req_cq (sctag1_cpx_req_cq[7:0]), |
| 969 | .sctag2_cpx_atom_cq (sctag2_cpx_atom_cq), |
| 970 | .sctag2_cpx_data_ca (sctag2_cpx_data_ca[145:0]), |
| 971 | .sctag2_cpx_req_cq (sctag2_cpx_req_cq[7:0]), |
| 972 | .sctag3_cpx_atom_cq (sctag3_cpx_atom_cq), |
| 973 | .sctag3_cpx_data_ca (sctag3_cpx_data_ca[145:0]), |
| 974 | .sctag3_cpx_req_cq (sctag3_cpx_req_cq[7:0]), |
| 975 | .sctag4_cpx_atom_cq (sctag4_cpx_atom_cq), |
| 976 | .sctag4_cpx_data_ca (sctag4_cpx_data_ca[145:0]), |
| 977 | .sctag4_cpx_req_cq (sctag4_cpx_req_cq[7:0]), |
| 978 | .sctag5_cpx_atom_cq (sctag5_cpx_atom_cq), |
| 979 | .sctag5_cpx_data_ca (sctag5_cpx_data_ca[145:0]), |
| 980 | .sctag5_cpx_req_cq (sctag5_cpx_req_cq[7:0]), |
| 981 | .sctag6_cpx_atom_cq (sctag6_cpx_atom_cq), |
| 982 | .sctag6_cpx_data_ca (sctag6_cpx_data_ca[145:0]), |
| 983 | .sctag6_cpx_req_cq (sctag6_cpx_req_cq[7:0]), |
| 984 | .sctag7_cpx_atom_cq (sctag7_cpx_atom_cq), |
| 985 | .sctag7_cpx_data_ca (sctag7_cpx_data_ca[145:0]), |
| 986 | .sctag7_cpx_req_cq (sctag7_cpx_req_cq[7:0]), |
| 987 | .scan_in (clkgen_scanout), |
| 988 | .scan_out (scan_out_0), |
| 989 | .l2clk (l2clk), |
| 990 | .ccx_aclk (ccx_aclk), |
| 991 | .ccx_bclk (ccx_bclk), |
| 992 | .tcu_scan_en (tcu_scan_en_buf), |
| 993 | .tcu_pce_ov (tcu_pce_ov_r)); |
| 994 | pcx pcx( |
| 995 | .pcx_fpio_data_px2 (pcx_fpio_data_px2[129:0]), |
| 996 | .pcx_fpio_data_rdy_px1 (pcx_fpio_data_rdy_px1), |
| 997 | .pcx_sctag0_atm_px1 (pcx_sctag0_atm_px1), |
| 998 | .pcx_sctag0_data_px2 (pcx_sctag0_data_px2[129:0]), |
| 999 | .pcx_sctag0_data_rdy_px1 (pcx_sctag0_data_rdy_px1), |
| 1000 | .pcx_sctag1_atm_px1 (pcx_sctag1_atm_px1), |
| 1001 | .pcx_sctag1_data_px2 (pcx_sctag1_data_px2[129:0]), |
| 1002 | .pcx_sctag1_data_rdy_px1 (pcx_sctag1_data_rdy_px1), |
| 1003 | .pcx_sctag2_atm_px1 (pcx_sctag2_atm_px1), |
| 1004 | .pcx_sctag2_data_px2 (pcx_sctag2_data_px2[129:0]), |
| 1005 | .pcx_sctag2_data_rdy_px1 (pcx_sctag2_data_rdy_px1), |
| 1006 | .pcx_sctag3_atm_px1 (pcx_sctag3_atm_px1), |
| 1007 | .pcx_sctag3_data_px2 (pcx_sctag3_data_px2[129:0]), |
| 1008 | .pcx_sctag3_data_rdy_px1 (pcx_sctag3_data_rdy_px1), |
| 1009 | .pcx_sctag4_atm_px1 (pcx_sctag4_atm_px1), |
| 1010 | .pcx_sctag4_data_px2 (pcx_sctag4_data_px2[129:0]), |
| 1011 | .pcx_sctag4_data_rdy_px1 (pcx_sctag4_data_rdy_px1), |
| 1012 | .pcx_sctag5_atm_px1 (pcx_sctag5_atm_px1), |
| 1013 | .pcx_sctag5_data_px2 (pcx_sctag5_data_px2[129:0]), |
| 1014 | .pcx_sctag5_data_rdy_px1 (pcx_sctag5_data_rdy_px1), |
| 1015 | .pcx_sctag6_atm_px1 (pcx_sctag6_atm_px1), |
| 1016 | .pcx_sctag6_data_px2 (pcx_sctag6_data_px2[129:0]), |
| 1017 | .pcx_sctag6_data_rdy_px1 (pcx_sctag6_data_rdy_px1), |
| 1018 | .pcx_sctag7_atm_px1 (pcx_sctag7_atm_px1), |
| 1019 | .pcx_sctag7_data_px2 (pcx_sctag7_data_px2[129:0]), |
| 1020 | .pcx_sctag7_data_rdy_px1 (pcx_sctag7_data_rdy_px1), |
| 1021 | .pcx_spc0_grant_px (pcx_spc0_grant_px[8:0]), |
| 1022 | .pcx_spc1_grant_px (pcx_spc1_grant_px[8:0]), |
| 1023 | .pcx_spc2_grant_px (pcx_spc2_grant_px[8:0]), |
| 1024 | .pcx_spc3_grant_px (pcx_spc3_grant_px[8:0]), |
| 1025 | .pcx_spc4_grant_px (pcx_spc4_grant_px[8:0]), |
| 1026 | .pcx_spc5_grant_px (pcx_spc5_grant_px[8:0]), |
| 1027 | .pcx_spc6_grant_px (pcx_spc6_grant_px[8:0]), |
| 1028 | .pcx_spc7_grant_px (pcx_spc7_grant_px[8:0]), |
| 1029 | .io_pcx_stall_pq (io_pcx_stall_pq), |
| 1030 | .sctag0_pcx_stall_pq (sctag0_pcx_stall_pq), |
| 1031 | .sctag1_pcx_stall_pq (sctag1_pcx_stall_pq), |
| 1032 | .sctag2_pcx_stall_pq (sctag2_pcx_stall_pq), |
| 1033 | .sctag3_pcx_stall_pq (sctag3_pcx_stall_pq), |
| 1034 | .sctag4_pcx_stall_pq (sctag4_pcx_stall_pq), |
| 1035 | .sctag5_pcx_stall_pq (sctag5_pcx_stall_pq), |
| 1036 | .sctag6_pcx_stall_pq (sctag6_pcx_stall_pq), |
| 1037 | .sctag7_pcx_stall_pq (sctag7_pcx_stall_pq), |
| 1038 | .spc0_pcx_data_pa (spc0_pcx_data_pa[129:0]), |
| 1039 | .spc0_pcx_req_pq (spc0_pcx_req_pq[8:0]), |
| 1040 | .spc0_pcx_atm_pq (spc0_pcx_atm_pq[8:0]), |
| 1041 | .spc1_pcx_data_pa (spc1_pcx_data_pa[129:0]), |
| 1042 | .spc1_pcx_req_pq (spc1_pcx_req_pq[8:0]), |
| 1043 | .spc1_pcx_atm_pq (spc1_pcx_atm_pq[8:0]), |
| 1044 | .spc2_pcx_data_pa (spc2_pcx_data_pa[129:0]), |
| 1045 | .spc2_pcx_req_pq (spc2_pcx_req_pq[8:0]), |
| 1046 | .spc2_pcx_atm_pq (spc2_pcx_atm_pq[8:0]), |
| 1047 | .spc3_pcx_data_pa (spc3_pcx_data_pa[129:0]), |
| 1048 | .spc3_pcx_req_pq (spc3_pcx_req_pq[8:0]), |
| 1049 | .spc3_pcx_atm_pq (spc3_pcx_atm_pq[8:0]), |
| 1050 | .spc4_pcx_data_pa (spc4_pcx_data_pa[129:0]), |
| 1051 | .spc4_pcx_req_pq (spc4_pcx_req_pq[8:0]), |
| 1052 | .spc4_pcx_atm_pq (spc4_pcx_atm_pq[8:0]), |
| 1053 | .spc5_pcx_data_pa (spc5_pcx_data_pa[129:0]), |
| 1054 | .spc5_pcx_req_pq (spc5_pcx_req_pq[8:0]), |
| 1055 | .spc5_pcx_atm_pq (spc5_pcx_atm_pq[8:0]), |
| 1056 | .spc6_pcx_data_pa (spc6_pcx_data_pa[129:0]), |
| 1057 | .spc6_pcx_req_pq (spc6_pcx_req_pq[8:0]), |
| 1058 | .spc6_pcx_atm_pq (spc6_pcx_atm_pq[8:0]), |
| 1059 | .spc7_pcx_data_pa (spc7_pcx_data_pa[129:0]), |
| 1060 | .spc7_pcx_req_pq (spc7_pcx_req_pq[8:0]), |
| 1061 | .spc7_pcx_atm_pq (spc7_pcx_atm_pq[8:0]), |
| 1062 | .scan_in (scan_in_buf[1]), |
| 1063 | .scan_out (pcx_scan_out), |
| 1064 | .l2clk (l2clk), |
| 1065 | .ccx_aclk (ccx_aclk), |
| 1066 | .ccx_bclk (ccx_bclk), |
| 1067 | .tcu_scan_en (tcu_scan_en_buf), |
| 1068 | .tcu_pce_ov (tcu_pce_ov_r)); |
| 1069 | ccx_trep trep0( |
| 1070 | .cpu_rep_in (cpu_rep0_in[191:0]), |
| 1071 | .cpu_rep_out (cpu_rep0_out[191:0])); |
| 1072 | ccx_trep trep1( |
| 1073 | .cpu_rep_in (cpu_rep1_in[191:0]), |
| 1074 | .cpu_rep_out (cpu_rep1_out[191:0])); |
| 1075 | ccx_tstg tstgl( |
| 1076 | .din (ccx_lstg_in[159:0]), |
| 1077 | .dout (ccx_lstg_out[159:0]), |
| 1078 | .local_stop (1'b0), |
| 1079 | .scan_in (pcx_scan_out), |
| 1080 | .scan_out (tstgl_scan_out), |
| 1081 | .l2clk (l2clk), |
| 1082 | .tcu_aclk (ccx_aclk), |
| 1083 | .tcu_bclk (ccx_bclk), |
| 1084 | .tcu_scan_en (tcu_scan_en_buf), |
| 1085 | .tcu_pce_ov (tcu_pce_ov_r)); |
| 1086 | ccx_tstg tstgr( |
| 1087 | .din (ccx_rstg_in[159:0]), |
| 1088 | .dout (ccx_rstg_out[159:0]), |
| 1089 | .local_stop (1'b0), |
| 1090 | .scan_in (tstgl_scan_out), |
| 1091 | .scan_out (scan_out_1), |
| 1092 | .l2clk (l2clk), |
| 1093 | .tcu_aclk (ccx_aclk), |
| 1094 | .tcu_bclk (ccx_bclk), |
| 1095 | .tcu_scan_en (tcu_scan_en_buf), |
| 1096 | .tcu_pce_ov (tcu_pce_ov_r)); |
| 1097 | buff_macro__dbuff_32x__rep_1__stack_none__width_2 i_buf_scan( |
| 1098 | .din ({scan_out_1, scan_out_0}), |
| 1099 | .dout ({scan_out[1:0]})); |
| 1100 | endmodule |
| 1101 | |
| 1102 | |
| 1103 | `endif // `ifdef FPGA |
| 1104 | |