| 1 | // ========== Copyright Header Begin ========================================== |
| 2 | // |
| 3 | // OpenSPARC T2 Processor File: cpx_ob2_dp.v |
| 4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved |
| 5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. |
| 6 | // |
| 7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 8 | // |
| 9 | // This program is free software; you can redistribute it and/or modify |
| 10 | // it under the terms of the GNU General Public License as published by |
| 11 | // the Free Software Foundation; version 2 of the License. |
| 12 | // |
| 13 | // This program is distributed in the hope that it will be useful, |
| 14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | // GNU General Public License for more details. |
| 17 | // |
| 18 | // You should have received a copy of the GNU General Public License |
| 19 | // along with this program; if not, write to the Free Software |
| 20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 21 | // |
| 22 | // For the avoidance of doubt, and except that if any non-GPL license |
| 23 | // choice is available it will apply instead, Sun elects to use only |
| 24 | // the General Public License version 2 (GPLv2) at this time for any |
| 25 | // software where a choice of GPL license versions is made |
| 26 | // available with the language indicating that GPLv2 or any later version |
| 27 | // may be used, or where a choice of which version of the GPL is applied is |
| 28 | // otherwise unspecified. |
| 29 | // |
| 30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
| 31 | // CA 95054 USA or visit www.sun.com if you need additional information or |
| 32 | // have any questions. |
| 33 | // |
| 34 | // ========== Copyright Header End ============================================ |
| 35 | `ifndef FPGA |
| 36 | module cpx_ob2_dp ( |
| 37 | cpx_spc_data_cx2, |
| 38 | cpx_spc_data_cx2_prebuf); |
| 39 | wire [145:0] in; |
| 40 | wire [145:0] in_swz; |
| 41 | wire [145:0] in_px2; |
| 42 | wire [145:0] out_swz; |
| 43 | |
| 44 | |
| 45 | output [145:0] cpx_spc_data_cx2; |
| 46 | |
| 47 | input [145:0] cpx_spc_data_cx2_prebuf; |
| 48 | |
| 49 | |
| 50 | assign in[145:0] = cpx_spc_data_cx2_prebuf[145:0]; |
| 51 | assign in_swz[72:0] = { |
| 52 | in[0],in[2],in[4],in[6],in[8],in[10],in[12],in[14],in[16],in[18], |
| 53 | in[20],in[22],in[24],in[26],in[28],in[30],in[32],in[34],in[36],in[38], |
| 54 | in[40],in[42],in[44],in[46],in[48],in[50],in[52],in[54],in[56],in[58], |
| 55 | in[60],in[62],in[64],in[66],in[68],in[70],in[72],in[74],in[76],in[78], |
| 56 | in[80],in[82],in[84],in[86],in[88],in[90],in[92],in[94],in[96],in[98], |
| 57 | in[100],in[102],in[104],in[106],in[108],in[110],in[112],in[114],in[116],in[118], |
| 58 | in[120],in[122],in[124],in[126],in[128],in[130],in[132],in[134],in[136],in[138], |
| 59 | in[140],in[142],in[144] |
| 60 | }; |
| 61 | |
| 62 | |
| 63 | |
| 64 | assign in_swz[145:73] = { |
| 65 | in[1],in[3],in[5],in[7],in[9],in[11],in[13],in[15],in[17],in[19], |
| 66 | in[21],in[23],in[25],in[27],in[29],in[31],in[33],in[35],in[37],in[39], |
| 67 | in[41],in[43],in[45],in[47],in[49],in[51],in[53],in[55],in[57],in[59], |
| 68 | in[61],in[63],in[65],in[67],in[69],in[71],in[73],in[75],in[77],in[79], |
| 69 | in[81],in[83],in[85],in[87],in[89],in[91],in[93],in[95],in[97],in[99], |
| 70 | in[101],in[103],in[105],in[107],in[109],in[111],in[113],in[115],in[117],in[119], |
| 71 | in[121],in[123],in[125],in[127],in[129],in[131],in[133],in[135],in[137],in[139], |
| 72 | in[141],in[143],in[145] |
| 73 | }; |
| 74 | |
| 75 | |
| 76 | cpx_ob2_dp_buff_macro__dbuff_32x__rep_1__stack_74c__width_73 i_buf_data_0 ( |
| 77 | .din ({in_swz[72:0] }), |
| 78 | .dout ({in_px2[72:0]}) |
| 79 | ); |
| 80 | |
| 81 | cpx_ob2_dp_buff_macro__dbuff_32x__rep_1__stack_74c__width_73 i_buf_data_1 ( |
| 82 | .din ({in_swz[145:73]}), |
| 83 | .dout ({in_px2[145:73]}) |
| 84 | ); |
| 85 | |
| 86 | |
| 87 | assign { |
| 88 | out_swz[0],out_swz[2],out_swz[4],out_swz[6],out_swz[8],out_swz[10],out_swz[12],out_swz[14],out_swz[16],out_swz[18], |
| 89 | out_swz[20],out_swz[22],out_swz[24],out_swz[26],out_swz[28],out_swz[30],out_swz[32],out_swz[34],out_swz[36],out_swz[38], |
| 90 | out_swz[40],out_swz[42],out_swz[44],out_swz[46],out_swz[48],out_swz[50],out_swz[52],out_swz[54],out_swz[56],out_swz[58], |
| 91 | out_swz[60],out_swz[62],out_swz[64],out_swz[66],out_swz[68],out_swz[70],out_swz[72],out_swz[74],out_swz[76],out_swz[78], |
| 92 | out_swz[80],out_swz[82],out_swz[84],out_swz[86],out_swz[88],out_swz[90],out_swz[92],out_swz[94],out_swz[96],out_swz[98], |
| 93 | out_swz[100],out_swz[102],out_swz[104],out_swz[106],out_swz[108],out_swz[110],out_swz[112],out_swz[114],out_swz[116],out_swz[118], |
| 94 | out_swz[120],out_swz[122],out_swz[124],out_swz[126],out_swz[128],out_swz[130],out_swz[132],out_swz[134],out_swz[136],out_swz[138], |
| 95 | out_swz[140],out_swz[142],out_swz[144] |
| 96 | } = in_px2[72:0]; |
| 97 | |
| 98 | |
| 99 | |
| 100 | assign { |
| 101 | out_swz[1],out_swz[3],out_swz[5],out_swz[7],out_swz[9],out_swz[11],out_swz[13],out_swz[15],out_swz[17],out_swz[19], |
| 102 | out_swz[21],out_swz[23],out_swz[25],out_swz[27],out_swz[29],out_swz[31],out_swz[33],out_swz[35],out_swz[37],out_swz[39], |
| 103 | out_swz[41],out_swz[43],out_swz[45],out_swz[47],out_swz[49],out_swz[51],out_swz[53],out_swz[55],out_swz[57],out_swz[59], |
| 104 | out_swz[61],out_swz[63],out_swz[65],out_swz[67],out_swz[69],out_swz[71],out_swz[73],out_swz[75],out_swz[77],out_swz[79], |
| 105 | out_swz[81],out_swz[83],out_swz[85],out_swz[87],out_swz[89],out_swz[91],out_swz[93],out_swz[95],out_swz[97],out_swz[99], |
| 106 | out_swz[101],out_swz[103],out_swz[105],out_swz[107],out_swz[109],out_swz[111],out_swz[113],out_swz[115],out_swz[117],out_swz[119], |
| 107 | out_swz[121],out_swz[123],out_swz[125],out_swz[127],out_swz[129],out_swz[131],out_swz[133],out_swz[135],out_swz[137],out_swz[139], |
| 108 | out_swz[141],out_swz[143],out_swz[145] |
| 109 | } = in_px2[145:73]; |
| 110 | |
| 111 | |
| 112 | assign cpx_spc_data_cx2[145:0] = out_swz[145:0]; |
| 113 | |
| 114 | endmodule // cpx_bfs_dp |
| 115 | |
| 116 | |
| 117 | // |
| 118 | // buff macro |
| 119 | // |
| 120 | // |
| 121 | |
| 122 | |
| 123 | |
| 124 | |
| 125 | |
| 126 | module cpx_ob2_dp_buff_macro__dbuff_32x__rep_1__stack_74c__width_73 ( |
| 127 | din, |
| 128 | dout); |
| 129 | input [72:0] din; |
| 130 | output [72:0] dout; |
| 131 | |
| 132 | |
| 133 | |
| 134 | |
| 135 | |
| 136 | |
| 137 | buff #(73) d0_0 ( |
| 138 | .in(din[72:0]), |
| 139 | .out(dout[72:0]) |
| 140 | ); |
| 141 | |
| 142 | |
| 143 | |
| 144 | |
| 145 | |
| 146 | |
| 147 | |
| 148 | |
| 149 | endmodule |
| 150 | |
| 151 | |
| 152 | `endif // `ifndef FPGA |
| 153 | |
| 154 | `ifdef FPGA |
| 155 | `timescale 1 ns / 100 ps |
| 156 | module cpx_ob2_dp(cpx_spc_data_cx2, cpx_spc_data_cx2_prebuf); |
| 157 | |
| 158 | output [145:0] cpx_spc_data_cx2; |
| 159 | input [145:0] cpx_spc_data_cx2_prebuf; |
| 160 | |
| 161 | wire [145:0] in; |
| 162 | wire [145:0] in_swz; |
| 163 | wire [145:0] in_px2; |
| 164 | wire [145:0] out_swz; |
| 165 | |
| 166 | assign in[145:0] = cpx_spc_data_cx2_prebuf[145:0]; |
| 167 | assign in_swz[72:0] = {in[0], in[2], in[4], in[6], in[8], in[10], |
| 168 | in[12], in[14], in[16], in[18], in[20], in[22], in[24], in[26], |
| 169 | in[28], in[30], in[32], in[34], in[36], in[38], in[40], in[42], |
| 170 | in[44], in[46], in[48], in[50], in[52], in[54], in[56], in[58], |
| 171 | in[60], in[62], in[64], in[66], in[68], in[70], in[72], in[74], |
| 172 | in[76], in[78], in[80], in[82], in[84], in[86], in[88], in[90], |
| 173 | in[92], in[94], in[96], in[98], in[100], in[102], in[104], |
| 174 | in[106], in[108], in[110], in[112], in[114], in[116], in[118], |
| 175 | in[120], in[122], in[124], in[126], in[128], in[130], in[132], |
| 176 | in[134], in[136], in[138], in[140], in[142], in[144]}; |
| 177 | assign in_swz[145:73] = {in[1], in[3], in[5], in[7], in[9], in[11], |
| 178 | in[13], in[15], in[17], in[19], in[21], in[23], in[25], in[27], |
| 179 | in[29], in[31], in[33], in[35], in[37], in[39], in[41], in[43], |
| 180 | in[45], in[47], in[49], in[51], in[53], in[55], in[57], in[59], |
| 181 | in[61], in[63], in[65], in[67], in[69], in[71], in[73], in[75], |
| 182 | in[77], in[79], in[81], in[83], in[85], in[87], in[89], in[91], |
| 183 | in[93], in[95], in[97], in[99], in[101], in[103], in[105], |
| 184 | in[107], in[109], in[111], in[113], in[115], in[117], in[119], |
| 185 | in[121], in[123], in[125], in[127], in[129], in[131], in[133], |
| 186 | in[135], in[137], in[139], in[141], in[143], in[145]}; |
| 187 | assign {out_swz[0], out_swz[2], out_swz[4], out_swz[6], out_swz[8], |
| 188 | out_swz[10], out_swz[12], out_swz[14], out_swz[16], out_swz[18], |
| 189 | out_swz[20], out_swz[22], out_swz[24], out_swz[26], out_swz[28], |
| 190 | out_swz[30], out_swz[32], out_swz[34], out_swz[36], out_swz[38], |
| 191 | out_swz[40], out_swz[42], out_swz[44], out_swz[46], out_swz[48], |
| 192 | out_swz[50], out_swz[52], out_swz[54], out_swz[56], out_swz[58], |
| 193 | out_swz[60], out_swz[62], out_swz[64], out_swz[66], out_swz[68], |
| 194 | out_swz[70], out_swz[72], out_swz[74], out_swz[76], out_swz[78], |
| 195 | out_swz[80], out_swz[82], out_swz[84], out_swz[86], out_swz[88], |
| 196 | out_swz[90], out_swz[92], out_swz[94], out_swz[96], out_swz[98], |
| 197 | out_swz[100], out_swz[102], out_swz[104], out_swz[106], |
| 198 | out_swz[108], out_swz[110], out_swz[112], out_swz[114], |
| 199 | out_swz[116], out_swz[118], out_swz[120], out_swz[122], |
| 200 | out_swz[124], out_swz[126], out_swz[128], out_swz[130], |
| 201 | out_swz[132], out_swz[134], out_swz[136], out_swz[138], |
| 202 | out_swz[140], out_swz[142], out_swz[144]} = in_px2[72:0]; |
| 203 | assign {out_swz[1], out_swz[3], out_swz[5], out_swz[7], out_swz[9], |
| 204 | out_swz[11], out_swz[13], out_swz[15], out_swz[17], out_swz[19], |
| 205 | out_swz[21], out_swz[23], out_swz[25], out_swz[27], out_swz[29], |
| 206 | out_swz[31], out_swz[33], out_swz[35], out_swz[37], out_swz[39], |
| 207 | out_swz[41], out_swz[43], out_swz[45], out_swz[47], out_swz[49], |
| 208 | out_swz[51], out_swz[53], out_swz[55], out_swz[57], out_swz[59], |
| 209 | out_swz[61], out_swz[63], out_swz[65], out_swz[67], out_swz[69], |
| 210 | out_swz[71], out_swz[73], out_swz[75], out_swz[77], out_swz[79], |
| 211 | out_swz[81], out_swz[83], out_swz[85], out_swz[87], out_swz[89], |
| 212 | out_swz[91], out_swz[93], out_swz[95], out_swz[97], out_swz[99], |
| 213 | out_swz[101], out_swz[103], out_swz[105], out_swz[107], |
| 214 | out_swz[109], out_swz[111], out_swz[113], out_swz[115], |
| 215 | out_swz[117], out_swz[119], out_swz[121], out_swz[123], |
| 216 | out_swz[125], out_swz[127], out_swz[129], out_swz[131], |
| 217 | out_swz[133], out_swz[135], out_swz[137], out_swz[139], |
| 218 | out_swz[141], out_swz[143], out_swz[145]} = in_px2[145:73]; |
| 219 | assign cpx_spc_data_cx2[145:0] = out_swz[145:0]; |
| 220 | |
| 221 | buff_macro__dbuff_32x__rep_1__stack_74c__width_73 i_buf_data_0( |
| 222 | .din ({in_swz[72:0]}), |
| 223 | .dout ({in_px2[72:0]})); |
| 224 | buff_macro__dbuff_32x__rep_1__stack_74c__width_73 i_buf_data_1( |
| 225 | .din ({in_swz[145:73]}), |
| 226 | .dout ({in_px2[145:73]})); |
| 227 | endmodule |
| 228 | |
| 229 | |
| 230 | `endif // `ifdef FPGA |
| 231 | |