| 1 | // ========== Copyright Header Begin ========================================== |
| 2 | // |
| 3 | // OpenSPARC T2 Processor File: dmu_ilu_eil_rcdbldr.v |
| 4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved |
| 5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. |
| 6 | // |
| 7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 8 | // |
| 9 | // This program is free software; you can redistribute it and/or modify |
| 10 | // it under the terms of the GNU General Public License as published by |
| 11 | // the Free Software Foundation; version 2 of the License. |
| 12 | // |
| 13 | // This program is distributed in the hope that it will be useful, |
| 14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | // GNU General Public License for more details. |
| 17 | // |
| 18 | // You should have received a copy of the GNU General Public License |
| 19 | // along with this program; if not, write to the Free Software |
| 20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 21 | // |
| 22 | // For the avoidance of doubt, and except that if any non-GPL license |
| 23 | // choice is available it will apply instead, Sun elects to use only |
| 24 | // the General Public License version 2 (GPLv2) at this time for any |
| 25 | // software where a choice of GPL license versions is made |
| 26 | // available with the language indicating that GPLv2 or any later version |
| 27 | // may be used, or where a choice of which version of the GPL is applied is |
| 28 | // otherwise unspecified. |
| 29 | // |
| 30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
| 31 | // CA 95054 USA or visit www.sun.com if you need additional information or |
| 32 | // have any questions. |
| 33 | // |
| 34 | // ========== Copyright Header End ============================================ |
| 35 | module dmu_ilu_eil_rcdbldr ( |
| 36 | clk, |
| 37 | rst_l, |
| 38 | |
| 39 | d2p_ehb_data, |
| 40 | d2p_ehb_dpar, |
| 41 | |
| 42 | k2y_rcd, |
| 43 | k2y_rcd_enq, |
| 44 | |
| 45 | // rcd fifo |
| 46 | rcd_deq, |
| 47 | rcd_empty, |
| 48 | |
| 49 | // ISB interface |
| 50 | eil2isb_log, |
| 51 | eil2isb_tag, |
| 52 | eil2isb_low_addr, |
| 53 | |
| 54 | // type decoder |
| 55 | has_payld, |
| 56 | rcd_is_cpl, |
| 57 | rcd_is_cpl_reg, |
| 58 | rcd_is_pio_mwr, |
| 59 | |
| 60 | // rcd info |
| 61 | pio_tag, |
| 62 | align_addr, |
| 63 | payld_len, |
| 64 | d_ptr_in, |
| 65 | |
| 66 | // for EP poison bit |
| 67 | dou_sbd_vld_rcdbldr, |
| 68 | dou_sbd_err_rcdbldr, |
| 69 | xfrfsm_is_wfh, |
| 70 | data_start, |
| 71 | data_done, |
| 72 | |
| 73 | // debug signals |
| 74 | log_ep_history, |
| 75 | ep_history, |
| 76 | log_dou_sbd_err, |
| 77 | take_care_rcd_ep, |
| 78 | out_rcd_ep ); |
| 79 | |
| 80 | |
| 81 | // synopsys sync_set_reset "rst_l" |
| 82 | |
| 83 | // >>>>>>>>>>>>>>>>>>>>>>>>> Parameter Declarations <<<<<<<<<<<<<<<<<<<<<<<<< |
| 84 | |
| 85 | // rcd type |
| 86 | parameter PIO_MRD32 = 7'b0000000, |
| 87 | PIO_MRD64 = 7'b0100000, |
| 88 | PIO_IORD = 7'b0000010, |
| 89 | PIO_CFGRD = 7'b000010z, |
| 90 | PIO_MWR32 = 7'b1000000, |
| 91 | PIO_MWR64 = 7'b1100000, |
| 92 | PIO_IOWR = 7'b1000010, |
| 93 | PIO_CFGWR = 7'b100010z, |
| 94 | DMA_CPL = 7'b0001010, |
| 95 | DMA_CPLLK = 7'b0001011, |
| 96 | DMA_CPLD = 7'b1001010; |
| 97 | |
| 98 | |
| 99 | // >>>>>>>>>>>>>>>>>>>>>>>>> Port Declarations <<<<<<<<<<<<<<<<<<<<<<<<<<<<<< |
| 100 | |
| 101 | //--------------------------------------------------------------------- |
| 102 | // Clock and Reset Signals |
| 103 | //--------------------------------------------------------------------- |
| 104 | input clk; // input clock |
| 105 | input rst_l; // input reset |
| 106 | |
| 107 | //--------------------------------------------------------------------- |
| 108 | // rcd interface to TMU |
| 109 | //--------------------------------------------------------------------- |
| 110 | input [`FIRE_DLC_EPE_REC_WDTH-1:0] k2y_rcd; // record |
| 111 | input k2y_rcd_enq; // enqueue for record |
| 112 | |
| 113 | //--------------------------------------------------------------------- |
| 114 | // EHB interface |
| 115 | //--------------------------------------------------------------------- |
| 116 | output [`FIRE_EHB_REC_WDTH-1:0] d2p_ehb_data; // EHB record |
| 117 | output [3:0] d2p_ehb_dpar; // EHB word parity for header rcd |
| 118 | |
| 119 | //--------------------------------------------------------------------- |
| 120 | // ISB interface |
| 121 | //--------------------------------------------------------------------- |
| 122 | output eil2isb_log; // log non-posted PIO request to ISB |
| 123 | output [4:0] eil2isb_tag; // tlp_tag[4:0] in PIO-req rcd |
| 124 | output [3:2] eil2isb_low_addr; // addr[3:2] in PIO-req rcd |
| 125 | |
| 126 | //--------------------------------------------------------------------- |
| 127 | // talk to xfrfms.v - rcd fifo |
| 128 | //--------------------------------------------------------------------- |
| 129 | input rcd_deq; // from *_xfrfsm.v |
| 130 | output rcd_empty; // to *_xfrfsm.v |
| 131 | |
| 132 | //--------------------------------------------------------------------- |
| 133 | // type decoder outputs |
| 134 | //--------------------------------------------------------------------- |
| 135 | output has_payld; // to *_xfrfsm.v |
| 136 | output rcd_is_cpl; // to bufmgr, xfrfsm, relgen |
| 137 | output rcd_is_cpl_reg; // flopped rcd_is_cpl |
| 138 | output rcd_is_pio_mwr; // to *_relgen.v |
| 139 | |
| 140 | //--------------------------------------------------------------------- |
| 141 | // rcd info |
| 142 | //--------------------------------------------------------------------- |
| 143 | output [3:0] pio_tag; // to *_relgen.v |
| 144 | output [5:2] align_addr; // to *_datafsm.v |
| 145 | output [7:0] payld_len; // to *_bufmgr.v & *_datafsm.v |
| 146 | output [5:0] d_ptr_in; // to *_datafsm.v |
| 147 | |
| 148 | //--------------------------------------------------------------------- |
| 149 | // EP poison bit in output record |
| 150 | //--------------------------------------------------------------------- |
| 151 | input dou_sbd_vld_rcdbldr; // dou cl aveirable to pull |
| 152 | input dou_sbd_err_rcdbldr; // dou cl error |
| 153 | input xfrfsm_is_wfh; |
| 154 | input data_start; |
| 155 | input data_done; |
| 156 | |
| 157 | //--------------------------------------------------------------------- |
| 158 | // debug signals |
| 159 | //--------------------------------------------------------------------- |
| 160 | output log_ep_history; |
| 161 | output ep_history; |
| 162 | output log_dou_sbd_err; |
| 163 | output take_care_rcd_ep; |
| 164 | output out_rcd_ep; |
| 165 | |
| 166 | // >>>>>>>>>>>>>>>>>>>>>>>>> Data Type Declarations <<<<<<<<<<<<<<<<<<<<<<<<< |
| 167 | |
| 168 | // ~~~~~~~~~~~~~~~~~~~~~~~~~ REGISTER - FLOPS ~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
| 169 | reg rcd_is_cpl_reg; |
| 170 | |
| 171 | reg [`FIRE_EHB_REC_WDTH-1:0] d2p_ehb_data; |
| 172 | reg [3:0] d2p_ehb_dpar; |
| 173 | reg eil2isb_log; |
| 174 | reg [4:0] eil2isb_tag; |
| 175 | reg [3:2] eil2isb_low_addr; |
| 176 | |
| 177 | reg log_dou_sbd_err; |
| 178 | reg ep_history; |
| 179 | |
| 180 | // ~~~~~~~~~~~~~~~~~~~~~~~~~ REGISTER - NON-FLOPS ~~~~~~~~~~~~~~~~~~~~~~~~ |
| 181 | reg is_pio_mem64; |
| 182 | reg non_posted_pio; |
| 183 | reg rcd_is_pio_mwr; |
| 184 | reg rcd_is_cpl; |
| 185 | |
| 186 | // ~~~~~~~~~~~~~~~~~~~~~~~~~ NETS ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ |
| 187 | wire has_payld; |
| 188 | |
| 189 | wire [`FIRE_DLC_EPE_REC_WDTH-1:0] curr_rcd; |
| 190 | wire [`FIRE_EHB_REC_WDTH-1:0] n_d2p_ehb_data; |
| 191 | wire [3:0] n_d2p_ehb_dpar; |
| 192 | |
| 193 | wire n_eil2isb_log; |
| 194 | wire [4:0] n_eil2isb_tag; |
| 195 | wire [3:2] n_eil2isb_low_addr; |
| 196 | |
| 197 | wire log_ep_history; |
| 198 | wire take_care_rcd_ep; |
| 199 | wire out_rcd_ep; |
| 200 | |
| 201 | //--------------------------------------------------------------------- |
| 202 | // In record fields |
| 203 | //--------------------------------------------------------------------- |
| 204 | wire [`FIRE_DLC_EPE_DPTR_WDTH-1:0] in_rcd_dptr; |
| 205 | wire [`FIRE_DLC_EPE_ADDR_WDTH-1:0] in_rcd_addr; |
| 206 | wire [`FIRE_DLC_EPE_FDWBE_WDTH-1:0] in_rcd_fdwbe; |
| 207 | wire [`FIRE_DLC_EPE_LDWBE_WDTH-1:0] in_rcd_ldwbe; |
| 208 | wire [`FIRE_DLC_EPE_TAG_WDTH-1:0] in_rcd_tag; |
| 209 | wire [`FIRE_DLC_EPE_REQID_WDTH-1:0] in_rcd_reqid; |
| 210 | wire [`FIRE_DLC_EPE_LEN_WDTH-1:0] in_rcd_len; |
| 211 | wire [`FIRE_DLC_EPE_ATR_WDTH-1:0] in_rcd_atr; |
| 212 | wire [`FIRE_DLC_EPE_TC_WDTH-1:0] in_rcd_tc; |
| 213 | wire [`FIRE_DLC_EPE_TYPE_WDTH-1:0] in_rcd_type; |
| 214 | wire [`FIRE_DLC_EPE_F_WDTH-1:0] in_rcd_f; |
| 215 | |
| 216 | //--------------------------------------------------------------------- |
| 217 | // Out record fields |
| 218 | //--------------------------------------------------------------------- |
| 219 | wire [`FIRE_EHB_1DWH_WDTH-1:0] out_rcd_1dwh; |
| 220 | wire [`FIRE_EHB_2DWH_WDTH-1:0] out_rcd_2dwh; |
| 221 | wire [`FIRE_EHB_3DWH_WDTH-1:0] out_rcd_3dwh; |
| 222 | wire [`FIRE_EHB_4DWH_WDTH-1:0] out_rcd_4dwh; |
| 223 | |
| 224 | // >>>>>>>>>>>>>>>>>>>>>>>>> Zero In Checkers <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<< |
| 225 | |
| 226 | /* 0in odd_parity -var {n_d2p_ehb_data[127:96], n_d2p_ehb_dpar[3]} |
| 227 | -name ilu_eil_odd_pargen_3 |
| 228 | -active ~rcd_empty */ |
| 229 | /* 0in odd_parity -var {n_d2p_ehb_data[95:64], n_d2p_ehb_dpar[2]} |
| 230 | -name ilu_eil_odd_pargen_2 |
| 231 | -active ~rcd_empty */ |
| 232 | /* 0in odd_parity -var {n_d2p_ehb_data[63:32], n_d2p_ehb_dpar[1]} |
| 233 | -name ilu_eil_odd_pargen_1 |
| 234 | -active ~rcd_empty */ |
| 235 | /* 0in odd_parity -var {n_d2p_ehb_data[31:0], n_d2p_ehb_dpar[0]} |
| 236 | -name ilu_eil_odd_pargen_0 |
| 237 | -active ~rcd_empty */ |
| 238 | |
| 239 | /* 0in one_hot -var {rcd_is_pio_mwr, non_posted_pio, rcd_is_cpl} |
| 240 | -active ~rcd_empty */ |
| 241 | |
| 242 | // 0in known_driven -var data_done |
| 243 | // N2- AT 04/06/05: duplicate checkers: x0in known_driven -var data_start |
| 244 | // 0in known_driven -var log_ep_history |
| 245 | |
| 246 | // >>>>>>>>>>>>>>>>>>>>>>>>> Function Declarations <<<<<<<<<<<<<<<<<<<<<<<<<< |
| 247 | |
| 248 | function [3:0] calc_parity; |
| 249 | input [127:0] data; |
| 250 | begin |
| 251 | calc_parity[3] = ~(^data[127:96]); |
| 252 | |
| 253 | calc_parity[2] = ~(^data[95:64]); |
| 254 | |
| 255 | calc_parity[1] = ~(^data[63:32]); |
| 256 | |
| 257 | calc_parity[0] = ~(^data[31:0]); |
| 258 | end |
| 259 | endfunction // calc_parity |
| 260 | |
| 261 | // >>>>>>>>>>>>>>>>>>>>>>>>> RTL/Behavioral Model <<<<<<<<<<<<<<<<<<<<<<<<<<< |
| 262 | |
| 263 | //--------------------------------------------------------------------- |
| 264 | // In record fields |
| 265 | //--------------------------------------------------------------------- |
| 266 | assign in_rcd_dptr = curr_rcd[`FIRE_DLC_EPE_DPTR_MSB:`FIRE_DLC_EPE_DPTR_LSB]; |
| 267 | assign in_rcd_addr = curr_rcd[`FIRE_DLC_EPE_ADDR_MSB:`FIRE_DLC_EPE_ADDR_LSB]; |
| 268 | assign in_rcd_fdwbe = curr_rcd[`FIRE_DLC_EPE_FDWBE_MSB:`FIRE_DLC_EPE_FDWBE_LSB]; |
| 269 | assign in_rcd_ldwbe = curr_rcd[`FIRE_DLC_EPE_LDWBE_MSB:`FIRE_DLC_EPE_LDWBE_LSB]; |
| 270 | assign in_rcd_tag = curr_rcd[`FIRE_DLC_EPE_TAG_MSB:`FIRE_DLC_EPE_TAG_LSB]; |
| 271 | assign in_rcd_reqid = curr_rcd[`FIRE_DLC_EPE_REQID_MSB:`FIRE_DLC_EPE_REQID_LSB]; |
| 272 | assign in_rcd_len = curr_rcd[`FIRE_DLC_EPE_LEN_MSB:`FIRE_DLC_EPE_LEN_LSB]; |
| 273 | assign in_rcd_atr = curr_rcd[`FIRE_DLC_EPE_ATR_MSB:`FIRE_DLC_EPE_ATR_LSB]; |
| 274 | assign in_rcd_tc = curr_rcd[`FIRE_DLC_EPE_TC_MSB:`FIRE_DLC_EPE_TC_LSB]; |
| 275 | assign in_rcd_type = curr_rcd[`FIRE_DLC_EPE_TYPE_MSB:`FIRE_DLC_EPE_TYPE_LSB]; |
| 276 | assign in_rcd_f = curr_rcd[`FIRE_DLC_EPE_F_MSB:`FIRE_DLC_EPE_F_LSB]; |
| 277 | |
| 278 | |
| 279 | //--------------------------------------------------------------------- |
| 280 | // type decoder |
| 281 | //--------------------------------------------------------------------- |
| 282 | always @ (in_rcd_f or in_rcd_type) |
| 283 | begin |
| 284 | is_pio_mem64 = 1'b0; |
| 285 | rcd_is_pio_mwr = 1'b0; |
| 286 | non_posted_pio = 1'b0; |
| 287 | rcd_is_cpl = 1'b0; |
| 288 | |
| 289 | casez ({in_rcd_f, in_rcd_type}) // 0in < case -parallel -full -active ~rcd_empty |
| 290 | PIO_MRD32, |
| 291 | PIO_IORD, |
| 292 | PIO_CFGRD: non_posted_pio = 1'b1; |
| 293 | |
| 294 | PIO_MRD64: |
| 295 | begin |
| 296 | is_pio_mem64 = 1'b1; |
| 297 | non_posted_pio = 1'b1; |
| 298 | end |
| 299 | |
| 300 | PIO_MWR32: |
| 301 | begin |
| 302 | rcd_is_pio_mwr = 1'b1; |
| 303 | end |
| 304 | |
| 305 | PIO_MWR64: |
| 306 | begin |
| 307 | is_pio_mem64 = 1'b1; |
| 308 | rcd_is_pio_mwr = 1'b1; |
| 309 | end |
| 310 | |
| 311 | PIO_IOWR, |
| 312 | PIO_CFGWR: |
| 313 | begin |
| 314 | non_posted_pio = 1'b1; |
| 315 | end |
| 316 | |
| 317 | DMA_CPLD, |
| 318 | DMA_CPL, |
| 319 | DMA_CPLLK: |
| 320 | begin |
| 321 | rcd_is_cpl = 1'b1; |
| 322 | end |
| 323 | |
| 324 | endcase // casez({in_rcd_f, in_rcd_type}) |
| 325 | end // always @ (in_rcd_f or in_rcd_type) |
| 326 | |
| 327 | assign has_payld = in_rcd_f[1]; |
| 328 | assign take_care_rcd_ep = in_rcd_type[3] & in_rcd_f[1]; // DMA CplD |
| 329 | |
| 330 | // flop rcd_is_cpl |
| 331 | always @ (posedge clk) |
| 332 | if(~rst_l) begin |
| 333 | rcd_is_cpl_reg <= 1'b0; |
| 334 | end |
| 335 | else begin |
| 336 | rcd_is_cpl_reg <= rcd_is_cpl; |
| 337 | end |
| 338 | |
| 339 | //--------------------------------------------------------------------- |
| 340 | // ISB interface |
| 341 | //--------------------------------------------------------------------- |
| 342 | assign n_eil2isb_log = non_posted_pio & rcd_deq; |
| 343 | assign n_eil2isb_tag = in_rcd_tag[4:0]; |
| 344 | assign n_eil2isb_low_addr = in_rcd_addr[3:2]; |
| 345 | |
| 346 | always @ (posedge clk) |
| 347 | if(~rst_l) begin |
| 348 | eil2isb_log <= {{1'b0}}; |
| 349 | eil2isb_tag <= {5{1'b0}}; |
| 350 | eil2isb_low_addr <= {2{1'b0}}; |
| 351 | end |
| 352 | else begin |
| 353 | eil2isb_log <= n_eil2isb_log; |
| 354 | eil2isb_tag <= n_eil2isb_tag; |
| 355 | eil2isb_low_addr <= n_eil2isb_low_addr; |
| 356 | end |
| 357 | |
| 358 | //--------------------------------------------------------------------- |
| 359 | // record info |
| 360 | //--------------------------------------------------------------------- |
| 361 | assign pio_tag = in_rcd_tag[3:0]; |
| 362 | assign align_addr = in_rcd_addr[5:2]; |
| 363 | assign payld_len = in_rcd_len[7:0]; |
| 364 | assign d_ptr_in = in_rcd_dptr; |
| 365 | |
| 366 | //--------------------------------------------------------------------- |
| 367 | // Out record fields |
| 368 | //--------------------------------------------------------------------- |
| 369 | assign out_rcd_4dwh = is_pio_mem64 ? in_rcd_addr[31:0] : in_rcd_addr[63:32]; |
| 370 | assign out_rcd_3dwh = is_pio_mem64 ? in_rcd_addr[63:32] : in_rcd_addr[31:0]; |
| 371 | assign out_rcd_2dwh = {in_rcd_reqid, in_rcd_tag, in_rcd_ldwbe, in_rcd_fdwbe}; |
| 372 | |
| 373 | // zero fill td field and all reserved fields |
| 374 | assign out_rcd_1dwh = {1'b0, in_rcd_f, in_rcd_type, 1'b0, in_rcd_tc, 4'b0, |
| 375 | 1'b0, out_rcd_ep, in_rcd_atr, 2'b0, in_rcd_len}; |
| 376 | |
| 377 | // out record |
| 378 | assign n_d2p_ehb_data = {out_rcd_1dwh, out_rcd_2dwh, out_rcd_3dwh, out_rcd_4dwh}; |
| 379 | |
| 380 | assign n_d2p_ehb_dpar = calc_parity(n_d2p_ehb_data); |
| 381 | |
| 382 | always @ (posedge clk) |
| 383 | if(~rst_l) begin |
| 384 | d2p_ehb_data <= {`FIRE_EHB_REC_WDTH{1'b0}}; |
| 385 | d2p_ehb_dpar <= {4{1'b0}}; |
| 386 | end |
| 387 | else begin |
| 388 | if (~xfrfsm_is_wfh) begin |
| 389 | d2p_ehb_data <= n_d2p_ehb_data; |
| 390 | d2p_ehb_dpar <= n_d2p_ehb_dpar; |
| 391 | end |
| 392 | end |
| 393 | |
| 394 | //------------------------------------------------------------------------ |
| 395 | // EP bit in out_rcd |
| 396 | // at data_start, enable loging of dou_sbd_err_rcdbldr to ep_history; |
| 397 | // at data_done, disable loging of dou_sbd_err_rcdbldr to ep_history; |
| 398 | // when data_start & data_done both asserted (that only_one_rd case), |
| 399 | // disable loging of dou_sbd_err_rcdbldr to ep_history. |
| 400 | //------------------------------------------------------------------------ |
| 401 | always @ (posedge clk) |
| 402 | begin |
| 403 | if (~rst_l) log_dou_sbd_err <= 1'b0; |
| 404 | else if (data_done) begin |
| 405 | log_dou_sbd_err <= 1'b0; |
| 406 | end |
| 407 | else if (data_start) begin |
| 408 | log_dou_sbd_err <= 1'b1; |
| 409 | end |
| 410 | end |
| 411 | |
| 412 | assign log_ep_history = ~data_done & (data_start | log_dou_sbd_err) & dou_sbd_vld_rcdbldr; |
| 413 | |
| 414 | always @ (posedge clk) |
| 415 | begin |
| 416 | if (~rst_l) ep_history <= 1'b0; |
| 417 | else if (log_ep_history) begin |
| 418 | ep_history <= ep_history | dou_sbd_err_rcdbldr; |
| 419 | end |
| 420 | else ep_history <= 1'b0; |
| 421 | end |
| 422 | |
| 423 | assign out_rcd_ep = take_care_rcd_ep ? (dou_sbd_err_rcdbldr | ep_history) : 1'b0; |
| 424 | |
| 425 | // >>>>>>>>>>>>>>>>>>>>>>>>> Instantiations <<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<<< |
| 426 | |
| 427 | // srq fifo |
| 428 | pcie_common_srq #(4, `FIRE_DLC_EPE_REC_WDTH) rcd_fifo |
| 429 | ( |
| 430 | .clk (clk), |
| 431 | .rst_l (rst_l), |
| 432 | .enq (k2y_rcd_enq), |
| 433 | .deq (rcd_deq), |
| 434 | .di (k2y_rcd), |
| 435 | .do (curr_rcd), |
| 436 | .empty (rcd_empty), |
| 437 | .full (), |
| 438 | .afull () |
| 439 | ); |
| 440 | |
| 441 | endmodule // dmu_ilu_eil_rcdbldr |
| 442 | |