| 1 | // ========== Copyright Header Begin ========================================== |
| 2 | // |
| 3 | // OpenSPARC T2 Processor File: dmu_imu_rds_msi_csr_int_mondo_data_1_reg_entry.v |
| 4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved |
| 5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. |
| 6 | // |
| 7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 8 | // |
| 9 | // This program is free software; you can redistribute it and/or modify |
| 10 | // it under the terms of the GNU General Public License as published by |
| 11 | // the Free Software Foundation; version 2 of the License. |
| 12 | // |
| 13 | // This program is distributed in the hope that it will be useful, |
| 14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | // GNU General Public License for more details. |
| 17 | // |
| 18 | // You should have received a copy of the GNU General Public License |
| 19 | // along with this program; if not, write to the Free Software |
| 20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 21 | // |
| 22 | // For the avoidance of doubt, and except that if any non-GPL license |
| 23 | // choice is available it will apply instead, Sun elects to use only |
| 24 | // the General Public License version 2 (GPLv2) at this time for any |
| 25 | // software where a choice of GPL license versions is made |
| 26 | // available with the language indicating that GPLv2 or any later version |
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| 31 | // CA 95054 USA or visit www.sun.com if you need additional information or |
| 32 | // have any questions. |
| 33 | // |
| 34 | // ========== Copyright Header End ============================================ |
| 35 | module dmu_imu_rds_msi_csr_int_mondo_data_1_reg_entry |
| 36 | ( |
| 37 | // synopsys translate_off |
| 38 | omni_ld, |
| 39 | omni_data, |
| 40 | // synopsys translate_on |
| 41 | clk, |
| 42 | rst_l, |
| 43 | w_ld, |
| 44 | csrbus_wr_data, |
| 45 | int_mondo_data_1_reg_csrbus_read_data |
| 46 | ); |
| 47 | |
| 48 | //==================================================================== |
| 49 | // Polarity declarations |
| 50 | //==================================================================== |
| 51 | // synopsys translate_off |
| 52 | input omni_ld; // Omni load |
| 53 | // vlint flag_input_port_not_connected off |
| 54 | input [`FIRE_DLC_IMU_RDS_MSI_CSR_INT_MONDO_DATA_1_REG_WIDTH - 1:0] omni_data; |
| 55 | // Omni write data |
| 56 | // synopsys translate_on |
| 57 | // vlint flag_input_port_not_connected on |
| 58 | input clk; // Clock signal |
| 59 | input rst_l; // Reset signal |
| 60 | input w_ld; // SW load |
| 61 | // vlint flag_input_port_not_connected off |
| 62 | input [`FIRE_CSRBUS_DATA_WIDTH-1:0] csrbus_wr_data; // SW write data |
| 63 | // vlint flag_input_port_not_connected on |
| 64 | output [`FIRE_DLC_IMU_RDS_MSI_CSR_INT_MONDO_DATA_1_REG_WIDTH-1:0] int_mondo_data_1_reg_csrbus_read_data; |
| 65 | // SW read data |
| 66 | |
| 67 | //==================================================================== |
| 68 | // Type declarations |
| 69 | //==================================================================== |
| 70 | // synopsys translate_off |
| 71 | wire omni_ld; // Omni load |
| 72 | // vlint flag_dangling_net_within_module off |
| 73 | // vlint flag_net_has_no_load off |
| 74 | wire [`FIRE_DLC_IMU_RDS_MSI_CSR_INT_MONDO_DATA_1_REG_WIDTH - 1:0] omni_data; |
| 75 | // Omni write data |
| 76 | // synopsys translate_on |
| 77 | // vlint flag_dangling_net_within_module on |
| 78 | // vlint flag_net_has_no_load on |
| 79 | wire clk; // Clock signal |
| 80 | wire rst_l; // Reset signal |
| 81 | wire w_ld; // SW load |
| 82 | // vlint flag_dangling_net_within_module off |
| 83 | // vlint flag_net_has_no_load off |
| 84 | wire [`FIRE_CSRBUS_DATA_WIDTH-1:0] csrbus_wr_data; // SW write data |
| 85 | // vlint flag_dangling_net_within_module on |
| 86 | // vlint flag_net_has_no_load on |
| 87 | wire [`FIRE_DLC_IMU_RDS_MSI_CSR_INT_MONDO_DATA_1_REG_WIDTH-1:0] int_mondo_data_1_reg_csrbus_read_data; |
| 88 | // SW read data |
| 89 | |
| 90 | //==================================================================== |
| 91 | // Logic |
| 92 | //==================================================================== |
| 93 | |
| 94 | //----- Reset values |
| 95 | // verilint 531 off |
| 96 | wire [63:0] reset_data = 64'h0; |
| 97 | // verilint 531 on |
| 98 | |
| 99 | //----- Active high reset wires |
| 100 | wire rst_l_active_high = ~rst_l; |
| 101 | |
| 102 | //==================================================== |
| 103 | // Instantiation of flops |
| 104 | //==================================================== |
| 105 | |
| 106 | // bit 0 |
| 107 | csr_sw csr_sw_0 |
| 108 | ( |
| 109 | // synopsys translate_off |
| 110 | .omni_ld (omni_ld), |
| 111 | .omni_data (omni_data[0]), |
| 112 | .omni_rw_alias (1'b1), |
| 113 | .omni_rw1c_alias (1'b0), |
| 114 | .omni_rw1s_alias (1'b0), |
| 115 | // synopsys translate_on |
| 116 | .rst (rst_l_active_high), |
| 117 | .rst_val (reset_data[0]), |
| 118 | .csr_ld (w_ld), |
| 119 | .csr_data (csrbus_wr_data[0]), |
| 120 | .rw_alias (1'b1), |
| 121 | .rw1c_alias (1'b0), |
| 122 | .rw1s_alias (1'b0), |
| 123 | .hw_ld (1'b0), |
| 124 | .hw_data (1'b0), |
| 125 | .cp (clk), |
| 126 | .q (int_mondo_data_1_reg_csrbus_read_data[0]) |
| 127 | ); |
| 128 | |
| 129 | // bit 1 |
| 130 | csr_sw csr_sw_1 |
| 131 | ( |
| 132 | // synopsys translate_off |
| 133 | .omni_ld (omni_ld), |
| 134 | .omni_data (omni_data[1]), |
| 135 | .omni_rw_alias (1'b1), |
| 136 | .omni_rw1c_alias (1'b0), |
| 137 | .omni_rw1s_alias (1'b0), |
| 138 | // synopsys translate_on |
| 139 | .rst (rst_l_active_high), |
| 140 | .rst_val (reset_data[1]), |
| 141 | .csr_ld (w_ld), |
| 142 | .csr_data (csrbus_wr_data[1]), |
| 143 | .rw_alias (1'b1), |
| 144 | .rw1c_alias (1'b0), |
| 145 | .rw1s_alias (1'b0), |
| 146 | .hw_ld (1'b0), |
| 147 | .hw_data (1'b0), |
| 148 | .cp (clk), |
| 149 | .q (int_mondo_data_1_reg_csrbus_read_data[1]) |
| 150 | ); |
| 151 | |
| 152 | // bit 2 |
| 153 | csr_sw csr_sw_2 |
| 154 | ( |
| 155 | // synopsys translate_off |
| 156 | .omni_ld (omni_ld), |
| 157 | .omni_data (omni_data[2]), |
| 158 | .omni_rw_alias (1'b1), |
| 159 | .omni_rw1c_alias (1'b0), |
| 160 | .omni_rw1s_alias (1'b0), |
| 161 | // synopsys translate_on |
| 162 | .rst (rst_l_active_high), |
| 163 | .rst_val (reset_data[2]), |
| 164 | .csr_ld (w_ld), |
| 165 | .csr_data (csrbus_wr_data[2]), |
| 166 | .rw_alias (1'b1), |
| 167 | .rw1c_alias (1'b0), |
| 168 | .rw1s_alias (1'b0), |
| 169 | .hw_ld (1'b0), |
| 170 | .hw_data (1'b0), |
| 171 | .cp (clk), |
| 172 | .q (int_mondo_data_1_reg_csrbus_read_data[2]) |
| 173 | ); |
| 174 | |
| 175 | // bit 3 |
| 176 | csr_sw csr_sw_3 |
| 177 | ( |
| 178 | // synopsys translate_off |
| 179 | .omni_ld (omni_ld), |
| 180 | .omni_data (omni_data[3]), |
| 181 | .omni_rw_alias (1'b1), |
| 182 | .omni_rw1c_alias (1'b0), |
| 183 | .omni_rw1s_alias (1'b0), |
| 184 | // synopsys translate_on |
| 185 | .rst (rst_l_active_high), |
| 186 | .rst_val (reset_data[3]), |
| 187 | .csr_ld (w_ld), |
| 188 | .csr_data (csrbus_wr_data[3]), |
| 189 | .rw_alias (1'b1), |
| 190 | .rw1c_alias (1'b0), |
| 191 | .rw1s_alias (1'b0), |
| 192 | .hw_ld (1'b0), |
| 193 | .hw_data (1'b0), |
| 194 | .cp (clk), |
| 195 | .q (int_mondo_data_1_reg_csrbus_read_data[3]) |
| 196 | ); |
| 197 | |
| 198 | // bit 4 |
| 199 | csr_sw csr_sw_4 |
| 200 | ( |
| 201 | // synopsys translate_off |
| 202 | .omni_ld (omni_ld), |
| 203 | .omni_data (omni_data[4]), |
| 204 | .omni_rw_alias (1'b1), |
| 205 | .omni_rw1c_alias (1'b0), |
| 206 | .omni_rw1s_alias (1'b0), |
| 207 | // synopsys translate_on |
| 208 | .rst (rst_l_active_high), |
| 209 | .rst_val (reset_data[4]), |
| 210 | .csr_ld (w_ld), |
| 211 | .csr_data (csrbus_wr_data[4]), |
| 212 | .rw_alias (1'b1), |
| 213 | .rw1c_alias (1'b0), |
| 214 | .rw1s_alias (1'b0), |
| 215 | .hw_ld (1'b0), |
| 216 | .hw_data (1'b0), |
| 217 | .cp (clk), |
| 218 | .q (int_mondo_data_1_reg_csrbus_read_data[4]) |
| 219 | ); |
| 220 | |
| 221 | // bit 5 |
| 222 | csr_sw csr_sw_5 |
| 223 | ( |
| 224 | // synopsys translate_off |
| 225 | .omni_ld (omni_ld), |
| 226 | .omni_data (omni_data[5]), |
| 227 | .omni_rw_alias (1'b1), |
| 228 | .omni_rw1c_alias (1'b0), |
| 229 | .omni_rw1s_alias (1'b0), |
| 230 | // synopsys translate_on |
| 231 | .rst (rst_l_active_high), |
| 232 | .rst_val (reset_data[5]), |
| 233 | .csr_ld (w_ld), |
| 234 | .csr_data (csrbus_wr_data[5]), |
| 235 | .rw_alias (1'b1), |
| 236 | .rw1c_alias (1'b0), |
| 237 | .rw1s_alias (1'b0), |
| 238 | .hw_ld (1'b0), |
| 239 | .hw_data (1'b0), |
| 240 | .cp (clk), |
| 241 | .q (int_mondo_data_1_reg_csrbus_read_data[5]) |
| 242 | ); |
| 243 | |
| 244 | // bit 6 |
| 245 | csr_sw csr_sw_6 |
| 246 | ( |
| 247 | // synopsys translate_off |
| 248 | .omni_ld (omni_ld), |
| 249 | .omni_data (omni_data[6]), |
| 250 | .omni_rw_alias (1'b1), |
| 251 | .omni_rw1c_alias (1'b0), |
| 252 | .omni_rw1s_alias (1'b0), |
| 253 | // synopsys translate_on |
| 254 | .rst (rst_l_active_high), |
| 255 | .rst_val (reset_data[6]), |
| 256 | .csr_ld (w_ld), |
| 257 | .csr_data (csrbus_wr_data[6]), |
| 258 | .rw_alias (1'b1), |
| 259 | .rw1c_alias (1'b0), |
| 260 | .rw1s_alias (1'b0), |
| 261 | .hw_ld (1'b0), |
| 262 | .hw_data (1'b0), |
| 263 | .cp (clk), |
| 264 | .q (int_mondo_data_1_reg_csrbus_read_data[6]) |
| 265 | ); |
| 266 | |
| 267 | // bit 7 |
| 268 | csr_sw csr_sw_7 |
| 269 | ( |
| 270 | // synopsys translate_off |
| 271 | .omni_ld (omni_ld), |
| 272 | .omni_data (omni_data[7]), |
| 273 | .omni_rw_alias (1'b1), |
| 274 | .omni_rw1c_alias (1'b0), |
| 275 | .omni_rw1s_alias (1'b0), |
| 276 | // synopsys translate_on |
| 277 | .rst (rst_l_active_high), |
| 278 | .rst_val (reset_data[7]), |
| 279 | .csr_ld (w_ld), |
| 280 | .csr_data (csrbus_wr_data[7]), |
| 281 | .rw_alias (1'b1), |
| 282 | .rw1c_alias (1'b0), |
| 283 | .rw1s_alias (1'b0), |
| 284 | .hw_ld (1'b0), |
| 285 | .hw_data (1'b0), |
| 286 | .cp (clk), |
| 287 | .q (int_mondo_data_1_reg_csrbus_read_data[7]) |
| 288 | ); |
| 289 | |
| 290 | // bit 8 |
| 291 | csr_sw csr_sw_8 |
| 292 | ( |
| 293 | // synopsys translate_off |
| 294 | .omni_ld (omni_ld), |
| 295 | .omni_data (omni_data[8]), |
| 296 | .omni_rw_alias (1'b1), |
| 297 | .omni_rw1c_alias (1'b0), |
| 298 | .omni_rw1s_alias (1'b0), |
| 299 | // synopsys translate_on |
| 300 | .rst (rst_l_active_high), |
| 301 | .rst_val (reset_data[8]), |
| 302 | .csr_ld (w_ld), |
| 303 | .csr_data (csrbus_wr_data[8]), |
| 304 | .rw_alias (1'b1), |
| 305 | .rw1c_alias (1'b0), |
| 306 | .rw1s_alias (1'b0), |
| 307 | .hw_ld (1'b0), |
| 308 | .hw_data (1'b0), |
| 309 | .cp (clk), |
| 310 | .q (int_mondo_data_1_reg_csrbus_read_data[8]) |
| 311 | ); |
| 312 | |
| 313 | // bit 9 |
| 314 | csr_sw csr_sw_9 |
| 315 | ( |
| 316 | // synopsys translate_off |
| 317 | .omni_ld (omni_ld), |
| 318 | .omni_data (omni_data[9]), |
| 319 | .omni_rw_alias (1'b1), |
| 320 | .omni_rw1c_alias (1'b0), |
| 321 | .omni_rw1s_alias (1'b0), |
| 322 | // synopsys translate_on |
| 323 | .rst (rst_l_active_high), |
| 324 | .rst_val (reset_data[9]), |
| 325 | .csr_ld (w_ld), |
| 326 | .csr_data (csrbus_wr_data[9]), |
| 327 | .rw_alias (1'b1), |
| 328 | .rw1c_alias (1'b0), |
| 329 | .rw1s_alias (1'b0), |
| 330 | .hw_ld (1'b0), |
| 331 | .hw_data (1'b0), |
| 332 | .cp (clk), |
| 333 | .q (int_mondo_data_1_reg_csrbus_read_data[9]) |
| 334 | ); |
| 335 | |
| 336 | // bit 10 |
| 337 | csr_sw csr_sw_10 |
| 338 | ( |
| 339 | // synopsys translate_off |
| 340 | .omni_ld (omni_ld), |
| 341 | .omni_data (omni_data[10]), |
| 342 | .omni_rw_alias (1'b1), |
| 343 | .omni_rw1c_alias (1'b0), |
| 344 | .omni_rw1s_alias (1'b0), |
| 345 | // synopsys translate_on |
| 346 | .rst (rst_l_active_high), |
| 347 | .rst_val (reset_data[10]), |
| 348 | .csr_ld (w_ld), |
| 349 | .csr_data (csrbus_wr_data[10]), |
| 350 | .rw_alias (1'b1), |
| 351 | .rw1c_alias (1'b0), |
| 352 | .rw1s_alias (1'b0), |
| 353 | .hw_ld (1'b0), |
| 354 | .hw_data (1'b0), |
| 355 | .cp (clk), |
| 356 | .q (int_mondo_data_1_reg_csrbus_read_data[10]) |
| 357 | ); |
| 358 | |
| 359 | // bit 11 |
| 360 | csr_sw csr_sw_11 |
| 361 | ( |
| 362 | // synopsys translate_off |
| 363 | .omni_ld (omni_ld), |
| 364 | .omni_data (omni_data[11]), |
| 365 | .omni_rw_alias (1'b1), |
| 366 | .omni_rw1c_alias (1'b0), |
| 367 | .omni_rw1s_alias (1'b0), |
| 368 | // synopsys translate_on |
| 369 | .rst (rst_l_active_high), |
| 370 | .rst_val (reset_data[11]), |
| 371 | .csr_ld (w_ld), |
| 372 | .csr_data (csrbus_wr_data[11]), |
| 373 | .rw_alias (1'b1), |
| 374 | .rw1c_alias (1'b0), |
| 375 | .rw1s_alias (1'b0), |
| 376 | .hw_ld (1'b0), |
| 377 | .hw_data (1'b0), |
| 378 | .cp (clk), |
| 379 | .q (int_mondo_data_1_reg_csrbus_read_data[11]) |
| 380 | ); |
| 381 | |
| 382 | // bit 12 |
| 383 | csr_sw csr_sw_12 |
| 384 | ( |
| 385 | // synopsys translate_off |
| 386 | .omni_ld (omni_ld), |
| 387 | .omni_data (omni_data[12]), |
| 388 | .omni_rw_alias (1'b1), |
| 389 | .omni_rw1c_alias (1'b0), |
| 390 | .omni_rw1s_alias (1'b0), |
| 391 | // synopsys translate_on |
| 392 | .rst (rst_l_active_high), |
| 393 | .rst_val (reset_data[12]), |
| 394 | .csr_ld (w_ld), |
| 395 | .csr_data (csrbus_wr_data[12]), |
| 396 | .rw_alias (1'b1), |
| 397 | .rw1c_alias (1'b0), |
| 398 | .rw1s_alias (1'b0), |
| 399 | .hw_ld (1'b0), |
| 400 | .hw_data (1'b0), |
| 401 | .cp (clk), |
| 402 | .q (int_mondo_data_1_reg_csrbus_read_data[12]) |
| 403 | ); |
| 404 | |
| 405 | // bit 13 |
| 406 | csr_sw csr_sw_13 |
| 407 | ( |
| 408 | // synopsys translate_off |
| 409 | .omni_ld (omni_ld), |
| 410 | .omni_data (omni_data[13]), |
| 411 | .omni_rw_alias (1'b1), |
| 412 | .omni_rw1c_alias (1'b0), |
| 413 | .omni_rw1s_alias (1'b0), |
| 414 | // synopsys translate_on |
| 415 | .rst (rst_l_active_high), |
| 416 | .rst_val (reset_data[13]), |
| 417 | .csr_ld (w_ld), |
| 418 | .csr_data (csrbus_wr_data[13]), |
| 419 | .rw_alias (1'b1), |
| 420 | .rw1c_alias (1'b0), |
| 421 | .rw1s_alias (1'b0), |
| 422 | .hw_ld (1'b0), |
| 423 | .hw_data (1'b0), |
| 424 | .cp (clk), |
| 425 | .q (int_mondo_data_1_reg_csrbus_read_data[13]) |
| 426 | ); |
| 427 | |
| 428 | // bit 14 |
| 429 | csr_sw csr_sw_14 |
| 430 | ( |
| 431 | // synopsys translate_off |
| 432 | .omni_ld (omni_ld), |
| 433 | .omni_data (omni_data[14]), |
| 434 | .omni_rw_alias (1'b1), |
| 435 | .omni_rw1c_alias (1'b0), |
| 436 | .omni_rw1s_alias (1'b0), |
| 437 | // synopsys translate_on |
| 438 | .rst (rst_l_active_high), |
| 439 | .rst_val (reset_data[14]), |
| 440 | .csr_ld (w_ld), |
| 441 | .csr_data (csrbus_wr_data[14]), |
| 442 | .rw_alias (1'b1), |
| 443 | .rw1c_alias (1'b0), |
| 444 | .rw1s_alias (1'b0), |
| 445 | .hw_ld (1'b0), |
| 446 | .hw_data (1'b0), |
| 447 | .cp (clk), |
| 448 | .q (int_mondo_data_1_reg_csrbus_read_data[14]) |
| 449 | ); |
| 450 | |
| 451 | // bit 15 |
| 452 | csr_sw csr_sw_15 |
| 453 | ( |
| 454 | // synopsys translate_off |
| 455 | .omni_ld (omni_ld), |
| 456 | .omni_data (omni_data[15]), |
| 457 | .omni_rw_alias (1'b1), |
| 458 | .omni_rw1c_alias (1'b0), |
| 459 | .omni_rw1s_alias (1'b0), |
| 460 | // synopsys translate_on |
| 461 | .rst (rst_l_active_high), |
| 462 | .rst_val (reset_data[15]), |
| 463 | .csr_ld (w_ld), |
| 464 | .csr_data (csrbus_wr_data[15]), |
| 465 | .rw_alias (1'b1), |
| 466 | .rw1c_alias (1'b0), |
| 467 | .rw1s_alias (1'b0), |
| 468 | .hw_ld (1'b0), |
| 469 | .hw_data (1'b0), |
| 470 | .cp (clk), |
| 471 | .q (int_mondo_data_1_reg_csrbus_read_data[15]) |
| 472 | ); |
| 473 | |
| 474 | // bit 16 |
| 475 | csr_sw csr_sw_16 |
| 476 | ( |
| 477 | // synopsys translate_off |
| 478 | .omni_ld (omni_ld), |
| 479 | .omni_data (omni_data[16]), |
| 480 | .omni_rw_alias (1'b1), |
| 481 | .omni_rw1c_alias (1'b0), |
| 482 | .omni_rw1s_alias (1'b0), |
| 483 | // synopsys translate_on |
| 484 | .rst (rst_l_active_high), |
| 485 | .rst_val (reset_data[16]), |
| 486 | .csr_ld (w_ld), |
| 487 | .csr_data (csrbus_wr_data[16]), |
| 488 | .rw_alias (1'b1), |
| 489 | .rw1c_alias (1'b0), |
| 490 | .rw1s_alias (1'b0), |
| 491 | .hw_ld (1'b0), |
| 492 | .hw_data (1'b0), |
| 493 | .cp (clk), |
| 494 | .q (int_mondo_data_1_reg_csrbus_read_data[16]) |
| 495 | ); |
| 496 | |
| 497 | // bit 17 |
| 498 | csr_sw csr_sw_17 |
| 499 | ( |
| 500 | // synopsys translate_off |
| 501 | .omni_ld (omni_ld), |
| 502 | .omni_data (omni_data[17]), |
| 503 | .omni_rw_alias (1'b1), |
| 504 | .omni_rw1c_alias (1'b0), |
| 505 | .omni_rw1s_alias (1'b0), |
| 506 | // synopsys translate_on |
| 507 | .rst (rst_l_active_high), |
| 508 | .rst_val (reset_data[17]), |
| 509 | .csr_ld (w_ld), |
| 510 | .csr_data (csrbus_wr_data[17]), |
| 511 | .rw_alias (1'b1), |
| 512 | .rw1c_alias (1'b0), |
| 513 | .rw1s_alias (1'b0), |
| 514 | .hw_ld (1'b0), |
| 515 | .hw_data (1'b0), |
| 516 | .cp (clk), |
| 517 | .q (int_mondo_data_1_reg_csrbus_read_data[17]) |
| 518 | ); |
| 519 | |
| 520 | // bit 18 |
| 521 | csr_sw csr_sw_18 |
| 522 | ( |
| 523 | // synopsys translate_off |
| 524 | .omni_ld (omni_ld), |
| 525 | .omni_data (omni_data[18]), |
| 526 | .omni_rw_alias (1'b1), |
| 527 | .omni_rw1c_alias (1'b0), |
| 528 | .omni_rw1s_alias (1'b0), |
| 529 | // synopsys translate_on |
| 530 | .rst (rst_l_active_high), |
| 531 | .rst_val (reset_data[18]), |
| 532 | .csr_ld (w_ld), |
| 533 | .csr_data (csrbus_wr_data[18]), |
| 534 | .rw_alias (1'b1), |
| 535 | .rw1c_alias (1'b0), |
| 536 | .rw1s_alias (1'b0), |
| 537 | .hw_ld (1'b0), |
| 538 | .hw_data (1'b0), |
| 539 | .cp (clk), |
| 540 | .q (int_mondo_data_1_reg_csrbus_read_data[18]) |
| 541 | ); |
| 542 | |
| 543 | // bit 19 |
| 544 | csr_sw csr_sw_19 |
| 545 | ( |
| 546 | // synopsys translate_off |
| 547 | .omni_ld (omni_ld), |
| 548 | .omni_data (omni_data[19]), |
| 549 | .omni_rw_alias (1'b1), |
| 550 | .omni_rw1c_alias (1'b0), |
| 551 | .omni_rw1s_alias (1'b0), |
| 552 | // synopsys translate_on |
| 553 | .rst (rst_l_active_high), |
| 554 | .rst_val (reset_data[19]), |
| 555 | .csr_ld (w_ld), |
| 556 | .csr_data (csrbus_wr_data[19]), |
| 557 | .rw_alias (1'b1), |
| 558 | .rw1c_alias (1'b0), |
| 559 | .rw1s_alias (1'b0), |
| 560 | .hw_ld (1'b0), |
| 561 | .hw_data (1'b0), |
| 562 | .cp (clk), |
| 563 | .q (int_mondo_data_1_reg_csrbus_read_data[19]) |
| 564 | ); |
| 565 | |
| 566 | // bit 20 |
| 567 | csr_sw csr_sw_20 |
| 568 | ( |
| 569 | // synopsys translate_off |
| 570 | .omni_ld (omni_ld), |
| 571 | .omni_data (omni_data[20]), |
| 572 | .omni_rw_alias (1'b1), |
| 573 | .omni_rw1c_alias (1'b0), |
| 574 | .omni_rw1s_alias (1'b0), |
| 575 | // synopsys translate_on |
| 576 | .rst (rst_l_active_high), |
| 577 | .rst_val (reset_data[20]), |
| 578 | .csr_ld (w_ld), |
| 579 | .csr_data (csrbus_wr_data[20]), |
| 580 | .rw_alias (1'b1), |
| 581 | .rw1c_alias (1'b0), |
| 582 | .rw1s_alias (1'b0), |
| 583 | .hw_ld (1'b0), |
| 584 | .hw_data (1'b0), |
| 585 | .cp (clk), |
| 586 | .q (int_mondo_data_1_reg_csrbus_read_data[20]) |
| 587 | ); |
| 588 | |
| 589 | // bit 21 |
| 590 | csr_sw csr_sw_21 |
| 591 | ( |
| 592 | // synopsys translate_off |
| 593 | .omni_ld (omni_ld), |
| 594 | .omni_data (omni_data[21]), |
| 595 | .omni_rw_alias (1'b1), |
| 596 | .omni_rw1c_alias (1'b0), |
| 597 | .omni_rw1s_alias (1'b0), |
| 598 | // synopsys translate_on |
| 599 | .rst (rst_l_active_high), |
| 600 | .rst_val (reset_data[21]), |
| 601 | .csr_ld (w_ld), |
| 602 | .csr_data (csrbus_wr_data[21]), |
| 603 | .rw_alias (1'b1), |
| 604 | .rw1c_alias (1'b0), |
| 605 | .rw1s_alias (1'b0), |
| 606 | .hw_ld (1'b0), |
| 607 | .hw_data (1'b0), |
| 608 | .cp (clk), |
| 609 | .q (int_mondo_data_1_reg_csrbus_read_data[21]) |
| 610 | ); |
| 611 | |
| 612 | // bit 22 |
| 613 | csr_sw csr_sw_22 |
| 614 | ( |
| 615 | // synopsys translate_off |
| 616 | .omni_ld (omni_ld), |
| 617 | .omni_data (omni_data[22]), |
| 618 | .omni_rw_alias (1'b1), |
| 619 | .omni_rw1c_alias (1'b0), |
| 620 | .omni_rw1s_alias (1'b0), |
| 621 | // synopsys translate_on |
| 622 | .rst (rst_l_active_high), |
| 623 | .rst_val (reset_data[22]), |
| 624 | .csr_ld (w_ld), |
| 625 | .csr_data (csrbus_wr_data[22]), |
| 626 | .rw_alias (1'b1), |
| 627 | .rw1c_alias (1'b0), |
| 628 | .rw1s_alias (1'b0), |
| 629 | .hw_ld (1'b0), |
| 630 | .hw_data (1'b0), |
| 631 | .cp (clk), |
| 632 | .q (int_mondo_data_1_reg_csrbus_read_data[22]) |
| 633 | ); |
| 634 | |
| 635 | // bit 23 |
| 636 | csr_sw csr_sw_23 |
| 637 | ( |
| 638 | // synopsys translate_off |
| 639 | .omni_ld (omni_ld), |
| 640 | .omni_data (omni_data[23]), |
| 641 | .omni_rw_alias (1'b1), |
| 642 | .omni_rw1c_alias (1'b0), |
| 643 | .omni_rw1s_alias (1'b0), |
| 644 | // synopsys translate_on |
| 645 | .rst (rst_l_active_high), |
| 646 | .rst_val (reset_data[23]), |
| 647 | .csr_ld (w_ld), |
| 648 | .csr_data (csrbus_wr_data[23]), |
| 649 | .rw_alias (1'b1), |
| 650 | .rw1c_alias (1'b0), |
| 651 | .rw1s_alias (1'b0), |
| 652 | .hw_ld (1'b0), |
| 653 | .hw_data (1'b0), |
| 654 | .cp (clk), |
| 655 | .q (int_mondo_data_1_reg_csrbus_read_data[23]) |
| 656 | ); |
| 657 | |
| 658 | // bit 24 |
| 659 | csr_sw csr_sw_24 |
| 660 | ( |
| 661 | // synopsys translate_off |
| 662 | .omni_ld (omni_ld), |
| 663 | .omni_data (omni_data[24]), |
| 664 | .omni_rw_alias (1'b1), |
| 665 | .omni_rw1c_alias (1'b0), |
| 666 | .omni_rw1s_alias (1'b0), |
| 667 | // synopsys translate_on |
| 668 | .rst (rst_l_active_high), |
| 669 | .rst_val (reset_data[24]), |
| 670 | .csr_ld (w_ld), |
| 671 | .csr_data (csrbus_wr_data[24]), |
| 672 | .rw_alias (1'b1), |
| 673 | .rw1c_alias (1'b0), |
| 674 | .rw1s_alias (1'b0), |
| 675 | .hw_ld (1'b0), |
| 676 | .hw_data (1'b0), |
| 677 | .cp (clk), |
| 678 | .q (int_mondo_data_1_reg_csrbus_read_data[24]) |
| 679 | ); |
| 680 | |
| 681 | // bit 25 |
| 682 | csr_sw csr_sw_25 |
| 683 | ( |
| 684 | // synopsys translate_off |
| 685 | .omni_ld (omni_ld), |
| 686 | .omni_data (omni_data[25]), |
| 687 | .omni_rw_alias (1'b1), |
| 688 | .omni_rw1c_alias (1'b0), |
| 689 | .omni_rw1s_alias (1'b0), |
| 690 | // synopsys translate_on |
| 691 | .rst (rst_l_active_high), |
| 692 | .rst_val (reset_data[25]), |
| 693 | .csr_ld (w_ld), |
| 694 | .csr_data (csrbus_wr_data[25]), |
| 695 | .rw_alias (1'b1), |
| 696 | .rw1c_alias (1'b0), |
| 697 | .rw1s_alias (1'b0), |
| 698 | .hw_ld (1'b0), |
| 699 | .hw_data (1'b0), |
| 700 | .cp (clk), |
| 701 | .q (int_mondo_data_1_reg_csrbus_read_data[25]) |
| 702 | ); |
| 703 | |
| 704 | // bit 26 |
| 705 | csr_sw csr_sw_26 |
| 706 | ( |
| 707 | // synopsys translate_off |
| 708 | .omni_ld (omni_ld), |
| 709 | .omni_data (omni_data[26]), |
| 710 | .omni_rw_alias (1'b1), |
| 711 | .omni_rw1c_alias (1'b0), |
| 712 | .omni_rw1s_alias (1'b0), |
| 713 | // synopsys translate_on |
| 714 | .rst (rst_l_active_high), |
| 715 | .rst_val (reset_data[26]), |
| 716 | .csr_ld (w_ld), |
| 717 | .csr_data (csrbus_wr_data[26]), |
| 718 | .rw_alias (1'b1), |
| 719 | .rw1c_alias (1'b0), |
| 720 | .rw1s_alias (1'b0), |
| 721 | .hw_ld (1'b0), |
| 722 | .hw_data (1'b0), |
| 723 | .cp (clk), |
| 724 | .q (int_mondo_data_1_reg_csrbus_read_data[26]) |
| 725 | ); |
| 726 | |
| 727 | // bit 27 |
| 728 | csr_sw csr_sw_27 |
| 729 | ( |
| 730 | // synopsys translate_off |
| 731 | .omni_ld (omni_ld), |
| 732 | .omni_data (omni_data[27]), |
| 733 | .omni_rw_alias (1'b1), |
| 734 | .omni_rw1c_alias (1'b0), |
| 735 | .omni_rw1s_alias (1'b0), |
| 736 | // synopsys translate_on |
| 737 | .rst (rst_l_active_high), |
| 738 | .rst_val (reset_data[27]), |
| 739 | .csr_ld (w_ld), |
| 740 | .csr_data (csrbus_wr_data[27]), |
| 741 | .rw_alias (1'b1), |
| 742 | .rw1c_alias (1'b0), |
| 743 | .rw1s_alias (1'b0), |
| 744 | .hw_ld (1'b0), |
| 745 | .hw_data (1'b0), |
| 746 | .cp (clk), |
| 747 | .q (int_mondo_data_1_reg_csrbus_read_data[27]) |
| 748 | ); |
| 749 | |
| 750 | // bit 28 |
| 751 | csr_sw csr_sw_28 |
| 752 | ( |
| 753 | // synopsys translate_off |
| 754 | .omni_ld (omni_ld), |
| 755 | .omni_data (omni_data[28]), |
| 756 | .omni_rw_alias (1'b1), |
| 757 | .omni_rw1c_alias (1'b0), |
| 758 | .omni_rw1s_alias (1'b0), |
| 759 | // synopsys translate_on |
| 760 | .rst (rst_l_active_high), |
| 761 | .rst_val (reset_data[28]), |
| 762 | .csr_ld (w_ld), |
| 763 | .csr_data (csrbus_wr_data[28]), |
| 764 | .rw_alias (1'b1), |
| 765 | .rw1c_alias (1'b0), |
| 766 | .rw1s_alias (1'b0), |
| 767 | .hw_ld (1'b0), |
| 768 | .hw_data (1'b0), |
| 769 | .cp (clk), |
| 770 | .q (int_mondo_data_1_reg_csrbus_read_data[28]) |
| 771 | ); |
| 772 | |
| 773 | // bit 29 |
| 774 | csr_sw csr_sw_29 |
| 775 | ( |
| 776 | // synopsys translate_off |
| 777 | .omni_ld (omni_ld), |
| 778 | .omni_data (omni_data[29]), |
| 779 | .omni_rw_alias (1'b1), |
| 780 | .omni_rw1c_alias (1'b0), |
| 781 | .omni_rw1s_alias (1'b0), |
| 782 | // synopsys translate_on |
| 783 | .rst (rst_l_active_high), |
| 784 | .rst_val (reset_data[29]), |
| 785 | .csr_ld (w_ld), |
| 786 | .csr_data (csrbus_wr_data[29]), |
| 787 | .rw_alias (1'b1), |
| 788 | .rw1c_alias (1'b0), |
| 789 | .rw1s_alias (1'b0), |
| 790 | .hw_ld (1'b0), |
| 791 | .hw_data (1'b0), |
| 792 | .cp (clk), |
| 793 | .q (int_mondo_data_1_reg_csrbus_read_data[29]) |
| 794 | ); |
| 795 | |
| 796 | // bit 30 |
| 797 | csr_sw csr_sw_30 |
| 798 | ( |
| 799 | // synopsys translate_off |
| 800 | .omni_ld (omni_ld), |
| 801 | .omni_data (omni_data[30]), |
| 802 | .omni_rw_alias (1'b1), |
| 803 | .omni_rw1c_alias (1'b0), |
| 804 | .omni_rw1s_alias (1'b0), |
| 805 | // synopsys translate_on |
| 806 | .rst (rst_l_active_high), |
| 807 | .rst_val (reset_data[30]), |
| 808 | .csr_ld (w_ld), |
| 809 | .csr_data (csrbus_wr_data[30]), |
| 810 | .rw_alias (1'b1), |
| 811 | .rw1c_alias (1'b0), |
| 812 | .rw1s_alias (1'b0), |
| 813 | .hw_ld (1'b0), |
| 814 | .hw_data (1'b0), |
| 815 | .cp (clk), |
| 816 | .q (int_mondo_data_1_reg_csrbus_read_data[30]) |
| 817 | ); |
| 818 | |
| 819 | // bit 31 |
| 820 | csr_sw csr_sw_31 |
| 821 | ( |
| 822 | // synopsys translate_off |
| 823 | .omni_ld (omni_ld), |
| 824 | .omni_data (omni_data[31]), |
| 825 | .omni_rw_alias (1'b1), |
| 826 | .omni_rw1c_alias (1'b0), |
| 827 | .omni_rw1s_alias (1'b0), |
| 828 | // synopsys translate_on |
| 829 | .rst (rst_l_active_high), |
| 830 | .rst_val (reset_data[31]), |
| 831 | .csr_ld (w_ld), |
| 832 | .csr_data (csrbus_wr_data[31]), |
| 833 | .rw_alias (1'b1), |
| 834 | .rw1c_alias (1'b0), |
| 835 | .rw1s_alias (1'b0), |
| 836 | .hw_ld (1'b0), |
| 837 | .hw_data (1'b0), |
| 838 | .cp (clk), |
| 839 | .q (int_mondo_data_1_reg_csrbus_read_data[31]) |
| 840 | ); |
| 841 | |
| 842 | // bit 32 |
| 843 | csr_sw csr_sw_32 |
| 844 | ( |
| 845 | // synopsys translate_off |
| 846 | .omni_ld (omni_ld), |
| 847 | .omni_data (omni_data[32]), |
| 848 | .omni_rw_alias (1'b1), |
| 849 | .omni_rw1c_alias (1'b0), |
| 850 | .omni_rw1s_alias (1'b0), |
| 851 | // synopsys translate_on |
| 852 | .rst (rst_l_active_high), |
| 853 | .rst_val (reset_data[32]), |
| 854 | .csr_ld (w_ld), |
| 855 | .csr_data (csrbus_wr_data[32]), |
| 856 | .rw_alias (1'b1), |
| 857 | .rw1c_alias (1'b0), |
| 858 | .rw1s_alias (1'b0), |
| 859 | .hw_ld (1'b0), |
| 860 | .hw_data (1'b0), |
| 861 | .cp (clk), |
| 862 | .q (int_mondo_data_1_reg_csrbus_read_data[32]) |
| 863 | ); |
| 864 | |
| 865 | // bit 33 |
| 866 | csr_sw csr_sw_33 |
| 867 | ( |
| 868 | // synopsys translate_off |
| 869 | .omni_ld (omni_ld), |
| 870 | .omni_data (omni_data[33]), |
| 871 | .omni_rw_alias (1'b1), |
| 872 | .omni_rw1c_alias (1'b0), |
| 873 | .omni_rw1s_alias (1'b0), |
| 874 | // synopsys translate_on |
| 875 | .rst (rst_l_active_high), |
| 876 | .rst_val (reset_data[33]), |
| 877 | .csr_ld (w_ld), |
| 878 | .csr_data (csrbus_wr_data[33]), |
| 879 | .rw_alias (1'b1), |
| 880 | .rw1c_alias (1'b0), |
| 881 | .rw1s_alias (1'b0), |
| 882 | .hw_ld (1'b0), |
| 883 | .hw_data (1'b0), |
| 884 | .cp (clk), |
| 885 | .q (int_mondo_data_1_reg_csrbus_read_data[33]) |
| 886 | ); |
| 887 | |
| 888 | // bit 34 |
| 889 | csr_sw csr_sw_34 |
| 890 | ( |
| 891 | // synopsys translate_off |
| 892 | .omni_ld (omni_ld), |
| 893 | .omni_data (omni_data[34]), |
| 894 | .omni_rw_alias (1'b1), |
| 895 | .omni_rw1c_alias (1'b0), |
| 896 | .omni_rw1s_alias (1'b0), |
| 897 | // synopsys translate_on |
| 898 | .rst (rst_l_active_high), |
| 899 | .rst_val (reset_data[34]), |
| 900 | .csr_ld (w_ld), |
| 901 | .csr_data (csrbus_wr_data[34]), |
| 902 | .rw_alias (1'b1), |
| 903 | .rw1c_alias (1'b0), |
| 904 | .rw1s_alias (1'b0), |
| 905 | .hw_ld (1'b0), |
| 906 | .hw_data (1'b0), |
| 907 | .cp (clk), |
| 908 | .q (int_mondo_data_1_reg_csrbus_read_data[34]) |
| 909 | ); |
| 910 | |
| 911 | // bit 35 |
| 912 | csr_sw csr_sw_35 |
| 913 | ( |
| 914 | // synopsys translate_off |
| 915 | .omni_ld (omni_ld), |
| 916 | .omni_data (omni_data[35]), |
| 917 | .omni_rw_alias (1'b1), |
| 918 | .omni_rw1c_alias (1'b0), |
| 919 | .omni_rw1s_alias (1'b0), |
| 920 | // synopsys translate_on |
| 921 | .rst (rst_l_active_high), |
| 922 | .rst_val (reset_data[35]), |
| 923 | .csr_ld (w_ld), |
| 924 | .csr_data (csrbus_wr_data[35]), |
| 925 | .rw_alias (1'b1), |
| 926 | .rw1c_alias (1'b0), |
| 927 | .rw1s_alias (1'b0), |
| 928 | .hw_ld (1'b0), |
| 929 | .hw_data (1'b0), |
| 930 | .cp (clk), |
| 931 | .q (int_mondo_data_1_reg_csrbus_read_data[35]) |
| 932 | ); |
| 933 | |
| 934 | // bit 36 |
| 935 | csr_sw csr_sw_36 |
| 936 | ( |
| 937 | // synopsys translate_off |
| 938 | .omni_ld (omni_ld), |
| 939 | .omni_data (omni_data[36]), |
| 940 | .omni_rw_alias (1'b1), |
| 941 | .omni_rw1c_alias (1'b0), |
| 942 | .omni_rw1s_alias (1'b0), |
| 943 | // synopsys translate_on |
| 944 | .rst (rst_l_active_high), |
| 945 | .rst_val (reset_data[36]), |
| 946 | .csr_ld (w_ld), |
| 947 | .csr_data (csrbus_wr_data[36]), |
| 948 | .rw_alias (1'b1), |
| 949 | .rw1c_alias (1'b0), |
| 950 | .rw1s_alias (1'b0), |
| 951 | .hw_ld (1'b0), |
| 952 | .hw_data (1'b0), |
| 953 | .cp (clk), |
| 954 | .q (int_mondo_data_1_reg_csrbus_read_data[36]) |
| 955 | ); |
| 956 | |
| 957 | // bit 37 |
| 958 | csr_sw csr_sw_37 |
| 959 | ( |
| 960 | // synopsys translate_off |
| 961 | .omni_ld (omni_ld), |
| 962 | .omni_data (omni_data[37]), |
| 963 | .omni_rw_alias (1'b1), |
| 964 | .omni_rw1c_alias (1'b0), |
| 965 | .omni_rw1s_alias (1'b0), |
| 966 | // synopsys translate_on |
| 967 | .rst (rst_l_active_high), |
| 968 | .rst_val (reset_data[37]), |
| 969 | .csr_ld (w_ld), |
| 970 | .csr_data (csrbus_wr_data[37]), |
| 971 | .rw_alias (1'b1), |
| 972 | .rw1c_alias (1'b0), |
| 973 | .rw1s_alias (1'b0), |
| 974 | .hw_ld (1'b0), |
| 975 | .hw_data (1'b0), |
| 976 | .cp (clk), |
| 977 | .q (int_mondo_data_1_reg_csrbus_read_data[37]) |
| 978 | ); |
| 979 | |
| 980 | // bit 38 |
| 981 | csr_sw csr_sw_38 |
| 982 | ( |
| 983 | // synopsys translate_off |
| 984 | .omni_ld (omni_ld), |
| 985 | .omni_data (omni_data[38]), |
| 986 | .omni_rw_alias (1'b1), |
| 987 | .omni_rw1c_alias (1'b0), |
| 988 | .omni_rw1s_alias (1'b0), |
| 989 | // synopsys translate_on |
| 990 | .rst (rst_l_active_high), |
| 991 | .rst_val (reset_data[38]), |
| 992 | .csr_ld (w_ld), |
| 993 | .csr_data (csrbus_wr_data[38]), |
| 994 | .rw_alias (1'b1), |
| 995 | .rw1c_alias (1'b0), |
| 996 | .rw1s_alias (1'b0), |
| 997 | .hw_ld (1'b0), |
| 998 | .hw_data (1'b0), |
| 999 | .cp (clk), |
| 1000 | .q (int_mondo_data_1_reg_csrbus_read_data[38]) |
| 1001 | ); |
| 1002 | |
| 1003 | // bit 39 |
| 1004 | csr_sw csr_sw_39 |
| 1005 | ( |
| 1006 | // synopsys translate_off |
| 1007 | .omni_ld (omni_ld), |
| 1008 | .omni_data (omni_data[39]), |
| 1009 | .omni_rw_alias (1'b1), |
| 1010 | .omni_rw1c_alias (1'b0), |
| 1011 | .omni_rw1s_alias (1'b0), |
| 1012 | // synopsys translate_on |
| 1013 | .rst (rst_l_active_high), |
| 1014 | .rst_val (reset_data[39]), |
| 1015 | .csr_ld (w_ld), |
| 1016 | .csr_data (csrbus_wr_data[39]), |
| 1017 | .rw_alias (1'b1), |
| 1018 | .rw1c_alias (1'b0), |
| 1019 | .rw1s_alias (1'b0), |
| 1020 | .hw_ld (1'b0), |
| 1021 | .hw_data (1'b0), |
| 1022 | .cp (clk), |
| 1023 | .q (int_mondo_data_1_reg_csrbus_read_data[39]) |
| 1024 | ); |
| 1025 | |
| 1026 | // bit 40 |
| 1027 | csr_sw csr_sw_40 |
| 1028 | ( |
| 1029 | // synopsys translate_off |
| 1030 | .omni_ld (omni_ld), |
| 1031 | .omni_data (omni_data[40]), |
| 1032 | .omni_rw_alias (1'b1), |
| 1033 | .omni_rw1c_alias (1'b0), |
| 1034 | .omni_rw1s_alias (1'b0), |
| 1035 | // synopsys translate_on |
| 1036 | .rst (rst_l_active_high), |
| 1037 | .rst_val (reset_data[40]), |
| 1038 | .csr_ld (w_ld), |
| 1039 | .csr_data (csrbus_wr_data[40]), |
| 1040 | .rw_alias (1'b1), |
| 1041 | .rw1c_alias (1'b0), |
| 1042 | .rw1s_alias (1'b0), |
| 1043 | .hw_ld (1'b0), |
| 1044 | .hw_data (1'b0), |
| 1045 | .cp (clk), |
| 1046 | .q (int_mondo_data_1_reg_csrbus_read_data[40]) |
| 1047 | ); |
| 1048 | |
| 1049 | // bit 41 |
| 1050 | csr_sw csr_sw_41 |
| 1051 | ( |
| 1052 | // synopsys translate_off |
| 1053 | .omni_ld (omni_ld), |
| 1054 | .omni_data (omni_data[41]), |
| 1055 | .omni_rw_alias (1'b1), |
| 1056 | .omni_rw1c_alias (1'b0), |
| 1057 | .omni_rw1s_alias (1'b0), |
| 1058 | // synopsys translate_on |
| 1059 | .rst (rst_l_active_high), |
| 1060 | .rst_val (reset_data[41]), |
| 1061 | .csr_ld (w_ld), |
| 1062 | .csr_data (csrbus_wr_data[41]), |
| 1063 | .rw_alias (1'b1), |
| 1064 | .rw1c_alias (1'b0), |
| 1065 | .rw1s_alias (1'b0), |
| 1066 | .hw_ld (1'b0), |
| 1067 | .hw_data (1'b0), |
| 1068 | .cp (clk), |
| 1069 | .q (int_mondo_data_1_reg_csrbus_read_data[41]) |
| 1070 | ); |
| 1071 | |
| 1072 | // bit 42 |
| 1073 | csr_sw csr_sw_42 |
| 1074 | ( |
| 1075 | // synopsys translate_off |
| 1076 | .omni_ld (omni_ld), |
| 1077 | .omni_data (omni_data[42]), |
| 1078 | .omni_rw_alias (1'b1), |
| 1079 | .omni_rw1c_alias (1'b0), |
| 1080 | .omni_rw1s_alias (1'b0), |
| 1081 | // synopsys translate_on |
| 1082 | .rst (rst_l_active_high), |
| 1083 | .rst_val (reset_data[42]), |
| 1084 | .csr_ld (w_ld), |
| 1085 | .csr_data (csrbus_wr_data[42]), |
| 1086 | .rw_alias (1'b1), |
| 1087 | .rw1c_alias (1'b0), |
| 1088 | .rw1s_alias (1'b0), |
| 1089 | .hw_ld (1'b0), |
| 1090 | .hw_data (1'b0), |
| 1091 | .cp (clk), |
| 1092 | .q (int_mondo_data_1_reg_csrbus_read_data[42]) |
| 1093 | ); |
| 1094 | |
| 1095 | // bit 43 |
| 1096 | csr_sw csr_sw_43 |
| 1097 | ( |
| 1098 | // synopsys translate_off |
| 1099 | .omni_ld (omni_ld), |
| 1100 | .omni_data (omni_data[43]), |
| 1101 | .omni_rw_alias (1'b1), |
| 1102 | .omni_rw1c_alias (1'b0), |
| 1103 | .omni_rw1s_alias (1'b0), |
| 1104 | // synopsys translate_on |
| 1105 | .rst (rst_l_active_high), |
| 1106 | .rst_val (reset_data[43]), |
| 1107 | .csr_ld (w_ld), |
| 1108 | .csr_data (csrbus_wr_data[43]), |
| 1109 | .rw_alias (1'b1), |
| 1110 | .rw1c_alias (1'b0), |
| 1111 | .rw1s_alias (1'b0), |
| 1112 | .hw_ld (1'b0), |
| 1113 | .hw_data (1'b0), |
| 1114 | .cp (clk), |
| 1115 | .q (int_mondo_data_1_reg_csrbus_read_data[43]) |
| 1116 | ); |
| 1117 | |
| 1118 | // bit 44 |
| 1119 | csr_sw csr_sw_44 |
| 1120 | ( |
| 1121 | // synopsys translate_off |
| 1122 | .omni_ld (omni_ld), |
| 1123 | .omni_data (omni_data[44]), |
| 1124 | .omni_rw_alias (1'b1), |
| 1125 | .omni_rw1c_alias (1'b0), |
| 1126 | .omni_rw1s_alias (1'b0), |
| 1127 | // synopsys translate_on |
| 1128 | .rst (rst_l_active_high), |
| 1129 | .rst_val (reset_data[44]), |
| 1130 | .csr_ld (w_ld), |
| 1131 | .csr_data (csrbus_wr_data[44]), |
| 1132 | .rw_alias (1'b1), |
| 1133 | .rw1c_alias (1'b0), |
| 1134 | .rw1s_alias (1'b0), |
| 1135 | .hw_ld (1'b0), |
| 1136 | .hw_data (1'b0), |
| 1137 | .cp (clk), |
| 1138 | .q (int_mondo_data_1_reg_csrbus_read_data[44]) |
| 1139 | ); |
| 1140 | |
| 1141 | // bit 45 |
| 1142 | csr_sw csr_sw_45 |
| 1143 | ( |
| 1144 | // synopsys translate_off |
| 1145 | .omni_ld (omni_ld), |
| 1146 | .omni_data (omni_data[45]), |
| 1147 | .omni_rw_alias (1'b1), |
| 1148 | .omni_rw1c_alias (1'b0), |
| 1149 | .omni_rw1s_alias (1'b0), |
| 1150 | // synopsys translate_on |
| 1151 | .rst (rst_l_active_high), |
| 1152 | .rst_val (reset_data[45]), |
| 1153 | .csr_ld (w_ld), |
| 1154 | .csr_data (csrbus_wr_data[45]), |
| 1155 | .rw_alias (1'b1), |
| 1156 | .rw1c_alias (1'b0), |
| 1157 | .rw1s_alias (1'b0), |
| 1158 | .hw_ld (1'b0), |
| 1159 | .hw_data (1'b0), |
| 1160 | .cp (clk), |
| 1161 | .q (int_mondo_data_1_reg_csrbus_read_data[45]) |
| 1162 | ); |
| 1163 | |
| 1164 | // bit 46 |
| 1165 | csr_sw csr_sw_46 |
| 1166 | ( |
| 1167 | // synopsys translate_off |
| 1168 | .omni_ld (omni_ld), |
| 1169 | .omni_data (omni_data[46]), |
| 1170 | .omni_rw_alias (1'b1), |
| 1171 | .omni_rw1c_alias (1'b0), |
| 1172 | .omni_rw1s_alias (1'b0), |
| 1173 | // synopsys translate_on |
| 1174 | .rst (rst_l_active_high), |
| 1175 | .rst_val (reset_data[46]), |
| 1176 | .csr_ld (w_ld), |
| 1177 | .csr_data (csrbus_wr_data[46]), |
| 1178 | .rw_alias (1'b1), |
| 1179 | .rw1c_alias (1'b0), |
| 1180 | .rw1s_alias (1'b0), |
| 1181 | .hw_ld (1'b0), |
| 1182 | .hw_data (1'b0), |
| 1183 | .cp (clk), |
| 1184 | .q (int_mondo_data_1_reg_csrbus_read_data[46]) |
| 1185 | ); |
| 1186 | |
| 1187 | // bit 47 |
| 1188 | csr_sw csr_sw_47 |
| 1189 | ( |
| 1190 | // synopsys translate_off |
| 1191 | .omni_ld (omni_ld), |
| 1192 | .omni_data (omni_data[47]), |
| 1193 | .omni_rw_alias (1'b1), |
| 1194 | .omni_rw1c_alias (1'b0), |
| 1195 | .omni_rw1s_alias (1'b0), |
| 1196 | // synopsys translate_on |
| 1197 | .rst (rst_l_active_high), |
| 1198 | .rst_val (reset_data[47]), |
| 1199 | .csr_ld (w_ld), |
| 1200 | .csr_data (csrbus_wr_data[47]), |
| 1201 | .rw_alias (1'b1), |
| 1202 | .rw1c_alias (1'b0), |
| 1203 | .rw1s_alias (1'b0), |
| 1204 | .hw_ld (1'b0), |
| 1205 | .hw_data (1'b0), |
| 1206 | .cp (clk), |
| 1207 | .q (int_mondo_data_1_reg_csrbus_read_data[47]) |
| 1208 | ); |
| 1209 | |
| 1210 | // bit 48 |
| 1211 | csr_sw csr_sw_48 |
| 1212 | ( |
| 1213 | // synopsys translate_off |
| 1214 | .omni_ld (omni_ld), |
| 1215 | .omni_data (omni_data[48]), |
| 1216 | .omni_rw_alias (1'b1), |
| 1217 | .omni_rw1c_alias (1'b0), |
| 1218 | .omni_rw1s_alias (1'b0), |
| 1219 | // synopsys translate_on |
| 1220 | .rst (rst_l_active_high), |
| 1221 | .rst_val (reset_data[48]), |
| 1222 | .csr_ld (w_ld), |
| 1223 | .csr_data (csrbus_wr_data[48]), |
| 1224 | .rw_alias (1'b1), |
| 1225 | .rw1c_alias (1'b0), |
| 1226 | .rw1s_alias (1'b0), |
| 1227 | .hw_ld (1'b0), |
| 1228 | .hw_data (1'b0), |
| 1229 | .cp (clk), |
| 1230 | .q (int_mondo_data_1_reg_csrbus_read_data[48]) |
| 1231 | ); |
| 1232 | |
| 1233 | // bit 49 |
| 1234 | csr_sw csr_sw_49 |
| 1235 | ( |
| 1236 | // synopsys translate_off |
| 1237 | .omni_ld (omni_ld), |
| 1238 | .omni_data (omni_data[49]), |
| 1239 | .omni_rw_alias (1'b1), |
| 1240 | .omni_rw1c_alias (1'b0), |
| 1241 | .omni_rw1s_alias (1'b0), |
| 1242 | // synopsys translate_on |
| 1243 | .rst (rst_l_active_high), |
| 1244 | .rst_val (reset_data[49]), |
| 1245 | .csr_ld (w_ld), |
| 1246 | .csr_data (csrbus_wr_data[49]), |
| 1247 | .rw_alias (1'b1), |
| 1248 | .rw1c_alias (1'b0), |
| 1249 | .rw1s_alias (1'b0), |
| 1250 | .hw_ld (1'b0), |
| 1251 | .hw_data (1'b0), |
| 1252 | .cp (clk), |
| 1253 | .q (int_mondo_data_1_reg_csrbus_read_data[49]) |
| 1254 | ); |
| 1255 | |
| 1256 | // bit 50 |
| 1257 | csr_sw csr_sw_50 |
| 1258 | ( |
| 1259 | // synopsys translate_off |
| 1260 | .omni_ld (omni_ld), |
| 1261 | .omni_data (omni_data[50]), |
| 1262 | .omni_rw_alias (1'b1), |
| 1263 | .omni_rw1c_alias (1'b0), |
| 1264 | .omni_rw1s_alias (1'b0), |
| 1265 | // synopsys translate_on |
| 1266 | .rst (rst_l_active_high), |
| 1267 | .rst_val (reset_data[50]), |
| 1268 | .csr_ld (w_ld), |
| 1269 | .csr_data (csrbus_wr_data[50]), |
| 1270 | .rw_alias (1'b1), |
| 1271 | .rw1c_alias (1'b0), |
| 1272 | .rw1s_alias (1'b0), |
| 1273 | .hw_ld (1'b0), |
| 1274 | .hw_data (1'b0), |
| 1275 | .cp (clk), |
| 1276 | .q (int_mondo_data_1_reg_csrbus_read_data[50]) |
| 1277 | ); |
| 1278 | |
| 1279 | // bit 51 |
| 1280 | csr_sw csr_sw_51 |
| 1281 | ( |
| 1282 | // synopsys translate_off |
| 1283 | .omni_ld (omni_ld), |
| 1284 | .omni_data (omni_data[51]), |
| 1285 | .omni_rw_alias (1'b1), |
| 1286 | .omni_rw1c_alias (1'b0), |
| 1287 | .omni_rw1s_alias (1'b0), |
| 1288 | // synopsys translate_on |
| 1289 | .rst (rst_l_active_high), |
| 1290 | .rst_val (reset_data[51]), |
| 1291 | .csr_ld (w_ld), |
| 1292 | .csr_data (csrbus_wr_data[51]), |
| 1293 | .rw_alias (1'b1), |
| 1294 | .rw1c_alias (1'b0), |
| 1295 | .rw1s_alias (1'b0), |
| 1296 | .hw_ld (1'b0), |
| 1297 | .hw_data (1'b0), |
| 1298 | .cp (clk), |
| 1299 | .q (int_mondo_data_1_reg_csrbus_read_data[51]) |
| 1300 | ); |
| 1301 | |
| 1302 | // bit 52 |
| 1303 | csr_sw csr_sw_52 |
| 1304 | ( |
| 1305 | // synopsys translate_off |
| 1306 | .omni_ld (omni_ld), |
| 1307 | .omni_data (omni_data[52]), |
| 1308 | .omni_rw_alias (1'b1), |
| 1309 | .omni_rw1c_alias (1'b0), |
| 1310 | .omni_rw1s_alias (1'b0), |
| 1311 | // synopsys translate_on |
| 1312 | .rst (rst_l_active_high), |
| 1313 | .rst_val (reset_data[52]), |
| 1314 | .csr_ld (w_ld), |
| 1315 | .csr_data (csrbus_wr_data[52]), |
| 1316 | .rw_alias (1'b1), |
| 1317 | .rw1c_alias (1'b0), |
| 1318 | .rw1s_alias (1'b0), |
| 1319 | .hw_ld (1'b0), |
| 1320 | .hw_data (1'b0), |
| 1321 | .cp (clk), |
| 1322 | .q (int_mondo_data_1_reg_csrbus_read_data[52]) |
| 1323 | ); |
| 1324 | |
| 1325 | // bit 53 |
| 1326 | csr_sw csr_sw_53 |
| 1327 | ( |
| 1328 | // synopsys translate_off |
| 1329 | .omni_ld (omni_ld), |
| 1330 | .omni_data (omni_data[53]), |
| 1331 | .omni_rw_alias (1'b1), |
| 1332 | .omni_rw1c_alias (1'b0), |
| 1333 | .omni_rw1s_alias (1'b0), |
| 1334 | // synopsys translate_on |
| 1335 | .rst (rst_l_active_high), |
| 1336 | .rst_val (reset_data[53]), |
| 1337 | .csr_ld (w_ld), |
| 1338 | .csr_data (csrbus_wr_data[53]), |
| 1339 | .rw_alias (1'b1), |
| 1340 | .rw1c_alias (1'b0), |
| 1341 | .rw1s_alias (1'b0), |
| 1342 | .hw_ld (1'b0), |
| 1343 | .hw_data (1'b0), |
| 1344 | .cp (clk), |
| 1345 | .q (int_mondo_data_1_reg_csrbus_read_data[53]) |
| 1346 | ); |
| 1347 | |
| 1348 | // bit 54 |
| 1349 | csr_sw csr_sw_54 |
| 1350 | ( |
| 1351 | // synopsys translate_off |
| 1352 | .omni_ld (omni_ld), |
| 1353 | .omni_data (omni_data[54]), |
| 1354 | .omni_rw_alias (1'b1), |
| 1355 | .omni_rw1c_alias (1'b0), |
| 1356 | .omni_rw1s_alias (1'b0), |
| 1357 | // synopsys translate_on |
| 1358 | .rst (rst_l_active_high), |
| 1359 | .rst_val (reset_data[54]), |
| 1360 | .csr_ld (w_ld), |
| 1361 | .csr_data (csrbus_wr_data[54]), |
| 1362 | .rw_alias (1'b1), |
| 1363 | .rw1c_alias (1'b0), |
| 1364 | .rw1s_alias (1'b0), |
| 1365 | .hw_ld (1'b0), |
| 1366 | .hw_data (1'b0), |
| 1367 | .cp (clk), |
| 1368 | .q (int_mondo_data_1_reg_csrbus_read_data[54]) |
| 1369 | ); |
| 1370 | |
| 1371 | // bit 55 |
| 1372 | csr_sw csr_sw_55 |
| 1373 | ( |
| 1374 | // synopsys translate_off |
| 1375 | .omni_ld (omni_ld), |
| 1376 | .omni_data (omni_data[55]), |
| 1377 | .omni_rw_alias (1'b1), |
| 1378 | .omni_rw1c_alias (1'b0), |
| 1379 | .omni_rw1s_alias (1'b0), |
| 1380 | // synopsys translate_on |
| 1381 | .rst (rst_l_active_high), |
| 1382 | .rst_val (reset_data[55]), |
| 1383 | .csr_ld (w_ld), |
| 1384 | .csr_data (csrbus_wr_data[55]), |
| 1385 | .rw_alias (1'b1), |
| 1386 | .rw1c_alias (1'b0), |
| 1387 | .rw1s_alias (1'b0), |
| 1388 | .hw_ld (1'b0), |
| 1389 | .hw_data (1'b0), |
| 1390 | .cp (clk), |
| 1391 | .q (int_mondo_data_1_reg_csrbus_read_data[55]) |
| 1392 | ); |
| 1393 | |
| 1394 | // bit 56 |
| 1395 | csr_sw csr_sw_56 |
| 1396 | ( |
| 1397 | // synopsys translate_off |
| 1398 | .omni_ld (omni_ld), |
| 1399 | .omni_data (omni_data[56]), |
| 1400 | .omni_rw_alias (1'b1), |
| 1401 | .omni_rw1c_alias (1'b0), |
| 1402 | .omni_rw1s_alias (1'b0), |
| 1403 | // synopsys translate_on |
| 1404 | .rst (rst_l_active_high), |
| 1405 | .rst_val (reset_data[56]), |
| 1406 | .csr_ld (w_ld), |
| 1407 | .csr_data (csrbus_wr_data[56]), |
| 1408 | .rw_alias (1'b1), |
| 1409 | .rw1c_alias (1'b0), |
| 1410 | .rw1s_alias (1'b0), |
| 1411 | .hw_ld (1'b0), |
| 1412 | .hw_data (1'b0), |
| 1413 | .cp (clk), |
| 1414 | .q (int_mondo_data_1_reg_csrbus_read_data[56]) |
| 1415 | ); |
| 1416 | |
| 1417 | // bit 57 |
| 1418 | csr_sw csr_sw_57 |
| 1419 | ( |
| 1420 | // synopsys translate_off |
| 1421 | .omni_ld (omni_ld), |
| 1422 | .omni_data (omni_data[57]), |
| 1423 | .omni_rw_alias (1'b1), |
| 1424 | .omni_rw1c_alias (1'b0), |
| 1425 | .omni_rw1s_alias (1'b0), |
| 1426 | // synopsys translate_on |
| 1427 | .rst (rst_l_active_high), |
| 1428 | .rst_val (reset_data[57]), |
| 1429 | .csr_ld (w_ld), |
| 1430 | .csr_data (csrbus_wr_data[57]), |
| 1431 | .rw_alias (1'b1), |
| 1432 | .rw1c_alias (1'b0), |
| 1433 | .rw1s_alias (1'b0), |
| 1434 | .hw_ld (1'b0), |
| 1435 | .hw_data (1'b0), |
| 1436 | .cp (clk), |
| 1437 | .q (int_mondo_data_1_reg_csrbus_read_data[57]) |
| 1438 | ); |
| 1439 | |
| 1440 | // bit 58 |
| 1441 | csr_sw csr_sw_58 |
| 1442 | ( |
| 1443 | // synopsys translate_off |
| 1444 | .omni_ld (omni_ld), |
| 1445 | .omni_data (omni_data[58]), |
| 1446 | .omni_rw_alias (1'b1), |
| 1447 | .omni_rw1c_alias (1'b0), |
| 1448 | .omni_rw1s_alias (1'b0), |
| 1449 | // synopsys translate_on |
| 1450 | .rst (rst_l_active_high), |
| 1451 | .rst_val (reset_data[58]), |
| 1452 | .csr_ld (w_ld), |
| 1453 | .csr_data (csrbus_wr_data[58]), |
| 1454 | .rw_alias (1'b1), |
| 1455 | .rw1c_alias (1'b0), |
| 1456 | .rw1s_alias (1'b0), |
| 1457 | .hw_ld (1'b0), |
| 1458 | .hw_data (1'b0), |
| 1459 | .cp (clk), |
| 1460 | .q (int_mondo_data_1_reg_csrbus_read_data[58]) |
| 1461 | ); |
| 1462 | |
| 1463 | // bit 59 |
| 1464 | csr_sw csr_sw_59 |
| 1465 | ( |
| 1466 | // synopsys translate_off |
| 1467 | .omni_ld (omni_ld), |
| 1468 | .omni_data (omni_data[59]), |
| 1469 | .omni_rw_alias (1'b1), |
| 1470 | .omni_rw1c_alias (1'b0), |
| 1471 | .omni_rw1s_alias (1'b0), |
| 1472 | // synopsys translate_on |
| 1473 | .rst (rst_l_active_high), |
| 1474 | .rst_val (reset_data[59]), |
| 1475 | .csr_ld (w_ld), |
| 1476 | .csr_data (csrbus_wr_data[59]), |
| 1477 | .rw_alias (1'b1), |
| 1478 | .rw1c_alias (1'b0), |
| 1479 | .rw1s_alias (1'b0), |
| 1480 | .hw_ld (1'b0), |
| 1481 | .hw_data (1'b0), |
| 1482 | .cp (clk), |
| 1483 | .q (int_mondo_data_1_reg_csrbus_read_data[59]) |
| 1484 | ); |
| 1485 | |
| 1486 | // bit 60 |
| 1487 | csr_sw csr_sw_60 |
| 1488 | ( |
| 1489 | // synopsys translate_off |
| 1490 | .omni_ld (omni_ld), |
| 1491 | .omni_data (omni_data[60]), |
| 1492 | .omni_rw_alias (1'b1), |
| 1493 | .omni_rw1c_alias (1'b0), |
| 1494 | .omni_rw1s_alias (1'b0), |
| 1495 | // synopsys translate_on |
| 1496 | .rst (rst_l_active_high), |
| 1497 | .rst_val (reset_data[60]), |
| 1498 | .csr_ld (w_ld), |
| 1499 | .csr_data (csrbus_wr_data[60]), |
| 1500 | .rw_alias (1'b1), |
| 1501 | .rw1c_alias (1'b0), |
| 1502 | .rw1s_alias (1'b0), |
| 1503 | .hw_ld (1'b0), |
| 1504 | .hw_data (1'b0), |
| 1505 | .cp (clk), |
| 1506 | .q (int_mondo_data_1_reg_csrbus_read_data[60]) |
| 1507 | ); |
| 1508 | |
| 1509 | // bit 61 |
| 1510 | csr_sw csr_sw_61 |
| 1511 | ( |
| 1512 | // synopsys translate_off |
| 1513 | .omni_ld (omni_ld), |
| 1514 | .omni_data (omni_data[61]), |
| 1515 | .omni_rw_alias (1'b1), |
| 1516 | .omni_rw1c_alias (1'b0), |
| 1517 | .omni_rw1s_alias (1'b0), |
| 1518 | // synopsys translate_on |
| 1519 | .rst (rst_l_active_high), |
| 1520 | .rst_val (reset_data[61]), |
| 1521 | .csr_ld (w_ld), |
| 1522 | .csr_data (csrbus_wr_data[61]), |
| 1523 | .rw_alias (1'b1), |
| 1524 | .rw1c_alias (1'b0), |
| 1525 | .rw1s_alias (1'b0), |
| 1526 | .hw_ld (1'b0), |
| 1527 | .hw_data (1'b0), |
| 1528 | .cp (clk), |
| 1529 | .q (int_mondo_data_1_reg_csrbus_read_data[61]) |
| 1530 | ); |
| 1531 | |
| 1532 | // bit 62 |
| 1533 | csr_sw csr_sw_62 |
| 1534 | ( |
| 1535 | // synopsys translate_off |
| 1536 | .omni_ld (omni_ld), |
| 1537 | .omni_data (omni_data[62]), |
| 1538 | .omni_rw_alias (1'b1), |
| 1539 | .omni_rw1c_alias (1'b0), |
| 1540 | .omni_rw1s_alias (1'b0), |
| 1541 | // synopsys translate_on |
| 1542 | .rst (rst_l_active_high), |
| 1543 | .rst_val (reset_data[62]), |
| 1544 | .csr_ld (w_ld), |
| 1545 | .csr_data (csrbus_wr_data[62]), |
| 1546 | .rw_alias (1'b1), |
| 1547 | .rw1c_alias (1'b0), |
| 1548 | .rw1s_alias (1'b0), |
| 1549 | .hw_ld (1'b0), |
| 1550 | .hw_data (1'b0), |
| 1551 | .cp (clk), |
| 1552 | .q (int_mondo_data_1_reg_csrbus_read_data[62]) |
| 1553 | ); |
| 1554 | |
| 1555 | // bit 63 |
| 1556 | csr_sw csr_sw_63 |
| 1557 | ( |
| 1558 | // synopsys translate_off |
| 1559 | .omni_ld (omni_ld), |
| 1560 | .omni_data (omni_data[63]), |
| 1561 | .omni_rw_alias (1'b1), |
| 1562 | .omni_rw1c_alias (1'b0), |
| 1563 | .omni_rw1s_alias (1'b0), |
| 1564 | // synopsys translate_on |
| 1565 | .rst (rst_l_active_high), |
| 1566 | .rst_val (reset_data[63]), |
| 1567 | .csr_ld (w_ld), |
| 1568 | .csr_data (csrbus_wr_data[63]), |
| 1569 | .rw_alias (1'b1), |
| 1570 | .rw1c_alias (1'b0), |
| 1571 | .rw1s_alias (1'b0), |
| 1572 | .hw_ld (1'b0), |
| 1573 | .hw_data (1'b0), |
| 1574 | .cp (clk), |
| 1575 | .q (int_mondo_data_1_reg_csrbus_read_data[63]) |
| 1576 | ); |
| 1577 | |
| 1578 | |
| 1579 | endmodule // dmu_imu_rds_msi_csr_int_mondo_data_1_reg_entry |