| 1 | // ========== Copyright Header Begin ========================================== |
| 2 | // |
| 3 | // OpenSPARC T2 Processor File: l2b_rdmard_dp.v |
| 4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved |
| 5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. |
| 6 | // |
| 7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 8 | // |
| 9 | // This program is free software; you can redistribute it and/or modify |
| 10 | // it under the terms of the GNU General Public License as published by |
| 11 | // the Free Software Foundation; version 2 of the License. |
| 12 | // |
| 13 | // This program is distributed in the hope that it will be useful, |
| 14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | // GNU General Public License for more details. |
| 17 | // |
| 18 | // You should have received a copy of the GNU General Public License |
| 19 | // along with this program; if not, write to the Free Software |
| 20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 21 | // |
| 22 | // For the avoidance of doubt, and except that if any non-GPL license |
| 23 | // choice is available it will apply instead, Sun elects to use only |
| 24 | // the General Public License version 2 (GPLv2) at this time for any |
| 25 | // software where a choice of GPL license versions is made |
| 26 | // available with the language indicating that GPLv2 or any later version |
| 27 | // may be used, or where a choice of which version of the GPL is applied is |
| 28 | // otherwise unspecified. |
| 29 | // |
| 30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
| 31 | // CA 95054 USA or visit www.sun.com if you need additional information or |
| 32 | // have any questions. |
| 33 | // |
| 34 | // ========== Copyright Header End ============================================ |
| 35 | module l2b_rdmard_dp ( |
| 36 | l2clk, |
| 37 | l2t_l2b_ctag_en_c7, |
| 38 | l2t_l2b_ctag_c7, |
| 39 | l2t_l2b_req_en_c7, |
| 40 | l2d_l2b_decc_out_c7, |
| 41 | l2t_l2b_word_c7, |
| 42 | l2t_l2b_word_vld_c7, |
| 43 | l2b_dbg_sio_ctag_vld, |
| 44 | l2b_dbg_sio_ack_type, |
| 45 | l2b_dbg_sio_ack_dest, |
| 46 | tcu_aclk, |
| 47 | tcu_bclk, |
| 48 | tcu_scan_en, |
| 49 | tcu_pce_ov, |
| 50 | tcu_clk_stop, |
| 51 | scan_in, |
| 52 | scan_out, |
| 53 | rdmard_l2b_sio_ctag_vld, |
| 54 | rdmard_l2b_sio_data, |
| 55 | rdmard_l2b_sio_ue_err, |
| 56 | rdmard_l2b_l2t_rdma_uerr_c10, |
| 57 | rdmard_l2b_l2t_rdma_cerr_c10, |
| 58 | rdmard_l2b_l2t_rdma_notdata_c10, |
| 59 | rdmard_l2b_sio_parity) ; |
| 60 | wire pce_ov; |
| 61 | wire stop; |
| 62 | wire siclk; |
| 63 | wire soclk; |
| 64 | wire se; |
| 65 | wire ff_l2t_l2b_ctag_c8_scanin; |
| 66 | wire ff_l2t_l2b_ctag_c8_scanout; |
| 67 | wire l2t_l2b_ctag_en_c7_reg; |
| 68 | wire ff_l2t_l2b_ctag_c9_scanin; |
| 69 | wire ff_l2t_l2b_ctag_c9_scanout; |
| 70 | wire ff_l2d_l2b_decc_out_c9_1_scanin; |
| 71 | wire ff_l2d_l2b_decc_out_c9_1_scanout; |
| 72 | wire ff_l2d_l2b_decc_out_c9_2_scanin; |
| 73 | wire ff_l2d_l2b_decc_out_c9_2_scanout; |
| 74 | wire ff_l2d_l2b_decc_out_c9_3_scanin; |
| 75 | wire ff_l2d_l2b_decc_out_c9_3_scanout; |
| 76 | wire ff_l2d_l2b_decc_out_c9_4_scanin; |
| 77 | wire ff_l2d_l2b_decc_out_c9_4_scanout; |
| 78 | wire ff_l2d_l2b_decc_out_c9_5_scanin; |
| 79 | wire ff_l2d_l2b_decc_out_c9_5_scanout; |
| 80 | wire ff_l2d_l2b_decc_out_c9_6_scanin; |
| 81 | wire ff_l2d_l2b_decc_out_c9_6_scanout; |
| 82 | wire ff_l2d_l2b_decc_out_c9_7_scanin; |
| 83 | wire ff_l2d_l2b_decc_out_c9_7_scanout; |
| 84 | wire ff_l2d_l2b_decc_out_c9_8_scanin; |
| 85 | wire ff_l2d_l2b_decc_out_c9_8_scanout; |
| 86 | wire ff_l2d_l2b_decc_out_c9_9_scanin; |
| 87 | wire ff_l2d_l2b_decc_out_c9_9_scanout; |
| 88 | wire ff_l2d_l2b_decc_out_c9_10_scanin; |
| 89 | wire ff_l2d_l2b_decc_out_c9_10_scanout; |
| 90 | wire ff_l2d_l2b_decc_out_c9_11_scanin; |
| 91 | wire ff_l2d_l2b_decc_out_c9_11_scanout; |
| 92 | wire ff_l2d_l2b_decc_out_c9_12_scanin; |
| 93 | wire ff_l2d_l2b_decc_out_c9_12_scanout; |
| 94 | wire ff_l2d_l2b_decc_out_c9_13_scanin; |
| 95 | wire ff_l2d_l2b_decc_out_c9_13_scanout; |
| 96 | wire ff_l2d_l2b_decc_out_c9_14_scanin; |
| 97 | wire ff_l2d_l2b_decc_out_c9_14_scanout; |
| 98 | wire ff_l2d_l2b_decc_out_c9_15_scanin; |
| 99 | wire ff_l2d_l2b_decc_out_c9_15_scanout; |
| 100 | wire ff_l2d_l2b_decc_out_c9_16_scanin; |
| 101 | wire ff_l2d_l2b_decc_out_c9_16_scanout; |
| 102 | wire ff_l2t_l2b_word_and_req_en_c8910_scanin; |
| 103 | wire ff_l2t_l2b_word_and_req_en_c8910_scanout; |
| 104 | wire sel_in0_c8; |
| 105 | wire sel_in1_c8; |
| 106 | wire sel_in2_c8; |
| 107 | wire sel_in3_c8; |
| 108 | wire ff_sel_r1_slice_scanin; |
| 109 | wire ff_sel_r1_slice_scanout; |
| 110 | wire sel_r1_in0; |
| 111 | wire sel_r1_in1; |
| 112 | wire sel_r1_in2; |
| 113 | wire sel_r1_in3; |
| 114 | wire ff_sel_r2_slice_scanin; |
| 115 | wire ff_sel_r2_slice_scanout; |
| 116 | wire sel_r2_in0; |
| 117 | wire sel_r2_in1; |
| 118 | wire sel_r2_in2; |
| 119 | wire sel_r2_in3; |
| 120 | wire ff_sel_l1_slice_scanin; |
| 121 | wire ff_sel_l1_slice_scanout; |
| 122 | wire sel_l1_in0; |
| 123 | wire sel_l1_in1; |
| 124 | wire sel_l1_in2; |
| 125 | wire sel_l1_in3; |
| 126 | wire ff_sel_l2_slice_scanin; |
| 127 | wire ff_sel_l2_slice_scanout; |
| 128 | wire sel_l2_in0; |
| 129 | wire sel_l2_in1; |
| 130 | wire sel_l2_in2; |
| 131 | wire sel_l2_in3; |
| 132 | wire [1:0] word_c8; |
| 133 | wire sel_in4_c8; |
| 134 | wire sel_in5_c8; |
| 135 | wire sel_in6_c8; |
| 136 | wire sel_in7_c8; |
| 137 | wire ff_select_inputs_scanin; |
| 138 | wire ff_select_inputs_scanout; |
| 139 | wire ff_l2d_l2b_decc_out_c10_scanin; |
| 140 | wire ff_l2d_l2b_decc_out_c10_scanout; |
| 141 | wire rdmard_notdata_err_c10_unqual; |
| 142 | wire rdmard_notdata_err_c10_n; |
| 143 | wire rdmard_notdata_err_c10; |
| 144 | wire check0_c10_012345_n; |
| 145 | wire check0_c10_012345; |
| 146 | wire parity0_c10_n; |
| 147 | wire orcheck0_and_parity0_n; |
| 148 | wire l2t_l2b_req_en_c9_n; |
| 149 | wire ff_rdmard_err_and_ctag_scanin; |
| 150 | wire ff_rdmard_err_and_ctag_scanout; |
| 151 | wire l2b_dbg_sio_ack_type_unreg; |
| 152 | wire rdmard_notdata_err_c11; |
| 153 | wire rdmard_fnl_uncorr_err_c11; |
| 154 | wire ff_sio_data_scanin; |
| 155 | wire ff_sio_data_scanout; |
| 156 | |
| 157 | input l2clk; |
| 158 | input l2t_l2b_ctag_en_c7 ; |
| 159 | input [31:0] l2t_l2b_ctag_c7 ;// Phase 2 : SIU inteface and packet format change 2/7/04 |
| 160 | input l2t_l2b_req_en_c7 ; |
| 161 | input [623:0] l2d_l2b_decc_out_c7 ; |
| 162 | input [ 3:0] l2t_l2b_word_c7 ; |
| 163 | input l2t_l2b_word_vld_c7 ; |
| 164 | |
| 165 | // Debug ports |
| 166 | output l2b_dbg_sio_ctag_vld; |
| 167 | output l2b_dbg_sio_ack_type; |
| 168 | output l2b_dbg_sio_ack_dest; |
| 169 | |
| 170 | |
| 171 | input tcu_aclk; |
| 172 | input tcu_bclk; |
| 173 | input tcu_scan_en; |
| 174 | input tcu_pce_ov; |
| 175 | input tcu_clk_stop; |
| 176 | input scan_in; |
| 177 | output scan_out; |
| 178 | |
| 179 | output rdmard_l2b_sio_ctag_vld ; |
| 180 | output [31:0] rdmard_l2b_sio_data ; |
| 181 | output rdmard_l2b_sio_ue_err ; |
| 182 | output rdmard_l2b_l2t_rdma_uerr_c10 ; |
| 183 | output rdmard_l2b_l2t_rdma_cerr_c10 ; |
| 184 | output rdmard_l2b_l2t_rdma_notdata_c10 ; |
| 185 | output [1:0] rdmard_l2b_sio_parity; |
| 186 | |
| 187 | |
| 188 | |
| 189 | assign pce_ov = tcu_pce_ov; |
| 190 | assign stop = tcu_clk_stop; |
| 191 | assign siclk = tcu_aclk; |
| 192 | assign soclk = tcu_bclk; |
| 193 | assign se = tcu_scan_en; |
| 194 | |
| 195 | //assign scan_out = 1'b0; |
| 196 | |
| 197 | ////////////////////////////////////////////////////////////////////////////////// |
| 198 | wire l2t_l2b_req_en_c8 ; |
| 199 | wire l2t_l2b_req_en_c9 ; |
| 200 | wire l2t_l2b_req_en_c10 ; |
| 201 | wire [ 31:0] l2t_l2b_ctag_c8 ;// Phase 2 : SIU inteface and packet format change 2/7/04 |
| 202 | wire [ 31:0] l2t_l2b_ctag_c9 ;// Phase 2 : SIU inteface and packet format change 2/7/04 |
| 203 | wire io_read_c8 ; |
| 204 | wire l2t_l2b_we_c8 ; |
| 205 | wire [623:0] l2d_l2b_decc_out_c8 ; |
| 206 | wire [623:0] l2d_l2b_decc_out_c9 ; |
| 207 | wire [ 38:0] l2d_l2b_decc_out_c10 ; |
| 208 | wire [ 31:0] l2d_l2b_dat_out_c10 ; |
| 209 | wire [ 31:0] data_ctag_mux_out_c9 ; |
| 210 | wire [ 31:0] data_ctag_mux_out_c10 ; |
| 211 | wire [ 3:0] l2t_l2b_word_c8 ; |
| 212 | //wire [ 3:0] l2t_l2b_word_c9 ; |
| 213 | wire l2t_l2b_word_vld_c8 ; |
| 214 | wire l2t_l2b_word_vld_c9 ; |
| 215 | wire l2t_l2b_word_vld_c10 ; |
| 216 | |
| 217 | //wire sel_in0 ; |
| 218 | //wire sel_in1 ; |
| 219 | //wire sel_in2 ; |
| 220 | //wire sel_in3 ; |
| 221 | wire sel_in4 ; |
| 222 | wire sel_in5 ; |
| 223 | wire sel_in6 ; |
| 224 | wire sel_in7 ; |
| 225 | wire [155:0] l2d_l2b_decc_out_c9_4t1 ; |
| 226 | wire [ 38:0] l2d_l2b_decc_out_c9_16t1 ; |
| 227 | |
| 228 | wire [ 5:0] check0_c10 ; |
| 229 | wire parity0_c10 ; |
| 230 | wire rdmard_uncorr_err_c10 ; |
| 231 | wire rdmard_uncorr_err_c11 ; |
| 232 | wire rdmard_corr_err_c10 ; |
| 233 | wire rdmard_corr_err_c11 ; |
| 234 | //wire [1:0] word_c9 ; |
| 235 | |
| 236 | // Phase 2 : SIU Interface changes 2/5/04 |
| 237 | wire [1:0] rdmard_l2b_sio_parity; |
| 238 | wire [1:0] siu_data_rtn_parity_c10; |
| 239 | //wire [1:0] siu_data_rtn_parity_c9; |
| 240 | |
| 241 | |
| 242 | |
| 243 | //////////////////////////////////////////////////////////////////////////////// |
| 244 | // |
| 245 | //inv_macro l2t_l2b_ctag_en_c7_inv_slice (width=1,stack=2r) ( |
| 246 | // .dout (l2t_l2b_ctag_en_c7_reg_n), |
| 247 | // .din (l2t_l2b_ctag_en_c7_reg) |
| 248 | // ); |
| 249 | // |
| 250 | |
| 251 | |
| 252 | l2b_rdmard_dp_msff_macro__stack_32r__width_32 ff_l2t_l2b_ctag_c8 // Phase 2 : SIU inteface and packet format change 2/7/04 |
| 253 | ( |
| 254 | .scan_in(ff_l2t_l2b_ctag_c8_scanin), |
| 255 | .scan_out(ff_l2t_l2b_ctag_c8_scanout), |
| 256 | .din (l2t_l2b_ctag_c7[31:0]), |
| 257 | .clk (l2clk), |
| 258 | .dout (l2t_l2b_ctag_c8[31:0]), |
| 259 | .en (l2t_l2b_ctag_en_c7_reg), |
| 260 | .se(se), |
| 261 | .siclk(siclk), |
| 262 | .soclk(soclk), |
| 263 | .pce_ov(pce_ov), |
| 264 | .stop(stop) |
| 265 | ); |
| 266 | |
| 267 | l2b_rdmard_dp_msff_macro__stack_32r__width_32 ff_l2t_l2b_ctag_c9 // Phase 2 : SIU inteface and packet format change 2/7/04 |
| 268 | ( |
| 269 | .scan_in(ff_l2t_l2b_ctag_c9_scanin), |
| 270 | .scan_out(ff_l2t_l2b_ctag_c9_scanout), |
| 271 | .dout (l2t_l2b_ctag_c9[31:0]), |
| 272 | .din (l2t_l2b_ctag_c8[31:0]), |
| 273 | .clk (l2clk), |
| 274 | .en (1'b1), |
| 275 | .se(se), |
| 276 | .siclk(siclk), |
| 277 | .soclk(soclk), |
| 278 | .pce_ov(pce_ov), |
| 279 | .stop(stop) |
| 280 | ); |
| 281 | |
| 282 | |
| 283 | l2b_rdmard_dp_and_macro__width_1 l2t_l2b_we_c8_slice |
| 284 | ( |
| 285 | .dout (l2t_l2b_we_c8), |
| 286 | .din0 (l2t_l2b_ctag_c8[16]), // Phase 2 : SIU inteface and packet format change 2/7/04 |
| 287 | .din1 (l2t_l2b_req_en_c8) |
| 288 | ); |
| 289 | |
| 290 | // |
| 291 | //inv_macro l2t_l2b_we_c8_inv_macro (width=1) |
| 292 | // ( |
| 293 | // .dout (l2t_l2b_we_c8_n ), |
| 294 | // .din (l2t_l2b_we_c8 ) |
| 295 | // ); |
| 296 | // |
| 297 | |
| 298 | assign l2d_l2b_decc_out_c8 = l2d_l2b_decc_out_c7[623:0] ; |
| 299 | |
| 300 | |
| 301 | l2b_rdmard_dp_msff_macro__stack_40r__width_39 ff_l2d_l2b_decc_out_c9_1 |
| 302 | ( |
| 303 | .scan_in(ff_l2d_l2b_decc_out_c9_1_scanin), |
| 304 | .scan_out(ff_l2d_l2b_decc_out_c9_1_scanout), |
| 305 | .dout (l2d_l2b_decc_out_c9[38:0]), |
| 306 | .din (l2d_l2b_decc_out_c8[38:0]), |
| 307 | .clk (l2clk), |
| 308 | .en (l2t_l2b_we_c8), |
| 309 | .se(se), |
| 310 | .siclk(siclk), |
| 311 | .soclk(soclk), |
| 312 | .pce_ov(pce_ov), |
| 313 | .stop(stop) |
| 314 | ); |
| 315 | |
| 316 | l2b_rdmard_dp_msff_macro__stack_40r__width_39 ff_l2d_l2b_decc_out_c9_2 |
| 317 | ( |
| 318 | .scan_in(ff_l2d_l2b_decc_out_c9_2_scanin), |
| 319 | .scan_out(ff_l2d_l2b_decc_out_c9_2_scanout), |
| 320 | .dout (l2d_l2b_decc_out_c9[77:39]), |
| 321 | .din (l2d_l2b_decc_out_c8[77:39]), |
| 322 | .clk (l2clk), |
| 323 | .en (l2t_l2b_we_c8), |
| 324 | .se(se), |
| 325 | .siclk(siclk), |
| 326 | .soclk(soclk), |
| 327 | .pce_ov(pce_ov), |
| 328 | .stop(stop) |
| 329 | ); |
| 330 | |
| 331 | l2b_rdmard_dp_msff_macro__stack_40r__width_39 ff_l2d_l2b_decc_out_c9_3 |
| 332 | ( |
| 333 | .scan_in(ff_l2d_l2b_decc_out_c9_3_scanin), |
| 334 | .scan_out(ff_l2d_l2b_decc_out_c9_3_scanout), |
| 335 | .dout (l2d_l2b_decc_out_c9[116:78]), |
| 336 | .din (l2d_l2b_decc_out_c8[116:78]), |
| 337 | .clk (l2clk), |
| 338 | .en (l2t_l2b_we_c8), |
| 339 | .se(se), |
| 340 | .siclk(siclk), |
| 341 | .soclk(soclk), |
| 342 | .pce_ov(pce_ov), |
| 343 | .stop(stop) |
| 344 | ); |
| 345 | |
| 346 | l2b_rdmard_dp_msff_macro__stack_40r__width_39 ff_l2d_l2b_decc_out_c9_4 |
| 347 | ( |
| 348 | .scan_in(ff_l2d_l2b_decc_out_c9_4_scanin), |
| 349 | .scan_out(ff_l2d_l2b_decc_out_c9_4_scanout), |
| 350 | .dout (l2d_l2b_decc_out_c9[155:117]), |
| 351 | .din (l2d_l2b_decc_out_c8[155:117]), |
| 352 | .clk (l2clk), |
| 353 | .en (l2t_l2b_we_c8), |
| 354 | .se(se), |
| 355 | .siclk(siclk), |
| 356 | .soclk(soclk), |
| 357 | .pce_ov(pce_ov), |
| 358 | .stop(stop) |
| 359 | ); |
| 360 | |
| 361 | l2b_rdmard_dp_msff_macro__stack_40r__width_39 ff_l2d_l2b_decc_out_c9_5 |
| 362 | ( |
| 363 | .scan_in(ff_l2d_l2b_decc_out_c9_5_scanin), |
| 364 | .scan_out(ff_l2d_l2b_decc_out_c9_5_scanout), |
| 365 | .dout (l2d_l2b_decc_out_c9[194:156]), |
| 366 | .din (l2d_l2b_decc_out_c8[194:156]), |
| 367 | .clk (l2clk), |
| 368 | .en (l2t_l2b_we_c8), |
| 369 | .se(se), |
| 370 | .siclk(siclk), |
| 371 | .soclk(soclk), |
| 372 | .pce_ov(pce_ov), |
| 373 | .stop(stop) |
| 374 | ); |
| 375 | |
| 376 | l2b_rdmard_dp_msff_macro__stack_40r__width_39 ff_l2d_l2b_decc_out_c9_6 |
| 377 | ( |
| 378 | .scan_in(ff_l2d_l2b_decc_out_c9_6_scanin), |
| 379 | .scan_out(ff_l2d_l2b_decc_out_c9_6_scanout), |
| 380 | .dout (l2d_l2b_decc_out_c9[233:195]), |
| 381 | .din (l2d_l2b_decc_out_c8[233:195]), |
| 382 | .clk (l2clk), |
| 383 | .en (l2t_l2b_we_c8), |
| 384 | .se(se), |
| 385 | .siclk(siclk), |
| 386 | .soclk(soclk), |
| 387 | .pce_ov(pce_ov), |
| 388 | .stop(stop) |
| 389 | ); |
| 390 | |
| 391 | l2b_rdmard_dp_msff_macro__stack_40r__width_39 ff_l2d_l2b_decc_out_c9_7 |
| 392 | ( |
| 393 | .scan_in(ff_l2d_l2b_decc_out_c9_7_scanin), |
| 394 | .scan_out(ff_l2d_l2b_decc_out_c9_7_scanout), |
| 395 | .dout (l2d_l2b_decc_out_c9[272:234]), |
| 396 | .din (l2d_l2b_decc_out_c8[272:234]), |
| 397 | .clk (l2clk), |
| 398 | .en (l2t_l2b_we_c8), |
| 399 | .se(se), |
| 400 | .siclk(siclk), |
| 401 | .soclk(soclk), |
| 402 | .pce_ov(pce_ov), |
| 403 | .stop(stop) |
| 404 | ); |
| 405 | |
| 406 | l2b_rdmard_dp_msff_macro__stack_40r__width_39 ff_l2d_l2b_decc_out_c9_8 |
| 407 | ( |
| 408 | .scan_in(ff_l2d_l2b_decc_out_c9_8_scanin), |
| 409 | .scan_out(ff_l2d_l2b_decc_out_c9_8_scanout), |
| 410 | .dout (l2d_l2b_decc_out_c9[311:273]), |
| 411 | .din (l2d_l2b_decc_out_c8[311:273]), |
| 412 | .clk (l2clk), |
| 413 | .en (l2t_l2b_we_c8), |
| 414 | .se(se), |
| 415 | .siclk(siclk), |
| 416 | .soclk(soclk), |
| 417 | .pce_ov(pce_ov), |
| 418 | .stop(stop) |
| 419 | ); |
| 420 | |
| 421 | l2b_rdmard_dp_msff_macro__stack_40r__width_39 ff_l2d_l2b_decc_out_c9_9 |
| 422 | ( |
| 423 | .scan_in(ff_l2d_l2b_decc_out_c9_9_scanin), |
| 424 | .scan_out(ff_l2d_l2b_decc_out_c9_9_scanout), |
| 425 | .dout (l2d_l2b_decc_out_c9[350:312]), |
| 426 | .din (l2d_l2b_decc_out_c8[350:312]), |
| 427 | .clk (l2clk), |
| 428 | .en (l2t_l2b_we_c8), |
| 429 | .se(se), |
| 430 | .siclk(siclk), |
| 431 | .soclk(soclk), |
| 432 | .pce_ov(pce_ov), |
| 433 | .stop(stop) |
| 434 | ); |
| 435 | |
| 436 | l2b_rdmard_dp_msff_macro__stack_40r__width_39 ff_l2d_l2b_decc_out_c9_10 |
| 437 | ( |
| 438 | .scan_in(ff_l2d_l2b_decc_out_c9_10_scanin), |
| 439 | .scan_out(ff_l2d_l2b_decc_out_c9_10_scanout), |
| 440 | .dout (l2d_l2b_decc_out_c9[389:351]), |
| 441 | .din (l2d_l2b_decc_out_c8[389:351]), |
| 442 | .clk (l2clk), |
| 443 | .en (l2t_l2b_we_c8), |
| 444 | .se(se), |
| 445 | .siclk(siclk), |
| 446 | .soclk(soclk), |
| 447 | .pce_ov(pce_ov), |
| 448 | .stop(stop) |
| 449 | ); |
| 450 | |
| 451 | l2b_rdmard_dp_msff_macro__stack_40r__width_39 ff_l2d_l2b_decc_out_c9_11 |
| 452 | ( |
| 453 | .scan_in(ff_l2d_l2b_decc_out_c9_11_scanin), |
| 454 | .scan_out(ff_l2d_l2b_decc_out_c9_11_scanout), |
| 455 | .dout (l2d_l2b_decc_out_c9[428:390]), |
| 456 | .din (l2d_l2b_decc_out_c8[428:390]), |
| 457 | .clk (l2clk), |
| 458 | .en (l2t_l2b_we_c8), |
| 459 | .se(se), |
| 460 | .siclk(siclk), |
| 461 | .soclk(soclk), |
| 462 | .pce_ov(pce_ov), |
| 463 | .stop(stop) |
| 464 | ); |
| 465 | |
| 466 | l2b_rdmard_dp_msff_macro__stack_40r__width_39 ff_l2d_l2b_decc_out_c9_12 |
| 467 | ( |
| 468 | .scan_in(ff_l2d_l2b_decc_out_c9_12_scanin), |
| 469 | .scan_out(ff_l2d_l2b_decc_out_c9_12_scanout), |
| 470 | .dout (l2d_l2b_decc_out_c9[467:429]), |
| 471 | .din (l2d_l2b_decc_out_c8[467:429]), |
| 472 | .clk (l2clk), |
| 473 | .en (l2t_l2b_we_c8), |
| 474 | .se(se), |
| 475 | .siclk(siclk), |
| 476 | .soclk(soclk), |
| 477 | .pce_ov(pce_ov), |
| 478 | .stop(stop) |
| 479 | ); |
| 480 | |
| 481 | l2b_rdmard_dp_msff_macro__stack_40r__width_39 ff_l2d_l2b_decc_out_c9_13 |
| 482 | ( |
| 483 | .scan_in(ff_l2d_l2b_decc_out_c9_13_scanin), |
| 484 | .scan_out(ff_l2d_l2b_decc_out_c9_13_scanout), |
| 485 | .dout (l2d_l2b_decc_out_c9[506:468]), |
| 486 | .din (l2d_l2b_decc_out_c8[506:468]), |
| 487 | .clk (l2clk), |
| 488 | .en (l2t_l2b_we_c8), |
| 489 | .se(se), |
| 490 | .siclk(siclk), |
| 491 | .soclk(soclk), |
| 492 | .pce_ov(pce_ov), |
| 493 | .stop(stop) |
| 494 | ); |
| 495 | |
| 496 | l2b_rdmard_dp_msff_macro__stack_40r__width_39 ff_l2d_l2b_decc_out_c9_14 |
| 497 | ( |
| 498 | .scan_in(ff_l2d_l2b_decc_out_c9_14_scanin), |
| 499 | .scan_out(ff_l2d_l2b_decc_out_c9_14_scanout), |
| 500 | .dout (l2d_l2b_decc_out_c9[545:507]), |
| 501 | .din (l2d_l2b_decc_out_c8[545:507]), |
| 502 | .clk (l2clk), |
| 503 | .en (l2t_l2b_we_c8), |
| 504 | .se(se), |
| 505 | .siclk(siclk), |
| 506 | .soclk(soclk), |
| 507 | .pce_ov(pce_ov), |
| 508 | .stop(stop) |
| 509 | ); |
| 510 | |
| 511 | l2b_rdmard_dp_msff_macro__stack_40r__width_39 ff_l2d_l2b_decc_out_c9_15 |
| 512 | ( |
| 513 | .scan_in(ff_l2d_l2b_decc_out_c9_15_scanin), |
| 514 | .scan_out(ff_l2d_l2b_decc_out_c9_15_scanout), |
| 515 | .dout (l2d_l2b_decc_out_c9[584:546]), |
| 516 | .din (l2d_l2b_decc_out_c8[584:546]), |
| 517 | .clk (l2clk), |
| 518 | .en (l2t_l2b_we_c8), |
| 519 | .se(se), |
| 520 | .siclk(siclk), |
| 521 | .soclk(soclk), |
| 522 | .pce_ov(pce_ov), |
| 523 | .stop(stop) |
| 524 | ); |
| 525 | |
| 526 | l2b_rdmard_dp_msff_macro__stack_40r__width_39 ff_l2d_l2b_decc_out_c9_16 |
| 527 | ( |
| 528 | .scan_in(ff_l2d_l2b_decc_out_c9_16_scanin), |
| 529 | .scan_out(ff_l2d_l2b_decc_out_c9_16_scanout), |
| 530 | .dout (l2d_l2b_decc_out_c9[623:585]), |
| 531 | .din (l2d_l2b_decc_out_c8[623:585]), |
| 532 | .clk (l2clk), |
| 533 | .en (l2t_l2b_we_c8), |
| 534 | .se(se), |
| 535 | .siclk(siclk), |
| 536 | .soclk(soclk), |
| 537 | .pce_ov(pce_ov), |
| 538 | .stop(stop) |
| 539 | ); |
| 540 | |
| 541 | |
| 542 | |
| 543 | l2b_rdmard_dp_msff_macro__stack_14r__width_10 ff_l2t_l2b_word_and_req_en_c8910 |
| 544 | ( |
| 545 | .scan_in(ff_l2t_l2b_word_and_req_en_c8910_scanin), |
| 546 | .scan_out(ff_l2t_l2b_word_and_req_en_c8910_scanout), |
| 547 | .dout ({l2t_l2b_req_en_c8,l2t_l2b_req_en_c9,l2t_l2b_req_en_c10, |
| 548 | l2t_l2b_word_vld_c8,l2t_l2b_word_vld_c9,l2t_l2b_word_vld_c10, |
| 549 | // l2t_l2b_word_c9[3:0], |
| 550 | l2t_l2b_word_c8[3:0]}), |
| 551 | .din ({l2t_l2b_req_en_c7,l2t_l2b_req_en_c8,l2t_l2b_req_en_c9, |
| 552 | l2t_l2b_word_vld_c7,l2t_l2b_word_vld_c8, l2t_l2b_word_vld_c9, |
| 553 | // l2t_l2b_word_c8[3:0], |
| 554 | l2t_l2b_word_c7[3:0]}), |
| 555 | .clk (l2clk), |
| 556 | .en (1'b1), |
| 557 | .se(se), |
| 558 | .siclk(siclk), |
| 559 | .soclk(soclk), |
| 560 | .pce_ov(pce_ov), |
| 561 | .stop(stop) |
| 562 | ); |
| 563 | |
| 564 | ////////////////////////////////////////////////////////////////////////////////// |
| 565 | |
| 566 | // DWORD selection is based on addr<4:3> |
| 567 | |
| 568 | l2b_rdmard_dp_cmp_macro__width_4 l2t_l2b_word_c8_cmp1_slice ( |
| 569 | .din0 ({2'b0,l2t_l2b_word_c8[2:1]}), |
| 570 | .din1 ({2'b0,2'b0}), |
| 571 | .dout (sel_in0_c8) |
| 572 | ); |
| 573 | |
| 574 | l2b_rdmard_dp_cmp_macro__width_4 l2t_l2b_word_c8_cmp2_slice ( |
| 575 | .din0 ({2'b0,l2t_l2b_word_c8[2:1]}), |
| 576 | .din1 ({2'b0,2'b01}), |
| 577 | .dout (sel_in1_c8) |
| 578 | ); |
| 579 | |
| 580 | l2b_rdmard_dp_cmp_macro__width_4 l2t_l2b_word_c8_cmp3_slice ( |
| 581 | .din0 ({2'b0,l2t_l2b_word_c8[2:1]}), |
| 582 | .din1 ({2'b0,2'b10}), |
| 583 | .dout (sel_in2_c8) |
| 584 | ); |
| 585 | |
| 586 | |
| 587 | l2b_rdmard_dp_nor_macro__ports_3__width_1 select_in01_or_slice ( |
| 588 | .dout (sel_in3_c8), |
| 589 | .din0 (sel_in0_c8), |
| 590 | .din1 (sel_in1_c8), |
| 591 | .din2 (sel_in2_c8) |
| 592 | ); |
| 593 | |
| 594 | l2b_rdmard_dp_msff_macro__stack_4r__width_4 ff_sel_r1_slice |
| 595 | ( |
| 596 | .scan_in(ff_sel_r1_slice_scanin), |
| 597 | .scan_out(ff_sel_r1_slice_scanout), |
| 598 | .dout ({sel_r1_in0,sel_r1_in1,sel_r1_in2,sel_r1_in3}), |
| 599 | .din ({sel_in0_c8,sel_in1_c8,sel_in2_c8,sel_in3_c8}), |
| 600 | .clk (l2clk), |
| 601 | .en (1'b1), |
| 602 | .se(se), |
| 603 | .siclk(siclk), |
| 604 | .soclk(soclk), |
| 605 | .pce_ov(pce_ov), |
| 606 | .stop(stop) |
| 607 | ); |
| 608 | |
| 609 | l2b_rdmard_dp_msff_macro__stack_4r__width_4 ff_sel_r2_slice |
| 610 | ( |
| 611 | .scan_in(ff_sel_r2_slice_scanin), |
| 612 | .scan_out(ff_sel_r2_slice_scanout), |
| 613 | .dout ({sel_r2_in0,sel_r2_in1,sel_r2_in2,sel_r2_in3}), |
| 614 | .din ({sel_in0_c8,sel_in1_c8,sel_in2_c8,sel_in3_c8}), |
| 615 | .clk (l2clk), |
| 616 | .en (1'b1), |
| 617 | .se(se), |
| 618 | .siclk(siclk), |
| 619 | .soclk(soclk), |
| 620 | .pce_ov(pce_ov), |
| 621 | .stop(stop) |
| 622 | ); |
| 623 | |
| 624 | l2b_rdmard_dp_msff_macro__stack_4r__width_4 ff_sel_l1_slice |
| 625 | ( |
| 626 | .scan_in(ff_sel_l1_slice_scanin), |
| 627 | .scan_out(ff_sel_l1_slice_scanout), |
| 628 | .dout ({sel_l1_in0,sel_l1_in1,sel_l1_in2,sel_l1_in3}), |
| 629 | .din ({sel_in0_c8,sel_in1_c8,sel_in2_c8,sel_in3_c8}), |
| 630 | .clk (l2clk), |
| 631 | .en (1'b1), |
| 632 | .se(se), |
| 633 | .siclk(siclk), |
| 634 | .soclk(soclk), |
| 635 | .pce_ov(pce_ov), |
| 636 | .stop(stop) |
| 637 | ); |
| 638 | |
| 639 | l2b_rdmard_dp_msff_macro__stack_4r__width_4 ff_sel_l2_slice |
| 640 | ( |
| 641 | .scan_in(ff_sel_l2_slice_scanin), |
| 642 | .scan_out(ff_sel_l2_slice_scanout), |
| 643 | .dout ({sel_l2_in0,sel_l2_in1,sel_l2_in2,sel_l2_in3}), |
| 644 | .din ({sel_in0_c8,sel_in1_c8,sel_in2_c8,sel_in3_c8}), |
| 645 | .clk (l2clk), |
| 646 | .en (1'b1), |
| 647 | .se(se), |
| 648 | .siclk(siclk), |
| 649 | .soclk(soclk), |
| 650 | .pce_ov(pce_ov), |
| 651 | .stop(stop) |
| 652 | ); |
| 653 | |
| 654 | |
| 655 | |
| 656 | |
| 657 | |
| 658 | |
| 659 | ////////////////////////////////////////////////////////////////////////////////// |
| 660 | |
| 661 | assign word_c8 = { l2t_l2b_word_c8[3], l2t_l2b_word_c8[0] } ; |
| 662 | |
| 663 | l2b_rdmard_dp_cmp_macro__width_4 word_c8_cmp1_slice |
| 664 | ( |
| 665 | .din0 ({2'b0,word_c8[1:0]}), |
| 666 | .din1 ({2'b0, 2'b00}), |
| 667 | .dout (sel_in4_c8) |
| 668 | ); |
| 669 | |
| 670 | l2b_rdmard_dp_cmp_macro__width_4 word_c8_cmp2_slice |
| 671 | ( |
| 672 | .din0 ({2'b0,word_c8[1:0]}), |
| 673 | .din1 ({2'b0, 2'b01}), |
| 674 | .dout (sel_in5_c8) |
| 675 | ); |
| 676 | |
| 677 | |
| 678 | l2b_rdmard_dp_cmp_macro__width_4 word_c8_cmp3_slice |
| 679 | ( |
| 680 | .din0 ({2'b0,word_c8[1:0]}), |
| 681 | .din1 ({2'b0, 2'b10}), |
| 682 | .dout (sel_in6_c8) |
| 683 | ); |
| 684 | |
| 685 | l2b_rdmard_dp_nor_macro__ports_3__width_1 select_in7_or_slice ( |
| 686 | .dout (sel_in7_c8), |
| 687 | .din0 (sel_in4_c8), |
| 688 | .din1 (sel_in5_c8), |
| 689 | .din2 (sel_in6_c8) |
| 690 | ); |
| 691 | |
| 692 | l2b_rdmard_dp_msff_macro__stack_4r__width_4 ff_select_inputs |
| 693 | ( |
| 694 | .scan_in(ff_select_inputs_scanin), |
| 695 | .scan_out(ff_select_inputs_scanout), |
| 696 | .dout ({sel_in7,sel_in6,sel_in5,sel_in4}), |
| 697 | .din ({sel_in7_c8,sel_in6_c8,sel_in5_c8,sel_in4_c8}), |
| 698 | .clk (l2clk), |
| 699 | .en (1'b1), |
| 700 | .se(se), |
| 701 | .siclk(siclk), |
| 702 | .soclk(soclk), |
| 703 | .pce_ov(pce_ov), |
| 704 | .stop(stop) |
| 705 | ); |
| 706 | |
| 707 | |
| 708 | //////////////////////////////////////////////////////////////////////////////////////// |
| 709 | |
| 710 | l2b_rdmard_dp_mux_macro__mux_aonpe__ports_4__stack_40r__width_39 mux_l2d_l2b_decc_out_r_1 |
| 711 | ( |
| 712 | .dout (l2d_l2b_decc_out_c9_4t1[38:0]), |
| 713 | .din0 (l2d_l2b_decc_out_c9[ 38: 0]), |
| 714 | .din1 (l2d_l2b_decc_out_c9[116: 78]), |
| 715 | .din2 (l2d_l2b_decc_out_c9[194:156]), |
| 716 | .din3 (l2d_l2b_decc_out_c9[272:234]), |
| 717 | .sel0 (sel_r1_in3), |
| 718 | .sel1 (sel_r1_in2), |
| 719 | .sel2 (sel_r1_in1), |
| 720 | .sel3 (sel_r1_in0) |
| 721 | ); |
| 722 | |
| 723 | l2b_rdmard_dp_mux_macro__mux_aonpe__ports_4__stack_40r__width_39 mux_l2d_l2b_decc_out_r_2 |
| 724 | ( |
| 725 | .dout (l2d_l2b_decc_out_c9_4t1[77:39]), |
| 726 | .din0 (l2d_l2b_decc_out_c9[ 77:39]), |
| 727 | .din1 (l2d_l2b_decc_out_c9[155:117]), |
| 728 | .din2 (l2d_l2b_decc_out_c9[233:195]), |
| 729 | .din3 (l2d_l2b_decc_out_c9[311:273]), |
| 730 | .sel0 (sel_r2_in3), |
| 731 | .sel1 (sel_r2_in2), |
| 732 | .sel2 (sel_r2_in1), |
| 733 | .sel3 (sel_r2_in0) |
| 734 | ); |
| 735 | |
| 736 | |
| 737 | l2b_rdmard_dp_mux_macro__mux_aonpe__ports_4__stack_40r__width_39 mux_l2d_l2b_decc_out_l_1 |
| 738 | ( |
| 739 | .dout (l2d_l2b_decc_out_c9_4t1[116:78]), |
| 740 | .din0 (l2d_l2b_decc_out_c9[350:312]), |
| 741 | .din1 (l2d_l2b_decc_out_c9[428:390]), |
| 742 | .din2 (l2d_l2b_decc_out_c9[506:468]), |
| 743 | .din3 (l2d_l2b_decc_out_c9[584:546]), |
| 744 | .sel0 (sel_l1_in3), |
| 745 | .sel1 (sel_l1_in2), |
| 746 | .sel2 (sel_l1_in1), |
| 747 | .sel3 (sel_l1_in0) |
| 748 | ); |
| 749 | |
| 750 | |
| 751 | l2b_rdmard_dp_mux_macro__mux_aonpe__ports_4__stack_40r__width_39 mux_l2d_l2b_decc_out_l_2 |
| 752 | ( |
| 753 | .dout (l2d_l2b_decc_out_c9_4t1[155:117]), |
| 754 | .din0 (l2d_l2b_decc_out_c9[389:351]), |
| 755 | .din1 (l2d_l2b_decc_out_c9[467:429]), |
| 756 | .din2 (l2d_l2b_decc_out_c9[545:507]), |
| 757 | .din3 (l2d_l2b_decc_out_c9[623:585]), |
| 758 | .sel0 (sel_l2_in3), |
| 759 | .sel1 (sel_l2_in2), |
| 760 | .sel2 (sel_l2_in1), |
| 761 | .sel3 (sel_l2_in0) |
| 762 | ); |
| 763 | |
| 764 | |
| 765 | |
| 766 | l2b_rdmard_dp_mux_macro__mux_aonpe__ports_4__stack_40r__width_39 mux_l2d_l2b_decc_out_1 |
| 767 | ( |
| 768 | .dout (l2d_l2b_decc_out_c9_16t1[38:0]), |
| 769 | .din0 (l2d_l2b_decc_out_c9_4t1[ 38: 0]), |
| 770 | .din1 (l2d_l2b_decc_out_c9_4t1[ 77: 39]), |
| 771 | .din2 (l2d_l2b_decc_out_c9_4t1[116: 78]), |
| 772 | .din3 (l2d_l2b_decc_out_c9_4t1[155:117]), |
| 773 | .sel0 (sel_in7), |
| 774 | .sel1 (sel_in6), |
| 775 | .sel2 (sel_in5), |
| 776 | .sel3 (sel_in4) |
| 777 | ); |
| 778 | |
| 779 | l2b_rdmard_dp_msff_macro__stack_40r__width_39 ff_l2d_l2b_decc_out_c10 |
| 780 | ( |
| 781 | .scan_in(ff_l2d_l2b_decc_out_c10_scanin), |
| 782 | .scan_out(ff_l2d_l2b_decc_out_c10_scanout), |
| 783 | .dout (l2d_l2b_decc_out_c10[38:0]), |
| 784 | .clk (l2clk), |
| 785 | .din (l2d_l2b_decc_out_c9_16t1[38:0]), |
| 786 | .en (1'b1), |
| 787 | .se(se), |
| 788 | .siclk(siclk), |
| 789 | .soclk(soclk), |
| 790 | .pce_ov(pce_ov), |
| 791 | .stop(stop) |
| 792 | ); |
| 793 | |
| 794 | // |
| 795 | ////////////////////////////////////////////////////////////////////////////////// |
| 796 | |
| 797 | l2b_ecc39_dp u_ecctree_39b |
| 798 | (.dout (l2d_l2b_dat_out_c10[31:0]), |
| 799 | .cflag (check0_c10[5:0]), |
| 800 | .pflag (parity0_c10), |
| 801 | .parity (l2d_l2b_decc_out_c10[6:0]), |
| 802 | .din (l2d_l2b_decc_out_c10[38:7]) |
| 803 | ) ; |
| 804 | |
| 805 | // assign rdmard_notdata_err_c10 = ({check0_c10,parity0_c10} == 7'b1111111); |
| 806 | |
| 807 | l2b_rdmard_dp_cmp_macro__width_8 cmp_rdmard_notdata_err |
| 808 | ( |
| 809 | .din0 ({1'b0,7'b1111111}), |
| 810 | .din1 ({1'b0,parity0_c10,check0_c10[5:0]}), |
| 811 | .dout (rdmard_notdata_err_c10_unqual) |
| 812 | ); |
| 813 | |
| 814 | l2b_rdmard_dp_nand_macro__stack_2c__width_1 and_rdmard_notdata_err_c10 |
| 815 | ( |
| 816 | .dout (rdmard_notdata_err_c10_n), |
| 817 | .din0 (rdmard_notdata_err_c10_unqual), |
| 818 | .din1 (l2t_l2b_word_vld_c10) |
| 819 | ); |
| 820 | |
| 821 | l2b_rdmard_dp_inv_macro__width_1 inv_rdmard_notdata_err_c10_n |
| 822 | ( |
| 823 | .dout (rdmard_notdata_err_c10), |
| 824 | .din (rdmard_notdata_err_c10_n) |
| 825 | ); |
| 826 | |
| 827 | //or_macro check0_or01_slice1 (width=1) ( |
| 828 | //.dout(check0_c10_01), |
| 829 | //.din0(check0_c10[0]), |
| 830 | //.din1(check0_c10[1]) |
| 831 | //); |
| 832 | // |
| 833 | //or_macro check0_or23_slice1 (width=1) ( |
| 834 | //.dout(check0_c10_23), |
| 835 | //.din0(check0_c10[3]), |
| 836 | //.din1(check0_c10[2]) |
| 837 | //); |
| 838 | // |
| 839 | //or_macro check0_or45_slice1 (width=1) ( |
| 840 | //.dout(check0_c10_45), |
| 841 | //.din0(check0_c10[5]), |
| 842 | //.din1(check0_c10[4]) |
| 843 | //); |
| 844 | // |
| 845 | //or_macro check0_or0123_slice1 (width=1) ( |
| 846 | //.dout(check0_c10_0123), |
| 847 | //.din0(check0_c10_01), |
| 848 | //.din1(check0_c10_23) |
| 849 | //); |
| 850 | // |
| 851 | ////or_macro check0_or0123_slice1 (width=1) ( |
| 852 | ////.dout(check0_c10_0123), |
| 853 | ////.din0(check0_c10_01), |
| 854 | ////.din1(check0_c10_23) |
| 855 | ////); |
| 856 | // |
| 857 | //or_macro check0_or012345_slice1 (width=1) ( |
| 858 | //.dout(check0_c10_012345), |
| 859 | //.din0(check0_c10_0123), |
| 860 | //.din1(check0_c10_45) |
| 861 | //); |
| 862 | |
| 863 | l2b_rdmard_dp_cmp_macro__width_8 cmp_check0_slice |
| 864 | ( |
| 865 | .dout (check0_c10_012345_n), |
| 866 | .din0 ({2'b0,check0_c10[5:0]}), |
| 867 | .din1 (8'b0) |
| 868 | ); |
| 869 | |
| 870 | l2b_rdmard_dp_inv_macro__width_1 inv_check0_c10_012345_n |
| 871 | ( |
| 872 | .dout (check0_c10_012345), |
| 873 | .din (check0_c10_012345_n) |
| 874 | ); |
| 875 | |
| 876 | l2b_rdmard_dp_inv_macro__width_1 parity0_c10_invert_slice ( |
| 877 | .dout (parity0_c10_n), |
| 878 | .din (parity0_c10) |
| 879 | ); |
| 880 | |
| 881 | l2b_rdmard_dp_and_macro__width_1 check0_and_parity0_slice ( |
| 882 | .dout(orcheck0_and_parity0_n), |
| 883 | .din0(check0_c10_012345), |
| 884 | .din1(parity0_c10_n) |
| 885 | ); |
| 886 | |
| 887 | |
| 888 | // bug id. Needs to log DRU on encountering UE/ND on ld64 |
| 889 | l2b_rdmard_dp_and_macro__ports_3__width_1 rdmard_uncorr_err_c10_slice ( |
| 890 | .dout(rdmard_uncorr_err_c10), |
| 891 | .din0(l2t_l2b_word_vld_c10), |
| 892 | .din1(rdmard_notdata_err_c10_n), |
| 893 | .din2(orcheck0_and_parity0_n) |
| 894 | ); |
| 895 | |
| 896 | l2b_rdmard_dp_and_macro__ports_3__width_1 rdmard_corr_err_c10_and_slice ( |
| 897 | .dout(rdmard_corr_err_c10), |
| 898 | .din0(l2t_l2b_word_vld_c10), |
| 899 | .din1(rdmard_notdata_err_c10_n), |
| 900 | .din2(parity0_c10) |
| 901 | ); |
| 902 | |
| 903 | |
| 904 | |
| 905 | l2b_rdmard_dp_inv_macro__width_1 l2t_l2b_req_en_c9_inv_slice ( |
| 906 | .dout (l2t_l2b_req_en_c9_n), |
| 907 | .din (l2t_l2b_req_en_c9) |
| 908 | ); |
| 909 | |
| 910 | |
| 911 | l2b_rdmard_dp_mux_macro__mux_aonpe__ports_2__stack_40r__width_32 mux_data_ctag_c9 |
| 912 | ( |
| 913 | .dout (data_ctag_mux_out_c9[31:0]), |
| 914 | .din0 (l2d_l2b_dat_out_c10[31:0]), |
| 915 | .din1 (l2t_l2b_ctag_c9[31:0]), |
| 916 | .sel0 (l2t_l2b_req_en_c9_n), |
| 917 | .sel1 (l2t_l2b_req_en_c9) |
| 918 | ); |
| 919 | |
| 920 | // |
| 921 | // Phase 2 : SIU interface changes : 2/5/04 |
| 922 | // SIU now needs the data return data_ctag_mux_out_c9[31:0] |
| 923 | // bus between L2 and SIU to be |
| 924 | // parity protected on 16 bit boundary. |
| 925 | // |
| 926 | |
| 927 | // For timing reasons moved these to c10 |
| 928 | |
| 929 | // |
| 930 | //prty_macro siu_dtartn_15_0_prty (width=16) |
| 931 | // ( |
| 932 | // .din(data_ctag_mux_out_c9[15:0]), |
| 933 | // .dout(siu_data_rtn_parity_c9[0]) |
| 934 | // ); |
| 935 | // |
| 936 | //prty_macro siu_dtartn_31_16_prty (width=16) |
| 937 | // ( |
| 938 | // .din(data_ctag_mux_out_c9[31:16]), |
| 939 | // .dout(siu_data_rtn_parity_c9[1]) |
| 940 | // ); |
| 941 | |
| 942 | |
| 943 | l2b_rdmard_dp_prty_macro__width_16 siu_dtartn_15_0_prty |
| 944 | ( |
| 945 | .din(data_ctag_mux_out_c10[15:0]), |
| 946 | .dout(siu_data_rtn_parity_c10[0]) |
| 947 | ); |
| 948 | |
| 949 | l2b_rdmard_dp_prty_macro__width_16 siu_dtartn_31_16_prty |
| 950 | ( |
| 951 | .din(data_ctag_mux_out_c10[31:16]), |
| 952 | .dout(siu_data_rtn_parity_c10[1]) |
| 953 | ); |
| 954 | |
| 955 | |
| 956 | |
| 957 | //msff_macro ff_data_ctag_mux_out_c10 (width=32) |
| 958 | // ( |
| 959 | // .din (data_ctag_mux_out_c9[31:0]), |
| 960 | // .clk (l2clk), |
| 961 | // .dout (data_ctag_mux_out_c10[31:0]), |
| 962 | // .en (1'b1), |
| 963 | // .scan_in (), |
| 964 | // .scan_out () |
| 965 | // ); |
| 966 | // |
| 967 | //msff_macro ff_siu_data_rtn_parity (width=2) |
| 968 | // ( |
| 969 | // .din (siu_data_rtn_parity_c9[1:0]), |
| 970 | // .clk (l2clk), |
| 971 | // .dout (siu_data_rtn_parity_c10[1:0]), |
| 972 | // .en (1'b1), |
| 973 | // .scan_in (), |
| 974 | // .scan_out () |
| 975 | // ); |
| 976 | // |
| 977 | //msff_macro ff_rdmard_uncorr_err_c11 (width=1) |
| 978 | // ( |
| 979 | // .din (rdmard_uncorr_err_c10), |
| 980 | // .clk (l2clk), |
| 981 | // .dout (rdmard_uncorr_err_c11), |
| 982 | // .en (1'b1), |
| 983 | // .scan_in (), |
| 984 | // .scan_out () |
| 985 | // ); |
| 986 | // |
| 987 | //msff_macro ff_rdmard_corr_err_c11 (width=1) |
| 988 | // ( |
| 989 | // .din (rdmard_corr_err_c10), |
| 990 | // .clk (l2clk), |
| 991 | // .dout (rdmard_corr_err_c11), |
| 992 | // .en (1'b1), |
| 993 | // .scan_in (), |
| 994 | // .scan_out () |
| 995 | // ); |
| 996 | |
| 997 | //msff_macro ff_rdmard_err_and_ctag (width=37,stack=38r) |
| 998 | // ( |
| 999 | // .scan_in(ff_rdmard_err_and_ctag_scanin), |
| 1000 | // .scan_out(ff_rdmard_err_and_ctag_scanout), |
| 1001 | // .din ({rdmard_corr_err_c10,rdmard_uncorr_err_c10,rdmard_notdata_err_c10, |
| 1002 | // data_ctag_mux_out_c9[31:0],siu_data_rtn_parity_c9[1:0]}), |
| 1003 | // .clk (l2clk), |
| 1004 | // .dout ({rdmard_corr_err_c11,rdmard_uncorr_err_c11,rdmard_notdata_err_c11, |
| 1005 | // data_ctag_mux_out_c10[31:0],siu_data_rtn_parity_c10[1:0]}), |
| 1006 | // .en (1'b1), |
| 1007 | // ); |
| 1008 | |
| 1009 | l2b_rdmard_dp_msff_macro__stack_39r__width_39 ff_rdmard_err_and_ctag |
| 1010 | ( |
| 1011 | .scan_in(ff_rdmard_err_and_ctag_scanin), |
| 1012 | .scan_out(ff_rdmard_err_and_ctag_scanout), |
| 1013 | .din ({l2t_l2b_ctag_en_c7,rdmard_corr_err_c10,rdmard_uncorr_err_c10,rdmard_notdata_err_c10, |
| 1014 | data_ctag_mux_out_c9[31:0],data_ctag_mux_out_c10[20], |
| 1015 | l2b_dbg_sio_ack_type_unreg,l2t_l2b_req_en_c10}), |
| 1016 | .clk (l2clk), |
| 1017 | .dout ({l2t_l2b_ctag_en_c7_reg,rdmard_corr_err_c11,rdmard_uncorr_err_c11,rdmard_notdata_err_c11, |
| 1018 | data_ctag_mux_out_c10[31:0],l2b_dbg_sio_ack_dest,l2b_dbg_sio_ack_type, |
| 1019 | l2b_dbg_sio_ctag_vld}), |
| 1020 | .en (1'b1), |
| 1021 | .se(se), |
| 1022 | .siclk(siclk), |
| 1023 | .soclk(soclk), |
| 1024 | .pce_ov(pce_ov), |
| 1025 | .stop(stop) |
| 1026 | ); |
| 1027 | |
| 1028 | |
| 1029 | // BS 06/13/04 Added Notdata logic |
| 1030 | // in case a siu read reads notdata , should turn that into a UE when sending to SIU |
| 1031 | // However it will be logged as Notdata error in L2 in l2t_csr_ctl.sv |
| 1032 | |
| 1033 | l2b_rdmard_dp_or_macro__width_1 rdmard_fnl_ue ( |
| 1034 | .dout(rdmard_fnl_uncorr_err_c11), |
| 1035 | .din0(rdmard_uncorr_err_c11), |
| 1036 | .din1(rdmard_notdata_err_c11) |
| 1037 | ); |
| 1038 | |
| 1039 | |
| 1040 | |
| 1041 | |
| 1042 | ////////////////////////////////////////////////////////////////////////////////// |
| 1043 | //assign rdmard_l2b_sio_ctag_vld = l2t_l2b_req_en_c10 ; |
| 1044 | //assign rdmard_l2b_sio_data = data_ctag_mux_out_c10[31:0] ; |
| 1045 | //assign rdmard_l2b_sio_ue_err = rdmard_fnl_uncorr_err_c11 ; |
| 1046 | assign rdmard_l2b_l2t_rdma_uerr_c10 = rdmard_uncorr_err_c11 ; |
| 1047 | assign rdmard_l2b_l2t_rdma_cerr_c10 = rdmard_corr_err_c11 ; |
| 1048 | assign rdmard_l2b_l2t_rdma_notdata_c10 = rdmard_notdata_err_c11 ; |
| 1049 | //assign rdmard_l2b_sio_parity[1:0] = siu_data_rtn_parity_c10[1:0]; |
| 1050 | |
| 1051 | // for debug |
| 1052 | //assign l2b_dbg_sio_ctag_vld = l2t_l2b_req_en_c10; |
| 1053 | ////assign l2b_dbg_sio_ack_type = data_ctag_mux_out_c10[21] & l2t_l2b_req_en_c10; |
| 1054 | l2b_rdmard_dp_and_macro__width_1 and_l2b_dbg_sio_ack_type |
| 1055 | ( |
| 1056 | .dout (l2b_dbg_sio_ack_type_unreg), |
| 1057 | .din0 (data_ctag_mux_out_c10[21]), |
| 1058 | .din1 (l2t_l2b_req_en_c10) |
| 1059 | ); |
| 1060 | |
| 1061 | //assign l2b_dbg_sio_ack_dest = data_ctag_mux_out_c10[20]; |
| 1062 | |
| 1063 | l2b_rdmard_dp_msff_macro__dmsff_32x__stack_36r__width_36 ff_sio_data |
| 1064 | ( |
| 1065 | .scan_in(ff_sio_data_scanin), |
| 1066 | .scan_out(ff_sio_data_scanout), |
| 1067 | .dout ({rdmard_l2b_sio_ctag_vld,rdmard_l2b_sio_data[31:0],rdmard_l2b_sio_ue_err,rdmard_l2b_sio_parity[1:0]}), |
| 1068 | .din ({l2t_l2b_req_en_c10,data_ctag_mux_out_c10[31:0],rdmard_fnl_uncorr_err_c11,siu_data_rtn_parity_c10[1:0]}), |
| 1069 | .clk (l2clk), |
| 1070 | .en (1'b1), |
| 1071 | .se(se), |
| 1072 | .siclk(siclk), |
| 1073 | .soclk(soclk), |
| 1074 | .pce_ov(pce_ov), |
| 1075 | .stop(stop) |
| 1076 | ); |
| 1077 | |
| 1078 | |
| 1079 | |
| 1080 | // fixscan start: |
| 1081 | assign ff_l2t_l2b_ctag_c8_scanin = scan_in ; |
| 1082 | assign ff_l2t_l2b_ctag_c9_scanin = ff_l2t_l2b_ctag_c8_scanout; |
| 1083 | assign ff_l2d_l2b_decc_out_c9_1_scanin = ff_l2t_l2b_ctag_c9_scanout; |
| 1084 | assign ff_l2d_l2b_decc_out_c9_2_scanin = ff_l2d_l2b_decc_out_c9_1_scanout; |
| 1085 | assign ff_l2d_l2b_decc_out_c9_3_scanin = ff_l2d_l2b_decc_out_c9_2_scanout; |
| 1086 | assign ff_l2d_l2b_decc_out_c9_4_scanin = ff_l2d_l2b_decc_out_c9_3_scanout; |
| 1087 | assign ff_l2d_l2b_decc_out_c9_5_scanin = ff_l2d_l2b_decc_out_c9_4_scanout; |
| 1088 | assign ff_l2d_l2b_decc_out_c9_6_scanin = ff_l2d_l2b_decc_out_c9_5_scanout; |
| 1089 | assign ff_l2d_l2b_decc_out_c9_7_scanin = ff_l2d_l2b_decc_out_c9_6_scanout; |
| 1090 | assign ff_l2d_l2b_decc_out_c9_8_scanin = ff_l2d_l2b_decc_out_c9_7_scanout; |
| 1091 | assign ff_l2d_l2b_decc_out_c9_9_scanin = ff_l2d_l2b_decc_out_c9_8_scanout; |
| 1092 | assign ff_l2d_l2b_decc_out_c9_10_scanin = ff_l2d_l2b_decc_out_c9_9_scanout; |
| 1093 | assign ff_l2d_l2b_decc_out_c9_11_scanin = ff_l2d_l2b_decc_out_c9_10_scanout; |
| 1094 | assign ff_l2d_l2b_decc_out_c9_12_scanin = ff_l2d_l2b_decc_out_c9_11_scanout; |
| 1095 | assign ff_l2d_l2b_decc_out_c9_13_scanin = ff_l2d_l2b_decc_out_c9_12_scanout; |
| 1096 | assign ff_l2d_l2b_decc_out_c9_14_scanin = ff_l2d_l2b_decc_out_c9_13_scanout; |
| 1097 | assign ff_l2d_l2b_decc_out_c9_15_scanin = ff_l2d_l2b_decc_out_c9_14_scanout; |
| 1098 | assign ff_l2d_l2b_decc_out_c9_16_scanin = ff_l2d_l2b_decc_out_c9_15_scanout; |
| 1099 | assign ff_l2t_l2b_word_and_req_en_c8910_scanin = ff_l2d_l2b_decc_out_c9_16_scanout; |
| 1100 | assign ff_sel_r1_slice_scanin = ff_l2t_l2b_word_and_req_en_c8910_scanout; |
| 1101 | assign ff_sel_r2_slice_scanin = ff_sel_r1_slice_scanout ; |
| 1102 | assign ff_sel_l1_slice_scanin = ff_sel_r2_slice_scanout ; |
| 1103 | assign ff_sel_l2_slice_scanin = ff_sel_l1_slice_scanout ; |
| 1104 | assign ff_select_inputs_scanin = ff_sel_l2_slice_scanout ; |
| 1105 | assign ff_l2d_l2b_decc_out_c10_scanin = ff_select_inputs_scanout ; |
| 1106 | assign ff_rdmard_err_and_ctag_scanin = ff_l2d_l2b_decc_out_c10_scanout; |
| 1107 | assign ff_sio_data_scanin = ff_rdmard_err_and_ctag_scanout; |
| 1108 | assign scan_out = ff_sio_data_scanout ; |
| 1109 | // fixscan end: |
| 1110 | endmodule |
| 1111 | |
| 1112 | |
| 1113 | |
| 1114 | |
| 1115 | |
| 1116 | |
| 1117 | // any PARAMS parms go into naming of macro |
| 1118 | |
| 1119 | module l2b_rdmard_dp_msff_macro__stack_32r__width_32 ( |
| 1120 | din, |
| 1121 | clk, |
| 1122 | en, |
| 1123 | se, |
| 1124 | scan_in, |
| 1125 | siclk, |
| 1126 | soclk, |
| 1127 | pce_ov, |
| 1128 | stop, |
| 1129 | dout, |
| 1130 | scan_out); |
| 1131 | wire l1clk; |
| 1132 | wire siclk_out; |
| 1133 | wire soclk_out; |
| 1134 | wire [30:0] so; |
| 1135 | |
| 1136 | input [31:0] din; |
| 1137 | |
| 1138 | |
| 1139 | input clk; |
| 1140 | input en; |
| 1141 | input se; |
| 1142 | input scan_in; |
| 1143 | input siclk; |
| 1144 | input soclk; |
| 1145 | input pce_ov; |
| 1146 | input stop; |
| 1147 | |
| 1148 | |
| 1149 | |
| 1150 | output [31:0] dout; |
| 1151 | |
| 1152 | |
| 1153 | output scan_out; |
| 1154 | |
| 1155 | |
| 1156 | |
| 1157 | |
| 1158 | cl_dp1_l1hdr_8x c0_0 ( |
| 1159 | .l2clk(clk), |
| 1160 | .pce(en), |
| 1161 | .aclk(siclk), |
| 1162 | .bclk(soclk), |
| 1163 | .l1clk(l1clk), |
| 1164 | .se(se), |
| 1165 | .pce_ov(pce_ov), |
| 1166 | .stop(stop), |
| 1167 | .siclk_out(siclk_out), |
| 1168 | .soclk_out(soclk_out) |
| 1169 | ); |
| 1170 | dff #(32) d0_0 ( |
| 1171 | .l1clk(l1clk), |
| 1172 | .siclk(siclk_out), |
| 1173 | .soclk(soclk_out), |
| 1174 | .d(din[31:0]), |
| 1175 | .si({scan_in,so[30:0]}), |
| 1176 | .so({so[30:0],scan_out}), |
| 1177 | .q(dout[31:0]) |
| 1178 | ); |
| 1179 | |
| 1180 | |
| 1181 | |
| 1182 | |
| 1183 | |
| 1184 | |
| 1185 | |
| 1186 | |
| 1187 | |
| 1188 | |
| 1189 | |
| 1190 | |
| 1191 | |
| 1192 | |
| 1193 | |
| 1194 | |
| 1195 | |
| 1196 | |
| 1197 | |
| 1198 | |
| 1199 | endmodule |
| 1200 | |
| 1201 | |
| 1202 | |
| 1203 | |
| 1204 | |
| 1205 | |
| 1206 | |
| 1207 | |
| 1208 | |
| 1209 | // |
| 1210 | // and macro for ports = 2,3,4 |
| 1211 | // |
| 1212 | // |
| 1213 | |
| 1214 | |
| 1215 | |
| 1216 | |
| 1217 | |
| 1218 | module l2b_rdmard_dp_and_macro__width_1 ( |
| 1219 | din0, |
| 1220 | din1, |
| 1221 | dout); |
| 1222 | input [0:0] din0; |
| 1223 | input [0:0] din1; |
| 1224 | output [0:0] dout; |
| 1225 | |
| 1226 | |
| 1227 | |
| 1228 | |
| 1229 | |
| 1230 | |
| 1231 | and2 #(1) d0_0 ( |
| 1232 | .in0(din0[0:0]), |
| 1233 | .in1(din1[0:0]), |
| 1234 | .out(dout[0:0]) |
| 1235 | ); |
| 1236 | |
| 1237 | |
| 1238 | |
| 1239 | |
| 1240 | |
| 1241 | |
| 1242 | |
| 1243 | |
| 1244 | |
| 1245 | endmodule |
| 1246 | |
| 1247 | |
| 1248 | |
| 1249 | |
| 1250 | |
| 1251 | |
| 1252 | |
| 1253 | |
| 1254 | |
| 1255 | // any PARAMS parms go into naming of macro |
| 1256 | |
| 1257 | module l2b_rdmard_dp_msff_macro__stack_40r__width_39 ( |
| 1258 | din, |
| 1259 | clk, |
| 1260 | en, |
| 1261 | se, |
| 1262 | scan_in, |
| 1263 | siclk, |
| 1264 | soclk, |
| 1265 | pce_ov, |
| 1266 | stop, |
| 1267 | dout, |
| 1268 | scan_out); |
| 1269 | wire l1clk; |
| 1270 | wire siclk_out; |
| 1271 | wire soclk_out; |
| 1272 | wire [37:0] so; |
| 1273 | |
| 1274 | input [38:0] din; |
| 1275 | |
| 1276 | |
| 1277 | input clk; |
| 1278 | input en; |
| 1279 | input se; |
| 1280 | input scan_in; |
| 1281 | input siclk; |
| 1282 | input soclk; |
| 1283 | input pce_ov; |
| 1284 | input stop; |
| 1285 | |
| 1286 | |
| 1287 | |
| 1288 | output [38:0] dout; |
| 1289 | |
| 1290 | |
| 1291 | output scan_out; |
| 1292 | |
| 1293 | |
| 1294 | |
| 1295 | |
| 1296 | cl_dp1_l1hdr_8x c0_0 ( |
| 1297 | .l2clk(clk), |
| 1298 | .pce(en), |
| 1299 | .aclk(siclk), |
| 1300 | .bclk(soclk), |
| 1301 | .l1clk(l1clk), |
| 1302 | .se(se), |
| 1303 | .pce_ov(pce_ov), |
| 1304 | .stop(stop), |
| 1305 | .siclk_out(siclk_out), |
| 1306 | .soclk_out(soclk_out) |
| 1307 | ); |
| 1308 | dff #(39) d0_0 ( |
| 1309 | .l1clk(l1clk), |
| 1310 | .siclk(siclk_out), |
| 1311 | .soclk(soclk_out), |
| 1312 | .d(din[38:0]), |
| 1313 | .si({scan_in,so[37:0]}), |
| 1314 | .so({so[37:0],scan_out}), |
| 1315 | .q(dout[38:0]) |
| 1316 | ); |
| 1317 | |
| 1318 | |
| 1319 | |
| 1320 | |
| 1321 | |
| 1322 | |
| 1323 | |
| 1324 | |
| 1325 | |
| 1326 | |
| 1327 | |
| 1328 | |
| 1329 | |
| 1330 | |
| 1331 | |
| 1332 | |
| 1333 | |
| 1334 | |
| 1335 | |
| 1336 | |
| 1337 | endmodule |
| 1338 | |
| 1339 | |
| 1340 | |
| 1341 | |
| 1342 | |
| 1343 | |
| 1344 | |
| 1345 | |
| 1346 | |
| 1347 | |
| 1348 | |
| 1349 | |
| 1350 | |
| 1351 | // any PARAMS parms go into naming of macro |
| 1352 | |
| 1353 | module l2b_rdmard_dp_msff_macro__stack_14r__width_10 ( |
| 1354 | din, |
| 1355 | clk, |
| 1356 | en, |
| 1357 | se, |
| 1358 | scan_in, |
| 1359 | siclk, |
| 1360 | soclk, |
| 1361 | pce_ov, |
| 1362 | stop, |
| 1363 | dout, |
| 1364 | scan_out); |
| 1365 | wire l1clk; |
| 1366 | wire siclk_out; |
| 1367 | wire soclk_out; |
| 1368 | wire [8:0] so; |
| 1369 | |
| 1370 | input [9:0] din; |
| 1371 | |
| 1372 | |
| 1373 | input clk; |
| 1374 | input en; |
| 1375 | input se; |
| 1376 | input scan_in; |
| 1377 | input siclk; |
| 1378 | input soclk; |
| 1379 | input pce_ov; |
| 1380 | input stop; |
| 1381 | |
| 1382 | |
| 1383 | |
| 1384 | output [9:0] dout; |
| 1385 | |
| 1386 | |
| 1387 | output scan_out; |
| 1388 | |
| 1389 | |
| 1390 | |
| 1391 | |
| 1392 | cl_dp1_l1hdr_8x c0_0 ( |
| 1393 | .l2clk(clk), |
| 1394 | .pce(en), |
| 1395 | .aclk(siclk), |
| 1396 | .bclk(soclk), |
| 1397 | .l1clk(l1clk), |
| 1398 | .se(se), |
| 1399 | .pce_ov(pce_ov), |
| 1400 | .stop(stop), |
| 1401 | .siclk_out(siclk_out), |
| 1402 | .soclk_out(soclk_out) |
| 1403 | ); |
| 1404 | dff #(10) d0_0 ( |
| 1405 | .l1clk(l1clk), |
| 1406 | .siclk(siclk_out), |
| 1407 | .soclk(soclk_out), |
| 1408 | .d(din[9:0]), |
| 1409 | .si({scan_in,so[8:0]}), |
| 1410 | .so({so[8:0],scan_out}), |
| 1411 | .q(dout[9:0]) |
| 1412 | ); |
| 1413 | |
| 1414 | |
| 1415 | |
| 1416 | |
| 1417 | |
| 1418 | |
| 1419 | |
| 1420 | |
| 1421 | |
| 1422 | |
| 1423 | |
| 1424 | |
| 1425 | |
| 1426 | |
| 1427 | |
| 1428 | |
| 1429 | |
| 1430 | |
| 1431 | |
| 1432 | |
| 1433 | endmodule |
| 1434 | |
| 1435 | |
| 1436 | |
| 1437 | |
| 1438 | |
| 1439 | |
| 1440 | |
| 1441 | |
| 1442 | |
| 1443 | // |
| 1444 | // comparator macro (output is 1 if both inputs are equal; 0 otherwise) |
| 1445 | // |
| 1446 | // |
| 1447 | |
| 1448 | |
| 1449 | |
| 1450 | |
| 1451 | |
| 1452 | module l2b_rdmard_dp_cmp_macro__width_4 ( |
| 1453 | din0, |
| 1454 | din1, |
| 1455 | dout); |
| 1456 | input [3:0] din0; |
| 1457 | input [3:0] din1; |
| 1458 | output dout; |
| 1459 | |
| 1460 | |
| 1461 | |
| 1462 | |
| 1463 | |
| 1464 | |
| 1465 | cmp #(4) m0_0 ( |
| 1466 | .in0(din0[3:0]), |
| 1467 | .in1(din1[3:0]), |
| 1468 | .out(dout) |
| 1469 | ); |
| 1470 | |
| 1471 | |
| 1472 | |
| 1473 | |
| 1474 | |
| 1475 | |
| 1476 | |
| 1477 | |
| 1478 | |
| 1479 | |
| 1480 | endmodule |
| 1481 | |
| 1482 | |
| 1483 | |
| 1484 | |
| 1485 | |
| 1486 | // |
| 1487 | // nor macro for ports = 2,3 |
| 1488 | // |
| 1489 | // |
| 1490 | |
| 1491 | |
| 1492 | |
| 1493 | |
| 1494 | |
| 1495 | module l2b_rdmard_dp_nor_macro__ports_3__width_1 ( |
| 1496 | din0, |
| 1497 | din1, |
| 1498 | din2, |
| 1499 | dout); |
| 1500 | input [0:0] din0; |
| 1501 | input [0:0] din1; |
| 1502 | input [0:0] din2; |
| 1503 | output [0:0] dout; |
| 1504 | |
| 1505 | |
| 1506 | |
| 1507 | |
| 1508 | |
| 1509 | |
| 1510 | nor3 #(1) d0_0 ( |
| 1511 | .in0(din0[0:0]), |
| 1512 | .in1(din1[0:0]), |
| 1513 | .in2(din2[0:0]), |
| 1514 | .out(dout[0:0]) |
| 1515 | ); |
| 1516 | |
| 1517 | |
| 1518 | |
| 1519 | |
| 1520 | |
| 1521 | |
| 1522 | |
| 1523 | endmodule |
| 1524 | |
| 1525 | |
| 1526 | |
| 1527 | |
| 1528 | |
| 1529 | |
| 1530 | |
| 1531 | |
| 1532 | |
| 1533 | // any PARAMS parms go into naming of macro |
| 1534 | |
| 1535 | module l2b_rdmard_dp_msff_macro__stack_4r__width_4 ( |
| 1536 | din, |
| 1537 | clk, |
| 1538 | en, |
| 1539 | se, |
| 1540 | scan_in, |
| 1541 | siclk, |
| 1542 | soclk, |
| 1543 | pce_ov, |
| 1544 | stop, |
| 1545 | dout, |
| 1546 | scan_out); |
| 1547 | wire l1clk; |
| 1548 | wire siclk_out; |
| 1549 | wire soclk_out; |
| 1550 | wire [2:0] so; |
| 1551 | |
| 1552 | input [3:0] din; |
| 1553 | |
| 1554 | |
| 1555 | input clk; |
| 1556 | input en; |
| 1557 | input se; |
| 1558 | input scan_in; |
| 1559 | input siclk; |
| 1560 | input soclk; |
| 1561 | input pce_ov; |
| 1562 | input stop; |
| 1563 | |
| 1564 | |
| 1565 | |
| 1566 | output [3:0] dout; |
| 1567 | |
| 1568 | |
| 1569 | output scan_out; |
| 1570 | |
| 1571 | |
| 1572 | |
| 1573 | |
| 1574 | cl_dp1_l1hdr_8x c0_0 ( |
| 1575 | .l2clk(clk), |
| 1576 | .pce(en), |
| 1577 | .aclk(siclk), |
| 1578 | .bclk(soclk), |
| 1579 | .l1clk(l1clk), |
| 1580 | .se(se), |
| 1581 | .pce_ov(pce_ov), |
| 1582 | .stop(stop), |
| 1583 | .siclk_out(siclk_out), |
| 1584 | .soclk_out(soclk_out) |
| 1585 | ); |
| 1586 | dff #(4) d0_0 ( |
| 1587 | .l1clk(l1clk), |
| 1588 | .siclk(siclk_out), |
| 1589 | .soclk(soclk_out), |
| 1590 | .d(din[3:0]), |
| 1591 | .si({scan_in,so[2:0]}), |
| 1592 | .so({so[2:0],scan_out}), |
| 1593 | .q(dout[3:0]) |
| 1594 | ); |
| 1595 | |
| 1596 | |
| 1597 | |
| 1598 | |
| 1599 | |
| 1600 | |
| 1601 | |
| 1602 | |
| 1603 | |
| 1604 | |
| 1605 | |
| 1606 | |
| 1607 | |
| 1608 | |
| 1609 | |
| 1610 | |
| 1611 | |
| 1612 | |
| 1613 | |
| 1614 | |
| 1615 | endmodule |
| 1616 | |
| 1617 | |
| 1618 | |
| 1619 | |
| 1620 | |
| 1621 | |
| 1622 | |
| 1623 | |
| 1624 | |
| 1625 | // general mux macro for pass-gate and and-or muxes with/wout priority encoders |
| 1626 | // also for pass-gate with decoder |
| 1627 | |
| 1628 | |
| 1629 | |
| 1630 | |
| 1631 | |
| 1632 | // any PARAMS parms go into naming of macro |
| 1633 | |
| 1634 | module l2b_rdmard_dp_mux_macro__mux_aonpe__ports_4__stack_40r__width_39 ( |
| 1635 | din0, |
| 1636 | sel0, |
| 1637 | din1, |
| 1638 | sel1, |
| 1639 | din2, |
| 1640 | sel2, |
| 1641 | din3, |
| 1642 | sel3, |
| 1643 | dout); |
| 1644 | wire buffout0; |
| 1645 | wire buffout1; |
| 1646 | wire buffout2; |
| 1647 | wire buffout3; |
| 1648 | |
| 1649 | input [38:0] din0; |
| 1650 | input sel0; |
| 1651 | input [38:0] din1; |
| 1652 | input sel1; |
| 1653 | input [38:0] din2; |
| 1654 | input sel2; |
| 1655 | input [38:0] din3; |
| 1656 | input sel3; |
| 1657 | output [38:0] dout; |
| 1658 | |
| 1659 | |
| 1660 | |
| 1661 | |
| 1662 | |
| 1663 | cl_dp1_muxbuff4_8x c0_0 ( |
| 1664 | .in0(sel0), |
| 1665 | .in1(sel1), |
| 1666 | .in2(sel2), |
| 1667 | .in3(sel3), |
| 1668 | .out0(buffout0), |
| 1669 | .out1(buffout1), |
| 1670 | .out2(buffout2), |
| 1671 | .out3(buffout3) |
| 1672 | ); |
| 1673 | mux4s #(39) d0_0 ( |
| 1674 | .sel0(buffout0), |
| 1675 | .sel1(buffout1), |
| 1676 | .sel2(buffout2), |
| 1677 | .sel3(buffout3), |
| 1678 | .in0(din0[38:0]), |
| 1679 | .in1(din1[38:0]), |
| 1680 | .in2(din2[38:0]), |
| 1681 | .in3(din3[38:0]), |
| 1682 | .dout(dout[38:0]) |
| 1683 | ); |
| 1684 | |
| 1685 | |
| 1686 | |
| 1687 | endmodule |
| 1688 | |
| 1689 | |
| 1690 | // |
| 1691 | // xor macro for ports = 2,3 |
| 1692 | // |
| 1693 | // |
| 1694 | |
| 1695 | |
| 1696 | |
| 1697 | |
| 1698 | |
| 1699 | module l2b_rdmard_dp_xor_macro__dxor_8x__ports_3__width_1 ( |
| 1700 | din0, |
| 1701 | din1, |
| 1702 | din2, |
| 1703 | dout); |
| 1704 | input [0:0] din0; |
| 1705 | input [0:0] din1; |
| 1706 | input [0:0] din2; |
| 1707 | output [0:0] dout; |
| 1708 | |
| 1709 | |
| 1710 | |
| 1711 | |
| 1712 | |
| 1713 | xor3 #(1) d0_0 ( |
| 1714 | .in0(din0[0:0]), |
| 1715 | .in1(din1[0:0]), |
| 1716 | .in2(din2[0:0]), |
| 1717 | .out(dout[0:0]) |
| 1718 | ); |
| 1719 | |
| 1720 | |
| 1721 | |
| 1722 | |
| 1723 | |
| 1724 | |
| 1725 | |
| 1726 | |
| 1727 | endmodule |
| 1728 | |
| 1729 | |
| 1730 | |
| 1731 | |
| 1732 | |
| 1733 | // |
| 1734 | // xor macro for ports = 2,3 |
| 1735 | // |
| 1736 | // |
| 1737 | |
| 1738 | |
| 1739 | |
| 1740 | |
| 1741 | |
| 1742 | module l2b_rdmard_dp_xor_macro__dxor_16x__ports_3__width_1 ( |
| 1743 | din0, |
| 1744 | din1, |
| 1745 | din2, |
| 1746 | dout); |
| 1747 | input [0:0] din0; |
| 1748 | input [0:0] din1; |
| 1749 | input [0:0] din2; |
| 1750 | output [0:0] dout; |
| 1751 | |
| 1752 | |
| 1753 | |
| 1754 | |
| 1755 | |
| 1756 | xor3 #(1) d0_0 ( |
| 1757 | .in0(din0[0:0]), |
| 1758 | .in1(din1[0:0]), |
| 1759 | .in2(din2[0:0]), |
| 1760 | .out(dout[0:0]) |
| 1761 | ); |
| 1762 | |
| 1763 | |
| 1764 | |
| 1765 | |
| 1766 | |
| 1767 | |
| 1768 | |
| 1769 | |
| 1770 | endmodule |
| 1771 | |
| 1772 | |
| 1773 | |
| 1774 | |
| 1775 | |
| 1776 | // |
| 1777 | // xor macro for ports = 2,3 |
| 1778 | // |
| 1779 | // |
| 1780 | |
| 1781 | |
| 1782 | |
| 1783 | |
| 1784 | |
| 1785 | module l2b_rdmard_dp_xor_macro__dxor_16x__ports_2__width_1 ( |
| 1786 | din0, |
| 1787 | din1, |
| 1788 | dout); |
| 1789 | input [0:0] din0; |
| 1790 | input [0:0] din1; |
| 1791 | output [0:0] dout; |
| 1792 | |
| 1793 | |
| 1794 | |
| 1795 | |
| 1796 | |
| 1797 | xor2 #(1) d0_0 ( |
| 1798 | .in0(din0[0:0]), |
| 1799 | .in1(din1[0:0]), |
| 1800 | .out(dout[0:0]) |
| 1801 | ); |
| 1802 | |
| 1803 | |
| 1804 | |
| 1805 | |
| 1806 | |
| 1807 | |
| 1808 | |
| 1809 | |
| 1810 | endmodule |
| 1811 | |
| 1812 | |
| 1813 | |
| 1814 | |
| 1815 | |
| 1816 | // |
| 1817 | // invert macro |
| 1818 | // |
| 1819 | // |
| 1820 | |
| 1821 | |
| 1822 | |
| 1823 | |
| 1824 | |
| 1825 | module l2b_rdmard_dp_inv_macro__dinv_32x__stack_1r__width_1 ( |
| 1826 | din, |
| 1827 | dout); |
| 1828 | input [0:0] din; |
| 1829 | output [0:0] dout; |
| 1830 | |
| 1831 | |
| 1832 | |
| 1833 | |
| 1834 | |
| 1835 | |
| 1836 | inv #(1) d0_0 ( |
| 1837 | .in(din[0:0]), |
| 1838 | .out(dout[0:0]) |
| 1839 | ); |
| 1840 | |
| 1841 | |
| 1842 | |
| 1843 | |
| 1844 | |
| 1845 | |
| 1846 | |
| 1847 | |
| 1848 | |
| 1849 | endmodule |
| 1850 | |
| 1851 | |
| 1852 | |
| 1853 | |
| 1854 | |
| 1855 | // |
| 1856 | // nand macro for ports = 2,3,4 |
| 1857 | // |
| 1858 | // |
| 1859 | |
| 1860 | |
| 1861 | |
| 1862 | |
| 1863 | |
| 1864 | module l2b_rdmard_dp_nand_macro__ports_3__width_1 ( |
| 1865 | din0, |
| 1866 | din1, |
| 1867 | din2, |
| 1868 | dout); |
| 1869 | input [0:0] din0; |
| 1870 | input [0:0] din1; |
| 1871 | input [0:0] din2; |
| 1872 | output [0:0] dout; |
| 1873 | |
| 1874 | |
| 1875 | |
| 1876 | |
| 1877 | |
| 1878 | |
| 1879 | nand3 #(1) d0_0 ( |
| 1880 | .in0(din0[0:0]), |
| 1881 | .in1(din1[0:0]), |
| 1882 | .in2(din2[0:0]), |
| 1883 | .out(dout[0:0]) |
| 1884 | ); |
| 1885 | |
| 1886 | |
| 1887 | |
| 1888 | |
| 1889 | |
| 1890 | |
| 1891 | |
| 1892 | |
| 1893 | |
| 1894 | endmodule |
| 1895 | |
| 1896 | |
| 1897 | |
| 1898 | |
| 1899 | |
| 1900 | // |
| 1901 | // nor macro for ports = 2,3 |
| 1902 | // |
| 1903 | // |
| 1904 | |
| 1905 | |
| 1906 | |
| 1907 | |
| 1908 | |
| 1909 | module l2b_rdmard_dp_nor_macro__ports_2__width_1 ( |
| 1910 | din0, |
| 1911 | din1, |
| 1912 | dout); |
| 1913 | input [0:0] din0; |
| 1914 | input [0:0] din1; |
| 1915 | output [0:0] dout; |
| 1916 | |
| 1917 | |
| 1918 | |
| 1919 | |
| 1920 | |
| 1921 | |
| 1922 | nor2 #(1) d0_0 ( |
| 1923 | .in0(din0[0:0]), |
| 1924 | .in1(din1[0:0]), |
| 1925 | .out(dout[0:0]) |
| 1926 | ); |
| 1927 | |
| 1928 | |
| 1929 | |
| 1930 | |
| 1931 | |
| 1932 | |
| 1933 | |
| 1934 | endmodule |
| 1935 | |
| 1936 | |
| 1937 | |
| 1938 | |
| 1939 | |
| 1940 | // |
| 1941 | // xor macro for ports = 2,3 |
| 1942 | // |
| 1943 | // |
| 1944 | |
| 1945 | |
| 1946 | |
| 1947 | |
| 1948 | |
| 1949 | module l2b_rdmard_dp_xor_macro__stack_32r__width_32 ( |
| 1950 | din0, |
| 1951 | din1, |
| 1952 | dout); |
| 1953 | input [31:0] din0; |
| 1954 | input [31:0] din1; |
| 1955 | output [31:0] dout; |
| 1956 | |
| 1957 | |
| 1958 | |
| 1959 | |
| 1960 | |
| 1961 | xor2 #(32) d0_0 ( |
| 1962 | .in0(din0[31:0]), |
| 1963 | .in1(din1[31:0]), |
| 1964 | .out(dout[31:0]) |
| 1965 | ); |
| 1966 | |
| 1967 | |
| 1968 | |
| 1969 | |
| 1970 | |
| 1971 | |
| 1972 | |
| 1973 | |
| 1974 | endmodule |
| 1975 | |
| 1976 | |
| 1977 | |
| 1978 | |
| 1979 | |
| 1980 | // |
| 1981 | // comparator macro (output is 1 if both inputs are equal; 0 otherwise) |
| 1982 | // |
| 1983 | // |
| 1984 | |
| 1985 | |
| 1986 | |
| 1987 | |
| 1988 | |
| 1989 | module l2b_rdmard_dp_cmp_macro__width_8 ( |
| 1990 | din0, |
| 1991 | din1, |
| 1992 | dout); |
| 1993 | input [7:0] din0; |
| 1994 | input [7:0] din1; |
| 1995 | output dout; |
| 1996 | |
| 1997 | |
| 1998 | |
| 1999 | |
| 2000 | |
| 2001 | |
| 2002 | cmp #(8) m0_0 ( |
| 2003 | .in0(din0[7:0]), |
| 2004 | .in1(din1[7:0]), |
| 2005 | .out(dout) |
| 2006 | ); |
| 2007 | |
| 2008 | |
| 2009 | |
| 2010 | |
| 2011 | |
| 2012 | |
| 2013 | |
| 2014 | |
| 2015 | |
| 2016 | |
| 2017 | endmodule |
| 2018 | |
| 2019 | |
| 2020 | |
| 2021 | |
| 2022 | |
| 2023 | // |
| 2024 | // nand macro for ports = 2,3,4 |
| 2025 | // |
| 2026 | // |
| 2027 | |
| 2028 | |
| 2029 | |
| 2030 | |
| 2031 | |
| 2032 | module l2b_rdmard_dp_nand_macro__stack_2c__width_1 ( |
| 2033 | din0, |
| 2034 | din1, |
| 2035 | dout); |
| 2036 | input [0:0] din0; |
| 2037 | input [0:0] din1; |
| 2038 | output [0:0] dout; |
| 2039 | |
| 2040 | |
| 2041 | |
| 2042 | |
| 2043 | |
| 2044 | |
| 2045 | nand2 #(1) d0_0 ( |
| 2046 | .in0(din0[0:0]), |
| 2047 | .in1(din1[0:0]), |
| 2048 | .out(dout[0:0]) |
| 2049 | ); |
| 2050 | |
| 2051 | |
| 2052 | |
| 2053 | |
| 2054 | |
| 2055 | |
| 2056 | |
| 2057 | |
| 2058 | |
| 2059 | endmodule |
| 2060 | |
| 2061 | |
| 2062 | |
| 2063 | |
| 2064 | |
| 2065 | // |
| 2066 | // invert macro |
| 2067 | // |
| 2068 | // |
| 2069 | |
| 2070 | |
| 2071 | |
| 2072 | |
| 2073 | |
| 2074 | module l2b_rdmard_dp_inv_macro__width_1 ( |
| 2075 | din, |
| 2076 | dout); |
| 2077 | input [0:0] din; |
| 2078 | output [0:0] dout; |
| 2079 | |
| 2080 | |
| 2081 | |
| 2082 | |
| 2083 | |
| 2084 | |
| 2085 | inv #(1) d0_0 ( |
| 2086 | .in(din[0:0]), |
| 2087 | .out(dout[0:0]) |
| 2088 | ); |
| 2089 | |
| 2090 | |
| 2091 | |
| 2092 | |
| 2093 | |
| 2094 | |
| 2095 | |
| 2096 | |
| 2097 | |
| 2098 | endmodule |
| 2099 | |
| 2100 | |
| 2101 | |
| 2102 | |
| 2103 | |
| 2104 | // |
| 2105 | // and macro for ports = 2,3,4 |
| 2106 | // |
| 2107 | // |
| 2108 | |
| 2109 | |
| 2110 | |
| 2111 | |
| 2112 | |
| 2113 | module l2b_rdmard_dp_and_macro__ports_3__width_1 ( |
| 2114 | din0, |
| 2115 | din1, |
| 2116 | din2, |
| 2117 | dout); |
| 2118 | input [0:0] din0; |
| 2119 | input [0:0] din1; |
| 2120 | input [0:0] din2; |
| 2121 | output [0:0] dout; |
| 2122 | |
| 2123 | |
| 2124 | |
| 2125 | |
| 2126 | |
| 2127 | |
| 2128 | and3 #(1) d0_0 ( |
| 2129 | .in0(din0[0:0]), |
| 2130 | .in1(din1[0:0]), |
| 2131 | .in2(din2[0:0]), |
| 2132 | .out(dout[0:0]) |
| 2133 | ); |
| 2134 | |
| 2135 | |
| 2136 | |
| 2137 | |
| 2138 | |
| 2139 | |
| 2140 | |
| 2141 | |
| 2142 | |
| 2143 | endmodule |
| 2144 | |
| 2145 | |
| 2146 | |
| 2147 | |
| 2148 | |
| 2149 | // general mux macro for pass-gate and and-or muxes with/wout priority encoders |
| 2150 | // also for pass-gate with decoder |
| 2151 | |
| 2152 | |
| 2153 | |
| 2154 | |
| 2155 | |
| 2156 | // any PARAMS parms go into naming of macro |
| 2157 | |
| 2158 | module l2b_rdmard_dp_mux_macro__mux_aonpe__ports_2__stack_40r__width_32 ( |
| 2159 | din0, |
| 2160 | sel0, |
| 2161 | din1, |
| 2162 | sel1, |
| 2163 | dout); |
| 2164 | wire buffout0; |
| 2165 | wire buffout1; |
| 2166 | |
| 2167 | input [31:0] din0; |
| 2168 | input sel0; |
| 2169 | input [31:0] din1; |
| 2170 | input sel1; |
| 2171 | output [31:0] dout; |
| 2172 | |
| 2173 | |
| 2174 | |
| 2175 | |
| 2176 | |
| 2177 | cl_dp1_muxbuff2_8x c0_0 ( |
| 2178 | .in0(sel0), |
| 2179 | .in1(sel1), |
| 2180 | .out0(buffout0), |
| 2181 | .out1(buffout1) |
| 2182 | ); |
| 2183 | mux2s #(32) d0_0 ( |
| 2184 | .sel0(buffout0), |
| 2185 | .sel1(buffout1), |
| 2186 | .in0(din0[31:0]), |
| 2187 | .in1(din1[31:0]), |
| 2188 | .dout(dout[31:0]) |
| 2189 | ); |
| 2190 | |
| 2191 | |
| 2192 | |
| 2193 | |
| 2194 | |
| 2195 | |
| 2196 | |
| 2197 | |
| 2198 | |
| 2199 | |
| 2200 | |
| 2201 | |
| 2202 | |
| 2203 | endmodule |
| 2204 | |
| 2205 | |
| 2206 | // |
| 2207 | // parity macro (even parity) |
| 2208 | // |
| 2209 | // |
| 2210 | |
| 2211 | |
| 2212 | |
| 2213 | |
| 2214 | |
| 2215 | module l2b_rdmard_dp_prty_macro__width_16 ( |
| 2216 | din, |
| 2217 | dout); |
| 2218 | input [15:0] din; |
| 2219 | output dout; |
| 2220 | |
| 2221 | |
| 2222 | |
| 2223 | |
| 2224 | |
| 2225 | |
| 2226 | |
| 2227 | prty #(16) m0_0 ( |
| 2228 | .in(din[15:0]), |
| 2229 | .out(dout) |
| 2230 | ); |
| 2231 | |
| 2232 | |
| 2233 | |
| 2234 | |
| 2235 | |
| 2236 | |
| 2237 | |
| 2238 | |
| 2239 | |
| 2240 | |
| 2241 | endmodule |
| 2242 | |
| 2243 | |
| 2244 | |
| 2245 | |
| 2246 | |
| 2247 | |
| 2248 | |
| 2249 | |
| 2250 | |
| 2251 | // any PARAMS parms go into naming of macro |
| 2252 | |
| 2253 | module l2b_rdmard_dp_msff_macro__stack_39r__width_39 ( |
| 2254 | din, |
| 2255 | clk, |
| 2256 | en, |
| 2257 | se, |
| 2258 | scan_in, |
| 2259 | siclk, |
| 2260 | soclk, |
| 2261 | pce_ov, |
| 2262 | stop, |
| 2263 | dout, |
| 2264 | scan_out); |
| 2265 | wire l1clk; |
| 2266 | wire siclk_out; |
| 2267 | wire soclk_out; |
| 2268 | wire [37:0] so; |
| 2269 | |
| 2270 | input [38:0] din; |
| 2271 | |
| 2272 | |
| 2273 | input clk; |
| 2274 | input en; |
| 2275 | input se; |
| 2276 | input scan_in; |
| 2277 | input siclk; |
| 2278 | input soclk; |
| 2279 | input pce_ov; |
| 2280 | input stop; |
| 2281 | |
| 2282 | |
| 2283 | |
| 2284 | output [38:0] dout; |
| 2285 | |
| 2286 | |
| 2287 | output scan_out; |
| 2288 | |
| 2289 | |
| 2290 | |
| 2291 | |
| 2292 | cl_dp1_l1hdr_8x c0_0 ( |
| 2293 | .l2clk(clk), |
| 2294 | .pce(en), |
| 2295 | .aclk(siclk), |
| 2296 | .bclk(soclk), |
| 2297 | .l1clk(l1clk), |
| 2298 | .se(se), |
| 2299 | .pce_ov(pce_ov), |
| 2300 | .stop(stop), |
| 2301 | .siclk_out(siclk_out), |
| 2302 | .soclk_out(soclk_out) |
| 2303 | ); |
| 2304 | dff #(39) d0_0 ( |
| 2305 | .l1clk(l1clk), |
| 2306 | .siclk(siclk_out), |
| 2307 | .soclk(soclk_out), |
| 2308 | .d(din[38:0]), |
| 2309 | .si({scan_in,so[37:0]}), |
| 2310 | .so({so[37:0],scan_out}), |
| 2311 | .q(dout[38:0]) |
| 2312 | ); |
| 2313 | |
| 2314 | |
| 2315 | |
| 2316 | |
| 2317 | |
| 2318 | |
| 2319 | |
| 2320 | |
| 2321 | |
| 2322 | |
| 2323 | |
| 2324 | |
| 2325 | |
| 2326 | |
| 2327 | |
| 2328 | |
| 2329 | |
| 2330 | |
| 2331 | |
| 2332 | |
| 2333 | endmodule |
| 2334 | |
| 2335 | |
| 2336 | |
| 2337 | |
| 2338 | |
| 2339 | |
| 2340 | |
| 2341 | |
| 2342 | |
| 2343 | // |
| 2344 | // or macro for ports = 2,3 |
| 2345 | // |
| 2346 | // |
| 2347 | |
| 2348 | |
| 2349 | |
| 2350 | |
| 2351 | |
| 2352 | module l2b_rdmard_dp_or_macro__width_1 ( |
| 2353 | din0, |
| 2354 | din1, |
| 2355 | dout); |
| 2356 | input [0:0] din0; |
| 2357 | input [0:0] din1; |
| 2358 | output [0:0] dout; |
| 2359 | |
| 2360 | |
| 2361 | |
| 2362 | |
| 2363 | |
| 2364 | |
| 2365 | or2 #(1) d0_0 ( |
| 2366 | .in0(din0[0:0]), |
| 2367 | .in1(din1[0:0]), |
| 2368 | .out(dout[0:0]) |
| 2369 | ); |
| 2370 | |
| 2371 | |
| 2372 | |
| 2373 | |
| 2374 | |
| 2375 | |
| 2376 | |
| 2377 | |
| 2378 | |
| 2379 | endmodule |
| 2380 | |
| 2381 | |
| 2382 | |
| 2383 | |
| 2384 | |
| 2385 | |
| 2386 | |
| 2387 | |
| 2388 | |
| 2389 | // any PARAMS parms go into naming of macro |
| 2390 | |
| 2391 | module l2b_rdmard_dp_msff_macro__dmsff_32x__stack_36r__width_36 ( |
| 2392 | din, |
| 2393 | clk, |
| 2394 | en, |
| 2395 | se, |
| 2396 | scan_in, |
| 2397 | siclk, |
| 2398 | soclk, |
| 2399 | pce_ov, |
| 2400 | stop, |
| 2401 | dout, |
| 2402 | scan_out); |
| 2403 | wire l1clk; |
| 2404 | wire siclk_out; |
| 2405 | wire soclk_out; |
| 2406 | wire [34:0] so; |
| 2407 | |
| 2408 | input [35:0] din; |
| 2409 | |
| 2410 | |
| 2411 | input clk; |
| 2412 | input en; |
| 2413 | input se; |
| 2414 | input scan_in; |
| 2415 | input siclk; |
| 2416 | input soclk; |
| 2417 | input pce_ov; |
| 2418 | input stop; |
| 2419 | |
| 2420 | |
| 2421 | |
| 2422 | output [35:0] dout; |
| 2423 | |
| 2424 | |
| 2425 | output scan_out; |
| 2426 | |
| 2427 | |
| 2428 | |
| 2429 | |
| 2430 | cl_dp1_l1hdr_8x c0_0 ( |
| 2431 | .l2clk(clk), |
| 2432 | .pce(en), |
| 2433 | .aclk(siclk), |
| 2434 | .bclk(soclk), |
| 2435 | .l1clk(l1clk), |
| 2436 | .se(se), |
| 2437 | .pce_ov(pce_ov), |
| 2438 | .stop(stop), |
| 2439 | .siclk_out(siclk_out), |
| 2440 | .soclk_out(soclk_out) |
| 2441 | ); |
| 2442 | dff #(36) d0_0 ( |
| 2443 | .l1clk(l1clk), |
| 2444 | .siclk(siclk_out), |
| 2445 | .soclk(soclk_out), |
| 2446 | .d(din[35:0]), |
| 2447 | .si({scan_in,so[34:0]}), |
| 2448 | .so({so[34:0],scan_out}), |
| 2449 | .q(dout[35:0]) |
| 2450 | ); |
| 2451 | |
| 2452 | |
| 2453 | |
| 2454 | |
| 2455 | |
| 2456 | |
| 2457 | |
| 2458 | |
| 2459 | |
| 2460 | |
| 2461 | |
| 2462 | |
| 2463 | |
| 2464 | |
| 2465 | |
| 2466 | |
| 2467 | |
| 2468 | |
| 2469 | |
| 2470 | |
| 2471 | endmodule |
| 2472 | |
| 2473 | |
| 2474 | |
| 2475 | |
| 2476 | |
| 2477 | |
| 2478 | |
| 2479 | |