| 1 | // ========== Copyright Header Begin ========================================== |
| 2 | // |
| 3 | // OpenSPARC T2 Processor File: l2t_ecc30b_dp.v |
| 4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved |
| 5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. |
| 6 | // |
| 7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 8 | // |
| 9 | // This program is free software; you can redistribute it and/or modify |
| 10 | // it under the terms of the GNU General Public License as published by |
| 11 | // the Free Software Foundation; version 2 of the License. |
| 12 | // |
| 13 | // This program is distributed in the hope that it will be useful, |
| 14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | // GNU General Public License for more details. |
| 17 | // |
| 18 | // You should have received a copy of the GNU General Public License |
| 19 | // along with this program; if not, write to the Free Software |
| 20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 21 | // |
| 22 | // For the avoidance of doubt, and except that if any non-GPL license |
| 23 | // choice is available it will apply instead, Sun elects to use only |
| 24 | // the General Public License version 2 (GPLv2) at this time for any |
| 25 | // software where a choice of GPL license versions is made |
| 26 | // available with the language indicating that GPLv2 or any later version |
| 27 | // may be used, or where a choice of which version of the GPL is applied is |
| 28 | // otherwise unspecified. |
| 29 | // |
| 30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
| 31 | // CA 95054 USA or visit www.sun.com if you need additional information or |
| 32 | // have any questions. |
| 33 | // |
| 34 | // ========== Copyright Header End ============================================ |
| 35 | module l2t_ecc30b_dp ( |
| 36 | din, |
| 37 | parity, |
| 38 | dout, |
| 39 | corrected_bit); |
| 40 | wire p1_10; |
| 41 | wire p1_11; |
| 42 | wire p1_12; |
| 43 | wire p1_13; |
| 44 | wire p1_14; |
| 45 | wire p1_20; |
| 46 | wire p2_10; |
| 47 | wire p2_11; |
| 48 | wire p2_12; |
| 49 | wire p2_13; |
| 50 | wire p2_20; |
| 51 | wire p2_21; |
| 52 | wire p4_10; |
| 53 | wire p4_11; |
| 54 | wire p4_12; |
| 55 | wire p4_13; |
| 56 | wire p4_20; |
| 57 | wire p4_21; |
| 58 | wire p8_10; |
| 59 | wire p8_11; |
| 60 | wire p8_12; |
| 61 | wire p8_13; |
| 62 | wire p8_20; |
| 63 | wire p8_21; |
| 64 | wire p16_10; |
| 65 | wire p16_11; |
| 66 | wire p16_12; |
| 67 | wire p16_13; |
| 68 | wire p16_20; |
| 69 | wire p16_21; |
| 70 | wire np1; |
| 71 | wire np2; |
| 72 | wire np4; |
| 73 | wire np8; |
| 74 | wire np16; |
| 75 | wire error_bit0_10a; |
| 76 | wire error_bit0_10b; |
| 77 | wire error_bit0_10c; |
| 78 | wire error_bit0_a; |
| 79 | wire error_bit1_10a; |
| 80 | wire error_bit1_10b; |
| 81 | wire error_bit1_10c; |
| 82 | wire error_bit1_a; |
| 83 | wire error_bit2_10a; |
| 84 | wire error_bit2_10b; |
| 85 | wire error_bit2_10c; |
| 86 | wire error_bit2_a; |
| 87 | wire error_bit3_10a; |
| 88 | wire error_bit3_10b; |
| 89 | wire error_bit3_a; |
| 90 | wire error_bit4_10a; |
| 91 | wire error_bit4_10b; |
| 92 | wire error_bit4_a; |
| 93 | wire error_bit5_10a; |
| 94 | wire error_bit5_10b; |
| 95 | wire error_bit5_a; |
| 96 | wire error_bit6_10a; |
| 97 | wire error_bit6_10b; |
| 98 | wire error_bit6_a; |
| 99 | wire error_bit7_10a; |
| 100 | wire error_bit7_10b; |
| 101 | wire error_bit7_a; |
| 102 | wire error_bit8_10a; |
| 103 | wire error_bit8_10b; |
| 104 | wire error_bit8_a; |
| 105 | wire error_bit9_10a; |
| 106 | wire error_bit9_10b; |
| 107 | wire error_bit9_a; |
| 108 | wire error_bit10_10a; |
| 109 | wire error_bit10_10b; |
| 110 | wire error_bit10_a; |
| 111 | wire error_bit11_10a; |
| 112 | wire error_bit11_10b; |
| 113 | wire error_bit11_a; |
| 114 | wire error_bit12_10a; |
| 115 | wire error_bit12_10b; |
| 116 | wire error_bit12_a; |
| 117 | wire error_bit13_10a; |
| 118 | wire error_bit13_10b; |
| 119 | wire error_bit13_a; |
| 120 | wire error_bit14_10a; |
| 121 | wire error_bit14_10b; |
| 122 | wire error_bit14_a; |
| 123 | wire error_bit15_10a; |
| 124 | wire error_bit15_10b; |
| 125 | wire error_bit15_a; |
| 126 | wire error_bit16_10a; |
| 127 | wire error_bit16_10b; |
| 128 | wire error_bit16_a; |
| 129 | wire error_bit17_10a; |
| 130 | wire error_bit17_10b; |
| 131 | wire error_bit17_a; |
| 132 | wire error_bit18_10a; |
| 133 | wire error_bit18_10b; |
| 134 | wire error_bit18_a; |
| 135 | wire error_bit19_10a; |
| 136 | wire error_bit19_10b; |
| 137 | wire error_bit19_a; |
| 138 | wire error_bit20_10a; |
| 139 | wire error_bit20_10b; |
| 140 | wire error_bit20_a; |
| 141 | wire error_bit21_10a; |
| 142 | wire error_bit21_10b; |
| 143 | wire error_bit21_a; |
| 144 | wire error_bit22_10a; |
| 145 | wire error_bit22_10b; |
| 146 | wire error_bit22_a; |
| 147 | wire error_bit23_10a; |
| 148 | wire error_bit23_10b; |
| 149 | wire error_bit23_a; |
| 150 | |
| 151 | |
| 152 | // Input Ports |
| 153 | input [23:0] din ; |
| 154 | input [4:0] parity ; |
| 155 | |
| 156 | // Output Ports |
| 157 | output [23:0] dout ; |
| 158 | output [4:0] corrected_bit ; |
| 159 | |
| 160 | wire [23:0] dout ; |
| 161 | wire [4:0] corrected_bit ; |
| 162 | |
| 163 | // Local Reg and Wires |
| 164 | wire p1 ; |
| 165 | wire p2 ; |
| 166 | wire p4 ; |
| 167 | wire p8 ; |
| 168 | wire p16 ; |
| 169 | wire [23:0] error_bit ; |
| 170 | |
| 171 | |
| 172 | //----|--|--|--|--|--|--|--|--|--|--|--|--|--|--|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---| |
| 173 | // |1 |2 |3 |4 |5 |6 |7 |8 |9 |10|11|12|13|14|15 |16 |17 |18 |19 |20 |21 |22 |23 |24 |25 |26 |27 |28 |29 |30 | |
| 174 | // |P1|P2|D0|P4|D1|D2|D3|P8|D4|D5|D6|D7|D8|D9|D10|P16|D11|D12|D13|D14|D15|D16|D17|D18|D19|D20|D21|D22|D23|P30| |
| 175 | //----|--|--|--|--|--|--|--|--|--|--|--|--|--|--|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---| |
| 176 | //P1 |* | |* | |* | |* | |* | |* | |* | | * | | * | | * | | * | | * | | * | | * | | * | | |
| 177 | //P2 | |* |* | | |* |* | | |* |* | | |* | * | | | * | * | | | * | * | | | * | * | | | | |
| 178 | //P4 | | | |* |* |* |* | | | | |* |* |* | * | | | | | * | * | * | * | | | | | * | * | | |
| 179 | //P8 | | | | | | | |* |* |* |* |* |* |* | * | | | | | | | | | * | * | * | * | * | * | | |
| 180 | //P16 | | | | | | | | | | | | | | | | * | * | * | * | * | * | * | * | * | * | * | * | * | * | | |
| 181 | //----|--|--|--|--|--|--|--|--|--|--|--|--|--|--|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---| |
| 182 | //p30 |* |* |* |* |* |* |* |* |* |* |* |* |* |* | * | * | * | * | * | * | * | * | * | * | * | * | * | * | * | * | |
| 183 | //----|--|--|--|--|--|--|--|--|--|--|--|--|--|--|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---| |
| 184 | |
| 185 | |
| 186 | //assign p1 = parity[0] ^ |
| 187 | // din[0] ^ din[1] ^ din[3] ^ din[4] ^ din[6] ^ din[8] ^ |
| 188 | // din[10] ^ din[11] ^ din[13] ^ din[15] ^ din[17] ^ din[19] ^ |
| 189 | // din[21] ^ din[23] ; |
| 190 | |
| 191 | l2t_ecc30b_dp_xor_macro__dxor_8x__ports_3__width_1 p1_slice_10 ( |
| 192 | .dout (p1_10), |
| 193 | .din0 (din[0]), |
| 194 | .din1 (din[1]), |
| 195 | .din2 (din[3]) |
| 196 | ); |
| 197 | l2t_ecc30b_dp_xor_macro__dxor_8x__ports_3__width_1 p1_slice_11 ( |
| 198 | .dout (p1_11), |
| 199 | .din0 (din[4]), |
| 200 | .din1 (din[6]), |
| 201 | .din2 (din[8]) |
| 202 | ); |
| 203 | l2t_ecc30b_dp_xor_macro__dxor_8x__ports_3__width_1 p1_slice_12 ( |
| 204 | .dout (p1_12), |
| 205 | .din0 (din[10]), |
| 206 | .din1 (din[11]), |
| 207 | .din2 (din[13]) |
| 208 | ); |
| 209 | l2t_ecc30b_dp_xor_macro__dxor_8x__ports_3__width_1 p1_slice_13 ( |
| 210 | .dout (p1_13), |
| 211 | .din0 (din[15]), |
| 212 | .din1 (din[17]), |
| 213 | .din2 (din[19]) |
| 214 | ); |
| 215 | l2t_ecc30b_dp_xor_macro__dxor_8x__ports_3__width_1 p1_slice_14 ( |
| 216 | .dout (p1_14), |
| 217 | .din0 (din[21]), |
| 218 | .din1 (din[23]), |
| 219 | .din2 (parity[0]) |
| 220 | ); |
| 221 | l2t_ecc30b_dp_xor_macro__dxor_8x__ports_3__width_1 p1_slice_20 ( |
| 222 | .dout (p1_20), |
| 223 | .din0 (p1_10), |
| 224 | .din1 (p1_11), |
| 225 | .din2 (p1_12) |
| 226 | ); |
| 227 | l2t_ecc30b_dp_xor_macro__dxor_8x__ports_3__width_1 p1_slice ( |
| 228 | .dout (p1), |
| 229 | .din0 (p1_13), |
| 230 | .din1 (p1_14), |
| 231 | .din2 (p1_20) |
| 232 | ); |
| 233 | |
| 234 | //assign p2 = parity[1] ^ |
| 235 | // din[0] ^ din[2] ^ din[3] ^ din[5] ^ din[6] ^ din[9] ^ |
| 236 | // din[10] ^ din[12] ^ din[13] ^ din[16] ^ din[17] ^ din[20] ^ |
| 237 | // din[21] ; |
| 238 | |
| 239 | l2t_ecc30b_dp_xor_macro__dxor_8x__ports_3__width_1 p2_slice_10 ( |
| 240 | .dout (p2_10), |
| 241 | .din0 (din[0]), |
| 242 | .din1 (din[2]), |
| 243 | .din2 (din[3]) |
| 244 | ); |
| 245 | l2t_ecc30b_dp_xor_macro__dxor_8x__ports_3__width_1 p2_slice_11 ( |
| 246 | .dout (p2_11), |
| 247 | .din0 (din[5]), |
| 248 | .din1 (din[6]), |
| 249 | .din2 (din[9]) |
| 250 | ); |
| 251 | l2t_ecc30b_dp_xor_macro__dxor_8x__ports_3__width_1 p2_slice_12 ( |
| 252 | .dout (p2_12), |
| 253 | .din0 (din[10]), |
| 254 | .din1 (din[12]), |
| 255 | .din2 (din[13]) |
| 256 | ); |
| 257 | l2t_ecc30b_dp_xor_macro__dxor_8x__ports_3__width_1 p2_slice_13 ( |
| 258 | .dout (p2_13), |
| 259 | .din0 (din[16]), |
| 260 | .din1 (din[17]), |
| 261 | .din2 (din[20]) |
| 262 | ); |
| 263 | l2t_ecc30b_dp_xor_macro__dxor_8x__ports_3__width_1 p2_slice_20 ( |
| 264 | .dout (p2_20), |
| 265 | .din0 (p2_10), |
| 266 | .din1 (p2_11), |
| 267 | .din2 (p2_12) |
| 268 | ); |
| 269 | l2t_ecc30b_dp_xor_macro__dxor_8x__ports_3__width_1 p2_slice_21 ( |
| 270 | .dout (p2_21), |
| 271 | .din0 (p2_13), |
| 272 | .din1 (din[21]), |
| 273 | .din2 (parity[1]) |
| 274 | ); |
| 275 | |
| 276 | l2t_ecc30b_dp_xor_macro__dxor_8x__ports_2__width_1 p2_slice ( |
| 277 | .dout (p2), |
| 278 | .din0 (p2_21), |
| 279 | .din1 (p2_20) |
| 280 | ); |
| 281 | |
| 282 | |
| 283 | |
| 284 | //assign p4 = parity[2] ^ |
| 285 | // din[1] ^ din[2] ^ din[3] ^ din[7] ^ din[8] ^ din[9] ^ |
| 286 | // din[10] ^ din[14] ^ din[15] ^ din[16] ^ din[17] ^ din[22] ^ |
| 287 | // din[23] ; |
| 288 | |
| 289 | l2t_ecc30b_dp_xor_macro__dxor_8x__ports_3__width_1 p4_slice_10 ( |
| 290 | .dout (p4_10), |
| 291 | .din0 (din[1]), |
| 292 | .din1 (din[2]), |
| 293 | .din2 (din[3]) |
| 294 | ); |
| 295 | l2t_ecc30b_dp_xor_macro__dxor_8x__ports_3__width_1 p4_slice_11 ( |
| 296 | .dout (p4_11), |
| 297 | .din0 (din[7]), |
| 298 | .din1 (din[8]), |
| 299 | .din2 (din[9]) |
| 300 | ); |
| 301 | l2t_ecc30b_dp_xor_macro__dxor_8x__ports_3__width_1 p4_slice_12 ( |
| 302 | .dout (p4_12), |
| 303 | .din0 (din[10]), |
| 304 | .din1 (din[14]), |
| 305 | .din2 (din[15]) |
| 306 | ); |
| 307 | l2t_ecc30b_dp_xor_macro__dxor_8x__ports_3__width_1 p4_slice_13 ( |
| 308 | .dout (p4_13), |
| 309 | .din0 (din[16]), |
| 310 | .din1 (din[17]), |
| 311 | .din2 (din[22]) |
| 312 | ); |
| 313 | l2t_ecc30b_dp_xor_macro__dxor_8x__ports_3__width_1 p4_slice_20 ( |
| 314 | .dout (p4_20), |
| 315 | .din0 (p4_10), |
| 316 | .din1 (p4_11), |
| 317 | .din2 (p4_12) |
| 318 | ); |
| 319 | l2t_ecc30b_dp_xor_macro__dxor_8x__ports_3__width_1 p4_slice_21 ( |
| 320 | .dout (p4_21), |
| 321 | .din0 (p4_13), |
| 322 | .din1 (din[23]), |
| 323 | .din2 (parity[2]) |
| 324 | ); |
| 325 | |
| 326 | l2t_ecc30b_dp_xor_macro__dxor_8x__ports_2__width_1 p4_slice ( |
| 327 | .dout (p4), |
| 328 | .din0 (p4_20), |
| 329 | .din1 (p4_21) |
| 330 | ); |
| 331 | |
| 332 | |
| 333 | |
| 334 | //assign p8 = parity[3] ^ |
| 335 | // din[4] ^ din[5] ^ din[6] ^ din[7] ^ din[8] ^ din[9] ^ |
| 336 | // din[10] ^ din[18] ^ din[19] ^ din[20] ^ din[21] ^ din[22] ^ |
| 337 | // din[23] ; |
| 338 | |
| 339 | |
| 340 | |
| 341 | l2t_ecc30b_dp_xor_macro__dxor_8x__ports_3__width_1 p8_slice_10 ( |
| 342 | .dout (p8_10), |
| 343 | .din0 (din[4]), |
| 344 | .din1 (din[5]), |
| 345 | .din2 (din[6]) |
| 346 | ); |
| 347 | l2t_ecc30b_dp_xor_macro__dxor_8x__ports_3__width_1 p8_slice_11 ( |
| 348 | .dout (p8_11), |
| 349 | .din0 (din[7]), |
| 350 | .din1 (din[8]), |
| 351 | .din2 (din[9]) |
| 352 | ); |
| 353 | l2t_ecc30b_dp_xor_macro__dxor_8x__ports_3__width_1 p8_slice_12 ( |
| 354 | .dout (p8_12), |
| 355 | .din0 (din[10]), |
| 356 | .din1 (din[18]), |
| 357 | .din2 (din[19]) |
| 358 | ); |
| 359 | l2t_ecc30b_dp_xor_macro__dxor_8x__ports_3__width_1 p8_slice_13 ( |
| 360 | .dout (p8_13), |
| 361 | .din0 (din[20]), |
| 362 | .din1 (din[21]), |
| 363 | .din2 (din[22]) |
| 364 | ); |
| 365 | l2t_ecc30b_dp_xor_macro__dxor_8x__ports_3__width_1 p8_slice_20 ( |
| 366 | .dout (p8_20), |
| 367 | .din0 (p8_10), |
| 368 | .din1 (p8_11), |
| 369 | .din2 (p8_12) |
| 370 | ); |
| 371 | l2t_ecc30b_dp_xor_macro__dxor_8x__ports_3__width_1 p8_slice_21 ( |
| 372 | .dout (p8_21), |
| 373 | .din0 (p8_13), |
| 374 | .din1 (din[23]), |
| 375 | .din2 (parity[3]) |
| 376 | ); |
| 377 | |
| 378 | l2t_ecc30b_dp_xor_macro__dxor_8x__ports_2__width_1 p8_slice ( |
| 379 | .dout (p8), |
| 380 | .din0 (p8_21), |
| 381 | .din1 (p8_20) |
| 382 | ); |
| 383 | |
| 384 | |
| 385 | |
| 386 | //assign p16 = parity[4] ^ |
| 387 | // din[11] ^ din[12] ^ din[13] ^ din[14] ^ din[15] ^ din[16] ^ |
| 388 | // din[17] ^ din[18] ^ din[19] ^ din[20] ^ din[21] ^ din[22] ^ |
| 389 | // din[23] ; |
| 390 | |
| 391 | |
| 392 | |
| 393 | |
| 394 | l2t_ecc30b_dp_xor_macro__dxor_8x__ports_3__width_1 p16_slice_10 ( |
| 395 | .dout (p16_10), |
| 396 | .din0 (din[11]), |
| 397 | .din1 (din[12]), |
| 398 | .din2 (din[13]) |
| 399 | ); |
| 400 | l2t_ecc30b_dp_xor_macro__dxor_8x__ports_3__width_1 p16_slice_11 ( |
| 401 | .dout (p16_11), |
| 402 | .din0 (din[14]), |
| 403 | .din1 (din[15]), |
| 404 | .din2 (din[16]) |
| 405 | ); |
| 406 | l2t_ecc30b_dp_xor_macro__dxor_8x__ports_3__width_1 p16_slice_12 ( |
| 407 | .dout (p16_12), |
| 408 | .din0 (din[17]), |
| 409 | .din1 (din[18]), |
| 410 | .din2 (din[19]) |
| 411 | ); |
| 412 | l2t_ecc30b_dp_xor_macro__dxor_8x__ports_3__width_1 p16_slice_13 ( |
| 413 | .dout (p16_13), |
| 414 | .din0 (din[20]), |
| 415 | .din1 (din[21]), |
| 416 | .din2 (din[22]) |
| 417 | ); |
| 418 | l2t_ecc30b_dp_xor_macro__dxor_8x__ports_3__width_1 p16_slice_20 ( |
| 419 | .dout (p16_20), |
| 420 | .din0 (p16_10), |
| 421 | .din1 (p16_11), |
| 422 | .din2 (p16_12) |
| 423 | ); |
| 424 | l2t_ecc30b_dp_xor_macro__dxor_8x__ports_3__width_1 p16_slice_21 ( |
| 425 | .dout (p16_21), |
| 426 | .din0 (p16_13), |
| 427 | .din1 (din[23]), |
| 428 | .din2 (parity[4]) |
| 429 | ); |
| 430 | |
| 431 | l2t_ecc30b_dp_xor_macro__dxor_8x__ports_2__width_1 p16_slice ( |
| 432 | .dout (p16), |
| 433 | .din0 (p16_21), |
| 434 | .din1 (p16_20) |
| 435 | ); |
| 436 | |
| 437 | |
| 438 | |
| 439 | |
| 440 | //assign error_bit[0] = !p16 & !p8 & !p4 & p2 & p1 ; // 3 |
| 441 | //assign error_bit[1] = !p16 & !p8 & p4 & !p2 & p1 ; // 5 |
| 442 | //assign error_bit[2] = !p16 & !p8 & p4 & p2 & !p1 ; // 6 |
| 443 | //assign error_bit[3] = !p16 & !p8 & p4 & p2 & p1 ; // 7 |
| 444 | //assign error_bit[4] = !p16 & p8 & !p4 & !p2 & p1 ; // 9 |
| 445 | //assign error_bit[5] = !p16 & p8 & !p4 & p2 & !p1 ; // 10 |
| 446 | //assign error_bit[6] = !p16 & p8 & !p4 & p2 & p1 ; // 11 |
| 447 | //assign error_bit[7] = !p16 & p8 & p4 & !p2 & !p1 ; // 12 |
| 448 | //assign error_bit[8] = !p16 & p8 & p4 & !p2 & p1 ; // 13 |
| 449 | //assign error_bit[9] = !p16 & p8 & p4 & p2 & !p1 ; // 14 |
| 450 | //assign error_bit[10] = !p16 & p8 & p4 & p2 & p1 ; // 15 |
| 451 | //assign error_bit[11] = p16 & !p8 & !p4 & !p2 & p1 ; // 17 |
| 452 | //assign error_bit[12] = p16 & !p8 & !p4 & p2 & !p1 ; // 18 |
| 453 | //assign error_bit[13] = p16 & !p8 & !p4 & p2 & p1 ; // 19 |
| 454 | //assign error_bit[14] = p16 & !p8 & p4 & !p2 & !p1 ; // 20 |
| 455 | //assign error_bit[15] = p16 & !p8 & p4 & !p2 & p1 ; // 21 |
| 456 | //assign error_bit[16] = p16 & !p8 & p4 & p2 & !p1 ; // 22 |
| 457 | //assign error_bit[17] = p16 & !p8 & p4 & p2 & p1 ; // 23 |
| 458 | //assign error_bit[18] = p16 & p8 & !p4 & !p2 & !p1 ; // 24 |
| 459 | //assign error_bit[19] = p16 & p8 & !p4 & !p2 & p1 ; // 25 |
| 460 | //assign error_bit[20] = p16 & p8 & !p4 & p2 & !p1 ; // 26 |
| 461 | //assign error_bit[21] = p16 & p8 & !p4 & p2 & p1 ; // 27 |
| 462 | //assign error_bit[22] = p16 & p8 & p4 & !p2 & !p1 ; // 28 |
| 463 | //assign error_bit[23] = p16 & p8 & p4 & !p2 & p1 ; // 29 |
| 464 | |
| 465 | |
| 466 | l2t_ecc30b_dp_inv_macro__stack_1r__width_1 p1_inv_slice |
| 467 | ( |
| 468 | .din (p1), |
| 469 | .dout (np1) |
| 470 | ); |
| 471 | |
| 472 | l2t_ecc30b_dp_inv_macro__stack_1r__width_1 c2_inv_slice |
| 473 | ( |
| 474 | .din (p2), |
| 475 | .dout (np2) |
| 476 | ); |
| 477 | |
| 478 | l2t_ecc30b_dp_inv_macro__stack_1r__width_1 p3_inv_slice |
| 479 | ( |
| 480 | .din (p4), |
| 481 | .dout (np4) |
| 482 | ); |
| 483 | |
| 484 | l2t_ecc30b_dp_inv_macro__stack_1r__width_1 p4_inv_slice |
| 485 | ( |
| 486 | .din (p8), |
| 487 | .dout (np8) |
| 488 | ); |
| 489 | |
| 490 | l2t_ecc30b_dp_inv_macro__stack_1r__width_1 p5_inv_slice |
| 491 | ( |
| 492 | .din (p16), |
| 493 | .dout (np16) |
| 494 | ); |
| 495 | |
| 496 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit0_slice_10a ( |
| 497 | .dout (error_bit0_10a), |
| 498 | .din0 (np16), |
| 499 | .din1 (np8) |
| 500 | ); |
| 501 | |
| 502 | |
| 503 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit0_slice_10b ( |
| 504 | .dout (error_bit0_10b), |
| 505 | .din0 (np4), |
| 506 | .din1 (p2) |
| 507 | ); |
| 508 | |
| 509 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit0_slice_10c ( |
| 510 | .dout (error_bit0_10c), |
| 511 | .din0 (p1), |
| 512 | .din1 (p2) |
| 513 | ); |
| 514 | |
| 515 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit0_slice_11a ( |
| 516 | .dout (error_bit0_a), |
| 517 | .din0 (error_bit0_10a), |
| 518 | .din1 (error_bit0_10b) |
| 519 | ); |
| 520 | |
| 521 | |
| 522 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit0_slice_11b ( |
| 523 | .dout (error_bit[0]), |
| 524 | .din0 (error_bit0_10c), |
| 525 | .din1 (error_bit0_a) |
| 526 | ); |
| 527 | |
| 528 | |
| 529 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit1_slice_10a ( |
| 530 | .dout (error_bit1_10a), |
| 531 | .din0 (np16), |
| 532 | .din1 (np8) |
| 533 | ); |
| 534 | |
| 535 | |
| 536 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit1_slice_10b ( |
| 537 | .dout (error_bit1_10b), |
| 538 | .din0 (p4), |
| 539 | .din1 (np2) |
| 540 | ); |
| 541 | |
| 542 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit1_slice_10c ( |
| 543 | .dout (error_bit1_10c), |
| 544 | .din0 (p1), |
| 545 | .din1 (np2) |
| 546 | ); |
| 547 | |
| 548 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit1_slice_11a ( |
| 549 | .dout (error_bit1_a), |
| 550 | .din0 (error_bit1_10a), |
| 551 | .din1 (error_bit1_10b) |
| 552 | ); |
| 553 | |
| 554 | |
| 555 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit1_slice_11b ( |
| 556 | .dout (error_bit[1]), |
| 557 | .din0 (error_bit1_10c), |
| 558 | .din1 (error_bit1_a) |
| 559 | ); |
| 560 | |
| 561 | |
| 562 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit2_slice_10a ( |
| 563 | .dout (error_bit2_10a), |
| 564 | .din0 (np16), |
| 565 | .din1 (np8) |
| 566 | ); |
| 567 | |
| 568 | |
| 569 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit2_slice_10b ( |
| 570 | .dout (error_bit2_10b), |
| 571 | .din0 (p4), |
| 572 | .din1 (p2) |
| 573 | ); |
| 574 | |
| 575 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit2_slice_10c ( |
| 576 | .dout (error_bit2_10c), |
| 577 | .din0 (np1), |
| 578 | .din1 (p2) |
| 579 | ); |
| 580 | |
| 581 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit2_slice_11a ( |
| 582 | .dout (error_bit2_a), |
| 583 | .din0 (error_bit2_10a), |
| 584 | .din1 (error_bit2_10b) |
| 585 | ); |
| 586 | |
| 587 | |
| 588 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit2_slice_11b ( |
| 589 | .dout (error_bit[2]), |
| 590 | .din0 (error_bit2_10c), |
| 591 | .din1 (error_bit2_a) |
| 592 | ); |
| 593 | |
| 594 | |
| 595 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit3_slice_10a ( |
| 596 | .dout (error_bit3_10a), |
| 597 | .din0 (np16), |
| 598 | .din1 (np8) |
| 599 | ); |
| 600 | |
| 601 | |
| 602 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit3_slice_10b ( |
| 603 | .dout (error_bit3_10b), |
| 604 | .din0 (p4), |
| 605 | .din1 (p2) |
| 606 | ); |
| 607 | |
| 608 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit3_slice_11a ( |
| 609 | .dout (error_bit3_a), |
| 610 | .din0 (error_bit3_10a), |
| 611 | .din1 (error_bit3_10b) |
| 612 | ); |
| 613 | |
| 614 | |
| 615 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit3_slice_11b ( |
| 616 | .dout (error_bit[3]), |
| 617 | .din0 (p1), |
| 618 | .din1 (error_bit3_a) |
| 619 | ); |
| 620 | |
| 621 | |
| 622 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit4_slice_10a ( |
| 623 | .dout (error_bit4_10a), |
| 624 | .din0 (np16), |
| 625 | .din1 (p8) |
| 626 | ); |
| 627 | |
| 628 | |
| 629 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit4_slice_10b ( |
| 630 | .dout (error_bit4_10b), |
| 631 | .din0 (np4), |
| 632 | .din1 (np2) |
| 633 | ); |
| 634 | |
| 635 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit4_slice_11a ( |
| 636 | .dout (error_bit4_a), |
| 637 | .din0 (error_bit4_10a), |
| 638 | .din1 (error_bit4_10b) |
| 639 | ); |
| 640 | |
| 641 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit4_slice_11b ( |
| 642 | .dout (error_bit[4]), |
| 643 | .din0 (error_bit4_a), |
| 644 | .din1 (p1) |
| 645 | ); |
| 646 | |
| 647 | ///////////////////////// |
| 648 | |
| 649 | |
| 650 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit5_slice_10a ( |
| 651 | .dout (error_bit5_10a), |
| 652 | .din0 (np16), |
| 653 | .din1 (p8) |
| 654 | ); |
| 655 | |
| 656 | |
| 657 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit5_slice_10b ( |
| 658 | .dout (error_bit5_10b), |
| 659 | .din0 (np4), |
| 660 | .din1 (p2) |
| 661 | ); |
| 662 | |
| 663 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit5_slice_11a ( |
| 664 | .dout (error_bit5_a), |
| 665 | .din0 (error_bit5_10a), |
| 666 | .din1 (error_bit5_10b) |
| 667 | ); |
| 668 | |
| 669 | |
| 670 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit5_slice_11b ( |
| 671 | .dout (error_bit[5]), |
| 672 | .din0 (np1), |
| 673 | .din1 (error_bit5_a) |
| 674 | ); |
| 675 | |
| 676 | |
| 677 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit6_slice_10a ( |
| 678 | .dout (error_bit6_10a), |
| 679 | .din0 (np16), |
| 680 | .din1 (p8) |
| 681 | ); |
| 682 | |
| 683 | |
| 684 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit6_slice_10b ( |
| 685 | .dout (error_bit6_10b), |
| 686 | .din0 (np4), |
| 687 | .din1 (p2) |
| 688 | ); |
| 689 | |
| 690 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit6_slice_11a ( |
| 691 | .dout (error_bit6_a), |
| 692 | .din0 (error_bit6_10a), |
| 693 | .din1 (error_bit6_10b) |
| 694 | ); |
| 695 | |
| 696 | |
| 697 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit6_slice_11b ( |
| 698 | .dout (error_bit[6]), |
| 699 | .din0 (p1), |
| 700 | .din1 (error_bit6_a) |
| 701 | ); |
| 702 | |
| 703 | |
| 704 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit7_slice_10a ( |
| 705 | .dout (error_bit7_10a), |
| 706 | .din0 (np16), |
| 707 | .din1 (p8) |
| 708 | ); |
| 709 | |
| 710 | |
| 711 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit7_slice_10b ( |
| 712 | .dout (error_bit7_10b), |
| 713 | .din0 (p4), |
| 714 | .din1 (np2) |
| 715 | ); |
| 716 | |
| 717 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit7_slice_11a ( |
| 718 | .dout (error_bit7_a), |
| 719 | .din0 (error_bit7_10a), |
| 720 | .din1 (error_bit7_10b) |
| 721 | ); |
| 722 | |
| 723 | |
| 724 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit7_slice_11b ( |
| 725 | .dout (error_bit[7]), |
| 726 | .din0 (np1), |
| 727 | .din1 (error_bit7_a) |
| 728 | ); |
| 729 | |
| 730 | |
| 731 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit8_slice_10a ( |
| 732 | .dout (error_bit8_10a), |
| 733 | .din0 (np16), |
| 734 | .din1 (p8) |
| 735 | ); |
| 736 | |
| 737 | |
| 738 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit8_slice_10b ( |
| 739 | .dout (error_bit8_10b), |
| 740 | .din0 (p4), |
| 741 | .din1 (np2) |
| 742 | ); |
| 743 | |
| 744 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit8_slice_11a ( |
| 745 | .dout (error_bit8_a), |
| 746 | .din0 (error_bit8_10a), |
| 747 | .din1 (error_bit8_10b) |
| 748 | ); |
| 749 | |
| 750 | |
| 751 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit8_slice_11b ( |
| 752 | .dout (error_bit[8]), |
| 753 | .din0 (p1), |
| 754 | .din1 (error_bit8_a) |
| 755 | ); |
| 756 | |
| 757 | |
| 758 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit9_slice_10a ( |
| 759 | .dout (error_bit9_10a), |
| 760 | .din0 (np16), |
| 761 | .din1 (p8) |
| 762 | ); |
| 763 | |
| 764 | |
| 765 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit9_slice_10b ( |
| 766 | .dout (error_bit9_10b), |
| 767 | .din0 (p4), |
| 768 | .din1 (p2) |
| 769 | ); |
| 770 | |
| 771 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit9_slice_11a ( |
| 772 | .dout (error_bit9_a), |
| 773 | .din0 (error_bit9_10a), |
| 774 | .din1 (error_bit9_10b) |
| 775 | ); |
| 776 | |
| 777 | |
| 778 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit9_slice_11b ( |
| 779 | .dout (error_bit[9]), |
| 780 | .din0 (np1), |
| 781 | .din1 (error_bit9_a) |
| 782 | ); |
| 783 | |
| 784 | |
| 785 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit10_slice_10a ( |
| 786 | .dout (error_bit10_10a), |
| 787 | .din0 (np16), |
| 788 | .din1 (p8) |
| 789 | ); |
| 790 | |
| 791 | |
| 792 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit10_slice_10b ( |
| 793 | .dout (error_bit10_10b), |
| 794 | .din0 (p4), |
| 795 | .din1 (p2) |
| 796 | ); |
| 797 | |
| 798 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit10_slice_11a ( |
| 799 | .dout (error_bit10_a), |
| 800 | .din0 (error_bit10_10a), |
| 801 | .din1 (error_bit10_10b) |
| 802 | ); |
| 803 | |
| 804 | |
| 805 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit10_slice_11b ( |
| 806 | .dout (error_bit[10]), |
| 807 | .din0 (p1), |
| 808 | .din1 (error_bit10_a) |
| 809 | ); |
| 810 | |
| 811 | |
| 812 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit11_slice_10a ( |
| 813 | .dout (error_bit11_10a), |
| 814 | .din0 (p16), |
| 815 | .din1 (np8) |
| 816 | ); |
| 817 | |
| 818 | |
| 819 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit11_slice_10b ( |
| 820 | .dout (error_bit11_10b), |
| 821 | .din0 (np4), |
| 822 | .din1 (np2) |
| 823 | ); |
| 824 | |
| 825 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit11_slice_11a ( |
| 826 | .dout (error_bit11_a), |
| 827 | .din0 (error_bit11_10a), |
| 828 | .din1 (error_bit11_10b) |
| 829 | ); |
| 830 | |
| 831 | |
| 832 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit11_slice_11b ( |
| 833 | .dout (error_bit[11]), |
| 834 | .din0 (p1), |
| 835 | .din1 (error_bit11_a) |
| 836 | ); |
| 837 | |
| 838 | |
| 839 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit12_slice_10a ( |
| 840 | .dout (error_bit12_10a), |
| 841 | .din0 (p16), |
| 842 | .din1 (np8) |
| 843 | ); |
| 844 | |
| 845 | |
| 846 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit12_slice_10b ( |
| 847 | .dout (error_bit12_10b), |
| 848 | .din0 (np4), |
| 849 | .din1 (p2) |
| 850 | ); |
| 851 | |
| 852 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit12_slice_11a ( |
| 853 | .dout (error_bit12_a), |
| 854 | .din0 (error_bit12_10a), |
| 855 | .din1 (error_bit12_10b) |
| 856 | ); |
| 857 | |
| 858 | |
| 859 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit12_slice_11b ( |
| 860 | .dout (error_bit[12]), |
| 861 | .din0 (np1), |
| 862 | .din1 (error_bit12_a) |
| 863 | ); |
| 864 | |
| 865 | |
| 866 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit13_slice_10a ( |
| 867 | .dout (error_bit13_10a), |
| 868 | .din0 (p16), |
| 869 | .din1 (np8) |
| 870 | ); |
| 871 | |
| 872 | |
| 873 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit13_slice_10b ( |
| 874 | .dout (error_bit13_10b), |
| 875 | .din0 (np4), |
| 876 | .din1 (p2) |
| 877 | ); |
| 878 | |
| 879 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit13_slice_11a ( |
| 880 | .dout (error_bit13_a), |
| 881 | .din0 (error_bit13_10a), |
| 882 | .din1 (error_bit13_10b) |
| 883 | ); |
| 884 | |
| 885 | |
| 886 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit13_slice_11b ( |
| 887 | .dout (error_bit[13]), |
| 888 | .din0 (p1), |
| 889 | .din1 (error_bit13_a) |
| 890 | ); |
| 891 | |
| 892 | |
| 893 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit14_slice_10a ( |
| 894 | .dout (error_bit14_10a), |
| 895 | .din0 (p16), |
| 896 | .din1 (np8) |
| 897 | ); |
| 898 | |
| 899 | |
| 900 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit14_slice_10b ( |
| 901 | .dout (error_bit14_10b), |
| 902 | .din0 (p4), |
| 903 | .din1 (np2) |
| 904 | ); |
| 905 | |
| 906 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit14_slice_11a ( |
| 907 | .dout (error_bit14_a), |
| 908 | .din0 (error_bit14_10a), |
| 909 | .din1 (error_bit14_10b) |
| 910 | ); |
| 911 | |
| 912 | |
| 913 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit14_slice_11b ( |
| 914 | .dout (error_bit[14]), |
| 915 | .din0 (np1), |
| 916 | .din1 (error_bit14_a) |
| 917 | ); |
| 918 | |
| 919 | |
| 920 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit15_slice_10a ( |
| 921 | .dout (error_bit15_10a), |
| 922 | .din0 (p16), |
| 923 | .din1 (np8) |
| 924 | ); |
| 925 | |
| 926 | |
| 927 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit15_slice_10b ( |
| 928 | .dout (error_bit15_10b), |
| 929 | .din0 (p4), |
| 930 | .din1 (np2) |
| 931 | ); |
| 932 | |
| 933 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit15_slice_11a ( |
| 934 | .dout (error_bit15_a), |
| 935 | .din0 (error_bit15_10a), |
| 936 | .din1 (error_bit15_10b) |
| 937 | ); |
| 938 | |
| 939 | |
| 940 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit15_slice_11b ( |
| 941 | .dout (error_bit[15]), |
| 942 | .din0 (p1), |
| 943 | .din1 (error_bit15_a) |
| 944 | ); |
| 945 | |
| 946 | |
| 947 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit16_slice_10a ( |
| 948 | .dout (error_bit16_10a), |
| 949 | .din0 (p16), |
| 950 | .din1 (np8) |
| 951 | ); |
| 952 | |
| 953 | |
| 954 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit16_slice_10b ( |
| 955 | .dout (error_bit16_10b), |
| 956 | .din0 (p4), |
| 957 | .din1 (p2) |
| 958 | ); |
| 959 | |
| 960 | |
| 961 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit16_slice_11a ( |
| 962 | .dout (error_bit16_a), |
| 963 | .din0 (error_bit16_10a), |
| 964 | .din1 (error_bit16_10b) |
| 965 | ); |
| 966 | |
| 967 | |
| 968 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit16_slice_11b ( |
| 969 | .dout (error_bit[16]), |
| 970 | .din0 (np1), |
| 971 | .din1 (error_bit16_a) |
| 972 | ); |
| 973 | |
| 974 | |
| 975 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit17_slice_10a ( |
| 976 | .dout (error_bit17_10a), |
| 977 | .din0 (p16), |
| 978 | .din1 (np8) |
| 979 | ); |
| 980 | |
| 981 | |
| 982 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit17_slice_10b ( |
| 983 | .dout (error_bit17_10b), |
| 984 | .din0 (p4), |
| 985 | .din1 (p2) |
| 986 | ); |
| 987 | |
| 988 | |
| 989 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit17_slice_11a ( |
| 990 | .dout (error_bit17_a), |
| 991 | .din0 (error_bit17_10a), |
| 992 | .din1 (error_bit17_10b) |
| 993 | ); |
| 994 | |
| 995 | |
| 996 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit17_slice_11b ( |
| 997 | .dout (error_bit[17]), |
| 998 | .din0 (p1), |
| 999 | .din1 (error_bit17_a) |
| 1000 | ); |
| 1001 | |
| 1002 | |
| 1003 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit18_slice_10a ( |
| 1004 | .dout (error_bit18_10a), |
| 1005 | .din0 (p16), |
| 1006 | .din1 (p8) |
| 1007 | ); |
| 1008 | |
| 1009 | |
| 1010 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit18_slice_10b ( |
| 1011 | .dout (error_bit18_10b), |
| 1012 | .din0 (np4), |
| 1013 | .din1 (np2) |
| 1014 | ); |
| 1015 | |
| 1016 | |
| 1017 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit18_slice_11a ( |
| 1018 | .dout (error_bit18_a), |
| 1019 | .din0 (error_bit18_10a), |
| 1020 | .din1 (error_bit18_10b) |
| 1021 | ); |
| 1022 | |
| 1023 | |
| 1024 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit18_slice_11b ( |
| 1025 | .dout (error_bit[18]), |
| 1026 | .din0 (np1), |
| 1027 | .din1 (error_bit18_a) |
| 1028 | ); |
| 1029 | |
| 1030 | |
| 1031 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit19_slice_10a ( |
| 1032 | .dout (error_bit19_10a), |
| 1033 | .din0 (p16), |
| 1034 | .din1 (p8) |
| 1035 | ); |
| 1036 | |
| 1037 | |
| 1038 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit19_slice_10b ( |
| 1039 | .dout (error_bit19_10b), |
| 1040 | .din0 (np4), |
| 1041 | .din1 (np2) |
| 1042 | ); |
| 1043 | |
| 1044 | |
| 1045 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit19_slice_11a ( |
| 1046 | .dout (error_bit19_a), |
| 1047 | .din0 (error_bit19_10a), |
| 1048 | .din1 (error_bit19_10b) |
| 1049 | ); |
| 1050 | |
| 1051 | |
| 1052 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit19_slice_11b ( |
| 1053 | .dout (error_bit[19]), |
| 1054 | .din0 (p1), |
| 1055 | .din1 (error_bit19_a) |
| 1056 | ); |
| 1057 | |
| 1058 | |
| 1059 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit20_slice_10a ( |
| 1060 | .dout (error_bit20_10a), |
| 1061 | .din0 (p16), |
| 1062 | .din1 (p8) |
| 1063 | ); |
| 1064 | |
| 1065 | |
| 1066 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit20_slice_10b ( |
| 1067 | .dout (error_bit20_10b), |
| 1068 | .din0 (np4), |
| 1069 | .din1 (p2) |
| 1070 | ); |
| 1071 | |
| 1072 | |
| 1073 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit20_slice_11a ( |
| 1074 | .dout (error_bit20_a), |
| 1075 | .din0 (error_bit20_10a), |
| 1076 | .din1 (error_bit20_10b) |
| 1077 | ); |
| 1078 | |
| 1079 | |
| 1080 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit20_slice_11b ( |
| 1081 | .dout (error_bit[20]), |
| 1082 | .din0 (np1), |
| 1083 | .din1 (error_bit20_a) |
| 1084 | ); |
| 1085 | |
| 1086 | |
| 1087 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit21_slice_10a ( |
| 1088 | .dout (error_bit21_10a), |
| 1089 | .din0 (p16), |
| 1090 | .din1 (p8) |
| 1091 | ); |
| 1092 | |
| 1093 | |
| 1094 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit21_slice_10b ( |
| 1095 | .dout (error_bit21_10b), |
| 1096 | .din0 (np4), |
| 1097 | .din1 (p2) |
| 1098 | ); |
| 1099 | |
| 1100 | |
| 1101 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit21_slice_11a ( |
| 1102 | .dout (error_bit21_a), |
| 1103 | .din0 (error_bit21_10a), |
| 1104 | .din1 (error_bit21_10b) |
| 1105 | ); |
| 1106 | |
| 1107 | |
| 1108 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit21_slice_11b ( |
| 1109 | .dout (error_bit[21]), |
| 1110 | .din0 (p1), |
| 1111 | .din1 (error_bit21_a) |
| 1112 | ); |
| 1113 | |
| 1114 | |
| 1115 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit22_slice_10a ( |
| 1116 | .dout (error_bit22_10a), |
| 1117 | .din0 (p16), |
| 1118 | .din1 (p8) |
| 1119 | ); |
| 1120 | |
| 1121 | |
| 1122 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit22_slice_10b ( |
| 1123 | .dout (error_bit22_10b), |
| 1124 | .din0 (p4), |
| 1125 | .din1 (np2) |
| 1126 | ); |
| 1127 | |
| 1128 | |
| 1129 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit22_slice_11a ( |
| 1130 | .dout (error_bit22_a), |
| 1131 | .din0 (error_bit22_10a), |
| 1132 | .din1 (error_bit22_10b) |
| 1133 | ); |
| 1134 | |
| 1135 | |
| 1136 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit22_slice_11b ( |
| 1137 | .dout (error_bit[22]), |
| 1138 | .din0 (np1), |
| 1139 | .din1 (error_bit22_a) |
| 1140 | ); |
| 1141 | |
| 1142 | |
| 1143 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit23_slice_10a ( |
| 1144 | .dout (error_bit23_10a), |
| 1145 | .din0 (p16), |
| 1146 | .din1 (p8) |
| 1147 | ); |
| 1148 | |
| 1149 | |
| 1150 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit23_slice_10b ( |
| 1151 | .dout (error_bit23_10b), |
| 1152 | .din0 (p4), |
| 1153 | .din1 (np2) |
| 1154 | ); |
| 1155 | |
| 1156 | |
| 1157 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit23_slice_11a ( |
| 1158 | .dout (error_bit23_a), |
| 1159 | .din0 (error_bit23_10a), |
| 1160 | .din1 (error_bit23_10b) |
| 1161 | ); |
| 1162 | |
| 1163 | |
| 1164 | l2t_ecc30b_dp_and_macro__ports_2__width_1 error_bit23_slice_11b ( |
| 1165 | .dout (error_bit[23]), |
| 1166 | .din0 (p1), |
| 1167 | .din1 (error_bit23_a) |
| 1168 | ); |
| 1169 | |
| 1170 | |
| 1171 | |
| 1172 | //assign dout = din ^ error_bit ; |
| 1173 | |
| 1174 | l2t_ecc30b_dp_xor_macro__stack_24r__width_24 dout_slice |
| 1175 | ( |
| 1176 | .dout (dout[23:0]), |
| 1177 | .din0 (din[23:0]), |
| 1178 | .din1 (error_bit[23:0]) |
| 1179 | ); |
| 1180 | |
| 1181 | //assign corrected_bit = {p16, p8, p4, p2, p1} ; |
| 1182 | |
| 1183 | l2t_ecc30b_dp_buff_macro__stack_5r__width_5 buff_corrected_bit |
| 1184 | ( |
| 1185 | .dout (corrected_bit[4:0]), |
| 1186 | .din ({p16, p8, p4, p2, p1}) |
| 1187 | ); |
| 1188 | |
| 1189 | endmodule |
| 1190 | |
| 1191 | |
| 1192 | // |
| 1193 | // xor macro for ports = 2,3 |
| 1194 | // |
| 1195 | // |
| 1196 | |
| 1197 | |
| 1198 | |
| 1199 | |
| 1200 | |
| 1201 | module l2t_ecc30b_dp_xor_macro__dxor_8x__ports_3__width_1 ( |
| 1202 | din0, |
| 1203 | din1, |
| 1204 | din2, |
| 1205 | dout); |
| 1206 | input [0:0] din0; |
| 1207 | input [0:0] din1; |
| 1208 | input [0:0] din2; |
| 1209 | output [0:0] dout; |
| 1210 | |
| 1211 | |
| 1212 | |
| 1213 | |
| 1214 | |
| 1215 | xor3 #(1) d0_0 ( |
| 1216 | .in0(din0[0:0]), |
| 1217 | .in1(din1[0:0]), |
| 1218 | .in2(din2[0:0]), |
| 1219 | .out(dout[0:0]) |
| 1220 | ); |
| 1221 | |
| 1222 | |
| 1223 | |
| 1224 | |
| 1225 | |
| 1226 | |
| 1227 | |
| 1228 | |
| 1229 | endmodule |
| 1230 | |
| 1231 | |
| 1232 | |
| 1233 | |
| 1234 | |
| 1235 | // |
| 1236 | // xor macro for ports = 2,3 |
| 1237 | // |
| 1238 | // |
| 1239 | |
| 1240 | |
| 1241 | |
| 1242 | |
| 1243 | |
| 1244 | module l2t_ecc30b_dp_xor_macro__dxor_8x__ports_2__width_1 ( |
| 1245 | din0, |
| 1246 | din1, |
| 1247 | dout); |
| 1248 | input [0:0] din0; |
| 1249 | input [0:0] din1; |
| 1250 | output [0:0] dout; |
| 1251 | |
| 1252 | |
| 1253 | |
| 1254 | |
| 1255 | |
| 1256 | xor2 #(1) d0_0 ( |
| 1257 | .in0(din0[0:0]), |
| 1258 | .in1(din1[0:0]), |
| 1259 | .out(dout[0:0]) |
| 1260 | ); |
| 1261 | |
| 1262 | |
| 1263 | |
| 1264 | |
| 1265 | |
| 1266 | |
| 1267 | |
| 1268 | |
| 1269 | endmodule |
| 1270 | |
| 1271 | |
| 1272 | |
| 1273 | |
| 1274 | |
| 1275 | // |
| 1276 | // invert macro |
| 1277 | // |
| 1278 | // |
| 1279 | |
| 1280 | |
| 1281 | |
| 1282 | |
| 1283 | |
| 1284 | module l2t_ecc30b_dp_inv_macro__stack_1r__width_1 ( |
| 1285 | din, |
| 1286 | dout); |
| 1287 | input [0:0] din; |
| 1288 | output [0:0] dout; |
| 1289 | |
| 1290 | |
| 1291 | |
| 1292 | |
| 1293 | |
| 1294 | |
| 1295 | inv #(1) d0_0 ( |
| 1296 | .in(din[0:0]), |
| 1297 | .out(dout[0:0]) |
| 1298 | ); |
| 1299 | |
| 1300 | |
| 1301 | |
| 1302 | |
| 1303 | |
| 1304 | |
| 1305 | |
| 1306 | |
| 1307 | |
| 1308 | endmodule |
| 1309 | |
| 1310 | |
| 1311 | |
| 1312 | |
| 1313 | |
| 1314 | // |
| 1315 | // and macro for ports = 2,3,4 |
| 1316 | // |
| 1317 | // |
| 1318 | |
| 1319 | |
| 1320 | |
| 1321 | |
| 1322 | |
| 1323 | module l2t_ecc30b_dp_and_macro__ports_2__width_1 ( |
| 1324 | din0, |
| 1325 | din1, |
| 1326 | dout); |
| 1327 | input [0:0] din0; |
| 1328 | input [0:0] din1; |
| 1329 | output [0:0] dout; |
| 1330 | |
| 1331 | |
| 1332 | |
| 1333 | |
| 1334 | |
| 1335 | |
| 1336 | and2 #(1) d0_0 ( |
| 1337 | .in0(din0[0:0]), |
| 1338 | .in1(din1[0:0]), |
| 1339 | .out(dout[0:0]) |
| 1340 | ); |
| 1341 | |
| 1342 | |
| 1343 | |
| 1344 | |
| 1345 | |
| 1346 | |
| 1347 | |
| 1348 | |
| 1349 | |
| 1350 | endmodule |
| 1351 | |
| 1352 | |
| 1353 | |
| 1354 | |
| 1355 | |
| 1356 | // |
| 1357 | // xor macro for ports = 2,3 |
| 1358 | // |
| 1359 | // |
| 1360 | |
| 1361 | |
| 1362 | |
| 1363 | |
| 1364 | |
| 1365 | module l2t_ecc30b_dp_xor_macro__stack_24r__width_24 ( |
| 1366 | din0, |
| 1367 | din1, |
| 1368 | dout); |
| 1369 | input [23:0] din0; |
| 1370 | input [23:0] din1; |
| 1371 | output [23:0] dout; |
| 1372 | |
| 1373 | |
| 1374 | |
| 1375 | |
| 1376 | |
| 1377 | xor2 #(24) d0_0 ( |
| 1378 | .in0(din0[23:0]), |
| 1379 | .in1(din1[23:0]), |
| 1380 | .out(dout[23:0]) |
| 1381 | ); |
| 1382 | |
| 1383 | |
| 1384 | |
| 1385 | |
| 1386 | |
| 1387 | |
| 1388 | |
| 1389 | |
| 1390 | endmodule |
| 1391 | |
| 1392 | |
| 1393 | |
| 1394 | |
| 1395 | |
| 1396 | // |
| 1397 | // buff macro |
| 1398 | // |
| 1399 | // |
| 1400 | |
| 1401 | |
| 1402 | |
| 1403 | |
| 1404 | |
| 1405 | module l2t_ecc30b_dp_buff_macro__stack_5r__width_5 ( |
| 1406 | din, |
| 1407 | dout); |
| 1408 | input [4:0] din; |
| 1409 | output [4:0] dout; |
| 1410 | |
| 1411 | |
| 1412 | |
| 1413 | |
| 1414 | |
| 1415 | |
| 1416 | buff #(5) d0_0 ( |
| 1417 | .in(din[4:0]), |
| 1418 | .out(dout[4:0]) |
| 1419 | ); |
| 1420 | |
| 1421 | |
| 1422 | |
| 1423 | |
| 1424 | |
| 1425 | |
| 1426 | |
| 1427 | |
| 1428 | endmodule |
| 1429 | |
| 1430 | |
| 1431 | |
| 1432 | |