| 1 | // ========== Copyright Header Begin ========================================== |
| 2 | // |
| 3 | // OpenSPARC T2 Processor File: l2t_vuadcl_dp.v |
| 4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved |
| 5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. |
| 6 | // |
| 7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 8 | // |
| 9 | // This program is free software; you can redistribute it and/or modify |
| 10 | // it under the terms of the GNU General Public License as published by |
| 11 | // the Free Software Foundation; version 2 of the License. |
| 12 | // |
| 13 | // This program is distributed in the hope that it will be useful, |
| 14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | // GNU General Public License for more details. |
| 17 | // |
| 18 | // You should have received a copy of the GNU General Public License |
| 19 | // along with this program; if not, write to the Free Software |
| 20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 21 | // |
| 22 | // For the avoidance of doubt, and except that if any non-GPL license |
| 23 | // choice is available it will apply instead, Sun elects to use only |
| 24 | // the General Public License version 2 (GPLv2) at this time for any |
| 25 | // software where a choice of GPL license versions is made |
| 26 | // available with the language indicating that GPLv2 or any later version |
| 27 | // may be used, or where a choice of which version of the GPL is applied is |
| 28 | // otherwise unspecified. |
| 29 | // |
| 30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
| 31 | // CA 95054 USA or visit www.sun.com if you need additional information or |
| 32 | // have any questions. |
| 33 | // |
| 34 | // ========== Copyright Header End ============================================ |
| 35 | module l2t_vuadcl_dp ( |
| 36 | data_in_l, |
| 37 | data_in_h, |
| 38 | mux1_h_sel, |
| 39 | mux1_l_sel, |
| 40 | mux2_sel, |
| 41 | tcu_muxtest, |
| 42 | vuadcl_data_out_col); |
| 43 | wire muxtst; |
| 44 | wire mux2_sel_n; |
| 45 | wire mux_2to1_sel0; |
| 46 | wire mux_2to1_sel1; |
| 47 | wire mux_2to1_sel2; |
| 48 | wire mux_2to1_sel3; |
| 49 | wire mux_2to1_sel4; |
| 50 | wire mux_2to1_sel5; |
| 51 | wire mux_2to1_sel6; |
| 52 | wire mux_2to1_sel7; |
| 53 | |
| 54 | |
| 55 | // every 4th dp pitch has empty. |
| 56 | input [155:0] data_in_l; // TOP 4 pins per dp pitch. ( from the array below ) |
| 57 | input [155:0] data_in_h; // BOTTOM 4 pins per dp pitch. ( from the array above ) |
| 58 | |
| 59 | input [3:0] mux1_h_sel; // logically the same as mux1_l_sel ( addr bits <9:8> ) |
| 60 | input [3:0] mux1_l_sel; // logically the same as mux1_h_sel |
| 61 | input mux2_sel; // ( addr bit <10>) // int 5.0 change |
| 62 | input tcu_muxtest; |
| 63 | |
| 64 | |
| 65 | output [38:0] vuadcl_data_out_col; // to vuadio |
| 66 | |
| 67 | |
| 68 | wire [38:0] hi_4to1; |
| 69 | wire [38:0] lo_4to1; |
| 70 | |
| 71 | wire [38:0] hi_4to1_0; |
| 72 | wire [38:0] hi_4to1_1; |
| 73 | wire [38:0] hi_4to1_2; |
| 74 | wire [38:0] hi_4to1_3; |
| 75 | |
| 76 | wire [38:0] lo_4to1_0; |
| 77 | wire [38:0] lo_4to1_1; |
| 78 | wire [38:0] lo_4to1_2; |
| 79 | wire [38:0] lo_4to1_3; |
| 80 | |
| 81 | assign muxtst = tcu_muxtest; |
| 82 | |
| 83 | assign hi_4to1_0 = { |
| 84 | data_in_h[152], data_in_h[148],data_in_h[144], data_in_h[140], data_in_h[136], |
| 85 | data_in_h[132], data_in_h[128], data_in_h[124], data_in_h[120], |
| 86 | data_in_h[116], data_in_h[112], data_in_h[108], data_in_h[104], |
| 87 | data_in_h[100], data_in_h[96], data_in_h[92], |
| 88 | data_in_h[88], data_in_h[84], data_in_h[80], |
| 89 | data_in_h[76], data_in_h[72], data_in_h[68], |
| 90 | data_in_h[64], data_in_h[60], data_in_h[56], |
| 91 | data_in_h[52], data_in_h[48], data_in_h[44], |
| 92 | data_in_h[40], data_in_h[36], data_in_h[32], |
| 93 | data_in_h[28], data_in_h[24], data_in_h[20], |
| 94 | data_in_h[16], data_in_h[12], data_in_h[8], |
| 95 | data_in_h[4], data_in_h[0]}; |
| 96 | |
| 97 | assign hi_4to1_1 = { |
| 98 | data_in_h[153], |
| 99 | data_in_h[149], data_in_h[145], data_in_h[141], data_in_h[137], |
| 100 | data_in_h[133], data_in_h[129], data_in_h[125], data_in_h[121], |
| 101 | data_in_h[117], data_in_h[113], data_in_h[109], data_in_h[105], |
| 102 | data_in_h[101], data_in_h[97], data_in_h[93], |
| 103 | data_in_h[89], data_in_h[85], data_in_h[81], |
| 104 | data_in_h[77], data_in_h[73], data_in_h[69], |
| 105 | data_in_h[65], data_in_h[61], data_in_h[57], |
| 106 | data_in_h[53], data_in_h[49], data_in_h[45], |
| 107 | data_in_h[41], data_in_h[37], data_in_h[33], |
| 108 | data_in_h[29], data_in_h[25], data_in_h[21], |
| 109 | data_in_h[17], data_in_h[13], data_in_h[9], |
| 110 | data_in_h[5], data_in_h[1]}; |
| 111 | |
| 112 | assign hi_4to1_2 = { |
| 113 | data_in_h[154], |
| 114 | data_in_h[150], data_in_h[146], data_in_h[142], data_in_h[138], |
| 115 | data_in_h[134], data_in_h[130], data_in_h[126], data_in_h[122], |
| 116 | data_in_h[118], data_in_h[114], data_in_h[110], data_in_h[106], |
| 117 | data_in_h[102], data_in_h[98], data_in_h[94], |
| 118 | data_in_h[90], data_in_h[86], data_in_h[82], |
| 119 | data_in_h[78], data_in_h[74], data_in_h[70], |
| 120 | data_in_h[66], data_in_h[62], data_in_h[58], |
| 121 | data_in_h[54], data_in_h[50], data_in_h[46], |
| 122 | data_in_h[42], data_in_h[38], data_in_h[34], |
| 123 | data_in_h[30], data_in_h[26], data_in_h[22], |
| 124 | data_in_h[18], data_in_h[14], data_in_h[10], |
| 125 | data_in_h[6], data_in_h[2]}; |
| 126 | |
| 127 | assign hi_4to1_3 = { |
| 128 | data_in_h[155], |
| 129 | data_in_h[151], data_in_h[147], data_in_h[143], data_in_h[139], |
| 130 | data_in_h[135], data_in_h[131], data_in_h[127], data_in_h[123], |
| 131 | data_in_h[119], data_in_h[115], data_in_h[111], data_in_h[107], |
| 132 | data_in_h[103], data_in_h[99], data_in_h[95], |
| 133 | data_in_h[91], data_in_h[87], data_in_h[83], |
| 134 | data_in_h[79], data_in_h[75], data_in_h[71], |
| 135 | data_in_h[67], data_in_h[63], data_in_h[59], |
| 136 | data_in_h[55], data_in_h[51], data_in_h[47], |
| 137 | data_in_h[43], data_in_h[39], data_in_h[35], |
| 138 | data_in_h[31], data_in_h[27], data_in_h[23], |
| 139 | data_in_h[19], data_in_h[15], data_in_h[11], |
| 140 | data_in_h[7], data_in_h[3]}; |
| 141 | |
| 142 | assign lo_4to1_0 = { |
| 143 | data_in_l[152], |
| 144 | data_in_l[148], data_in_l[144], data_in_l[140], data_in_l[136], |
| 145 | |
| 146 | data_in_l[132], data_in_l[128], data_in_l[124], data_in_l[120], |
| 147 | data_in_l[116], data_in_l[112], data_in_l[108], data_in_l[104], |
| 148 | data_in_l[100], data_in_l[96], data_in_l[92], |
| 149 | data_in_l[88], data_in_l[84], data_in_l[80], |
| 150 | data_in_l[76], data_in_l[72], data_in_l[68], |
| 151 | data_in_l[64], data_in_l[60], data_in_l[56], |
| 152 | data_in_l[52], data_in_l[48], data_in_l[44], |
| 153 | data_in_l[40], data_in_l[36], data_in_l[32], |
| 154 | data_in_l[28], data_in_l[24], data_in_l[20], |
| 155 | data_in_l[16], data_in_l[12], data_in_l[8], |
| 156 | data_in_l[4], data_in_l[0]}; |
| 157 | |
| 158 | assign lo_4to1_1 = { |
| 159 | data_in_l[153], |
| 160 | data_in_l[149], data_in_l[145], data_in_l[141], data_in_l[137], |
| 161 | |
| 162 | data_in_l[133], data_in_l[129], data_in_l[125], data_in_l[121], |
| 163 | data_in_l[117], data_in_l[113], data_in_l[109], data_in_l[105], |
| 164 | data_in_l[101], data_in_l[97], data_in_l[93], |
| 165 | data_in_l[89], data_in_l[85], data_in_l[81], |
| 166 | data_in_l[77], data_in_l[73], data_in_l[69], |
| 167 | data_in_l[65], data_in_l[61], data_in_l[57], |
| 168 | data_in_l[53], data_in_l[49], data_in_l[45], |
| 169 | data_in_l[41], data_in_l[37], data_in_l[33], |
| 170 | data_in_l[29], data_in_l[25], data_in_l[21], |
| 171 | data_in_l[17], data_in_l[13], data_in_l[9], |
| 172 | data_in_l[5], data_in_l[1]}; |
| 173 | |
| 174 | assign lo_4to1_2 = { |
| 175 | data_in_l[154], |
| 176 | data_in_l[150], data_in_l[146], data_in_l[142], data_in_l[138], |
| 177 | data_in_l[134], data_in_l[130], data_in_l[126], data_in_l[122], |
| 178 | data_in_l[118], data_in_l[114], data_in_l[110], data_in_l[106], |
| 179 | data_in_l[102], data_in_l[98], data_in_l[94], |
| 180 | data_in_l[90], data_in_l[86], data_in_l[82], |
| 181 | data_in_l[78], data_in_l[74], data_in_l[70], |
| 182 | data_in_l[66], data_in_l[62], data_in_l[58], |
| 183 | data_in_l[54], data_in_l[50], data_in_l[46], |
| 184 | data_in_l[42], data_in_l[38], data_in_l[34], |
| 185 | data_in_l[30], data_in_l[26], data_in_l[22], |
| 186 | data_in_l[18], data_in_l[14], data_in_l[10], |
| 187 | data_in_l[6], data_in_l[2]}; |
| 188 | |
| 189 | assign lo_4to1_3 = { |
| 190 | data_in_l[155], |
| 191 | data_in_l[151], data_in_l[147], data_in_l[143], data_in_l[139], |
| 192 | data_in_l[135], data_in_l[131], data_in_l[127], data_in_l[123], |
| 193 | data_in_l[119], data_in_l[115], data_in_l[111], data_in_l[107], |
| 194 | data_in_l[103], data_in_l[99], data_in_l[95], |
| 195 | data_in_l[91], data_in_l[87], data_in_l[83], |
| 196 | data_in_l[79], data_in_l[75], data_in_l[71], |
| 197 | data_in_l[67], data_in_l[63], data_in_l[59], |
| 198 | data_in_l[55], data_in_l[51], data_in_l[47], |
| 199 | data_in_l[43], data_in_l[39], data_in_l[35], |
| 200 | data_in_l[31], data_in_l[27], data_in_l[23], |
| 201 | data_in_l[19], data_in_l[15], data_in_l[11], |
| 202 | data_in_l[7], data_in_l[3]}; |
| 203 | |
| 204 | ///////////////////////////////////////////////////////////////////////////// |
| 205 | //mux_macro mux_h_4to1 (width=39,ports=4,mux=pgnpe,stack=39c) |
| 206 | // ( |
| 207 | // .dout (hi_4to1[38:0]), |
| 208 | // .din0 (hi_4to1_0[38:0]), |
| 209 | // .din1 (hi_4to1_1[38:0]), |
| 210 | // .din2 (hi_4to1_2[38:0]), |
| 211 | // .din3 (hi_4to1_3[38:0]), |
| 212 | // .sel0 (mux1_h_sel[0]), |
| 213 | // .sel1 (mux1_h_sel[1]), |
| 214 | // .sel2 (mux1_h_sel[2]), |
| 215 | // .sel3 (mux1_h_sel[3]) |
| 216 | // ); |
| 217 | // |
| 218 | //mux_macro mux_l_4to1 (width=39,ports=4,mux=pgnpe,stack=39c) |
| 219 | // ( |
| 220 | // .dout (lo_4to1[38:0]), |
| 221 | // .din0 (lo_4to1_0[38:0]), |
| 222 | // .din1 (lo_4to1_1[38:0]), |
| 223 | // .din2 (lo_4to1_2[38:0]), |
| 224 | // .din3 (lo_4to1_3[38:0]), |
| 225 | // .sel0 (mux1_l_sel[0]), |
| 226 | // .sel1 (mux1_l_sel[1]), |
| 227 | // .sel2 (mux1_l_sel[2]), |
| 228 | // .sel3 (mux1_l_sel[3]) |
| 229 | // ); |
| 230 | // |
| 231 | // |
| 232 | //inv_macro inv_mux2_sel (width=1) // int 5.0 changes |
| 233 | // ( |
| 234 | // .dout (mux2_sel_n), |
| 235 | // .din (mux2_sel) |
| 236 | // ); |
| 237 | // |
| 238 | //mux_macro mux_2to1 (width=39,ports=2,mux=aonpe,stack=39c,dmux=8x) // int 5.0 changes |
| 239 | // ( |
| 240 | // .dout (vuadcl_data_out_col[38:0]), |
| 241 | // .din0 (hi_4to1[38:0]), |
| 242 | // .din1 (lo_4to1[38:0]), |
| 243 | // .sel0 (mux2_sel_n), |
| 244 | // .sel1 (mux2_sel) |
| 245 | // ); |
| 246 | // |
| 247 | ///////////////////////////////////////////////////////////////////////////// |
| 248 | |
| 249 | l2t_vuadcl_dp_inv_macro__width_1 inv_mux2_sel |
| 250 | ( |
| 251 | .dout (mux2_sel_n), |
| 252 | .din (mux2_sel) |
| 253 | ); |
| 254 | |
| 255 | |
| 256 | |
| 257 | |
| 258 | |
| 259 | l2t_vuadcl_dp_mux_macro__dmux_32x__mux_pgnpe__ports_8__stack_40c__width_39 mux_2to1 |
| 260 | ( |
| 261 | .dout (vuadcl_data_out_col[38:0]), |
| 262 | .din0 (hi_4to1_0[38:0]), |
| 263 | .din1 (hi_4to1_1[38:0]), |
| 264 | .din2 (hi_4to1_2[38:0]), |
| 265 | .din3 (hi_4to1_3[38:0]), |
| 266 | .din4 (lo_4to1_0[38:0]), |
| 267 | .din5 (lo_4to1_1[38:0]), |
| 268 | .din6 (lo_4to1_2[38:0]), |
| 269 | .din7 (lo_4to1_3[38:0]), |
| 270 | .sel0 (mux_2to1_sel0), |
| 271 | .sel1 (mux_2to1_sel1), |
| 272 | .sel2 (mux_2to1_sel2), |
| 273 | .sel3 (mux_2to1_sel3), |
| 274 | .sel4 (mux_2to1_sel4), |
| 275 | .sel5 (mux_2to1_sel5), |
| 276 | .sel6 (mux_2to1_sel6), |
| 277 | .sel7 (mux_2to1_sel7), |
| 278 | .muxtst(muxtst) |
| 279 | ); |
| 280 | |
| 281 | l2t_vuadcl_dp_and_macro__dinv_16x__stack_8c__width_8 and_select |
| 282 | ( |
| 283 | .dout ({mux_2to1_sel0, |
| 284 | mux_2to1_sel1, |
| 285 | mux_2to1_sel2, |
| 286 | mux_2to1_sel3, |
| 287 | mux_2to1_sel4, |
| 288 | mux_2to1_sel5, |
| 289 | mux_2to1_sel6, |
| 290 | mux_2to1_sel7}), |
| 291 | .din0 ({mux2_sel_n, |
| 292 | mux2_sel_n, |
| 293 | mux2_sel_n, |
| 294 | mux2_sel_n, |
| 295 | mux2_sel, |
| 296 | mux2_sel, |
| 297 | mux2_sel, |
| 298 | mux2_sel}), |
| 299 | .din1 ({mux1_h_sel[0], |
| 300 | mux1_h_sel[1], |
| 301 | mux1_h_sel[2], |
| 302 | mux1_h_sel[3], |
| 303 | mux1_l_sel[0], |
| 304 | mux1_l_sel[1], |
| 305 | mux1_l_sel[2], |
| 306 | mux1_l_sel[3]}) |
| 307 | ); |
| 308 | |
| 309 | endmodule |
| 310 | |
| 311 | |
| 312 | // |
| 313 | // invert macro |
| 314 | // |
| 315 | // |
| 316 | |
| 317 | |
| 318 | |
| 319 | |
| 320 | |
| 321 | module l2t_vuadcl_dp_inv_macro__width_1 ( |
| 322 | din, |
| 323 | dout); |
| 324 | input [0:0] din; |
| 325 | output [0:0] dout; |
| 326 | |
| 327 | |
| 328 | |
| 329 | |
| 330 | |
| 331 | |
| 332 | inv #(1) d0_0 ( |
| 333 | .in(din[0:0]), |
| 334 | .out(dout[0:0]) |
| 335 | ); |
| 336 | |
| 337 | |
| 338 | |
| 339 | |
| 340 | |
| 341 | |
| 342 | |
| 343 | |
| 344 | |
| 345 | endmodule |
| 346 | |
| 347 | |
| 348 | |
| 349 | |
| 350 | |
| 351 | // general mux macro for pass-gate and and-or muxes with/wout priority encoders |
| 352 | // also for pass-gate with decoder |
| 353 | |
| 354 | |
| 355 | |
| 356 | |
| 357 | |
| 358 | // any PARAMS parms go into naming of macro |
| 359 | |
| 360 | module l2t_vuadcl_dp_mux_macro__dmux_32x__mux_pgnpe__ports_8__stack_40c__width_39 ( |
| 361 | din0, |
| 362 | sel0, |
| 363 | din1, |
| 364 | sel1, |
| 365 | din2, |
| 366 | sel2, |
| 367 | din3, |
| 368 | sel3, |
| 369 | din4, |
| 370 | sel4, |
| 371 | din5, |
| 372 | sel5, |
| 373 | din6, |
| 374 | sel6, |
| 375 | din7, |
| 376 | sel7, |
| 377 | muxtst, |
| 378 | dout); |
| 379 | wire buffout0; |
| 380 | wire buffout1; |
| 381 | wire buffout2; |
| 382 | wire buffout3; |
| 383 | wire buffout4; |
| 384 | wire buffout5; |
| 385 | wire buffout6; |
| 386 | wire buffout7; |
| 387 | |
| 388 | input [38:0] din0; |
| 389 | input sel0; |
| 390 | input [38:0] din1; |
| 391 | input sel1; |
| 392 | input [38:0] din2; |
| 393 | input sel2; |
| 394 | input [38:0] din3; |
| 395 | input sel3; |
| 396 | input [38:0] din4; |
| 397 | input sel4; |
| 398 | input [38:0] din5; |
| 399 | input sel5; |
| 400 | input [38:0] din6; |
| 401 | input sel6; |
| 402 | input [38:0] din7; |
| 403 | input sel7; |
| 404 | input muxtst; |
| 405 | output [38:0] dout; |
| 406 | |
| 407 | |
| 408 | |
| 409 | |
| 410 | |
| 411 | cl_dp1_muxbuff8_8x c0_0 ( |
| 412 | .in0(sel0), |
| 413 | .in1(sel1), |
| 414 | .in2(sel2), |
| 415 | .in3(sel3), |
| 416 | .in4(sel4), |
| 417 | .in5(sel5), |
| 418 | .in6(sel6), |
| 419 | .in7(sel7), |
| 420 | .out0(buffout0), |
| 421 | .out1(buffout1), |
| 422 | .out2(buffout2), |
| 423 | .out3(buffout3), |
| 424 | .out4(buffout4), |
| 425 | .out5(buffout5), |
| 426 | .out6(buffout6), |
| 427 | .out7(buffout7) |
| 428 | ); |
| 429 | mux8 #(39) d0_0 ( |
| 430 | .sel0(buffout0), |
| 431 | .sel1(buffout1), |
| 432 | .sel2(buffout2), |
| 433 | .sel3(buffout3), |
| 434 | .sel4(buffout4), |
| 435 | .sel5(buffout5), |
| 436 | .sel6(buffout6), |
| 437 | .sel7(buffout7), |
| 438 | .in0(din0[38:0]), |
| 439 | .in1(din1[38:0]), |
| 440 | .in2(din2[38:0]), |
| 441 | .in3(din3[38:0]), |
| 442 | .in4(din4[38:0]), |
| 443 | .in5(din5[38:0]), |
| 444 | .in6(din6[38:0]), |
| 445 | .in7(din7[38:0]), |
| 446 | .dout(dout[38:0]), |
| 447 | .muxtst(muxtst) |
| 448 | ); |
| 449 | |
| 450 | |
| 451 | |
| 452 | |
| 453 | |
| 454 | |
| 455 | |
| 456 | |
| 457 | |
| 458 | |
| 459 | |
| 460 | |
| 461 | |
| 462 | endmodule |
| 463 | |
| 464 | |
| 465 | // |
| 466 | // and macro for ports = 2,3,4 |
| 467 | // |
| 468 | // |
| 469 | |
| 470 | |
| 471 | |
| 472 | |
| 473 | |
| 474 | module l2t_vuadcl_dp_and_macro__dinv_16x__stack_8c__width_8 ( |
| 475 | din0, |
| 476 | din1, |
| 477 | dout); |
| 478 | input [7:0] din0; |
| 479 | input [7:0] din1; |
| 480 | output [7:0] dout; |
| 481 | |
| 482 | |
| 483 | |
| 484 | |
| 485 | |
| 486 | |
| 487 | and2 #(8) d0_0 ( |
| 488 | .in0(din0[7:0]), |
| 489 | .in1(din1[7:0]), |
| 490 | .out(dout[7:0]) |
| 491 | ); |
| 492 | |
| 493 | |
| 494 | |
| 495 | |
| 496 | |
| 497 | |
| 498 | |
| 499 | |
| 500 | |
| 501 | endmodule |
| 502 | |
| 503 | |
| 504 | |
| 505 | |