| 1 | source -echo -verbose $dv_root/design/sys/synopsys/script/project_io_cfg.scr |
| 2 | |
| 3 | set rtl_files {\ |
| 4 | libs/cl/cl_rtl_ext.v |
| 5 | libs/cl/cl_a1/cl_a1.behV |
| 6 | libs/cl/cl_u1/cl_u1.behV |
| 7 | libs/cl/cl_dp1/cl_dp1.behV |
| 8 | libs/cl/cl_sc1/cl_sc1.behV |
| 9 | libs/cl/cl_mc1/cl_mc1.v |
| 10 | |
| 11 | libs/clk/rtl/clkgen_mac_io.v |
| 12 | |
| 13 | libs/clk/n2_clk_pgrid_cust_l/n2_clk_mac_io_cust/rtl/n2_clk_mac_io_cust.v |
| 14 | libs/clk/n2_clk_clstr_hdr_cust_l/n2_clk_clstr_hdr_cust/rtl/n2_clk_clstr_hdr_cust.v |
| 15 | |
| 16 | design/sys/iop/niu/rtl/df1.v \ |
| 17 | design/sys/iop/niu/rtl/dffe.v \ |
| 18 | design/sys/iop/niu/rtl/dffr.v \ |
| 19 | design/sys/iop/niu/rtl/dffre.v \ |
| 20 | |
| 21 | design/sys/iop/mac/rtl/mac.v \ |
| 22 | design/sys/iop/niu/rtl/xmac.h \ |
| 23 | design/sys/iop/niu/rtl/mif.h \ |
| 24 | design/sys/iop/niu/rtl/pcs_define.h \ |
| 25 | design/sys/iop/niu/rtl/mac_core.v \ |
| 26 | design/sys/iop/niu/rtl/n2_txd_blatch.v \ |
| 27 | design/sys/iop/niu/rtl/n2_rxd_alatch.v \ |
| 28 | design/sys/iop/niu/rtl/mac_2ports.v \ |
| 29 | design/sys/iop/niu/rtl/sphy_dpath2.v \ |
| 30 | design/sys/iop/niu/rtl/esr_ctl2.v \ |
| 31 | design/sys/iop/niu/rtl/clkgen_mac.v \ |
| 32 | design/sys/iop/niu/rtl/phy_clock_2ports.v \ |
| 33 | design/sys/iop/niu/rtl/mac_pio_intf.v \ |
| 34 | design/sys/iop/niu/rtl/mac_clk_driver.v \ |
| 35 | design/sys/iop/niu/rtl/xmac_2pcs_core.v \ |
| 36 | design/sys/iop/niu/rtl/esr_bscan.v \ |
| 37 | design/sys/iop/niu/rtl/mac_reset_hdr.v \ |
| 38 | design/sys/iop/niu/rtl/phy_dpath.v \ |
| 39 | design/sys/iop/niu/rtl/mif.v \ |
| 40 | design/sys/iop/niu/rtl/mif_control_sm.v \ |
| 41 | design/sys/iop/niu/rtl/mif_exec_sm.v \ |
| 42 | design/sys/iop/niu/rtl/lib.v \ |
| 43 | design/sys/iop/niu/rtl/xmac_2pcs_clk_mux.v \ |
| 44 | design/sys/iop/niu/rtl/rgmii_clk_gen.v \ |
| 45 | design/sys/iop/niu/rtl/xmac.h |
| 46 | design/sys/iop/niu/rtl/lfs.v \ |
| 47 | design/sys/iop/niu/rtl/lfs_sm.v \ |
| 48 | design/sys/iop/niu/rtl/address_decoder.v \ |
| 49 | design/sys/iop/niu/rtl/xrlm_sm.v \ |
| 50 | design/sys/iop/niu/rtl/rx_xdecap.v \ |
| 51 | design/sys/iop/niu/rtl/xmac_fcs.v \ |
| 52 | design/sys/iop/niu/rtl/crc_gen_xmii.v \ |
| 53 | design/sys/iop/niu/rtl/rx_xmac.v \ |
| 54 | design/sys/iop/niu/rtl/rx_xgmii_intf.v \ |
| 55 | design/sys/iop/niu/rtl/sop_sm.v \ |
| 56 | design/sys/iop/niu/rtl/rxfifo_load.v \ |
| 57 | design/sys/iop/niu/rtl/srfifo_load.v \ |
| 58 | design/sys/iop/niu/rtl/rxfifo_unload.v \ |
| 59 | design/sys/iop/niu/rtl/xmac_slv.v \ |
| 60 | design/sys/iop/niu/rtl/xmac_sync.v \ |
| 61 | design/sys/iop/niu/rtl/xdeferral.v \ |
| 62 | design/sys/iop/niu/rtl/xtlm_sm.v \ |
| 63 | design/sys/iop/niu/rtl/txfifo_unload.v \ |
| 64 | design/sys/iop/niu/rtl/txfifo_load.v \ |
| 65 | design/sys/iop/niu/rtl/tx_xmac.v \ |
| 66 | design/sys/iop/niu/rtl/tx_byte_counter.v \ |
| 67 | design/sys/iop/niu/rtl/ipg_checker.v \ |
| 68 | design/sys/iop/niu/rtl/tx_mii_gmii.v \ |
| 69 | design/sys/iop/niu/rtl/rx_mii_gmii.v \ |
| 70 | design/sys/iop/niu/rtl/mgrlm_sm.v \ |
| 71 | design/sys/iop/niu/rtl/xmac.v \ |
| 72 | design/sys/iop/niu/rtl/xpcs_define.v \ |
| 73 | design/sys/iop/niu/rtl/xpcs.v \ |
| 74 | design/sys/iop/niu/rtl/xpcs_dbg.v \ |
| 75 | design/sys/iop/niu/rtl/xpcs_xgmii_dpath.v \ |
| 76 | design/sys/iop/niu/rtl/xpcs_FD1.v \ |
| 77 | design/sys/iop/niu/rtl/xpcs_SYNC_CELL.v \ |
| 78 | design/sys/iop/niu/rtl/xpcs_dpath.v \ |
| 79 | design/sys/iop/niu/rtl/xpcs_pio.v \ |
| 80 | design/sys/iop/niu/rtl/xpcs_sync.v \ |
| 81 | design/sys/iop/niu/rtl/xpcs_rx.v \ |
| 82 | design/sys/iop/niu/rtl/xpcs_tx_del.v \ |
| 83 | design/sys/iop/niu/rtl/xpcs_tx_randomizer.v \ |
| 84 | design/sys/iop/niu/rtl/xpcs_tx.v \ |
| 85 | design/sys/iop/niu/rtl/xpcs_DEL05.v \ |
| 86 | design/sys/iop/niu/rtl/xpcs_txio.v \ |
| 87 | design/sys/iop/niu/rtl/xpcs_txio_pcs.v \ |
| 88 | design/sys/iop/niu/rtl/xpcs_rxio.v \ |
| 89 | design/sys/iop/niu/rtl/xpcs_rxio_ebuffer.v \ |
| 90 | design/sys/iop/niu/rtl/xpcs_rxio_ebuffer_sm.v \ |
| 91 | design/sys/iop/niu/rtl/xpcs_rxio_sync.v \ |
| 92 | design/sys/iop/niu/rtl/xpcs_rxio_sync_decoder.v \ |
| 93 | design/sys/iop/niu/rtl/xpcs_rxio_sync_deskew_fifo.v \ |
| 94 | design/sys/iop/niu/rtl/xpcs_rxio_sync_fifo_ptr.v \ |
| 95 | design/sys/iop/niu/rtl/xpcs_rxio_sync_sm.v \ |
| 96 | design/sys/iop/niu/rtl/pcs.v \ |
| 97 | design/sys/iop/niu/rtl/pcs_decoder.v \ |
| 98 | design/sys/iop/niu/rtl/pcs_encoder.v \ |
| 99 | design/sys/iop/niu/rtl/pcs_lfsr.v \ |
| 100 | design/sys/iop/niu/rtl/pcs_link_config.v \ |
| 101 | design/sys/iop/niu/rtl/pcs_rx_ctrl.v \ |
| 102 | design/sys/iop/niu/rtl/pcs_rx_disparity.v \ |
| 103 | design/sys/iop/niu/rtl/pcs_rx_dpath.v \ |
| 104 | design/sys/iop/niu/rtl/pcs_sequence_detect.v \ |
| 105 | design/sys/iop/niu/rtl/pcs_slave.v \ |
| 106 | design/sys/iop/niu/rtl/pcs_tx_ctrl.v \ |
| 107 | design/sys/iop/niu/rtl/pcs_tx_disparity.v \ |
| 108 | design/sys/iop/niu/rtl/pcs_tx_dpath.v \ |
| 109 | |
| 110 | design/sys/iop/niu/rtl/niu_dff.v \ |
| 111 | design/sys/iop/niu/rtl/make_b8_macro.v \ |
| 112 | design/sys/iop/niu/rtl/hedwig.v \ |
| 113 | design/sys/iop/niu/rtl/MDIO2P_IO.v \ |
| 114 | design/sys/iop/niu/rtl/P2REGS.v \ |
| 115 | design/sys/iop/niu/rtl/P2REGS_CFG_STS.v \ |
| 116 | design/sys/iop/niu/rtl/MDIO_TO_REGS.v \ |
| 117 | design/sys/iop/niu/rtl/MDIO2P.v \ |
| 118 | design/sys/iop/niu/rtl/MDIO2P_FRMR.v \ |
| 119 | design/sys/iop/niu/rtl/MDIO2P_REGS.v \ |
| 120 | } |
| 121 | |
| 122 | set link_library [concat $link_library \ |
| 123 | dw_foundation.sldb \ |
| 124 | ] |
| 125 | |
| 126 | |
| 127 | set mix_files {} |
| 128 | set top_module mac |
| 129 | |
| 130 | set include_paths {\ |
| 131 | } |
| 132 | |
| 133 | set black_box_libs {} |
| 134 | set black_box_designs {} |
| 135 | set mem_libs {} |
| 136 | |
| 137 | set dont_touch_modules {\ |
| 138 | } |
| 139 | |
| 140 | set compile_effort "medium" |
| 141 | |
| 142 | set compile_flatten_all 1 |
| 143 | |
| 144 | set compile_no_new_cells_at_top_level false |
| 145 | |
| 146 | set default_clk cmp_gclk_c1_mac |
| 147 | set default_clk_freq 1500 |
| 148 | set default_setup_skew 0.0 |
| 149 | set default_hold_skew 0.0 |
| 150 | set default_clk_transition 0.05 |
| 151 | set clk_list { \ |
| 152 | { cmp_gclk_c1_mac 1500.0 0.000 0.000 0.05} \ |
| 153 | } |
| 154 | |
| 155 | set ideal_net_list {} |
| 156 | set false_path_list {} |
| 157 | set enforce_input_fanout_one 0 |
| 158 | set allow_outport_drive_innodes 1 |
| 159 | set skip_scan 0 |
| 160 | set add_lockup_latch false |
| 161 | set chain_count 1 |
| 162 | set scanin_port_list {} |
| 163 | set scanout_port_list {} |
| 164 | set scanenable_port global_shift_enable |
| 165 | set has_test_stub 1 |
| 166 | set scanenable_pin test_stub_no_bist/se |
| 167 | set long_chain_so_0_net long_chain_so_0 |
| 168 | set short_chain_so_0_net short_chain_so_0 |
| 169 | set so_0_net so_0 |
| 170 | set insert_extra_lockup_latch 0 |
| 171 | set extra_lockup_latch_clk_list {} |