| 1 | // ========== Copyright Header Begin ========================================== |
| 2 | // |
| 3 | // OpenSPARC T2 Processor File: niu_rw_ctl.v |
| 4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved |
| 5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. |
| 6 | // |
| 7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 8 | // |
| 9 | // This program is free software; you can redistribute it and/or modify |
| 10 | // it under the terms of the GNU General Public License as published by |
| 11 | // the Free Software Foundation; version 2 of the License. |
| 12 | // |
| 13 | // This program is distributed in the hope that it will be useful, |
| 14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | // GNU General Public License for more details. |
| 17 | // |
| 18 | // You should have received a copy of the GNU General Public License |
| 19 | // along with this program; if not, write to the Free Software |
| 20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 21 | // |
| 22 | // For the avoidance of doubt, and except that if any non-GPL license |
| 23 | // choice is available it will apply instead, Sun elects to use only |
| 24 | // the General Public License version 2 (GPLv2) at this time for any |
| 25 | // software where a choice of GPL license versions is made |
| 26 | // available with the language indicating that GPLv2 or any later version |
| 27 | // may be used, or where a choice of which version of the GPL is applied is |
| 28 | // otherwise unspecified. |
| 29 | // |
| 30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
| 31 | // CA 95054 USA or visit www.sun.com if you need additional information or |
| 32 | // have any questions. |
| 33 | // |
| 34 | // ========== Copyright Header End ============================================ |
| 35 | /*%W% %G%*/ |
| 36 | |
| 37 | /***************************************************************** |
| 38 | * |
| 39 | * File Name : niu_rw_ctl.v |
| 40 | * Author Name : John Lo |
| 41 | * Description : It contains PIO read/write decoder, registers, |
| 42 | * |
| 43 | * Parent Module: |
| 44 | * Child Module: |
| 45 | * Interface Mod: many. |
| 46 | * Date Created : 3/30/04 |
| 47 | * |
| 48 | * Copyright (c) 2020, Sun Microsystems, Inc. |
| 49 | * Sun Proprietary and Confidential |
| 50 | * |
| 51 | * Modification : This is of /vobs/neptune/deisgn/niu/pio/rtl/niu_rw_ctl.v.main_5 |
| 52 | * |
| 53 | ****************************************************************/ |
| 54 | |
| 55 | module niu_rw_ctl (/*AUTOARG*/ |
| 56 | // Outputs |
| 57 | wr_en, rd_en, ack, rdata, err, rasr, |
| 58 | // Inputs |
| 59 | clk, sel, rd, rd_data, non_qualified_addr_err |
| 60 | ); |
| 61 | input clk; |
| 62 | input sel; |
| 63 | input rd; |
| 64 | input [63:0] rd_data; |
| 65 | input non_qualified_addr_err; |
| 66 | |
| 67 | output wr_en; |
| 68 | output rd_en; |
| 69 | output ack; |
| 70 | output [63:0] rdata; |
| 71 | output err; |
| 72 | output rasr; // read auto set/rst |
| 73 | |
| 74 | /* ----------- Read and Write logic ------------------------ */ |
| 75 | |
| 76 | |
| 77 | wire rasr; |
| 78 | wire rasr_ok; |
| 79 | wire addr_err; |
| 80 | wire [63:0] rdata; |
| 81 | wire [63:0] rd_data; |
| 82 | wire rd_en; |
| 83 | wire wr_en; |
| 84 | wire sel_lead; |
| 85 | wire sel_trail ; |
| 86 | |
| 87 | niu_pls_gen2 sel_pls_gen2(.sig_in(sel),.clk(clk), |
| 88 | .lead(sel_lead), |
| 89 | .trail(sel_trail)); |
| 90 | |
| 91 | assign rd_en = sel & rd; |
| 92 | assign rasr_ok = sel_lead & rd; |
| 93 | assign wr_en = sel_lead & (~rd); |
| 94 | |
| 95 | df1 #(1) ras_pls_df1 (.clk(clk), |
| 96 | .d(rasr_ok), |
| 97 | .q(rasr)); |
| 98 | |
| 99 | // register pio output signals |
| 100 | df1 #(64) rdata_df1 (.clk(clk), |
| 101 | .d(rd_data[63:0]), |
| 102 | .q(rdata[63:0])); |
| 103 | |
| 104 | df1 #(1) ack_df1 (.clk(clk), |
| 105 | .d(sel_lead), |
| 106 | .q(ack)); |
| 107 | |
| 108 | assign addr_err = non_qualified_addr_err & sel_lead; |
| 109 | |
| 110 | df1 #(1) err_df1 (.clk(clk), |
| 111 | .d(addr_err), |
| 112 | .q(err)); |
| 113 | |
| 114 | endmodule // niu_rw_ctl |
| 115 | |
| 116 | |
| 117 | // /*%W% %G%*/ |
| 118 | |
| 119 | /***************************************************************** |
| 120 | * |
| 121 | * File Name : niu_rw_ctl.v |
| 122 | * Author Name : John Lo |
| 123 | * Description : It contains PIO read/write decoder, registers, |
| 124 | * |
| 125 | * Parent Module: |
| 126 | * Child Module: |
| 127 | * Interface Mod: many. |
| 128 | * Date Created : 3/30/04 |
| 129 | * |
| 130 | * Copyright (c) 2020, Sun Microsystems, Inc. |
| 131 | * Sun Proprietary and Confidential |
| 132 | * |
| 133 | * Modification : This is of /vobs/neptune/deisgn/niu/pio/rtl/niu_rw_ctl.v.main_5 |
| 134 | * + niu_pio_eco_r3, for niu_pio_slv_decoder ONLY. |
| 135 | ****************************************************************/ |
| 136 | |
| 137 | module niu_rw_ctl_0 (/*AUTOARG*/ |
| 138 | // Outputs |
| 139 | wr_en, rd_en, ack, rdata, err, rasr, |
| 140 | // Inputs |
| 141 | clk, sel, rd, rd_data, non_qualified_addr_err |
| 142 | ); |
| 143 | input clk; |
| 144 | input sel; |
| 145 | input rd; |
| 146 | input [63:0] rd_data; |
| 147 | input non_qualified_addr_err; |
| 148 | |
| 149 | output wr_en; |
| 150 | output rd_en; |
| 151 | output ack; |
| 152 | output [63:0] rdata; |
| 153 | output err; |
| 154 | output rasr; // read auto set/rst |
| 155 | |
| 156 | /* ----------- Read and Write logic ------------------------ */ |
| 157 | |
| 158 | |
| 159 | wire rasr; |
| 160 | wire rasr_ok; |
| 161 | wire addr_err; |
| 162 | wire [63:0] rdata; |
| 163 | wire [63:0] rd_data; |
| 164 | wire rd_en; |
| 165 | wire wr_en; |
| 166 | wire sel_lead; |
| 167 | wire sel_trail ; |
| 168 | |
| 169 | niu_pls_gen2 sel_pls_gen2(.sig_in(sel),.clk(clk), |
| 170 | .lead(sel_lead), |
| 171 | .trail(sel_trail)); |
| 172 | |
| 173 | assign rd_en = sel & rd; |
| 174 | assign rasr_ok = sel_lead & rd; |
| 175 | assign wr_en = sel_lead & (~rd); |
| 176 | |
| 177 | df1 #(1) ras_pls_df1 (.clk(clk), |
| 178 | .d(rasr_ok), |
| 179 | .q(rasr)); |
| 180 | |
| 181 | /* geo_niu_pio_eco_r3 */ |
| 182 | /* fix dev_funcID 1 read behind, bugID: 119443, skip a flop for bit[17:16] */ |
| 183 | wire rdata_t17, rdata_t16; |
| 184 | |
| 185 | assign rdata[17:16] = rd_data[17:16]; |
| 186 | |
| 187 | // register pio output signals |
| 188 | df1 #(64) rdata_df1 (.clk(clk), |
| 189 | .d(rd_data[63:0]), |
| 190 | /* geo_niu_pio_eco_r3 */.q({rdata[63:18],rdata_t17,rdata_t16,rdata[15:0]})); |
| 191 | |
| 192 | df1 #(1) ack_df1 (.clk(clk), |
| 193 | .d(sel_lead), |
| 194 | .q(ack)); |
| 195 | |
| 196 | assign addr_err = non_qualified_addr_err & sel_lead; |
| 197 | |
| 198 | df1 #(1) err_df1 (.clk(clk), |
| 199 | .d(addr_err), |
| 200 | .q(err)); |
| 201 | |
| 202 | endmodule // niu_rw_ctl_0 |