| 1 | // ========== Copyright Header Begin ========================================== |
| 2 | // |
| 3 | // OpenSPARC T2 Processor File: niu_zcp_ififo.v |
| 4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved |
| 5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. |
| 6 | // |
| 7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 8 | // |
| 9 | // This program is free software; you can redistribute it and/or modify |
| 10 | // it under the terms of the GNU General Public License as published by |
| 11 | // the Free Software Foundation; version 2 of the License. |
| 12 | // |
| 13 | // This program is distributed in the hope that it will be useful, |
| 14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | // GNU General Public License for more details. |
| 17 | // |
| 18 | // You should have received a copy of the GNU General Public License |
| 19 | // along with this program; if not, write to the Free Software |
| 20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 21 | // |
| 22 | // For the avoidance of doubt, and except that if any non-GPL license |
| 23 | // choice is available it will apply instead, Sun elects to use only |
| 24 | // the General Public License version 2 (GPLv2) at this time for any |
| 25 | // software where a choice of GPL license versions is made |
| 26 | // available with the language indicating that GPLv2 or any later version |
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| 31 | // CA 95054 USA or visit www.sun.com if you need additional information or |
| 32 | // have any questions. |
| 33 | // |
| 34 | // ========== Copyright Header End ============================================ |
| 35 | /*%W% %G%*/ |
| 36 | |
| 37 | /************************************************************************* |
| 38 | * |
| 39 | * File Name : niu_zcp_ififo.v |
| 40 | * Author Name : John Lo |
| 41 | * Description : fflp to zcp input fifo (ififo) |
| 42 | * Parent Module: |
| 43 | * Child Module: |
| 44 | * Interface Mod: |
| 45 | * Date Created : 3/18/2005 |
| 46 | * |
| 47 | * Copyright (c) 2020, Sun Microsystems, Inc. |
| 48 | * Sun Proprietary and Confidential |
| 49 | * |
| 50 | * Modification : |
| 51 | * |
| 52 | * Synthesis Notes: |
| 53 | * |
| 54 | *************************************************************************/ |
| 55 | |
| 56 | `include "niu_zcp.h" |
| 57 | |
| 58 | module niu_zcp_ififo |
| 59 | (/*AUTOARG*/ |
| 60 | // Outputs |
| 61 | ififo_dout, empty, ififo_overrun, |
| 62 | // Inputs |
| 63 | clk, reset, ififo_ren1, fflp_zcp_wr, fflp_zcp_data |
| 64 | ); |
| 65 | |
| 66 | |
| 67 | |
| 68 | input clk; |
| 69 | input [4:0] reset; |
| 70 | input ififo_ren1; |
| 71 | // fflp intf |
| 72 | input [4:0] fflp_zcp_wr; |
| 73 | input [`IFIFO_W_R] fflp_zcp_data;// 27 bytes = 216 bits |
| 74 | output [`IFIFO_W_R] ififo_dout; |
| 75 | output empty; |
| 76 | output ififo_overrun; |
| 77 | |
| 78 | /* ----- ififo pointer management ----------------------- */ |
| 79 | reg [`IFIFO_W_R] ififo_dout; |
| 80 | wire [`IFIFO_PTR] rp; |
| 81 | wire [`IFIFO_PTR] wp; |
| 82 | wire full; |
| 83 | wire empty; |
| 84 | wire [3:0] wen; |
| 85 | wire ififo_overrun; |
| 86 | // vlint flag_dangling_net_within_module off |
| 87 | // vlint flag_net_has_no_load off |
| 88 | wire fflp_wr_err = ~(&fflp_zcp_wr); |
| 89 | // vlint flag_net_has_no_load on |
| 90 | // vlint flag_dangling_net_within_module on |
| 91 | |
| 92 | assign wen[0] = fflp_zcp_wr[0] & (wp[1:0] == 2'h0); // wp == 0 |
| 93 | assign wen[1] = fflp_zcp_wr[1] & (wp[1:0] == 2'h1); // wp == 1 |
| 94 | assign wen[2] = fflp_zcp_wr[2] & (wp[1:0] == 2'h2); // wp == 2 |
| 95 | assign wen[3] = fflp_zcp_wr[3] & (wp[1:0] == 2'h3); // wp == 3 |
| 96 | assign ififo_overrun = full & fflp_zcp_wr[4]; |
| 97 | |
| 98 | zcp_counter #(`IFIFO_A_ADD1) wp_counter ( |
| 99 | .reset(reset[0]),.clk(clk),.ce(fflp_zcp_wr[4]), |
| 100 | .count(wp[`IFIFO_PTR])); |
| 101 | |
| 102 | zcp_counter #(`IFIFO_A_ADD1) rp_counter ( |
| 103 | .reset(reset[0]),.clk(clk),.ce(ififo_ren1), |
| 104 | .count(rp[`IFIFO_PTR])); |
| 105 | |
| 106 | // synopsys translate_off |
| 107 | // vlint flag_dangling_net_within_module off |
| 108 | // vlint flag_net_has_no_load off |
| 109 | wire [`IFIFO_PTR] empty_space = |
| 110 | (wp[`IFIFO_A] == rp[`IFIFO_A]) ? |
| 111 | `IFIFO_D - ({1'b0,wp[`IFIFO_A_R]} - {1'b0,rp[`IFIFO_A_R]}): |
| 112 | ({1'b0,rp[`IFIFO_A_R]} - {1'b0,wp[`IFIFO_A_R]}); |
| 113 | // vlint flag_net_has_no_load on |
| 114 | // vlint flag_dangling_net_within_module on |
| 115 | // synopsys translate_on |
| 116 | |
| 117 | assign full= |
| 118 | (wp[`IFIFO_A]==(!rp[`IFIFO_A])) && |
| 119 | (wp[`IFIFO_A_R]==rp[`IFIFO_A_R]); |
| 120 | |
| 121 | assign empty= |
| 122 | (wp[`IFIFO_PTR]==rp[`IFIFO_PTR]); |
| 123 | |
| 124 | /* ----- end of ififo pointer management ------------------- */ |
| 125 | |
| 126 | /* ----- ififo instantiation ------------------------------ */ |
| 127 | wire [`IFIFO_W_R] wd0; |
| 128 | wire [`IFIFO_W_R] wd1; |
| 129 | wire [`IFIFO_W_R] wd2; |
| 130 | wire [`IFIFO_W_R] wd3; |
| 131 | |
| 132 | zcp_xREG #(`IFIFO_W) wd0_xREG(.clk(clk),.reset(reset[1]),.en(wen[0]),.din(fflp_zcp_data[`IFIFO_W_R]), .qout(wd0[`IFIFO_W_R])); |
| 133 | zcp_xREG #(`IFIFO_W) wd1_xREG(.clk(clk),.reset(reset[2]),.en(wen[1]),.din(fflp_zcp_data[`IFIFO_W_R]), .qout(wd1[`IFIFO_W_R])); |
| 134 | zcp_xREG #(`IFIFO_W) wd2_xREG(.clk(clk),.reset(reset[3]),.en(wen[2]),.din(fflp_zcp_data[`IFIFO_W_R]), .qout(wd2[`IFIFO_W_R])); |
| 135 | zcp_xREG #(`IFIFO_W) wd3_xREG(.clk(clk),.reset(reset[4]),.en(wen[3]),.din(fflp_zcp_data[`IFIFO_W_R]), .qout(wd3[`IFIFO_W_R])); |
| 136 | |
| 137 | always @ (rp or wd0 or wd1 or wd2 or wd3) |
| 138 | begin |
| 139 | casex (rp[1:0]) // synopsys parallel_case full_case infer_mux |
| 140 | 2'h0: ififo_dout[`IFIFO_W_R] = wd0; |
| 141 | 2'h1: ififo_dout[`IFIFO_W_R] = wd1; |
| 142 | 2'h2: ififo_dout[`IFIFO_W_R] = wd2; |
| 143 | 2'h3: ififo_dout[`IFIFO_W_R] = wd3; |
| 144 | default: ififo_dout[`IFIFO_W_R] = wd0; |
| 145 | endcase |
| 146 | end |
| 147 | |
| 148 | |
| 149 | |
| 150 | endmodule // niu_zcp_ififo |
| 151 | |