| 1 | // ========== Copyright Header Begin ========================================== |
| 2 | // |
| 3 | // OpenSPARC T2 Processor File: rdp_n2_efuhdr4a_spare_ctl_macro__num_4.v |
| 4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved |
| 5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. |
| 6 | // |
| 7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 8 | // |
| 9 | // This program is free software; you can redistribute it and/or modify |
| 10 | // it under the terms of the GNU General Public License as published by |
| 11 | // the Free Software Foundation; version 2 of the License. |
| 12 | // |
| 13 | // This program is distributed in the hope that it will be useful, |
| 14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | // GNU General Public License for more details. |
| 17 | // |
| 18 | // You should have received a copy of the GNU General Public License |
| 19 | // along with this program; if not, write to the Free Software |
| 20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 21 | // |
| 22 | // For the avoidance of doubt, and except that if any non-GPL license |
| 23 | // choice is available it will apply instead, Sun elects to use only |
| 24 | // the General Public License version 2 (GPLv2) at this time for any |
| 25 | // software where a choice of GPL license versions is made |
| 26 | // available with the language indicating that GPLv2 or any later version |
| 27 | // may be used, or where a choice of which version of the GPL is applied is |
| 28 | // otherwise unspecified. |
| 29 | // |
| 30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
| 31 | // CA 95054 USA or visit www.sun.com if you need additional information or |
| 32 | // have any questions. |
| 33 | // |
| 34 | // ========== Copyright Header End ============================================ |
| 35 | |
| 36 | // Description: Spare gate macro for control blocks |
| 37 | // |
| 38 | // Param num controls the number of times the macro is added |
| 39 | // flops=0 can be used to use only combination spare logic |
| 40 | |
| 41 | |
| 42 | module rdp_n2_efuhdr4a_spare_ctl_macro__num_4 ( |
| 43 | l1clk, |
| 44 | scan_in, |
| 45 | siclk, |
| 46 | soclk, |
| 47 | scan_out); |
| 48 | wire si_0; |
| 49 | wire so_0; |
| 50 | wire spare0_flop_unused; |
| 51 | wire spare0_buf_32x_unused; |
| 52 | wire spare0_nand3_8x_unused; |
| 53 | wire spare0_inv_8x_unused; |
| 54 | wire spare0_aoi22_4x_unused; |
| 55 | wire spare0_buf_8x_unused; |
| 56 | wire spare0_oai22_4x_unused; |
| 57 | wire spare0_inv_16x_unused; |
| 58 | wire spare0_nand2_16x_unused; |
| 59 | wire spare0_nor3_4x_unused; |
| 60 | wire spare0_nand2_8x_unused; |
| 61 | wire spare0_buf_16x_unused; |
| 62 | wire spare0_nor2_16x_unused; |
| 63 | wire spare0_inv_32x_unused; |
| 64 | wire si_1; |
| 65 | wire so_1; |
| 66 | wire spare1_flop_unused; |
| 67 | wire spare1_buf_32x_unused; |
| 68 | wire spare1_nand3_8x_unused; |
| 69 | wire spare1_inv_8x_unused; |
| 70 | wire spare1_aoi22_4x_unused; |
| 71 | wire spare1_buf_8x_unused; |
| 72 | wire spare1_oai22_4x_unused; |
| 73 | wire spare1_inv_16x_unused; |
| 74 | wire spare1_nand2_16x_unused; |
| 75 | wire spare1_nor3_4x_unused; |
| 76 | wire spare1_nand2_8x_unused; |
| 77 | wire spare1_buf_16x_unused; |
| 78 | wire spare1_nor2_16x_unused; |
| 79 | wire spare1_inv_32x_unused; |
| 80 | wire si_2; |
| 81 | wire so_2; |
| 82 | wire spare2_flop_unused; |
| 83 | wire spare2_buf_32x_unused; |
| 84 | wire spare2_nand3_8x_unused; |
| 85 | wire spare2_inv_8x_unused; |
| 86 | wire spare2_aoi22_4x_unused; |
| 87 | wire spare2_buf_8x_unused; |
| 88 | wire spare2_oai22_4x_unused; |
| 89 | wire spare2_inv_16x_unused; |
| 90 | wire spare2_nand2_16x_unused; |
| 91 | wire spare2_nor3_4x_unused; |
| 92 | wire spare2_nand2_8x_unused; |
| 93 | wire spare2_buf_16x_unused; |
| 94 | wire spare2_nor2_16x_unused; |
| 95 | wire spare2_inv_32x_unused; |
| 96 | wire si_3; |
| 97 | wire so_3; |
| 98 | wire spare3_flop_unused; |
| 99 | wire spare3_buf_32x_unused; |
| 100 | wire spare3_nand3_8x_unused; |
| 101 | wire spare3_inv_8x_unused; |
| 102 | wire spare3_aoi22_4x_unused; |
| 103 | wire spare3_buf_8x_unused; |
| 104 | wire spare3_oai22_4x_unused; |
| 105 | wire spare3_inv_16x_unused; |
| 106 | wire spare3_nand2_16x_unused; |
| 107 | wire spare3_nor3_4x_unused; |
| 108 | wire spare3_nand2_8x_unused; |
| 109 | wire spare3_buf_16x_unused; |
| 110 | wire spare3_nor2_16x_unused; |
| 111 | wire spare3_inv_32x_unused; |
| 112 | |
| 113 | |
| 114 | input l1clk; |
| 115 | input scan_in; |
| 116 | input siclk; |
| 117 | input soclk; |
| 118 | output scan_out; |
| 119 | |
| 120 | cl_a1_msff_8x spare0_flop (.l1clk(l1clk), |
| 121 | .siclk(siclk), |
| 122 | .soclk(soclk), |
| 123 | .si(si_0), |
| 124 | .so(so_0), |
| 125 | .d(1'b0), |
| 126 | .q(spare0_flop_unused)); |
| 127 | assign si_0 = scan_in; |
| 128 | |
| 129 | cl_a1_buf_32x spare0_buf_32x (.in(1'b1), |
| 130 | .out(spare0_buf_32x_unused)); |
| 131 | cl_a1_nand3_8x spare0_nand3_8x (.in0(1'b1), |
| 132 | .in1(1'b1), |
| 133 | .in2(1'b1), |
| 134 | .out(spare0_nand3_8x_unused)); |
| 135 | cl_a1_inv_8x spare0_inv_8x (.in(1'b1), |
| 136 | .out(spare0_inv_8x_unused)); |
| 137 | cl_a1_aoi22_4x spare0_aoi22_4x (.in00(1'b1), |
| 138 | .in01(1'b1), |
| 139 | .in10(1'b1), |
| 140 | .in11(1'b1), |
| 141 | .out(spare0_aoi22_4x_unused)); |
| 142 | cl_a1_buf_8x spare0_buf_8x (.in(1'b1), |
| 143 | .out(spare0_buf_8x_unused)); |
| 144 | cl_a1_oai22_4x spare0_oai22_4x (.in00(1'b1), |
| 145 | .in01(1'b1), |
| 146 | .in10(1'b1), |
| 147 | .in11(1'b1), |
| 148 | .out(spare0_oai22_4x_unused)); |
| 149 | cl_a1_inv_16x spare0_inv_16x (.in(1'b1), |
| 150 | .out(spare0_inv_16x_unused)); |
| 151 | cl_a1_nand2_16x spare0_nand2_16x (.in0(1'b1), |
| 152 | .in1(1'b1), |
| 153 | .out(spare0_nand2_16x_unused)); |
| 154 | cl_a1_nor3_4x spare0_nor3_4x (.in0(1'b0), |
| 155 | .in1(1'b0), |
| 156 | .in2(1'b0), |
| 157 | .out(spare0_nor3_4x_unused)); |
| 158 | cl_a1_nand2_8x spare0_nand2_8x (.in0(1'b1), |
| 159 | .in1(1'b1), |
| 160 | .out(spare0_nand2_8x_unused)); |
| 161 | cl_a1_buf_16x spare0_buf_16x (.in(1'b1), |
| 162 | .out(spare0_buf_16x_unused)); |
| 163 | cl_a1_nor2_16x spare0_nor2_16x (.in0(1'b0), |
| 164 | .in1(1'b0), |
| 165 | .out(spare0_nor2_16x_unused)); |
| 166 | cl_a1_inv_32x spare0_inv_32x (.in(1'b1), |
| 167 | .out(spare0_inv_32x_unused)); |
| 168 | |
| 169 | cl_a1_msff_8x spare1_flop (.l1clk(l1clk), |
| 170 | .siclk(siclk), |
| 171 | .soclk(soclk), |
| 172 | .si(si_1), |
| 173 | .so(so_1), |
| 174 | .d(1'b0), |
| 175 | .q(spare1_flop_unused)); |
| 176 | assign si_1 = so_0; |
| 177 | |
| 178 | cl_a1_buf_32x spare1_buf_32x (.in(1'b1), |
| 179 | .out(spare1_buf_32x_unused)); |
| 180 | cl_a1_nand3_8x spare1_nand3_8x (.in0(1'b1), |
| 181 | .in1(1'b1), |
| 182 | .in2(1'b1), |
| 183 | .out(spare1_nand3_8x_unused)); |
| 184 | cl_a1_inv_8x spare1_inv_8x (.in(1'b1), |
| 185 | .out(spare1_inv_8x_unused)); |
| 186 | cl_a1_aoi22_4x spare1_aoi22_4x (.in00(1'b1), |
| 187 | .in01(1'b1), |
| 188 | .in10(1'b1), |
| 189 | .in11(1'b1), |
| 190 | .out(spare1_aoi22_4x_unused)); |
| 191 | cl_a1_buf_8x spare1_buf_8x (.in(1'b1), |
| 192 | .out(spare1_buf_8x_unused)); |
| 193 | cl_a1_oai22_4x spare1_oai22_4x (.in00(1'b1), |
| 194 | .in01(1'b1), |
| 195 | .in10(1'b1), |
| 196 | .in11(1'b1), |
| 197 | .out(spare1_oai22_4x_unused)); |
| 198 | cl_a1_inv_16x spare1_inv_16x (.in(1'b1), |
| 199 | .out(spare1_inv_16x_unused)); |
| 200 | cl_a1_nand2_16x spare1_nand2_16x (.in0(1'b1), |
| 201 | .in1(1'b1), |
| 202 | .out(spare1_nand2_16x_unused)); |
| 203 | cl_a1_nor3_4x spare1_nor3_4x (.in0(1'b0), |
| 204 | .in1(1'b0), |
| 205 | .in2(1'b0), |
| 206 | .out(spare1_nor3_4x_unused)); |
| 207 | cl_a1_nand2_8x spare1_nand2_8x (.in0(1'b1), |
| 208 | .in1(1'b1), |
| 209 | .out(spare1_nand2_8x_unused)); |
| 210 | cl_a1_buf_16x spare1_buf_16x (.in(1'b1), |
| 211 | .out(spare1_buf_16x_unused)); |
| 212 | cl_a1_nor2_16x spare1_nor2_16x (.in0(1'b0), |
| 213 | .in1(1'b0), |
| 214 | .out(spare1_nor2_16x_unused)); |
| 215 | cl_a1_inv_32x spare1_inv_32x (.in(1'b1), |
| 216 | .out(spare1_inv_32x_unused)); |
| 217 | |
| 218 | cl_a1_msff_8x spare2_flop (.l1clk(l1clk), |
| 219 | .siclk(siclk), |
| 220 | .soclk(soclk), |
| 221 | .si(si_2), |
| 222 | .so(so_2), |
| 223 | .d(1'b0), |
| 224 | .q(spare2_flop_unused)); |
| 225 | assign si_2 = so_1; |
| 226 | |
| 227 | cl_a1_buf_32x spare2_buf_32x (.in(1'b1), |
| 228 | .out(spare2_buf_32x_unused)); |
| 229 | cl_a1_nand3_8x spare2_nand3_8x (.in0(1'b1), |
| 230 | .in1(1'b1), |
| 231 | .in2(1'b1), |
| 232 | .out(spare2_nand3_8x_unused)); |
| 233 | cl_a1_inv_8x spare2_inv_8x (.in(1'b1), |
| 234 | .out(spare2_inv_8x_unused)); |
| 235 | cl_a1_aoi22_4x spare2_aoi22_4x (.in00(1'b1), |
| 236 | .in01(1'b1), |
| 237 | .in10(1'b1), |
| 238 | .in11(1'b1), |
| 239 | .out(spare2_aoi22_4x_unused)); |
| 240 | cl_a1_buf_8x spare2_buf_8x (.in(1'b1), |
| 241 | .out(spare2_buf_8x_unused)); |
| 242 | cl_a1_oai22_4x spare2_oai22_4x (.in00(1'b1), |
| 243 | .in01(1'b1), |
| 244 | .in10(1'b1), |
| 245 | .in11(1'b1), |
| 246 | .out(spare2_oai22_4x_unused)); |
| 247 | cl_a1_inv_16x spare2_inv_16x (.in(1'b1), |
| 248 | .out(spare2_inv_16x_unused)); |
| 249 | cl_a1_nand2_16x spare2_nand2_16x (.in0(1'b1), |
| 250 | .in1(1'b1), |
| 251 | .out(spare2_nand2_16x_unused)); |
| 252 | cl_a1_nor3_4x spare2_nor3_4x (.in0(1'b0), |
| 253 | .in1(1'b0), |
| 254 | .in2(1'b0), |
| 255 | .out(spare2_nor3_4x_unused)); |
| 256 | cl_a1_nand2_8x spare2_nand2_8x (.in0(1'b1), |
| 257 | .in1(1'b1), |
| 258 | .out(spare2_nand2_8x_unused)); |
| 259 | cl_a1_buf_16x spare2_buf_16x (.in(1'b1), |
| 260 | .out(spare2_buf_16x_unused)); |
| 261 | cl_a1_nor2_16x spare2_nor2_16x (.in0(1'b0), |
| 262 | .in1(1'b0), |
| 263 | .out(spare2_nor2_16x_unused)); |
| 264 | cl_a1_inv_32x spare2_inv_32x (.in(1'b1), |
| 265 | .out(spare2_inv_32x_unused)); |
| 266 | |
| 267 | cl_a1_msff_8x spare3_flop (.l1clk(l1clk), |
| 268 | .siclk(siclk), |
| 269 | .soclk(soclk), |
| 270 | .si(si_3), |
| 271 | .so(so_3), |
| 272 | .d(1'b0), |
| 273 | .q(spare3_flop_unused)); |
| 274 | assign si_3 = so_2; |
| 275 | |
| 276 | cl_a1_buf_32x spare3_buf_32x (.in(1'b1), |
| 277 | .out(spare3_buf_32x_unused)); |
| 278 | cl_a1_nand3_8x spare3_nand3_8x (.in0(1'b1), |
| 279 | .in1(1'b1), |
| 280 | .in2(1'b1), |
| 281 | .out(spare3_nand3_8x_unused)); |
| 282 | cl_a1_inv_8x spare3_inv_8x (.in(1'b1), |
| 283 | .out(spare3_inv_8x_unused)); |
| 284 | cl_a1_aoi22_4x spare3_aoi22_4x (.in00(1'b1), |
| 285 | .in01(1'b1), |
| 286 | .in10(1'b1), |
| 287 | .in11(1'b1), |
| 288 | .out(spare3_aoi22_4x_unused)); |
| 289 | cl_a1_buf_8x spare3_buf_8x (.in(1'b1), |
| 290 | .out(spare3_buf_8x_unused)); |
| 291 | cl_a1_oai22_4x spare3_oai22_4x (.in00(1'b1), |
| 292 | .in01(1'b1), |
| 293 | .in10(1'b1), |
| 294 | .in11(1'b1), |
| 295 | .out(spare3_oai22_4x_unused)); |
| 296 | cl_a1_inv_16x spare3_inv_16x (.in(1'b1), |
| 297 | .out(spare3_inv_16x_unused)); |
| 298 | cl_a1_nand2_16x spare3_nand2_16x (.in0(1'b1), |
| 299 | .in1(1'b1), |
| 300 | .out(spare3_nand2_16x_unused)); |
| 301 | cl_a1_nor3_4x spare3_nor3_4x (.in0(1'b0), |
| 302 | .in1(1'b0), |
| 303 | .in2(1'b0), |
| 304 | .out(spare3_nor3_4x_unused)); |
| 305 | cl_a1_nand2_8x spare3_nand2_8x (.in0(1'b1), |
| 306 | .in1(1'b1), |
| 307 | .out(spare3_nand2_8x_unused)); |
| 308 | cl_a1_buf_16x spare3_buf_16x (.in(1'b1), |
| 309 | .out(spare3_buf_16x_unused)); |
| 310 | cl_a1_nor2_16x spare3_nor2_16x (.in0(1'b0), |
| 311 | .in1(1'b0), |
| 312 | .out(spare3_nor2_16x_unused)); |
| 313 | cl_a1_inv_32x spare3_inv_32x (.in(1'b1), |
| 314 | .out(spare3_inv_32x_unused)); |
| 315 | assign scan_out = so_3; |
| 316 | |
| 317 | |
| 318 | |
| 319 | endmodule |