| 1 | // ========== Copyright Header Begin ========================================== |
| 2 | // |
| 3 | // OpenSPARC T2 Processor File: ifu_ibu_ibq_ctl.v |
| 4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved |
| 5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. |
| 6 | // |
| 7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 8 | // |
| 9 | // This program is free software; you can redistribute it and/or modify |
| 10 | // it under the terms of the GNU General Public License as published by |
| 11 | // the Free Software Foundation; version 2 of the License. |
| 12 | // |
| 13 | // This program is distributed in the hope that it will be useful, |
| 14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | // GNU General Public License for more details. |
| 17 | // |
| 18 | // You should have received a copy of the GNU General Public License |
| 19 | // along with this program; if not, write to the Free Software |
| 20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 21 | // |
| 22 | // For the avoidance of doubt, and except that if any non-GPL license |
| 23 | // choice is available it will apply instead, Sun elects to use only |
| 24 | // the General Public License version 2 (GPLv2) at this time for any |
| 25 | // software where a choice of GPL license versions is made |
| 26 | // available with the language indicating that GPLv2 or any later version |
| 27 | // may be used, or where a choice of which version of the GPL is applied is |
| 28 | // otherwise unspecified. |
| 29 | // |
| 30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
| 31 | // CA 95054 USA or visit www.sun.com if you need additional information or |
| 32 | // have any questions. |
| 33 | // |
| 34 | // ========== Copyright Header End ============================================ |
| 35 | module ifu_ibu_ibq_ctl ( |
| 36 | tcu_scan_en, |
| 37 | l2clk, |
| 38 | scan_in, |
| 39 | tcu_pce_ov, |
| 40 | spc_aclk, |
| 41 | spc_bclk, |
| 42 | pku_flush_buffer0, |
| 43 | pku_flush_upper_buffer, |
| 44 | ftu_fetch_thr_c, |
| 45 | ftu_instr_sf_valid_c, |
| 46 | pku_pick_p, |
| 47 | lsu_ifu_ibu_pmen, |
| 48 | ftu_buffer_wr_en_f, |
| 49 | l15_ifu_valid, |
| 50 | ftu_redirect_bf, |
| 51 | ftu_exception_valid_c, |
| 52 | ftu_instr_valid_c, |
| 53 | ftu_bus_0_is_first, |
| 54 | ftu_bus_1_is_first, |
| 55 | ftu_bus_2_is_first, |
| 56 | ftu_bus_3_is_first, |
| 57 | ifu_buf0_valid_p, |
| 58 | ifu_upper_buffer_valid_p, |
| 59 | ibu_empty, |
| 60 | ibu_room_4ormore, |
| 61 | ibq_buff_clken, |
| 62 | ibq_ctl_clken, |
| 63 | ibq_buf0_sel_inst0_pick, |
| 64 | ibq_buf0_sel_inst0_pick_, |
| 65 | ibq_buf0_sel_inst1_pick, |
| 66 | ibq_buf0_sel_inst1_pick_, |
| 67 | ibq_buf0_sel_inst2_pick, |
| 68 | ibq_buf0_sel_inst2_pick_, |
| 69 | ibq_buf0_sel_inst3_pick, |
| 70 | ibq_buf0_sel_inst3_pick_, |
| 71 | ibq_buf0_sel_buf1, |
| 72 | ibq_buf0_sel_buf2, |
| 73 | ibq_buf0_sel_buf3, |
| 74 | ibq_buf0_sel_buf4, |
| 75 | ibq_buf0_sel_buf5, |
| 76 | ibq_buf0_sel_buf6, |
| 77 | ibq_buf0_sel_buf7, |
| 78 | ibq_buf0_sel_hold_pick, |
| 79 | ibq_buf0_sel_hold_pick_, |
| 80 | ibq_buf0_sel_buf1to7_pick, |
| 81 | ibq_buf0_sel_buf1to7_pick_, |
| 82 | ibq_buf1_sel_inst0, |
| 83 | ibq_buf1_sel_inst1, |
| 84 | ibq_buf1_sel_inst2, |
| 85 | ibq_buf1_sel_inst3, |
| 86 | ibq_buf1_sel_hold, |
| 87 | ibq_buf2_sel_inst0, |
| 88 | ibq_buf2_sel_inst1, |
| 89 | ibq_buf2_sel_inst2, |
| 90 | ibq_buf2_sel_inst3, |
| 91 | ibq_buf2_sel_hold, |
| 92 | ibq_buf3_sel_inst0, |
| 93 | ibq_buf3_sel_inst1, |
| 94 | ibq_buf3_sel_inst2, |
| 95 | ibq_buf3_sel_inst3, |
| 96 | ibq_buf3_sel_hold, |
| 97 | ibq_buf4_sel_inst0, |
| 98 | ibq_buf4_sel_inst1, |
| 99 | ibq_buf4_sel_inst2, |
| 100 | ibq_buf4_sel_inst3, |
| 101 | ibq_buf4_sel_hold, |
| 102 | ibq_buf5_sel_inst0, |
| 103 | ibq_buf5_sel_inst1, |
| 104 | ibq_buf5_sel_inst2, |
| 105 | ibq_buf5_sel_inst3, |
| 106 | ibq_buf5_sel_hold, |
| 107 | ibq_buf6_sel_inst0, |
| 108 | ibq_buf6_sel_inst1, |
| 109 | ibq_buf6_sel_inst2, |
| 110 | ibq_buf6_sel_inst3, |
| 111 | ibq_buf6_sel_hold, |
| 112 | ibq_buf7_sel_inst0, |
| 113 | ibq_buf7_sel_inst1, |
| 114 | ibq_buf7_sel_inst2, |
| 115 | ibq_buf7_sel_inst3, |
| 116 | ibq_buf7_sel_hold, |
| 117 | scan_out); |
| 118 | wire pce_ov; |
| 119 | wire stop; |
| 120 | wire siclk; |
| 121 | wire soclk; |
| 122 | wire l1clk; |
| 123 | wire l1clk_pm1; |
| 124 | wire ibq_buff_clken_in; |
| 125 | wire ifu_ibu_pmen_d; |
| 126 | wire buff_clken_reg_scanin; |
| 127 | wire buff_clken_reg_scanout; |
| 128 | wire pmen_reg_scanin; |
| 129 | wire pmen_reg_scanout; |
| 130 | wire buf7to1_empty; |
| 131 | wire [7:1] curr_ip; |
| 132 | wire [7:1] buf_valid_p; |
| 133 | wire buf0_sel_hold_; |
| 134 | wire [7:1] nxt_fp; |
| 135 | wire ibq_buf1_sel_lsb; |
| 136 | wire ibq_buf2_sel_lsb; |
| 137 | wire ibq_buf3_sel_lsb; |
| 138 | wire ibq_buf4_sel_lsb; |
| 139 | wire ibq_buf5_sel_lsb; |
| 140 | wire ibq_buf6_sel_lsb; |
| 141 | wire ibq_buf7_sel_lsb; |
| 142 | wire buf1_val_inst0; |
| 143 | wire buf2_val_inst0; |
| 144 | wire buf3_val_inst0; |
| 145 | wire buf4_val_inst0; |
| 146 | wire buf5_val_inst0; |
| 147 | wire buf6_val_inst0; |
| 148 | wire buf7_val_inst0; |
| 149 | wire buf1_val_inst1; |
| 150 | wire buf2_val_inst1; |
| 151 | wire buf3_val_inst1; |
| 152 | wire buf4_val_inst1; |
| 153 | wire buf5_val_inst1; |
| 154 | wire buf6_val_inst1; |
| 155 | wire buf7_val_inst1; |
| 156 | wire buf1_val_inst2; |
| 157 | wire buf2_val_inst2; |
| 158 | wire buf3_val_inst2; |
| 159 | wire buf4_val_inst2; |
| 160 | wire buf5_val_inst2; |
| 161 | wire buf6_val_inst2; |
| 162 | wire buf7_val_inst2; |
| 163 | wire buf1_val_inst3; |
| 164 | wire buf2_val_inst3; |
| 165 | wire buf3_val_inst3; |
| 166 | wire buf4_val_inst3; |
| 167 | wire buf5_val_inst3; |
| 168 | wire buf6_val_inst3; |
| 169 | wire buf7_val_inst3; |
| 170 | wire buf1_val_hold; |
| 171 | wire buf2_val_hold; |
| 172 | wire buf3_val_hold; |
| 173 | wire buf4_val_hold; |
| 174 | wire buf5_val_hold; |
| 175 | wire buf6_val_hold; |
| 176 | wire buf7_val_hold; |
| 177 | wire ibq_buf1_sel_n_lsb; |
| 178 | wire ibq_buf2_sel_n_lsb; |
| 179 | wire ibq_buf3_sel_n_lsb; |
| 180 | wire ibq_buf4_sel_n_lsb; |
| 181 | wire ibq_buf5_sel_n_lsb; |
| 182 | wire ibq_buf6_sel_n_lsb; |
| 183 | wire ibq_buf7_sel_n_lsb; |
| 184 | wire instr_sf_valid_except_c; |
| 185 | wire fetch_sig_reg_scanin; |
| 186 | wire fetch_sig_reg_scanout; |
| 187 | wire any_instr_valid; |
| 188 | wire instr_sf_valid_except_p; |
| 189 | wire fetch_thr_p; |
| 190 | wire any_instr_valid_p; |
| 191 | wire bus_0_is_first_p; |
| 192 | wire bus_1_is_first_p; |
| 193 | wire instr_sf_valid_except_p_ff; |
| 194 | wire bus_2_is_first_p; |
| 195 | wire bus_3_is_first_p; |
| 196 | wire flush_upper_buffer_ff; |
| 197 | wire redirect_p; |
| 198 | wire [3:0] instr_valid_p; |
| 199 | wire sel_no_shift; |
| 200 | wire reset_fp_to_one; |
| 201 | wire sel_shift_left_by_one; |
| 202 | wire sel_shift_left_by_two; |
| 203 | wire sel_shift_left_by_three; |
| 204 | wire sel_shift_left_by_four; |
| 205 | wire [7:1] cur_fp; |
| 206 | wire cur_fp_7to2_scanin; |
| 207 | wire cur_fp_7to2_scanout; |
| 208 | wire [7:1] cur_fpq; |
| 209 | wire [1:1] nxt_fpd; |
| 210 | wire cur_fp_1_scanin; |
| 211 | wire cur_fp_1_scanout; |
| 212 | wire no_shift_ip; |
| 213 | wire shift_left_one_ip; |
| 214 | wire fp_plus_1_to_ip; |
| 215 | wire fp_to_ip; |
| 216 | wire [7:1] next_ip; |
| 217 | wire next_ip_7to2_scanin; |
| 218 | wire next_ip_7to2_scanout; |
| 219 | wire [7:1] curr_ipq; |
| 220 | wire [2:2] next_ipd; |
| 221 | wire next_ip_1_scanin; |
| 222 | wire next_ip_1_scanout; |
| 223 | wire [7:0] buf_valid_in; |
| 224 | wire [7:0] buf_valid_din; |
| 225 | wire valid_outpk_7to1_scanin; |
| 226 | wire valid_outpk_7to1_scanout; |
| 227 | wire true_buf0_valid_p; |
| 228 | wire valid_outpk_buf0_scanin; |
| 229 | wire valid_outpk_buf0_scanout; |
| 230 | wire spares_scanin; |
| 231 | wire spares_scanout; |
| 232 | wire se; |
| 233 | |
| 234 | |
| 235 | input tcu_scan_en ; |
| 236 | input l2clk; |
| 237 | |
| 238 | input scan_in; |
| 239 | input tcu_pce_ov; // scan signals |
| 240 | input spc_aclk; |
| 241 | input spc_bclk; |
| 242 | |
| 243 | input pku_flush_buffer0; // flush buf0 only |
| 244 | input pku_flush_upper_buffer; // flush buf1-7 only |
| 245 | |
| 246 | input ftu_fetch_thr_c; // enables fetch |
| 247 | input ftu_instr_sf_valid_c; // Single instr fetch. Valid only during fetch not by_pass. |
| 248 | input pku_pick_p; // instruction issue/pick indicator |
| 249 | |
| 250 | input lsu_ifu_ibu_pmen; // enable power management. |
| 251 | input ftu_buffer_wr_en_f; // Buffer clock enables (Normal fetch) |
| 252 | input l15_ifu_valid; // |
| 253 | input ftu_redirect_bf; // The thread is redirected. |
| 254 | input ftu_exception_valid_c ; |
| 255 | |
| 256 | input [3:0] ftu_instr_valid_c; |
| 257 | input ftu_bus_0_is_first ; // bus 0 contains first instr |
| 258 | input ftu_bus_1_is_first ; // bus 1 contains first instr |
| 259 | input ftu_bus_2_is_first ; // bus 2 contains first instr |
| 260 | input ftu_bus_3_is_first ; // bus 3 contains first instr |
| 261 | |
| 262 | output ifu_buf0_valid_p ; // buf0 valid |
| 263 | output ifu_upper_buffer_valid_p; // at least one of buf1-7 valid |
| 264 | |
| 265 | |
| 266 | output ibu_empty ; // buf0-7 empty |
| 267 | output ibu_room_4ormore ; // at least 4 empty buffers |
| 268 | |
| 269 | output ibq_buff_clken ; |
| 270 | output ibq_ctl_clken ; |
| 271 | |
| 272 | output ibq_buf0_sel_inst0_pick ; |
| 273 | output ibq_buf0_sel_inst0_pick_ ; |
| 274 | output ibq_buf0_sel_inst1_pick ; |
| 275 | output ibq_buf0_sel_inst1_pick_ ; |
| 276 | output ibq_buf0_sel_inst2_pick ; |
| 277 | output ibq_buf0_sel_inst2_pick_ ; |
| 278 | output ibq_buf0_sel_inst3_pick ; |
| 279 | output ibq_buf0_sel_inst3_pick_ ; |
| 280 | output ibq_buf0_sel_buf1 ; |
| 281 | output ibq_buf0_sel_buf2 ; |
| 282 | output ibq_buf0_sel_buf3 ; |
| 283 | output ibq_buf0_sel_buf4 ; |
| 284 | output ibq_buf0_sel_buf5 ; |
| 285 | output ibq_buf0_sel_buf6 ; |
| 286 | output ibq_buf0_sel_buf7 ; |
| 287 | output ibq_buf0_sel_hold_pick ; |
| 288 | output ibq_buf0_sel_hold_pick_ ; |
| 289 | |
| 290 | output ibq_buf0_sel_buf1to7_pick; |
| 291 | output ibq_buf0_sel_buf1to7_pick_; |
| 292 | |
| 293 | output ibq_buf1_sel_inst0 ; |
| 294 | output ibq_buf1_sel_inst1 ; |
| 295 | output ibq_buf1_sel_inst2 ; |
| 296 | output ibq_buf1_sel_inst3 ; |
| 297 | output ibq_buf1_sel_hold ; |
| 298 | |
| 299 | output ibq_buf2_sel_inst0 ; |
| 300 | output ibq_buf2_sel_inst1 ; |
| 301 | output ibq_buf2_sel_inst2 ; |
| 302 | output ibq_buf2_sel_inst3 ; |
| 303 | output ibq_buf2_sel_hold ; |
| 304 | |
| 305 | output ibq_buf3_sel_inst0 ; |
| 306 | output ibq_buf3_sel_inst1 ; |
| 307 | output ibq_buf3_sel_inst2 ; |
| 308 | output ibq_buf3_sel_inst3 ; |
| 309 | output ibq_buf3_sel_hold ; |
| 310 | |
| 311 | output ibq_buf4_sel_inst0 ; |
| 312 | output ibq_buf4_sel_inst1 ; |
| 313 | output ibq_buf4_sel_inst2 ; |
| 314 | output ibq_buf4_sel_inst3 ; |
| 315 | output ibq_buf4_sel_hold ; |
| 316 | |
| 317 | output ibq_buf5_sel_inst0 ; |
| 318 | output ibq_buf5_sel_inst1 ; |
| 319 | output ibq_buf5_sel_inst2 ; |
| 320 | output ibq_buf5_sel_inst3 ; |
| 321 | output ibq_buf5_sel_hold ; |
| 322 | |
| 323 | output ibq_buf6_sel_inst0 ; |
| 324 | output ibq_buf6_sel_inst1 ; |
| 325 | output ibq_buf6_sel_inst2 ; |
| 326 | output ibq_buf6_sel_inst3 ; |
| 327 | output ibq_buf6_sel_hold ; |
| 328 | |
| 329 | output ibq_buf7_sel_inst0 ; |
| 330 | output ibq_buf7_sel_inst1 ; |
| 331 | output ibq_buf7_sel_inst2 ; |
| 332 | output ibq_buf7_sel_inst3 ; |
| 333 | output ibq_buf7_sel_hold ; |
| 334 | |
| 335 | output scan_out; |
| 336 | |
| 337 | // renames |
| 338 | assign pce_ov = tcu_pce_ov; |
| 339 | assign stop = 1'b0; |
| 340 | assign siclk = spc_aclk; |
| 341 | assign soclk = spc_bclk; |
| 342 | |
| 343 | //////////////////////////////////////////////////////////// |
| 344 | // cur_fp[7:1] is one hot vector showing where the |
| 345 | // first instruction should be written. |
| 346 | // cur_fp[7:1] = 8'b00000010 means the current location |
| 347 | // to write to is buf2. |
| 348 | // |
| 349 | // Assumptions: |
| 350 | // if pku_pick_p, it implies: |
| 351 | // There is at least one valid inst in buf0-7. |
| 352 | // |
| 353 | // At start up: |
| 354 | // curr_ip = 7'b0000010 |
| 355 | // cur_fp = 7'b0000001 |
| 356 | // ibu_empty = 1; |
| 357 | // buf7to1_empty = 1; <--local signal |
| 358 | // buf_valid_p[7:0] = 8'b0; <--local except bit 0 |
| 359 | //////////////////////////////////////////////////////////// |
| 360 | |
| 361 | ifu_ibu_ibq_ctl_l1clkhdr_ctl_macro clkgen ( |
| 362 | .l2clk(l2clk), |
| 363 | .l1en (1'b1 ), |
| 364 | .l1clk(l1clk), |
| 365 | .pce_ov(pce_ov), |
| 366 | .stop(stop), |
| 367 | .se(se)); |
| 368 | |
| 369 | ifu_ibu_ibq_ctl_l1clkhdr_ctl_macro clkgen_pm ( |
| 370 | .l2clk(l2clk), |
| 371 | .l1en (ibq_ctl_clken ), |
| 372 | .l1clk(l1clk_pm1), |
| 373 | .pce_ov(pce_ov), |
| 374 | .stop(stop), |
| 375 | .se(se)); |
| 376 | |
| 377 | assign ibq_buff_clken_in = ( ftu_buffer_wr_en_f | l15_ifu_valid | ~ifu_ibu_pmen_d); |
| 378 | assign ibq_ctl_clken = 1'b1 ; |
| 379 | |
| 380 | |
| 381 | ifu_ibu_ibq_ctl_msff_ctl_macro__width_1 buff_clken_reg ( |
| 382 | .scan_in(buff_clken_reg_scanin), |
| 383 | .scan_out(buff_clken_reg_scanout), |
| 384 | .l1clk(l1clk), |
| 385 | .din (ibq_buff_clken_in), |
| 386 | .dout (ibq_buff_clken), |
| 387 | .siclk(siclk), |
| 388 | .soclk(soclk)); |
| 389 | |
| 390 | ifu_ibu_ibq_ctl_msff_ctl_macro__width_1 pmen_reg ( |
| 391 | .scan_in(pmen_reg_scanin), |
| 392 | .scan_out(pmen_reg_scanout), |
| 393 | .l1clk(l1clk), |
| 394 | .din (lsu_ifu_ibu_pmen), |
| 395 | .dout (ifu_ibu_pmen_d), |
| 396 | .siclk(siclk), |
| 397 | .soclk(soclk)); |
| 398 | |
| 399 | |
| 400 | // choose which instr to put in a particular buffer. |
| 401 | ///////////////////////////////////////////////////// |
| 402 | // Thread 0 , buffer 0 selects // |
| 403 | ///////////////////////////////////////////////////// |
| 404 | |
| 405 | ///////////////////////////////////////////////////////// |
| 406 | // cases where buf0 gets inst0 directly: |
| 407 | // if inst0 is valid and all buffers are empty. |
| 408 | ///////////////////////////////////////////////////////// |
| 409 | // treat (flush_buffer0 & ~flush_upper_buffer) as a pick when upper buffers are not empty |
| 410 | // IB may think it is empty when fetch and pick are done at the same time. |
| 411 | |
| 412 | |
| 413 | // for the 1st level buf0 mux in dp: buf0_sel_inst0 if not taking from buf1-7. |
| 414 | // each ibq_buf0_sel_bufx = curr_ip[x] & buf_valid_p[x]; |
| 415 | // |
| 416 | |
| 417 | assign ibq_buf0_sel_inst0_pick_ = ((ibu_empty | pku_flush_buffer0) & buf7to1_empty) & ftu_bus_0_is_first; |
| 418 | assign ibq_buf0_sel_inst0_pick = buf7to1_empty & ftu_bus_0_is_first; |
| 419 | assign ibq_buf0_sel_inst1_pick_ = ((ibu_empty | pku_flush_buffer0) & buf7to1_empty) & ftu_bus_1_is_first; |
| 420 | assign ibq_buf0_sel_inst1_pick = buf7to1_empty & ftu_bus_1_is_first; |
| 421 | assign ibq_buf0_sel_inst2_pick_ = ((ibu_empty | pku_flush_buffer0) & buf7to1_empty) & ftu_bus_2_is_first; |
| 422 | assign ibq_buf0_sel_inst2_pick = buf7to1_empty & ftu_bus_2_is_first; |
| 423 | assign ibq_buf0_sel_inst3_pick_ = ((ibu_empty | pku_flush_buffer0) & buf7to1_empty) & ftu_bus_3_is_first; |
| 424 | assign ibq_buf0_sel_inst3_pick = buf7to1_empty & ftu_bus_3_is_first; |
| 425 | |
| 426 | assign ibq_buf0_sel_buf1to7_pick_ = (ibq_buf0_sel_buf1 | ibq_buf0_sel_buf2 | ibq_buf0_sel_buf3 | ibq_buf0_sel_buf4 | ibq_buf0_sel_buf5 | |
| 427 | ibq_buf0_sel_buf6 | ibq_buf0_sel_buf7) & pku_flush_buffer0 ; |
| 428 | |
| 429 | assign ibq_buf0_sel_buf1to7_pick = (ibq_buf0_sel_buf1 | ibq_buf0_sel_buf2 | ibq_buf0_sel_buf3 | ibq_buf0_sel_buf4 | ibq_buf0_sel_buf5 | |
| 430 | ibq_buf0_sel_buf6 | ibq_buf0_sel_buf7) ; |
| 431 | |
| 432 | |
| 433 | ///////////////////////////////////////////////////////// |
| 434 | // cases where buf0 gets inst from buf1-7: |
| 435 | // a) curr_ip points at buf1-7 and that inst is valid |
| 436 | ///////////////////////////////////////////////////////// |
| 437 | |
| 438 | //can do concurrent pick and flush (but no refill of buf0) |
| 439 | |
| 440 | assign ibq_buf0_sel_buf1 = curr_ip[1] & buf_valid_p[1]; |
| 441 | assign ibq_buf0_sel_buf2 = curr_ip[2] & buf_valid_p[2]; |
| 442 | assign ibq_buf0_sel_buf3 = curr_ip[3] & buf_valid_p[3]; |
| 443 | assign ibq_buf0_sel_buf4 = curr_ip[4] & buf_valid_p[4]; |
| 444 | assign ibq_buf0_sel_buf5 = curr_ip[5] & buf_valid_p[5]; |
| 445 | assign ibq_buf0_sel_buf6 = curr_ip[6] & buf_valid_p[6]; |
| 446 | assign ibq_buf0_sel_buf7 = curr_ip[7] & buf_valid_p[7]; |
| 447 | |
| 448 | ///////////////////////////////////////////////////////// |
| 449 | // the output from the 1st level buf0 mux in dp can make it to the end if: |
| 450 | // a). pku_pick_p = 1 and flush_upper_buffer = 0 OR (issue) |
| 451 | // b). pku_flush_buffer0 = 1 and flush_upper_buffer = 0 OR (issue equivalent) |
| 452 | // c). ibu_empty = 1 and ftu_fetch_thr_c = 1 and ftu_instr_valid_c[0] = 1 |
| 453 | // (and buf7to1_empty = 1) (fetch) |
| 454 | // |
| 455 | // the output should be held if: |
| 456 | // a). pku_pick_p = 0 and pku_flush_buffer0 = 0 AND (no issue) |
| 457 | // b). ftu_instr_valid_c[0] = 0 (no fetch) |
| 458 | ///////////////////////////////////////////////////////// |
| 459 | |
| 460 | // assign buf0_sel_hold_ = pku_flush_buffer0 | (ftu_fetch_thr_c & (ftu_instr_valid_c[0] | ftu_instr_valid_c[1] | |
| 461 | // ftu_instr_valid_c[2] | ftu_instr_valid_c[3]) & ibu_empty & buf7to1_empty); |
| 462 | |
| 463 | assign buf0_sel_hold_ = pku_flush_buffer0 | (ibu_empty & buf7to1_empty); |
| 464 | assign ibq_buf0_sel_hold_pick_ = ~(buf0_sel_hold_ ); |
| 465 | assign ibq_buf0_sel_hold_pick = 1'b0 ; |
| 466 | ///////////////////////////////////////////////////// |
| 467 | // Thread 0 , buffer 1-7 selects |
| 468 | // Buf1-7 will fetch as usual while flush_upper_buffer is on, but the valid bits will be off. |
| 469 | ///////////////////////////////////////////////////// |
| 470 | |
| 471 | ///////////////////////////////////////////////////////// |
| 472 | // Example using buf1: |
| 473 | // buf1 gets inst0: |
| 474 | // - cur_fp[1], fetch & inst0 valid (inst_vld_0 & addr_x00) |
| 475 | // - cur_fp[7], fetch & inst0 valid (inst_vld_3 & addr_011) |
| 476 | // - cur_fp[6], fetch & inst0 valid (inst_vld_2 & addr_010) |
| 477 | // - cur_fp[5], fetch & inst0 valid (inst_vld_1 & addr_001) |
| 478 | // |
| 479 | // buf1 gets inst1: |
| 480 | // - cur_fp[7], fetch & inst0 valid (inst_vld_0 & addr_x00) |
| 481 | // - cur_fp[6], fetch & inst0 valid (inst_vld_3 & addr_011) |
| 482 | // - cur_fp[5], fetch & inst0 valid (inst_vld_2 & addr_010) |
| 483 | // - cur_fp[1], fetch & inst0 valid (inst_vld_1 & addr_001) |
| 484 | // |
| 485 | // buf1 gets inst2: |
| 486 | // - cur_fp[6], fetch & inst0 valid (inst_vld_0 & addr_x00) |
| 487 | // - cur_fp[7], fetch & inst0 valid (inst_vld_3 & addr_011) |
| 488 | // - cur_fp[1], fetch & inst0 valid (inst_vld_2 & addr_010) |
| 489 | // - cur_fp[5], fetch & inst0 valid (inst_vld_1 & addr_001) |
| 490 | // |
| 491 | // buf1 gets inst3: |
| 492 | // - cur_fp[5], fetch & inst0 valid (inst_vld_0 & addr_x00) |
| 493 | // - cur_fp[6], fetch & inst0 valid (inst_vld_3 & addr_011) |
| 494 | // - cur_fp[7], fetch & inst0 valid (inst_vld_2 & addr_010) |
| 495 | // - cur_fp[1], fetch & inst0 valid (inst_vld_1 & addr_001) |
| 496 | // |
| 497 | ///////////////////////////////////////////////////////// |
| 498 | |
| 499 | |
| 500 | |
| 501 | ////////////////////////////////////////////////////////////// |
| 502 | // Bus 0 selects |
| 503 | ////////////////////////////////////////////////////////////// |
| 504 | assign ibq_buf1_sel_inst0 = ((nxt_fp[1] & ftu_bus_0_is_first)| |
| 505 | (nxt_fp[5] & ftu_bus_1_is_first)| |
| 506 | (nxt_fp[6] & ftu_bus_2_is_first)| |
| 507 | (nxt_fp[7] & ftu_bus_3_is_first)) & ftu_fetch_thr_c & ibu_room_4ormore; |
| 508 | |
| 509 | assign ibq_buf2_sel_inst0 = ((nxt_fp[2] & ftu_bus_0_is_first)| |
| 510 | (nxt_fp[6] & ftu_bus_1_is_first)| |
| 511 | (nxt_fp[7] & ftu_bus_2_is_first)| |
| 512 | (nxt_fp[1] & ftu_bus_3_is_first)) & ftu_fetch_thr_c & ibu_room_4ormore; |
| 513 | |
| 514 | assign ibq_buf3_sel_inst0 = ((nxt_fp[3] & ftu_bus_0_is_first)| |
| 515 | (nxt_fp[7] & ftu_bus_1_is_first)| |
| 516 | (nxt_fp[1] & ftu_bus_2_is_first)| |
| 517 | (nxt_fp[2] & ftu_bus_3_is_first)) & ftu_fetch_thr_c & ibu_room_4ormore; |
| 518 | |
| 519 | assign ibq_buf4_sel_inst0 = ((nxt_fp[4] & ftu_bus_0_is_first)| |
| 520 | (nxt_fp[1] & ftu_bus_1_is_first)| |
| 521 | (nxt_fp[2] & ftu_bus_2_is_first)| |
| 522 | (nxt_fp[3] & ftu_bus_3_is_first)) & ftu_fetch_thr_c & ibu_room_4ormore; |
| 523 | |
| 524 | assign ibq_buf5_sel_inst0 = ((nxt_fp[5] & ftu_bus_0_is_first)| |
| 525 | (nxt_fp[2] & ftu_bus_1_is_first)| |
| 526 | (nxt_fp[3] & ftu_bus_2_is_first)| |
| 527 | (nxt_fp[4] & ftu_bus_3_is_first)) & ftu_fetch_thr_c & ibu_room_4ormore; |
| 528 | |
| 529 | assign ibq_buf6_sel_inst0 = ((nxt_fp[6] & ftu_bus_0_is_first)| |
| 530 | (nxt_fp[3] & ftu_bus_1_is_first)| |
| 531 | (nxt_fp[4] & ftu_bus_2_is_first)| |
| 532 | (nxt_fp[5] & ftu_bus_3_is_first)) & ftu_fetch_thr_c & ibu_room_4ormore; |
| 533 | |
| 534 | assign ibq_buf7_sel_inst0 = ((nxt_fp[7] & ftu_bus_0_is_first)| |
| 535 | (nxt_fp[4] & ftu_bus_1_is_first)| |
| 536 | (nxt_fp[5] & ftu_bus_2_is_first)| |
| 537 | (nxt_fp[6] & ftu_bus_3_is_first)) & ftu_fetch_thr_c & ibu_room_4ormore; |
| 538 | |
| 539 | ////////////////////////////////////////////////////////////// |
| 540 | // Bus 1 selects |
| 541 | ////////////////////////////////////////////////////////////// |
| 542 | assign ibq_buf1_sel_inst1 = ((nxt_fp[7] & ftu_bus_0_is_first)| |
| 543 | (nxt_fp[1] & ftu_bus_1_is_first)| |
| 544 | (nxt_fp[5] & ftu_bus_2_is_first)| |
| 545 | (nxt_fp[6] & ftu_bus_3_is_first)) & ftu_fetch_thr_c & ibu_room_4ormore; |
| 546 | |
| 547 | assign ibq_buf2_sel_inst1 = ((nxt_fp[1] & ftu_bus_0_is_first)| |
| 548 | (nxt_fp[2] & ftu_bus_1_is_first)| |
| 549 | (nxt_fp[6] & ftu_bus_2_is_first)| |
| 550 | (nxt_fp[7] & ftu_bus_3_is_first)) & ftu_fetch_thr_c & ibu_room_4ormore; |
| 551 | |
| 552 | assign ibq_buf3_sel_inst1 = ((nxt_fp[2] & ftu_bus_0_is_first)| |
| 553 | (nxt_fp[3] & ftu_bus_1_is_first)| |
| 554 | (nxt_fp[7] & ftu_bus_2_is_first)| |
| 555 | (nxt_fp[1] & ftu_bus_3_is_first)) & ftu_fetch_thr_c & ibu_room_4ormore; |
| 556 | |
| 557 | assign ibq_buf4_sel_inst1 = ((nxt_fp[3] & ftu_bus_0_is_first)| |
| 558 | (nxt_fp[4] & ftu_bus_1_is_first)| |
| 559 | (nxt_fp[1] & ftu_bus_2_is_first)| |
| 560 | (nxt_fp[2] & ftu_bus_3_is_first)) & ftu_fetch_thr_c & ibu_room_4ormore; |
| 561 | |
| 562 | assign ibq_buf5_sel_inst1 = ((nxt_fp[4] & ftu_bus_0_is_first)| |
| 563 | (nxt_fp[5] & ftu_bus_1_is_first)| |
| 564 | (nxt_fp[2] & ftu_bus_2_is_first)| |
| 565 | (nxt_fp[3] & ftu_bus_3_is_first)) & ftu_fetch_thr_c & ibu_room_4ormore; |
| 566 | |
| 567 | assign ibq_buf6_sel_inst1 = ((nxt_fp[5] & ftu_bus_0_is_first)| |
| 568 | (nxt_fp[6] & ftu_bus_1_is_first)| |
| 569 | (nxt_fp[3] & ftu_bus_2_is_first)| |
| 570 | (nxt_fp[4] & ftu_bus_3_is_first)) & ftu_fetch_thr_c & ibu_room_4ormore; |
| 571 | |
| 572 | assign ibq_buf7_sel_inst1 = ((nxt_fp[6] & ftu_bus_0_is_first)| |
| 573 | (nxt_fp[7] & ftu_bus_1_is_first)| |
| 574 | (nxt_fp[4] & ftu_bus_2_is_first)| |
| 575 | (nxt_fp[5] & ftu_bus_3_is_first)) & ftu_fetch_thr_c & ibu_room_4ormore; |
| 576 | |
| 577 | ////////////////////////////////////////////////////////////// |
| 578 | // Bus 2 selects |
| 579 | ////////////////////////////////////////////////////////////// |
| 580 | assign ibq_buf1_sel_inst2 = ((nxt_fp[6] & ftu_bus_0_is_first)| |
| 581 | (nxt_fp[7] & ftu_bus_1_is_first)| |
| 582 | (nxt_fp[1] & ftu_bus_2_is_first)| |
| 583 | (nxt_fp[5] & ftu_bus_3_is_first)) & ftu_fetch_thr_c & ibu_room_4ormore; |
| 584 | |
| 585 | assign ibq_buf2_sel_inst2 = ((nxt_fp[7] & ftu_bus_0_is_first)| |
| 586 | (nxt_fp[1] & ftu_bus_1_is_first)| |
| 587 | (nxt_fp[2] & ftu_bus_2_is_first)| |
| 588 | (nxt_fp[6] & ftu_bus_3_is_first)) & ftu_fetch_thr_c & ibu_room_4ormore; |
| 589 | |
| 590 | assign ibq_buf3_sel_inst2 = ((nxt_fp[1] & ftu_bus_0_is_first)| |
| 591 | (nxt_fp[2] & ftu_bus_1_is_first)| |
| 592 | (nxt_fp[3] & ftu_bus_2_is_first)| |
| 593 | (nxt_fp[7] & ftu_bus_3_is_first)) & ftu_fetch_thr_c & ibu_room_4ormore; |
| 594 | |
| 595 | assign ibq_buf4_sel_inst2 = ((nxt_fp[2] & ftu_bus_0_is_first)| |
| 596 | (nxt_fp[3] & ftu_bus_1_is_first)| |
| 597 | (nxt_fp[4] & ftu_bus_2_is_first)| |
| 598 | (nxt_fp[1] & ftu_bus_3_is_first)) & ftu_fetch_thr_c & ibu_room_4ormore; |
| 599 | |
| 600 | assign ibq_buf5_sel_inst2 = ((nxt_fp[3] & ftu_bus_0_is_first)| |
| 601 | (nxt_fp[4] & ftu_bus_1_is_first)| |
| 602 | (nxt_fp[5] & ftu_bus_2_is_first)| |
| 603 | (nxt_fp[2] & ftu_bus_3_is_first)) & ftu_fetch_thr_c & ibu_room_4ormore; |
| 604 | |
| 605 | assign ibq_buf6_sel_inst2 = ((nxt_fp[4] & ftu_bus_0_is_first)| |
| 606 | (nxt_fp[5] & ftu_bus_1_is_first)| |
| 607 | (nxt_fp[6] & ftu_bus_2_is_first)| |
| 608 | (nxt_fp[3] & ftu_bus_3_is_first)) & ftu_fetch_thr_c & ibu_room_4ormore; |
| 609 | |
| 610 | assign ibq_buf7_sel_inst2 = ((nxt_fp[5] & ftu_bus_0_is_first)| |
| 611 | (nxt_fp[6] & ftu_bus_1_is_first)| |
| 612 | (nxt_fp[7] & ftu_bus_2_is_first)| |
| 613 | (nxt_fp[4] & ftu_bus_3_is_first)) & ftu_fetch_thr_c & ibu_room_4ormore; |
| 614 | |
| 615 | ////////////////////////////////////////////////////////////// |
| 616 | // Bus 3 selects |
| 617 | ////////////////////////////////////////////////////////////// |
| 618 | assign ibq_buf1_sel_inst3 = ((nxt_fp[5] & ftu_bus_0_is_first)| |
| 619 | (nxt_fp[6] & ftu_bus_1_is_first)| |
| 620 | (nxt_fp[7] & ftu_bus_2_is_first)| |
| 621 | (nxt_fp[1] & ftu_bus_3_is_first)) & ftu_fetch_thr_c & ibu_room_4ormore; |
| 622 | |
| 623 | assign ibq_buf2_sel_inst3 = ((nxt_fp[6] & ftu_bus_0_is_first)| |
| 624 | (nxt_fp[7] & ftu_bus_1_is_first)| |
| 625 | (nxt_fp[1] & ftu_bus_2_is_first)| |
| 626 | (nxt_fp[2] & ftu_bus_3_is_first)) & ftu_fetch_thr_c & ibu_room_4ormore; |
| 627 | |
| 628 | assign ibq_buf3_sel_inst3 = ((nxt_fp[7] & ftu_bus_0_is_first)| |
| 629 | (nxt_fp[1] & ftu_bus_1_is_first)| |
| 630 | (nxt_fp[2] & ftu_bus_2_is_first)| |
| 631 | (nxt_fp[3] & ftu_bus_3_is_first)) & ftu_fetch_thr_c & ibu_room_4ormore; |
| 632 | |
| 633 | assign ibq_buf4_sel_inst3 = ((nxt_fp[1] & ftu_bus_0_is_first)| |
| 634 | (nxt_fp[2] & ftu_bus_1_is_first)| |
| 635 | (nxt_fp[3] & ftu_bus_2_is_first)| |
| 636 | (nxt_fp[4] & ftu_bus_3_is_first)) & ftu_fetch_thr_c & ibu_room_4ormore; |
| 637 | |
| 638 | assign ibq_buf5_sel_inst3 = ((nxt_fp[2] & ftu_bus_0_is_first)| |
| 639 | (nxt_fp[3] & ftu_bus_1_is_first)| |
| 640 | (nxt_fp[4] & ftu_bus_2_is_first)| |
| 641 | (nxt_fp[5] & ftu_bus_3_is_first)) & ftu_fetch_thr_c & ibu_room_4ormore; |
| 642 | |
| 643 | assign ibq_buf6_sel_inst3 = ((nxt_fp[3] & ftu_bus_0_is_first)| |
| 644 | (nxt_fp[4] & ftu_bus_1_is_first)| |
| 645 | (nxt_fp[5] & ftu_bus_2_is_first)| |
| 646 | (nxt_fp[6] & ftu_bus_3_is_first)) & ftu_fetch_thr_c & ibu_room_4ormore; |
| 647 | |
| 648 | assign ibq_buf7_sel_inst3 = ((nxt_fp[4] & ftu_bus_0_is_first)| |
| 649 | (nxt_fp[5] & ftu_bus_1_is_first)| |
| 650 | (nxt_fp[6] & ftu_bus_2_is_first)| |
| 651 | (nxt_fp[7] & ftu_bus_3_is_first)) & ftu_fetch_thr_c & ibu_room_4ormore; |
| 652 | |
| 653 | assign ibq_buf1_sel_hold = ~(ibq_buf1_sel_inst0 | ibq_buf1_sel_inst1 | ibq_buf1_sel_inst2 | ibq_buf1_sel_inst3); |
| 654 | assign ibq_buf2_sel_hold = ~(ibq_buf2_sel_inst0 | ibq_buf2_sel_inst1 | ibq_buf2_sel_inst2 | ibq_buf2_sel_inst3); |
| 655 | assign ibq_buf3_sel_hold = ~(ibq_buf3_sel_inst0 | ibq_buf3_sel_inst1 | ibq_buf3_sel_inst2 | ibq_buf3_sel_inst3); |
| 656 | assign ibq_buf4_sel_hold = ~(ibq_buf4_sel_inst0 | ibq_buf4_sel_inst1 | ibq_buf4_sel_inst2 | ibq_buf4_sel_inst3); |
| 657 | assign ibq_buf5_sel_hold = ~(ibq_buf5_sel_inst0 | ibq_buf5_sel_inst1 | ibq_buf5_sel_inst2 | ibq_buf5_sel_inst3); |
| 658 | assign ibq_buf6_sel_hold = ~(ibq_buf6_sel_inst0 | ibq_buf6_sel_inst1 | ibq_buf6_sel_inst2 | ibq_buf6_sel_inst3); |
| 659 | assign ibq_buf7_sel_hold = ~(ibq_buf7_sel_inst0 | ibq_buf7_sel_inst1 | ibq_buf7_sel_inst2 | ibq_buf7_sel_inst3); |
| 660 | |
| 661 | |
| 662 | // prepare for the pointer shifting |
| 663 | |
| 664 | assign ibq_buf1_sel_lsb = ftu_fetch_thr_c & ~ftu_redirect_bf & ((nxt_fp[1] & ftu_bus_0_is_first & ftu_instr_valid_c[0]) | |
| 665 | (nxt_fp[1] & ftu_bus_1_is_first & ftu_instr_valid_c[1]) | |
| 666 | (nxt_fp[1] & ftu_bus_2_is_first & ftu_instr_valid_c[2]) | |
| 667 | (nxt_fp[1] & ftu_bus_3_is_first & ftu_instr_valid_c[3])); |
| 668 | |
| 669 | assign ibq_buf2_sel_lsb = ftu_fetch_thr_c & ~ftu_redirect_bf & ((nxt_fp[2] & ftu_bus_0_is_first & ftu_instr_valid_c[0]) | |
| 670 | (nxt_fp[2] & ftu_bus_1_is_first & ftu_instr_valid_c[1]) | |
| 671 | (nxt_fp[2] & ftu_bus_2_is_first & ftu_instr_valid_c[2]) | |
| 672 | (nxt_fp[2] & ftu_bus_3_is_first & ftu_instr_valid_c[3])); |
| 673 | |
| 674 | assign ibq_buf3_sel_lsb = ftu_fetch_thr_c & ~ftu_redirect_bf & ((nxt_fp[3] & ftu_bus_0_is_first & ftu_instr_valid_c[0]) | |
| 675 | (nxt_fp[3] & ftu_bus_1_is_first & ftu_instr_valid_c[1]) | |
| 676 | (nxt_fp[3] & ftu_bus_2_is_first & ftu_instr_valid_c[2]) | |
| 677 | (nxt_fp[3] & ftu_bus_3_is_first & ftu_instr_valid_c[3])); |
| 678 | |
| 679 | assign ibq_buf4_sel_lsb = ftu_fetch_thr_c & ~ftu_redirect_bf & ((nxt_fp[4] & ftu_bus_0_is_first & ftu_instr_valid_c[0]) | |
| 680 | (nxt_fp[4] & ftu_bus_1_is_first & ftu_instr_valid_c[1]) | |
| 681 | (nxt_fp[4] & ftu_bus_2_is_first & ftu_instr_valid_c[2]) | |
| 682 | (nxt_fp[4] & ftu_bus_3_is_first & ftu_instr_valid_c[3])); |
| 683 | |
| 684 | assign ibq_buf5_sel_lsb = ftu_fetch_thr_c & ~ftu_redirect_bf & ((nxt_fp[5] & ftu_bus_0_is_first & ftu_instr_valid_c[0]) | |
| 685 | (nxt_fp[5] & ftu_bus_1_is_first & ftu_instr_valid_c[1]) | |
| 686 | (nxt_fp[5] & ftu_bus_2_is_first & ftu_instr_valid_c[2]) | |
| 687 | (nxt_fp[5] & ftu_bus_3_is_first & ftu_instr_valid_c[3])); |
| 688 | |
| 689 | assign ibq_buf6_sel_lsb = ftu_fetch_thr_c & ~ftu_redirect_bf & ((nxt_fp[6] & ftu_bus_0_is_first & ftu_instr_valid_c[0]) | |
| 690 | (nxt_fp[6] & ftu_bus_1_is_first & ftu_instr_valid_c[1]) | |
| 691 | (nxt_fp[6] & ftu_bus_2_is_first & ftu_instr_valid_c[2]) | |
| 692 | (nxt_fp[6] & ftu_bus_3_is_first & ftu_instr_valid_c[3])); |
| 693 | |
| 694 | assign ibq_buf7_sel_lsb = ftu_fetch_thr_c & ~ftu_redirect_bf & ((nxt_fp[7] & ftu_bus_0_is_first & ftu_instr_valid_c[0]) | |
| 695 | (nxt_fp[7] & ftu_bus_1_is_first & ftu_instr_valid_c[1]) | |
| 696 | (nxt_fp[7] & ftu_bus_2_is_first & ftu_instr_valid_c[2]) | |
| 697 | (nxt_fp[7] & ftu_bus_3_is_first & ftu_instr_valid_c[3])); |
| 698 | |
| 699 | ////////////////////////////////////////////////////////////// |
| 700 | // Bus 0 selects |
| 701 | ////////////////////////////////////////////////////////////// |
| 702 | assign buf1_val_inst0 = ((nxt_fp[1] & ftu_bus_0_is_first & ftu_instr_valid_c[0])| |
| 703 | (nxt_fp[5] & ftu_bus_1_is_first & ftu_instr_valid_c[0])| |
| 704 | (nxt_fp[6] & ftu_bus_2_is_first & ftu_instr_valid_c[0])| |
| 705 | (nxt_fp[7] & ftu_bus_3_is_first & ftu_instr_valid_c[0])) & ftu_fetch_thr_c & ~ftu_redirect_bf; |
| 706 | |
| 707 | assign buf2_val_inst0 = ((nxt_fp[2] & ftu_bus_0_is_first & ftu_instr_valid_c[0])| |
| 708 | (nxt_fp[6] & ftu_bus_1_is_first & ftu_instr_valid_c[0])| |
| 709 | (nxt_fp[7] & ftu_bus_2_is_first & ftu_instr_valid_c[0])| |
| 710 | (nxt_fp[1] & ftu_bus_3_is_first & ftu_instr_valid_c[0])) & ftu_fetch_thr_c & ~ftu_redirect_bf; |
| 711 | |
| 712 | assign buf3_val_inst0 = ((nxt_fp[3] & ftu_bus_0_is_first & ftu_instr_valid_c[0])| |
| 713 | (nxt_fp[7] & ftu_bus_1_is_first & ftu_instr_valid_c[0])| |
| 714 | (nxt_fp[1] & ftu_bus_2_is_first & ftu_instr_valid_c[0])| |
| 715 | (nxt_fp[2] & ftu_bus_3_is_first & ftu_instr_valid_c[0])) & ftu_fetch_thr_c & ~ftu_redirect_bf; |
| 716 | |
| 717 | assign buf4_val_inst0 = ((nxt_fp[4] & ftu_bus_0_is_first & ftu_instr_valid_c[0])| |
| 718 | (nxt_fp[1] & ftu_bus_1_is_first & ftu_instr_valid_c[0])| |
| 719 | (nxt_fp[2] & ftu_bus_2_is_first & ftu_instr_valid_c[0])| |
| 720 | (nxt_fp[3] & ftu_bus_3_is_first & ftu_instr_valid_c[0])) & ftu_fetch_thr_c & ~ftu_redirect_bf; |
| 721 | |
| 722 | assign buf5_val_inst0 = ((nxt_fp[5] & ftu_bus_0_is_first & ftu_instr_valid_c[0])| |
| 723 | (nxt_fp[2] & ftu_bus_1_is_first & ftu_instr_valid_c[0])| |
| 724 | (nxt_fp[3] & ftu_bus_2_is_first & ftu_instr_valid_c[0])| |
| 725 | (nxt_fp[4] & ftu_bus_3_is_first & ftu_instr_valid_c[0])) & ftu_fetch_thr_c & ~ftu_redirect_bf; |
| 726 | |
| 727 | assign buf6_val_inst0 = ((nxt_fp[6] & ftu_bus_0_is_first & ftu_instr_valid_c[0])| |
| 728 | (nxt_fp[3] & ftu_bus_1_is_first & ftu_instr_valid_c[0])| |
| 729 | (nxt_fp[4] & ftu_bus_2_is_first & ftu_instr_valid_c[0])| |
| 730 | (nxt_fp[5] & ftu_bus_3_is_first & ftu_instr_valid_c[0])) & ftu_fetch_thr_c & ~ftu_redirect_bf; |
| 731 | |
| 732 | assign buf7_val_inst0 = ((nxt_fp[7] & ftu_bus_0_is_first & ftu_instr_valid_c[0])| |
| 733 | (nxt_fp[4] & ftu_bus_1_is_first & ftu_instr_valid_c[0])| |
| 734 | (nxt_fp[5] & ftu_bus_2_is_first & ftu_instr_valid_c[0])| |
| 735 | (nxt_fp[6] & ftu_bus_3_is_first & ftu_instr_valid_c[0])) & ftu_fetch_thr_c & ~ftu_redirect_bf; |
| 736 | |
| 737 | ////////////////////////////////////////////////////////////// |
| 738 | // Bus 1 selects |
| 739 | ////////////////////////////////////////////////////////////// |
| 740 | assign buf1_val_inst1 = ((nxt_fp[7] & ftu_bus_0_is_first & ftu_instr_valid_c[1])| |
| 741 | (nxt_fp[1] & ftu_bus_1_is_first & ftu_instr_valid_c[1])| |
| 742 | (nxt_fp[5] & ftu_bus_2_is_first & ftu_instr_valid_c[1])| |
| 743 | (nxt_fp[6] & ftu_bus_3_is_first & ftu_instr_valid_c[1])) & ftu_fetch_thr_c & ~ftu_redirect_bf; |
| 744 | |
| 745 | assign buf2_val_inst1 = ((nxt_fp[1] & ftu_bus_0_is_first & ftu_instr_valid_c[1])| |
| 746 | (nxt_fp[2] & ftu_bus_1_is_first & ftu_instr_valid_c[1])| |
| 747 | (nxt_fp[6] & ftu_bus_2_is_first & ftu_instr_valid_c[1])| |
| 748 | (nxt_fp[7] & ftu_bus_3_is_first & ftu_instr_valid_c[1])) & ftu_fetch_thr_c & ~ftu_redirect_bf; |
| 749 | |
| 750 | assign buf3_val_inst1 = ((nxt_fp[2] & ftu_bus_0_is_first & ftu_instr_valid_c[1])| |
| 751 | (nxt_fp[3] & ftu_bus_1_is_first & ftu_instr_valid_c[1])| |
| 752 | (nxt_fp[7] & ftu_bus_2_is_first & ftu_instr_valid_c[1])| |
| 753 | (nxt_fp[1] & ftu_bus_3_is_first & ftu_instr_valid_c[1])) & ftu_fetch_thr_c & ~ftu_redirect_bf; |
| 754 | |
| 755 | assign buf4_val_inst1 = ((nxt_fp[3] & ftu_bus_0_is_first & ftu_instr_valid_c[1])| |
| 756 | (nxt_fp[4] & ftu_bus_1_is_first & ftu_instr_valid_c[1])| |
| 757 | (nxt_fp[1] & ftu_bus_2_is_first & ftu_instr_valid_c[1])| |
| 758 | (nxt_fp[2] & ftu_bus_3_is_first & ftu_instr_valid_c[1])) & ftu_fetch_thr_c & ~ftu_redirect_bf; |
| 759 | |
| 760 | assign buf5_val_inst1 = ((nxt_fp[4] & ftu_bus_0_is_first & ftu_instr_valid_c[1])| |
| 761 | (nxt_fp[5] & ftu_bus_1_is_first & ftu_instr_valid_c[1])| |
| 762 | (nxt_fp[2] & ftu_bus_2_is_first & ftu_instr_valid_c[1])| |
| 763 | (nxt_fp[3] & ftu_bus_3_is_first & ftu_instr_valid_c[1])) & ftu_fetch_thr_c & ~ftu_redirect_bf; |
| 764 | |
| 765 | assign buf6_val_inst1 = ((nxt_fp[5] & ftu_bus_0_is_first & ftu_instr_valid_c[1])| |
| 766 | (nxt_fp[6] & ftu_bus_1_is_first & ftu_instr_valid_c[1])| |
| 767 | (nxt_fp[3] & ftu_bus_2_is_first & ftu_instr_valid_c[1])| |
| 768 | (nxt_fp[4] & ftu_bus_3_is_first & ftu_instr_valid_c[1])) & ftu_fetch_thr_c & ~ftu_redirect_bf; |
| 769 | |
| 770 | assign buf7_val_inst1 = ((nxt_fp[6] & ftu_bus_0_is_first & ftu_instr_valid_c[1])| |
| 771 | (nxt_fp[7] & ftu_bus_1_is_first & ftu_instr_valid_c[1])| |
| 772 | (nxt_fp[4] & ftu_bus_2_is_first & ftu_instr_valid_c[1])| |
| 773 | (nxt_fp[5] & ftu_bus_3_is_first & ftu_instr_valid_c[1])) & ftu_fetch_thr_c & ~ftu_redirect_bf; |
| 774 | |
| 775 | ////////////////////////////////////////////////////////////// |
| 776 | // Bus 2 selects |
| 777 | ////////////////////////////////////////////////////////////// |
| 778 | assign buf1_val_inst2 = ((nxt_fp[6] & ftu_bus_0_is_first & ftu_instr_valid_c[2])| |
| 779 | (nxt_fp[7] & ftu_bus_1_is_first & ftu_instr_valid_c[2])| |
| 780 | (nxt_fp[1] & ftu_bus_2_is_first & ftu_instr_valid_c[2])| |
| 781 | (nxt_fp[5] & ftu_bus_3_is_first & ftu_instr_valid_c[2])) & ftu_fetch_thr_c & ~ftu_redirect_bf; |
| 782 | |
| 783 | assign buf2_val_inst2 = ((nxt_fp[7] & ftu_bus_0_is_first & ftu_instr_valid_c[2])| |
| 784 | (nxt_fp[1] & ftu_bus_1_is_first & ftu_instr_valid_c[2])| |
| 785 | (nxt_fp[2] & ftu_bus_2_is_first & ftu_instr_valid_c[2])| |
| 786 | (nxt_fp[6] & ftu_bus_3_is_first & ftu_instr_valid_c[2])) & ftu_fetch_thr_c & ~ftu_redirect_bf; |
| 787 | |
| 788 | assign buf3_val_inst2 = ((nxt_fp[1] & ftu_bus_0_is_first & ftu_instr_valid_c[2])| |
| 789 | (nxt_fp[2] & ftu_bus_1_is_first & ftu_instr_valid_c[2])| |
| 790 | (nxt_fp[3] & ftu_bus_2_is_first & ftu_instr_valid_c[2])| |
| 791 | (nxt_fp[7] & ftu_bus_3_is_first & ftu_instr_valid_c[2])) & ftu_fetch_thr_c & ~ftu_redirect_bf; |
| 792 | |
| 793 | assign buf4_val_inst2 = ((nxt_fp[2] & ftu_bus_0_is_first & ftu_instr_valid_c[2])| |
| 794 | (nxt_fp[3] & ftu_bus_1_is_first & ftu_instr_valid_c[2])| |
| 795 | (nxt_fp[4] & ftu_bus_2_is_first & ftu_instr_valid_c[2])| |
| 796 | (nxt_fp[1] & ftu_bus_3_is_first & ftu_instr_valid_c[2])) & ftu_fetch_thr_c & ~ftu_redirect_bf; |
| 797 | |
| 798 | assign buf5_val_inst2 = ((nxt_fp[3] & ftu_bus_0_is_first & ftu_instr_valid_c[2])| |
| 799 | (nxt_fp[4] & ftu_bus_1_is_first & ftu_instr_valid_c[2])| |
| 800 | (nxt_fp[5] & ftu_bus_2_is_first & ftu_instr_valid_c[2])| |
| 801 | (nxt_fp[2] & ftu_bus_3_is_first & ftu_instr_valid_c[2])) & ftu_fetch_thr_c & ~ftu_redirect_bf; |
| 802 | |
| 803 | assign buf6_val_inst2 = ((nxt_fp[4] & ftu_bus_0_is_first & ftu_instr_valid_c[2])| |
| 804 | (nxt_fp[5] & ftu_bus_1_is_first & ftu_instr_valid_c[2])| |
| 805 | (nxt_fp[6] & ftu_bus_2_is_first & ftu_instr_valid_c[2])| |
| 806 | (nxt_fp[3] & ftu_bus_3_is_first & ftu_instr_valid_c[2])) & ftu_fetch_thr_c & ~ftu_redirect_bf; |
| 807 | |
| 808 | assign buf7_val_inst2 = ((nxt_fp[5] & ftu_bus_0_is_first & ftu_instr_valid_c[2])| |
| 809 | (nxt_fp[6] & ftu_bus_1_is_first & ftu_instr_valid_c[2])| |
| 810 | (nxt_fp[7] & ftu_bus_2_is_first & ftu_instr_valid_c[2])| |
| 811 | (nxt_fp[4] & ftu_bus_3_is_first & ftu_instr_valid_c[2])) & ftu_fetch_thr_c & ~ftu_redirect_bf; |
| 812 | |
| 813 | ////////////////////////////////////////////////////////////// |
| 814 | // Bus 3 selects |
| 815 | ////////////////////////////////////////////////////////////// |
| 816 | assign buf1_val_inst3 = ((nxt_fp[5] & ftu_bus_0_is_first & ftu_instr_valid_c[3])| |
| 817 | (nxt_fp[6] & ftu_bus_1_is_first & ftu_instr_valid_c[3])| |
| 818 | (nxt_fp[7] & ftu_bus_2_is_first & ftu_instr_valid_c[3])| |
| 819 | (nxt_fp[1] & ftu_bus_3_is_first & ftu_instr_valid_c[3])) & ftu_fetch_thr_c & ~ftu_redirect_bf; |
| 820 | |
| 821 | assign buf2_val_inst3 = ((nxt_fp[6] & ftu_bus_0_is_first & ftu_instr_valid_c[3])| |
| 822 | (nxt_fp[7] & ftu_bus_1_is_first & ftu_instr_valid_c[3])| |
| 823 | (nxt_fp[1] & ftu_bus_2_is_first & ftu_instr_valid_c[3])| |
| 824 | (nxt_fp[2] & ftu_bus_3_is_first & ftu_instr_valid_c[3])) & ftu_fetch_thr_c & ~ftu_redirect_bf; |
| 825 | |
| 826 | assign buf3_val_inst3 = ((nxt_fp[7] & ftu_bus_0_is_first & ftu_instr_valid_c[3])| |
| 827 | (nxt_fp[1] & ftu_bus_1_is_first & ftu_instr_valid_c[3])| |
| 828 | (nxt_fp[2] & ftu_bus_2_is_first & ftu_instr_valid_c[3])| |
| 829 | (nxt_fp[3] & ftu_bus_3_is_first & ftu_instr_valid_c[3])) & ftu_fetch_thr_c & ~ftu_redirect_bf; |
| 830 | |
| 831 | assign buf4_val_inst3 = ((nxt_fp[1] & ftu_bus_0_is_first & ftu_instr_valid_c[3])| |
| 832 | (nxt_fp[2] & ftu_bus_1_is_first & ftu_instr_valid_c[3])| |
| 833 | (nxt_fp[3] & ftu_bus_2_is_first & ftu_instr_valid_c[3])| |
| 834 | (nxt_fp[4] & ftu_bus_3_is_first & ftu_instr_valid_c[3])) & ftu_fetch_thr_c & ~ftu_redirect_bf; |
| 835 | |
| 836 | assign buf5_val_inst3 = ((nxt_fp[2] & ftu_bus_0_is_first & ftu_instr_valid_c[3])| |
| 837 | (nxt_fp[3] & ftu_bus_1_is_first & ftu_instr_valid_c[3])| |
| 838 | (nxt_fp[4] & ftu_bus_2_is_first & ftu_instr_valid_c[3])| |
| 839 | (nxt_fp[5] & ftu_bus_3_is_first & ftu_instr_valid_c[3])) & ftu_fetch_thr_c & ~ftu_redirect_bf; |
| 840 | |
| 841 | assign buf6_val_inst3 = ((nxt_fp[3] & ftu_bus_0_is_first & ftu_instr_valid_c[3])| |
| 842 | (nxt_fp[4] & ftu_bus_1_is_first & ftu_instr_valid_c[3])| |
| 843 | (nxt_fp[5] & ftu_bus_2_is_first & ftu_instr_valid_c[3])| |
| 844 | (nxt_fp[6] & ftu_bus_3_is_first & ftu_instr_valid_c[3])) & ftu_fetch_thr_c & ~ftu_redirect_bf; |
| 845 | |
| 846 | assign buf7_val_inst3 = ((nxt_fp[4] & ftu_bus_0_is_first & ftu_instr_valid_c[3])| |
| 847 | (nxt_fp[5] & ftu_bus_1_is_first & ftu_instr_valid_c[3])| |
| 848 | (nxt_fp[6] & ftu_bus_2_is_first & ftu_instr_valid_c[3])| |
| 849 | (nxt_fp[7] & ftu_bus_3_is_first & ftu_instr_valid_c[3])) & ftu_fetch_thr_c & ~ftu_redirect_bf; |
| 850 | |
| 851 | assign buf1_val_hold = (buf1_val_inst0 | buf1_val_inst1 | buf1_val_inst2 | buf1_val_inst3); |
| 852 | assign buf2_val_hold = (buf2_val_inst0 | buf2_val_inst1 | buf2_val_inst2 | buf2_val_inst3); |
| 853 | assign buf3_val_hold = (buf3_val_inst0 | buf3_val_inst1 | buf3_val_inst2 | buf3_val_inst3); |
| 854 | assign buf4_val_hold = (buf4_val_inst0 | buf4_val_inst1 | buf4_val_inst2 | buf4_val_inst3); |
| 855 | assign buf5_val_hold = (buf5_val_inst0 | buf5_val_inst1 | buf5_val_inst2 | buf5_val_inst3); |
| 856 | assign buf6_val_hold = (buf6_val_inst0 | buf6_val_inst1 | buf6_val_inst2 | buf6_val_inst3); |
| 857 | assign buf7_val_hold = (buf7_val_inst0 | buf7_val_inst1 | buf7_val_inst2 | buf7_val_inst3); |
| 858 | |
| 859 | |
| 860 | assign ibq_buf1_sel_n_lsb = buf1_val_hold & ~ibq_buf1_sel_lsb ; |
| 861 | assign ibq_buf2_sel_n_lsb = buf2_val_hold & ~ibq_buf2_sel_lsb ; |
| 862 | assign ibq_buf3_sel_n_lsb = buf3_val_hold & ~ibq_buf3_sel_lsb ; |
| 863 | assign ibq_buf4_sel_n_lsb = buf4_val_hold & ~ibq_buf4_sel_lsb ; |
| 864 | assign ibq_buf5_sel_n_lsb = buf5_val_hold & ~ibq_buf5_sel_lsb ; |
| 865 | assign ibq_buf6_sel_n_lsb = buf6_val_hold & ~ibq_buf6_sel_lsb ; |
| 866 | assign ibq_buf7_sel_n_lsb = buf7_val_hold & ~ibq_buf7_sel_lsb ; |
| 867 | |
| 868 | |
| 869 | ///////////////////////////////////////////////////////// |
| 870 | // Generate the cur_fp[7:1] // |
| 871 | ///////////////////////////////////////////////////////// |
| 872 | // The new fp depends on the numbers of new instrs // |
| 873 | // whether the buffer is empty, and the original // |
| 874 | // pointer. Here are all the different cases. // |
| 875 | // // |
| 876 | // 1) cur_fp is the same if : // |
| 877 | // a) no fetch -- don't care about emptiness or pick// |
| 878 | // fetch = ftu_fetch_thr_c & ftu_instr_valid_c[0]// |
| 879 | // 2) nxt_fp is cur_fp shift left by one. // |
| 880 | // a) 1 new inst fetched // |
| 881 | // 3) nxt_fp is cur_fp shift left by two. // |
| 882 | // a) 2 new inst fetched // |
| 883 | // 4) nxt_fp is cur_fp shift left by three. // |
| 884 | // a) 3 new inst fetched // |
| 885 | // 5) nxt_fp is cur_fp shift left by four // |
| 886 | // a) 4 new inst fetched // |
| 887 | ///////////////////////////////////////////////////////// |
| 888 | assign instr_sf_valid_except_c = ftu_instr_sf_valid_c & ftu_exception_valid_c & ftu_fetch_thr_c; |
| 889 | ifu_ibu_ibq_ctl_msff_ctl_macro__width_14 fetch_sig_reg ( |
| 890 | .scan_in(fetch_sig_reg_scanin), |
| 891 | .scan_out(fetch_sig_reg_scanout), |
| 892 | .l1clk(l1clk), |
| 893 | .din ({ftu_fetch_thr_c,any_instr_valid,ftu_bus_0_is_first, ftu_bus_1_is_first, instr_sf_valid_except_c,instr_sf_valid_except_p, |
| 894 | ftu_bus_2_is_first, ftu_bus_3_is_first ,pku_flush_upper_buffer,ftu_redirect_bf,ftu_instr_valid_c[3:0] }), |
| 895 | .dout ({fetch_thr_p,any_instr_valid_p,bus_0_is_first_p, bus_1_is_first_p, instr_sf_valid_except_p,instr_sf_valid_except_p_ff, |
| 896 | bus_2_is_first_p, bus_3_is_first_p,flush_upper_buffer_ff,redirect_p,instr_valid_p[3:0]}), |
| 897 | .siclk(siclk), |
| 898 | .soclk(soclk)); |
| 899 | |
| 900 | // all the shifts must be re-evaluated. |
| 901 | |
| 902 | assign sel_no_shift = ~reset_fp_to_one & ~(fetch_thr_p & any_instr_valid_p) ; |
| 903 | |
| 904 | assign sel_shift_left_by_one = ~reset_fp_to_one & fetch_thr_p & ~redirect_p & |
| 905 | ((bus_0_is_first_p & instr_valid_p[0] & ~instr_valid_p[1]) | |
| 906 | (bus_1_is_first_p & instr_valid_p[1] & ~instr_valid_p[2]) | |
| 907 | (bus_2_is_first_p & instr_valid_p[2] & ~instr_valid_p[3]) | |
| 908 | (bus_3_is_first_p & instr_valid_p[3] & ~instr_valid_p[0])); |
| 909 | |
| 910 | assign sel_shift_left_by_two = ~reset_fp_to_one & fetch_thr_p & ~redirect_p & |
| 911 | ((bus_0_is_first_p & instr_valid_p[1] & ~instr_valid_p[2]) | |
| 912 | (bus_1_is_first_p & instr_valid_p[2] & ~instr_valid_p[3]) | |
| 913 | (bus_2_is_first_p & instr_valid_p[3] & ~instr_valid_p[0]) | |
| 914 | (bus_3_is_first_p & instr_valid_p[0] & ~instr_valid_p[1])); |
| 915 | |
| 916 | assign sel_shift_left_by_three = ~reset_fp_to_one & fetch_thr_p & ~redirect_p & |
| 917 | ((bus_0_is_first_p & instr_valid_p[2] & ~instr_valid_p[3]) | |
| 918 | (bus_1_is_first_p & instr_valid_p[3] & ~instr_valid_p[0]) | |
| 919 | (bus_2_is_first_p & instr_valid_p[0] & ~instr_valid_p[1]) | |
| 920 | (bus_3_is_first_p & instr_valid_p[1] & ~instr_valid_p[2])); |
| 921 | |
| 922 | assign sel_shift_left_by_four = ~reset_fp_to_one & fetch_thr_p & ~redirect_p & |
| 923 | ((bus_0_is_first_p & instr_valid_p[3] ) | |
| 924 | (bus_1_is_first_p & instr_valid_p[0] ) | |
| 925 | (bus_2_is_first_p & instr_valid_p[1] ) | |
| 926 | (bus_3_is_first_p & instr_valid_p[2] )); |
| 927 | |
| 928 | assign reset_fp_to_one = flush_upper_buffer_ff | instr_sf_valid_except_p_ff; |
| 929 | |
| 930 | assign nxt_fp[7:1] = ({7{sel_no_shift}} & cur_fp[7:1]) | |
| 931 | ({7{reset_fp_to_one}} & 7'b0000001) | |
| 932 | ({7{sel_shift_left_by_one}} & {cur_fp[6:1], cur_fp[7]}) | |
| 933 | ({7{sel_shift_left_by_two}} & {cur_fp[5:1], cur_fp[7:6]}) | |
| 934 | ({7{sel_shift_left_by_three}} & {cur_fp[4:1], cur_fp[7:5]})| |
| 935 | ({7{sel_shift_left_by_four}} & {cur_fp[3:1], cur_fp[7:4]}); |
| 936 | |
| 937 | ifu_ibu_ibq_ctl_msff_ctl_macro__width_6 cur_fp_7to2 ( |
| 938 | .scan_in(cur_fp_7to2_scanin), |
| 939 | .scan_out(cur_fp_7to2_scanout), |
| 940 | .l1clk(l1clk_pm1), |
| 941 | .din (nxt_fp[7:2]), |
| 942 | .dout (cur_fpq[7:2]), |
| 943 | .siclk(siclk), |
| 944 | .soclk(soclk) |
| 945 | ); |
| 946 | |
| 947 | assign nxt_fpd[1] = ~nxt_fp[1]; |
| 948 | |
| 949 | ifu_ibu_ibq_ctl_msff_ctl_macro__width_1 cur_fp_1 ( |
| 950 | .scan_in(cur_fp_1_scanin), |
| 951 | .scan_out(cur_fp_1_scanout), |
| 952 | .l1clk(l1clk_pm1), |
| 953 | .din (nxt_fpd[1]), |
| 954 | .dout (cur_fpq[1]), |
| 955 | .siclk(siclk), |
| 956 | .soclk(soclk) |
| 957 | ); |
| 958 | |
| 959 | assign cur_fp[7:1] = {cur_fpq[7:2], ~cur_fpq[1]} ; |
| 960 | |
| 961 | // redirecting the pointer(s) |
| 962 | // update curr_ip, up to one instruction issued per cycle: |
| 963 | // if the pointer is at 7'b10000000, then restart from 7'b00000001; |
| 964 | // special when buf1-7 are empty. aka. issueing an instruction from buf0. |
| 965 | |
| 966 | ///////////////////////////////////////////////////////// |
| 967 | // Generate the next_ip[7:1] |
| 968 | ///////////////////////////////////////////////////////// |
| 969 | // |
| 970 | // must note whether an instr goes into buf0 |
| 971 | // must note the fetch&issue case |
| 972 | // 1) next_ip shifts by one if ~pku_flush_upper_buffer: |
| 973 | // - pick or flush0 occurs while ~buf7to1_empty |
| 974 | // - fetch occurs (at buf0) while buf0_sel_inst0* |
| 975 | // 2) next_ip stays if ~pku_flush_upper_buffer: |
| 976 | // - ~pick and ~flush0 & nofetch at buf0 |
| 977 | // 3) next_ip = nxt_fp if pku_flush_upper_buffer |
| 978 | ///////////////////////////////////////////////////////// |
| 979 | |
| 980 | |
| 981 | assign no_shift_ip = ~(shift_left_one_ip | fp_plus_1_to_ip | fp_to_ip) ; |
| 982 | assign shift_left_one_ip = ((pku_pick_p | (pku_flush_buffer0 & ~ibu_empty))) & ~pku_flush_upper_buffer & ~instr_sf_valid_except_p; |
| 983 | assign fp_to_ip = (pku_flush_upper_buffer | instr_sf_valid_except_p) & ~(ibu_empty | pku_pick_p | pku_flush_buffer0) ; |
| 984 | assign fp_plus_1_to_ip = (pku_flush_upper_buffer | instr_sf_valid_except_p) & (ibu_empty | pku_pick_p | pku_flush_buffer0); |
| 985 | |
| 986 | |
| 987 | assign next_ip[7:1] = ({7{shift_left_one_ip}} & {curr_ip[6:1], curr_ip[7]}) | |
| 988 | ({7{no_shift_ip}} & curr_ip[7:1]) | |
| 989 | ({7{fp_to_ip}} & 7'b0000001) | |
| 990 | ({7{fp_plus_1_to_ip}} & 7'b0000010); |
| 991 | |
| 992 | ifu_ibu_ibq_ctl_msff_ctl_macro__width_6 next_ip_7to2 ( |
| 993 | .scan_in(next_ip_7to2_scanin), |
| 994 | .scan_out(next_ip_7to2_scanout), |
| 995 | .l1clk(l1clk), |
| 996 | .din ({next_ip[7:3],next_ip[1]}), |
| 997 | .dout ({curr_ipq[7:3],curr_ipq[1]}), |
| 998 | .siclk(siclk), |
| 999 | .soclk(soclk) |
| 1000 | ); |
| 1001 | |
| 1002 | assign next_ipd[2] = ~next_ip[2]; |
| 1003 | ifu_ibu_ibq_ctl_msff_ctl_macro__width_1 next_ip_1 ( |
| 1004 | .scan_in(next_ip_1_scanin), |
| 1005 | .scan_out(next_ip_1_scanout), |
| 1006 | .l1clk(l1clk), |
| 1007 | .din (next_ipd[2]), |
| 1008 | .dout (curr_ipq[2]), |
| 1009 | .siclk(siclk), |
| 1010 | .soclk(soclk) |
| 1011 | ); |
| 1012 | |
| 1013 | assign curr_ip[7:1] = { curr_ipq[7:3], ~curr_ipq[2], curr_ipq[1]} ; |
| 1014 | |
| 1015 | //////////////////////////////////////////////////////// |
| 1016 | // generate the valids for buf1-7: |
| 1017 | // curr next |
| 1018 | // 0 0 a) no fetch, no issue OR |
| 1019 | // b) fetched inst0 & ibu_empty |
| 1020 | // 0 1 a) fetch inst0 but cannot have below |
| 1021 | // i) buf0_sel_inst0 = 1 |
| 1022 | // ii) flush_upper_buffer = 1 |
| 1023 | // b) fetch inst1 or 2 & ~flush_upper |
| 1024 | // 1 0 a) issue or flush_upper and no fetch |
| 1025 | // 1 1 a) no issue (stay valid) |
| 1026 | // i) ~pku_pick_p & ~flush_upper |
| 1027 | // ii) ~flush_upper |
| 1028 | // buf0_sel_inst0 means ftu_fetch_thr_c & ftu_instr_valid_c[0] & (ibu_empty | (pku_pick_p | pku_flush_buffer0) & buf7to1_empty). |
| 1029 | // (ibq_buf1_sel_inst0 & ~ibq_buf0_sel_inst0) | ibq_buf1_sel_inst1 | ibq_buf1_sel_inst2 | (~ibq_buf0_sel_buf1 & buf_valid_p[1]) |
| 1030 | // if an instruction is issued from any buffer, invalidate that entry. |
| 1031 | //////////////////////////////////////////////////////// |
| 1032 | |
| 1033 | assign buf_valid_in[1] = (((ibq_buf1_sel_lsb & ~(ftu_fetch_thr_c & |
| 1034 | (ibu_empty | (pku_pick_p | pku_flush_buffer0) & buf7to1_empty))) | |
| 1035 | ibq_buf1_sel_n_lsb) & ~buf_valid_p[1]) | |
| 1036 | (~(curr_ip[1] & (pku_pick_p | pku_flush_buffer0)) & buf_valid_p[1]) | |
| 1037 | (ftu_exception_valid_c & ftu_fetch_thr_c & ~ftu_redirect_bf); |
| 1038 | |
| 1039 | assign buf_valid_in[2] = (((ibq_buf2_sel_lsb & ~(ftu_fetch_thr_c & |
| 1040 | (ibu_empty | (pku_pick_p | pku_flush_buffer0) & buf7to1_empty))) | |
| 1041 | ibq_buf2_sel_n_lsb) & ~buf_valid_p[2]) | |
| 1042 | (~(curr_ip[2] & (pku_pick_p | pku_flush_buffer0)) & buf_valid_p[2])| |
| 1043 | (ftu_exception_valid_c & ftu_fetch_thr_c & ~ftu_redirect_bf); |
| 1044 | |
| 1045 | assign buf_valid_in[3] = (((ibq_buf3_sel_lsb & ~(ftu_fetch_thr_c & |
| 1046 | (ibu_empty | (pku_pick_p | pku_flush_buffer0) & buf7to1_empty))) | |
| 1047 | ibq_buf3_sel_n_lsb) & ~buf_valid_p[3]) | |
| 1048 | (~(curr_ip[3] & (pku_pick_p | pku_flush_buffer0)) & buf_valid_p[3])| |
| 1049 | (ftu_exception_valid_c & ftu_fetch_thr_c & ~ftu_redirect_bf); |
| 1050 | |
| 1051 | assign buf_valid_in[4] = (((ibq_buf4_sel_lsb & ~(ftu_fetch_thr_c & |
| 1052 | (ibu_empty | (pku_pick_p | pku_flush_buffer0) & buf7to1_empty))) | |
| 1053 | ibq_buf4_sel_n_lsb) & ~buf_valid_p[4]) | |
| 1054 | (~(curr_ip[4] & (pku_pick_p | pku_flush_buffer0)) & buf_valid_p[4])| |
| 1055 | (ftu_exception_valid_c & ftu_fetch_thr_c & ~ftu_redirect_bf); |
| 1056 | |
| 1057 | assign buf_valid_in[5] = (((ibq_buf5_sel_lsb & ~(ftu_fetch_thr_c & |
| 1058 | (ibu_empty | (pku_pick_p | pku_flush_buffer0) & buf7to1_empty))) | |
| 1059 | ibq_buf5_sel_n_lsb) & ~buf_valid_p[5]) | |
| 1060 | (~(curr_ip[5] & (pku_pick_p | pku_flush_buffer0)) & buf_valid_p[5])| |
| 1061 | (ftu_exception_valid_c & ftu_fetch_thr_c & ~ftu_redirect_bf); |
| 1062 | |
| 1063 | assign buf_valid_in[6] = (((ibq_buf6_sel_lsb & ~(ftu_fetch_thr_c & |
| 1064 | (ibu_empty | (pku_pick_p | pku_flush_buffer0) & buf7to1_empty))) | |
| 1065 | ibq_buf6_sel_n_lsb) & ~buf_valid_p[6]) | |
| 1066 | (~(curr_ip[6] & (pku_pick_p | pku_flush_buffer0)) & buf_valid_p[6])| |
| 1067 | (ftu_exception_valid_c & ftu_fetch_thr_c & ~ftu_redirect_bf); |
| 1068 | |
| 1069 | assign buf_valid_in[7] = (((ibq_buf7_sel_lsb & ~(ftu_fetch_thr_c & |
| 1070 | (ibu_empty | (pku_pick_p | pku_flush_buffer0) & buf7to1_empty))) | |
| 1071 | ibq_buf7_sel_n_lsb) & ~buf_valid_p[7]) | |
| 1072 | (~(curr_ip[7] & (pku_pick_p | pku_flush_buffer0)) & buf_valid_p[7])| |
| 1073 | (ftu_exception_valid_c & ftu_fetch_thr_c & ~ftu_redirect_bf); |
| 1074 | |
| 1075 | assign buf_valid_din[7:1] = ({7{~pku_flush_upper_buffer & ~instr_sf_valid_except_p}} & buf_valid_in[7:1]); |
| 1076 | |
| 1077 | ifu_ibu_ibq_ctl_msff_ctl_macro__width_7 valid_outpk_7to1 ( |
| 1078 | .scan_in(valid_outpk_7to1_scanin), |
| 1079 | .scan_out(valid_outpk_7to1_scanout), |
| 1080 | .l1clk(l1clk_pm1), |
| 1081 | .din(buf_valid_din[7:1]), |
| 1082 | .dout (buf_valid_p[7:1]), |
| 1083 | .siclk(siclk), |
| 1084 | .soclk(soclk) |
| 1085 | ); |
| 1086 | |
| 1087 | /////////////////////////////////////////////////////// |
| 1088 | // generate the valids for buf0: |
| 1089 | // curr next |
| 1090 | // 0 0 no fetch, no issue OR fetch one & (issue one | flush0) ? |
| 1091 | // 0 1 fetch 1 or more instr (issue cannot be on): |
| 1092 | // - ftu_fetch_thr_c & ftu_instr_valid_c[0] |
| 1093 | // - ifu_buf0_valid_p = 0 (same as ibu_empty = 1) |
| 1094 | // - flush0 = 0 |
| 1095 | // - flush_upper = 0 |
| 1096 | // |
| 1097 | // 1 0 issue & buf7to1_empty or flush0 |
| 1098 | // 1 1 a) issue or flush0 & ~buf7to1_empty |
| 1099 | // - pku_pick_p | pku_flush_buffer0 = 1 |
| 1100 | // - flush_upper = 0 |
| 1101 | // - buf7to1_empty = 0 |
| 1102 | // - flush0 = 0 |
| 1103 | // b) issue or flush0 & buf7to1_empty & fetch |
| 1104 | // - pku_pick_p | pku_flush_buffer0 = 1 |
| 1105 | // - flush_upper = 0 |
| 1106 | // - buf7to1_empty = 1 |
| 1107 | // - ftu_fetch_thr_c & ftu_instr_valid_c[0] |
| 1108 | // - flush0 = 0 |
| 1109 | // c) no issue |
| 1110 | // - pku_pick_p = 0 |
| 1111 | // - flush_upper = x |
| 1112 | // - flush0 = 0 |
| 1113 | // |
| 1114 | // ~flush_upper OR ~issue & ~flush0 |
| 1115 | //////////////////////////////////////////////////////// |
| 1116 | |
| 1117 | // validate if buf0 picks any entry in buf1-7, stay validated if no pick, or any fetching is done |
| 1118 | assign any_instr_valid = ~ftu_redirect_bf & (ftu_instr_valid_c[0] | ftu_instr_valid_c[1] | ftu_instr_valid_c[2] | ftu_instr_valid_c[3]) ; |
| 1119 | |
| 1120 | assign buf_valid_in[0] = ( ftu_fetch_thr_c & any_instr_valid & ~true_buf0_valid_p & ~pku_flush_upper_buffer ) | |
| 1121 | ( ftu_fetch_thr_c & any_instr_valid & true_buf0_valid_p & pku_pick_p & ~pku_flush_upper_buffer) | |
| 1122 | (~true_buf0_valid_p & ~buf7to1_empty & ~pku_flush_upper_buffer) | |
| 1123 | ( pku_pick_p & ~buf7to1_empty & ~pku_flush_upper_buffer) | |
| 1124 | (~pku_pick_p & true_buf0_valid_p); |
| 1125 | |
| 1126 | |
| 1127 | |
| 1128 | assign buf_valid_din[0] = buf_valid_in[0] | |
| 1129 | (ftu_exception_valid_c & ftu_fetch_thr_c & ~ftu_redirect_bf & ~pku_flush_upper_buffer ); |
| 1130 | |
| 1131 | ifu_ibu_ibq_ctl_msff_ctl_macro__width_1 valid_outpk_buf0 ( |
| 1132 | .scan_in(valid_outpk_buf0_scanin), |
| 1133 | .scan_out(valid_outpk_buf0_scanout), |
| 1134 | .l1clk(l1clk_pm1), |
| 1135 | .din(buf_valid_din[0]), |
| 1136 | .dout (ifu_buf0_valid_p), |
| 1137 | .siclk(siclk), |
| 1138 | .soclk(soclk) |
| 1139 | ); |
| 1140 | |
| 1141 | assign true_buf0_valid_p = ifu_buf0_valid_p & ~pku_flush_buffer0; |
| 1142 | |
| 1143 | assign ifu_upper_buffer_valid_p = (buf_valid_p[1] | buf_valid_p[2] | buf_valid_p[3] | |
| 1144 | buf_valid_p[4] | buf_valid_p[5] | buf_valid_p[6] | |
| 1145 | buf_valid_p[7] ) & ~instr_sf_valid_except_p; |
| 1146 | |
| 1147 | |
| 1148 | assign buf7to1_empty = ~ifu_upper_buffer_valid_p; |
| 1149 | assign ibu_empty = ~ifu_buf0_valid_p; |
| 1150 | |
| 1151 | |
| 1152 | // room for >4: check buffers 1-7 ; |
| 1153 | assign ibu_room_4ormore = (~buf_valid_p[1] & ~buf_valid_p[2] & ~buf_valid_p[3] & ~buf_valid_p[4]) | |
| 1154 | (~buf_valid_p[2] & ~buf_valid_p[3] & ~buf_valid_p[4] & ~buf_valid_p[5]) | |
| 1155 | (~buf_valid_p[3] & ~buf_valid_p[4] & ~buf_valid_p[5] & ~buf_valid_p[6]) | |
| 1156 | (~buf_valid_p[4] & ~buf_valid_p[5] & ~buf_valid_p[6] & ~buf_valid_p[7]) | |
| 1157 | (~buf_valid_p[5] & ~buf_valid_p[6] & ~buf_valid_p[7] & ~buf_valid_p[1]) | |
| 1158 | (~buf_valid_p[6] & ~buf_valid_p[7] & ~buf_valid_p[1] & ~buf_valid_p[2]) | |
| 1159 | (~buf_valid_p[7] & ~buf_valid_p[1] & ~buf_valid_p[2] & ~buf_valid_p[3]); |
| 1160 | |
| 1161 | /////////////////////////////////////////////////////////////////////// |
| 1162 | // Spare circuits // |
| 1163 | /////////////////////////////////////////////////////////////////////// |
| 1164 | ifu_ibu_ibq_ctl_spare_ctl_macro__num_2 spares ( |
| 1165 | .scan_in(spares_scanin), |
| 1166 | .scan_out(spares_scanout), |
| 1167 | .l1clk (l1clk), |
| 1168 | .siclk(siclk), |
| 1169 | .soclk(soclk) |
| 1170 | ); |
| 1171 | |
| 1172 | |
| 1173 | |
| 1174 | supply0 vss; |
| 1175 | supply1 vdd; |
| 1176 | assign se = tcu_scan_en ; |
| 1177 | // fixscan start: |
| 1178 | assign buff_clken_reg_scanin = scan_in ; |
| 1179 | assign pmen_reg_scanin = buff_clken_reg_scanout ; |
| 1180 | assign fetch_sig_reg_scanin = pmen_reg_scanout ; |
| 1181 | assign cur_fp_7to2_scanin = fetch_sig_reg_scanout ; |
| 1182 | assign cur_fp_1_scanin = cur_fp_7to2_scanout ; |
| 1183 | assign next_ip_7to2_scanin = cur_fp_1_scanout ; |
| 1184 | assign next_ip_1_scanin = next_ip_7to2_scanout ; |
| 1185 | assign valid_outpk_7to1_scanin = next_ip_1_scanout ; |
| 1186 | assign valid_outpk_buf0_scanin = valid_outpk_7to1_scanout ; |
| 1187 | assign spares_scanin = valid_outpk_buf0_scanout ; |
| 1188 | assign scan_out = spares_scanout ; |
| 1189 | // fixscan end: |
| 1190 | endmodule |
| 1191 | |
| 1192 | |
| 1193 | |
| 1194 | |
| 1195 | |
| 1196 | |
| 1197 | // any PARAMS parms go into naming of macro |
| 1198 | |
| 1199 | module ifu_ibu_ibq_ctl_l1clkhdr_ctl_macro ( |
| 1200 | l2clk, |
| 1201 | l1en, |
| 1202 | pce_ov, |
| 1203 | stop, |
| 1204 | se, |
| 1205 | l1clk); |
| 1206 | |
| 1207 | |
| 1208 | input l2clk; |
| 1209 | input l1en; |
| 1210 | input pce_ov; |
| 1211 | input stop; |
| 1212 | input se; |
| 1213 | output l1clk; |
| 1214 | |
| 1215 | |
| 1216 | |
| 1217 | |
| 1218 | |
| 1219 | cl_sc1_l1hdr_8x c_0 ( |
| 1220 | |
| 1221 | |
| 1222 | .l2clk(l2clk), |
| 1223 | .pce(l1en), |
| 1224 | .l1clk(l1clk), |
| 1225 | .se(se), |
| 1226 | .pce_ov(pce_ov), |
| 1227 | .stop(stop) |
| 1228 | ); |
| 1229 | |
| 1230 | |
| 1231 | |
| 1232 | endmodule |
| 1233 | |
| 1234 | |
| 1235 | |
| 1236 | |
| 1237 | |
| 1238 | |
| 1239 | |
| 1240 | |
| 1241 | |
| 1242 | |
| 1243 | |
| 1244 | |
| 1245 | |
| 1246 | // any PARAMS parms go into naming of macro |
| 1247 | |
| 1248 | module ifu_ibu_ibq_ctl_msff_ctl_macro__width_1 ( |
| 1249 | din, |
| 1250 | l1clk, |
| 1251 | scan_in, |
| 1252 | siclk, |
| 1253 | soclk, |
| 1254 | dout, |
| 1255 | scan_out); |
| 1256 | wire [0:0] fdin; |
| 1257 | |
| 1258 | input [0:0] din; |
| 1259 | input l1clk; |
| 1260 | input scan_in; |
| 1261 | |
| 1262 | |
| 1263 | input siclk; |
| 1264 | input soclk; |
| 1265 | |
| 1266 | output [0:0] dout; |
| 1267 | output scan_out; |
| 1268 | assign fdin[0:0] = din[0:0]; |
| 1269 | |
| 1270 | |
| 1271 | |
| 1272 | |
| 1273 | |
| 1274 | |
| 1275 | dff #(1) d0_0 ( |
| 1276 | .l1clk(l1clk), |
| 1277 | .siclk(siclk), |
| 1278 | .soclk(soclk), |
| 1279 | .d(fdin[0:0]), |
| 1280 | .si(scan_in), |
| 1281 | .so(scan_out), |
| 1282 | .q(dout[0:0]) |
| 1283 | ); |
| 1284 | |
| 1285 | |
| 1286 | |
| 1287 | |
| 1288 | |
| 1289 | |
| 1290 | |
| 1291 | |
| 1292 | |
| 1293 | |
| 1294 | |
| 1295 | |
| 1296 | endmodule |
| 1297 | |
| 1298 | |
| 1299 | |
| 1300 | |
| 1301 | |
| 1302 | |
| 1303 | |
| 1304 | |
| 1305 | |
| 1306 | |
| 1307 | |
| 1308 | |
| 1309 | |
| 1310 | // any PARAMS parms go into naming of macro |
| 1311 | |
| 1312 | module ifu_ibu_ibq_ctl_msff_ctl_macro__width_14 ( |
| 1313 | din, |
| 1314 | l1clk, |
| 1315 | scan_in, |
| 1316 | siclk, |
| 1317 | soclk, |
| 1318 | dout, |
| 1319 | scan_out); |
| 1320 | wire [13:0] fdin; |
| 1321 | wire [12:0] so; |
| 1322 | |
| 1323 | input [13:0] din; |
| 1324 | input l1clk; |
| 1325 | input scan_in; |
| 1326 | |
| 1327 | |
| 1328 | input siclk; |
| 1329 | input soclk; |
| 1330 | |
| 1331 | output [13:0] dout; |
| 1332 | output scan_out; |
| 1333 | assign fdin[13:0] = din[13:0]; |
| 1334 | |
| 1335 | |
| 1336 | |
| 1337 | |
| 1338 | |
| 1339 | |
| 1340 | dff #(14) d0_0 ( |
| 1341 | .l1clk(l1clk), |
| 1342 | .siclk(siclk), |
| 1343 | .soclk(soclk), |
| 1344 | .d(fdin[13:0]), |
| 1345 | .si({scan_in,so[12:0]}), |
| 1346 | .so({so[12:0],scan_out}), |
| 1347 | .q(dout[13:0]) |
| 1348 | ); |
| 1349 | |
| 1350 | |
| 1351 | |
| 1352 | |
| 1353 | |
| 1354 | |
| 1355 | |
| 1356 | |
| 1357 | |
| 1358 | |
| 1359 | |
| 1360 | |
| 1361 | endmodule |
| 1362 | |
| 1363 | |
| 1364 | |
| 1365 | |
| 1366 | |
| 1367 | |
| 1368 | |
| 1369 | |
| 1370 | |
| 1371 | |
| 1372 | |
| 1373 | |
| 1374 | |
| 1375 | // any PARAMS parms go into naming of macro |
| 1376 | |
| 1377 | module ifu_ibu_ibq_ctl_msff_ctl_macro__width_6 ( |
| 1378 | din, |
| 1379 | l1clk, |
| 1380 | scan_in, |
| 1381 | siclk, |
| 1382 | soclk, |
| 1383 | dout, |
| 1384 | scan_out); |
| 1385 | wire [5:0] fdin; |
| 1386 | wire [4:0] so; |
| 1387 | |
| 1388 | input [5:0] din; |
| 1389 | input l1clk; |
| 1390 | input scan_in; |
| 1391 | |
| 1392 | |
| 1393 | input siclk; |
| 1394 | input soclk; |
| 1395 | |
| 1396 | output [5:0] dout; |
| 1397 | output scan_out; |
| 1398 | assign fdin[5:0] = din[5:0]; |
| 1399 | |
| 1400 | |
| 1401 | |
| 1402 | |
| 1403 | |
| 1404 | |
| 1405 | dff #(6) d0_0 ( |
| 1406 | .l1clk(l1clk), |
| 1407 | .siclk(siclk), |
| 1408 | .soclk(soclk), |
| 1409 | .d(fdin[5:0]), |
| 1410 | .si({scan_in,so[4:0]}), |
| 1411 | .so({so[4:0],scan_out}), |
| 1412 | .q(dout[5:0]) |
| 1413 | ); |
| 1414 | |
| 1415 | |
| 1416 | |
| 1417 | |
| 1418 | |
| 1419 | |
| 1420 | |
| 1421 | |
| 1422 | |
| 1423 | |
| 1424 | |
| 1425 | |
| 1426 | endmodule |
| 1427 | |
| 1428 | |
| 1429 | |
| 1430 | |
| 1431 | |
| 1432 | |
| 1433 | |
| 1434 | |
| 1435 | |
| 1436 | |
| 1437 | |
| 1438 | |
| 1439 | |
| 1440 | // any PARAMS parms go into naming of macro |
| 1441 | |
| 1442 | module ifu_ibu_ibq_ctl_msff_ctl_macro__width_7 ( |
| 1443 | din, |
| 1444 | l1clk, |
| 1445 | scan_in, |
| 1446 | siclk, |
| 1447 | soclk, |
| 1448 | dout, |
| 1449 | scan_out); |
| 1450 | wire [6:0] fdin; |
| 1451 | wire [5:0] so; |
| 1452 | |
| 1453 | input [6:0] din; |
| 1454 | input l1clk; |
| 1455 | input scan_in; |
| 1456 | |
| 1457 | |
| 1458 | input siclk; |
| 1459 | input soclk; |
| 1460 | |
| 1461 | output [6:0] dout; |
| 1462 | output scan_out; |
| 1463 | assign fdin[6:0] = din[6:0]; |
| 1464 | |
| 1465 | |
| 1466 | |
| 1467 | |
| 1468 | |
| 1469 | |
| 1470 | dff #(7) d0_0 ( |
| 1471 | .l1clk(l1clk), |
| 1472 | .siclk(siclk), |
| 1473 | .soclk(soclk), |
| 1474 | .d(fdin[6:0]), |
| 1475 | .si({scan_in,so[5:0]}), |
| 1476 | .so({so[5:0],scan_out}), |
| 1477 | .q(dout[6:0]) |
| 1478 | ); |
| 1479 | |
| 1480 | |
| 1481 | |
| 1482 | |
| 1483 | |
| 1484 | |
| 1485 | |
| 1486 | |
| 1487 | |
| 1488 | |
| 1489 | |
| 1490 | |
| 1491 | endmodule |
| 1492 | |
| 1493 | |
| 1494 | |
| 1495 | |
| 1496 | |
| 1497 | |
| 1498 | |
| 1499 | |
| 1500 | |
| 1501 | // Description: Spare gate macro for control blocks |
| 1502 | // |
| 1503 | // Param num controls the number of times the macro is added |
| 1504 | // flops=0 can be used to use only combination spare logic |
| 1505 | |
| 1506 | |
| 1507 | module ifu_ibu_ibq_ctl_spare_ctl_macro__num_2 ( |
| 1508 | l1clk, |
| 1509 | scan_in, |
| 1510 | siclk, |
| 1511 | soclk, |
| 1512 | scan_out); |
| 1513 | wire si_0; |
| 1514 | wire so_0; |
| 1515 | wire spare0_flop_unused; |
| 1516 | wire spare0_buf_32x_unused; |
| 1517 | wire spare0_nand3_8x_unused; |
| 1518 | wire spare0_inv_8x_unused; |
| 1519 | wire spare0_aoi22_4x_unused; |
| 1520 | wire spare0_buf_8x_unused; |
| 1521 | wire spare0_oai22_4x_unused; |
| 1522 | wire spare0_inv_16x_unused; |
| 1523 | wire spare0_nand2_16x_unused; |
| 1524 | wire spare0_nor3_4x_unused; |
| 1525 | wire spare0_nand2_8x_unused; |
| 1526 | wire spare0_buf_16x_unused; |
| 1527 | wire spare0_nor2_16x_unused; |
| 1528 | wire spare0_inv_32x_unused; |
| 1529 | wire si_1; |
| 1530 | wire so_1; |
| 1531 | wire spare1_flop_unused; |
| 1532 | wire spare1_buf_32x_unused; |
| 1533 | wire spare1_nand3_8x_unused; |
| 1534 | wire spare1_inv_8x_unused; |
| 1535 | wire spare1_aoi22_4x_unused; |
| 1536 | wire spare1_buf_8x_unused; |
| 1537 | wire spare1_oai22_4x_unused; |
| 1538 | wire spare1_inv_16x_unused; |
| 1539 | wire spare1_nand2_16x_unused; |
| 1540 | wire spare1_nor3_4x_unused; |
| 1541 | wire spare1_nand2_8x_unused; |
| 1542 | wire spare1_buf_16x_unused; |
| 1543 | wire spare1_nor2_16x_unused; |
| 1544 | wire spare1_inv_32x_unused; |
| 1545 | |
| 1546 | |
| 1547 | input l1clk; |
| 1548 | input scan_in; |
| 1549 | input siclk; |
| 1550 | input soclk; |
| 1551 | output scan_out; |
| 1552 | |
| 1553 | cl_sc1_msff_8x spare0_flop (.l1clk(l1clk), |
| 1554 | .siclk(siclk), |
| 1555 | .soclk(soclk), |
| 1556 | .si(si_0), |
| 1557 | .so(so_0), |
| 1558 | .d(1'b0), |
| 1559 | .q(spare0_flop_unused)); |
| 1560 | assign si_0 = scan_in; |
| 1561 | |
| 1562 | cl_u1_buf_32x spare0_buf_32x (.in(1'b1), |
| 1563 | .out(spare0_buf_32x_unused)); |
| 1564 | cl_u1_nand3_8x spare0_nand3_8x (.in0(1'b1), |
| 1565 | .in1(1'b1), |
| 1566 | .in2(1'b1), |
| 1567 | .out(spare0_nand3_8x_unused)); |
| 1568 | cl_u1_inv_8x spare0_inv_8x (.in(1'b1), |
| 1569 | .out(spare0_inv_8x_unused)); |
| 1570 | cl_u1_aoi22_4x spare0_aoi22_4x (.in00(1'b1), |
| 1571 | .in01(1'b1), |
| 1572 | .in10(1'b1), |
| 1573 | .in11(1'b1), |
| 1574 | .out(spare0_aoi22_4x_unused)); |
| 1575 | cl_u1_buf_8x spare0_buf_8x (.in(1'b1), |
| 1576 | .out(spare0_buf_8x_unused)); |
| 1577 | cl_u1_oai22_4x spare0_oai22_4x (.in00(1'b1), |
| 1578 | .in01(1'b1), |
| 1579 | .in10(1'b1), |
| 1580 | .in11(1'b1), |
| 1581 | .out(spare0_oai22_4x_unused)); |
| 1582 | cl_u1_inv_16x spare0_inv_16x (.in(1'b1), |
| 1583 | .out(spare0_inv_16x_unused)); |
| 1584 | cl_u1_nand2_16x spare0_nand2_16x (.in0(1'b1), |
| 1585 | .in1(1'b1), |
| 1586 | .out(spare0_nand2_16x_unused)); |
| 1587 | cl_u1_nor3_4x spare0_nor3_4x (.in0(1'b0), |
| 1588 | .in1(1'b0), |
| 1589 | .in2(1'b0), |
| 1590 | .out(spare0_nor3_4x_unused)); |
| 1591 | cl_u1_nand2_8x spare0_nand2_8x (.in0(1'b1), |
| 1592 | .in1(1'b1), |
| 1593 | .out(spare0_nand2_8x_unused)); |
| 1594 | cl_u1_buf_16x spare0_buf_16x (.in(1'b1), |
| 1595 | .out(spare0_buf_16x_unused)); |
| 1596 | cl_u1_nor2_16x spare0_nor2_16x (.in0(1'b0), |
| 1597 | .in1(1'b0), |
| 1598 | .out(spare0_nor2_16x_unused)); |
| 1599 | cl_u1_inv_32x spare0_inv_32x (.in(1'b1), |
| 1600 | .out(spare0_inv_32x_unused)); |
| 1601 | |
| 1602 | cl_sc1_msff_8x spare1_flop (.l1clk(l1clk), |
| 1603 | .siclk(siclk), |
| 1604 | .soclk(soclk), |
| 1605 | .si(si_1), |
| 1606 | .so(so_1), |
| 1607 | .d(1'b0), |
| 1608 | .q(spare1_flop_unused)); |
| 1609 | assign si_1 = so_0; |
| 1610 | |
| 1611 | cl_u1_buf_32x spare1_buf_32x (.in(1'b1), |
| 1612 | .out(spare1_buf_32x_unused)); |
| 1613 | cl_u1_nand3_8x spare1_nand3_8x (.in0(1'b1), |
| 1614 | .in1(1'b1), |
| 1615 | .in2(1'b1), |
| 1616 | .out(spare1_nand3_8x_unused)); |
| 1617 | cl_u1_inv_8x spare1_inv_8x (.in(1'b1), |
| 1618 | .out(spare1_inv_8x_unused)); |
| 1619 | cl_u1_aoi22_4x spare1_aoi22_4x (.in00(1'b1), |
| 1620 | .in01(1'b1), |
| 1621 | .in10(1'b1), |
| 1622 | .in11(1'b1), |
| 1623 | .out(spare1_aoi22_4x_unused)); |
| 1624 | cl_u1_buf_8x spare1_buf_8x (.in(1'b1), |
| 1625 | .out(spare1_buf_8x_unused)); |
| 1626 | cl_u1_oai22_4x spare1_oai22_4x (.in00(1'b1), |
| 1627 | .in01(1'b1), |
| 1628 | .in10(1'b1), |
| 1629 | .in11(1'b1), |
| 1630 | .out(spare1_oai22_4x_unused)); |
| 1631 | cl_u1_inv_16x spare1_inv_16x (.in(1'b1), |
| 1632 | .out(spare1_inv_16x_unused)); |
| 1633 | cl_u1_nand2_16x spare1_nand2_16x (.in0(1'b1), |
| 1634 | .in1(1'b1), |
| 1635 | .out(spare1_nand2_16x_unused)); |
| 1636 | cl_u1_nor3_4x spare1_nor3_4x (.in0(1'b0), |
| 1637 | .in1(1'b0), |
| 1638 | .in2(1'b0), |
| 1639 | .out(spare1_nor3_4x_unused)); |
| 1640 | cl_u1_nand2_8x spare1_nand2_8x (.in0(1'b1), |
| 1641 | .in1(1'b1), |
| 1642 | .out(spare1_nand2_8x_unused)); |
| 1643 | cl_u1_buf_16x spare1_buf_16x (.in(1'b1), |
| 1644 | .out(spare1_buf_16x_unused)); |
| 1645 | cl_u1_nor2_16x spare1_nor2_16x (.in0(1'b0), |
| 1646 | .in1(1'b0), |
| 1647 | .out(spare1_nor2_16x_unused)); |
| 1648 | cl_u1_inv_32x spare1_inv_32x (.in(1'b1), |
| 1649 | .out(spare1_inv_32x_unused)); |
| 1650 | assign scan_out = so_1; |
| 1651 | |
| 1652 | |
| 1653 | |
| 1654 | endmodule |
| 1655 | |