| 1 | // ========== Copyright Header Begin ========================================== |
| 2 | // |
| 3 | // OpenSPARC T2 Processor File: lsu_rep_dp.v |
| 4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved |
| 5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. |
| 6 | // |
| 7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 8 | // |
| 9 | // This program is free software; you can redistribute it and/or modify |
| 10 | // it under the terms of the GNU General Public License as published by |
| 11 | // the Free Software Foundation; version 2 of the License. |
| 12 | // |
| 13 | // This program is distributed in the hope that it will be useful, |
| 14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | // GNU General Public License for more details. |
| 17 | // |
| 18 | // You should have received a copy of the GNU General Public License |
| 19 | // along with this program; if not, write to the Free Software |
| 20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 21 | // |
| 22 | // For the avoidance of doubt, and except that if any non-GPL license |
| 23 | // choice is available it will apply instead, Sun elects to use only |
| 24 | // the General Public License version 2 (GPLv2) at this time for any |
| 25 | // software where a choice of GPL license versions is made |
| 26 | // available with the language indicating that GPLv2 or any later version |
| 27 | // may be used, or where a choice of which version of the GPL is applied is |
| 28 | // otherwise unspecified. |
| 29 | // |
| 30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
| 31 | // CA 95054 USA or visit www.sun.com if you need additional information or |
| 32 | // have any questions. |
| 33 | // |
| 34 | // ========== Copyright Header End ============================================ |
| 35 | module lsu_rep_dp ( |
| 36 | lmd_fill_or_byp_data_m, |
| 37 | lmd_fill_or_byp_data_m_rep1, |
| 38 | stb_ram_data, |
| 39 | stb_ram_data_rep0, |
| 40 | stb_cam_data, |
| 41 | stb_cam_data_rep0, |
| 42 | sbd_st_data2_b, |
| 43 | sbd_st_data2_b_rep0, |
| 44 | sbd_st_predata_b, |
| 45 | sbd_st_predata_b_rep0, |
| 46 | bist_cmp_data, |
| 47 | bist_cmp_data_rep0, |
| 48 | tlb_tte_ie_b, |
| 49 | tlb_tte_ie_b_rep00, |
| 50 | tlb_tte_ie_b_rep01, |
| 51 | stb_cam_hit, |
| 52 | stb_cam_hit_rep0, |
| 53 | tlb_cache_way_hit_b, |
| 54 | cache_way_hit_top_b, |
| 55 | cache_way_hit_bot_b, |
| 56 | exu_lsu_store_data_e, |
| 57 | exu_lsu_store_data_e_rep0, |
| 58 | exu_lsu_address_e, |
| 59 | exu_lsu_address_e_rep0); |
| 60 | wire [63:0] lmd_fill_or_byp_data_m_rep0; |
| 61 | |
| 62 | |
| 63 | input [63:0] lmd_fill_or_byp_data_m; |
| 64 | output [63:0] lmd_fill_or_byp_data_m_rep1; |
| 65 | |
| 66 | input [63:0] stb_ram_data; |
| 67 | output [63:0] stb_ram_data_rep0; |
| 68 | |
| 69 | input [44:0] stb_cam_data; |
| 70 | output [44:0] stb_cam_data_rep0; |
| 71 | |
| 72 | input [63:0] sbd_st_data2_b; |
| 73 | output [63:0] sbd_st_data2_b_rep0; |
| 74 | |
| 75 | input [47:0] sbd_st_predata_b; |
| 76 | output [47:0] sbd_st_predata_b_rep0; |
| 77 | |
| 78 | input [7:0] bist_cmp_data; |
| 79 | output [7:0] bist_cmp_data_rep0; |
| 80 | |
| 81 | input tlb_tte_ie_b; |
| 82 | output tlb_tte_ie_b_rep00; |
| 83 | output tlb_tte_ie_b_rep01; |
| 84 | |
| 85 | input stb_cam_hit; |
| 86 | output stb_cam_hit_rep0; |
| 87 | |
| 88 | input [3:0] tlb_cache_way_hit_b; |
| 89 | output [3:0] cache_way_hit_top_b; |
| 90 | output [3:0] cache_way_hit_bot_b; |
| 91 | |
| 92 | input [63:0] exu_lsu_store_data_e; |
| 93 | output [63:0] exu_lsu_store_data_e_rep0; |
| 94 | |
| 95 | input [10:4] exu_lsu_address_e; |
| 96 | output [10:4] exu_lsu_address_e_rep0; |
| 97 | |
| 98 | // D$ bypass data |
| 99 | lsu_rep_dp_buff_macro__rep_1__width_64 fill_or_byp_data_rep0 ( |
| 100 | .din (lmd_fill_or_byp_data_m[63:0]), |
| 101 | .dout (lmd_fill_or_byp_data_m_rep0[63:0]) |
| 102 | ); |
| 103 | lsu_rep_dp_buff_macro__rep_1__width_64 fill_or_byp_data_rep1 ( |
| 104 | .din (lmd_fill_or_byp_data_m_rep0[63:0]), |
| 105 | .dout (lmd_fill_or_byp_data_m_rep1[63:0]) |
| 106 | ); |
| 107 | |
| 108 | // STB RAM read data (flopped) |
| 109 | lsu_rep_dp_buff_macro__rep_1__stack_32c__width_32 i0_stb_ram_data_rep0 ( |
| 110 | .din (stb_ram_data[63:32]), |
| 111 | .dout (stb_ram_data_rep0[63:32]) |
| 112 | ); |
| 113 | lsu_rep_dp_buff_macro__rep_1__stack_32c__width_32 i1_stb_ram_data_rep0 ( |
| 114 | .din (stb_ram_data[31:0]), |
| 115 | .dout (stb_ram_data_rep0[31:0]) |
| 116 | ); |
| 117 | |
| 118 | // STB CAM read data |
| 119 | lsu_rep_dp_buff_macro__rep_1__width_45 i_stb_cam_data_rep0 ( |
| 120 | .din (stb_cam_data[44:0]), |
| 121 | .dout (stb_cam_data_rep0[44:0]) |
| 122 | ); |
| 123 | |
| 124 | // Prealigned data from store buffer |
| 125 | lsu_rep_dp_buff_macro__rep_1__width_48 st_predata_b_rep0 ( |
| 126 | .din (sbd_st_predata_b[47:0]), |
| 127 | .dout (sbd_st_predata_b_rep0[47:0]) |
| 128 | ); |
| 129 | |
| 130 | // Aligned data from store buffer |
| 131 | lsu_rep_dp_buff_macro__rep_1__width_64 st_data2_b_rep0 ( |
| 132 | .din (sbd_st_data2_b[63:0]), |
| 133 | .dout (sbd_st_data2_b_rep0[63:0]) |
| 134 | ); |
| 135 | |
| 136 | // BIST compare data |
| 137 | lsu_rep_dp_buff_macro__rep_1__width_8 i_bist_cmp_data_rep0 ( |
| 138 | .din (bist_cmp_data[7:0]), |
| 139 | .dout (bist_cmp_data_rep0[7:0]) |
| 140 | ); |
| 141 | |
| 142 | // TTE.IE |
| 143 | lsu_rep_dp_buff_macro__rep_1__width_1 tte_ie_rep00 ( // to sbs |
| 144 | .din (tlb_tte_ie_b), |
| 145 | .dout (tlb_tte_ie_b_rep00) |
| 146 | ); |
| 147 | lsu_rep_dp_buff_macro__rep_1__width_1 tte_ie_rep01 ( // to dcc |
| 148 | .din (tlb_tte_ie_b), |
| 149 | .dout (tlb_tte_ie_b_rep01) |
| 150 | ); |
| 151 | |
| 152 | // stb_cam_hit; very critical to dcc, buffer off load to lmc |
| 153 | lsu_rep_dp_buff_macro__rep_1__width_1 i_stb_cam_hit_rep0 ( // to dcc |
| 154 | .din (stb_cam_hit), |
| 155 | .dout (stb_cam_hit_rep0) |
| 156 | ); |
| 157 | |
| 158 | // one copy of cache_way_hit goes up, one goes down |
| 159 | lsu_rep_dp_buff_macro__rep_1__width_4 i_cache_way_hit_top ( // to dac |
| 160 | .din (tlb_cache_way_hit_b[3:0]), |
| 161 | .dout (cache_way_hit_top_b[3:0]) |
| 162 | ); |
| 163 | lsu_rep_dp_buff_macro__rep_1__width_4 i_cache_way_hit_bot ( // to dcc |
| 164 | .din (tlb_cache_way_hit_b[3:0]), |
| 165 | .dout (cache_way_hit_bot_b[3:0]) |
| 166 | ); |
| 167 | |
| 168 | lsu_rep_dp_buff_macro__rep_1__width_64 store_data_rep0 ( |
| 169 | .din (exu_lsu_store_data_e[63:0]), |
| 170 | .dout (exu_lsu_store_data_e_rep0[63:0]) |
| 171 | ); |
| 172 | |
| 173 | lsu_rep_dp_buff_macro__dbuff_32x__rep_1__stack_none__width_7 exu_address_rep0 ( |
| 174 | .din (exu_lsu_address_e[10:4]), |
| 175 | .dout (exu_lsu_address_e_rep0[10:4]) |
| 176 | ); |
| 177 | |
| 178 | endmodule |
| 179 | |
| 180 | |
| 181 | // |
| 182 | // buff macro |
| 183 | // |
| 184 | // |
| 185 | |
| 186 | |
| 187 | |
| 188 | |
| 189 | |
| 190 | module lsu_rep_dp_buff_macro__rep_1__width_64 ( |
| 191 | din, |
| 192 | dout); |
| 193 | input [63:0] din; |
| 194 | output [63:0] dout; |
| 195 | |
| 196 | |
| 197 | |
| 198 | |
| 199 | |
| 200 | |
| 201 | buff #(64) d0_0 ( |
| 202 | .in(din[63:0]), |
| 203 | .out(dout[63:0]) |
| 204 | ); |
| 205 | |
| 206 | |
| 207 | |
| 208 | |
| 209 | |
| 210 | |
| 211 | |
| 212 | |
| 213 | endmodule |
| 214 | |
| 215 | |
| 216 | |
| 217 | |
| 218 | |
| 219 | // |
| 220 | // buff macro |
| 221 | // |
| 222 | // |
| 223 | |
| 224 | |
| 225 | |
| 226 | |
| 227 | |
| 228 | module lsu_rep_dp_buff_macro__rep_1__stack_32c__width_32 ( |
| 229 | din, |
| 230 | dout); |
| 231 | input [31:0] din; |
| 232 | output [31:0] dout; |
| 233 | |
| 234 | |
| 235 | |
| 236 | |
| 237 | |
| 238 | |
| 239 | buff #(32) d0_0 ( |
| 240 | .in(din[31:0]), |
| 241 | .out(dout[31:0]) |
| 242 | ); |
| 243 | |
| 244 | |
| 245 | |
| 246 | |
| 247 | |
| 248 | |
| 249 | |
| 250 | |
| 251 | endmodule |
| 252 | |
| 253 | |
| 254 | |
| 255 | |
| 256 | |
| 257 | // |
| 258 | // buff macro |
| 259 | // |
| 260 | // |
| 261 | |
| 262 | |
| 263 | |
| 264 | |
| 265 | |
| 266 | module lsu_rep_dp_buff_macro__rep_1__width_45 ( |
| 267 | din, |
| 268 | dout); |
| 269 | input [44:0] din; |
| 270 | output [44:0] dout; |
| 271 | |
| 272 | |
| 273 | |
| 274 | |
| 275 | |
| 276 | |
| 277 | buff #(45) d0_0 ( |
| 278 | .in(din[44:0]), |
| 279 | .out(dout[44:0]) |
| 280 | ); |
| 281 | |
| 282 | |
| 283 | |
| 284 | |
| 285 | |
| 286 | |
| 287 | |
| 288 | |
| 289 | endmodule |
| 290 | |
| 291 | |
| 292 | |
| 293 | |
| 294 | |
| 295 | // |
| 296 | // buff macro |
| 297 | // |
| 298 | // |
| 299 | |
| 300 | |
| 301 | |
| 302 | |
| 303 | |
| 304 | module lsu_rep_dp_buff_macro__rep_1__width_48 ( |
| 305 | din, |
| 306 | dout); |
| 307 | input [47:0] din; |
| 308 | output [47:0] dout; |
| 309 | |
| 310 | |
| 311 | |
| 312 | |
| 313 | |
| 314 | |
| 315 | buff #(48) d0_0 ( |
| 316 | .in(din[47:0]), |
| 317 | .out(dout[47:0]) |
| 318 | ); |
| 319 | |
| 320 | |
| 321 | |
| 322 | |
| 323 | |
| 324 | |
| 325 | |
| 326 | |
| 327 | endmodule |
| 328 | |
| 329 | |
| 330 | |
| 331 | |
| 332 | |
| 333 | // |
| 334 | // buff macro |
| 335 | // |
| 336 | // |
| 337 | |
| 338 | |
| 339 | |
| 340 | |
| 341 | |
| 342 | module lsu_rep_dp_buff_macro__rep_1__width_8 ( |
| 343 | din, |
| 344 | dout); |
| 345 | input [7:0] din; |
| 346 | output [7:0] dout; |
| 347 | |
| 348 | |
| 349 | |
| 350 | |
| 351 | |
| 352 | |
| 353 | buff #(8) d0_0 ( |
| 354 | .in(din[7:0]), |
| 355 | .out(dout[7:0]) |
| 356 | ); |
| 357 | |
| 358 | |
| 359 | |
| 360 | |
| 361 | |
| 362 | |
| 363 | |
| 364 | |
| 365 | endmodule |
| 366 | |
| 367 | |
| 368 | |
| 369 | |
| 370 | |
| 371 | // |
| 372 | // buff macro |
| 373 | // |
| 374 | // |
| 375 | |
| 376 | |
| 377 | |
| 378 | |
| 379 | |
| 380 | module lsu_rep_dp_buff_macro__rep_1__width_1 ( |
| 381 | din, |
| 382 | dout); |
| 383 | input [0:0] din; |
| 384 | output [0:0] dout; |
| 385 | |
| 386 | |
| 387 | |
| 388 | |
| 389 | |
| 390 | |
| 391 | buff #(1) d0_0 ( |
| 392 | .in(din[0:0]), |
| 393 | .out(dout[0:0]) |
| 394 | ); |
| 395 | |
| 396 | |
| 397 | |
| 398 | |
| 399 | |
| 400 | |
| 401 | |
| 402 | |
| 403 | endmodule |
| 404 | |
| 405 | |
| 406 | |
| 407 | |
| 408 | |
| 409 | // |
| 410 | // buff macro |
| 411 | // |
| 412 | // |
| 413 | |
| 414 | |
| 415 | |
| 416 | |
| 417 | |
| 418 | module lsu_rep_dp_buff_macro__rep_1__width_4 ( |
| 419 | din, |
| 420 | dout); |
| 421 | input [3:0] din; |
| 422 | output [3:0] dout; |
| 423 | |
| 424 | |
| 425 | |
| 426 | |
| 427 | |
| 428 | |
| 429 | buff #(4) d0_0 ( |
| 430 | .in(din[3:0]), |
| 431 | .out(dout[3:0]) |
| 432 | ); |
| 433 | |
| 434 | |
| 435 | |
| 436 | |
| 437 | |
| 438 | |
| 439 | |
| 440 | |
| 441 | endmodule |
| 442 | |
| 443 | |
| 444 | |
| 445 | |
| 446 | |
| 447 | // |
| 448 | // buff macro |
| 449 | // |
| 450 | // |
| 451 | |
| 452 | |
| 453 | |
| 454 | |
| 455 | |
| 456 | module lsu_rep_dp_buff_macro__dbuff_32x__rep_1__stack_none__width_7 ( |
| 457 | din, |
| 458 | dout); |
| 459 | input [6:0] din; |
| 460 | output [6:0] dout; |
| 461 | |
| 462 | |
| 463 | |
| 464 | |
| 465 | |
| 466 | |
| 467 | buff #(7) d0_0 ( |
| 468 | .in(din[6:0]), |
| 469 | .out(dout[6:0]) |
| 470 | ); |
| 471 | |
| 472 | |
| 473 | |
| 474 | |
| 475 | |
| 476 | |
| 477 | |
| 478 | |
| 479 | endmodule |
| 480 | |
| 481 | |
| 482 | |
| 483 | |