| 1 | /* |
| 2 | * ========== Copyright Header Begin ========================================== |
| 3 | * |
| 4 | * OpenSPARC T2 Processor File: interrupt_QUEUE_CPU_MONDO_mode.s |
| 5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved |
| 6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. |
| 7 | * |
| 8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License as published by |
| 12 | * the Free Software Foundation; version 2 of the License. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 22 | * |
| 23 | * For the avoidance of doubt, and except that if any non-GPL license |
| 24 | * choice is available it will apply instead, Sun elects to use only |
| 25 | * the General Public License version 2 (GPLv2) at this time for any |
| 26 | * software where a choice of GPL license versions is made |
| 27 | * available with the language indicating that GPLv2 or any later version |
| 28 | * may be used, or where a choice of which version of the GPL is applied is |
| 29 | * otherwise unspecified. |
| 30 | * |
| 31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
| 32 | * CA 95054 USA or visit www.sun.com if you need additional information or |
| 33 | * have any questions. |
| 34 | * |
| 35 | * |
| 36 | * ========== Copyright Header End ============================================ |
| 37 | */ |
| 38 | #define MAIN_PAGE_NUCLEUS_ALSO |
| 39 | #define MAIN_PAGE_HV_ALSO |
| 40 | |
| 41 | #define H_HT0_Interrupt_0x60 |
| 42 | #define My_HT0_Interrupt_0x60 \ |
| 43 | call my_interrupt_code; \ |
| 44 | nop; \ |
| 45 | retry; \ |
| 46 | nop; |
| 47 | |
| 48 | #define H_HT0_Privileged_Action_0x37 |
| 49 | #define My_HT0_Privileged_Action_0x37 \ |
| 50 | call my_priv_action_trap_code; \ |
| 51 | nop; \ |
| 52 | done; \ |
| 53 | nop; |
| 54 | |
| 55 | #define H_HT0_DAE_invalid_asi_0x14 my_H_T0_DAE_invalid_asi_0x14 |
| 56 | |
| 57 | #include "hboot.s" |
| 58 | |
| 59 | #include "ncu_defines.h" |
| 60 | |
| 61 | /************************************************************************ |
| 62 | Test case code start |
| 63 | ************************************************************************/ |
| 64 | |
| 65 | .text |
| 66 | .global main |
| 67 | |
| 68 | main: |
| 69 | ta T_CHANGE_HPRIV |
| 70 | nop |
| 71 | |
| 72 | ! Switch to user mode |
| 73 | user_mode: |
| 74 | ta T_CHANGE_NONHPRIV |
| 75 | ta T_CHANGE_NONPRIV |
| 76 | |
| 77 | ! Read and write ASI_QUEUE_CPU_MONDO_HEAD/TAIL registers |
| 78 | ! Privileged Action traps expected. |
| 79 | user_read: |
| 80 | setx ASI_CPU_MONDO_QUEUE_HEAD, %g1, %g7 |
| 81 | setx ASI_CPU_MONDO_QUEUE_TAIL, %g1, %g6 |
| 82 | ldxa [%g7]ASI_QUEUE, %g0 |
| 83 | ldxa [%g6]ASI_QUEUE, %g0 |
| 84 | stxa %g0, [%g7]ASI_QUEUE |
| 85 | stxa %g0, [%g6]ASI_QUEUE |
| 86 | membar #Sync |
| 87 | |
| 88 | ! Check for 4 Privileged Action traps. |
| 89 | user_trap_check: |
| 90 | setx priv_action_trap_flag, %g1, %g2 |
| 91 | ld [%g2], %g5 |
| 92 | cmp %g5, 4 |
| 93 | bne test_failed |
| 94 | nop |
| 95 | |
| 96 | ! Go to supervisor mode for next interrupt |
| 97 | super_mode: |
| 98 | ta T_CHANGE_PRIV |
| 99 | ta T_CHANGE_NONHPRIV |
| 100 | |
| 101 | ! Read and write ASI_QUEUE_CPU_MONDO_HEAD reg., expect no traps |
| 102 | super_head: |
| 103 | setx ASI_CPU_MONDO_QUEUE_HEAD, %g1, %g7 |
| 104 | ldxa [%g7]ASI_QUEUE, %g5 |
| 105 | stxa %g5, [%g7]ASI_QUEUE |
| 106 | membar #Sync |
| 107 | |
| 108 | ! Check that no more traps occured. |
| 109 | super_head_trap_check: |
| 110 | setx priv_action_trap_flag, %g1, %g2 |
| 111 | ld [%g2], %g5 |
| 112 | cmp %g5, 4 |
| 113 | bne test_failed |
| 114 | nop |
| 115 | |
| 116 | ! Read ASI_QUEUE_CPU_MONDO_TAIL reg. |
| 117 | ! Expect no trap. |
| 118 | super_tail_read: |
| 119 | setx ASI_CPU_MONDO_QUEUE_TAIL, %g1, %g6 |
| 120 | ldxa [%g6]ASI_QUEUE, %g4 |
| 121 | membar #Sync |
| 122 | |
| 123 | ! Check that no trap occured. |
| 124 | super_tail_read_trap_check: |
| 125 | setx priv_action_trap_flag, %g1, %g2 |
| 126 | ld [%g2], %g5 |
| 127 | cmp %g5, 4 |
| 128 | bne test_failed |
| 129 | nop |
| 130 | |
| 131 | ! Write ASI_QUEUE_CPU_MONDO_TAIL reg. |
| 132 | ! Expect a DAE_invalid_ASI trap |
| 133 | super_tail_write: |
| 134 | setx 0x12345678, %g1, %g2 |
| 135 | setx ASI_CPU_MONDO_QUEUE_TAIL, %g1, %g6 |
| 136 | stxa %g2, [%g6]ASI_QUEUE |
| 137 | membar #Sync |
| 138 | |
| 139 | ! Check that a DAE_invalid_trap trap occured. |
| 140 | super_tail_write_trap_check: |
| 141 | setx priv_action_trap_flag, %g1, %g2 |
| 142 | ld [%g2], %g5 |
| 143 | cmp %g5, 4 |
| 144 | bne test_failed |
| 145 | nop |
| 146 | |
| 147 | setx dae_invalid_trap_count, %g1, %g2 |
| 148 | ld [%g2], %g5 |
| 149 | cmp %g5, 1 |
| 150 | bne test_failed |
| 151 | nop |
| 152 | |
| 153 | ! Did the contents of ASI_CPU_MONDO_QUEUE_TAIL reg change? |
| 154 | super_change_check: |
| 155 | setx ASI_CPU_MONDO_QUEUE_TAIL, %g1, %g6 |
| 156 | ldxa [%g6]ASI_QUEUE, %g5 |
| 157 | cmp %g4, %g5 |
| 158 | bne test_failed |
| 159 | nop |
| 160 | |
| 161 | ba test_passed |
| 162 | nop |
| 163 | |
| 164 | |
| 165 | /********************************************************************** |
| 166 | Trap handlers: |
| 167 | **********************************************************************/ |
| 168 | |
| 169 | .global my_interrupt_code |
| 170 | .global my_priv_action_trap_code |
| 171 | .global my_H_T0_DAE_invalid_asi_0x14 |
| 172 | |
| 173 | |
| 174 | my_interrupt_code: |
| 175 | ! Clear the interrupt |
| 176 | |
| 177 | ldxa [%g0]ASI_SWVR_INTR_R, %g0 |
| 178 | membar #Sync |
| 179 | |
| 180 | ! Indicate interrupt occured |
| 181 | setx user_data_start+16, %l1, %l2 |
| 182 | lda [%l2]ASI_AS_IF_USER_PRIMARY, %l3 |
| 183 | inc %l3 |
| 184 | sta %l3, [%l2]ASI_AS_IF_USER_PRIMARY |
| 185 | |
| 186 | jmpl %o7+0x8, %g0 |
| 187 | nop |
| 188 | |
| 189 | |
| 190 | |
| 191 | |
| 192 | my_priv_action_trap_code: |
| 193 | |
| 194 | setx priv_action_trap_flag, %l1, %l2 |
| 195 | lda [%l2]ASI_AS_IF_USER_PRIMARY, %l3 |
| 196 | add %l3, 1, %l3 |
| 197 | sta %l3, [%l2]ASI_AS_IF_USER_PRIMARY |
| 198 | |
| 199 | jmpl %o7+0x8, %g0 |
| 200 | nop |
| 201 | |
| 202 | |
| 203 | |
| 204 | my_H_T0_DAE_invalid_asi_0x14: |
| 205 | ! Increment the count |
| 206 | |
| 207 | setx dae_invalid_trap_count, %l1, %l2 |
| 208 | lda [%l2]ASI_AS_IF_USER_PRIMARY, %l3 |
| 209 | add %l3, 1, %l3 |
| 210 | sta %l3, [%l2]ASI_AS_IF_USER_PRIMARY |
| 211 | membar #Sync |
| 212 | |
| 213 | done |
| 214 | nop |
| 215 | |
| 216 | |
| 217 | |
| 218 | |
| 219 | test_passed: |
| 220 | EXIT_GOOD |
| 221 | |
| 222 | test_failed: |
| 223 | EXIT_BAD |
| 224 | |
| 225 | |
| 226 | /************************************************************************ |
| 227 | Test case data start |
| 228 | ************************************************************************/ |
| 229 | .data |
| 230 | user_data_start: |
| 231 | .word 0x0 |
| 232 | .word 0x0 |
| 233 | dae_invalid_trap_count: |
| 234 | .word 0x0 |
| 235 | .word 0x0 |
| 236 | .word 0x0 |
| 237 | .word 0x0 |
| 238 | priv_action_trap_flag: |
| 239 | .word 0x0 |
| 240 | .word 0x0 |
| 241 | .end |