| 1 | /* |
| 2 | * ========== Copyright Header Begin ========================================== |
| 3 | * |
| 4 | * OpenSPARC T2 Processor File: tcu_regs_dram_piu.s |
| 5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved |
| 6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. |
| 7 | * |
| 8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License as published by |
| 12 | * the Free Software Foundation; version 2 of the License. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 22 | * |
| 23 | * For the avoidance of doubt, and except that if any non-GPL license |
| 24 | * choice is available it will apply instead, Sun elects to use only |
| 25 | * the General Public License version 2 (GPLv2) at this time for any |
| 26 | * software where a choice of GPL license versions is made |
| 27 | * available with the language indicating that GPLv2 or any later version |
| 28 | * may be used, or where a choice of which version of the GPL is applied is |
| 29 | * otherwise unspecified. |
| 30 | * |
| 31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
| 32 | * CA 95054 USA or visit www.sun.com if you need additional information or |
| 33 | * have any questions. |
| 34 | * |
| 35 | * |
| 36 | * ========== Copyright Header End ============================================ |
| 37 | */ |
| 38 | #define MAIN_PAGE_NUCLEUS_ALSO |
| 39 | #define MAIN_PAGE_HV_ALSO |
| 40 | |
| 41 | #define TEST_DATA0 0x4c3fdead4c3fbeef |
| 42 | #define tmp1 %l2 |
| 43 | #define tmp2 %l3 |
| 44 | #define tmp3 %l4 |
| 45 | #define tmp4 %l5 |
| 46 | |
| 47 | |
| 48 | #include "asi_s.h" |
| 49 | #include "mcu_defines.h" |
| 50 | #include "tcu_defines.h" |
| 51 | |
| 52 | /************************************************************************ |
| 53 | Test case code start |
| 54 | ************************************************************************/ |
| 55 | #ifdef FAST_BOOT |
| 56 | #define RESET_VEC 0x0000000000000000 |
| 57 | #else |
| 58 | #define RESET_VEC 0xfffffffff0000000 |
| 59 | #endif |
| 60 | |
| 61 | SECTION .RED_SEC TEXT_VA = RESET_VEC |
| 62 | attr_text { |
| 63 | Name=.RED_SEC, |
| 64 | hypervisor |
| 65 | } |
| 66 | |
| 67 | .text |
| 68 | nop |
| 69 | nop |
| 70 | nop |
| 71 | nop |
| 72 | nop |
| 73 | nop |
| 74 | nop |
| 75 | nop |
| 76 | |
| 77 | .global main |
| 78 | |
| 79 | |
| 80 | |
| 81 | ! DISABLE STATE PERIOD (Bug filed - 109124) |
| 82 | ! L1: |
| 83 | ! set 0x3f, %i3 |
| 84 | ! setx 0x8400000000, %l5, %l6 |
| 85 | ! add %l6, 0x838, %g7 |
| 86 | ! ldx [%g7], %g3 |
| 87 | ! cmp %g3, %i3 |
| 88 | ! bne bad_trap |
| 89 | ! membar #Sync |
| 90 | |
| 91 | ! CALIBRATE STATE PERIOD |
| 92 | L2: |
| 93 | setx 0x8400000000, %l5, %l6 |
| 94 | add %l6, 0x848, %g7 |
| 95 | ldx [%g7], %g3 |
| 96 | cmp %g3, %g0 |
| 97 | bne bad_trap |
| 98 | membar #Sync |
| 99 | |
| 100 | ! Training State Minimum Time |
| 101 | L3: |
| 102 | set 0xff, %i3 |
| 103 | setx 0x8400000000, %l5, %l6 |
| 104 | add %l6, 0x858, %g7 |
| 105 | ldx [%g7], %g3 |
| 106 | cmp %g3, %i3 |
| 107 | bne bad_trap |
| 108 | membar #Sync |
| 109 | |
| 110 | ! Training State Timeout |
| 111 | L4: |
| 112 | set 0xff, %i3 |
| 113 | setx 0x8400000000, %l5, %l6 |
| 114 | add %l6, 0x868, %g7 |
| 115 | ldx [%g7], %g3 |
| 116 | cmp %g3, %i3 |
| 117 | bne bad_trap |
| 118 | membar #Sync |
| 119 | |
| 120 | ! Testing State Timeout |
| 121 | L5: |
| 122 | set 0xff, %i3 |
| 123 | setx 0x8400000000, %l5, %l6 |
| 124 | add %l6, 0x878, %g7 |
| 125 | ldx [%g7], %g3 |
| 126 | cmp %g3, %i3 |
| 127 | bne bad_trap |
| 128 | membar #Sync |
| 129 | |
| 130 | ! Polling State Timeout |
| 131 | L6: |
| 132 | set 0xff, %i3 |
| 133 | setx 0x8400000000, %l5, %l6 |
| 134 | add %l6, 0x888, %g7 |
| 135 | ldx [%g7], %g3 |
| 136 | cmp %g3, %i3 |
| 137 | bne bad_trap |
| 138 | membar #Sync |
| 139 | |
| 140 | ! Config State Done |
| 141 | L7: |
| 142 | setx 0x8400000000, %l5, %l6 |
| 143 | add %l6, 0x890, %g7 |
| 144 | ldx [%g7], %g3 |
| 145 | cmp %g3, %g0 |
| 146 | bne bad_trap |
| 147 | membar #Sync |
| 148 | |
| 149 | ! DRAM Per-Rank CKE |
| 150 | L8: |
| 151 | set 0xffff, %i3 |
| 152 | setx 0x8400000000, %l5, %l6 |
| 153 | add %l6, 0x8a0, %g7 |
| 154 | ldx [%g7], %g3 |
| 155 | cmp %g3, %i3 |
| 156 | bne bad_trap |
| 157 | membar #Sync |
| 158 | |
| 159 | ! L0s Duration |
| 160 | L9: |
| 161 | set 0x2a, %i3 |
| 162 | setx 0x8400000000, %l5, %l6 |
| 163 | add %l6, 0x8a8, %g7 |
| 164 | ldx [%g7], %g3 |
| 165 | cmp %g3, %i3 |
| 166 | bne bad_trap |
| 167 | membar #Sync |
| 168 | |
| 169 | ! Channel Sync Fram Frequency |
| 170 | L10: |
| 171 | set 0x2a, %i3 |
| 172 | setx 0x8400000000, %l5, %l6 |
| 173 | add %l6, 0x8b0, %g7 |
| 174 | ldx [%g7], %g3 |
| 175 | cmp %g3, %i3 |
| 176 | bne bad_trap |
| 177 | membar #Sync |
| 178 | |
| 179 | ! SERDES Configuration Bus |
| 180 | L11: |
| 181 | set 0x1000018, %i3 |
| 182 | setx 0x8400000000, %l5, %l6 |
| 183 | add %l6, 0x8d0, %g7 |
| 184 | ldx [%g7], %g3 |
| 185 | cmp %g3, %i3 |
| 186 | bne bad_trap |
| 187 | membar #Sync |
| 188 | |
| 189 | ! SERDES Transmitter and Receiver |
| 190 | L12: |
| 191 | setx 0x8400000000, %l5, %l6 |
| 192 | add %l6, 0x8d8, %g7 |
| 193 | ldx [%g7], %g3 |
| 194 | cmp %g3, %g0 |
| 195 | bne bad_trap |
| 196 | membar #Sync |
| 197 | |
| 198 | ! SERDES Test Configuration Bus |
| 199 | L13: |
| 200 | set 0xc003, %i3 |
| 201 | setx 0x8400000000, %l5, %l6 |
| 202 | add %l6, 0x8e0, %g7 |
| 203 | ldx [%g7], %g3 |
| 204 | cmp %g3, %i3 |
| 205 | bne bad_trap |
| 206 | membar #Sync |
| 207 | |
| 208 | ! DRAM FBD Injected Error Source |
| 209 | L14: |
| 210 | setx 0x8400000000, %l5, %l6 |
| 211 | add %l6, 0xc08, %g7 |
| 212 | ldx [%g7], %g3 |
| 213 | cmp %g3, %g0 |
| 214 | bne bad_trap |
| 215 | membar #Sync |
| 216 | |
| 217 | ! DRAM FBR Count |
| 218 | L15: |
| 219 | setx 0x8400000000, %l5, %l6 |
| 220 | add %l6, 0xc10, %g7 |
| 221 | ldx [%g7], %g3 |
| 222 | cmp %g3, %g0 |
| 223 | bne bad_trap |
| 224 | membar #Sync |
| 225 | |
| 226 | ! IMU Error Log Enable |
| 227 | L16: |
| 228 | set 0x7fff, %i3 |
| 229 | setx 0x8800631000, %l5, %l6 |
| 230 | ldx [%l6], %g3 |
| 231 | cmp %g3, %i3 |
| 232 | bne bad_trap |
| 233 | membar #Sync |
| 234 | |
| 235 | ! IMU Error Status Clear |
| 236 | L17: |
| 237 | setx 0x8800631000, %l5, %l6 |
| 238 | add %l6, 0x018, %g7 |
| 239 | ldx [%g7], %g3 |
| 240 | cmp %g3, %g0 |
| 241 | bne bad_trap |
| 242 | membar #Sync |
| 243 | |
| 244 | ! IMU Error Status Set |
| 245 | L18: |
| 246 | setx 0x8800631000, %l5, %l6 |
| 247 | add %l6, 0x020, %g7 |
| 248 | ldx [%g7], %g3 |
| 249 | cmp %g3, %g0 |
| 250 | bne bad_trap |
| 251 | membar #Sync |
| 252 | |
| 253 | ! IMU RDS Error Log |
| 254 | L19: |
| 255 | setx 0x8800631000, %l5, %l6 |
| 256 | add %l6, 0x028, %g7 |
| 257 | ldx [%g7], %g3 |
| 258 | cmp %g3, %g0 |
| 259 | bne bad_trap |
| 260 | membar #Sync |
| 261 | |
| 262 | ! IMU SCS Error Log |
| 263 | L20: |
| 264 | setx 0x8800631000, %l5, %l6 |
| 265 | add %l6, 0x030, %g7 |
| 266 | ldx [%g7], %g3 |
| 267 | cmp %g3, %g0 |
| 268 | bne bad_trap |
| 269 | membar #Sync |
| 270 | |
| 271 | ! IMU EQS Error Log |
| 272 | L21: |
| 273 | setx 0x8800631000, %l5, %l6 |
| 274 | add %l6, 0x038, %g7 |
| 275 | ldx [%g7], %g3 |
| 276 | cmp %g3, %g0 |
| 277 | bne bad_trap |
| 278 | membar #Sync |
| 279 | |
| 280 | ! MMU Error Log Enable |
| 281 | L22: |
| 282 | set 0x1fffff, %i3 |
| 283 | setx 0x8800641000, %l5, %l6 |
| 284 | ldx [%l6], %g3 |
| 285 | cmp %g3, %i3 |
| 286 | bne bad_trap |
| 287 | membar #Sync |
| 288 | |
| 289 | ! MMU Error Status Clear |
| 290 | L23: |
| 291 | setx 0x8800641000, %l5, %l6 |
| 292 | add %l6, 0x018, %g7 |
| 293 | ldx [%g7], %g3 |
| 294 | cmp %g3, %g0 |
| 295 | bne bad_trap |
| 296 | membar #Sync |
| 297 | |
| 298 | ! MMU Translation Fault Addr |
| 299 | L24: |
| 300 | setx 0x8800641000, %l5, %l6 |
| 301 | add %l6, 0x028, %g7 |
| 302 | ldx [%g7], %g3 |
| 303 | cmp %g3, %g0 |
| 304 | bne bad_trap |
| 305 | membar #Sync |
| 306 | |
| 307 | ! MMU Translation Fault Status |
| 308 | L25: |
| 309 | setx 0x8800641000, %l5, %l6 |
| 310 | add %l6, 0x030, %g7 |
| 311 | ldx [%g7], %g3 |
| 312 | cmp %g3, %g0 |
| 313 | bne bad_trap |
| 314 | membar #Sync |
| 315 | |
| 316 | ! MMU TTE Cache Data |
| 317 | L26: |
| 318 | setx 0x8800648000, %l5, %l6 |
| 319 | ldx [%l6], %g3 |
| 320 | cmp %g3, %g0 |
| 321 | bne bad_trap |
| 322 | membar #Sync |
| 323 | |
| 324 | ! MMU DEV2IOTSB |
| 325 | L27: |
| 326 | setx 0x8800649000, %l5, %l6 |
| 327 | ldx [%l6], %g3 |
| 328 | cmp %g3, %g0 |
| 329 | bne bad_trap |
| 330 | membar #Sync |
| 331 | |
| 332 | ! MMU IOTSBDESC |
| 333 | L28: |
| 334 | setx 0x8800649000, %l5, %l6 |
| 335 | add %l6, 0x100, %g7 |
| 336 | ldx [%g7], %g3 |
| 337 | cmp %g3, %g0 |
| 338 | bne bad_trap |
| 339 | membar #Sync |
| 340 | |
| 341 | ! ILU Error Log Enable |
| 342 | L29: |
| 343 | set 0xf0, %i3 |
| 344 | setx 0x8800651000, %l5, %l6 |
| 345 | ldx [%l6], %g3 |
| 346 | cmp %g3, %i3 |
| 347 | bne bad_trap |
| 348 | membar #Sync |
| 349 | |
| 350 | ! ILU Error Status Clear |
| 351 | L30: |
| 352 | setx 0x8800651000, %l5, %l6 |
| 353 | add %l6, 0x018, %g7 |
| 354 | ldx [%g7], %g3 |
| 355 | cmp %g3, %g0 |
| 356 | bne bad_trap |
| 357 | membar #Sync |
| 358 | |
| 359 | ! ILU Error Status Set |
| 360 | L31: |
| 361 | setx 0x8800651000, %l5, %l6 |
| 362 | add %l6, 0x020, %g7 |
| 363 | ldx [%g7], %g3 |
| 364 | cmp %g3, %g0 |
| 365 | bne bad_trap |
| 366 | membar #Sync |
| 367 | |
| 368 | ! DMU ILU Diagnostic |
| 369 | L32: |
| 370 | setx 0x3ffff0000, tmp1, tmp2 |
| 371 | setx 0x8800652000, %l5, %l6 |
| 372 | ldx [%l6], %g3 |
| 373 | cmp %g3, %l3 |
| 374 | bne bad_trap |
| 375 | membar #Sync |
| 376 | |
| 377 | |
| 378 | good_trap: |
| 379 | ba good_trap |
| 380 | nop |
| 381 | nop |
| 382 | bad_trap: |
| 383 | ba bad_trap |
| 384 | nop |
| 385 | |
| 386 | |
| 387 | /************************************************************************ |
| 388 | Test case data start |
| 389 | ************************************************************************/ |
| 390 | .data |
| 391 | user_data_start: |
| 392 | .end |
| 393 | |