| 1 | /* |
| 2 | * ========== Copyright Header Begin ========================================== |
| 3 | * |
| 4 | * OpenSPARC T2 Processor File: ffu_fsr_tem_n2.s |
| 5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved |
| 6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. |
| 7 | * |
| 8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License as published by |
| 12 | * the Free Software Foundation; version 2 of the License. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 22 | * |
| 23 | * For the avoidance of doubt, and except that if any non-GPL license |
| 24 | * choice is available it will apply instead, Sun elects to use only |
| 25 | * the General Public License version 2 (GPLv2) at this time for any |
| 26 | * software where a choice of GPL license versions is made |
| 27 | * available with the language indicating that GPLv2 or any later version |
| 28 | * may be used, or where a choice of which version of the GPL is applied is |
| 29 | * otherwise unspecified. |
| 30 | * |
| 31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
| 32 | * CA 95054 USA or visit www.sun.com if you need additional information or |
| 33 | * have any questions. |
| 34 | * |
| 35 | * |
| 36 | * ========== Copyright Header End ============================================ |
| 37 | */ |
| 38 | #define FSR_DUMP_P %g7 |
| 39 | #define OPERAND_P %g2 |
| 40 | |
| 41 | #define NUM_MODES 8 |
| 42 | |
| 43 | #define TRAP_NOT_TAKEN 0 |
| 44 | #define TRAP_TAKEN 0x1fff |
| 45 | |
| 46 | #define TEM_INVALID %o1 |
| 47 | #define TEM_INVALID_SHIFT 27 |
| 48 | |
| 49 | #define TEM_OVERFLOW %o2 |
| 50 | #define TEM_OVERFLOW_SHIFT 26 |
| 51 | |
| 52 | #define TEM_UNDERFLOW %o3 |
| 53 | #define TEM_UNDERFLOW_SHIFT 25 |
| 54 | |
| 55 | #define TEM_DIV_0 %o4 |
| 56 | #define TEM_DIV_0_SHIFT 24 |
| 57 | |
| 58 | #define TEM_INEXACT %o5 |
| 59 | #define TEM_INEXACT_SHIFT 23 |
| 60 | |
| 61 | #define H_T0_Fp_exception_ieee_754_0x21 trap_ieee754 |
| 62 | |
| 63 | #define MAIN_PAGE_HV_ALSO |
| 64 | #define MAIN_PAGE_NUCLEUS_ALSO |
| 65 | |
| 66 | #define ENABLE_T0_Clean_Window_0x24 |
| 67 | #define ENABLE_T0_Corrected_ECC_error_0x63 |
| 68 | #define ENABLE_T0_Data_Access_Exception_0x30 |
| 69 | #define ENABLE_T0_Data_access_error_0x32 |
| 70 | #define ENABLE_T0_Division_By_Zero_0x28 |
| 71 | #define ENABLE_T0_Fp_disabled_0x20 |
| 72 | #define ENABLE_T0_Fp_exception_ieee_754_0x21 |
| 73 | #define ENABLE_T0_Fp_exception_other_0x22 |
| 74 | #define ENABLE_T0_Illegal_instruction_0x10 |
| 75 | #define ENABLE_T0_Instruction_Access_MMU_Miss_0x09 |
| 76 | #define ENABLE_T0_Instruction_access_error_0x0a |
| 77 | #define ENABLE_T0_Instruction_access_exception_0x08 |
| 78 | #define ENABLE_T0_Lddf_Mem_Address_Not_Aligned_0x35 |
| 79 | #define ENABLE_T0_Mem_Address_Not_Aligned_0x34 |
| 80 | #define ENABLE_T0_Privileged_Action_0x37 |
| 81 | #define ENABLE_T0_Privileged_opcode_0x11 |
| 82 | #define ENABLE_T0_Stdf_Mem_Address_Not_Aligned_0x36 |
| 83 | #define ENABLE_T0_Tag_Overflow_0x23 |
| 84 | #define ENABLE_T0_Unimplemented_LDD_0x12 |
| 85 | #define ENABLE_T0_Unimplemented_STD_0x13 |
| 86 | #define ENABLE_T0_data_access_protection_0x6c |
| 87 | #define ENABLE_T0_fast_data_access_MMU_miss_0x68 |
| 88 | #define ENABLE_T0_fast_instr_access_MMU_miss_0x64 |
| 89 | |
| 90 | |
| 91 | #include "hboot.s" |
| 92 | |
| 93 | .global main |
| 94 | main: |
| 95 | th_fork(th_main,%l0) ! start up to four threads. |
| 96 | |
| 97 | th_main_0: |
| 98 | wr %g0,0x4,%fprs |
| 99 | set fsr_data0,%g1 |
| 100 | set fsr_save0,FSR_DUMP_P |
| 101 | ba all_thds |
| 102 | nop |
| 103 | |
| 104 | th_main_1: |
| 105 | wr %g0,0x4,%fprs |
| 106 | set fsr_data1,%g1 |
| 107 | set fsr_save1,FSR_DUMP_P |
| 108 | ba all_thds |
| 109 | nop |
| 110 | |
| 111 | th_main_2: |
| 112 | wr %g0,0x4,%fprs |
| 113 | set fsr_data2,%g1 |
| 114 | set fsr_save2,FSR_DUMP_P |
| 115 | ba all_thds |
| 116 | nop |
| 117 | th_main_3: |
| 118 | wr %g0,0x4,%fprs |
| 119 | set fsr_data3,%g1 |
| 120 | set fsr_save3,FSR_DUMP_P |
| 121 | ba all_thds |
| 122 | nop |
| 123 | |
| 124 | |
| 125 | all_thds: |
| 126 | set operands,OPERAND_P |
| 127 | ldd [OPERAND_P], %f0 |
| 128 | ldd [OPERAND_P+8], %f2 |
| 129 | ldd [OPERAND_P+0x10], %f4 |
| 130 | ldd [OPERAND_P+0x18], %f6 |
| 131 | ldd [OPERAND_P+0x20], %f8 |
| 132 | ldd [OPERAND_P+0x28], %f10 |
| 133 | ldd [OPERAND_P+0x30], %f12 |
| 134 | ldd [OPERAND_P+0x38], %f14 |
| 135 | ldd [OPERAND_P+0x40], %f16 |
| 136 | ldd [OPERAND_P+0x48], %f18 |
| 137 | |
| 138 | ! clear destination regs because they are unchanged on a trap |
| 139 | set zero_words,%l2 |
| 140 | ldd [%l2],%f20 |
| 141 | ldd [%l2],%f22 |
| 142 | ldd [%l2],%f24 |
| 143 | ldd [%l2],%f26 |
| 144 | ldd [%l2],%f28 |
| 145 | |
| 146 | ! set register values for checking TEM settings |
| 147 | add %g0,1,%l1 |
| 148 | sll %l1,TEM_INVALID_SHIFT,TEM_INVALID |
| 149 | sll %l1,TEM_OVERFLOW_SHIFT,TEM_OVERFLOW |
| 150 | sll %l1,TEM_UNDERFLOW_SHIFT,TEM_UNDERFLOW |
| 151 | sll %l1,TEM_DIV_0_SHIFT,TEM_DIV_0 |
| 152 | sll %l1,TEM_INEXACT_SHIFT,TEM_INEXACT |
| 153 | |
| 154 | mov NUM_MODES,%i7 |
| 155 | loop: |
| 156 | ld [%g1],%fsr |
| 157 | st %fsr,[FSR_DUMP_P] |
| 158 | ld [FSR_DUMP_P],%l1 |
| 159 | st %fsr,[FSR_DUMP_P] ! double check that st %fsr does not |
| 160 | ld [FSR_DUMP_P],%l2 ! clear wrong fields |
| 161 | |
| 162 | invalid: |
| 163 | add %g0,TRAP_NOT_TAKEN,%g6 |
| 164 | fdivd %f0,%f2,%f20 ! 0/0 is invalid |
| 165 | st %fsr,[FSR_DUMP_P] |
| 166 | ld [FSR_DUMP_P],%g5 |
| 167 | and %g5,TEM_INVALID,%g5 |
| 168 | brz %g5,overflow ! ok if trap was not enabled |
| 169 | and %g5,%g6,%g6 |
| 170 | brnz %g6,overflow ! ok if trap was taken |
| 171 | nop |
| 172 | ta T_BAD_TRAP |
| 173 | nop |
| 174 | |
| 175 | overflow: |
| 176 | add %g0,TRAP_NOT_TAKEN,%g6 |
| 177 | fdivd %f4,%f6,%f22 ! big/tiny overflows |
| 178 | st %fsr,[FSR_DUMP_P] |
| 179 | ld [FSR_DUMP_P],%g5 |
| 180 | and %g5,TEM_OVERFLOW,%g5 |
| 181 | brz %g5,underflow ! ok if trap was not enabled |
| 182 | and %g5,%g6,%g6 |
| 183 | brnz %g6,underflow ! ok if trap was taken |
| 184 | nop |
| 185 | ta T_BAD_TRAP |
| 186 | nop |
| 187 | |
| 188 | underflow: |
| 189 | add %g0,TRAP_NOT_TAKEN,%g6 |
| 190 | fdivd %f8,%f10,%f24 ! tiny/big underflows |
| 191 | st %fsr,[FSR_DUMP_P] |
| 192 | ld [FSR_DUMP_P],%g5 |
| 193 | and %g5,TEM_UNDERFLOW,%g5 |
| 194 | brz %g5,div0 ! ok if trap was not enabled |
| 195 | and %g5,%g6,%g6 |
| 196 | brnz %g6,div0 ! ok if trap was taken |
| 197 | nop |
| 198 | ta T_BAD_TRAP |
| 199 | nop |
| 200 | |
| 201 | div0: |
| 202 | add %g0,TRAP_NOT_TAKEN,%g6 |
| 203 | fdivd %f12,%f14,%f26 ! x/0 is div by zero if x <> 0 |
| 204 | st %fsr,[FSR_DUMP_P] |
| 205 | ld [FSR_DUMP_P],%g5 |
| 206 | and %g5,TEM_DIV_0,%g5 |
| 207 | brz %g5,inexact ! ok if trap was not enabled |
| 208 | and %g5,%g6,%g6 |
| 209 | brnz %g6,inexact ! ok if trap was taken |
| 210 | nop |
| 211 | ta T_BAD_TRAP |
| 212 | nop |
| 213 | |
| 214 | inexact: |
| 215 | add %g0,TRAP_NOT_TAKEN,%g6 |
| 216 | faddd %f16,%f18,%f28 ! must round, therefore inexact |
| 217 | st %fsr,[FSR_DUMP_P] |
| 218 | ld [FSR_DUMP_P],%g5 |
| 219 | and %g5,TEM_INEXACT,%g5 |
| 220 | brz %g5,next_case ! ok if trap was not enabled |
| 221 | and %g5,%g6,%g6 |
| 222 | brnz %g6,next_case ! ok if trap was taken |
| 223 | nop |
| 224 | ta T_BAD_TRAP |
| 225 | nop |
| 226 | |
| 227 | next_case: |
| 228 | add %g1, 4, %g1 |
| 229 | sub %i7, 1, %i7 ! next mode |
| 230 | brnz,a %i7, loop |
| 231 | nop |
| 232 | |
| 233 | good_end: |
| 234 | ta T_GOOD_TRAP |
| 235 | nop |
| 236 | nop |
| 237 | |
| 238 | !========================== |
| 239 | .data |
| 240 | .align 0x1fff+1 |
| 241 | .align 8 |
| 242 | operands: |
| 243 | .word 0x00000000, 0x00000000 ! fsr_invalid (nvc/nva) |
| 244 | .word 0x00000000, 0x00000000 |
| 245 | |
| 246 | .word 0x7fe88888, 0x00000000 ! fsr_overflow (ofc/ofa) |
| 247 | .word 0x05290000, 0x00001230 |
| 248 | |
| 249 | .word 0x003f3000, 0x00000000 ! fsr_underflow (ufc/ufa) |
| 250 | .word 0x66699999, 0x00000000 |
| 251 | |
| 252 | .word 0x02080000, 0x00000000 ! fsr_division by zero (dzc/dza) |
| 253 | .word 0x00000000, 0x00000000 |
| 254 | |
| 255 | .word 0x3fefffff, 0xfffffffd ! fsr_inexact (nxc/nxa) |
| 256 | .word 0x3fefffff, 0xfffffffe |
| 257 | |
| 258 | zero_words: |
| 259 | .word 0,0,0,0 |
| 260 | |
| 261 | |
| 262 | .align 8 |
| 263 | fsr_data0: |
| 264 | .word 0x00000000 |
| 265 | .word 0x00800000 |
| 266 | .word 0x01000000 |
| 267 | .word 0x01800000 |
| 268 | .word 0x02000000 |
| 269 | .word 0x02800000 |
| 270 | .word 0x03000000 |
| 271 | .word 0x03800000 |
| 272 | |
| 273 | fsr_data1: |
| 274 | .word 0x04000000 |
| 275 | .word 0x04800000 |
| 276 | .word 0x05000000 |
| 277 | .word 0x05800000 |
| 278 | .word 0x06000000 |
| 279 | .word 0x06800000 |
| 280 | .word 0x07000000 |
| 281 | .word 0x07800000 |
| 282 | fsr_data2: |
| 283 | .word 0x08000000 |
| 284 | .word 0x08800000 |
| 285 | .word 0x09000000 |
| 286 | .word 0x09800000 |
| 287 | .word 0x0a000000 |
| 288 | .word 0x0a800000 |
| 289 | .word 0x0b000000 |
| 290 | .word 0x0b800000 |
| 291 | fsr_data3: |
| 292 | .word 0x0c000000 |
| 293 | .word 0x0c800000 |
| 294 | .word 0x0d000000 |
| 295 | .word 0x0d800000 |
| 296 | .word 0x0e000000 |
| 297 | .word 0x0e800000 |
| 298 | .word 0x0f000000 |
| 299 | .word 0x0f800000 |
| 300 | |
| 301 | fsr_save0: .word 0 |
| 302 | fsr_save1: .word 0 |
| 303 | fsr_save2: .word 0 |
| 304 | fsr_save3: .word 0 |
| 305 | |
| 306 | |
| 307 | |
| 308 | .text |
| 309 | |
| 310 | |
| 311 | // User %g6 lets test loop know that the trap was hit. |
| 312 | .global trap_ieee754 |
| 313 | trap_ieee754: |
| 314 | wrpr %g0,0,%gl ! go back to GL=0 |
| 315 | add %g0,TRAP_TAKEN,%g6 |
| 316 | done |
| 317 | nop |
| 318 | |
| 319 | .end |