| 1 | /* |
| 2 | * ========== Copyright Header Begin ========================================== |
| 3 | * |
| 4 | * OpenSPARC T2 Processor File: peu_set_serdes_pll_ratio.s |
| 5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved |
| 6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. |
| 7 | * |
| 8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License as published by |
| 12 | * the Free Software Foundation; version 2 of the License. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 22 | * |
| 23 | * For the avoidance of doubt, and except that if any non-GPL license |
| 24 | * choice is available it will apply instead, Sun elects to use only |
| 25 | * the General Public License version 2 (GPLv2) at this time for any |
| 26 | * software where a choice of GPL license versions is made |
| 27 | * available with the language indicating that GPLv2 or any later version |
| 28 | * may be used, or where a choice of which version of the GPL is applied is |
| 29 | * otherwise unspecified. |
| 30 | * |
| 31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
| 32 | * CA 95054 USA or visit www.sun.com if you need additional information or |
| 33 | * have any questions. |
| 34 | * |
| 35 | * |
| 36 | * ========== Copyright Header End ============================================ |
| 37 | */ |
| 38 | #include "ccu_defines.h" |
| 39 | #include "peu_defines.h" |
| 40 | |
| 41 | #define PEU_SERDES_PLL_MPY__100MHZ 7 |
| 42 | #define PEU_SERDES_PLL_MPY__125MHZ 5 |
| 43 | #define PEU_SERDES_PLL_MPY__250MHZ 1 |
| 44 | |
| 45 | |
| 46 | #ifdef PCIE_REF_CLK_100 |
| 47 | peu_set_target_pcie_ref_clk_100MHz: |
| 48 | mov PEU_SERDES_PLL_MPY__100MHZ, %g4 |
| 49 | #else |
| 50 | #ifdef PCIE_REF_CLK_125 |
| 51 | peu_set_target_pcie_ref_clk_125MHz: |
| 52 | mov PEU_SERDES_PLL_MPY__125MHZ, %g4 |
| 53 | #else |
| 54 | #ifdef PCIE_REF_CLK_250 |
| 55 | peu_set_target_pcie_ref_clk_250MHz: |
| 56 | mov PEU_SERDES_PLL_MPY__250MHZ, %g4 |
| 57 | #endif /* PCIE_REF_CLK_250 */ |
| 58 | #endif /* PCIE_REF_CLK_125 */ |
| 59 | #endif /* PCIE_REF_CLK_100 */ |
| 60 | #if defined(PCIE_REF_CLK_100) || defined(PCIE_REF_CLK_125) || defined(PCIE_REF_CLK_250) |
| 61 | peu_check_serdes_pll_ratio: |
| 62 | best_set_reg(FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_PLL_ADDR, %g2, %g3) |
| 63 | ldx [%g3], %g5 |
| 64 | sub %g5, %g4, %g5 |
| 65 | brz %g5, peu_serdes_pll_ratio_already_set |
| 66 | nop |
| 67 | peu_set_serdes_pll_ratio: |
| 68 | stx %g4, [%g3] ! set mpy field for 100Mhz refclk |
| 69 | ! do a warm reset to activate the new value, per PRM 16.6.6 |
| 70 | setx RESET_GEN, %g2, %g5 ! warm reset reg |
| 71 | add %g0, 0x1, %g7 ! warm reset reg data |
| 72 | peu_kick_wmr_for_serdes_pll_ratio_change: |
| 73 | stx %g7, [%g5] ! Warm Reset |
| 74 | ldx [%g5], %g7 ! Force a delay to wait for WMR |
| 75 | |
| 76 | peu_serdes_pll_ratio_already_set: |
| 77 | #endif /*defined(PCIE_REF_CLK_100) || defined(PCIE_REF_CLK_125) || defined(PCIE_REF_CLK_250)*/ |