| 1 | /* |
| 2 | * ========== Copyright Header Begin ========================================== |
| 3 | * |
| 4 | * OpenSPARC T2 Processor File: tcu_defines.h |
| 5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved |
| 6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. |
| 7 | * |
| 8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License as published by |
| 12 | * the Free Software Foundation; version 2 of the License. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 22 | * |
| 23 | * For the avoidance of doubt, and except that if any non-GPL license |
| 24 | * choice is available it will apply instead, Sun elects to use only |
| 25 | * the General Public License version 2 (GPLv2) at this time for any |
| 26 | * software where a choice of GPL license versions is made |
| 27 | * available with the language indicating that GPLv2 or any later version |
| 28 | * may be used, or where a choice of which version of the GPL is applied is |
| 29 | * otherwise unspecified. |
| 30 | * |
| 31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
| 32 | * CA 95054 USA or visit www.sun.com if you need additional information or |
| 33 | * have any questions. |
| 34 | * |
| 35 | * |
| 36 | * ========== Copyright Header End ============================================ |
| 37 | */ |
| 38 | #define MBIST_MODE_REG 0x8500000000 |
| 39 | #define MBIST_BYPASS_REG 0x8500000008 |
| 40 | #define MBIST_START_REG 0x8500000010 |
| 41 | #define MBIST_ABORT_REG 0X8500000018 |
| 42 | #define MBIST_RESULT_REG 0x8500000020 |
| 43 | #define MBIST_DONE_REG 0x8500000028 |
| 44 | #define MBIST_FAIL_REG 0x8500000030 |
| 45 | #define MBIST_START_WMR_REG 0x8500000038 |
| 46 | #define LBIST_MODE_REG 0x8500000040 |
| 47 | #define LBIST_BYPASS_REG 0x8500000048 |
| 48 | #define LBIST_START_REG 0x8500000050 |
| 49 | #define LBIST_DONE_REG 0x8500000058 |
| 50 | #define TCU_DEBUG_EVENT_COUNTER_REG 0x85000000F8 |
| 51 | #define TCU_CYCLE_COUNTER_REG 0x8500000100 |
| 52 | #define TCU_DEBUG_CONTROL_REG 0x8500000108 |
| 53 | #define TCU_TRIGOUT_REG 0x8500000110 |
| 54 | #define CLKSTOP_DELAY_REG 0x8500000118 |
| 55 | #define PEUTESTCONFIG_ENABLE_REG 0x8500000180 |