| 1 | /* |
| 2 | * ========== Copyright Header Begin ========================================== |
| 3 | * |
| 4 | * OpenSPARC T2 Processor File: isa3_pmu_dmiss_idle.s |
| 5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved |
| 6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. |
| 7 | * |
| 8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License as published by |
| 12 | * the Free Software Foundation; version 2 of the License. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 22 | * |
| 23 | * For the avoidance of doubt, and except that if any non-GPL license |
| 24 | * choice is available it will apply instead, Sun elects to use only |
| 25 | * the General Public License version 2 (GPLv2) at this time for any |
| 26 | * software where a choice of GPL license versions is made |
| 27 | * available with the language indicating that GPLv2 or any later version |
| 28 | * may be used, or where a choice of which version of the GPL is applied is |
| 29 | * otherwise unspecified. |
| 30 | * |
| 31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
| 32 | * CA 95054 USA or visit www.sun.com if you need additional information or |
| 33 | * have any questions. |
| 34 | * |
| 35 | * |
| 36 | * ========== Copyright Header End ============================================ |
| 37 | */ |
| 38 | #define MAIN_PAGE_NUCLEUS_ALSO |
| 39 | #include "hboot.s" |
| 40 | /************************************************************************ |
| 41 | Test case code start |
| 42 | ************************************************************************/ |
| 43 | |
| 44 | .text |
| 45 | .global main |
| 46 | |
| 47 | main: /* test begin */ |
| 48 | |
| 49 | ! |
| 50 | ! Thread 0 Start |
| 51 | ! |
| 52 | !main_t0: |
| 53 | !# Initialize registers .. |
| 54 | |
| 55 | !# Global registers |
| 56 | !# Input registers |
| 57 | !# Local registers |
| 58 | set 0x1808C042, %l0 ! count I-Cache Misses |
| 59 | set 0x1810C082, %l1 ! count D-Cache Misses |
| 60 | set 0x1820C102, %l2 ! count ITLB Misses |
| 61 | set 0x1840C202, %l3 ! count DTLB Misses |
| 62 | set 0x1880C402, %l4 ! count L2 cache instruction misses |
| 63 | set 0x1900C802, %l5 ! count L2 cache load misses |
| 64 | set 0x00000002, %l6 ! count idle |
| 65 | !# Output registers |
| 66 | !# Float registers |
| 67 | !# Other state |
| 68 | |
| 69 | !# Execute Main Diag .. |
| 70 | ta T_CHANGE_PRIV ! Should cause Watchdog_reset trap |
| 71 | |
| 72 | rd %pic, %g2 ! load the current pic value into %g2 |
| 73 | wr %g0, %g0, %pic ! zero out the counter |
| 74 | |
| 75 | |
| 76 | ! before sending branches, update the PCR to be in UT.? |
| 77 | rd %pcr, %g3 ! load the current pcr value into %g3 |
| 78 | |
| 79 | !count Dcache misses |
| 80 | wr %l1, %g0, %pcr ! count dcache misses |
| 81 | |
| 82 | addcc %g0, 0x0000, %g2 |
| 83 | setx load_1, %g2, %g3 |
| 84 | ld [%g3 + 0x0], %g2 |
| 85 | ld [%g3 + 0x10], %g6 |
| 86 | ld [%g3 + 0x0], %g1 !should not be counted as a dmiss |
| 87 | inc %g5 |
| 88 | inc %g5 |
| 89 | rd %pic, %g2 !check pic value |
| 90 | |
| 91 | !count idle |
| 92 | wr %l6, %g0, %pcr ! count idle cycles |
| 93 | ld [%g3 + 0x10], %g2 ! 32 cycles waiting on this one... look for >1 |
| 94 | |
| 95 | !count DTLB misses |
| 96 | wr %l2, %g0, %pcr ! count dtlb misses ... not included yet |
| 97 | setx load_2, %i0, %g4 |
| 98 | ldx [%g4], %g3 |
| 99 | !inc %g5 !not counting this yet ... |
| 100 | |
| 101 | !stop counting |
| 102 | wr %g0, %g0, %pcr !stop counting |
| 103 | |
| 104 | inc %g5 !look for at least one idle cycle |
| 105 | !add %g5, 0x20, %g5 |
| 106 | rd %pic, %g2 !check pic value |
| 107 | cmp %g2, %g5 |
| 108 | ble,pn %icc, fail |
| 109 | |
| 110 | nop |
| 111 | |
| 112 | done: |
| 113 | EXIT_GOOD /* test finish */ |
| 114 | fail: |
| 115 | EXIT_BAD /* bad count */ |
| 116 | |
| 117 | /************************************************************************ |
| 118 | Test case data start |
| 119 | ************************************************************************/ |
| 120 | .data |
| 121 | user_data_start: |
| 122 | scratch_area: |
| 123 | .align 16 |
| 124 | load_1: |
| 125 | .word 0xFFFF2e2d |
| 126 | .word 0x2e2dFFFF |
| 127 | .align 16 |
| 128 | |
| 129 | load_2: |
| 130 | .xword 0xABCDEF0123456789 |
| 131 | store_1: |
| 132 | .align 16 |
| 133 | .word 0xDEADBEEF |
| 134 | .word 0xAAAAAAAA |
| 135 | .align 16 |
| 136 | |
| 137 | .end |