| 1 | /* |
| 2 | * ========== Copyright Header Begin ========================================== |
| 3 | * |
| 4 | * OpenSPARC T2 Processor File: tx_MULTI_PORT_DMA_rand_0088.s |
| 5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved |
| 6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. |
| 7 | * |
| 8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License as published by |
| 12 | * the Free Software Foundation; version 2 of the License. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 22 | * |
| 23 | * For the avoidance of doubt, and except that if any non-GPL license |
| 24 | * choice is available it will apply instead, Sun elects to use only |
| 25 | * the General Public License version 2 (GPLv2) at this time for any |
| 26 | * software where a choice of GPL license versions is made |
| 27 | * available with the language indicating that GPLv2 or any later version |
| 28 | * may be used, or where a choice of which version of the GPL is applied is |
| 29 | * otherwise unspecified. |
| 30 | * |
| 31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
| 32 | * CA 95054 USA or visit www.sun.com if you need additional information or |
| 33 | * have any questions. |
| 34 | * |
| 35 | * |
| 36 | * ========== Copyright Header End ============================================ |
| 37 | */ |
| 38 | #define MAIN_PAGE_HV_ALSO |
| 39 | |
| 40 | #include "hboot.s" |
| 41 | #include "niu_defines.h" |
| 42 | #define FAIR_PKT_CNT (NIU_TX_PKT_CNT / 2) |
| 43 | |
| 44 | .text |
| 45 | .global main |
| 46 | |
| 47 | main: |
| 48 | ta T_CHANGE_HPRIV |
| 49 | nop |
| 50 | # 85 "diag.j.pp" |
| 51 | ! |
| 52 | ! Thread 0 Start |
| 53 | ! |
| 54 | ! |
| 55 | !thread_0: |
| 56 | |
| 57 | Init_flow: |
| 58 | nop ! $EV trig_pc_d(1, @VA(.MAIN.Init_flow)) -> pktGenConfig(MAC_ID, FRAME_TYPE, FRAME_CLASS, 40, NIU_TX_MULTI_PORT, 90) |
| 59 | |
| 60 | P_TxDMAActivate: |
| 61 | setx MAC_ID, %g1, %o0 |
| 62 | setx 0x1, %g1, %o1 |
| 63 | setx NIU_TX_MULTI_PORT, %g1, %o2 |
| 64 | setx NIU_TX_MULTI_DMA_P0, %g1, %o3 |
| 65 | setx NIU_TX_MULTI_DMA_P1, %g1, %o4 |
| 66 | call SetTxDMAActive |
| 67 | nop ! $EV trig_pc_d(1, @VA(.MAIN.P_TxDMAActivate)) -> NIU_TxDMAActivate (MAC_ID, 1, NIU_TX_MULTI_PORT, NIU_TX_MULTI_DMA_P0, NIU_TX_MULTI_DMA_P1) |
| 68 | |
| 69 | |
| 70 | P_AddTxChannels: |
| 71 | nop ! $EV trig_pc_d(1, @VA(.MAIN.P_AddTxChannels)) -> NIU_AddTxChannels(MAC_ID, 0, NIU_TX_MULTI_PORT, NIU_TX_MULTI_DMA_P0, NIU_TX_MULTI_DMA_P1) |
| 72 | ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 |
| 73 | nop |
| 74 | |
| 75 | P_SetTxMaxBurst: |
| 76 | setx 0x0, %g1, %o0 |
| 77 | setx SetTxMaxBurst_Data, %g1, %o1 |
| 78 | setx NIU_TX_MULTI_PORT, %g1, %o2 |
| 79 | setx NIU_TX_MULTI_DMA_P0, %g1, %o3 |
| 80 | setx NIU_TX_MULTI_DMA_P1, %g1, %o4 |
| 81 | call SetTxMaxBurst |
| 82 | nop ! $EV trig_pc_d(1, @VA(.MAIN.P_SetTxMaxBurst)) -> NIU_SetTxMaxBurst (MAC_ID, 0, TxMaxBurst_Data, NIU_TX_MULTI_PORT, NIU_TX_MULTI_DMA_P0, NIU_TX_MULTI_DMA_P1) |
| 83 | ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 |
| 84 | nop |
| 85 | |
| 86 | |
| 87 | |
| 88 | |
| 89 | |
| 90 | |
| 91 | |
| 92 | nop |
| 93 | setx NIU_TX_MULTI_PORT, %g1, %o2 |
| 94 | setx NIU_TX_MULTI_DMA_P0, %g1, %o3 |
| 95 | setx NIU_TX_MULTI_DMA_P1, %g1, %o4 |
| 96 | call InitTxDma |
| 97 | nop |
| 98 | ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 |
| 99 | nop |
| 100 | |
| 101 | Gen_Packet: |
| 102 | nop ! $EV trig_pc_d(1, @VA(.MAIN.Gen_Packet)) -> TxPktGen(MAC_ID, 0, NIU_TX_PKT_CNT, NIU_TX_MULTI_PORT, NIU_TX_MULTI_DMA_P0, NIU_TX_MULTI_DMA_P1) |
| 103 | nop |
| 104 | |
| 105 | setx 0x5, %g1, %g4 |
| 106 | delay_loop_tmp: |
| 107 | ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 |
| 108 | nop |
| 109 | nop |
| 110 | nop |
| 111 | nop |
| 112 | dec %g4 |
| 113 | brnz %g4, delay_loop_tmp |
| 114 | nop |
| 115 | |
| 116 | SetTxRingKick_0: |
| 117 | setx NIU_PKTGEN_CSR_EV2A_TX_RNG_KICK, %g1, %g2 ! $EV trig_pc_d(1, @VA(.MAIN.SetTxRingKick_0)) -> NIU_SetTxRingKick(0, 3, NIU_TX_MULTI_PORT, NIU_TX_MULTI_DMA_P0, NIU_TX_MULTI_DMA_P1) |
| 118 | setx 0x3, %g1, %o0 |
| 119 | ! setx NIU_TX_MULTI_PORT, %g1, %o2 |
| 120 | ! setx NIU_TX_MULTI_DMA_P0, %g1, %o3 |
| 121 | ldx [%g2] , %g3 |
| 122 | nop |
| 123 | mulx %o0, 0x200, %g5 |
| 124 | setx TX_RING_KICK_Addr, %g1, %g2 |
| 125 | add %g2, %g5, %g2 |
| 126 | stxa %g3, [%g2]ASI_PRIMARY_LITTLE |
| 127 | nop |
| 128 | |
| 129 | SetTxCs_7: |
| 130 | setx 0x3, %g1, %o0 |
| 131 | setx TX_CS_Data, %g1, %g3 |
| 132 | mulx %o0, 0x200, %g5 |
| 133 | setx TX_CS_Addr, %g1, %g2 |
| 134 | add %g2, %g5, %g2 |
| 135 | stxa %g3, [%g2]ASI_PRIMARY_LITTLE |
| 136 | nop |
| 137 | |
| 138 | SetTxRingKick_1: |
| 139 | setx NIU_PKTGEN_CSR_EV2A_TX_RNG_KICK, %g1, %g2 ! $EV trig_pc_d(1, @VA(.MAIN.SetTxRingKick_1)) -> NIU_SetTxRingKick(1, 7, NIU_TX_MULTI_PORT, NIU_TX_MULTI_DMA_P0, NIU_TX_MULTI_DMA_P1) |
| 140 | setx 0x7, %g1, %o0 |
| 141 | ! setx NIU_TX_MULTI_PORT, %g1, %o2 |
| 142 | ! setx NIU_TX_MULTI_DMA_P1, %g1, %o4 |
| 143 | ldx [%g2] , %g3 |
| 144 | nop |
| 145 | mulx %o0, 0x200, %g5 |
| 146 | setx TX_RING_KICK_Addr, %g1, %g2 |
| 147 | add %g2, %g5, %g2 |
| 148 | stxa %g3, [%g2]ASI_PRIMARY_LITTLE |
| 149 | nop |
| 150 | |
| 151 | SetTxCs_15: |
| 152 | setx 0x7, %g1, %o0 |
| 153 | setx TX_CS_Data, %g1, %g3 |
| 154 | mulx %o0, 0x200, %g5 |
| 155 | setx TX_CS_Addr, %g1, %g2 |
| 156 | add %g2, %g5, %g2 |
| 157 | stxa %g3, [%g2]ASI_PRIMARY_LITTLE |
| 158 | nop |
| 159 | |
| 160 | #ifdef JUMBO_FRAME_EN |
| 161 | setx loop_count, %g1, %g4 |
| 162 | delay_loop: |
| 163 | ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 |
| 164 | nop |
| 165 | nop |
| 166 | nop |
| 167 | nop |
| 168 | dec %g4 |
| 169 | brnz %g4, delay_loop |
| 170 | nop |
| 171 | #endif |
| 172 | |
| 173 | |
| 174 | NIUTx_Pkt_Cnt_Chk_P0: |
| 175 | setx 0x0, %g1, %o0 ! MAC PORT |
| 176 | ! setx 0x10, %g1, %o1 ! PKT CNT |
| 177 | setx FAIR_PKT_CNT, %g1, %o1 ! PKT CNT |
| 178 | call NiuTx_check_pkt_cnt |
| 179 | nop |
| 180 | |
| 181 | setx loop_count, %g1, %g4 |
| 182 | delay_loop_end_p0: |
| 183 | ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 |
| 184 | nop |
| 185 | nop |
| 186 | nop |
| 187 | nop |
| 188 | dec %g4 |
| 189 | brnz %g4, delay_loop_end_p0 |
| 190 | nop |
| 191 | |
| 192 | NIUTx_Pkt_Cnt_Chk_P1: |
| 193 | setx 0x1, %g1, %o0 ! MAC PORT |
| 194 | ! setx 0x10, %g1, %o1 ! PKT CNT |
| 195 | setx FAIR_PKT_CNT, %g1, %o1 ! PKT CNT |
| 196 | call NiuTx_check_pkt_cnt |
| 197 | nop |
| 198 | |
| 199 | setx loop_count, %g1, %g4 |
| 200 | delay_loop_end_p1: |
| 201 | ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 |
| 202 | nop |
| 203 | nop |
| 204 | nop |
| 205 | nop |
| 206 | dec %g4 |
| 207 | brnz %g4, delay_loop_end_p1 |
| 208 | nop |
| 209 | |
| 210 | test_passed: |
| 211 | nop ! $EV trig_pc_d(1, @VA(.MAIN.test_passed)) -> NIU_EXIT_chk(0) |
| 212 | nop ! $EV trig_pc_d(1, @VA(.MAIN.test_passed)) -> NIU_EXIT_chk(1) |
| 213 | EXIT_GOOD |
| 214 | |
| 215 | |
| 216 | /************************************************************************ |
| 217 | Test case data start |
| 218 | ************************************************************************/ |
| 219 | SECTION SetRngConfig_init data_va=0x100000000 |
| 220 | attr_data { |
| 221 | Name = SetRngConfig_init, |
| 222 | hypervisor, |
| 223 | compressimage |
| 224 | } |
| 225 | .data |
| 226 | SetRngConfig_init: |
| 227 | .xword 0x0060452301000484 |
| 228 | |
| 229 | SECTION SetTxRingKick_init data_va=0x100000100 |
| 230 | attr_data { |
| 231 | Name = SetTxRingKick_init, |
| 232 | hypervisor, |
| 233 | compressimage |
| 234 | } |
| 235 | .data |
| 236 | SetTxRingKick_init: |
| 237 | .xword 0x0060452301000484 |
| 238 | |
| 239 | SECTION SetTxLPMask1_init data_va=0x100000200 |
| 240 | attr_data { |
| 241 | Name = SetTxLPMask1_init, |
| 242 | hypervisor, |
| 243 | compressimage |
| 244 | } |
| 245 | .data |
| 246 | SetTxLPMask1_init: |
| 247 | .xword 0x0060452301000484 |
| 248 | |
| 249 | SECTION SetTxLPValue1_init data_va=0x100000300 |
| 250 | attr_data { |
| 251 | Name = SetTxLPValue1_init, |
| 252 | hypervisor, |
| 253 | compressimage |
| 254 | } |
| 255 | .data |
| 256 | SetTxLPValue1_init: |
| 257 | .xword 0x0060452301000484 |
| 258 | |
| 259 | SECTION SetTxLPRELOC1_init data_va=0x100000400 |
| 260 | attr_data { |
| 261 | Name = SetTxLPRELOC1_init, |
| 262 | hypervisor, |
| 263 | compressimage |
| 264 | } |
| 265 | .data |
| 266 | SetTxLPRELOC1_init: |
| 267 | .xword 0x0060452301000484 |
| 268 | SECTION SetTxLPMask2_init data_va=0x100000500 |
| 269 | attr_data { |
| 270 | Name = SetTxLPMask2_init, |
| 271 | hypervisor, |
| 272 | compressimage |
| 273 | } |
| 274 | .data |
| 275 | SetTxLPMask2_init: |
| 276 | .xword 0x0060452301000484 |
| 277 | SECTION SetTxLPValue2_init data_va=0x100000600 |
| 278 | attr_data { |
| 279 | Name = SetTxLPValue2_init, |
| 280 | hypervisor, |
| 281 | compressimage |
| 282 | } |
| 283 | .data |
| 284 | SetTxLPValue2_init: |
| 285 | .xword 0x0060452301000484 |
| 286 | |
| 287 | SECTION SetTxLPRELOC2_init data_va=0x100000700 |
| 288 | attr_data { |
| 289 | Name = SetTxLPRELOC2_init, |
| 290 | hypervisor, |
| 291 | compressimage |
| 292 | } |
| 293 | .data |
| 294 | SetTxLPRELOC2_init: |
| 295 | .xword 0x0060452301000484 |
| 296 | |
| 297 | SECTION SetTxLPValid_init data_va=0x100000800 |
| 298 | attr_data { |
| 299 | Name = SetTxLPValid_init, |
| 300 | hypervisor, |
| 301 | compressimage |
| 302 | } |
| 303 | .data |
| 304 | SetTxLPValid_init: |
| 305 | .xword 0x0060452301000484 |
| 306 | # 315 "diag.j.pp" |
| 307 | |
| 308 | #if 0 |
| 309 | #endif |