| 1 | /* |
| 2 | * ========== Copyright Header Begin ========================================== |
| 3 | * |
| 4 | * OpenSPARC T2 Processor File: err_fc_icdp_icl2u_diag.s |
| 5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved |
| 6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. |
| 7 | * |
| 8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License as published by |
| 12 | * the Free Software Foundation; version 2 of the License. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 22 | * |
| 23 | * For the avoidance of doubt, and except that if any non-GPL license |
| 24 | * choice is available it will apply instead, Sun elects to use only |
| 25 | * the General Public License version 2 (GPLv2) at this time for any |
| 26 | * software where a choice of GPL license versions is made |
| 27 | * available with the language indicating that GPLv2 or any later version |
| 28 | * may be used, or where a choice of which version of the GPL is applied is |
| 29 | * otherwise unspecified. |
| 30 | * |
| 31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
| 32 | * CA 95054 USA or visit www.sun.com if you need additional information or |
| 33 | * have any questions. |
| 34 | * |
| 35 | * |
| 36 | * ========== Copyright Header End ============================================ |
| 37 | */ |
| 38 | #define MY_HP_TEXT_PA 0x1050000000 |
| 39 | #define MY_HP_DATA_PA 0x1050001000 |
| 40 | |
| 41 | #define ASI_PRIMARY_CONTEXT_0 0x21 |
| 42 | #define ASI_ITLB_DATA_IN_REG 0x54 |
| 43 | #define ASI_DMMU_TAG_ACCESS 0x58 |
| 44 | #define ASI_DTLB_DATA_IN_REG 0x5c |
| 45 | #define ASI_DMMU_SFAR 0x58 |
| 46 | |
| 47 | |
| 48 | #define MY_USER_TEXT_VA000 0x7a000000 |
| 49 | #define MY_USER_TEXT_RA000 0x7b000000 |
| 50 | #define MY_USER_TEXT_PA000 0x107b000000 |
| 51 | #define MY_USER_TEXT_VA001 0x7a010000 |
| 52 | #define MY_USER_TEXT_RA001 0x7b010000 |
| 53 | #define MY_USER_TEXT_PA001 0x107b010000 |
| 54 | #define MY_USER_TEXT_VA002 0x7a020000 |
| 55 | #define MY_USER_TEXT_RA002 0x7b020000 |
| 56 | #define MY_USER_TEXT_PA002 0x107b020000 |
| 57 | #define MY_USER_TEXT_VA003 0x7a030000 |
| 58 | #define MY_USER_TEXT_RA003 0x7b030000 |
| 59 | #define MY_USER_TEXT_PA003 0x107b030000 |
| 60 | #define MY_USER_TEXT_VA004 0x7a040000 |
| 61 | #define MY_USER_TEXT_RA004 0x7b040000 |
| 62 | #define MY_USER_TEXT_PA004 0x107b040000 |
| 63 | #define MY_USER_TEXT_VA005 0x7a050000 |
| 64 | #define MY_USER_TEXT_RA005 0x7b050000 |
| 65 | #define MY_USER_TEXT_PA005 0x107b050000 |
| 66 | #define MY_USER_TEXT_VA006 0x7a060000 |
| 67 | #define MY_USER_TEXT_RA006 0x7b060000 |
| 68 | #define MY_USER_TEXT_PA006 0x107b060000 |
| 69 | #define MY_USER_TEXT_VA007 0x7a070000 |
| 70 | #define MY_USER_TEXT_RA007 0x7b070000 |
| 71 | #define MY_USER_TEXT_PA007 0x107b070000 |
| 72 | #define MY_USER_TEXT_VA008 0x7a080000 |
| 73 | #define MY_USER_TEXT_RA008 0x7b080000 |
| 74 | #define MY_USER_TEXT_PA008 0x107b080000 |
| 75 | #define MY_USER_TEXT_VA009 0x7a090000 |
| 76 | #define MY_USER_TEXT_RA009 0x7b090000 |
| 77 | #define MY_USER_TEXT_PA009 0x107b090000 |
| 78 | #define MY_USER_TEXT_VA010 0x7a0a0000 |
| 79 | #define MY_USER_TEXT_RA010 0x7b0a0000 |
| 80 | #define MY_USER_TEXT_PA010 0x107b0a0000 |
| 81 | #define MY_USER_TEXT_VA011 0x7a0b0000 |
| 82 | #define MY_USER_TEXT_RA011 0x7b0b0000 |
| 83 | #define MY_USER_TEXT_PA011 0x107b0b0000 |
| 84 | #define MY_USER_TEXT_VA012 0x7a0c0000 |
| 85 | #define MY_USER_TEXT_RA012 0x7b0c0000 |
| 86 | #define MY_USER_TEXT_PA012 0x107b0c0000 |
| 87 | #define MY_USER_TEXT_VA013 0x7a0d0000 |
| 88 | #define MY_USER_TEXT_RA013 0x7b0d0000 |
| 89 | #define MY_USER_TEXT_PA013 0x107b0d0000 |
| 90 | |
| 91 | #define MY_USER_DATA_VA000 0x6a002000 |
| 92 | #define MY_USER_DATA_RA000 0x6b002000 |
| 93 | #define MY_USER_DATA_PA000 0x106b002000 |
| 94 | #define MY_USER_DATA_VA001 0x6a004000 |
| 95 | #define MY_USER_DATA_RA001 0x6b004000 |
| 96 | #define MY_USER_DATA_PA001 0x106b004000 |
| 97 | #define MY_USER_DATA_VA002 0x6a086000 |
| 98 | #define MY_USER_DATA_RA002 0x6b086000 |
| 99 | #define MY_USER_DATA_PA002 0x106b086000 |
| 100 | #define MY_USER_DATA_VA003 0x6a0c8000 |
| 101 | #define MY_USER_DATA_RA003 0x6b0c8000 |
| 102 | #define MY_USER_DATA_PA003 0x106b0c8000 |
| 103 | #define MY_USER_DATA_VA004 0x6a10a000 |
| 104 | #define MY_USER_DATA_RA004 0x6b10a000 |
| 105 | #define MY_USER_DATA_PA004 0x106b10a000 |
| 106 | #define MY_USER_DATA_VA005 0x6a14c000 |
| 107 | #define MY_USER_DATA_RA005 0x6b14c000 |
| 108 | #define MY_USER_DATA_PA005 0x106b14c000 |
| 109 | #define MY_USER_DATA_VA006 0x6a18e000 |
| 110 | #define MY_USER_DATA_RA006 0x6b18e000 |
| 111 | #define MY_USER_DATA_PA006 0x106b18e000 |
| 112 | #define MY_USER_DATA_VA007 0x6a1e0000 |
| 113 | #define MY_USER_DATA_RA007 0x6b1e0000 |
| 114 | #define MY_USER_DATA_PA007 0x106b1e0000 |
| 115 | #define MY_USER_DATA_VA008 0x6a080000 |
| 116 | #define MY_USER_DATA_RA008 0x6b080000 |
| 117 | #define MY_USER_DATA_PA008 0x106b080000 |
| 118 | #define MY_USER_DATA_VA009 0x6a090000 |
| 119 | #define MY_USER_DATA_RA009 0x6b090000 |
| 120 | #define MY_USER_DATA_PA009 0x106b090000 |
| 121 | #define MY_USER_DATA_VA010 0x6a0a0000 |
| 122 | #define MY_nc_DATA_RA010 0xb06b0a0000 |
| 123 | #define MY_nc_DATA_PA010 0xc06b0a0000 |
| 124 | #define MY_USER_DATA_VA011 0x6a0b0000 |
| 125 | #define MY_nc_DATA_RA011 0xb06b0b0000 |
| 126 | #define MY_nc_DATA_PA011 0xc06b0b0000 |
| 127 | #define MY_USER_DATA_VA012 0x6a0c0000 |
| 128 | #define MY_nc_DATA_RA012 0xb06b0c0000 |
| 129 | #define MY_nc_DATA_PA012 0xc06b0c0000 |
| 130 | #define MY_USER_DATA_VA013 0x6a0d0000 |
| 131 | #define MY_nc_DATA_RA013 0xb06b0d0000 |
| 132 | #define MY_nc_DATA_PA013 0xc06b0d0000 |
| 133 | |
| 134 | #define IMDU_ERR_EN 0xa0000000 |
| 135 | #define IMTU_ERR_EN 0x90000000 |
| 136 | #define DMDU_ERR_EN 0x88000000 |
| 137 | #define DMTU_ERR_EN 0x84000000 |
| 138 | #define IRCU_ERR_EN 0x82000000 |
| 139 | #define FRCU_ERR_EN 0x81000000 |
| 140 | #define SCAU_ERR_EN 0x80800000 |
| 141 | #define TCCU_ERR_EN 0x80400000 |
| 142 | #define TSAU_ERR_EN 0x80200000 |
| 143 | #define MRAU_ERR_EN 0x80100000 |
| 144 | #define STAU_ERR_EN 0x80080000 |
| 145 | #define STDU_ERR_EN 0x80020000 |
| 146 | |
| 147 | #define ASI_DESR 0x4c |
| 148 | #define ASI_DFESR 0x4c |
| 149 | #define DFESR_VA 0x8 |
| 150 | #define ASI_DSFSR 0x58 |
| 151 | #define ASI_ISFSR 0x50 |
| 152 | #define SFSR_VA 0x18 |
| 153 | #define ASI_SFAR 0x58 |
| 154 | #define SFAR_VA 0x20 |
| 155 | #define ASI_ERR_INJ 0x43 |
| 156 | #define ASI_CETER 0x4C |
| 157 | #define CETER_VA 0x18 |
| 158 | #define ASI_CERER 0x4C |
| 159 | #define CERER_VA 0x10 |
| 160 | |
| 161 | #define CETER_ALL 0x7000_0000_0000_0000 |
| 162 | #define DCDP_ERR_TYPE 0x8 |
| 163 | |
| 164 | #define MAIN_PAGE_HV_ALSO |
| 165 | |
| 166 | #define H_HT0_Data_access_error_0x32 DATA_ACCESS_ERROR_HANDLER |
| 167 | #define H_HT0_Instruction_access_error_0x0a INST_ACCESS_ERROR_HANDLER |
| 168 | |
| 169 | #define H_HT0_Hw_Corrected_Error_0x63 |
| 170 | #define SUN_H_HT0_Hw_Corrected_Error_0x63 \ |
| 171 | ba HW_CORR_ERROR_HANDLER; \ |
| 172 | nop;nop;nop;nop;nop;nop;nop |
| 173 | |
| 174 | #include "hboot.s" |
| 175 | |
| 176 | /************************************************************************ |
| 177 | Test case: |
| 178 | ************************************************************************/ |
| 179 | #define TEST_DATA0 0x5555555555555555 |
| 180 | #define TEST_DATA1 0x1122334455667788 |
| 181 | #define TEST_DATA2 0xaabbccddeeff0011 |
| 182 | #define TEST_DATA3 0x123456789abcdeff |
| 183 | #define TEST_DATA4 0xff123456789abcde |
| 184 | #define TEST_DATA5 0x1f2f3f4e5d6a7b8c |
| 185 | #define TEST_DATA6 0xe1d2f3b5a8e3a8a9 |
| 186 | #define TEST_DATA7 0x1a2b3c4d5e6f2346 |
| 187 | #define ALL_F 0Xffffffffffffffff |
| 188 | |
| 189 | .text |
| 190 | .global main |
| 191 | |
| 192 | main: /* test begin */ |
| 193 | ta T_CHANGE_HPRIV |
| 194 | mov 1, %o2 |
| 195 | sllx %o2, 54, %o2 !! enable icl2u |
| 196 | mov 1, %g1 |
| 197 | sllx %g1, 15, %g1 !! enable ICDP |
| 198 | or %g1, %o2, %o2 |
| 199 | |
| 200 | add %g0, CERER_VA, %g3 |
| 201 | stxa %o2, [%g3]ASI_CERER |
| 202 | |
| 203 | !! set CETER.all |
| 204 | !mov 7, %o2 |
| 205 | !sllx %o2, 60, %o2 |
| 206 | !add %g0, CETER_VA, %g3 |
| 207 | !stxa %o2, [%g3]ASI_CETER |
| 208 | |
| 209 | !! Put Icache in direct mapped mode |
| 210 | !add %g0, 0x10, %g1 |
| 211 | !or %g0, 0x2, %g2 |
| 212 | !stxa %g2, [%g1]ASI_DIAG |
| 213 | |
| 214 | !! set NCEEN in l2 err enable reg |
| 215 | set_nccen_l2: |
| 216 | mov 0xaa, %g1 |
| 217 | sllx %g1, 32, %g1 |
| 218 | mov 0x2, %g2 |
| 219 | stx %g2, [%g1] |
| 220 | stx %g2, [%g1+0x40] |
| 221 | stx %g2, [%g1+0x80] |
| 222 | stx %g2, [%g1+0xc0] |
| 223 | stx %g2, [%g1+0x100] |
| 224 | stx %g2, [%g1+0x140] |
| 225 | stx %g2, [%g1+0x180] |
| 226 | stx %g2, [%g1+0x1c0] |
| 227 | |
| 228 | !! put l2$ banks in direct mapped mode |
| 229 | l2cache_dm: |
| 230 | mov 0xa9, %g1 |
| 231 | sllx %g1, 32, %g1 |
| 232 | mov 0x2, %g2 |
| 233 | stx %g2, [%g1] |
| 234 | stx %g2, [%g1+0x40] |
| 235 | stx %g2, [%g1+0x80] |
| 236 | stx %g2, [%g1+0xc0] |
| 237 | stx %g2, [%g1+0x100] |
| 238 | stx %g2, [%g1+0x140] |
| 239 | stx %g2, [%g1+0x180] |
| 240 | stx %g2, [%g1+0x1c0] |
| 241 | |
| 242 | setx 0x3ffff8, %g1, %l3 !! mask to capture the lower 22 bits of the PA |
| 243 | mov 8, %l4 !! no. of iterations for each thread |
| 244 | |
| 245 | !!ta T_CHANGE_NONHPRIV |
| 246 | |
| 247 | disable_ic: |
| 248 | ldxa [%g0]0x45, %g1 !! read lsu_control reg |
| 249 | xor %g1, 1, %g1 !! turn off I$ |
| 250 | stxa %g1, [%g0]0x45 |
| 251 | |
| 252 | setx user_code_begin_000, %g1, %l1 |
| 253 | jmpl %l1, %l2 !! jmp to get the I$ line in L2c |
| 254 | nop |
| 255 | |
| 256 | diag_read_l2: |
| 257 | mov 0xa0, %g2 |
| 258 | sllx %g2, 32, %g2 |
| 259 | and %l3, %l1, %g1 |
| 260 | add %g2, %g1, %g2 |
| 261 | !!read all the words |
| 262 | word0: |
| 263 | ldx [%g2], %g5 |
| 264 | srlx %g5, 7, %g5 |
| 265 | mov 1, %g6 |
| 266 | sllx %g6, 22, %g6 |
| 267 | or %g6, %g2, %g2 |
| 268 | word1: |
| 269 | ldx [%g2], %g5 |
| 270 | srlx %g5, 7, %g5 |
| 271 | or %g2, 8, %g2 |
| 272 | word3: |
| 273 | ldx [%g2], %g5 |
| 274 | srlx %g5, 7, %g5 |
| 275 | xor %g2, %g6, %g2 |
| 276 | word2: |
| 277 | ldx [%g2], %g5 |
| 278 | inj_ue_th0: |
| 279 | xor %g5, 0x5, %g5 |
| 280 | stx %g5, [%g2] |
| 281 | membar #Sync |
| 282 | |
| 283 | ! Enable I$ |
| 284 | enable_ic: |
| 285 | ldxa [%g0]0x45, %g1 !! read lsu_control reg |
| 286 | xor %g1, 1, %g1 !! turn on I$ |
| 287 | stxa %g1, [%g0]0x45 |
| 288 | |
| 289 | !! no err reporting as ceter bits are 0. |
| 290 | ld_err_in_ic: |
| 291 | jmpl %l1, %l2 !! jmp to get the I$ line in IFU with err |
| 292 | nop |
| 293 | !! turn on ceter. |
| 294 | turn_on_ceter: |
| 295 | |
| 296 | mov 7, %o2 |
| 297 | sllx %o2, 60, %o2 |
| 298 | add %g0, CETER_VA, %g3 |
| 299 | stxa %o2, [%g3]ASI_CETER |
| 300 | !!add %l1, 0x20, %l4 |
| 301 | |
| 302 | jmpl %l1+28, %l2 !! jmp to get the err |
| 303 | nop |
| 304 | |
| 305 | nop |
| 306 | EXIT_BAD |
| 307 | |
| 308 | FAIL: |
| 309 | EXIT_BAD |
| 310 | nop |
| 311 | |
| 312 | |
| 313 | /************************************************************************ |
| 314 | Test case data start |
| 315 | ************************************************************************/ |
| 316 | .data |
| 317 | .global user_data_start |
| 318 | user_data_start: |
| 319 | .word 0x12345678 |
| 320 | .word 0x9a9b9c9d |
| 321 | .word 0x00000000 |
| 322 | .word 0xffffffff |
| 323 | |
| 324 | !#*********************************************************************** |
| 325 | |
| 326 | SECTION .My_User_Section_4v000 TEXT_VA=MY_USER_TEXT_VA000, DATA_VA=MY_USER_DATA_VA000 |
| 327 | attr_text { |
| 328 | Name = .My_User_Section_4v000, |
| 329 | part_0_ctx_nonzero_tsb_config_2, |
| 330 | VA = MY_USER_TEXT_VA000, |
| 331 | RA = MY_USER_TEXT_RA000, |
| 332 | PA = ra2pa(MY_USER_TEXT_RA000, 0), |
| 333 | TTE_Context = PCONTEXT, |
| 334 | TTE_V = 1, |
| 335 | TTE_NFO = 0, |
| 336 | TTE_L = 0, |
| 337 | TTE_Soft = 0, |
| 338 | TTE_IE = 0, |
| 339 | TTE_E = 0, |
| 340 | TTE_CP = 1, |
| 341 | TTE_CV = 0, |
| 342 | TTE_P = 0, |
| 343 | TTE_EP = 1, |
| 344 | TTE_W = 0, |
| 345 | TTE_SW1 = 0, |
| 346 | TTE_SW0 = 0, |
| 347 | TTE_RSVD1 = 0, |
| 348 | TTE_Size = 0, |
| 349 | } |
| 350 | attr_text { |
| 351 | NAME = .My_User_Section_4v000, |
| 352 | hypervisor |
| 353 | } |
| 354 | .text |
| 355 | .global user_code_begin_000 |
| 356 | user_code_begin_000: |
| 357 | jmpl %l2+8, %g0 |
| 358 | nop |
| 359 | nop |
| 360 | nop |
| 361 | nop |
| 362 | nop |
| 363 | nop |
| 364 | nop |
| 365 | ! chk both data_acc_err and hw_corr_err traps are taken |
| 366 | brz %i0, FAIL |
| 367 | brz %i1, FAIL |
| 368 | nop |
| 369 | EXIT_GOOD |
| 370 | |
| 371 | FAIL: |
| 372 | EXIT_BAD |
| 373 | |
| 374 | attr_data { |
| 375 | Name = .My_User_Section_4v000, |
| 376 | part_0_ctx_nonzero_tsb_config_1, |
| 377 | VA = MY_USER_DATA_VA000, |
| 378 | RA = MY_USER_DATA_RA000, |
| 379 | PA = ra2pa(MY_USER_DATA_RA000, 0), |
| 380 | TTE_Context = PCONTEXT, |
| 381 | TTE_V = 1, |
| 382 | TTE_NFO = 0, |
| 383 | TTE_L = 0, |
| 384 | TTE_Soft = 0, |
| 385 | TTE_IE = 0, |
| 386 | TTE_E = 0, |
| 387 | TTE_CP = 1, |
| 388 | TTE_CV = 0, |
| 389 | TTE_P = 0, |
| 390 | TTE_EP = 0, |
| 391 | TTE_W = 1, |
| 392 | TTE_SW1 = 0, |
| 393 | TTE_SW0 = 0, |
| 394 | TTE_RSVD1 = 0, |
| 395 | TTE_Size = 0, |
| 396 | } |
| 397 | attr_data { |
| 398 | NAME = .My_User_Section_4v000, |
| 399 | hypervisor |
| 400 | } |
| 401 | .data |
| 402 | .global user_data_begin_000 |
| 403 | user_data_begin_000: |
| 404 | .xword 0xe0066361bd9fcb86 |
| 405 | .xword 0xea22901c101f6f52 |
| 406 | .xword 0x806faa2171350467 |
| 407 | .xword 0xff54f2cd06a0d342 |
| 408 | .xword 0x566bff718cddb905 |
| 409 | .xword 0x6d367bc4d165d37a |
| 410 | .xword 0x5efc42b18f920522 |
| 411 | .xword 0x584c92dec4bc66de |
| 412 | |
| 413 | .xword 0xed9efe0d05896ce1 |
| 414 | .xword 0xf9d45b94972117c8 |
| 415 | .xword 0xd0c647618c9e43f3 |
| 416 | .xword 0xfe04ead3b77c2d11 |
| 417 | .xword 0x06d2d7f29e76397c |
| 418 | .xword 0x234c366110eddd38 |
| 419 | .xword 0xa80656d4288044bc |
| 420 | .xword 0x0f59d0e1ac35dbd4 |
| 421 | |
| 422 | .xword 0x90775b99929f43cc |
| 423 | .xword 0x9fac4ae85a4ecd4e |
| 424 | .xword 0x12e763fbd8e2970d |
| 425 | .xword 0x7320217fab3eae0e |
| 426 | .xword 0x38683cebedefb5af |
| 427 | |
| 428 | |
| 429 | .global DATA_ACCESS_ERROR_HANDLER |
| 430 | .global INST_ACCESS_ERROR_HANDLER |
| 431 | .global MEM_ADDR_HANDLER |
| 432 | |
| 433 | SECTION .HTRAPS |
| 434 | .text |
| 435 | DATA_ACCESS_ERROR_HANDLER: |
| 436 | add %g0, SFSR_VA, %g5 ! |
| 437 | ldxa [%g5]ASI_DSFSR, %o1 ! |
| 438 | cmp %o1, 0x1 |
| 439 | bne FAIL |
| 440 | stxa %g0, [%g5]ASI_DSFSR |
| 441 | add %g0, 1, %i0 ! |
| 442 | done |
| 443 | nop |
| 444 | |
| 445 | INST_ACCESS_ERROR_HANDLER: |
| 446 | add %g0, SFSR_VA, %g5 ! |
| 447 | ldxa [%g5]ASI_ISFSR, %o1 ! |
| 448 | !!cmp %o1, 0x1 |
| 449 | !!bne FAIL |
| 450 | stxa %g0, [%g5]ASI_ISFSR |
| 451 | add %g0, 1, %i0 ! |
| 452 | !!wrpr %l4, %tpc |
| 453 | !!add %l4, 4, %g1 |
| 454 | !!wrpr %g1, %tnpc |
| 455 | done |
| 456 | MEM_ADDR_HANDLER: |
| 457 | nop |
| 458 | done |
| 459 | |
| 460 | HW_CORR_ERROR_HANDLER: |
| 461 | RD_DESR: |
| 462 | ldxa [%g0]0x4c, %o1 !! read the DESR |
| 463 | mov 1, %i1 |
| 464 | done |
| 465 | nop |
| 466 | |
| 467 | INVALID_ASI_HANDLER: |
| 468 | done |
| 469 | nop |
| 470 | |
| 471 | FAIL: EXIT_BAD |
| 472 | nop |
| 473 | |
| 474 | .data |
| 475 | .align 64 |
| 476 | cache_index_data: |
| 477 | .xword 0 |
| 478 | .xword 0 |
| 479 | .xword 0 |
| 480 | .xword 0 |
| 481 | .xword 0 |
| 482 | .xword 0 |
| 483 | .xword 0 |
| 484 | .xword 0 |
| 485 | .xword 0 |
| 486 | .xword 0 |
| 487 | .xword 0 |
| 488 | .xword 0 |
| 489 | .xword 0 |
| 490 | |
| 491 | |