| 1 | /* |
| 2 | * ========== Copyright Header Begin ========================================== |
| 3 | * |
| 4 | * OpenSPARC T2 Processor File: tlu_fcrand05_ind_04.s |
| 5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved |
| 6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. |
| 7 | * |
| 8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License as published by |
| 12 | * the Free Software Foundation; version 2 of the License. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 22 | * |
| 23 | * For the avoidance of doubt, and except that if any non-GPL license |
| 24 | * choice is available it will apply instead, Sun elects to use only |
| 25 | * the General Public License version 2 (GPLv2) at this time for any |
| 26 | * software where a choice of GPL license versions is made |
| 27 | * available with the language indicating that GPLv2 or any later version |
| 28 | * may be used, or where a choice of which version of the GPL is applied is |
| 29 | * otherwise unspecified. |
| 30 | * |
| 31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
| 32 | * CA 95054 USA or visit www.sun.com if you need additional information or |
| 33 | * have any questions. |
| 34 | * |
| 35 | * |
| 36 | * ========== Copyright Header End ============================================ |
| 37 | */ |
| 38 | #define IMMU_SKIP_IF_NO_TTE |
| 39 | #define DMMU_SKIP_IF_NO_TTE |
| 40 | #define MAIN_PAGE_NUCLEUS_ALSO |
| 41 | #define MAIN_PAGE_HV_ALSO |
| 42 | #define MAIN_PAGE_VA_IS_RA_ALSO |
| 43 | #define DISABLE_PART_LIMIT_CHECK |
| 44 | #define MAIN_PAGE_USE_CONFIG 3 |
| 45 | #define PART0_Z_TSB_SIZE_3 10 |
| 46 | #define PART0_Z_PAGE_SIZE_3 1 |
| 47 | #define PART0_NZ_TSB_SIZE_3 10 |
| 48 | #define PART0_NZ_PAGE_SIZE_3 1 |
| 49 | #define PART0_Z_TSB_SIZE_1 3 |
| 50 | #define PART0_NZ_TSB_SIZE_1 3 |
| 51 | |
| 52 | #define PART_0_BASE 0x0 |
| 53 | #define USER_PAGE_CUSTOM_MAP |
| 54 | #define MAIN_BASE_TEXT_VA 0x333000000 |
| 55 | #define MAIN_BASE_TEXT_RA 0x033000000 |
| 56 | #define MAIN_BASE_DATA_VA 0x379400000 |
| 57 | #define MAIN_BASE_DATA_RA 0x079400000 |
| 58 | |
| 59 | #d |
| 60 | # 474 "diag.j" |
| 61 | #define H_HT0_Instruction_Access_MMU_Error_0x71 inst_access_mmu_error_handler |
| 62 | #define H_HT0_Instruction_access_error_0x0a inst_access_error_handler |
| 63 | #define H_HT0_Internal_Processor_Error_0x29 int_proc_err_handler |
| 64 | #define H_HT0_Data_Access_MMU_Error_0x72 data_access_mmu_error_handler |
| 65 | #define H_HT0_Data_access_error_0x32 data_access_error_handler |
| 66 | #define H_HT0_Hw_Corrected_Error_0x63 hw_corrected_error_handler |
| 67 | #define H_HT0_Sw_Recoverable_Error_0x40 sw_recoverable_error_handler |
| 68 | #define H_HT0_Store_Error_0x07 store_error_handler |
| 69 | |
| 70 | #define DAE_SKIP_IF_SOCU_ERROR |
| 71 | # 5 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" |
| 72 | #ifndef T_HANDLER_RAND4_1 |
| 73 | #define T_HANDLER_RAND4_1 b .+16;\ |
| 74 | sdiv %r1, %r0, %l4;nop;nop |
| 75 | #endif |
| 76 | #ifndef T_HANDLER_RAND7_1 |
| 77 | #define T_HANDLER_RAND7_1 b .+28;\ |
| 78 | pdist %f4, %f6, %f20; \ |
| 79 | nop; nop ; nop; nop; illtrap |
| 80 | #endif |
| 81 | #ifndef T_HANDLER_RAND4_2 |
| 82 | #define T_HANDLER_RAND4_2 save %i7, %g0, %i7; \ |
| 83 | save %i7, %g0, %i7; \ |
| 84 | restore %i7, %g0, %i7;\ |
| 85 | restore %i7, %g0, %i7; |
| 86 | #endif |
| 87 | #ifndef T_HANDLER_RAND7_2 |
| 88 | #define T_HANDLER_RAND7_2 b .+8 ;\ |
| 89 | rdpr %pstate, %l2;\ |
| 90 | b .+8 ;\ |
| 91 | rdpr %tstate, %l3;\ |
| 92 | b .+12 ;\ |
| 93 | wrpr %l3, %r0, %tstate; nop |
| 94 | #endif |
| 95 | #ifndef T_HANDLER_RAND4_3 |
| 96 | #define T_HANDLER_RAND4_3 save %i7, %g0, %i7;\ |
| 97 | restore %i7, %g0, %i7;\ |
| 98 | save %i7, %g0, %i7; \ |
| 99 | restore %i7, %g0, %i7; |
| 100 | #endif |
| 101 | #ifndef T_HANDLER_RAND7_3 |
| 102 | #define T_HANDLER_RAND7_3 b .+8 ;\ |
| 103 | rdpr %tnpc, %l2;\ |
| 104 | and %l2, 0xfc0, %l2;\ |
| 105 | add %i7, %l2, %l2;\ |
| 106 | stda %f16,[%l2]ASI_BLOCK_AS_IF_USER_PRIMARY ;\ |
| 107 | b .+8 ;\ |
| 108 | stda %f0,[%l2]ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE ; |
| 109 | #endif |
| 110 | #ifndef T_HANDLER_RAND4_4 |
| 111 | #define T_HANDLER_RAND4_4 b .+4 ; b .+4; b .+4; b .+4 |
| 112 | #endif |
| 113 | #ifndef T_HANDLER_RAND7_4 |
| 114 | #define T_HANDLER_RAND7_4 b .+8;\ |
| 115 | save %i7, %g0, %i7; \ |
| 116 | b,a .+8;\ |
| 117 | b .+12;\ |
| 118 | stw %i7, [%i7];\ |
| 119 | b .-8;;\ |
| 120 | restore %i7, %g0, %i7; |
| 121 | |
| 122 | #endif |
| 123 | #ifndef T_HANDLER_RAND4_5 |
| 124 | #define T_HANDLER_RAND4_5 ldda [%r31]ASI_NUCLEUS_QUAD_LDD, %l4;\ |
| 125 | sdiv %l4, %l5, %l7;\ |
| 126 | add %r31, 128, %l5;\ |
| 127 | stda %l4, [%l5]ASI_BLOCK_PRIMARY_LITTLE; |
| 128 | #endif |
| 129 | #ifndef T_HANDLER_RAND7_5 |
| 130 | #define T_HANDLER_RAND7_5 save %i7, %g0, %i7;\ |
| 131 | rdpr %tnpc, %l2;\ |
| 132 | wrpr %l2, %tpc;\ |
| 133 | add %l2, 4, %l2;\ |
| 134 | wrpr %l2, %tnpc;\ |
| 135 | restore %i7, %g0, %i7;\ |
| 136 | retry; |
| 137 | #endif |
| 138 | #ifndef T_HANDLER_RAND4_6 |
| 139 | #define T_HANDLER_RAND4_6 ldda [%r31]ASI_BLOCK_AS_IF_USER_PRIMARY, %l2;\ |
| 140 | rd %fprs, %l2; \ |
| 141 | wr %l2, 0x4, %fprs ;\ |
| 142 | stda %f0,[%l2]ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE; |
| 143 | #endif |
| 144 | #ifndef T_HANDLER_RAND7_6 |
| 145 | #define T_HANDLER_RAND7_6 umul %o4, 2, %o5;\ |
| 146 | rdpr %tnpc, %l2;\ |
| 147 | wrpr %l2, %tpc;\ |
| 148 | add %l2, 4, %l2;\ |
| 149 | wrpr %l2, %tnpc;\ |
| 150 | stw %l2, [%i7];\ |
| 151 | retry; |
| 152 | #endif |
| 153 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! |
| 154 | #ifndef HT_HANDLER_RAND4_1 |
| 155 | #define HT_HANDLER_RAND4_1 mov 0x80, %l3;\ |
| 156 | b .+12;\ |
| 157 | stxa %l3, [%l3]0x57 ;\ |
| 158 | nop |
| 159 | #endif |
| 160 | #ifndef HT_HANDLER_RAND7_1 |
| 161 | #define HT_HANDLER_RAND7_1 b .+28;\ |
| 162 | pdist %f4, %f4, %f20;\ |
| 163 | nop; nop ; nop; nop; illtrap |
| 164 | #endif |
| 165 | #ifndef HT_HANDLER_RAND4_2 |
| 166 | #define HT_HANDLER_RAND4_2 save %i7, %g0, %i7; \ |
| 167 | save %i7, %g0, %i7; \ |
| 168 | restore %i7, %g0, %i7;\ |
| 169 | restore %i7, %g0, %i7; |
| 170 | #endif |
| 171 | #ifndef HT_HANDLER_RAND7_2 |
| 172 | #define HT_HANDLER_RAND7_2 b .+8 ;\ |
| 173 | rdhpr %hpstate, %l2;\ |
| 174 | b .+8 ;\ |
| 175 | rdhpr %htstate, %l3;\ |
| 176 | b .+12 ;\ |
| 177 | wrhpr %l3, %r0, %htstate; nop |
| 178 | #endif |
| 179 | #ifndef HT_HANDLER_RAND4_3 |
| 180 | #define HT_HANDLER_RAND4_3 stxa %l4, [%r31]ASI_AS_IF_USER_PRIMARY;\ |
| 181 | mov 0x80, %l3;\ |
| 182 | stxa %l3, [%l3]0x5f ;\ |
| 183 | b .+8 ;\ |
| 184 | ldxa [%r31]ASI_AS_IF_USER_PRIMARY, %l4; |
| 185 | #endif |
| 186 | #ifndef HT_HANDLER_RAND7_3 |
| 187 | #define HT_HANDLER_RAND7_3 b .+8 ;\ |
| 188 | rdpr %tnpc, %l2;\ |
| 189 | and %l2, 0xfc0, %l2;\ |
| 190 | add %i7, %l2, %l2;\ |
| 191 | stda %f16,[%l2]ASI_BLOCK_AS_IF_USER_PRIMARY ;\ |
| 192 | b .+8 ;\ |
| 193 | stda %f0,[%l2]ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE ; |
| 194 | #endif |
| 195 | #ifndef HT_HANDLER_RAND4_4 |
| 196 | #define HT_HANDLER_RAND4_4 ldda [%i7]ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE, %l3;\ |
| 197 | b .+12 ;\ |
| 198 | stxa %l3, [%g0]ASI_LSU_CONTROL; nop |
| 199 | #endif |
| 200 | #ifndef HT_HANDLER_RAND7_4 |
| 201 | #define HT_HANDLER_RAND7_4 rdpr %tnpc, %l3;\ |
| 202 | mov ASI_DMMU_VA_WATCHPOINT_VAL, %l4 ;\ |
| 203 | stxa %l3, [%l4]ASI_DMMU_VA_WATCHPOINT ;\ |
| 204 | mov 1, %l4;\ |
| 205 | sllx %l4, 33, %l4 ;\ |
| 206 | not %l4, %l3 ;\ |
| 207 | stxa %l3, [%g0]ASI_LSU_CONTROL; |
| 208 | #endif |
| 209 | #ifndef HT_HANDLER_RAND4_5 |
| 210 | #define HT_HANDLER_RAND4_5 ldda [%r31]ASI_NUCLEUS_QUAD_LDD, %l4;\ |
| 211 | sdiv %l4, %l5, %l6;\ |
| 212 | sdiv %l3, %l6, %l7;\ |
| 213 | stda %f32, [%r31]ASI_BLOCK_PRIMARY_LITTLE; |
| 214 | #endif |
| 215 | #ifndef HT_HANDLER_RAND7_5 |
| 216 | #define HT_HANDLER_RAND7_5 save %i7, %g0, %i7;\ |
| 217 | rdpr %tnpc, %l2;\ |
| 218 | wrpr %l2, %tpc;\ |
| 219 | add %l2, 4, %l2;\ |
| 220 | wrpr %l2, %tnpc;\ |
| 221 | restore %i7, %g0, %i7;\ |
| 222 | retry; |
| 223 | #endif |
| 224 | #ifndef HT_HANDLER_RAND4_6 |
| 225 | #define HT_HANDLER_RAND4_6 ld [%r31], %l2;\ |
| 226 | rd %fprs, %l2; \ |
| 227 | wr %l2, 0x4, %fprs ;\ |
| 228 | stda %f0,[%l2]ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE; |
| 229 | #endif |
| 230 | #ifndef HT_HANDLER_RAND7_6 |
| 231 | #define HT_HANDLER_RAND7_6 rdhpr %htstate, %o4;\ |
| 232 | rdpr %tnpc, %l2;\ |
| 233 | wrpr %l2, %tpc;\ |
| 234 | add %l2, 4, %l2;\ |
| 235 | wrpr %l2, %tnpc;\ |
| 236 | wrhpr %o4, %r0, %htstate;\ |
| 237 | retry; |
| 238 | #endif |
| 239 | |
| 240 | !!!!!!!!!!!!!!!!!!!!!!!!! |
| 241 | !! Disable trap checking |
| 242 | #define NO_TRAPCHECK |
| 243 | |
| 244 | ! Enable Traps |
| 245 | #define ENABLE_T1_Privileged_Opcode_0x11 |
| 246 | #define ENABLE_T1_Fp_Disabled_0x20 |
| 247 | #define ENABLE_HT0_Watchdog_Reset_0x02 |
| 248 | |
| 249 | #define FILL_TRAP_RETRY |
| 250 | #define SPILL_TRAP_RETRY |
| 251 | #define CLEAN_WIN_RETRY |
| 252 | |
| 253 | #define My_RED_Mode_Other_Reset |
| 254 | #define My_RED_Mode_Other_Reset \ |
| 255 | ba red_other_ext;\ |
| 256 | nop;retry;nop;nop;nop;nop;nop |
| 257 | |
| 258 | #define H_HT0_Software_Initiated_Reset_0x04 |
| 259 | #define SUN_H_HT0_Software_Initiated_Reset_0x04 \ |
| 260 | setx Software_Reset_Handler, %g1, %g2 ;\ |
| 261 | jmp %g2 ;\ |
| 262 | nop |
| 263 | # 198 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" |
| 264 | #define H_T1_Clean_Window_0x24 |
| 265 | #define SUN_H_T1_Clean_Window_0x24 \ |
| 266 | rdpr %cleanwin, %l1;\ |
| 267 | add %l1,1,%l1;\ |
| 268 | wrpr %l1, %g0, %cleanwin;\ |
| 269 | retry; nop; nop; nop; nop |
| 270 | |
| 271 | #define H_T1_Clean_Window_0x25 |
| 272 | #define SUN_H_T1_Clean_Window_0x25 \ |
| 273 | rdpr %cleanwin, %l1;\ |
| 274 | add %l1,1,%l1;\ |
| 275 | wrpr %l1, %g0, %cleanwin;\ |
| 276 | retry; nop; nop; nop; nop |
| 277 | |
| 278 | #define H_T1_Clean_Window_0x26 |
| 279 | #define SUN_H_T1_Clean_Window_0x26 \ |
| 280 | rdpr %cleanwin, %l1;\ |
| 281 | add %l1,1,%l1;\ |
| 282 | wrpr %l1, %g0, %cleanwin;\ |
| 283 | retry; nop; nop; nop; nop |
| 284 | |
| 285 | #define H_T1_Clean_Window_0x27 |
| 286 | #define SUN_H_T1_Clean_Window_0x27 \ |
| 287 | rdpr %cleanwin, %l1;\ |
| 288 | add %l1,1,%l1;\ |
| 289 | wrpr %l1, %g0, %cleanwin;\ |
| 290 | retry; nop; nop; nop; nop |
| 291 | # 227 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" |
| 292 | #define H_HT0_Tag_Overflow |
| 293 | #define My_HT0_Tag_Overflow \ |
| 294 | HT_HANDLER_RAND7_1 ;\ |
| 295 | done |
| 296 | |
| 297 | #define H_T0_Tag_Overflow |
| 298 | #define My_T0_Tag_Overflow \ |
| 299 | T_HANDLER_RAND7_2 ;\ |
| 300 | done |
| 301 | |
| 302 | #define H_T1_Tag_Overflow_0x23 |
| 303 | #define SUN_H_T1_Tag_Overflow_0x23 \ |
| 304 | T_HANDLER_RAND7_3 ;\ |
| 305 | done |
| 306 | |
| 307 | #define H_T0_Window_Spill_0_Normal_Trap |
| 308 | #define SUN_H_T0_Window_Spill_0_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 309 | |
| 310 | #define H_T0_Window_Spill_1_Normal_Trap |
| 311 | #define SUN_H_T0_Window_Spill_1_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 312 | |
| 313 | #define H_T0_Window_Spill_2_Normal_Trap |
| 314 | #define SUN_H_T0_Window_Spill_2_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 315 | |
| 316 | #define H_T0_Window_Spill_3_Normal_Trap |
| 317 | #define SUN_H_T0_Window_Spill_3_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 318 | |
| 319 | #define H_T0_Window_Spill_4_Normal_Trap |
| 320 | #define SUN_H_T0_Window_Spill_4_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 321 | |
| 322 | #define H_T0_Window_Spill_5_Normal_Trap |
| 323 | #define SUN_H_T0_Window_Spill_5_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 324 | |
| 325 | #define H_T0_Window_Spill_6_Normal_Trap |
| 326 | #define SUN_H_T0_Window_Spill_6_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 327 | |
| 328 | #define H_T0_Window_Spill_7_Normal_Trap |
| 329 | #define SUN_H_T0_Window_Spill_7_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 330 | |
| 331 | #define H_T0_Window_Spill_0_Other_Trap |
| 332 | #define SUN_H_T0_Window_Spill_0_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 333 | |
| 334 | #define H_T0_Window_Spill_1_Other_Trap |
| 335 | #define SUN_H_T0_Window_Spill_1_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 336 | |
| 337 | #define H_T0_Window_Spill_2_Other_Trap |
| 338 | #define SUN_H_T0_Window_Spill_2_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 339 | |
| 340 | #define H_T0_Window_Spill_3_Other_Trap |
| 341 | #define SUN_H_T0_Window_Spill_3_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 342 | |
| 343 | #define H_T0_Window_Spill_4_Other_Trap |
| 344 | #define SUN_H_T0_Window_Spill_4_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 345 | |
| 346 | #define H_T0_Window_Spill_5_Other_Trap |
| 347 | #define SUN_H_T0_Window_Spill_5_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 348 | |
| 349 | #define H_T0_Window_Spill_6_Other_Trap |
| 350 | #define SUN_H_T0_Window_Spill_6_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 351 | |
| 352 | #define H_T0_Window_Spill_7_Other_Trap |
| 353 | #define SUN_H_T0_Window_Spill_7_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 354 | |
| 355 | #define H_T0_Window_Fill_0_Normal_Trap |
| 356 | #define SUN_H_T0_Window_Fill_0_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 357 | |
| 358 | #define H_T0_Window_Fill_1_Normal_Trap |
| 359 | #define SUN_H_T0_Window_Fill_1_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 360 | |
| 361 | #define H_T0_Window_Fill_2_Normal_Trap |
| 362 | #define SUN_H_T0_Window_Fill_2_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 363 | |
| 364 | #define H_T0_Window_Fill_3_Normal_Trap |
| 365 | #define SUN_H_T0_Window_Fill_3_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 366 | |
| 367 | #define H_T0_Window_Fill_4_Normal_Trap |
| 368 | #define SUN_H_T0_Window_Fill_4_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 369 | |
| 370 | #define H_T0_Window_Fill_5_Normal_Trap |
| 371 | #define SUN_H_T0_Window_Fill_5_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 372 | |
| 373 | #define H_T0_Window_Fill_6_Normal_Trap |
| 374 | #define SUN_H_T0_Window_Fill_6_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 375 | |
| 376 | #define H_T0_Window_Fill_7_Normal_Trap |
| 377 | #define SUN_H_T0_Window_Fill_7_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 378 | |
| 379 | #define H_T0_Window_Fill_0_Other_Trap |
| 380 | #define SUN_H_T0_Window_Fill_0_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 381 | |
| 382 | #define H_T0_Window_Fill_1_Other_Trap |
| 383 | #define SUN_H_T0_Window_Fill_1_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 384 | |
| 385 | #define H_T0_Window_Fill_2_Other_Trap |
| 386 | #define SUN_H_T0_Window_Fill_2_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 387 | |
| 388 | #define H_T0_Window_Fill_3_Other_Trap |
| 389 | #define SUN_H_T0_Window_Fill_3_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 390 | |
| 391 | #define H_T0_Window_Fill_4_Other_Trap |
| 392 | #define SUN_H_T0_Window_Fill_4_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 393 | |
| 394 | #define H_T0_Window_Fill_5_Other_Trap |
| 395 | #define SUN_H_T0_Window_Fill_5_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 396 | |
| 397 | #define H_T0_Window_Fill_6_Other_Trap |
| 398 | #define SUN_H_T0_Window_Fill_6_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 399 | |
| 400 | #define H_T0_Window_Fill_7_Other_Trap |
| 401 | #define SUN_H_T0_Window_Fill_7_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 402 | # 339 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" |
| 403 | #define H_T1_Window_Spill_0_Normal_Trap |
| 404 | #define SUN_H_T1_Window_Spill_0_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 405 | |
| 406 | #define H_T1_Window_Spill_1_Normal_Trap |
| 407 | #define SUN_H_T1_Window_Spill_1_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 408 | |
| 409 | #define H_T1_Window_Spill_2_Normal_Trap |
| 410 | #define SUN_H_T1_Window_Spill_2_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 411 | |
| 412 | #define H_T1_Window_Spill_3_Normal_Trap |
| 413 | #define SUN_H_T1_Window_Spill_3_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 414 | |
| 415 | #define H_T1_Window_Spill_4_Normal_Trap |
| 416 | #define SUN_H_T1_Window_Spill_4_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 417 | |
| 418 | #define H_T1_Window_Spill_5_Normal_Trap |
| 419 | #define SUN_H_T1_Window_Spill_5_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 420 | |
| 421 | #define H_T1_Window_Spill_6_Normal_Trap |
| 422 | #define SUN_H_T1_Window_Spill_6_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 423 | |
| 424 | #define H_T1_Window_Spill_7_Normal_Trap |
| 425 | #define SUN_H_T1_Window_Spill_7_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 426 | |
| 427 | #define H_T1_Window_Spill_0_Other_Trap |
| 428 | #define SUN_H_T1_Window_Spill_0_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 429 | |
| 430 | #define H_T1_Window_Spill_1_Other_Trap |
| 431 | #define SUN_H_T1_Window_Spill_1_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 432 | |
| 433 | #define H_T1_Window_Spill_2_Other_Trap |
| 434 | #define SUN_H_T1_Window_Spill_2_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 435 | |
| 436 | #define H_T1_Window_Spill_3_Other_Trap |
| 437 | #define SUN_H_T1_Window_Spill_3_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 438 | |
| 439 | #define H_T1_Window_Spill_4_Other_Trap |
| 440 | #define SUN_H_T1_Window_Spill_4_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 441 | |
| 442 | #define H_T1_Window_Spill_5_Other_Trap |
| 443 | #define SUN_H_T1_Window_Spill_5_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 444 | |
| 445 | #define H_T1_Window_Spill_6_Other_Trap |
| 446 | #define SUN_H_T1_Window_Spill_6_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 447 | |
| 448 | #define H_T1_Window_Spill_7_Other_Trap |
| 449 | #define SUN_H_T1_Window_Spill_7_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 450 | |
| 451 | #define H_T1_Window_Fill_0_Normal_Trap |
| 452 | #define SUN_H_T1_Window_Fill_0_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 453 | |
| 454 | #define H_T1_Window_Fill_1_Normal_Trap |
| 455 | #define SUN_H_T1_Window_Fill_1_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 456 | |
| 457 | #define H_T1_Window_Fill_2_Normal_Trap |
| 458 | #define SUN_H_T1_Window_Fill_2_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 459 | |
| 460 | #define H_T1_Window_Fill_3_Normal_Trap |
| 461 | #define SUN_H_T1_Window_Fill_3_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 462 | |
| 463 | #define H_T1_Window_Fill_4_Normal_Trap |
| 464 | #define SUN_H_T1_Window_Fill_4_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 465 | |
| 466 | #define H_T1_Window_Fill_5_Normal_Trap |
| 467 | #define SUN_H_T1_Window_Fill_5_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 468 | |
| 469 | #define H_T1_Window_Fill_6_Normal_Trap |
| 470 | #define SUN_H_T1_Window_Fill_6_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 471 | |
| 472 | #define H_T1_Window_Fill_7_Normal_Trap |
| 473 | #define SUN_H_T1_Window_Fill_7_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 474 | |
| 475 | #define H_T1_Window_Fill_0_Other_Trap |
| 476 | #define SUN_H_T1_Window_Fill_0_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 477 | |
| 478 | #define H_T1_Window_Fill_1_Other_Trap |
| 479 | #define SUN_H_T1_Window_Fill_1_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 480 | |
| 481 | #define H_T1_Window_Fill_2_Other_Trap |
| 482 | #define SUN_H_T1_Window_Fill_2_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 483 | |
| 484 | #define H_T1_Window_Fill_3_Other_Trap |
| 485 | #define SUN_H_T1_Window_Fill_3_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 486 | |
| 487 | #define H_T1_Window_Fill_4_Other_Trap |
| 488 | #define SUN_H_T1_Window_Fill_4_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 489 | |
| 490 | #define H_T1_Window_Fill_5_Other_Trap |
| 491 | #define SUN_H_T1_Window_Fill_5_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 492 | |
| 493 | #define H_T1_Window_Fill_6_Other_Trap |
| 494 | #define SUN_H_T1_Window_Fill_6_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 495 | |
| 496 | #define H_T1_Window_Fill_7_Other_Trap |
| 497 | #define SUN_H_T1_Window_Fill_7_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 498 | |
| 499 | #define H_T0_Trap_Instruction_0 |
| 500 | #define My_T0_Trap_Instruction_0 \ |
| 501 | T_HANDLER_RAND7_5 ;\ |
| 502 | done; |
| 503 | |
| 504 | #define H_T0_Trap_Instruction_1 |
| 505 | #define My_T0_Trap_Instruction_1 \ |
| 506 | T_HANDLER_RAND7_6 ;\ |
| 507 | done; |
| 508 | |
| 509 | #define H_T0_Trap_Instruction_2 |
| 510 | #define My_T0_Trap_Instruction_2 \ |
| 511 | inc %o3;\ |
| 512 | umul %o3, 2, %o4;\ |
| 513 | ba 1f; \ |
| 514 | save %i7, %g0, %i7; \ |
| 515 | 2: done; \ |
| 516 | nop; \ |
| 517 | 1: ba 2b; \ |
| 518 | restore %i7, %g0, %i7 |
| 519 | #define H_T0_Trap_Instruction_3 |
| 520 | #define My_T0_Trap_Instruction_3 \ |
| 521 | save %i7, %g0, %i7 ;\ |
| 522 | T_HANDLER_RAND4_5;\ |
| 523 | stw %o4, [%i7];\ |
| 524 | restore %i7, %g0, %i7 ;\ |
| 525 | done |
| 526 | #define H_T0_Trap_Instruction_4 |
| 527 | #define My_T0_Trap_Instruction_4 \ |
| 528 | T_HANDLER_RAND7_6 ;\ |
| 529 | done; |
| 530 | |
| 531 | #define H_T0_Trap_Instruction_5 |
| 532 | #define My_T0_Trap_Instruction_5 \ |
| 533 | T_HANDLER_RAND4_5;\ |
| 534 | done; |
| 535 | |
| 536 | #define H_T1_Trap_Instruction_0 |
| 537 | #define My_T1_Trap_Instruction_0 \ |
| 538 | inc %o4;\ |
| 539 | umul %o4, 2, %o5;\ |
| 540 | ba 3f; \ |
| 541 | save %i7, %g0, %i7; \ |
| 542 | 4: done; \ |
| 543 | nop; \ |
| 544 | 3: ba 4b; \ |
| 545 | restore %i7, %g0, %i7 |
| 546 | #define H_T1_Trap_Instruction_1 |
| 547 | #define My_T1_Trap_Instruction_1 \ |
| 548 | T_HANDLER_RAND7_3;\ |
| 549 | done |
| 550 | #define H_T1_Trap_Instruction_2 |
| 551 | #define My_T1_Trap_Instruction_2 \ |
| 552 | inc %o3;\ |
| 553 | umul %o3, 2, %o4;\ |
| 554 | ba 5f; \ |
| 555 | save %i7, %g0, %i7; \ |
| 556 | 6: done; \ |
| 557 | nop; \ |
| 558 | 5: ba 6b; \ |
| 559 | restore %i7, %g0, %i7 |
| 560 | #define H_T1_Trap_Instruction_3 |
| 561 | #define My_T1_Trap_Instruction_3 \ |
| 562 | T_HANDLER_RAND4_1;\ |
| 563 | done; |
| 564 | |
| 565 | #define H_T1_Trap_Instruction_4 |
| 566 | #define My_T1_Trap_Instruction_4 \ |
| 567 | T_HANDLER_RAND7_1;\ |
| 568 | done; |
| 569 | #define H_T1_Trap_Instruction_5 |
| 570 | #define My_T1_Trap_Instruction_5 \ |
| 571 | T_HANDLER_RAND7_2;\ |
| 572 | done |
| 573 | #define H_HT0_Trap_Instruction_0 |
| 574 | #define My_HT0_Trap_Instruction_0 \ |
| 575 | HT_HANDLER_RAND4_1 ;\ |
| 576 | done; |
| 577 | #define H_HT0_Trap_Instruction_1 |
| 578 | #define My_HT0_Trap_Instruction_1 \ |
| 579 | HT_HANDLER_RAND4_3 ;\ |
| 580 | done |
| 581 | #define H_HT0_Trap_Instruction_2 |
| 582 | #define My_HT0_Trap_Instruction_2 \ |
| 583 | HT_HANDLER_RAND7_5 ;\ |
| 584 | done; |
| 585 | #define H_HT0_Trap_Instruction_3 |
| 586 | #define My_HT0_Trap_Instruction_3 \ |
| 587 | HT_HANDLER_RAND4_5 ;\ |
| 588 | done |
| 589 | #define H_HT0_Trap_Instruction_4 |
| 590 | #define My_HT0_Trap_Instruction_4 \ |
| 591 | HT_HANDLER_RAND7_4 ;\ |
| 592 | done |
| 593 | #define H_HT0_Trap_Instruction_5 |
| 594 | #define My_HT0_Trap_Instruction_5 \ |
| 595 | ba htrap_5_ext;\ |
| 596 | nop; retry;\ |
| 597 | nop; nop; nop; nop; nop |
| 598 | |
| 599 | #define H_HT0_Mem_Address_Not_Aligned_0x34 |
| 600 | #define My_HT0_Mem_Address_Not_Aligned_0x34 \ |
| 601 | HT_HANDLER_RAND4_4 ;\ |
| 602 | done ; |
| 603 | #define H_HT0_Illegal_instruction_0x10 |
| 604 | #define My_HT0_Illegal_instruction_0x10 \ |
| 605 | HT_HANDLER_RAND7_6 ;\ |
| 606 | done; |
| 607 | |
| 608 | #define H_HT0_DAE_so_page_0x30 |
| 609 | #define My_HT0_DAE_so_page_0x30 \ |
| 610 | HT_HANDLER_RAND4_2;\ |
| 611 | done; |
| 612 | #define H_HT0_DAE_invalid_asi_0x14 |
| 613 | #define SUN_H_HT0_DAE_invalid_asi_0x14 \ |
| 614 | HT_HANDLER_RAND4_3 ;\ |
| 615 | done |
| 616 | #define H_HT0_DAE_privilege_violation_0x15 |
| 617 | #define SUN_H_HT0_DAE_privilege_violation_0x15 \ |
| 618 | HT_HANDLER_RAND4_4 ;\ |
| 619 | done; |
| 620 | #define H_HT0_Privileged_Action_0x37 |
| 621 | #define My_HT0_Privileged_Action_0x37 \ |
| 622 | done; \ |
| 623 | nop; nop |
| 624 | #define H_HT0_Lddf_Mem_Address_Not_Aligned_0x35 |
| 625 | #define My_HT0_Lddf_Mem_Address_Not_Aligned_0x35 \ |
| 626 | HT_HANDLER_RAND7_4 ;\ |
| 627 | done |
| 628 | #define H_HT0_Stdf_Mem_Address_Not_Aligned_0x36 |
| 629 | #define My_HT0_Stdf_Mem_Address_Not_Aligned_0x36 \ |
| 630 | HT_HANDLER_RAND7_1;\ |
| 631 | done |
| 632 | #define H_HT0_Fp_exception_ieee_754_0x21 |
| 633 | #define My_HT0_Fp_exception_ieee_754_0x21 \ |
| 634 | HT_HANDLER_RAND4_2 ;\ |
| 635 | done |
| 636 | #define H_HT0_Fp_exception_other_0x22 |
| 637 | #define My_HT0_Fp_exception_other_0x22 \ |
| 638 | HT_HANDLER_RAND7_2 ;\ |
| 639 | done |
| 640 | #define H_HT0_Division_By_Zero |
| 641 | #define My_HT0_Division_By_Zero \ |
| 642 | HT_HANDLER_RAND4_6;\ |
| 643 | done |
| 644 | #define H_T0_Division_By_Zero |
| 645 | #define My_T0_Division_By_Zero \ |
| 646 | T_HANDLER_RAND4_3;\ |
| 647 | done |
| 648 | #define H_T1_Division_By_Zero_0x28 |
| 649 | #define My_H_T1_Division_By_Zero_0x28 \ |
| 650 | T_HANDLER_RAND4_3;\ |
| 651 | done |
| 652 | #define H_T0_Division_By_Zero |
| 653 | #define My_T0_Division_By_Zero\ |
| 654 | T_HANDLER_RAND4_4 ;\ |
| 655 | done |
| 656 | #define H_T0_Fp_exception_ieee_754_0x21 |
| 657 | #define My_T0_Fp_exception_ieee_754_0x21 \ |
| 658 | T_HANDLER_RAND4_3 ;\ |
| 659 | done |
| 660 | #define H_T1_Fp_Exception_Ieee_754_0x21 |
| 661 | #define My_H_T1_Fp_Exception_Ieee_754_0x21 \ |
| 662 | T_HANDLER_RAND4_4 ;\ |
| 663 | done |
| 664 | #define H_T1_Fp_Exception_Other_0x22 |
| 665 | #define My_H_T1_Fp_Exception_Other_0x22 \ |
| 666 | T_HANDLER_RAND4_5 ;\ |
| 667 | done |
| 668 | #define H_T1_Privileged_Opcode_0x11 |
| 669 | #define SUN_H_T1_Privileged_Opcode_0x11 \ |
| 670 | T_HANDLER_RAND4_6 ;\ |
| 671 | done |
| 672 | |
| 673 | #define H_HT0_Privileged_opcode_0x11 |
| 674 | #define My_HT0_Privileged_opcode_0x11 \ |
| 675 | HT_HANDLER_RAND4_1;\ |
| 676 | done; |
| 677 | |
| 678 | #define H_HT0_Fp_disabled_0x20 |
| 679 | #define My_HT0_Fp_disabled_0x20 \ |
| 680 | mov 0x4, %l2 ;\ |
| 681 | wr %l2, 0x0, %fprs ;\ |
| 682 | sllx %l2, 10, %l3; \ |
| 683 | rdpr %tstate, %l2;\ |
| 684 | or %l2, %l3, %l2 ;\ |
| 685 | stw %l2, [%i7];\ |
| 686 | wrpr %l2, 0x0, %tstate;\ |
| 687 | retry; |
| 688 | |
| 689 | #define H_T0_Fp_disabled_0x20 |
| 690 | #define My_T0_Fp_disabled_0x20 \ |
| 691 | mov 0x4, %l2 ;\ |
| 692 | wr %l2, 0x0, %fprs ;\ |
| 693 | sllx %l2, 10, %l3; \ |
| 694 | rdpr %tstate, %l2;\ |
| 695 | or %l2, %l3, %l2 ;\ |
| 696 | wrpr %l2, 0x0, %tstate;\ |
| 697 | retry; nop |
| 698 | |
| 699 | #define H_T1_Fp_Disabled_0x20 |
| 700 | #define My_H_T1_Fp_Disabled_0x20 \ |
| 701 | mov 0x4, %l2 ;\ |
| 702 | wr %l2, 0x0, %fprs ;\ |
| 703 | sllx %l2, 10, %l3; \ |
| 704 | rdpr %tstate, %l2;\ |
| 705 | or %l2, %l3, %l2 ;\ |
| 706 | wrpr %l2, 0x0, %tstate;\ |
| 707 | stw %l2, [%i7];\ |
| 708 | retry |
| 709 | |
| 710 | #define H_HT0_Watchdog_Reset_0x02 |
| 711 | #define My_HT0_Watchdog_Reset_0x02 \ |
| 712 | ba wdog_2_ext;\ |
| 713 | nop;retry;nop;nop;nop;nop;nop |
| 714 | |
| 715 | #define H_T0_Privileged_opcode_0x11 |
| 716 | #define My_T0_Privileged_opcode_0x11 \ |
| 717 | T_HANDLER_RAND4_4;\ |
| 718 | done |
| 719 | |
| 720 | #define H_T1_Fp_exception_other_0x22 |
| 721 | #define My_T1_Fp_exception_other_0x22 \ |
| 722 | T_HANDLER_RAND7_3 ;\ |
| 723 | done; |
| 724 | |
| 725 | #define H_T0_Fp_exception_other_0x22 |
| 726 | #define My_T0_Fp_exception_other_0x22 \ |
| 727 | T_HANDLER_RAND7_4;\ |
| 728 | done |
| 729 | |
| 730 | #define H_HT0_Trap_Level_Zero_0x5f |
| 731 | #define My_HT0_Trap_Level_Zero_0x5f \ |
| 732 | not %g0, %r13; \ |
| 733 | rdhpr %hpstate, %l3;\ |
| 734 | jmp %r13;\ |
| 735 | rdhpr %htstate, %l3;\ |
| 736 | and %l3, 0xfe, %l3;\ |
| 737 | wrhpr %l3, 0, %htstate;\ |
| 738 | stw %r13, [%i7];\ |
| 739 | retry |
| 740 | |
| 741 | #define My_Watchdog_Reset |
| 742 | #define My_Watchdog_Reset \ |
| 743 | ba wdog_red_ext;\ |
| 744 | nop;retry;nop;nop;nop;nop;nop |
| 745 | |
| 746 | #define H_HT0_Control_Transfer_Instr_0x74 |
| 747 | #define My_H_HT0_Control_Transfer_Instr_0x74 \ |
| 748 | rdpr %tstate, %l3;\ |
| 749 | mov 1, %l4;\ |
| 750 | sllx %l4, 20, %l4;\ |
| 751 | wrpr %l3, %l4, %tstate ;\ |
| 752 | retry;nop; |
| 753 | |
| 754 | #define H_T0_Control_Transfer_Instr_0x74 |
| 755 | #define My_H_T0_Control_Transfer_Instr_0x74 \ |
| 756 | rdpr %tstate, %l3;\ |
| 757 | mov 1, %l4;\ |
| 758 | sllx %l4, 20, %l4;\ |
| 759 | wrpr %l3, %l4, %tstate ;\ |
| 760 | retry;nop; |
| 761 | |
| 762 | #define H_T1_Control_Transfer_Instr_0x74 |
| 763 | #define My_H_T1_Control_Transfer_Instr_0x74 \ |
| 764 | rdpr %tstate, %l3;\ |
| 765 | mov 1, %l4;\ |
| 766 | sllx %l4, 20, %l4;\ |
| 767 | wrpr %l3, %l4, %tstate ;\ |
| 768 | retry;nop; |
| 769 | # 707 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" |
| 770 | #define H_HT0_data_access_protection_0x6c |
| 771 | #define SUN_H_HT0_data_access_protection_0x6c ba daccess_prot_handler; nop |
| 772 | |
| 773 | #define H_HT0_PA_Watchpoint_0x61 |
| 774 | #define My_H_HT0_PA_Watchpoint_0x61 \ |
| 775 | HT_HANDLER_RAND7_4;\ |
| 776 | done |
| 777 | |
| 778 | #define H_HT0_Data_access_error_0x32 |
| 779 | #define SUN_H_HT0_Data_access_error_0x32 \ |
| 780 | done;nop |
| 781 | |
| 782 | #define H_T0_VA_Watchpoint_0x62 |
| 783 | #define My_T0_VA_Watchpoint_0x62 \ |
| 784 | T_HANDLER_RAND7_5;\ |
| 785 | done |
| 786 | |
| 787 | #define H_T1_VA_Watchpoint_0x62 |
| 788 | #define SUN_H_T1_VA_Watchpoint_0x62 \ |
| 789 | T_HANDLER_RAND7_3;\ |
| 790 | done |
| 791 | |
| 792 | #define H_HT0_VA_Watchpoint_0x62 |
| 793 | #define My_H_HT0_VA_Watchpoint_0x62 \ |
| 794 | HT_HANDLER_RAND7_5;\ |
| 795 | done |
| 796 | |
| 797 | #define H_T0_Instruction_VA_Watchpoint_0x75 |
| 798 | #define SUN_H_T0_Instruction_VA_Watchpoint_0x75 \ |
| 799 | T_HANDLER_RAND7_4;\ |
| 800 | done; |
| 801 | |
| 802 | #define H_T1_Instruction_VA_Watchpoint_0x75 |
| 803 | #define SUN_H_T1_Instruction_VA_Watchpoint_0x75 \ |
| 804 | T_HANDLER_RAND7_5;\ |
| 805 | done; |
| 806 | |
| 807 | #define H_HT0_Instruction_VA_Watchpoint_0x75 |
| 808 | #define SUN_H_HT0_Instruction_VA_Watchpoint_0x75 \ |
| 809 | HT_HANDLER_RAND7_6;\ |
| 810 | done; |
| 811 | |
| 812 | #define H_HT0_Instruction_Breakpoint_0x76 |
| 813 | #define SUN_H_HT0_Instruction_Breakpoint_0x76 \ |
| 814 | rdhpr %htstate, %g1;\ |
| 815 | wrhpr %g1, 0x400, %htstate;\ |
| 816 | retry;nop |
| 817 | # 756 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" |
| 818 | #define H_HT0_Instruction_address_range_0x0d |
| 819 | #define SUN_H_HT0_Instruction_address_range_0x0d \ |
| 820 | HT_HANDLER_RAND4_1;\ |
| 821 | done; |
| 822 | |
| 823 | #define H_HT0_mem_real_range_0x2d |
| 824 | #define SUN_H_HT0_mem_real_range_0x2d \ |
| 825 | HT_HANDLER_RAND4_2;\ |
| 826 | done; |
| 827 | # 767 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" |
| 828 | #define H_HT0_mem_address_range_0x2e |
| 829 | #define SUN_H_HT0_mem_address_range_0x2e \ |
| 830 | HT_HANDLER_RAND4_3;\ |
| 831 | done; |
| 832 | |
| 833 | #define H_HT0_DAE_nc_page_0x16 |
| 834 | #define SUN_H_HT0_DAE_nc_page_0x16 \ |
| 835 | HT_HANDLER_RAND4_4;\ |
| 836 | done; |
| 837 | |
| 838 | #define H_HT0_DAE_nfo_page_0x17 |
| 839 | #define SUN_H_HT0_DAE_nfo_page_0x17 \ |
| 840 | HT_HANDLER_RAND4_5;\ |
| 841 | done; |
| 842 | # 783 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" |
| 843 | #define H_HT0_IAE_unauth_access_0x0b |
| 844 | #define SUN_H_HT0_IAE_unauth_access_0x0b \ |
| 845 | HT_HANDLER_RAND7_3;\ |
| 846 | done; |
| 847 | # 789 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" |
| 848 | #define H_HT0_IAE_nfo_page_0x0c |
| 849 | #define SUN_H_HT0_IAE_nfo_page_0x0c \ |
| 850 | HT_HANDLER_RAND7_6;\ |
| 851 | done; |
| 852 | # 795 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" |
| 853 | #define H_HT0_Reserved_0x3b |
| 854 | #define SUN_H_HT0_Reserved_0x3b \ |
| 855 | mov 0x80, %l3;\ |
| 856 | stxa %l3, [%l3]0x5f ;\ |
| 857 | stxa %l3, [%l3]0x57 ;\ |
| 858 | done; |
| 859 | # 805 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" |
| 860 | #define H_HT0_IAE_privilege_violation_0x08 |
| 861 | #define My_HT0_IAE_privilege_violation_0x08 \ |
| 862 | HT_HANDLER_RAND7_2;\ |
| 863 | done; |
| 864 | |
| 865 | #define H_HT0_Instruction_Access_MMU_Error_0x71 |
| 866 | #define SUN_H_HT0_Instruction_Access_MMU_Error_0x71 \ |
| 867 | mov 0x80, %l3;\ |
| 868 | stxa %l3, [%l3]0x5f ;\ |
| 869 | stxa %l3, [%l3]0x57 ;\ |
| 870 | retry; |
| 871 | |
| 872 | #define H_HT0_Data_Access_MMU_Error_0x72 |
| 873 | #define SUN_H_HT0_Data_Access_MMU_Error_0x72 \ |
| 874 | mov 0x80, %l3;\ |
| 875 | stxa %l3, [%l3]0x5f ;\ |
| 876 | stxa %l3, [%l3]0x57 ;\ |
| 877 | retry; |
| 878 | # 825 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" |
| 879 | !!!!!!!!!!!!!!!!!!!!!! END of all handlers !!!!!!!!!!!!!!!!!!! |
| 880 | # 12 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" |
| 881 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! |
| 882 | !!!!!!!!!!!!!!!! START of Interrupt Handlers !!!!!!!!!!!!!!!!! |
| 883 | |
| 884 | #ifndef INT_HANDLER_RAND4_1 |
| 885 | #define INT_HANDLER_RAND4_1 retry; nop; nop; nop |
| 886 | #endif |
| 887 | #ifndef INT_HANDLER_RAND7_1 |
| 888 | #define INT_HANDLER_RAND7_1 mov 0x20,%g1; mov 1, %g2;stxa %g2,[%g1]0x40 |
| 889 | #endif |
| 890 | #ifndef INT_HANDLER_RAND4_2 |
| 891 | #define INT_HANDLER_RAND4_2 retry; nop; nop; nop |
| 892 | #endif |
| 893 | #ifndef INT_HANDLER_RAND7_2 |
| 894 | #define INT_HANDLER_RAND7_2 mov 0x80,%g1;stxa %g0,[%g1]0x40 |
| 895 | #endif |
| 896 | #ifndef INT_HANDLER_RAND4_3 |
| 897 | #define INT_HANDLER_RAND4_3 retry; nop; nop; nop |
| 898 | #endif |
| 899 | #ifndef INT_HANDLER_RAND7_3 |
| 900 | #define INT_HANDLER_RAND7_3 retry; nop; nop; nop ; nop; nop; nop |
| 901 | #endif |
| 902 | #define H_HT0_Externally_Initiated_Reset_0x03 |
| 903 | #define SUN_H_HT0_Externally_Initiated_Reset_0x03 \ |
| 904 | ldxa [%g0] ASI_LSU_CTL_REG, %g1; \ |
| 905 | set cregs_lsu_ctl_reg_r64, %g1; \ |
| 906 | stxa %g1, [%g0] ASI_LSU_CTL_REG; \ |
| 907 | retry;nop |
| 908 | |
| 909 | #define My_External_Reset \ |
| 910 | ldxa [%g0] ASI_LSU_CTL_REG, %l5; \ |
| 911 | set cregs_lsu_ctl_reg_r64, %l5; \ |
| 912 | stxa %l5, [%g0] ASI_LSU_CTL_REG; \ |
| 913 | retry;nop |
| 914 | |
| 915 | !!!!! SPU Interrupt Handlers |
| 916 | |
| 917 | #define H_HT0_Control_Word_Queue_Interrupt_0x3c |
| 918 | #define My_HT0_Control_Word_Queue_Interrupt_0x3c \ |
| 919 | INT_HANDLER_RAND7_1 ;\ |
| 920 | retry ; |
| 921 | |
| 922 | #define H_HT0_Modular_Arithmetic_Interrupt_0x3d |
| 923 | #define My_H_HT0_Modular_Arithmetic_Interrupt_0x3d \ |
| 924 | INT_HANDLER_RAND7_2 ;\ |
| 925 | retry ; |
| 926 | # 59 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" |
| 927 | !!!!! HW interrupt handlers |
| 928 | |
| 929 | #define H_HT0_Interrupt_0x60 |
| 930 | #define My_HT0_Interrupt_0x60 \ |
| 931 | ldxa [%g0] ASI_SWVR_INTR_RECEIVE, %g5 ;\ |
| 932 | ldxa [%g0] ASI_SWVR_INTR_R, %g4 ;\ |
| 933 | ldxa [%g0] ASI_SWVR_INTR_RECEIVE, %g3 ;\ |
| 934 | INT_HANDLER_RAND4_1 ;\ |
| 935 | retry; |
| 936 | |
| 937 | !!!!! Queue interrupt handler |
| 938 | # 72 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" |
| 939 | #define H_T0_Cpu_Mondo_Trap_0x7c |
| 940 | #define My_T0_Cpu_Mondo_Trap_0x7c \ |
| 941 | mov 0x3c8, %g3; \ |
| 942 | ldxa [%g3] 0x25, %g5; \ |
| 943 | mov 0x3c0, %g3; \ |
| 944 | stxa %g5, [%g3] 0x25; \ |
| 945 | retry; \ |
| 946 | nop; \ |
| 947 | nop; \ |
| 948 | nop |
| 949 | |
| 950 | #define H_T0_Dev_Mondo_Trap_0x7d |
| 951 | #define My_T0_Dev_Mondo_Trap_0x7d \ |
| 952 | mov 0x3d8, %g3; \ |
| 953 | ldxa [%g3] 0x25, %g5; \ |
| 954 | mov 0x3d0, %g3; \ |
| 955 | stxa %g5, [%g3] 0x25; \ |
| 956 | retry; \ |
| 957 | nop; \ |
| 958 | nop; \ |
| 959 | nop |
| 960 | |
| 961 | #define H_T0_Resumable_Error_0x7e |
| 962 | #define My_T0_Resumable_Error_0x7e \ |
| 963 | mov 0x3e8, %g3; \ |
| 964 | ldxa [%g3] 0x25, %g5; \ |
| 965 | mov 0x3e0, %g3; \ |
| 966 | stxa %g5, [%g3] 0x25; \ |
| 967 | retry; \ |
| 968 | nop; \ |
| 969 | nop; \ |
| 970 | nop |
| 971 | |
| 972 | #define H_T1_Cpu_Mondo_Trap_0x7c |
| 973 | #define My_T1_Cpu_Mondo_Trap_0x7c \ |
| 974 | mov 0x3c8, %g3; \ |
| 975 | ldxa [%g3] 0x25, %g5; \ |
| 976 | mov 0x3c0, %g3; \ |
| 977 | stxa %g5, [%g3] 0x25; \ |
| 978 | retry; \ |
| 979 | nop; \ |
| 980 | nop; \ |
| 981 | nop |
| 982 | |
| 983 | #define H_T1_Dev_Mondo_Trap_0x7d |
| 984 | #define My_T1_Dev_Mondo_Trap_0x7d \ |
| 985 | mov 0x3d8, %g3; \ |
| 986 | ldxa [%g3] 0x25, %g5; \ |
| 987 | mov 0x3d0, %g3; \ |
| 988 | stxa %g5, [%g3] 0x25; \ |
| 989 | retry; \ |
| 990 | nop; \ |
| 991 | nop; \ |
| 992 | nop |
| 993 | |
| 994 | #define H_T1_Resumable_Error_0x7e |
| 995 | #define My_T1_Resumable_Error_0x7e \ |
| 996 | mov 0x3e8, %g3; \ |
| 997 | ldxa [%g3] 0x25, %g5; \ |
| 998 | mov 0x3e0, %g3; \ |
| 999 | stxa %g5, [%g3] 0x25; \ |
| 1000 | retry; \ |
| 1001 | nop; \ |
| 1002 | nop; \ |
| 1003 | nop |
| 1004 | |
| 1005 | #define H_HT0_Reserved_0x7c |
| 1006 | #define SUN_H_HT0_Reserved_0x7c \ |
| 1007 | mov 0x3c8, %g3; \ |
| 1008 | ldxa [%g3] 0x25, %g5; \ |
| 1009 | mov 0x3c0, %g3; \ |
| 1010 | stxa %g5, [%g3] 0x25; \ |
| 1011 | retry; \ |
| 1012 | nop; \ |
| 1013 | nop; \ |
| 1014 | nop |
| 1015 | |
| 1016 | #define H_HT0_Reserved_0x7d |
| 1017 | #define SUN_H_HT0_Reserved_0x7d \ |
| 1018 | mov 0x3d8, %g3; \ |
| 1019 | ldxa [%g3] 0x25, %g5; \ |
| 1020 | mov 0x3d0, %g3; \ |
| 1021 | stxa %g5, [%g3] 0x25; \ |
| 1022 | retry; \ |
| 1023 | nop; \ |
| 1024 | nop; \ |
| 1025 | nop |
| 1026 | |
| 1027 | #define H_HT0_Reserved_0x7e |
| 1028 | #define SUN_H_HT0_Reserved_0x7e \ |
| 1029 | mov 0x3e8, %g3; \ |
| 1030 | ldxa [%g3] 0x25, %g5; \ |
| 1031 | mov 0x3e0, %g3; \ |
| 1032 | stxa %g5, [%g3] 0x25; \ |
| 1033 | retry; \ |
| 1034 | nop; \ |
| 1035 | nop; \ |
| 1036 | nop |
| 1037 | # 172 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" |
| 1038 | !!!!! Hstick-match trap handler |
| 1039 | # 175 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" |
| 1040 | #define H_T0_Reserved_0x5e |
| 1041 | #define My_T0_Reserved_0x5e \ |
| 1042 | rdhpr %hintp, %g3; \ |
| 1043 | wrhpr %g3, %g3, %hintp; \ |
| 1044 | retry; \ |
| 1045 | nop; \ |
| 1046 | nop; \ |
| 1047 | nop; \ |
| 1048 | nop; \ |
| 1049 | nop |
| 1050 | |
| 1051 | #define H_HT0_Hstick_Match_0x5e |
| 1052 | #define My_HT0_Hstick_Match_0x5e \ |
| 1053 | rdhpr %hintp, %g3; \ |
| 1054 | wrhpr %g3, %g3, %hintp; \ |
| 1055 | retry; \ |
| 1056 | nop; \ |
| 1057 | nop; \ |
| 1058 | nop; \ |
| 1059 | nop; \ |
| 1060 | nop |
| 1061 | |
| 1062 | #define H_T0_Reserved_0x5e |
| 1063 | #define My_T0_Reserved_0x5e \ |
| 1064 | rdhpr %hintp, %g3; \ |
| 1065 | wrhpr %g3, %g3, %hintp; \ |
| 1066 | retry; \ |
| 1067 | nop; \ |
| 1068 | nop; \ |
| 1069 | nop; \ |
| 1070 | nop; \ |
| 1071 | nop |
| 1072 | |
| 1073 | #define H_T1_Reserved_0x5e |
| 1074 | #define My_T1_Reserved_0x5e \ |
| 1075 | rdhpr %hintp, %g3; \ |
| 1076 | wrhpr %g3, %g3, %hintp; \ |
| 1077 | retry; \ |
| 1078 | nop; \ |
| 1079 | nop; \ |
| 1080 | nop; \ |
| 1081 | nop; \ |
| 1082 | nop |
| 1083 | # 220 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" |
| 1084 | !!!!! SW interuupt handlers |
| 1085 | # 223 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" |
| 1086 | #define H_T0_Interrupt_Level_14_0x4e |
| 1087 | #define My_T0_Interrupt_Level_14_0x4e \ |
| 1088 | rd %softint, %g3; \ |
| 1089 | sethi %hi(0x14000), %g3; \ |
| 1090 | or %g3, 0x1, %g3; \ |
| 1091 | wr %g3, %g0, %clear_softint; \ |
| 1092 | retry; \ |
| 1093 | nop; \ |
| 1094 | nop; \ |
| 1095 | nop |
| 1096 | |
| 1097 | #define H_T0_Interrupt_Level_1_0x41 |
| 1098 | #define My_T0_Interrupt_Level_1_0x41 \ |
| 1099 | rd %softint, %g3; \ |
| 1100 | or %g0, 0x2, %g3; \ |
| 1101 | wr %g3, %g0, %clear_softint; \ |
| 1102 | retry; \ |
| 1103 | nop; \ |
| 1104 | nop; \ |
| 1105 | nop; \ |
| 1106 | nop |
| 1107 | |
| 1108 | #define H_T0_Interrupt_Level_2_0x42 |
| 1109 | #define My_T0_Interrupt_Level_2_0x42 \ |
| 1110 | rd %softint, %g3; \ |
| 1111 | or %g0, 0x4, %g3; \ |
| 1112 | wr %g3, %g0, %clear_softint; \ |
| 1113 | retry; \ |
| 1114 | nop; \ |
| 1115 | nop; \ |
| 1116 | nop; \ |
| 1117 | nop |
| 1118 | |
| 1119 | #define H_T0_Interrupt_Level_3_0x43 |
| 1120 | #define My_T0_Interrupt_Level_3_0x43 \ |
| 1121 | rd %softint, %g3; \ |
| 1122 | or %g0, 0x8, %g3; \ |
| 1123 | wr %g3, %g0, %clear_softint; \ |
| 1124 | retry; \ |
| 1125 | nop; \ |
| 1126 | nop; \ |
| 1127 | nop; \ |
| 1128 | nop |
| 1129 | |
| 1130 | #define H_T0_Interrupt_Level_4_0x44 |
| 1131 | #define My_T0_Interrupt_Level_4_0x44 \ |
| 1132 | rd %softint, %g3; \ |
| 1133 | or %g0, 0x10, %g3; \ |
| 1134 | wr %g3, %g0, %clear_softint; \ |
| 1135 | retry; \ |
| 1136 | nop; \ |
| 1137 | nop; \ |
| 1138 | nop; \ |
| 1139 | nop |
| 1140 | |
| 1141 | #define H_T0_Interrupt_Level_5_0x45 |
| 1142 | #define My_T0_Interrupt_Level_5_0x45 \ |
| 1143 | rd %softint, %g3; \ |
| 1144 | or %g0, 0x20, %g3; \ |
| 1145 | wr %g3, %g0, %clear_softint; \ |
| 1146 | retry; \ |
| 1147 | nop; \ |
| 1148 | nop; \ |
| 1149 | nop; \ |
| 1150 | nop |
| 1151 | |
| 1152 | #define H_T0_Interrupt_Level_6_0x46 |
| 1153 | #define My_T0_Interrupt_Level_6_0x46 \ |
| 1154 | rd %softint, %g3; \ |
| 1155 | or %g0, 0x40, %g3; \ |
| 1156 | wr %g3, %g0, %clear_softint; \ |
| 1157 | retry; \ |
| 1158 | nop; \ |
| 1159 | nop; \ |
| 1160 | nop; \ |
| 1161 | nop |
| 1162 | |
| 1163 | #define H_T0_Interrupt_Level_7_0x47 |
| 1164 | #define My_T0_Interrupt_Level_7_0x47 \ |
| 1165 | rd %softint, %g3; \ |
| 1166 | or %g0, 0x80, %g3; \ |
| 1167 | wr %g3, %g0, %clear_softint; \ |
| 1168 | retry; \ |
| 1169 | nop; \ |
| 1170 | nop; \ |
| 1171 | nop; \ |
| 1172 | nop |
| 1173 | |
| 1174 | #define H_T0_Interrupt_Level_8_0x48 |
| 1175 | #define My_T0_Interrupt_Level_8_0x48 \ |
| 1176 | rd %softint, %g3; \ |
| 1177 | or %g0, 0x100, %g3; \ |
| 1178 | wr %g3, %g0, %clear_softint; \ |
| 1179 | retry; \ |
| 1180 | nop; \ |
| 1181 | nop; \ |
| 1182 | nop; \ |
| 1183 | nop |
| 1184 | |
| 1185 | #define H_T0_Interrupt_Level_9_0x49 |
| 1186 | #define My_T0_Interrupt_Level_9_0x49 \ |
| 1187 | rd %softint, %g3; \ |
| 1188 | or %g0, 0x200, %g3; \ |
| 1189 | wr %g3, %g0, %clear_softint; \ |
| 1190 | retry; \ |
| 1191 | nop; \ |
| 1192 | nop; \ |
| 1193 | nop; \ |
| 1194 | nop |
| 1195 | |
| 1196 | #define H_T0_Interrupt_Level_10_0x4a |
| 1197 | #define My_T0_Interrupt_Level_10_0x4a \ |
| 1198 | rd %softint, %g3; \ |
| 1199 | or %g0, 0x400, %g3; \ |
| 1200 | wr %g3, %g0, %clear_softint; \ |
| 1201 | retry; \ |
| 1202 | nop; \ |
| 1203 | nop; \ |
| 1204 | nop; \ |
| 1205 | nop |
| 1206 | |
| 1207 | #define H_T0_Interrupt_Level_11_0x4b |
| 1208 | #define My_T0_Interrupt_Level_11_0x4b \ |
| 1209 | rd %softint, %g3; \ |
| 1210 | or %g0, 0x800, %g3; \ |
| 1211 | wr %g3, %g0, %clear_softint; \ |
| 1212 | retry; \ |
| 1213 | nop; \ |
| 1214 | nop; \ |
| 1215 | nop; \ |
| 1216 | nop |
| 1217 | |
| 1218 | #define H_T0_Interrupt_Level_12_0x4c |
| 1219 | #define My_T0_Interrupt_Level_12_0x4c \ |
| 1220 | rd %softint, %g3; \ |
| 1221 | sethi %hi(0x1000), %g3; \ |
| 1222 | wr %g3, %g0, %clear_softint; \ |
| 1223 | retry; \ |
| 1224 | nop; \ |
| 1225 | nop; \ |
| 1226 | nop; \ |
| 1227 | nop |
| 1228 | |
| 1229 | #define H_T0_Interrupt_Level_13_0x4d |
| 1230 | #define My_T0_Interrupt_Level_13_0x4d \ |
| 1231 | rd %softint, %g3; \ |
| 1232 | sethi %hi(0x2000), %g3; \ |
| 1233 | wr %g3, %g0, %clear_softint; \ |
| 1234 | retry; \ |
| 1235 | nop; \ |
| 1236 | nop; \ |
| 1237 | nop; \ |
| 1238 | nop |
| 1239 | |
| 1240 | #define H_T0_Interrupt_Level_15_0x4f |
| 1241 | #define My_T0_Interrupt_Level_15_0x4f \ |
| 1242 | sethi %hi(0x8000), %g3; \ |
| 1243 | wr %g3, %g0, %clear_softint; \ |
| 1244 | wr %g0, %g0, %pic;\ |
| 1245 | set 0x1ff8bfff, %g4;\ |
| 1246 | wr %g4, %g0, %pcr;\ |
| 1247 | retry; |
| 1248 | |
| 1249 | #define H_T1_Interrupt_Level_14_0x4e |
| 1250 | #define My_T1_Interrupt_Level_14_0x4e \ |
| 1251 | rd %softint, %g3; \ |
| 1252 | sethi %hi(0x14000), %g3; \ |
| 1253 | or %g3, 0x1, %g3; \ |
| 1254 | wr %g3, %g0, %clear_softint; \ |
| 1255 | retry; \ |
| 1256 | nop; \ |
| 1257 | nop; \ |
| 1258 | nop |
| 1259 | |
| 1260 | #define H_T1_Interrupt_Level_1_0x41 |
| 1261 | #define My_T1_Interrupt_Level_1_0x41 \ |
| 1262 | rd %softint, %g3; \ |
| 1263 | or %g0, 0x2, %g3; \ |
| 1264 | wr %g3, %g0, %clear_softint; \ |
| 1265 | retry; \ |
| 1266 | nop; \ |
| 1267 | nop; \ |
| 1268 | nop; \ |
| 1269 | nop |
| 1270 | |
| 1271 | #define H_T1_Interrupt_Level_2_0x42 |
| 1272 | #define My_T1_Interrupt_Level_2_0x42 \ |
| 1273 | rd %softint, %g3; \ |
| 1274 | or %g0, 0x4, %g3; \ |
| 1275 | wr %g3, %g0, %clear_softint; \ |
| 1276 | retry; \ |
| 1277 | nop; \ |
| 1278 | nop; \ |
| 1279 | nop; \ |
| 1280 | nop |
| 1281 | |
| 1282 | #define H_T1_Interrupt_Level_3_0x43 |
| 1283 | #define My_T1_Interrupt_Level_3_0x43 \ |
| 1284 | rd %softint, %g3; \ |
| 1285 | or %g0, 0x8, %g3; \ |
| 1286 | wr %g3, %g0, %clear_softint; \ |
| 1287 | retry; \ |
| 1288 | nop; \ |
| 1289 | nop; \ |
| 1290 | nop; \ |
| 1291 | nop |
| 1292 | |
| 1293 | #define H_T1_Interrupt_Level_4_0x44 |
| 1294 | #define My_T1_Interrupt_Level_4_0x44 \ |
| 1295 | rd %softint, %g3; \ |
| 1296 | or %g0, 0x10, %g3; \ |
| 1297 | wr %g3, %g0, %clear_softint; \ |
| 1298 | retry; \ |
| 1299 | nop; \ |
| 1300 | nop; \ |
| 1301 | nop; \ |
| 1302 | nop |
| 1303 | |
| 1304 | #define H_T1_Interrupt_Level_5_0x45 |
| 1305 | #define My_T1_Interrupt_Level_5_0x45 \ |
| 1306 | rd %softint, %g3; \ |
| 1307 | or %g0, 0x20, %g3; \ |
| 1308 | wr %g3, %g0, %clear_softint; \ |
| 1309 | retry; \ |
| 1310 | nop; \ |
| 1311 | nop; \ |
| 1312 | nop; \ |
| 1313 | nop |
| 1314 | |
| 1315 | #define H_T1_Interrupt_Level_6_0x46 |
| 1316 | #define My_T1_Interrupt_Level_6_0x46 \ |
| 1317 | rd %softint, %g3; \ |
| 1318 | or %g0, 0x40, %g3; \ |
| 1319 | wr %g3, %g0, %clear_softint; \ |
| 1320 | retry; \ |
| 1321 | nop; \ |
| 1322 | nop; \ |
| 1323 | nop; \ |
| 1324 | nop |
| 1325 | |
| 1326 | #define H_T1_Interrupt_Level_7_0x47 |
| 1327 | #define My_T1_Interrupt_Level_7_0x47 \ |
| 1328 | rd %softint, %g3; \ |
| 1329 | or %g0, 0x80, %g3; \ |
| 1330 | wr %g3, %g0, %clear_softint; \ |
| 1331 | retry; \ |
| 1332 | nop; \ |
| 1333 | nop; \ |
| 1334 | nop; \ |
| 1335 | nop |
| 1336 | |
| 1337 | #define H_T1_Interrupt_Level_8_0x48 |
| 1338 | #define My_T1_Interrupt_Level_8_0x48 \ |
| 1339 | rd %softint, %g3; \ |
| 1340 | or %g0, 0x100, %g3; \ |
| 1341 | wr %g3, %g0, %clear_softint; \ |
| 1342 | retry; \ |
| 1343 | nop; \ |
| 1344 | nop; \ |
| 1345 | nop; \ |
| 1346 | nop |
| 1347 | |
| 1348 | #define H_T1_Interrupt_Level_9_0x49 |
| 1349 | #define My_T1_Interrupt_Level_9_0x49 \ |
| 1350 | rd %softint, %g3; \ |
| 1351 | or %g0, 0x200, %g3; \ |
| 1352 | wr %g3, %g0, %clear_softint; \ |
| 1353 | retry; \ |
| 1354 | nop; \ |
| 1355 | nop; \ |
| 1356 | nop; \ |
| 1357 | nop |
| 1358 | |
| 1359 | #define H_T1_Interrupt_Level_10_0x4a |
| 1360 | #define My_T1_Interrupt_Level_10_0x4a \ |
| 1361 | rd %softint, %g3; \ |
| 1362 | or %g0, 0x400, %g3; \ |
| 1363 | wr %g3, %g0, %clear_softint; \ |
| 1364 | retry; \ |
| 1365 | nop; \ |
| 1366 | nop; \ |
| 1367 | nop; \ |
| 1368 | nop |
| 1369 | |
| 1370 | #define H_T1_Interrupt_Level_11_0x4b |
| 1371 | #define My_T1_Interrupt_Level_11_0x4b \ |
| 1372 | rd %softint, %g3; \ |
| 1373 | or %g0, 0x800, %g3; \ |
| 1374 | wr %g3, %g0, %clear_softint; \ |
| 1375 | retry; \ |
| 1376 | nop; \ |
| 1377 | nop; \ |
| 1378 | nop; \ |
| 1379 | nop |
| 1380 | |
| 1381 | #define H_T1_Interrupt_Level_12_0x4c |
| 1382 | #define My_T1_Interrupt_Level_12_0x4c \ |
| 1383 | rd %softint, %g3; \ |
| 1384 | sethi %hi(0x1000), %g3; \ |
| 1385 | wr %g3, %g0, %clear_softint; \ |
| 1386 | retry; \ |
| 1387 | nop; \ |
| 1388 | nop; \ |
| 1389 | nop; \ |
| 1390 | nop |
| 1391 | |
| 1392 | #define H_T1_Interrupt_Level_13_0x4d |
| 1393 | #define My_T1_Interrupt_Level_13_0x4d \ |
| 1394 | rd %softint, %g3; \ |
| 1395 | sethi %hi(0x2000), %g3; \ |
| 1396 | wr %g3, %g0, %clear_softint; \ |
| 1397 | retry; \ |
| 1398 | nop; \ |
| 1399 | nop; \ |
| 1400 | nop; \ |
| 1401 | nop |
| 1402 | |
| 1403 | #define H_T1_Interrupt_Level_15_0x4f |
| 1404 | #define My_T1_Interrupt_Level_15_0x4f \ |
| 1405 | sethi %hi(0x8000), %g3; \ |
| 1406 | wr %g3, %g0, %clear_softint; \ |
| 1407 | wr %g0, %g0, %pic;\ |
| 1408 | set 0x1ff8bfff, %g4;\ |
| 1409 | wr %g4, %g0, %pcr;\ |
| 1410 | retry; |
| 1411 | |
| 1412 | #define H_HT0_Interrupt_Level_14_0x4e |
| 1413 | #define My_HT0_Interrupt_Level_14_0x4e \ |
| 1414 | rd %softint, %g3; \ |
| 1415 | sethi %hi(0x14000), %g3; \ |
| 1416 | or %g3, 0x1, %g3; \ |
| 1417 | wr %g3, %g0, %clear_softint; \ |
| 1418 | retry; \ |
| 1419 | nop; \ |
| 1420 | nop; \ |
| 1421 | nop |
| 1422 | |
| 1423 | #define H_HT0_Interrupt_Level_1_0x41 |
| 1424 | #define My_HT0_Interrupt_Level_1_0x41 \ |
| 1425 | rd %softint, %g3; \ |
| 1426 | or %g0, 0x2, %g3; \ |
| 1427 | wr %g3, %g0, %clear_softint; \ |
| 1428 | retry; \ |
| 1429 | nop; \ |
| 1430 | nop; \ |
| 1431 | nop; \ |
| 1432 | nop |
| 1433 | |
| 1434 | #define H_HT0_Interrupt_Level_2_0x42 |
| 1435 | #define My_HT0_Interrupt_Level_2_0x42 \ |
| 1436 | rd %softint, %g3; \ |
| 1437 | or %g0, 0x4, %g3; \ |
| 1438 | wr %g3, %g0, %clear_softint; \ |
| 1439 | retry; \ |
| 1440 | nop; \ |
| 1441 | nop; \ |
| 1442 | nop; \ |
| 1443 | nop |
| 1444 | |
| 1445 | #define H_HT0_Interrupt_Level_3_0x43 |
| 1446 | #define My_HT0_Interrupt_Level_3_0x43 \ |
| 1447 | rd %softint, %g3; \ |
| 1448 | or %g0, 0x8, %g3; \ |
| 1449 | wr %g3, %g0, %clear_softint; \ |
| 1450 | retry; \ |
| 1451 | nop; \ |
| 1452 | nop; \ |
| 1453 | nop; \ |
| 1454 | nop |
| 1455 | |
| 1456 | #define H_HT0_Interrupt_Level_4_0x44 |
| 1457 | #define My_HT0_Interrupt_Level_4_0x44 \ |
| 1458 | rd %softint, %g3; \ |
| 1459 | or %g0, 0x10, %g3; \ |
| 1460 | wr %g3, %g0, %clear_softint; \ |
| 1461 | retry; \ |
| 1462 | nop; \ |
| 1463 | nop; \ |
| 1464 | nop; \ |
| 1465 | nop |
| 1466 | |
| 1467 | #define H_HT0_Interrupt_Level_5_0x45 |
| 1468 | #define My_HT0_Interrupt_Level_5_0x45 \ |
| 1469 | rd %softint, %g3; \ |
| 1470 | or %g0, 0x20, %g3; \ |
| 1471 | wr %g3, %g0, %clear_softint; \ |
| 1472 | retry; \ |
| 1473 | nop; \ |
| 1474 | nop; \ |
| 1475 | nop; \ |
| 1476 | nop |
| 1477 | |
| 1478 | #define H_HT0_Interrupt_Level_6_0x46 |
| 1479 | #define My_HT0_Interrupt_Level_6_0x46 \ |
| 1480 | rd %softint, %g3; \ |
| 1481 | or %g0, 0x40, %g3; \ |
| 1482 | wr %g3, %g0, %clear_softint; \ |
| 1483 | retry; \ |
| 1484 | nop; \ |
| 1485 | nop; \ |
| 1486 | nop; \ |
| 1487 | nop |
| 1488 | |
| 1489 | #define H_HT0_Interrupt_Level_7_0x47 |
| 1490 | #define My_HT0_Interrupt_Level_7_0x47 \ |
| 1491 | rd %softint, %g3; \ |
| 1492 | or %g0, 0x80, %g3; \ |
| 1493 | wr %g3, %g0, %clear_softint; \ |
| 1494 | retry; \ |
| 1495 | nop; \ |
| 1496 | nop; \ |
| 1497 | nop; \ |
| 1498 | nop |
| 1499 | |
| 1500 | #define H_HT0_Interrupt_Level_8_0x48 |
| 1501 | #define My_HT0_Interrupt_Level_8_0x48 \ |
| 1502 | rd %softint, %g3; \ |
| 1503 | or %g0, 0x100, %g3; \ |
| 1504 | wr %g3, %g0, %clear_softint; \ |
| 1505 | retry; \ |
| 1506 | nop; \ |
| 1507 | nop; \ |
| 1508 | nop; \ |
| 1509 | nop |
| 1510 | |
| 1511 | #define H_HT0_Interrupt_Level_9_0x49 |
| 1512 | #define My_HT0_Interrupt_Level_9_0x49 \ |
| 1513 | rd %softint, %g3; \ |
| 1514 | or %g0, 0x200, %g3; \ |
| 1515 | wr %g3, %g0, %clear_softint; \ |
| 1516 | retry; \ |
| 1517 | nop; \ |
| 1518 | nop; \ |
| 1519 | nop; \ |
| 1520 | nop |
| 1521 | |
| 1522 | #define H_HT0_Interrupt_Level_10_0x4a |
| 1523 | #define My_HT0_Interrupt_Level_10_0x4a \ |
| 1524 | rd %softint, %g3; \ |
| 1525 | or %g0, 0x400, %g3; \ |
| 1526 | wr %g3, %g0, %clear_softint; \ |
| 1527 | retry; \ |
| 1528 | nop; \ |
| 1529 | nop; \ |
| 1530 | nop; \ |
| 1531 | nop |
| 1532 | |
| 1533 | #define H_HT0_Interrupt_Level_11_0x4b |
| 1534 | #define My_HT0_Interrupt_Level_11_0x4b \ |
| 1535 | rd %softint, %g3; \ |
| 1536 | or %g0, 0x800, %g3; \ |
| 1537 | wr %g3, %g0, %clear_softint; \ |
| 1538 | retry; \ |
| 1539 | nop; \ |
| 1540 | nop; \ |
| 1541 | nop; \ |
| 1542 | nop |
| 1543 | |
| 1544 | #define H_HT0_Interrupt_Level_12_0x4c |
| 1545 | #define My_HT0_Interrupt_Level_12_0x4c \ |
| 1546 | rd %softint, %g3; \ |
| 1547 | sethi %hi(0x1000), %g3; \ |
| 1548 | wr %g3, %g0, %clear_softint; \ |
| 1549 | retry; \ |
| 1550 | nop; \ |
| 1551 | nop; \ |
| 1552 | nop; \ |
| 1553 | nop |
| 1554 | |
| 1555 | #define H_HT0_Interrupt_Level_13_0x4d |
| 1556 | #define My_HT0_Interrupt_Level_13_0x4d \ |
| 1557 | rd %softint, %g3; \ |
| 1558 | sethi %hi(0x2000), %g3; \ |
| 1559 | wr %g3, %g0, %clear_softint; \ |
| 1560 | retry; \ |
| 1561 | nop; \ |
| 1562 | nop; \ |
| 1563 | nop; \ |
| 1564 | nop |
| 1565 | |
| 1566 | #define H_HT0_Interrupt_Level_15_0x4f |
| 1567 | #define My_HT0_Interrupt_Level_15_0x4f \ |
| 1568 | sethi %hi(0x8000), %g3; \ |
| 1569 | wr %g3, %g0, %clear_softint; \ |
| 1570 | wr %g0, %g0, %pic;\ |
| 1571 | set 0x1ff8bfff, %g4;\ |
| 1572 | wr %g4, %g0, %pcr;\ |
| 1573 | retry; |
| 1574 | # 713 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" |
| 1575 | !!!!!!!!!!!!!!!!!!!!!! END of all handlers !!!!!!!!!!!!!!!!!!! |
| 1576 | # 488 "diag.j" |
| 1577 | !# Steer towards main TBA on these errors .. |
| 1578 | !# These are redefines ... |
| 1579 | #undef SUN_H_HT0_DAE_nc_page_0x16 |
| 1580 | #define SUN_H_HT0_DAE_nc_page_0x16 \ |
| 1581 | best_set_reg(0x120000, %r1, %r2);\ |
| 1582 | wrpr %r0, %r2, %tba; \ |
| 1583 | done;nop |
| 1584 | |
| 1585 | #undef SUN_H_HT0_DAE_nfo_page_0x17 |
| 1586 | #define SUN_H_HT0_DAE_nfo_page_0x17 \ |
| 1587 | best_set_reg(0x120000, %r1, %r2);\ |
| 1588 | wrpr %r0, %r2, %tba; \ |
| 1589 | done;nop |
| 1590 | |
| 1591 | #undef SUN_H_HT0_IAE_unauth_access_0x0b |
| 1592 | #define SUN_H_HT0_IAE_unauth_access_0x0b \ |
| 1593 | set resolve_bad_tte, %g3;\ |
| 1594 | jmp %g3;\ |
| 1595 | nop |
| 1596 | |
| 1597 | #undef My_HT0_IAE_privilege_violation_0x08 |
| 1598 | #define My_HT0_IAE_privilege_violation_0x08 \ |
| 1599 | set resolve_bad_tte, %g3;\ |
| 1600 | jmp %g3;\ |
| 1601 | nop |
| 1602 | |
| 1603 | #define H_HT0_Instruction_address_range_0x0d |
| 1604 | #define SUN_H_HT0_Instruction_address_range_0x0d \ |
| 1605 | rdpr %tpc, %g1;\ |
| 1606 | rdpr %tnpc, %g2;\ |
| 1607 | stw %g1, [%i7];\ |
| 1608 | stw %g2, [%i7+4];\ |
| 1609 | jmpl %r27+8, %r27;\ |
| 1610 | fdivd %f0, %f4, %f4;\ |
| 1611 | nop; |
| 1612 | |
| 1613 | #define H_HT0_Instruction_real_range_0x0e |
| 1614 | #define SUN_H_HT0_Instruction_real_range_0x0e \ |
| 1615 | rdpr %tpc, %g1;\ |
| 1616 | rdpr %tnpc, %g2;\ |
| 1617 | stw %g1, [%i7];\ |
| 1618 | stw %g2, [%i7+4];\ |
| 1619 | jmpl %r27+8, %r27;\ |
| 1620 | fdivd %f0, %f4, %f4;\ |
| 1621 | nop; |
| 1622 | |
| 1623 | #undef SUN_H_HT0_IAE_nfo_page_0x0c |
| 1624 | #define SUN_H_HT0_IAE_nfo_page_0x0c \ |
| 1625 | set resolve_bad_tte, %g3;\ |
| 1626 | jmp %g3;\ |
| 1627 | nop |
| 1628 | |
| 1629 | #define H_HT0_Instruction_Invalid_TSB_Entry_0x2a |
| 1630 | #define SUN_H_HT0_Instruction_Invalid_TSB_Entry_0x2a \ |
| 1631 | set restore_range_regs, %g3;\ |
| 1632 | jmp %g3;\ |
| 1633 | nop |
| 1634 | |
| 1635 | #define H_HT0_Data_Invalid_TSB_Entry_0x2b |
| 1636 | #define SUN_H_HT0_Data_Invalid_TSB_Entry_0x2b \ |
| 1637 | set restore_range_regs, %g3;\ |
| 1638 | jmp %g3;\ |
| 1639 | nop |
| 1640 | |
| 1641 | #undef FAST_BOOT |
| 1642 | #include "hboot.s" |
| 1643 | # 556 "diag.j" |
| 1644 | #define LOMEIN_TEXT_VA [0x]mpeval(MAIN_BASE_TEXT_VA&0xffffffff,16) |
| 1645 | #define LOMEIN_DATA_VA [0x]mpeval(MAIN_BASE_DATA_VA&0xffffffff,16) |
| 1646 | changequote([, ])dnl |
| 1647 | SECTION .LOMEIN TEXT_VA=LOMEIN_TEXT_VA, DATA_VA=LOMEIN_DATA_VA |
| 1648 | attr_text { |
| 1649 | Name = .LOMEIN, |
| 1650 | VA= LOMEIN_TEXT_VA, |
| 1651 | RA= MAIN_BASE_TEXT_RA, |
| 1652 | PA= ra2pa2(MAIN_BASE_TEXT_RA, 0), |
| 1653 | part_0_ctx_nonzero_tsb_config_1, |
| 1654 | part_0_ctx_zero_tsb_config_1, |
| 1655 | TTE_G=1, TTE_Context=0x44, TTE_V=1, |
| 1656 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, |
| 1657 | TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=1, |
| 1658 | tsbonly |
| 1659 | } |
| 1660 | attr_data { |
| 1661 | Name = .LOMEIN, |
| 1662 | VA= LOMEIN_DATA_VA, |
| 1663 | RA= MAIN_BASE_DATA_RA, |
| 1664 | PA= ra2pa2(MAIN_BASE_DATA_RA, 0), |
| 1665 | part_0_ctx_nonzero_tsb_config_2, |
| 1666 | part_0_ctx_zero_tsb_config_2 |
| 1667 | TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0, |
| 1668 | TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, |
| 1669 | TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=0, |
| 1670 | tsbonly |
| 1671 | } |
| 1672 | attr_data { |
| 1673 | Name = .LOMEIN, |
| 1674 | VA= LOMEIN_DATA_VA, |
| 1675 | RA= MAIN_BASE_DATA_RA, |
| 1676 | PA= ra2pa2(MAIN_BASE_DATA_RA, 0), |
| 1677 | part_0_ctx_nonzero_tsb_config_3, |
| 1678 | part_0_ctx_zero_tsb_config_3 |
| 1679 | TTE_G=1, TTE_Context=0x55, TTE_V=1, TTE_Size=0, TTE_NFO=0, |
| 1680 | TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, |
| 1681 | TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=0, |
| 1682 | tsbonly |
| 1683 | } |
| 1684 | .text |
| 1685 | .align 0x100000 |
| 1686 | nop |
| 1687 | .data |
| 1688 | .word 0x0 |
| 1689 | |
| 1690 | SECTION .MAIN TEXT_VA=MAIN_BASE_TEXT_VA, DATA_VA=MAIN_BASE_DATA_VA |
| 1691 | attr_text { |
| 1692 | Name = .MAIN, |
| 1693 | VA=MAIN_BASE_TEXT_VA, |
| 1694 | RA= LOMEIN_TEXT_VA, |
| 1695 | PA= LOMEIN_TEXT_VA, |
| 1696 | part_0_ctx_nonzero_tsb_config_2, |
| 1697 | part_0_ctx_zero_tsb_config_2, |
| 1698 | TTE_G=1, TTE_Context=0x44, TTE_V=1, |
| 1699 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, |
| 1700 | TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=1, |
| 1701 | } |
| 1702 | |
| 1703 | attr_data { |
| 1704 | Name = .MAIN, |
| 1705 | VA=MAIN_BASE_DATA_VA |
| 1706 | RA= LOMEIN_DATA_VA, |
| 1707 | PA= LOMEIN_DATA_VA, |
| 1708 | part_0_ctx_nonzero_tsb_config_1, |
| 1709 | part_0_ctx_zero_tsb_config_1 |
| 1710 | TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0, |
| 1711 | TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, |
| 1712 | TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=0, |
| 1713 | } |
| 1714 | |
| 1715 | attr_data { |
| 1716 | Name = .MAIN, |
| 1717 | VA=MAIN_BASE_DATA_VA |
| 1718 | RA= LOMEIN_DATA_VA, |
| 1719 | PA= LOMEIN_DATA_VA, |
| 1720 | part_0_ctx_nonzero_tsb_config_3, |
| 1721 | part_0_ctx_zero_tsb_config_3 |
| 1722 | TTE_G=1, TTE_Context=0x55, TTE_V=1, TTE_Size=0, TTE_NFO=0, |
| 1723 | TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, |
| 1724 | TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=0, |
| 1725 | tsbonly |
| 1726 | } |
| 1727 | |
| 1728 | attr_text { |
| 1729 | Name = .MAIN, |
| 1730 | VA=MAIN_BASE_TEXT_VA, |
| 1731 | hypervisor |
| 1732 | } |
| 1733 | |
| 1734 | attr_data { |
| 1735 | Name = .MAIN, |
| 1736 | VA=MAIN_BASE_DATA_VA |
| 1737 | hypervisor |
| 1738 | } |
| 1739 | changequote(`,')dnl' |
| 1740 | |
| 1741 | .text |
| 1742 | .global main |
| 1743 | main: |
| 1744 | |
| 1745 | ! Set up ld/st area per thread |
| 1746 | ta T_CHANGE_HPRIV |
| 1747 | ldxa [%g0]0x63, %o2 |
| 1748 | and %o2, 0x7, %o1 |
| 1749 | brnz %o1, init_start |
| 1750 | mov 0xff, %r10 |
| 1751 | lock_sync_thds: |
| 1752 | set sync_thr_counter4, %r23 |
| 1753 | #ifndef SPC |
| 1754 | and %o2, 0x38, %o2 |
| 1755 | add %o2,%r23,%r23 !Core's sync counter |
| 1756 | #endif |
| 1757 | st %r10, [%r23] !lock sync_thr_counter4 |
| 1758 | add %r23, 64, %r23 |
| 1759 | st %r10, [%r23] !lock sync_thr_counter5 |
| 1760 | add %r23, 64, %r23 |
| 1761 | st %r10, [%r23] !lock sync_thr_counter6 |
| 1762 | init_start: |
| 1763 | ta T_CHANGE_NONHPRIV |
| 1764 | umul %r9, 256, %r31 |
| 1765 | setx user_data_start, %r1, %r3 |
| 1766 | add %r31, %r3, %r31 |
| 1767 | wr %r0, 0x4, %asi |
| 1768 | |
| 1769 | !Initializing integer registers |
| 1770 | ldx [%r31+0], %r0 |
| 1771 | ldx [%r31+8], %r1 |
| 1772 | ldx [%r31+16], %r2 |
| 1773 | ldx [%r31+24], %r3 |
| 1774 | ldx [%r31+32], %r4 |
| 1775 | ldx [%r31+40], %r5 |
| 1776 | ldx [%r31+48], %r6 |
| 1777 | ldx [%r31+56], %r7 |
| 1778 | ldx [%r31+64], %r8 |
| 1779 | ldx [%r31+72], %r9 |
| 1780 | ldx [%r31+80], %r10 |
| 1781 | ldx [%r31+88], %r11 |
| 1782 | ldx [%r31+96], %r12 |
| 1783 | ldx [%r31+104], %r13 |
| 1784 | ldx [%r31+112], %r14 |
| 1785 | mov %r31, %r15 |
| 1786 | ldx [%r31+128], %r16 |
| 1787 | ldx [%r31+136], %r17 |
| 1788 | ldx [%r31+144], %r18 |
| 1789 | ldx [%r31+152], %r19 |
| 1790 | ldx [%r31+160], %r20 |
| 1791 | ldx [%r31+168], %r21 |
| 1792 | ldx [%r31+176], %r22 |
| 1793 | ldx [%r31+184], %r23 |
| 1794 | ldx [%r31+192], %r24 |
| 1795 | ldx [%r31+200], %r25 |
| 1796 | ldx [%r31+208], %r26 |
| 1797 | ldx [%r31+216], %r27 |
| 1798 | ldx [%r31+224], %r28 |
| 1799 | ldx [%r31+232], %r29 |
| 1800 | mov 0xb3, %r14 |
| 1801 | mov 0x32, %r30 |
| 1802 | save %r31, %r0, %r31 |
| 1803 | ldx [%r31+0], %r0 |
| 1804 | ldx [%r31+8], %r1 |
| 1805 | ldx [%r31+16], %r2 |
| 1806 | ldx [%r31+24], %r3 |
| 1807 | ldx [%r31+32], %r4 |
| 1808 | ldx [%r31+40], %r5 |
| 1809 | ldx [%r31+48], %r6 |
| 1810 | ldx [%r31+56], %r7 |
| 1811 | ldx [%r31+64], %r8 |
| 1812 | ldx [%r31+72], %r9 |
| 1813 | ldx [%r31+80], %r10 |
| 1814 | ldx [%r31+88], %r11 |
| 1815 | ldx [%r31+96], %r12 |
| 1816 | ldx [%r31+104], %r13 |
| 1817 | ldx [%r31+112], %r14 |
| 1818 | mov %r31, %r15 |
| 1819 | ldx [%r31+128], %r16 |
| 1820 | ldx [%r31+136], %r17 |
| 1821 | ldx [%r31+144], %r18 |
| 1822 | ldx [%r31+152], %r19 |
| 1823 | ldx [%r31+160], %r20 |
| 1824 | ldx [%r31+168], %r21 |
| 1825 | ldx [%r31+176], %r22 |
| 1826 | ldx [%r31+184], %r23 |
| 1827 | ldx [%r31+192], %r24 |
| 1828 | ldx [%r31+200], %r25 |
| 1829 | ldx [%r31+208], %r26 |
| 1830 | ldx [%r31+216], %r27 |
| 1831 | ldx [%r31+224], %r28 |
| 1832 | ldx [%r31+232], %r29 |
| 1833 | mov 0x31, %r14 |
| 1834 | mov 0x34, %r30 |
| 1835 | save %r31, %r0, %r31 |
| 1836 | ldx [%r31+0], %r0 |
| 1837 | ldx [%r31+8], %r1 |
| 1838 | ldx [%r31+16], %r2 |
| 1839 | ldx [%r31+24], %r3 |
| 1840 | ldx [%r31+32], %r4 |
| 1841 | ldx [%r31+40], %r5 |
| 1842 | ldx [%r31+48], %r6 |
| 1843 | ldx [%r31+56], %r7 |
| 1844 | ldx [%r31+64], %r8 |
| 1845 | ldx [%r31+72], %r9 |
| 1846 | ldx [%r31+80], %r10 |
| 1847 | ldx [%r31+88], %r11 |
| 1848 | ldx [%r31+96], %r12 |
| 1849 | ldx [%r31+104], %r13 |
| 1850 | ldx [%r31+112], %r14 |
| 1851 | mov %r31, %r15 |
| 1852 | ldx [%r31+128], %r16 |
| 1853 | ldx [%r31+136], %r17 |
| 1854 | ldx [%r31+144], %r18 |
| 1855 | ldx [%r31+152], %r19 |
| 1856 | ldx [%r31+160], %r20 |
| 1857 | ldx [%r31+168], %r21 |
| 1858 | ldx [%r31+176], %r22 |
| 1859 | ldx [%r31+184], %r23 |
| 1860 | ldx [%r31+192], %r24 |
| 1861 | ldx [%r31+200], %r25 |
| 1862 | ldx [%r31+208], %r26 |
| 1863 | ldx [%r31+216], %r27 |
| 1864 | ldx [%r31+224], %r28 |
| 1865 | ldx [%r31+232], %r29 |
| 1866 | mov 0x32, %r14 |
| 1867 | mov 0xb5, %r30 |
| 1868 | save %r31, %r0, %r31 |
| 1869 | ldx [%r31+0], %r0 |
| 1870 | ldx [%r31+8], %r1 |
| 1871 | ldx [%r31+16], %r2 |
| 1872 | ldx [%r31+24], %r3 |
| 1873 | ldx [%r31+32], %r4 |
| 1874 | ldx [%r31+40], %r5 |
| 1875 | ldx [%r31+48], %r6 |
| 1876 | ldx [%r31+56], %r7 |
| 1877 | ldx [%r31+64], %r8 |
| 1878 | ldx [%r31+72], %r9 |
| 1879 | ldx [%r31+80], %r10 |
| 1880 | ldx [%r31+88], %r11 |
| 1881 | ldx [%r31+96], %r12 |
| 1882 | ldx [%r31+104], %r13 |
| 1883 | ldx [%r31+112], %r14 |
| 1884 | mov %r31, %r15 |
| 1885 | ldx [%r31+128], %r16 |
| 1886 | ldx [%r31+136], %r17 |
| 1887 | ldx [%r31+144], %r18 |
| 1888 | ldx [%r31+152], %r19 |
| 1889 | ldx [%r31+160], %r20 |
| 1890 | ldx [%r31+168], %r21 |
| 1891 | ldx [%r31+176], %r22 |
| 1892 | ldx [%r31+184], %r23 |
| 1893 | ldx [%r31+192], %r24 |
| 1894 | ldx [%r31+200], %r25 |
| 1895 | ldx [%r31+208], %r26 |
| 1896 | ldx [%r31+216], %r27 |
| 1897 | ldx [%r31+224], %r28 |
| 1898 | ldx [%r31+232], %r29 |
| 1899 | mov 0xb3, %r14 |
| 1900 | mov 0x33, %r30 |
| 1901 | save %r31, %r0, %r31 |
| 1902 | ldx [%r31+0], %r0 |
| 1903 | ldx [%r31+8], %r1 |
| 1904 | ldx [%r31+16], %r2 |
| 1905 | ldx [%r31+24], %r3 |
| 1906 | ldx [%r31+32], %r4 |
| 1907 | ldx [%r31+40], %r5 |
| 1908 | ldx [%r31+48], %r6 |
| 1909 | ldx [%r31+56], %r7 |
| 1910 | ldx [%r31+64], %r8 |
| 1911 | ldx [%r31+72], %r9 |
| 1912 | ldx [%r31+80], %r10 |
| 1913 | ldx [%r31+88], %r11 |
| 1914 | ldx [%r31+96], %r12 |
| 1915 | ldx [%r31+104], %r13 |
| 1916 | ldx [%r31+112], %r14 |
| 1917 | mov %r31, %r15 |
| 1918 | ldx [%r31+128], %r16 |
| 1919 | ldx [%r31+136], %r17 |
| 1920 | ldx [%r31+144], %r18 |
| 1921 | ldx [%r31+152], %r19 |
| 1922 | ldx [%r31+160], %r20 |
| 1923 | ldx [%r31+168], %r21 |
| 1924 | ldx [%r31+176], %r22 |
| 1925 | ldx [%r31+184], %r23 |
| 1926 | ldx [%r31+192], %r24 |
| 1927 | ldx [%r31+200], %r25 |
| 1928 | ldx [%r31+208], %r26 |
| 1929 | ldx [%r31+216], %r27 |
| 1930 | ldx [%r31+224], %r28 |
| 1931 | ldx [%r31+232], %r29 |
| 1932 | mov 0xb1, %r14 |
| 1933 | mov 0x33, %r30 |
| 1934 | save %r31, %r0, %r31 |
| 1935 | ldx [%r31+0], %r0 |
| 1936 | ldx [%r31+8], %r1 |
| 1937 | ldx [%r31+16], %r2 |
| 1938 | ldx [%r31+24], %r3 |
| 1939 | ldx [%r31+32], %r4 |
| 1940 | ldx [%r31+40], %r5 |
| 1941 | ldx [%r31+48], %r6 |
| 1942 | ldx [%r31+56], %r7 |
| 1943 | ldx [%r31+64], %r8 |
| 1944 | ldx [%r31+72], %r9 |
| 1945 | ldx [%r31+80], %r10 |
| 1946 | ldx [%r31+88], %r11 |
| 1947 | ldx [%r31+96], %r12 |
| 1948 | ldx [%r31+104], %r13 |
| 1949 | ldx [%r31+112], %r14 |
| 1950 | mov %r31, %r15 |
| 1951 | ldx [%r31+128], %r16 |
| 1952 | ldx [%r31+136], %r17 |
| 1953 | ldx [%r31+144], %r18 |
| 1954 | ldx [%r31+152], %r19 |
| 1955 | ldx [%r31+160], %r20 |
| 1956 | ldx [%r31+168], %r21 |
| 1957 | ldx [%r31+176], %r22 |
| 1958 | ldx [%r31+184], %r23 |
| 1959 | ldx [%r31+192], %r24 |
| 1960 | ldx [%r31+200], %r25 |
| 1961 | ldx [%r31+208], %r26 |
| 1962 | ldx [%r31+216], %r27 |
| 1963 | ldx [%r31+224], %r28 |
| 1964 | ldx [%r31+232], %r29 |
| 1965 | mov 0x33, %r14 |
| 1966 | mov 0xb1, %r30 |
| 1967 | save %r31, %r0, %r31 |
| 1968 | ldx [%r31+0], %r0 |
| 1969 | ldx [%r31+8], %r1 |
| 1970 | ldx [%r31+16], %r2 |
| 1971 | ldx [%r31+24], %r3 |
| 1972 | ldx [%r31+32], %r4 |
| 1973 | ldx [%r31+40], %r5 |
| 1974 | ldx [%r31+48], %r6 |
| 1975 | ldx [%r31+56], %r7 |
| 1976 | ldx [%r31+64], %r8 |
| 1977 | ldx [%r31+72], %r9 |
| 1978 | ldx [%r31+80], %r10 |
| 1979 | ldx [%r31+88], %r11 |
| 1980 | ldx [%r31+96], %r12 |
| 1981 | ldx [%r31+104], %r13 |
| 1982 | ldx [%r31+112], %r14 |
| 1983 | mov %r31, %r15 |
| 1984 | ldx [%r31+128], %r16 |
| 1985 | ldx [%r31+136], %r17 |
| 1986 | ldx [%r31+144], %r18 |
| 1987 | ldx [%r31+152], %r19 |
| 1988 | ldx [%r31+160], %r20 |
| 1989 | ldx [%r31+168], %r21 |
| 1990 | ldx [%r31+176], %r22 |
| 1991 | ldx [%r31+184], %r23 |
| 1992 | ldx [%r31+192], %r24 |
| 1993 | ldx [%r31+200], %r25 |
| 1994 | ldx [%r31+208], %r26 |
| 1995 | ldx [%r31+216], %r27 |
| 1996 | ldx [%r31+224], %r28 |
| 1997 | ldx [%r31+232], %r29 |
| 1998 | mov 0x35, %r14 |
| 1999 | mov 0x31, %r30 |
| 2000 | save %r31, %r0, %r31 |
| 2001 | restore |
| 2002 | restore |
| 2003 | restore |
| 2004 | !Initializing float registers |
| 2005 | ldd [%r31+0], %f0 |
| 2006 | ldd [%r31+16], %f2 |
| 2007 | ldd [%r31+32], %f4 |
| 2008 | ldd [%r31+48], %f6 |
| 2009 | ldd [%r31+64], %f8 |
| 2010 | ldd [%r31+80], %f10 |
| 2011 | ldd [%r31+96], %f12 |
| 2012 | ldd [%r31+112], %f14 |
| 2013 | ldd [%r31+128], %f16 |
| 2014 | ldd [%r31+144], %f18 |
| 2015 | ldd [%r31+160], %f20 |
| 2016 | ldd [%r31+176], %f22 |
| 2017 | ldd [%r31+192], %f24 |
| 2018 | ldd [%r31+208], %f26 |
| 2019 | ldd [%r31+224], %f28 |
| 2020 | ldd [%r31+240], %f30 |
| 2021 | !! Set TPC/TNPC to diag-finish in case we get to a strange TL .. |
| 2022 | ta T_CHANGE_HPRIV |
| 2023 | setx diag_finish, %r29, %r28 |
| 2024 | add %r28, 4, %r29 |
| 2025 | wrpr %g0, 1, %tl |
| 2026 | wrpr %r28, %tpc |
| 2027 | wrpr %r29, %tnpc |
| 2028 | wrpr %g0, 2, %tl |
| 2029 | wrpr %r28, %tpc |
| 2030 | wrpr %r29, %tnpc |
| 2031 | wrpr %g0, 3, %tl |
| 2032 | wrpr %r28, %tpc |
| 2033 | wrpr %r29, %tnpc |
| 2034 | wrpr %g0, 4, %tl |
| 2035 | wrpr %r28, %tpc |
| 2036 | wrpr %r29, %tnpc |
| 2037 | wrpr %g0, 5, %tl |
| 2038 | wrpr %r28, %tpc |
| 2039 | wrpr %r29, %tnpc |
| 2040 | wrpr %g0, 6, %tl |
| 2041 | wrpr %r28, %tpc |
| 2042 | wrpr %r29, %tnpc |
| 2043 | wrpr %g0, 0, %tl |
| 2044 | |
| 2045 | !Initializing Tick Cmprs |
| 2046 | mov 1, %g2 |
| 2047 | sllx %g2, 63, %g2 |
| 2048 | or %g1, %g2, %g1 |
| 2049 | wrhpr %g1, %g0, %hsys_tick_cmpr |
| 2050 | wr %g1, %g0, %tick_cmpr |
| 2051 | wr %g1, %g0, %sys_tick_cmpr |
| 2052 | |
| 2053 | ! Set up fpr PMU traps |
| 2054 | set 0x1ff8bfff, %g2 |
| 2055 | b fork_threads |
| 2056 | wr %g2, %g0, %pcr |
| 2057 | |
| 2058 | common_target: |
| 2059 | nop |
| 2060 | sub %r27, 8, %r27 |
| 2061 | and %r27, 8, %r12 |
| 2062 | brz,a %r12, .+8 |
| 2063 | lduw [%r27], %r12 ! load jmp dest into dcache - xinval |
| 2064 | jmp %r27 |
| 2065 | .word 0xc32fc000 ! 1: STXFSR_R st-sfr %f1, [%r0, %r31] |
| 2066 | nop |
| 2067 | jmp %r27 |
| 2068 | nop |
| 2069 | fork_threads: |
| 2070 | ta %icc, T_RD_THID |
| 2071 | ! fork: source strm = 0xffffffff; target strm = 0x1 |
| 2072 | cmp %o1, 0 |
| 2073 | setx fork_lbl_0_1, %g2, %g3 |
| 2074 | be,a .+8 |
| 2075 | jmp %g3 |
| 2076 | nop |
| 2077 | ! fork: source strm = 0xffffffff; target strm = 0x2 |
| 2078 | cmp %o1, 1 |
| 2079 | setx fork_lbl_0_2, %g2, %g3 |
| 2080 | be,a .+8 |
| 2081 | jmp %g3 |
| 2082 | nop |
| 2083 | ! fork: source strm = 0xffffffff; target strm = 0x4 |
| 2084 | cmp %o1, 2 |
| 2085 | setx fork_lbl_0_3, %g2, %g3 |
| 2086 | be,a .+8 |
| 2087 | jmp %g3 |
| 2088 | nop |
| 2089 | ! fork: source strm = 0xffffffff; target strm = 0x8 |
| 2090 | cmp %o1, 3 |
| 2091 | setx fork_lbl_0_4, %g2, %g3 |
| 2092 | be,a .+8 |
| 2093 | jmp %g3 |
| 2094 | nop |
| 2095 | ! fork: source strm = 0xffffffff; target strm = 0x10 |
| 2096 | cmp %o1, 4 |
| 2097 | setx fork_lbl_0_5, %g2, %g3 |
| 2098 | be,a .+8 |
| 2099 | jmp %g3 |
| 2100 | nop |
| 2101 | ! fork: source strm = 0xffffffff; target strm = 0x20 |
| 2102 | cmp %o1, 5 |
| 2103 | setx fork_lbl_0_6, %g2, %g3 |
| 2104 | be,a .+8 |
| 2105 | jmp %g3 |
| 2106 | nop |
| 2107 | ! fork: source strm = 0xffffffff; target strm = 0x40 |
| 2108 | cmp %o1, 6 |
| 2109 | setx fork_lbl_0_7, %g2, %g3 |
| 2110 | be,a .+8 |
| 2111 | jmp %g3 |
| 2112 | nop |
| 2113 | ! fork: source strm = 0xffffffff; target strm = 0x80 |
| 2114 | cmp %o1, 7 |
| 2115 | setx fork_lbl_0_8, %g2, %g3 |
| 2116 | be,a .+8 |
| 2117 | jmp %g3 |
| 2118 | nop |
| 2119 | setx join_lbl_0_0, %g1, %g2 |
| 2120 | jmp %g2 |
| 2121 | nop |
| 2122 | setx join_lbl_0_0, %g1, %g2 |
| 2123 | jmp %g2 |
| 2124 | nop |
| 2125 | fork_lbl_0_8: |
| 2126 | ta T_CHANGE_NONHPRIV |
| 2127 | mondo_80_0: |
| 2128 | nop |
| 2129 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 2130 | ta T_CHANGE_PRIV |
| 2131 | stxa %r6, [%r0+0x3d8] %asi |
| 2132 | .word 0x9d92c00d ! 1: WRPR_WSTATE_R wrpr %r11, %r13, %wstate |
| 2133 | trapasi_80_1: |
| 2134 | nop |
| 2135 | mov 0x3d0, %r1 ! (VA for ASI 0x25) |
| 2136 | .word 0xd0d844a0 ! 2: LDXA_R ldxa [%r1, %r0] 0x25, %r8 |
| 2137 | splash_cmpr_80_2: |
| 2138 | mov 1, %r18 |
| 2139 | sllx %r18, 63, %r18 |
| 2140 | rd %tick, %r17 |
| 2141 | add %r17, 0x50, %r17 |
| 2142 | or %r17, %r18, %r17 |
| 2143 | ta T_CHANGE_HPRIV |
| 2144 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 2145 | .word 0xaf800011 ! 3: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 2146 | change_to_randtl_80_3: |
| 2147 | ta T_CHANGE_HPRIV ! macro |
| 2148 | done_change_to_randtl_80_3: |
| 2149 | .word 0x8f902000 ! 4: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 2150 | .word 0xd077c000 ! 5: STX_R stx %r8, [%r31 + %r0] |
| 2151 | splash_cmpr_80_4: |
| 2152 | mov 0, %r18 |
| 2153 | sllx %r18, 63, %r18 |
| 2154 | rd %tick, %r17 |
| 2155 | add %r17, 0x60, %r17 |
| 2156 | or %r17, %r18, %r17 |
| 2157 | ta T_CHANGE_PRIV |
| 2158 | .word 0xaf800011 ! 6: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 2159 | .word 0xa7850014 ! 7: WR_GRAPHICS_STATUS_REG_R wr %r20, %r20, %- |
| 2160 | .word 0xd07fe0b0 ! 8: SWAP_I swap %r8, [%r31 + 0x00b0] |
| 2161 | .word 0x91904010 ! 9: WRPR_PIL_R wrpr %r1, %r16, %pil |
| 2162 | brcommon3_80_7: |
| 2163 | nop |
| 2164 | setx common_target, %r12, %r27 |
| 2165 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 2166 | ba,a .+12 |
| 2167 | .word 0xd1e7c032 ! 1: CASA_I casa [%r31] 0x 1, %r18, %r8 |
| 2168 | ba,a .+8 |
| 2169 | jmpl %r27+0, %r27 |
| 2170 | .word 0xd03fe000 ! 10: STD_I std %r8, [%r31 + 0x0000] |
| 2171 | nop |
| 2172 | ta T_CHANGE_HPRIV ! macro |
| 2173 | donret_80_8: |
| 2174 | rd %pc, %r12 |
| 2175 | add %r12, (donretarg_80_8-donret_80_8), %r12 |
| 2176 | add %r12, 0x4, %r11 ! seq tnpc |
| 2177 | wrpr %g0, 0x1, %tl |
| 2178 | wrpr %g0, %r12, %tpc |
| 2179 | wrpr %g0, %r11, %tnpc |
| 2180 | set (0x0092ca00 | (0x55 << 24)), %r13 |
| 2181 | and %r12, 0xfff, %r14 |
| 2182 | sllx %r14, 30, %r14 |
| 2183 | or %r13, %r14, %r20 |
| 2184 | wrpr %r20, %g0, %tstate |
| 2185 | wrhpr %g0, 0x1417, %htstate |
| 2186 | ta T_CHANGE_NONPRIV ! rand=0 (80) |
| 2187 | .word 0x23400001 ! 1: FBPNE fbne,a,pn %fcc0, <label_0x1> |
| 2188 | retry |
| 2189 | donretarg_80_8: |
| 2190 | .word 0xd06fe014 ! 11: LDSTUB_I ldstub %r8, [%r31 + 0x0014] |
| 2191 | .word 0xab81c012 ! 12: WR_CLEAR_SOFTINT_R wr %r7, %r18, %clear_softint |
| 2192 | dvapa_80_9: |
| 2193 | nop |
| 2194 | ta T_CHANGE_HPRIV |
| 2195 | mov 0xca6, %r20 |
| 2196 | mov 0x1b, %r19 |
| 2197 | sllx %r20, 23, %r20 |
| 2198 | or %r19, %r20, %r19 |
| 2199 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 2200 | mov 0x38, %r18 |
| 2201 | stxa %r31, [%r18]0x58 |
| 2202 | ta T_CHANGE_NONHPRIV |
| 2203 | .word 0xd13fc010 ! 13: STDF_R std %f8, [%r16, %r31] |
| 2204 | .word 0xa569c012 ! 14: SDIVX_R sdivx %r7, %r18, %r18 |
| 2205 | nop |
| 2206 | ta T_CHANGE_HPRIV |
| 2207 | mov 0x80+1, %r10 |
| 2208 | set sync_thr_counter5, %r23 |
| 2209 | #ifndef SPC |
| 2210 | ldxa [%g0]0x63, %o1 |
| 2211 | and %o1, 0x38, %o1 |
| 2212 | add %o1, %r23, %r23 |
| 2213 | sllx %o1, 5, %o3 !(CID*256) |
| 2214 | #endif |
| 2215 | cas [%r23],%g0,%r10 !lock |
| 2216 | brnz %r10, cwq_80_10 |
| 2217 | rd %asi, %r12 |
| 2218 | wr %g0, 0x40, %asi |
| 2219 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 2220 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 2221 | cmp %l1, 1 |
| 2222 | bne cwq_80_10 |
| 2223 | set CWQ_BASE, %l6 |
| 2224 | #ifndef SPC |
| 2225 | add %l6, %o3, %l6 |
| 2226 | #endif |
| 2227 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 2228 | best_set_reg(0x20610070, %l1, %l2) !# Control Word |
| 2229 | sllx %l2, 32, %l2 |
| 2230 | stx %l2, [%l6 + 0x0] |
| 2231 | membar #Sync |
| 2232 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 2233 | sub %l2, 0x40, %l2 |
| 2234 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 2235 | wr %r12, %g0, %asi |
| 2236 | st %g0, [%r23] |
| 2237 | cwq_80_10: |
| 2238 | ta T_CHANGE_NONHPRIV |
| 2239 | .word 0xa5414000 ! 15: RDPC rd %pc, %r18 |
| 2240 | .word 0xe4800b00 ! 16: LDUWA_R lduwa [%r0, %r0] 0x58, %r18 |
| 2241 | nop |
| 2242 | ta T_CHANGE_HPRIV |
| 2243 | mov 0x80, %r10 |
| 2244 | set sync_thr_counter6, %r23 |
| 2245 | #ifndef SPC |
| 2246 | ldxa [%g0]0x63, %o1 |
| 2247 | and %o1, 0x38, %o1 |
| 2248 | add %o1, %r23, %r23 |
| 2249 | #endif |
| 2250 | cas [%r23],%g0,%r10 !lock |
| 2251 | brnz %r10, sma_80_11 |
| 2252 | rd %asi, %r12 |
| 2253 | wr %g0, 0x40, %asi |
| 2254 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 2255 | set 0x00061fff, %g1 |
| 2256 | stxa %g1, [%g0 + 0x80] %asi |
| 2257 | wr %r12, %g0, %asi |
| 2258 | st %g0, [%r23] |
| 2259 | sma_80_11: |
| 2260 | ta T_CHANGE_NONHPRIV |
| 2261 | .word 0xe5e7e00a ! 17: CASA_R casa [%r31] %asi, %r10, %r18 |
| 2262 | brcommon1_80_12: |
| 2263 | nop |
| 2264 | setx common_target, %r12, %r27 |
| 2265 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 2266 | ba,a .+12 |
| 2267 | .word 0xc32fe130 ! 1: STXFSR_I st-sfr %f1, [0x0130, %r31] |
| 2268 | ba,a .+8 |
| 2269 | jmpl %r27+0, %r27 |
| 2270 | .word 0x9f80331e ! 18: SIR sir 0x131e |
| 2271 | .word 0x8d903e59 ! 19: WRPR_PSTATE_I wrpr %r0, 0x1e59, %pstate |
| 2272 | #if (defined SPC || defined CMP1) |
| 2273 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_14) + 48, 16, 16)) -> intp(3,0,20) |
| 2274 | #else |
| 2275 | setx 0x2688d882048f6a47, %r1, %r28 |
| 2276 | stxa %r28, [%g0] 0x73 |
| 2277 | #endif |
| 2278 | intvec_80_14: |
| 2279 | .word 0x39400001 ! 20: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 2280 | splash_tba_80_15: |
| 2281 | nop |
| 2282 | ta T_CHANGE_PRIV |
| 2283 | setx 0x00000000003a0000, %r11, %r12 |
| 2284 | .word 0x8b90000c ! 21: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 2285 | .word 0xa7848010 ! 22: WR_GRAPHICS_STATUS_REG_R wr %r18, %r16, %- |
| 2286 | intveclr_80_17: |
| 2287 | nop |
| 2288 | ta T_CHANGE_HPRIV |
| 2289 | setx 0x61580084731c4428, %r1, %r28 |
| 2290 | stxa %r28, [%g0] 0x72 |
| 2291 | ta T_CHANGE_NONHPRIV |
| 2292 | .word 0x25400001 ! 23: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 2293 | trapasi_80_18: |
| 2294 | nop |
| 2295 | mov 0x0, %r1 ! (VA for ASI 0x4c) |
| 2296 | .word 0xd4884980 ! 24: LDUBA_R lduba [%r1, %r0] 0x4c, %r10 |
| 2297 | nop |
| 2298 | mov 0x80, %g3 |
| 2299 | stxa %g3, [%g3] 0x57 |
| 2300 | .word 0xd45fc000 ! 25: LDX_R ldx [%r31 + %r0], %r10 |
| 2301 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 2302 | reduce_priv_lvl_80_19: |
| 2303 | ta T_CHANGE_NONPRIV ! macro |
| 2304 | intveclr_80_20: |
| 2305 | nop |
| 2306 | ta T_CHANGE_HPRIV |
| 2307 | setx 0xa33aab48b39152ad, %r1, %r28 |
| 2308 | stxa %r28, [%g0] 0x72 |
| 2309 | .word 0x25400001 ! 27: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 2310 | intveclr_80_21: |
| 2311 | nop |
| 2312 | ta T_CHANGE_HPRIV |
| 2313 | setx 0xbea28413cd48f76c, %r1, %r28 |
| 2314 | stxa %r28, [%g0] 0x72 |
| 2315 | ta T_CHANGE_NONHPRIV |
| 2316 | .word 0x25400001 ! 28: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 2317 | nop |
| 2318 | mov 0x80, %g3 |
| 2319 | stxa %g3, [%g3] 0x57 |
| 2320 | .word 0xd45fc000 ! 29: LDX_R ldx [%r31 + %r0], %r10 |
| 2321 | brcommon3_80_22: |
| 2322 | nop |
| 2323 | setx common_target, %r12, %r27 |
| 2324 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 2325 | ba,a .+12 |
| 2326 | .word 0xd46fe150 ! 1: LDSTUB_I ldstub %r10, [%r31 + 0x0150] |
| 2327 | ba,a .+8 |
| 2328 | jmpl %r27+0, %r27 |
| 2329 | .word 0xd53fc013 ! 30: STDF_R std %f10, [%r19, %r31] |
| 2330 | nop |
| 2331 | ta T_CHANGE_HPRIV |
| 2332 | mov 0x80+1, %r10 |
| 2333 | set sync_thr_counter5, %r23 |
| 2334 | #ifndef SPC |
| 2335 | ldxa [%g0]0x63, %o1 |
| 2336 | and %o1, 0x38, %o1 |
| 2337 | add %o1, %r23, %r23 |
| 2338 | sllx %o1, 5, %o3 !(CID*256) |
| 2339 | #endif |
| 2340 | cas [%r23],%g0,%r10 !lock |
| 2341 | brnz %r10, cwq_80_23 |
| 2342 | rd %asi, %r12 |
| 2343 | wr %g0, 0x40, %asi |
| 2344 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 2345 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 2346 | cmp %l1, 1 |
| 2347 | bne cwq_80_23 |
| 2348 | set CWQ_BASE, %l6 |
| 2349 | #ifndef SPC |
| 2350 | add %l6, %o3, %l6 |
| 2351 | #endif |
| 2352 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 2353 | best_set_reg(0x20610090, %l1, %l2) !# Control Word |
| 2354 | sllx %l2, 32, %l2 |
| 2355 | stx %l2, [%l6 + 0x0] |
| 2356 | membar #Sync |
| 2357 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 2358 | sub %l2, 0x40, %l2 |
| 2359 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 2360 | wr %r12, %g0, %asi |
| 2361 | st %g0, [%r23] |
| 2362 | cwq_80_23: |
| 2363 | ta T_CHANGE_NONHPRIV |
| 2364 | .word 0xa7414000 ! 31: RDPC rd %pc, %r19 |
| 2365 | .word 0x879c31ac ! 32: WRHPR_HINTP_I wrhpr %r16, 0x11ac, %hintp |
| 2366 | .word 0xd497e078 ! 33: LDUHA_I lduha [%r31, + 0x0078] %asi, %r10 |
| 2367 | .word 0xd43fe090 ! 34: STD_I std %r10, [%r31 + 0x0090] |
| 2368 | splash_lsu_80_25: |
| 2369 | nop |
| 2370 | ta T_CHANGE_HPRIV |
| 2371 | set 0xddd72f15, %r2 |
| 2372 | mov 0x2, %r1 |
| 2373 | sllx %r1, 32, %r1 |
| 2374 | or %r1, %r2, %r2 |
| 2375 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 2376 | ta T_CHANGE_NONHPRIV |
| 2377 | .word 0x3d400001 ! 35: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 2378 | .word 0xa7804005 ! 36: WR_GRAPHICS_STATUS_REG_R wr %r1, %r5, %- |
| 2379 | nop |
| 2380 | ta T_CHANGE_HPRIV ! macro |
| 2381 | donret_80_27: |
| 2382 | rd %pc, %r12 |
| 2383 | add %r12, (donretarg_80_27-donret_80_27), %r12 |
| 2384 | add %r12, 0x4, %r11 ! seq tnpc |
| 2385 | wrpr %g0, 0x2, %tl |
| 2386 | wrpr %g0, %r12, %tpc |
| 2387 | wrpr %g0, %r11, %tnpc |
| 2388 | set (0x001f2c00 | (0x55 << 24)), %r13 |
| 2389 | and %r12, 0xfff, %r14 |
| 2390 | sllx %r14, 30, %r14 |
| 2391 | or %r13, %r14, %r20 |
| 2392 | wrpr %r20, %g0, %tstate |
| 2393 | wrhpr %g0, 0x151d, %htstate |
| 2394 | ta T_CHANGE_NONHPRIV ! rand=1 (80) |
| 2395 | .word 0x3e800001 ! 1: BVC bvc,a <label_0x1> |
| 2396 | done |
| 2397 | donretarg_80_27: |
| 2398 | .word 0x32800001 ! 37: BNE bne,a <label_0x1> |
| 2399 | #if (defined SPC || defined CMP1) |
| 2400 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_28) + 8, 16, 16)) -> intp(2,0,4) |
| 2401 | #else |
| 2402 | setx 0xb1ea8dce9e2f0c79, %r1, %r28 |
| 2403 | stxa %r28, [%g0] 0x73 |
| 2404 | #endif |
| 2405 | intvec_80_28: |
| 2406 | .word 0x39400001 ! 38: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 2407 | .word 0x91934014 ! 39: WRPR_PIL_R wrpr %r13, %r20, %pil |
| 2408 | nop |
| 2409 | ta T_CHANGE_HPRIV |
| 2410 | mov 0x80, %r10 |
| 2411 | set sync_thr_counter6, %r23 |
| 2412 | #ifndef SPC |
| 2413 | ldxa [%g0]0x63, %o1 |
| 2414 | and %o1, 0x38, %o1 |
| 2415 | add %o1, %r23, %r23 |
| 2416 | #endif |
| 2417 | cas [%r23],%g0,%r10 !lock |
| 2418 | brnz %r10, sma_80_30 |
| 2419 | rd %asi, %r12 |
| 2420 | wr %g0, 0x40, %asi |
| 2421 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 2422 | set 0x00161fff, %g1 |
| 2423 | stxa %g1, [%g0 + 0x80] %asi |
| 2424 | wr %r12, %g0, %asi |
| 2425 | st %g0, [%r23] |
| 2426 | sma_80_30: |
| 2427 | ta T_CHANGE_NONHPRIV |
| 2428 | .word 0xd5e7e013 ! 40: CASA_R casa [%r31] %asi, %r19, %r10 |
| 2429 | .word 0xd497e160 ! 41: LDUHA_I lduha [%r31, + 0x0160] %asi, %r10 |
| 2430 | .word 0x8d802004 ! 42: WRFPRS_I wr %r0, 0x0004, %fprs |
| 2431 | intveclr_80_31: |
| 2432 | nop |
| 2433 | ta T_CHANGE_HPRIV |
| 2434 | setx 0xf0ce3d3296ff8841, %r1, %r28 |
| 2435 | stxa %r28, [%g0] 0x72 |
| 2436 | ta T_CHANGE_NONHPRIV |
| 2437 | .word 0x25400001 ! 43: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 2438 | .word 0xa7840009 ! 44: WR_GRAPHICS_STATUS_REG_R wr %r16, %r9, %- |
| 2439 | .word 0x8143e011 ! 45: MEMBAR membar #LoadLoad | #Lookaside |
| 2440 | fpinit_80_34: |
| 2441 | nop |
| 2442 | setx fp_data_quads, %r19, %r20 |
| 2443 | ldd [%r20], %f0 |
| 2444 | ldd [%r20+8], %f4 |
| 2445 | ld [%r20+16], %fsr |
| 2446 | ld [%r20+24], %r19 |
| 2447 | wr %r19, %g0, %gsr |
| 2448 | .word 0x8db00484 ! 46: FCMPLE32 fcmple32 %d0, %d4, %r6 |
| 2449 | .word 0x29800001 ! 47: FBL fbl,a <label_0x1> |
| 2450 | splash_hpstate_80_36: |
| 2451 | .word 0x24800001 ! 1: BLE ble,a <label_0x1> |
| 2452 | .word 0x81982717 ! 48: WRHPR_HPSTATE_I wrhpr %r0, 0x0717, %hpstate |
| 2453 | nop |
| 2454 | ta T_CHANGE_HPRIV |
| 2455 | mov 0x80+1, %r10 |
| 2456 | set sync_thr_counter5, %r23 |
| 2457 | #ifndef SPC |
| 2458 | ldxa [%g0]0x63, %o1 |
| 2459 | and %o1, 0x38, %o1 |
| 2460 | add %o1, %r23, %r23 |
| 2461 | sllx %o1, 5, %o3 !(CID*256) |
| 2462 | #endif |
| 2463 | cas [%r23],%g0,%r10 !lock |
| 2464 | brnz %r10, cwq_80_37 |
| 2465 | rd %asi, %r12 |
| 2466 | wr %g0, 0x40, %asi |
| 2467 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 2468 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 2469 | cmp %l1, 1 |
| 2470 | bne cwq_80_37 |
| 2471 | set CWQ_BASE, %l6 |
| 2472 | #ifndef SPC |
| 2473 | add %l6, %o3, %l6 |
| 2474 | #endif |
| 2475 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 2476 | best_set_reg(0x20610000, %l1, %l2) !# Control Word |
| 2477 | sllx %l2, 32, %l2 |
| 2478 | stx %l2, [%l6 + 0x0] |
| 2479 | membar #Sync |
| 2480 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 2481 | sub %l2, 0x40, %l2 |
| 2482 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 2483 | wr %r12, %g0, %asi |
| 2484 | st %g0, [%r23] |
| 2485 | cwq_80_37: |
| 2486 | ta T_CHANGE_NONHPRIV |
| 2487 | .word 0xa9414000 ! 49: RDPC rd %pc, %r20 |
| 2488 | splash_hpstate_80_38: |
| 2489 | ta T_CHANGE_NONHPRIV |
| 2490 | .word 0x81982d97 ! 50: WRHPR_HPSTATE_I wrhpr %r0, 0x0d97, %hpstate |
| 2491 | fbge,a,pn %fcc0, skip_80_39 |
| 2492 | .word 0x9f8023c9 ! 1: SIR sir 0x03c9 |
| 2493 | .align 2048 |
| 2494 | skip_80_39: |
| 2495 | .word 0xe43fc000 ! 51: STD_R std %r18, [%r31 + %r0] |
| 2496 | invalw |
| 2497 | mov 0x33, %r30 |
| 2498 | .word 0x93d0001e ! 52: Tcc_R tne icc_or_xcc, %r0 + %r30 |
| 2499 | splash_cmpr_80_40: |
| 2500 | mov 0, %r18 |
| 2501 | sllx %r18, 63, %r18 |
| 2502 | rd %tick, %r17 |
| 2503 | add %r17, 0x60, %r17 |
| 2504 | or %r17, %r18, %r17 |
| 2505 | .word 0xaf800011 ! 53: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 2506 | setx 0xfff5000bd8866e15, %r1, %r28 |
| 2507 | stxa %r28, [%g0] 0x73 |
| 2508 | intvec_80_41: |
| 2509 | .word 0x39400001 ! 54: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 2510 | trapasi_80_42: |
| 2511 | nop |
| 2512 | mov 0x0, %r1 ! (VA for ASI 0x73) |
| 2513 | .word 0xe4904e60 ! 55: LDUHA_R lduha [%r1, %r0] 0x73, %r18 |
| 2514 | memptr_80_43: |
| 2515 | set 0x60140000, %r31 |
| 2516 | .word 0x8582fe45 ! 56: WRCCR_I wr %r11, 0x1e45, %ccr |
| 2517 | memptr_80_44: |
| 2518 | set 0x60540000, %r31 |
| 2519 | .word 0x8584f9f5 ! 57: WRCCR_I wr %r19, 0x19f5, %ccr |
| 2520 | .word 0xa9a44d33 ! 58: FsMULd fsmuld %f17, %f50, %f20 |
| 2521 | nop |
| 2522 | ta T_CHANGE_HPRIV ! macro |
| 2523 | donret_80_45: |
| 2524 | rd %pc, %r12 |
| 2525 | add %r12, (donretarg_80_45-donret_80_45+4), %r12 |
| 2526 | add %r12, 0x4, %r11 ! seq tnpc |
| 2527 | wrpr %g0, 0x1, %tl |
| 2528 | wrpr %g0, %r12, %tpc |
| 2529 | wrpr %g0, %r11, %tnpc |
| 2530 | set (0x00c0a700 | (16 << 24)), %r13 |
| 2531 | and %r12, 0xfff, %r14 |
| 2532 | sllx %r14, 30, %r14 |
| 2533 | or %r13, %r14, %r20 |
| 2534 | wrpr %r20, %g0, %tstate |
| 2535 | wrhpr %g0, 0x757, %htstate |
| 2536 | ta T_CHANGE_NONHPRIV ! rand=1 (80) |
| 2537 | done |
| 2538 | donretarg_80_45: |
| 2539 | .word 0xd4ffe07c ! 59: SWAPA_I swapa %r10, [%r31 + 0x007c] %asi |
| 2540 | .word 0x9b703eb3 ! 60: POPC_I popc 0x1eb3, %r13 |
| 2541 | splash_tba_80_47: |
| 2542 | nop |
| 2543 | ta T_CHANGE_PRIV |
| 2544 | setx 0x00000000003a0000, %r11, %r12 |
| 2545 | .word 0x8b90000c ! 61: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 2546 | ibp_80_48: |
| 2547 | nop |
| 2548 | ta T_CHANGE_HPRIV |
| 2549 | mov 8, %r18 |
| 2550 | rd %asi, %r12 |
| 2551 | wr %r0, 0x41, %asi |
| 2552 | set sync_thr_counter4, %r23 |
| 2553 | #ifndef SPC |
| 2554 | ldxa [%g0]0x63, %r8 |
| 2555 | and %r8, 0x38, %r8 ! Core ID |
| 2556 | add %r8, %r23, %r23 |
| 2557 | #else |
| 2558 | mov 0, %r8 |
| 2559 | #endif |
| 2560 | mov 0x80, %r16 |
| 2561 | ibp_startwait80_48: |
| 2562 | cas [%r23],%g0,%r16 !lock |
| 2563 | brz,a %r16, continue_ibp_80_48 |
| 2564 | mov (~0x80&0xf0), %r16 |
| 2565 | ld [%r23], %r16 |
| 2566 | ibp_wait80_48: |
| 2567 | brnz %r16, ibp_wait80_48 |
| 2568 | ld [%r23], %r16 |
| 2569 | ba ibp_startwait80_48 |
| 2570 | mov 0x80, %r16 |
| 2571 | continue_ibp_80_48: |
| 2572 | sllx %r16, %r8, %r16 !Mask for my core only |
| 2573 | ldxa [0x58]%asi, %r17 !Running_status |
| 2574 | wait_for_stat_80_48: |
| 2575 | ldxa [0x50]%asi, %r13 !Running_rw |
| 2576 | cmp %r13, %r17 |
| 2577 | bne,a %xcc, wait_for_stat_80_48 |
| 2578 | ldxa [0x58]%asi, %r17 !Running_status |
| 2579 | stxa %r16, [0x68]%asi !Park (W1C) |
| 2580 | ldxa [0x50]%asi, %r14 !Running_rw |
| 2581 | wait_for_ibp_80_48: |
| 2582 | ldxa [0x58]%asi, %r17 !Running_status |
| 2583 | cmp %r14, %r17 |
| 2584 | bne,a %xcc, wait_for_ibp_80_48 |
| 2585 | ldxa [0x50]%asi, %r14 !Running_rw |
| 2586 | ibp_doit80_48: |
| 2587 | best_set_reg(0x00000050a2c000a1,%r19, %r20) |
| 2588 | stxa %r20, [%r18]0x42 |
| 2589 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 2590 | st %g0, [%r23] !clear lock |
| 2591 | wr %r0, %r12, %asi !restore %asi |
| 2592 | ta T_CHANGE_NONHPRIV |
| 2593 | .word 0xa9a449ad ! 62: FDIVs fdivs %f17, %f13, %f20 |
| 2594 | .word 0xa7450000 ! 63: RD_SET_SOFTINT rd %set_softint, %r19 |
| 2595 | .word 0xd677c000 ! 64: STX_R stx %r11, [%r31 + %r0] |
| 2596 | .word 0xd71fe0e0 ! 65: LDDF_I ldd [%r31, 0x00e0], %f11 |
| 2597 | memptr_80_49: |
| 2598 | set 0x60740000, %r31 |
| 2599 | .word 0x8582fbca ! 66: WRCCR_I wr %r11, 0x1bca, %ccr |
| 2600 | .word 0x81b01021 ! 67: SIAM siam 1 |
| 2601 | .word 0x99b0c489 ! 68: FCMPLE32 fcmple32 %d34, %d40, %r12 |
| 2602 | .word 0xdb1fe1d0 ! 69: LDDF_I ldd [%r31, 0x01d0], %f13 |
| 2603 | .word 0x36780001 ! 70: BPGE <illegal instruction> |
| 2604 | dvapa_80_51: |
| 2605 | nop |
| 2606 | ta T_CHANGE_HPRIV |
| 2607 | mov 0xaf5, %r20 |
| 2608 | mov 0xd, %r19 |
| 2609 | sllx %r20, 23, %r20 |
| 2610 | or %r19, %r20, %r19 |
| 2611 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 2612 | mov 0x38, %r18 |
| 2613 | stxa %r31, [%r18]0x58 |
| 2614 | ta T_CHANGE_NONHPRIV |
| 2615 | .word 0x93b0c7c7 ! 71: PDIST pdistn %d34, %d38, %d40 |
| 2616 | splash_cmpr_80_52: |
| 2617 | mov 0, %r18 |
| 2618 | sllx %r18, 63, %r18 |
| 2619 | rd %tick, %r17 |
| 2620 | add %r17, 0x60, %r17 |
| 2621 | or %r17, %r18, %r17 |
| 2622 | ta T_CHANGE_HPRIV |
| 2623 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 2624 | ta T_CHANGE_PRIV |
| 2625 | .word 0xaf800011 ! 72: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 2626 | intveclr_80_53: |
| 2627 | nop |
| 2628 | ta T_CHANGE_HPRIV |
| 2629 | setx 0x5be0f0a777752914, %r1, %r28 |
| 2630 | stxa %r28, [%g0] 0x72 |
| 2631 | ta T_CHANGE_NONHPRIV |
| 2632 | .word 0x25400001 ! 73: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 2633 | jmptr_80_54: |
| 2634 | nop |
| 2635 | best_set_reg(0xe1a00000, %r20, %r27) |
| 2636 | .word 0xb7c6c000 ! 74: JMPL_R jmpl %r27 + %r0, %r27 |
| 2637 | mondo_80_55: |
| 2638 | nop |
| 2639 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 2640 | ta T_CHANGE_PRIV |
| 2641 | stxa %r12, [%r0+0x3d8] %asi |
| 2642 | .word 0x9d91c005 ! 75: WRPR_WSTATE_R wrpr %r7, %r5, %wstate |
| 2643 | #if (defined SPC || defined CMP1) |
| 2644 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_56) + 0, 16, 16)) -> intp(3,0,30) |
| 2645 | #else |
| 2646 | setx 0xb1237167ded0480e, %r1, %r28 |
| 2647 | stxa %r28, [%g0] 0x73 |
| 2648 | #endif |
| 2649 | intvec_80_56: |
| 2650 | .word 0x39400001 ! 76: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 2651 | .word 0x89800011 ! 77: WRTICK_R wr %r0, %r17, %tick |
| 2652 | splash_lsu_80_58: |
| 2653 | nop |
| 2654 | ta T_CHANGE_HPRIV |
| 2655 | set 0x1c4cf68f, %r2 |
| 2656 | mov 0x2, %r1 |
| 2657 | sllx %r1, 32, %r1 |
| 2658 | or %r1, %r2, %r2 |
| 2659 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 2660 | .word 0x3d400001 ! 78: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 2661 | splash_tba_80_59: |
| 2662 | nop |
| 2663 | ta T_CHANGE_PRIV |
| 2664 | setx 0x00000000003a0000, %r11, %r12 |
| 2665 | .word 0x8b90000c ! 79: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 2666 | .word 0x87802004 ! 80: WRASI_I wr %r0, 0x0004, %asi |
| 2667 | .word 0xd45fe038 ! 81: LDX_I ldx [%r31 + 0x0038], %r10 |
| 2668 | br_badelay1_80_60: |
| 2669 | .word 0xd43fc013 ! 1: STD_R std %r10, [%r31 + %r19] |
| 2670 | .word 0xe732c00a ! 1: STQF_R - %f19, [%r10, %r11] |
| 2671 | .word 0x87afca52 ! 1: FCMPd fcmpd %fcc<n>, %f62, %f18 |
| 2672 | normalw |
| 2673 | .word 0x97458000 ! 82: RD_SOFTINT_REG rd %softint, %r11 |
| 2674 | mondo_80_61: |
| 2675 | nop |
| 2676 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 2677 | stxa %r17, [%r0+0x3d8] %asi |
| 2678 | .word 0x9d94800a ! 83: WRPR_WSTATE_R wrpr %r18, %r10, %wstate |
| 2679 | nop |
| 2680 | mov 0x80, %g3 |
| 2681 | stxa %g3, [%g3] 0x57 |
| 2682 | .word 0xe45fc000 ! 84: LDX_R ldx [%r31 + %r0], %r18 |
| 2683 | nop |
| 2684 | ta T_CHANGE_HPRIV |
| 2685 | mov 0x80+1, %r10 |
| 2686 | set sync_thr_counter5, %r23 |
| 2687 | #ifndef SPC |
| 2688 | ldxa [%g0]0x63, %o1 |
| 2689 | and %o1, 0x38, %o1 |
| 2690 | add %o1, %r23, %r23 |
| 2691 | sllx %o1, 5, %o3 !(CID*256) |
| 2692 | #endif |
| 2693 | cas [%r23],%g0,%r10 !lock |
| 2694 | brnz %r10, cwq_80_62 |
| 2695 | rd %asi, %r12 |
| 2696 | wr %g0, 0x40, %asi |
| 2697 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 2698 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 2699 | cmp %l1, 1 |
| 2700 | bne cwq_80_62 |
| 2701 | set CWQ_BASE, %l6 |
| 2702 | #ifndef SPC |
| 2703 | add %l6, %o3, %l6 |
| 2704 | #endif |
| 2705 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 2706 | best_set_reg(0x20610060, %l1, %l2) !# Control Word |
| 2707 | sllx %l2, 32, %l2 |
| 2708 | stx %l2, [%l6 + 0x0] |
| 2709 | membar #Sync |
| 2710 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 2711 | sub %l2, 0x40, %l2 |
| 2712 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 2713 | wr %r12, %g0, %asi |
| 2714 | st %g0, [%r23] |
| 2715 | cwq_80_62: |
| 2716 | ta T_CHANGE_NONHPRIV |
| 2717 | .word 0x95414000 ! 85: RDPC rd %pc, %r10 |
| 2718 | pmu_80_63: |
| 2719 | nop |
| 2720 | setx 0xfffff14dffffffb5, %g1, %g7 |
| 2721 | .word 0xa3800007 ! 86: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 2722 | splash_tba_80_64: |
| 2723 | nop |
| 2724 | ta T_CHANGE_PRIV |
| 2725 | set 0x120000, %r12 |
| 2726 | .word 0x8b90000c ! 87: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 2727 | splash_cmpr_80_65: |
| 2728 | mov 0, %r18 |
| 2729 | sllx %r18, 63, %r18 |
| 2730 | rd %tick, %r17 |
| 2731 | add %r17, 0x100, %r17 |
| 2732 | or %r17, %r18, %r17 |
| 2733 | ta T_CHANGE_PRIV |
| 2734 | .word 0xaf800011 ! 88: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 2735 | splash_lsu_80_66: |
| 2736 | nop |
| 2737 | ta T_CHANGE_HPRIV |
| 2738 | set 0x68a345f7, %r2 |
| 2739 | mov 0x7, %r1 |
| 2740 | sllx %r1, 32, %r1 |
| 2741 | or %r1, %r2, %r2 |
| 2742 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 2743 | ta T_CHANGE_NONHPRIV |
| 2744 | .word 0x3d400001 ! 89: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 2745 | .word 0xc30fc000 ! 90: LDXFSR_R ld-fsr [%r31, %r0], %f1 |
| 2746 | nop |
| 2747 | ta T_CHANGE_HPRIV |
| 2748 | mov 0x80+1, %r10 |
| 2749 | set sync_thr_counter5, %r23 |
| 2750 | #ifndef SPC |
| 2751 | ldxa [%g0]0x63, %o1 |
| 2752 | and %o1, 0x38, %o1 |
| 2753 | add %o1, %r23, %r23 |
| 2754 | sllx %o1, 5, %o3 !(CID*256) |
| 2755 | #endif |
| 2756 | cas [%r23],%g0,%r10 !lock |
| 2757 | brnz %r10, cwq_80_67 |
| 2758 | rd %asi, %r12 |
| 2759 | wr %g0, 0x40, %asi |
| 2760 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 2761 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 2762 | cmp %l1, 1 |
| 2763 | bne cwq_80_67 |
| 2764 | set CWQ_BASE, %l6 |
| 2765 | #ifndef SPC |
| 2766 | add %l6, %o3, %l6 |
| 2767 | #endif |
| 2768 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 2769 | best_set_reg(0x206100e0, %l1, %l2) !# Control Word |
| 2770 | sllx %l2, 32, %l2 |
| 2771 | stx %l2, [%l6 + 0x0] |
| 2772 | membar #Sync |
| 2773 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 2774 | sub %l2, 0x40, %l2 |
| 2775 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 2776 | wr %r12, %g0, %asi |
| 2777 | st %g0, [%r23] |
| 2778 | cwq_80_67: |
| 2779 | ta T_CHANGE_NONHPRIV |
| 2780 | .word 0x9b414000 ! 91: RDPC rd %pc, %r13 |
| 2781 | .word 0xd827e171 ! 92: STW_I stw %r12, [%r31 + 0x0171] |
| 2782 | splash_tba_80_68: |
| 2783 | nop |
| 2784 | ta T_CHANGE_PRIV |
| 2785 | set 0x120000, %r12 |
| 2786 | .word 0x8b90000c ! 93: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 2787 | setx 0x3cd0d7ed52365564, %r1, %r28 |
| 2788 | stxa %r28, [%g0] 0x73 |
| 2789 | intvec_80_69: |
| 2790 | .word 0x39400001 ! 94: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 2791 | nop |
| 2792 | mov 0x80, %g3 |
| 2793 | stxa %g3, [%g3] 0x5f |
| 2794 | .word 0xd85fc000 ! 95: LDX_R ldx [%r31 + %r0], %r12 |
| 2795 | .word 0x8d802004 ! 96: WRFPRS_I wr %r0, 0x0004, %fprs |
| 2796 | .word 0xd91fc008 ! 97: LDDF_R ldd [%r31, %r8], %f12 |
| 2797 | splash_cmpr_80_71: |
| 2798 | mov 0, %r18 |
| 2799 | sllx %r18, 63, %r18 |
| 2800 | rd %tick, %r17 |
| 2801 | add %r17, 0x80, %r17 |
| 2802 | or %r17, %r18, %r17 |
| 2803 | ta T_CHANGE_HPRIV |
| 2804 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 2805 | ta T_CHANGE_PRIV |
| 2806 | .word 0xb3800011 ! 98: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 2807 | nop |
| 2808 | mov 0x80, %g3 |
| 2809 | stxa %g3, [%g3] 0x5f |
| 2810 | .word 0xd85fc000 ! 99: LDX_R ldx [%r31 + %r0], %r12 |
| 2811 | ceter_80_72: |
| 2812 | nop |
| 2813 | ta T_CHANGE_HPRIV |
| 2814 | mov 7, %r17 |
| 2815 | sllx %r17, 60, %r17 |
| 2816 | mov 0x18, %r16 |
| 2817 | stxa %r17, [%r16]0x4c |
| 2818 | ta T_CHANGE_NONHPRIV |
| 2819 | .word 0x97410000 ! 100: RDTICK rd %tick, %r11 |
| 2820 | .word 0x2aca0001 ! 1: BRNZ brnz,a,pt %r8,<label_0xa0001> |
| 2821 | .word 0x8d9032a5 ! 101: WRPR_PSTATE_I wrpr %r0, 0x12a5, %pstate |
| 2822 | intveclr_80_74: |
| 2823 | nop |
| 2824 | ta T_CHANGE_HPRIV |
| 2825 | setx 0x166ea9e8d9b81fc1, %r1, %r28 |
| 2826 | stxa %r28, [%g0] 0x72 |
| 2827 | ta T_CHANGE_NONHPRIV |
| 2828 | .word 0x25400001 ! 102: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 2829 | fpinit_80_75: |
| 2830 | nop |
| 2831 | setx fp_data_quads, %r19, %r20 |
| 2832 | ldd [%r20], %f0 |
| 2833 | ldd [%r20+8], %f4 |
| 2834 | ld [%r20+16], %fsr |
| 2835 | ld [%r20+24], %r19 |
| 2836 | wr %r19, %g0, %gsr |
| 2837 | .word 0x87a80a44 ! 103: FCMPd fcmpd %fcc<n>, %f0, %f4 |
| 2838 | jmptr_80_76: |
| 2839 | nop |
| 2840 | best_set_reg(0xe1a00000, %r20, %r27) |
| 2841 | .word 0xb7c6c000 ! 104: JMPL_R jmpl %r27 + %r0, %r27 |
| 2842 | jmptr_80_77: |
| 2843 | nop |
| 2844 | best_set_reg(0xe1a00000, %r20, %r27) |
| 2845 | .word 0xb7c6c000 ! 105: JMPL_R jmpl %r27 + %r0, %r27 |
| 2846 | nop |
| 2847 | ta T_CHANGE_HPRIV |
| 2848 | mov 0x80, %r10 |
| 2849 | set sync_thr_counter6, %r23 |
| 2850 | #ifndef SPC |
| 2851 | ldxa [%g0]0x63, %o1 |
| 2852 | and %o1, 0x38, %o1 |
| 2853 | add %o1, %r23, %r23 |
| 2854 | #endif |
| 2855 | cas [%r23],%g0,%r10 !lock |
| 2856 | brnz %r10, sma_80_78 |
| 2857 | rd %asi, %r12 |
| 2858 | wr %g0, 0x40, %asi |
| 2859 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 2860 | set 0x00061fff, %g1 |
| 2861 | stxa %g1, [%g0 + 0x80] %asi |
| 2862 | wr %r12, %g0, %asi |
| 2863 | st %g0, [%r23] |
| 2864 | sma_80_78: |
| 2865 | ta T_CHANGE_NONHPRIV |
| 2866 | .word 0xe9e7e00c ! 106: CASA_R casa [%r31] %asi, %r12, %r20 |
| 2867 | nop |
| 2868 | ta T_CHANGE_HPRIV |
| 2869 | mov 0x80, %r10 |
| 2870 | set sync_thr_counter6, %r23 |
| 2871 | #ifndef SPC |
| 2872 | ldxa [%g0]0x63, %o1 |
| 2873 | and %o1, 0x38, %o1 |
| 2874 | add %o1, %r23, %r23 |
| 2875 | #endif |
| 2876 | cas [%r23],%g0,%r10 !lock |
| 2877 | brnz %r10, sma_80_79 |
| 2878 | rd %asi, %r12 |
| 2879 | wr %g0, 0x40, %asi |
| 2880 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 2881 | set 0x000a1fff, %g1 |
| 2882 | stxa %g1, [%g0 + 0x80] %asi |
| 2883 | wr %r12, %g0, %asi |
| 2884 | st %g0, [%r23] |
| 2885 | sma_80_79: |
| 2886 | ta T_CHANGE_NONHPRIV |
| 2887 | .word 0xe9e7e011 ! 107: CASA_R casa [%r31] %asi, %r17, %r20 |
| 2888 | splash_cmpr_80_80: |
| 2889 | mov 0, %r18 |
| 2890 | sllx %r18, 63, %r18 |
| 2891 | rd %tick, %r17 |
| 2892 | add %r17, 0x60, %r17 |
| 2893 | or %r17, %r18, %r17 |
| 2894 | ta T_CHANGE_HPRIV |
| 2895 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 2896 | .word 0xb3800011 ! 108: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 2897 | ibp_80_81: |
| 2898 | nop |
| 2899 | ta T_CHANGE_HPRIV |
| 2900 | mov 8, %r18 |
| 2901 | rd %asi, %r12 |
| 2902 | wr %r0, 0x41, %asi |
| 2903 | set sync_thr_counter4, %r23 |
| 2904 | #ifndef SPC |
| 2905 | ldxa [%g0]0x63, %r8 |
| 2906 | and %r8, 0x38, %r8 ! Core ID |
| 2907 | add %r8, %r23, %r23 |
| 2908 | #else |
| 2909 | mov 0, %r8 |
| 2910 | #endif |
| 2911 | mov 0x80, %r16 |
| 2912 | ibp_startwait80_81: |
| 2913 | cas [%r23],%g0,%r16 !lock |
| 2914 | brz,a %r16, continue_ibp_80_81 |
| 2915 | mov (~0x80&0xf0), %r16 |
| 2916 | ld [%r23], %r16 |
| 2917 | ibp_wait80_81: |
| 2918 | brnz %r16, ibp_wait80_81 |
| 2919 | ld [%r23], %r16 |
| 2920 | ba ibp_startwait80_81 |
| 2921 | mov 0x80, %r16 |
| 2922 | continue_ibp_80_81: |
| 2923 | sllx %r16, %r8, %r16 !Mask for my core only |
| 2924 | ldxa [0x58]%asi, %r17 !Running_status |
| 2925 | wait_for_stat_80_81: |
| 2926 | ldxa [0x50]%asi, %r13 !Running_rw |
| 2927 | cmp %r13, %r17 |
| 2928 | bne,a %xcc, wait_for_stat_80_81 |
| 2929 | ldxa [0x58]%asi, %r17 !Running_status |
| 2930 | stxa %r16, [0x68]%asi !Park (W1C) |
| 2931 | ldxa [0x50]%asi, %r14 !Running_rw |
| 2932 | wait_for_ibp_80_81: |
| 2933 | ldxa [0x58]%asi, %r17 !Running_status |
| 2934 | cmp %r14, %r17 |
| 2935 | bne,a %xcc, wait_for_ibp_80_81 |
| 2936 | ldxa [0x50]%asi, %r14 !Running_rw |
| 2937 | ibp_doit80_81: |
| 2938 | best_set_reg(0x000000403bc0a1f3,%r19, %r20) |
| 2939 | stxa %r20, [%r18]0x42 |
| 2940 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 2941 | st %g0, [%r23] !clear lock |
| 2942 | wr %r0, %r12, %asi !restore %asi |
| 2943 | .word 0xe1bfe140 ! 109: STDFA_I stda %f16, [0x0140, %r31] |
| 2944 | .word 0xe88008a0 ! 110: LDUWA_R lduwa [%r0, %r0] 0x45, %r20 |
| 2945 | .word 0x87ad0ad4 ! 111: FCMPEd fcmped %fcc<n>, %f20, %f20 |
| 2946 | nop |
| 2947 | ta T_CHANGE_HPRIV |
| 2948 | mov 0x80+1, %r10 |
| 2949 | set sync_thr_counter5, %r23 |
| 2950 | #ifndef SPC |
| 2951 | ldxa [%g0]0x63, %o1 |
| 2952 | and %o1, 0x38, %o1 |
| 2953 | add %o1, %r23, %r23 |
| 2954 | sllx %o1, 5, %o3 !(CID*256) |
| 2955 | #endif |
| 2956 | cas [%r23],%g0,%r10 !lock |
| 2957 | brnz %r10, cwq_80_82 |
| 2958 | rd %asi, %r12 |
| 2959 | wr %g0, 0x40, %asi |
| 2960 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 2961 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 2962 | cmp %l1, 1 |
| 2963 | bne cwq_80_82 |
| 2964 | set CWQ_BASE, %l6 |
| 2965 | #ifndef SPC |
| 2966 | add %l6, %o3, %l6 |
| 2967 | #endif |
| 2968 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 2969 | best_set_reg(0x206100a0, %l1, %l2) !# Control Word |
| 2970 | sllx %l2, 32, %l2 |
| 2971 | stx %l2, [%l6 + 0x0] |
| 2972 | membar #Sync |
| 2973 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 2974 | sub %l2, 0x40, %l2 |
| 2975 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 2976 | wr %r12, %g0, %asi |
| 2977 | st %g0, [%r23] |
| 2978 | cwq_80_82: |
| 2979 | ta T_CHANGE_NONHPRIV |
| 2980 | .word 0xa1414000 ! 112: RDPC rd %pc, %r16 |
| 2981 | cwp_80_83: |
| 2982 | set user_data_start, %o7 |
| 2983 | .word 0x93902000 ! 113: WRPR_CWP_I wrpr %r0, 0x0000, %cwp |
| 2984 | .word 0xa4dc400d ! 114: SMULcc_R smulcc %r17, %r13, %r18 |
| 2985 | .word 0x8d802000 ! 115: WRFPRS_I wr %r0, 0x0000, %fprs |
| 2986 | trapasi_80_84: |
| 2987 | nop |
| 2988 | mov 0x3e0, %r1 ! (VA for ASI 0x25) |
| 2989 | .word 0xe4c044a0 ! 116: LDSWA_R ldswa [%r1, %r0] 0x25, %r18 |
| 2990 | .word 0x8d802000 ! 117: WRFPRS_I wr %r0, 0x0000, %fprs |
| 2991 | trapasi_80_85: |
| 2992 | nop |
| 2993 | mov 0x3e8, %r1 ! (VA for ASI 0x25) |
| 2994 | .word 0xe48844a0 ! 118: LDUBA_R lduba [%r1, %r0] 0x25, %r18 |
| 2995 | .word 0x9353c000 ! 119: RDPR_FQ <illegal instruction> |
| 2996 | splash_hpstate_80_86: |
| 2997 | .word 0x24800001 ! 1: BLE ble,a <label_0x1> |
| 2998 | .word 0x8198269d ! 120: WRHPR_HPSTATE_I wrhpr %r0, 0x069d, %hpstate |
| 2999 | intveclr_80_87: |
| 3000 | nop |
| 3001 | ta T_CHANGE_HPRIV |
| 3002 | setx 0xdba252d8e0cad1b7, %r1, %r28 |
| 3003 | stxa %r28, [%g0] 0x72 |
| 3004 | .word 0x25400001 ! 121: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 3005 | .word 0xe937e0d0 ! 122: STQF_I - %f20, [0x00d0, %r31] |
| 3006 | .word 0x98c0a169 ! 123: ADDCcc_I addccc %r2, 0x0169, %r12 |
| 3007 | #if (defined SPC || defined CMP1) |
| 3008 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_88) + 32, 16, 16)) -> intp(4,0,28) |
| 3009 | #else |
| 3010 | setx 0x7594493668d35cd4, %r1, %r28 |
| 3011 | stxa %r28, [%g0] 0x73 |
| 3012 | #endif |
| 3013 | intvec_80_88: |
| 3014 | .word 0x39400001 ! 124: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 3015 | trapasi_80_89: |
| 3016 | nop |
| 3017 | mov 0x0, %r1 ! (VA for ASI 0x73) |
| 3018 | .word 0xe8904e60 ! 125: LDUHA_R lduha [%r1, %r0] 0x73, %r20 |
| 3019 | trapasi_80_90: |
| 3020 | nop |
| 3021 | mov 0x3c0, %r1 ! (VA for ASI 0x25) |
| 3022 | .word 0xe88844a0 ! 126: LDUBA_R lduba [%r1, %r0] 0x25, %r20 |
| 3023 | ble,a skip_80_91 |
| 3024 | .word 0xa5b444d3 ! 1: FCMPNE32 fcmpne32 %d48, %d50, %r18 |
| 3025 | .align 512 |
| 3026 | skip_80_91: |
| 3027 | .word 0x91a1c9cb ! 127: FDIVd fdivd %f38, %f42, %f8 |
| 3028 | intveclr_80_92: |
| 3029 | nop |
| 3030 | ta T_CHANGE_HPRIV |
| 3031 | setx 0xc367019ef9895155, %r1, %r28 |
| 3032 | stxa %r28, [%g0] 0x72 |
| 3033 | ta T_CHANGE_NONHPRIV |
| 3034 | .word 0x25400001 ! 128: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 3035 | trapasi_80_93: |
| 3036 | nop |
| 3037 | mov 0x18, %r1 ! (VA for ASI 0x50) |
| 3038 | .word 0xd0904a00 ! 129: LDUHA_R lduha [%r1, %r0] 0x50, %r8 |
| 3039 | .word 0x89800011 ! 130: WRTICK_R wr %r0, %r17, %tick |
| 3040 | .word 0xe19fc3e0 ! 131: LDDFA_R ldda [%r31, %r0], %f16 |
| 3041 | .word 0x89800011 ! 132: WRTICK_R wr %r0, %r17, %tick |
| 3042 | .word 0xd197e088 ! 133: LDQFA_I - [%r31, 0x0088], %f8 |
| 3043 | dvapa_80_96: |
| 3044 | nop |
| 3045 | ta T_CHANGE_HPRIV |
| 3046 | mov 0x808, %r20 |
| 3047 | mov 0x4, %r19 |
| 3048 | sllx %r20, 23, %r20 |
| 3049 | or %r19, %r20, %r19 |
| 3050 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 3051 | mov 0x38, %r18 |
| 3052 | stxa %r31, [%r18]0x58 |
| 3053 | ta T_CHANGE_NONHPRIV |
| 3054 | .word 0x91702c55 ! 134: POPC_I popc 0x0c55, %r8 |
| 3055 | .word 0xd13fc000 ! 135: STDF_R std %f8, [%r0, %r31] |
| 3056 | otherw |
| 3057 | mov 0xb4, %r30 |
| 3058 | .word 0x91d0001e ! 136: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 3059 | .word 0x87802082 ! 137: WRASI_I wr %r0, 0x0082, %asi |
| 3060 | memptr_80_97: |
| 3061 | set 0x60740000, %r31 |
| 3062 | .word 0x858475f4 ! 138: WRCCR_I wr %r17, 0x15f4, %ccr |
| 3063 | splash_cmpr_80_98: |
| 3064 | mov 1, %r18 |
| 3065 | sllx %r18, 63, %r18 |
| 3066 | rd %tick, %r17 |
| 3067 | add %r17, 0x60, %r17 |
| 3068 | or %r17, %r18, %r17 |
| 3069 | .word 0xb3800011 ! 139: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 3070 | .word 0x87a90a22 ! 140: FCMPs fcmps %fcc<n>, %f4, %f2 |
| 3071 | .word 0x89800011 ! 141: WRTICK_R wr %r0, %r17, %tick |
| 3072 | .word 0xd0c7e140 ! 142: LDSWA_I ldswa [%r31, + 0x0140] %asi, %r8 |
| 3073 | splash_tba_80_100: |
| 3074 | nop |
| 3075 | ta T_CHANGE_PRIV |
| 3076 | set 0x120000, %r12 |
| 3077 | .word 0x8b90000c ! 143: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 3078 | change_to_randtl_80_101: |
| 3079 | ta T_CHANGE_HPRIV ! macro |
| 3080 | done_change_to_randtl_80_101: |
| 3081 | .word 0x8f902000 ! 144: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 3082 | nop |
| 3083 | ta T_CHANGE_HPRIV ! macro |
| 3084 | donret_80_102: |
| 3085 | rd %pc, %r12 |
| 3086 | add %r12, (donretarg_80_102-donret_80_102+4), %r12 |
| 3087 | add %r12, 0x4, %r11 ! seq tnpc |
| 3088 | wrpr %g0, 0x1, %tl |
| 3089 | wrpr %g0, %r12, %tpc |
| 3090 | wrpr %g0, %r11, %tnpc |
| 3091 | set (0x00eefe00 | (0x88 << 24)), %r13 |
| 3092 | and %r12, 0xfff, %r14 |
| 3093 | sllx %r14, 30, %r14 |
| 3094 | or %r13, %r14, %r20 |
| 3095 | wrpr %r20, %g0, %tstate |
| 3096 | wrhpr %g0, 0xdef, %htstate |
| 3097 | ta T_CHANGE_NONHPRIV ! rand=1 (80) |
| 3098 | .word 0x2cc8c001 ! 1: BRGZ brgz,a,pt %r3,<label_0x8c001> |
| 3099 | retry |
| 3100 | donretarg_80_102: |
| 3101 | .word 0x36800001 ! 145: BGE bge,a <label_0x1> |
| 3102 | .word 0xd097c02b ! 146: LDUHA_R lduha [%r31, %r11] 0x01, %r8 |
| 3103 | .word 0x83d02035 ! 147: Tcc_I te icc_or_xcc, %r0 + 53 |
| 3104 | nop |
| 3105 | ta T_CHANGE_HPRIV |
| 3106 | mov 0x80+1, %r10 |
| 3107 | set sync_thr_counter5, %r23 |
| 3108 | #ifndef SPC |
| 3109 | ldxa [%g0]0x63, %o1 |
| 3110 | and %o1, 0x38, %o1 |
| 3111 | add %o1, %r23, %r23 |
| 3112 | sllx %o1, 5, %o3 !(CID*256) |
| 3113 | #endif |
| 3114 | cas [%r23],%g0,%r10 !lock |
| 3115 | brnz %r10, cwq_80_104 |
| 3116 | rd %asi, %r12 |
| 3117 | wr %g0, 0x40, %asi |
| 3118 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 3119 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 3120 | cmp %l1, 1 |
| 3121 | bne cwq_80_104 |
| 3122 | set CWQ_BASE, %l6 |
| 3123 | #ifndef SPC |
| 3124 | add %l6, %o3, %l6 |
| 3125 | #endif |
| 3126 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 3127 | best_set_reg(0x20610050, %l1, %l2) !# Control Word |
| 3128 | sllx %l2, 32, %l2 |
| 3129 | stx %l2, [%l6 + 0x0] |
| 3130 | membar #Sync |
| 3131 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 3132 | sub %l2, 0x40, %l2 |
| 3133 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 3134 | wr %r12, %g0, %asi |
| 3135 | st %g0, [%r23] |
| 3136 | cwq_80_104: |
| 3137 | ta T_CHANGE_NONHPRIV |
| 3138 | .word 0x95414000 ! 148: RDPC rd %pc, %r10 |
| 3139 | mondo_80_105: |
| 3140 | nop |
| 3141 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 3142 | ta T_CHANGE_PRIV |
| 3143 | stxa %r11, [%r0+0x3d0] %asi |
| 3144 | .word 0x9d910012 ! 149: WRPR_WSTATE_R wrpr %r4, %r18, %wstate |
| 3145 | .word 0xe19fe0c0 ! 150: LDDFA_I ldda [%r31, 0x00c0], %f16 |
| 3146 | nop |
| 3147 | ta T_CHANGE_HPRIV |
| 3148 | mov 0x80+1, %r10 |
| 3149 | set sync_thr_counter5, %r23 |
| 3150 | #ifndef SPC |
| 3151 | ldxa [%g0]0x63, %o1 |
| 3152 | and %o1, 0x38, %o1 |
| 3153 | add %o1, %r23, %r23 |
| 3154 | sllx %o1, 5, %o3 !(CID*256) |
| 3155 | #endif |
| 3156 | cas [%r23],%g0,%r10 !lock |
| 3157 | brnz %r10, cwq_80_106 |
| 3158 | rd %asi, %r12 |
| 3159 | wr %g0, 0x40, %asi |
| 3160 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 3161 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 3162 | cmp %l1, 1 |
| 3163 | bne cwq_80_106 |
| 3164 | set CWQ_BASE, %l6 |
| 3165 | #ifndef SPC |
| 3166 | add %l6, %o3, %l6 |
| 3167 | #endif |
| 3168 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 3169 | best_set_reg(0x206100b0, %l1, %l2) !# Control Word |
| 3170 | sllx %l2, 32, %l2 |
| 3171 | stx %l2, [%l6 + 0x0] |
| 3172 | membar #Sync |
| 3173 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 3174 | sub %l2, 0x40, %l2 |
| 3175 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 3176 | wr %r12, %g0, %asi |
| 3177 | st %g0, [%r23] |
| 3178 | cwq_80_106: |
| 3179 | ta T_CHANGE_NONHPRIV |
| 3180 | .word 0xa1414000 ! 151: RDPC rd %pc, %r16 |
| 3181 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 3182 | reduce_priv_lvl_80_107: |
| 3183 | ta T_CHANGE_NONPRIV ! macro |
| 3184 | #if (defined SPC || defined CMP1) |
| 3185 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_108) + 56, 16, 16)) -> intp(1,0,5) |
| 3186 | #else |
| 3187 | setx 0x17201d171fcd23cd, %r1, %r28 |
| 3188 | stxa %r28, [%g0] 0x73 |
| 3189 | #endif |
| 3190 | intvec_80_108: |
| 3191 | .word 0x39400001 ! 153: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 3192 | .word 0x8d9039be ! 154: WRPR_PSTATE_I wrpr %r0, 0x19be, %pstate |
| 3193 | dvapa_80_110: |
| 3194 | nop |
| 3195 | ta T_CHANGE_HPRIV |
| 3196 | mov 0xdfa, %r20 |
| 3197 | mov 0xa, %r19 |
| 3198 | sllx %r20, 23, %r20 |
| 3199 | or %r19, %r20, %r19 |
| 3200 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 3201 | mov 0x38, %r18 |
| 3202 | stxa %r31, [%r18]0x58 |
| 3203 | ta T_CHANGE_NONHPRIV |
| 3204 | .word 0xa7a489b2 ! 155: FDIVs fdivs %f18, %f18, %f19 |
| 3205 | .word 0xd0800b40 ! 156: LDUWA_R lduwa [%r0, %r0] 0x5a, %r8 |
| 3206 | .word 0x89800011 ! 157: WRTICK_R wr %r0, %r17, %tick |
| 3207 | memptr_80_112: |
| 3208 | set 0x60140000, %r31 |
| 3209 | .word 0x8584bab2 ! 158: WRCCR_I wr %r18, 0x1ab2, %ccr |
| 3210 | .word 0x964c8014 ! 159: MULX_R mulx %r18, %r20, %r11 |
| 3211 | nop |
| 3212 | ta T_CHANGE_HPRIV |
| 3213 | mov 0x80, %r10 |
| 3214 | set sync_thr_counter6, %r23 |
| 3215 | #ifndef SPC |
| 3216 | ldxa [%g0]0x63, %o1 |
| 3217 | and %o1, 0x38, %o1 |
| 3218 | add %o1, %r23, %r23 |
| 3219 | #endif |
| 3220 | cas [%r23],%g0,%r10 !lock |
| 3221 | brnz %r10, sma_80_113 |
| 3222 | rd %asi, %r12 |
| 3223 | wr %g0, 0x40, %asi |
| 3224 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 3225 | set 0x001a1fff, %g1 |
| 3226 | stxa %g1, [%g0 + 0x80] %asi |
| 3227 | wr %r12, %g0, %asi |
| 3228 | st %g0, [%r23] |
| 3229 | sma_80_113: |
| 3230 | ta T_CHANGE_NONHPRIV |
| 3231 | .word 0xe3e7e00a ! 160: CASA_R casa [%r31] %asi, %r10, %r17 |
| 3232 | ibp_80_114: |
| 3233 | nop |
| 3234 | ta T_CHANGE_HPRIV |
| 3235 | mov 8, %r18 |
| 3236 | rd %asi, %r12 |
| 3237 | wr %r0, 0x41, %asi |
| 3238 | set sync_thr_counter4, %r23 |
| 3239 | #ifndef SPC |
| 3240 | ldxa [%g0]0x63, %r8 |
| 3241 | and %r8, 0x38, %r8 ! Core ID |
| 3242 | add %r8, %r23, %r23 |
| 3243 | #else |
| 3244 | mov 0, %r8 |
| 3245 | #endif |
| 3246 | mov 0x80, %r16 |
| 3247 | ibp_startwait80_114: |
| 3248 | cas [%r23],%g0,%r16 !lock |
| 3249 | brz,a %r16, continue_ibp_80_114 |
| 3250 | mov (~0x80&0xf0), %r16 |
| 3251 | ld [%r23], %r16 |
| 3252 | ibp_wait80_114: |
| 3253 | brnz %r16, ibp_wait80_114 |
| 3254 | ld [%r23], %r16 |
| 3255 | ba ibp_startwait80_114 |
| 3256 | mov 0x80, %r16 |
| 3257 | continue_ibp_80_114: |
| 3258 | sllx %r16, %r8, %r16 !Mask for my core only |
| 3259 | ldxa [0x58]%asi, %r17 !Running_status |
| 3260 | wait_for_stat_80_114: |
| 3261 | ldxa [0x50]%asi, %r13 !Running_rw |
| 3262 | cmp %r13, %r17 |
| 3263 | bne,a %xcc, wait_for_stat_80_114 |
| 3264 | ldxa [0x58]%asi, %r17 !Running_status |
| 3265 | stxa %r16, [0x68]%asi !Park (W1C) |
| 3266 | ldxa [0x50]%asi, %r14 !Running_rw |
| 3267 | wait_for_ibp_80_114: |
| 3268 | ldxa [0x58]%asi, %r17 !Running_status |
| 3269 | cmp %r14, %r17 |
| 3270 | bne,a %xcc, wait_for_ibp_80_114 |
| 3271 | ldxa [0x50]%asi, %r14 !Running_rw |
| 3272 | ibp_doit80_114: |
| 3273 | best_set_reg(0x000000502ae1f368,%r19, %r20) |
| 3274 | stxa %r20, [%r18]0x42 |
| 3275 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 3276 | st %g0, [%r23] !clear lock |
| 3277 | wr %r0, %r12, %asi !restore %asi |
| 3278 | .word 0x95b447c9 ! 161: PDIST pdistn %d48, %d40, %d10 |
| 3279 | memptr_80_115: |
| 3280 | set 0x60140000, %r31 |
| 3281 | .word 0x8580a18b ! 162: WRCCR_I wr %r2, 0x018b, %ccr |
| 3282 | splash_tba_80_116: |
| 3283 | nop |
| 3284 | ta T_CHANGE_PRIV |
| 3285 | set 0x120000, %r12 |
| 3286 | .word 0x8b90000c ! 163: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 3287 | .word 0x9248c001 ! 164: MULX_R mulx %r3, %r1, %r9 |
| 3288 | .word 0x91d020b2 ! 165: Tcc_I ta icc_or_xcc, %r0 + 178 |
| 3289 | ibp_80_117: |
| 3290 | nop |
| 3291 | ta T_CHANGE_HPRIV |
| 3292 | mov 8, %r18 |
| 3293 | rd %asi, %r12 |
| 3294 | wr %r0, 0x41, %asi |
| 3295 | set sync_thr_counter4, %r23 |
| 3296 | #ifndef SPC |
| 3297 | ldxa [%g0]0x63, %r8 |
| 3298 | and %r8, 0x38, %r8 ! Core ID |
| 3299 | add %r8, %r23, %r23 |
| 3300 | #else |
| 3301 | mov 0, %r8 |
| 3302 | #endif |
| 3303 | mov 0x80, %r16 |
| 3304 | ibp_startwait80_117: |
| 3305 | cas [%r23],%g0,%r16 !lock |
| 3306 | brz,a %r16, continue_ibp_80_117 |
| 3307 | mov (~0x80&0xf0), %r16 |
| 3308 | ld [%r23], %r16 |
| 3309 | ibp_wait80_117: |
| 3310 | brnz %r16, ibp_wait80_117 |
| 3311 | ld [%r23], %r16 |
| 3312 | ba ibp_startwait80_117 |
| 3313 | mov 0x80, %r16 |
| 3314 | continue_ibp_80_117: |
| 3315 | sllx %r16, %r8, %r16 !Mask for my core only |
| 3316 | ldxa [0x58]%asi, %r17 !Running_status |
| 3317 | wait_for_stat_80_117: |
| 3318 | ldxa [0x50]%asi, %r13 !Running_rw |
| 3319 | cmp %r13, %r17 |
| 3320 | bne,a %xcc, wait_for_stat_80_117 |
| 3321 | ldxa [0x58]%asi, %r17 !Running_status |
| 3322 | stxa %r16, [0x68]%asi !Park (W1C) |
| 3323 | ldxa [0x50]%asi, %r14 !Running_rw |
| 3324 | wait_for_ibp_80_117: |
| 3325 | ldxa [0x58]%asi, %r17 !Running_status |
| 3326 | cmp %r14, %r17 |
| 3327 | bne,a %xcc, wait_for_ibp_80_117 |
| 3328 | ldxa [0x50]%asi, %r14 !Running_rw |
| 3329 | ibp_doit80_117: |
| 3330 | best_set_reg(0x0000004002f3688b,%r19, %r20) |
| 3331 | stxa %r20, [%r18]0x42 |
| 3332 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 3333 | st %g0, [%r23] !clear lock |
| 3334 | wr %r0, %r12, %asi !restore %asi |
| 3335 | ta T_CHANGE_NONHPRIV |
| 3336 | .word 0x91b0848a ! 166: FCMPLE32 fcmple32 %d2, %d10, %r8 |
| 3337 | brcommon2_80_118: |
| 3338 | nop |
| 3339 | setx common_target, %r12, %r27 |
| 3340 | ba,a .+12 |
| 3341 | .word 0x93a449d0 ! 1: FDIVd fdivd %f48, %f16, %f40 |
| 3342 | ba,a .+8 |
| 3343 | jmpl %r27+0, %r27 |
| 3344 | .word 0xe19fe1e0 ! 167: LDDFA_I ldda [%r31, 0x01e0], %f16 |
| 3345 | .word 0xd027e1b8 ! 168: STW_I stw %r8, [%r31 + 0x01b8] |
| 3346 | ibp_80_119: |
| 3347 | nop |
| 3348 | ta T_CHANGE_HPRIV |
| 3349 | mov 8, %r18 |
| 3350 | rd %asi, %r12 |
| 3351 | wr %r0, 0x41, %asi |
| 3352 | set sync_thr_counter4, %r23 |
| 3353 | #ifndef SPC |
| 3354 | ldxa [%g0]0x63, %r8 |
| 3355 | and %r8, 0x38, %r8 ! Core ID |
| 3356 | add %r8, %r23, %r23 |
| 3357 | #else |
| 3358 | mov 0, %r8 |
| 3359 | #endif |
| 3360 | mov 0x80, %r16 |
| 3361 | ibp_startwait80_119: |
| 3362 | cas [%r23],%g0,%r16 !lock |
| 3363 | brz,a %r16, continue_ibp_80_119 |
| 3364 | mov (~0x80&0xf0), %r16 |
| 3365 | ld [%r23], %r16 |
| 3366 | ibp_wait80_119: |
| 3367 | brnz %r16, ibp_wait80_119 |
| 3368 | ld [%r23], %r16 |
| 3369 | ba ibp_startwait80_119 |
| 3370 | mov 0x80, %r16 |
| 3371 | continue_ibp_80_119: |
| 3372 | sllx %r16, %r8, %r16 !Mask for my core only |
| 3373 | ldxa [0x58]%asi, %r17 !Running_status |
| 3374 | wait_for_stat_80_119: |
| 3375 | ldxa [0x50]%asi, %r13 !Running_rw |
| 3376 | cmp %r13, %r17 |
| 3377 | bne,a %xcc, wait_for_stat_80_119 |
| 3378 | ldxa [0x58]%asi, %r17 !Running_status |
| 3379 | stxa %r16, [0x68]%asi !Park (W1C) |
| 3380 | ldxa [0x50]%asi, %r14 !Running_rw |
| 3381 | wait_for_ibp_80_119: |
| 3382 | ldxa [0x58]%asi, %r17 !Running_status |
| 3383 | cmp %r14, %r17 |
| 3384 | bne,a %xcc, wait_for_ibp_80_119 |
| 3385 | ldxa [0x50]%asi, %r14 !Running_rw |
| 3386 | ibp_doit80_119: |
| 3387 | best_set_reg(0x0000004024e88b71,%r19, %r20) |
| 3388 | stxa %r20, [%r18]0x42 |
| 3389 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 3390 | st %g0, [%r23] !clear lock |
| 3391 | wr %r0, %r12, %asi !restore %asi |
| 3392 | ta T_CHANGE_NONHPRIV |
| 3393 | .word 0xa7a1c9aa ! 169: FDIVs fdivs %f7, %f10, %f19 |
| 3394 | .word 0x91520000 ! 170: RDPR_PIL rdpr %pil, %r8 |
| 3395 | mondo_80_120: |
| 3396 | nop |
| 3397 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 3398 | stxa %r10, [%r0+0x3d8] %asi |
| 3399 | .word 0x9d948010 ! 171: WRPR_WSTATE_R wrpr %r18, %r16, %wstate |
| 3400 | .word 0x8d802000 ! 172: WRFPRS_I wr %r0, 0x0000, %fprs |
| 3401 | .word 0xe08fe048 ! 173: LDUBA_I lduba [%r31, + 0x0048] %asi, %r16 |
| 3402 | setx 0xd26e5e523001acf3, %r1, %r28 |
| 3403 | stxa %r28, [%g0] 0x73 |
| 3404 | intvec_80_121: |
| 3405 | .word 0x39400001 ! 174: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 3406 | .word 0x92c4e348 ! 175: ADDCcc_I addccc %r19, 0x0348, %r9 |
| 3407 | ibp_80_122: |
| 3408 | nop |
| 3409 | ta T_CHANGE_HPRIV |
| 3410 | mov 8, %r18 |
| 3411 | rd %asi, %r12 |
| 3412 | wr %r0, 0x41, %asi |
| 3413 | set sync_thr_counter4, %r23 |
| 3414 | #ifndef SPC |
| 3415 | ldxa [%g0]0x63, %r8 |
| 3416 | and %r8, 0x38, %r8 ! Core ID |
| 3417 | add %r8, %r23, %r23 |
| 3418 | #else |
| 3419 | mov 0, %r8 |
| 3420 | #endif |
| 3421 | mov 0x80, %r16 |
| 3422 | ibp_startwait80_122: |
| 3423 | cas [%r23],%g0,%r16 !lock |
| 3424 | brz,a %r16, continue_ibp_80_122 |
| 3425 | mov (~0x80&0xf0), %r16 |
| 3426 | ld [%r23], %r16 |
| 3427 | ibp_wait80_122: |
| 3428 | brnz %r16, ibp_wait80_122 |
| 3429 | ld [%r23], %r16 |
| 3430 | ba ibp_startwait80_122 |
| 3431 | mov 0x80, %r16 |
| 3432 | continue_ibp_80_122: |
| 3433 | sllx %r16, %r8, %r16 !Mask for my core only |
| 3434 | ldxa [0x58]%asi, %r17 !Running_status |
| 3435 | wait_for_stat_80_122: |
| 3436 | ldxa [0x50]%asi, %r13 !Running_rw |
| 3437 | cmp %r13, %r17 |
| 3438 | bne,a %xcc, wait_for_stat_80_122 |
| 3439 | ldxa [0x58]%asi, %r17 !Running_status |
| 3440 | stxa %r16, [0x68]%asi !Park (W1C) |
| 3441 | ldxa [0x50]%asi, %r14 !Running_rw |
| 3442 | wait_for_ibp_80_122: |
| 3443 | ldxa [0x58]%asi, %r17 !Running_status |
| 3444 | cmp %r14, %r17 |
| 3445 | bne,a %xcc, wait_for_ibp_80_122 |
| 3446 | ldxa [0x50]%asi, %r14 !Running_rw |
| 3447 | ibp_doit80_122: |
| 3448 | best_set_reg(0x000000403acb7184,%r19, %r20) |
| 3449 | stxa %r20, [%r18]0x42 |
| 3450 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 3451 | st %g0, [%r23] !clear lock |
| 3452 | wr %r0, %r12, %asi !restore %asi |
| 3453 | .word 0xe19fe140 ! 176: LDDFA_I ldda [%r31, 0x0140], %f16 |
| 3454 | ibp_80_123: |
| 3455 | nop |
| 3456 | ta T_CHANGE_HPRIV |
| 3457 | mov 8, %r18 |
| 3458 | rd %asi, %r12 |
| 3459 | wr %r0, 0x41, %asi |
| 3460 | set sync_thr_counter4, %r23 |
| 3461 | #ifndef SPC |
| 3462 | ldxa [%g0]0x63, %r8 |
| 3463 | and %r8, 0x38, %r8 ! Core ID |
| 3464 | add %r8, %r23, %r23 |
| 3465 | #else |
| 3466 | mov 0, %r8 |
| 3467 | #endif |
| 3468 | mov 0x80, %r16 |
| 3469 | ibp_startwait80_123: |
| 3470 | cas [%r23],%g0,%r16 !lock |
| 3471 | brz,a %r16, continue_ibp_80_123 |
| 3472 | mov (~0x80&0xf0), %r16 |
| 3473 | ld [%r23], %r16 |
| 3474 | ibp_wait80_123: |
| 3475 | brnz %r16, ibp_wait80_123 |
| 3476 | ld [%r23], %r16 |
| 3477 | ba ibp_startwait80_123 |
| 3478 | mov 0x80, %r16 |
| 3479 | continue_ibp_80_123: |
| 3480 | sllx %r16, %r8, %r16 !Mask for my core only |
| 3481 | ldxa [0x58]%asi, %r17 !Running_status |
| 3482 | wait_for_stat_80_123: |
| 3483 | ldxa [0x50]%asi, %r13 !Running_rw |
| 3484 | cmp %r13, %r17 |
| 3485 | bne,a %xcc, wait_for_stat_80_123 |
| 3486 | ldxa [0x58]%asi, %r17 !Running_status |
| 3487 | stxa %r16, [0x68]%asi !Park (W1C) |
| 3488 | ldxa [0x50]%asi, %r14 !Running_rw |
| 3489 | wait_for_ibp_80_123: |
| 3490 | ldxa [0x58]%asi, %r17 !Running_status |
| 3491 | cmp %r14, %r17 |
| 3492 | bne,a %xcc, wait_for_ibp_80_123 |
| 3493 | ldxa [0x50]%asi, %r14 !Running_rw |
| 3494 | ibp_doit80_123: |
| 3495 | best_set_reg(0x00000040ecf184ab,%r19, %r20) |
| 3496 | stxa %r20, [%r18]0x42 |
| 3497 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 3498 | st %g0, [%r23] !clear lock |
| 3499 | wr %r0, %r12, %asi !restore %asi |
| 3500 | .word 0xe19fde00 ! 177: LDDFA_R ldda [%r31, %r0], %f16 |
| 3501 | ibp_80_124: |
| 3502 | nop |
| 3503 | ta T_CHANGE_HPRIV |
| 3504 | mov 8, %r18 |
| 3505 | rd %asi, %r12 |
| 3506 | wr %r0, 0x41, %asi |
| 3507 | set sync_thr_counter4, %r23 |
| 3508 | #ifndef SPC |
| 3509 | ldxa [%g0]0x63, %r8 |
| 3510 | and %r8, 0x38, %r8 ! Core ID |
| 3511 | add %r8, %r23, %r23 |
| 3512 | #else |
| 3513 | mov 0, %r8 |
| 3514 | #endif |
| 3515 | mov 0x80, %r16 |
| 3516 | ibp_startwait80_124: |
| 3517 | cas [%r23],%g0,%r16 !lock |
| 3518 | brz,a %r16, continue_ibp_80_124 |
| 3519 | mov (~0x80&0xf0), %r16 |
| 3520 | ld [%r23], %r16 |
| 3521 | ibp_wait80_124: |
| 3522 | brnz %r16, ibp_wait80_124 |
| 3523 | ld [%r23], %r16 |
| 3524 | ba ibp_startwait80_124 |
| 3525 | mov 0x80, %r16 |
| 3526 | continue_ibp_80_124: |
| 3527 | sllx %r16, %r8, %r16 !Mask for my core only |
| 3528 | ldxa [0x58]%asi, %r17 !Running_status |
| 3529 | wait_for_stat_80_124: |
| 3530 | ldxa [0x50]%asi, %r13 !Running_rw |
| 3531 | cmp %r13, %r17 |
| 3532 | bne,a %xcc, wait_for_stat_80_124 |
| 3533 | ldxa [0x58]%asi, %r17 !Running_status |
| 3534 | stxa %r16, [0x68]%asi !Park (W1C) |
| 3535 | ldxa [0x50]%asi, %r14 !Running_rw |
| 3536 | wait_for_ibp_80_124: |
| 3537 | ldxa [0x58]%asi, %r17 !Running_status |
| 3538 | cmp %r14, %r17 |
| 3539 | bne,a %xcc, wait_for_ibp_80_124 |
| 3540 | ldxa [0x50]%asi, %r14 !Running_rw |
| 3541 | ibp_doit80_124: |
| 3542 | best_set_reg(0x0000004011c4ab95,%r19, %r20) |
| 3543 | stxa %r20, [%r18]0x42 |
| 3544 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 3545 | st %g0, [%r23] !clear lock |
| 3546 | wr %r0, %r12, %asi !restore %asi |
| 3547 | .word 0xa3a189ad ! 178: FDIVs fdivs %f6, %f13, %f17 |
| 3548 | .word 0xe897e088 ! 179: LDUHA_I lduha [%r31, + 0x0088] %asi, %r20 |
| 3549 | fpinit_80_125: |
| 3550 | nop |
| 3551 | setx fp_data_quads, %r19, %r20 |
| 3552 | ldd [%r20], %f0 |
| 3553 | ldd [%r20+8], %f4 |
| 3554 | ld [%r20+16], %fsr |
| 3555 | ld [%r20+24], %r19 |
| 3556 | wr %r19, %g0, %gsr |
| 3557 | .word 0xc3e8234d ! 180: PREFETCHA_I prefetcha [%r0, + 0x034d] %asi, #one_read |
| 3558 | .word 0x8143e011 ! 181: MEMBAR membar #LoadLoad | #Lookaside |
| 3559 | ibp_80_127: |
| 3560 | nop |
| 3561 | ta T_CHANGE_HPRIV |
| 3562 | mov 8, %r18 |
| 3563 | rd %asi, %r12 |
| 3564 | wr %r0, 0x41, %asi |
| 3565 | set sync_thr_counter4, %r23 |
| 3566 | #ifndef SPC |
| 3567 | ldxa [%g0]0x63, %r8 |
| 3568 | and %r8, 0x38, %r8 ! Core ID |
| 3569 | add %r8, %r23, %r23 |
| 3570 | #else |
| 3571 | mov 0, %r8 |
| 3572 | #endif |
| 3573 | mov 0x80, %r16 |
| 3574 | ibp_startwait80_127: |
| 3575 | cas [%r23],%g0,%r16 !lock |
| 3576 | brz,a %r16, continue_ibp_80_127 |
| 3577 | mov (~0x80&0xf0), %r16 |
| 3578 | ld [%r23], %r16 |
| 3579 | ibp_wait80_127: |
| 3580 | brnz %r16, ibp_wait80_127 |
| 3581 | ld [%r23], %r16 |
| 3582 | ba ibp_startwait80_127 |
| 3583 | mov 0x80, %r16 |
| 3584 | continue_ibp_80_127: |
| 3585 | sllx %r16, %r8, %r16 !Mask for my core only |
| 3586 | ldxa [0x58]%asi, %r17 !Running_status |
| 3587 | wait_for_stat_80_127: |
| 3588 | ldxa [0x50]%asi, %r13 !Running_rw |
| 3589 | cmp %r13, %r17 |
| 3590 | bne,a %xcc, wait_for_stat_80_127 |
| 3591 | ldxa [0x58]%asi, %r17 !Running_status |
| 3592 | stxa %r16, [0x68]%asi !Park (W1C) |
| 3593 | ldxa [0x50]%asi, %r14 !Running_rw |
| 3594 | wait_for_ibp_80_127: |
| 3595 | ldxa [0x58]%asi, %r17 !Running_status |
| 3596 | cmp %r14, %r17 |
| 3597 | bne,a %xcc, wait_for_ibp_80_127 |
| 3598 | ldxa [0x50]%asi, %r14 !Running_rw |
| 3599 | ibp_doit80_127: |
| 3600 | best_set_reg(0x000000401aeb9583,%r19, %r20) |
| 3601 | stxa %r20, [%r18]0x42 |
| 3602 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 3603 | st %g0, [%r23] !clear lock |
| 3604 | wr %r0, %r12, %asi !restore %asi |
| 3605 | ta T_CHANGE_NONHPRIV |
| 3606 | .word 0xc19fda00 ! 182: LDDFA_R ldda [%r31, %r0], %f0 |
| 3607 | #if (defined SPC || defined CMP1) |
| 3608 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_128) + 40, 16, 16)) -> intp(2,0,2) |
| 3609 | #else |
| 3610 | setx 0xf92fe1a57c80c80f, %r1, %r28 |
| 3611 | stxa %r28, [%g0] 0x73 |
| 3612 | #endif |
| 3613 | intvec_80_128: |
| 3614 | .word 0x39400001 ! 183: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 3615 | intveclr_80_129: |
| 3616 | nop |
| 3617 | ta T_CHANGE_HPRIV |
| 3618 | setx 0x038d913809b58a44, %r1, %r28 |
| 3619 | stxa %r28, [%g0] 0x72 |
| 3620 | ta T_CHANGE_NONHPRIV |
| 3621 | .word 0x25400001 ! 184: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 3622 | dvapa_80_130: |
| 3623 | nop |
| 3624 | ta T_CHANGE_HPRIV |
| 3625 | mov 0xa07, %r20 |
| 3626 | mov 0x11, %r19 |
| 3627 | sllx %r20, 23, %r20 |
| 3628 | or %r19, %r20, %r19 |
| 3629 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 3630 | mov 0x38, %r18 |
| 3631 | stxa %r31, [%r18]0x58 |
| 3632 | ta T_CHANGE_NONHPRIV |
| 3633 | .word 0xe1bfe140 ! 185: STDFA_I stda %f16, [0x0140, %r31] |
| 3634 | mondo_80_131: |
| 3635 | nop |
| 3636 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 3637 | stxa %r16, [%r0+0x3e0] %asi |
| 3638 | .word 0x9d91c013 ! 186: WRPR_WSTATE_R wrpr %r7, %r19, %wstate |
| 3639 | .word 0xe877c000 ! 187: STX_R stx %r20, [%r31 + %r0] |
| 3640 | mondo_80_132: |
| 3641 | nop |
| 3642 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 3643 | stxa %r8, [%r0+0x3d0] %asi |
| 3644 | .word 0x9d948006 ! 188: WRPR_WSTATE_R wrpr %r18, %r6, %wstate |
| 3645 | mondo_80_133: |
| 3646 | nop |
| 3647 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 3648 | ta T_CHANGE_PRIV |
| 3649 | stxa %r16, [%r0+0x3c0] %asi |
| 3650 | .word 0x9d94c010 ! 189: WRPR_WSTATE_R wrpr %r19, %r16, %wstate |
| 3651 | memptr_80_134: |
| 3652 | set 0x60140000, %r31 |
| 3653 | .word 0x858072cb ! 190: WRCCR_I wr %r1, 0x12cb, %ccr |
| 3654 | splash_hpstate_80_135: |
| 3655 | .word 0x819828d5 ! 191: WRHPR_HPSTATE_I wrhpr %r0, 0x08d5, %hpstate |
| 3656 | .word 0xe937c000 ! 192: STQF_R - %f20, [%r0, %r31] |
| 3657 | splash_hpstate_80_136: |
| 3658 | .word 0x34800001 ! 1: BG bg,a <label_0x1> |
| 3659 | .word 0x81983599 ! 193: WRHPR_HPSTATE_I wrhpr %r0, 0x1599, %hpstate |
| 3660 | splash_hpstate_80_137: |
| 3661 | ta T_CHANGE_NONHPRIV |
| 3662 | .word 0x30800001 ! 1: BA ba,a <label_0x1> |
| 3663 | .word 0x819826c7 ! 194: WRHPR_HPSTATE_I wrhpr %r0, 0x06c7, %hpstate |
| 3664 | .word 0xc19fd920 ! 195: LDDFA_R ldda [%r31, %r0], %f0 |
| 3665 | .word 0x89800011 ! 196: WRTICK_R wr %r0, %r17, %tick |
| 3666 | intveclr_80_139: |
| 3667 | nop |
| 3668 | ta T_CHANGE_HPRIV |
| 3669 | setx 0x354d5c80b16d75c9, %r1, %r28 |
| 3670 | stxa %r28, [%g0] 0x72 |
| 3671 | ta T_CHANGE_NONHPRIV |
| 3672 | .word 0x25400001 ! 197: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 3673 | .word 0x89800011 ! 198: WRTICK_R wr %r0, %r17, %tick |
| 3674 | mondo_80_141: |
| 3675 | nop |
| 3676 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 3677 | stxa %r13, [%r0+0x3e8] %asi |
| 3678 | .word 0x9d950009 ! 199: WRPR_WSTATE_R wrpr %r20, %r9, %wstate |
| 3679 | splash_lsu_80_142: |
| 3680 | nop |
| 3681 | ta T_CHANGE_HPRIV |
| 3682 | set 0xde22e983, %r2 |
| 3683 | mov 0x2, %r1 |
| 3684 | sllx %r1, 32, %r1 |
| 3685 | or %r1, %r2, %r2 |
| 3686 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 3687 | .word 0x3d400001 ! 200: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 3688 | change_to_randtl_80_143: |
| 3689 | ta T_CHANGE_HPRIV ! macro |
| 3690 | done_change_to_randtl_80_143: |
| 3691 | .word 0x8f902000 ! 201: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 3692 | nop |
| 3693 | nop |
| 3694 | ta T_CHANGE_PRIV |
| 3695 | wrpr %g0, %g0, %gl |
| 3696 | nop |
| 3697 | nop |
| 3698 | setx join_lbl_0_0, %g1, %g2 |
| 3699 | jmp %g2 |
| 3700 | nop |
| 3701 | fork_lbl_0_7: |
| 3702 | ta T_CHANGE_NONHPRIV |
| 3703 | mondo_40_0: |
| 3704 | nop |
| 3705 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 3706 | ta T_CHANGE_PRIV |
| 3707 | stxa %r9, [%r0+0x3e0] %asi |
| 3708 | .word 0x9d94000a ! 1: WRPR_WSTATE_R wrpr %r16, %r10, %wstate |
| 3709 | trapasi_40_1: |
| 3710 | nop |
| 3711 | mov 0x3e8, %r1 ! (VA for ASI 0x25) |
| 3712 | .word 0xd0c044a0 ! 2: LDSWA_R ldswa [%r1, %r0] 0x25, %r8 |
| 3713 | splash_cmpr_40_2: |
| 3714 | mov 0, %r18 |
| 3715 | sllx %r18, 63, %r18 |
| 3716 | rd %tick, %r17 |
| 3717 | add %r17, 0x70, %r17 |
| 3718 | or %r17, %r18, %r17 |
| 3719 | ta T_CHANGE_HPRIV |
| 3720 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 3721 | .word 0xaf800011 ! 3: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 3722 | change_to_randtl_40_3: |
| 3723 | ta T_CHANGE_HPRIV ! macro |
| 3724 | done_change_to_randtl_40_3: |
| 3725 | .word 0x8f902002 ! 4: WRPR_TL_I wrpr %r0, 0x0002, %tl |
| 3726 | .word 0xd077c000 ! 5: STX_R stx %r8, [%r31 + %r0] |
| 3727 | splash_cmpr_40_4: |
| 3728 | mov 1, %r18 |
| 3729 | sllx %r18, 63, %r18 |
| 3730 | rd %tick, %r17 |
| 3731 | add %r17, 0x100, %r17 |
| 3732 | or %r17, %r18, %r17 |
| 3733 | ta T_CHANGE_PRIV |
| 3734 | .word 0xb3800011 ! 6: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 3735 | splash_decr_40_5: |
| 3736 | nop |
| 3737 | ta T_CHANGE_HPRIV |
| 3738 | mov 8, %r1 |
| 3739 | stxa %r0, [%r1] 0x45 |
| 3740 | .word 0xa784400d ! 7: WR_GRAPHICS_STATUS_REG_R wr %r17, %r13, %- |
| 3741 | .word 0xd07fe1b0 ! 8: SWAP_I swap %r8, [%r31 + 0x01b0] |
| 3742 | .word 0x91918012 ! 9: WRPR_PIL_R wrpr %r6, %r18, %pil |
| 3743 | brcommon3_40_7: |
| 3744 | nop |
| 3745 | setx common_target, %r12, %r27 |
| 3746 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 3747 | ba,a .+12 |
| 3748 | .word 0xd1e7c032 ! 1: CASA_I casa [%r31] 0x 1, %r18, %r8 |
| 3749 | ba,a .+8 |
| 3750 | jmpl %r27+0, %r27 |
| 3751 | .word 0xd1e7e010 ! 10: CASA_R casa [%r31] %asi, %r16, %r8 |
| 3752 | nop |
| 3753 | ta T_CHANGE_HPRIV ! macro |
| 3754 | donret_40_8: |
| 3755 | rd %pc, %r12 |
| 3756 | add %r12, (donretarg_40_8-donret_40_8), %r12 |
| 3757 | add %r12, 0x4, %r11 ! seq tnpc |
| 3758 | wrpr %g0, 0x2, %tl |
| 3759 | wrpr %g0, %r12, %tpc |
| 3760 | wrpr %g0, %r11, %tnpc |
| 3761 | set (0x00481100 | (0x8a << 24)), %r13 |
| 3762 | and %r12, 0xfff, %r14 |
| 3763 | sllx %r14, 30, %r14 |
| 3764 | or %r13, %r14, %r20 |
| 3765 | wrpr %r20, %g0, %tstate |
| 3766 | wrhpr %g0, 0x1dcf, %htstate |
| 3767 | ta T_CHANGE_NONPRIV ! rand=0 (40) |
| 3768 | .word 0x25400001 ! 1: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 3769 | retry |
| 3770 | donretarg_40_8: |
| 3771 | .word 0xd06fe0e0 ! 11: LDSTUB_I ldstub %r8, [%r31 + 0x00e0] |
| 3772 | .word 0xab820001 ! 12: WR_CLEAR_SOFTINT_R wr %r8, %r1, %clear_softint |
| 3773 | dvapa_40_9: |
| 3774 | nop |
| 3775 | ta T_CHANGE_HPRIV |
| 3776 | mov 0x96f, %r20 |
| 3777 | mov 0x17, %r19 |
| 3778 | sllx %r20, 23, %r20 |
| 3779 | or %r19, %r20, %r19 |
| 3780 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 3781 | mov 0x38, %r18 |
| 3782 | stxa %r31, [%r18]0x58 |
| 3783 | ta T_CHANGE_NONHPRIV |
| 3784 | .word 0xd09fe150 ! 13: LDDA_I ldda [%r31, + 0x0150] %asi, %r8 |
| 3785 | .word 0xa96c400c ! 14: SDIVX_R sdivx %r17, %r12, %r20 |
| 3786 | nop |
| 3787 | ta T_CHANGE_HPRIV |
| 3788 | mov 0x40+1, %r10 |
| 3789 | set sync_thr_counter5, %r23 |
| 3790 | #ifndef SPC |
| 3791 | ldxa [%g0]0x63, %o1 |
| 3792 | and %o1, 0x38, %o1 |
| 3793 | add %o1, %r23, %r23 |
| 3794 | sllx %o1, 5, %o3 !(CID*256) |
| 3795 | #endif |
| 3796 | cas [%r23],%g0,%r10 !lock |
| 3797 | brnz %r10, cwq_40_10 |
| 3798 | rd %asi, %r12 |
| 3799 | wr %g0, 0x40, %asi |
| 3800 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 3801 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 3802 | cmp %l1, 1 |
| 3803 | bne cwq_40_10 |
| 3804 | set CWQ_BASE, %l6 |
| 3805 | #ifndef SPC |
| 3806 | add %l6, %o3, %l6 |
| 3807 | #endif |
| 3808 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 3809 | best_set_reg(0x20610020, %l1, %l2) !# Control Word |
| 3810 | sllx %l2, 32, %l2 |
| 3811 | stx %l2, [%l6 + 0x0] |
| 3812 | membar #Sync |
| 3813 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 3814 | sub %l2, 0x40, %l2 |
| 3815 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 3816 | wr %r12, %g0, %asi |
| 3817 | st %g0, [%r23] |
| 3818 | cwq_40_10: |
| 3819 | ta T_CHANGE_NONHPRIV |
| 3820 | .word 0x97414000 ! 15: RDPC rd %pc, %r11 |
| 3821 | .word 0xe48008a0 ! 16: LDUWA_R lduwa [%r0, %r0] 0x45, %r18 |
| 3822 | nop |
| 3823 | ta T_CHANGE_HPRIV |
| 3824 | mov 0x40, %r10 |
| 3825 | set sync_thr_counter6, %r23 |
| 3826 | #ifndef SPC |
| 3827 | ldxa [%g0]0x63, %o1 |
| 3828 | and %o1, 0x38, %o1 |
| 3829 | add %o1, %r23, %r23 |
| 3830 | #endif |
| 3831 | cas [%r23],%g0,%r10 !lock |
| 3832 | brnz %r10, sma_40_11 |
| 3833 | rd %asi, %r12 |
| 3834 | wr %g0, 0x40, %asi |
| 3835 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 3836 | set 0x00161fff, %g1 |
| 3837 | stxa %g1, [%g0 + 0x80] %asi |
| 3838 | wr %r12, %g0, %asi |
| 3839 | st %g0, [%r23] |
| 3840 | sma_40_11: |
| 3841 | ta T_CHANGE_NONHPRIV |
| 3842 | .word 0xe5e7e00d ! 17: CASA_R casa [%r31] %asi, %r13, %r18 |
| 3843 | brcommon1_40_12: |
| 3844 | nop |
| 3845 | setx common_target, %r12, %r27 |
| 3846 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 3847 | ba,a .+12 |
| 3848 | .word 0xc32fe060 ! 1: STXFSR_I st-sfr %f1, [0x0060, %r31] |
| 3849 | ba,a .+8 |
| 3850 | jmpl %r27+0, %r27 |
| 3851 | .word 0x9f802d3e ! 18: SIR sir 0x0d3e |
| 3852 | .word 0x8d902c23 ! 19: WRPR_PSTATE_I wrpr %r0, 0x0c23, %pstate |
| 3853 | #if (defined SPC || defined CMP1) |
| 3854 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_14) + 0, 16, 16)) -> intp(2,0,1) |
| 3855 | #else |
| 3856 | setx 0x2c4d904b047dff01, %r1, %r28 |
| 3857 | stxa %r28, [%g0] 0x73 |
| 3858 | #endif |
| 3859 | intvec_40_14: |
| 3860 | .word 0x39400001 ! 20: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 3861 | splash_tba_40_15: |
| 3862 | nop |
| 3863 | ta T_CHANGE_PRIV |
| 3864 | setx 0x0000000400380000, %r11, %r12 |
| 3865 | .word 0x8b90000c ! 21: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 3866 | splash_decr_40_16: |
| 3867 | nop |
| 3868 | ta T_CHANGE_HPRIV |
| 3869 | mov 8, %r1 |
| 3870 | stxa %r0, [%r1] 0x45 |
| 3871 | .word 0xa7814005 ! 22: WR_GRAPHICS_STATUS_REG_R wr %r5, %r5, %- |
| 3872 | intveclr_40_17: |
| 3873 | nop |
| 3874 | ta T_CHANGE_HPRIV |
| 3875 | setx 0xf22e6f8c142fbb71, %r1, %r28 |
| 3876 | stxa %r28, [%g0] 0x72 |
| 3877 | ta T_CHANGE_NONHPRIV |
| 3878 | .word 0x25400001 ! 23: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 3879 | trapasi_40_18: |
| 3880 | nop |
| 3881 | mov 0x8, %r1 ! (VA for ASI 0x4c) |
| 3882 | .word 0xd4d84980 ! 24: LDXA_R ldxa [%r1, %r0] 0x4c, %r10 |
| 3883 | nop |
| 3884 | mov 0x80, %g3 |
| 3885 | stxa %g3, [%g3] 0x5f |
| 3886 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 |
| 3887 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate |
| 3888 | .word 0xd45fc000 ! 25: LDX_R ldx [%r31 + %r0], %r10 |
| 3889 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 3890 | reduce_priv_lvl_40_19: |
| 3891 | ta T_CHANGE_NONPRIV ! macro |
| 3892 | intveclr_40_20: |
| 3893 | nop |
| 3894 | ta T_CHANGE_HPRIV |
| 3895 | setx 0x3ed7c2ca3b5596f7, %r1, %r28 |
| 3896 | stxa %r28, [%g0] 0x72 |
| 3897 | .word 0x25400001 ! 27: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 3898 | intveclr_40_21: |
| 3899 | nop |
| 3900 | ta T_CHANGE_HPRIV |
| 3901 | setx 0x34bbf0f2b6f2e9ae, %r1, %r28 |
| 3902 | stxa %r28, [%g0] 0x72 |
| 3903 | ta T_CHANGE_NONHPRIV |
| 3904 | .word 0x25400001 ! 28: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 3905 | nop |
| 3906 | mov 0x80, %g3 |
| 3907 | stxa %g3, [%g3] 0x57 |
| 3908 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 |
| 3909 | .word 0xd45fc000 ! 29: LDX_R ldx [%r31 + %r0], %r10 |
| 3910 | brcommon3_40_22: |
| 3911 | nop |
| 3912 | setx common_target, %r12, %r27 |
| 3913 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 3914 | ba,a .+12 |
| 3915 | .word 0xd46fe020 ! 1: LDSTUB_I ldstub %r10, [%r31 + 0x0020] |
| 3916 | ba,a .+8 |
| 3917 | jmpl %r27+0, %r27 |
| 3918 | .word 0xd4bfc030 ! 30: STDA_R stda %r10, [%r31 + %r16] 0x01 |
| 3919 | nop |
| 3920 | ta T_CHANGE_HPRIV |
| 3921 | mov 0x40+1, %r10 |
| 3922 | set sync_thr_counter5, %r23 |
| 3923 | #ifndef SPC |
| 3924 | ldxa [%g0]0x63, %o1 |
| 3925 | and %o1, 0x38, %o1 |
| 3926 | add %o1, %r23, %r23 |
| 3927 | sllx %o1, 5, %o3 !(CID*256) |
| 3928 | #endif |
| 3929 | cas [%r23],%g0,%r10 !lock |
| 3930 | brnz %r10, cwq_40_23 |
| 3931 | rd %asi, %r12 |
| 3932 | wr %g0, 0x40, %asi |
| 3933 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 3934 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 3935 | cmp %l1, 1 |
| 3936 | bne cwq_40_23 |
| 3937 | set CWQ_BASE, %l6 |
| 3938 | #ifndef SPC |
| 3939 | add %l6, %o3, %l6 |
| 3940 | #endif |
| 3941 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 3942 | best_set_reg(0x20610040, %l1, %l2) !# Control Word |
| 3943 | sllx %l2, 32, %l2 |
| 3944 | stx %l2, [%l6 + 0x0] |
| 3945 | membar #Sync |
| 3946 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 3947 | sub %l2, 0x40, %l2 |
| 3948 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 3949 | wr %r12, %g0, %asi |
| 3950 | st %g0, [%r23] |
| 3951 | cwq_40_23: |
| 3952 | ta T_CHANGE_NONHPRIV |
| 3953 | .word 0xa7414000 ! 31: RDPC rd %pc, %r19 |
| 3954 | .word 0x879c6c67 ! 32: WRHPR_HINTP_I wrhpr %r17, 0x0c67, %hintp |
| 3955 | .word 0xd497e0f0 ! 33: LDUHA_I lduha [%r31, + 0x00f0] %asi, %r10 |
| 3956 | iaw_40_24: |
| 3957 | nop |
| 3958 | ta T_CHANGE_HPRIV |
| 3959 | mov 8, %r18 |
| 3960 | rd %asi, %r12 |
| 3961 | wr %r0, 0x41, %asi |
| 3962 | set sync_thr_counter4, %r23 |
| 3963 | #ifndef SPC |
| 3964 | ldxa [%g0]0x63, %r8 |
| 3965 | and %r8, 0x38, %r8 ! Core ID |
| 3966 | add %r8, %r23, %r23 |
| 3967 | #else |
| 3968 | mov 0, %r8 |
| 3969 | #endif |
| 3970 | mov 0x40, %r16 |
| 3971 | iaw_startwait40_24: |
| 3972 | cas [%r23],%g0,%r16 !lock |
| 3973 | brz,a %r16, continue_iaw_40_24 |
| 3974 | mov (~0x40&0xf0), %r16 |
| 3975 | ld [%r23], %r16 |
| 3976 | iaw_wait40_24: |
| 3977 | brnz %r16, iaw_wait40_24 |
| 3978 | ld [%r23], %r16 |
| 3979 | ba iaw_startwait40_24 |
| 3980 | mov 0x40, %r16 |
| 3981 | continue_iaw_40_24: |
| 3982 | sllx %r16, %r8, %r16 !Mask for my core only |
| 3983 | ldxa [0x58]%asi, %r17 !Running_status |
| 3984 | wait_for_stat_40_24: |
| 3985 | ldxa [0x50]%asi, %r13 !Running_rw |
| 3986 | cmp %r13, %r17 |
| 3987 | bne,a %xcc, wait_for_stat_40_24 |
| 3988 | ldxa [0x58]%asi, %r17 !Running_status |
| 3989 | stxa %r16, [0x68]%asi !Park (W1C) |
| 3990 | ldxa [0x50]%asi, %r14 !Running_rw |
| 3991 | wait_for_iaw_40_24: |
| 3992 | ldxa [0x58]%asi, %r17 !Running_status |
| 3993 | cmp %r14, %r17 |
| 3994 | bne,a %xcc, wait_for_iaw_40_24 |
| 3995 | ldxa [0x50]%asi, %r14 !Running_rw |
| 3996 | iaw_doit40_24: |
| 3997 | mov 0x38, %r18 |
| 3998 | iaw0_40_24: |
| 3999 | rd %pc, %r19 |
| 4000 | add %r19, (16+1), %r19 |
| 4001 | stxa %r19, [%r18]0x50 |
| 4002 | stxa %r16, [0x60] %asi ! Unpark (W1S) |
| 4003 | st %g0, [%r23] !clear lock |
| 4004 | wr %r0, %r12, %asi ! restore %asi |
| 4005 | ta T_CHANGE_NONHPRIV |
| 4006 | .word 0xd49fc02d ! 34: LDDA_R ldda [%r31, %r13] 0x01, %r10 |
| 4007 | splash_lsu_40_25: |
| 4008 | nop |
| 4009 | ta T_CHANGE_HPRIV |
| 4010 | set 0x56747e16, %r2 |
| 4011 | mov 0x6, %r1 |
| 4012 | sllx %r1, 32, %r1 |
| 4013 | or %r1, %r2, %r2 |
| 4014 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 4015 | ta T_CHANGE_NONHPRIV |
| 4016 | .word 0x3d400001 ! 35: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 4017 | splash_decr_40_26: |
| 4018 | nop |
| 4019 | ta T_CHANGE_HPRIV |
| 4020 | mov 8, %r1 |
| 4021 | stxa %r0, [%r1] 0x45 |
| 4022 | .word 0xa7844005 ! 36: WR_GRAPHICS_STATUS_REG_R wr %r17, %r5, %- |
| 4023 | nop |
| 4024 | ta T_CHANGE_HPRIV ! macro |
| 4025 | donret_40_27: |
| 4026 | rd %pc, %r12 |
| 4027 | add %r12, (donretarg_40_27-donret_40_27), %r12 |
| 4028 | add %r12, 0x4, %r11 ! seq tnpc |
| 4029 | wrpr %g0, 0x2, %tl |
| 4030 | wrpr %g0, %r12, %tpc |
| 4031 | wrpr %g0, %r11, %tnpc |
| 4032 | set (0x001bc200 | (16 << 24)), %r13 |
| 4033 | and %r12, 0xfff, %r14 |
| 4034 | sllx %r14, 30, %r14 |
| 4035 | or %r13, %r14, %r20 |
| 4036 | wrpr %r20, %g0, %tstate |
| 4037 | wrhpr %g0, 0xc84, %htstate |
| 4038 | ta T_CHANGE_NONHPRIV ! rand=1 (40) |
| 4039 | .word 0x2a800001 ! 1: BCS bcs,a <label_0x1> |
| 4040 | done |
| 4041 | donretarg_40_27: |
| 4042 | .word 0x2d400001 ! 37: FBPG fbg,a,pn %fcc0, <label_0x1> |
| 4043 | #if (defined SPC || defined CMP1) |
| 4044 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_28) + 0, 16, 16)) -> intp(3,0,23) |
| 4045 | #else |
| 4046 | setx 0x753f4b57a2ed427d, %r1, %r28 |
| 4047 | stxa %r28, [%g0] 0x73 |
| 4048 | #endif |
| 4049 | intvec_40_28: |
| 4050 | .word 0x39400001 ! 38: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 4051 | .word 0x91940007 ! 39: WRPR_PIL_R wrpr %r16, %r7, %pil |
| 4052 | nop |
| 4053 | ta T_CHANGE_HPRIV |
| 4054 | mov 0x40, %r10 |
| 4055 | set sync_thr_counter6, %r23 |
| 4056 | #ifndef SPC |
| 4057 | ldxa [%g0]0x63, %o1 |
| 4058 | and %o1, 0x38, %o1 |
| 4059 | add %o1, %r23, %r23 |
| 4060 | #endif |
| 4061 | cas [%r23],%g0,%r10 !lock |
| 4062 | brnz %r10, sma_40_30 |
| 4063 | rd %asi, %r12 |
| 4064 | wr %g0, 0x40, %asi |
| 4065 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 4066 | set 0x001e1fff, %g1 |
| 4067 | stxa %g1, [%g0 + 0x80] %asi |
| 4068 | wr %r12, %g0, %asi |
| 4069 | st %g0, [%r23] |
| 4070 | sma_40_30: |
| 4071 | ta T_CHANGE_NONHPRIV |
| 4072 | .word 0xd5e7e00d ! 40: CASA_R casa [%r31] %asi, %r13, %r10 |
| 4073 | .word 0xd497e1a0 ! 41: LDUHA_I lduha [%r31, + 0x01a0] %asi, %r10 |
| 4074 | .word 0x8d802004 ! 42: WRFPRS_I wr %r0, 0x0004, %fprs |
| 4075 | intveclr_40_31: |
| 4076 | nop |
| 4077 | ta T_CHANGE_HPRIV |
| 4078 | setx 0x2a61f97cf4864315, %r1, %r28 |
| 4079 | stxa %r28, [%g0] 0x72 |
| 4080 | ta T_CHANGE_NONHPRIV |
| 4081 | .word 0x25400001 ! 43: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 4082 | splash_decr_40_32: |
| 4083 | nop |
| 4084 | ta T_CHANGE_HPRIV |
| 4085 | mov 8, %r1 |
| 4086 | stxa %r0, [%r1] 0x45 |
| 4087 | .word 0xa781000c ! 44: WR_GRAPHICS_STATUS_REG_R wr %r4, %r12, %- |
| 4088 | .word 0x8143e011 ! 45: MEMBAR membar #LoadLoad | #Lookaside |
| 4089 | fpinit_40_34: |
| 4090 | nop |
| 4091 | setx fp_data_quads, %r19, %r20 |
| 4092 | ldd [%r20], %f0 |
| 4093 | ldd [%r20+8], %f4 |
| 4094 | ld [%r20+16], %fsr |
| 4095 | ld [%r20+24], %r19 |
| 4096 | wr %r19, %g0, %gsr |
| 4097 | .word 0x89a009c4 ! 46: FDIVd fdivd %f0, %f4, %f4 |
| 4098 | invtsb_40_35: |
| 4099 | nop |
| 4100 | ta T_CHANGE_HPRIV |
| 4101 | rd %asi, %r21 |
| 4102 | wr %r0,ASI_MMU_REAL_RANGE, %asi |
| 4103 | mov 1, %r20 |
| 4104 | sllx %r20, 63, %r20 |
| 4105 | ldxa [ASI_MMU_REAL_RANGE_0] %asi, %r22 |
| 4106 | xor %r22 ,%r20, %r22 |
| 4107 | stxa %r22, [ASI_MMU_REAL_RANGE_0] %asi |
| 4108 | ldxa [ASI_MMU_REAL_RANGE_1] %asi, %r22 |
| 4109 | xor %r22 ,%r20, %r22 |
| 4110 | stxa %r22, [ASI_MMU_REAL_RANGE_1] %asi |
| 4111 | ldxa [ASI_MMU_REAL_RANGE_2] %asi, %r22 |
| 4112 | xor %r22 ,%r20, %r22 |
| 4113 | stxa %r22, [ASI_MMU_REAL_RANGE_2] %asi |
| 4114 | ldxa [ASI_MMU_REAL_RANGE_3] %asi, %r22 |
| 4115 | xor %r22 ,%r20, %r22 |
| 4116 | stxa %r22, [ASI_MMU_REAL_RANGE_3] %asi |
| 4117 | wr %r21, %r0, %asi |
| 4118 | ta T_CHANGE_NONHPRIV |
| 4119 | .word 0x29800001 ! 47: FBL fbl,a <label_0x1> |
| 4120 | splash_hpstate_40_36: |
| 4121 | .word 0x30800001 ! 1: BA ba,a <label_0x1> |
| 4122 | .word 0x81983195 ! 48: WRHPR_HPSTATE_I wrhpr %r0, 0x1195, %hpstate |
| 4123 | nop |
| 4124 | ta T_CHANGE_HPRIV |
| 4125 | mov 0x40+1, %r10 |
| 4126 | set sync_thr_counter5, %r23 |
| 4127 | #ifndef SPC |
| 4128 | ldxa [%g0]0x63, %o1 |
| 4129 | and %o1, 0x38, %o1 |
| 4130 | add %o1, %r23, %r23 |
| 4131 | sllx %o1, 5, %o3 !(CID*256) |
| 4132 | #endif |
| 4133 | cas [%r23],%g0,%r10 !lock |
| 4134 | brnz %r10, cwq_40_37 |
| 4135 | rd %asi, %r12 |
| 4136 | wr %g0, 0x40, %asi |
| 4137 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 4138 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 4139 | cmp %l1, 1 |
| 4140 | bne cwq_40_37 |
| 4141 | set CWQ_BASE, %l6 |
| 4142 | #ifndef SPC |
| 4143 | add %l6, %o3, %l6 |
| 4144 | #endif |
| 4145 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 4146 | best_set_reg(0x206100d0, %l1, %l2) !# Control Word |
| 4147 | sllx %l2, 32, %l2 |
| 4148 | stx %l2, [%l6 + 0x0] |
| 4149 | membar #Sync |
| 4150 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 4151 | sub %l2, 0x40, %l2 |
| 4152 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 4153 | wr %r12, %g0, %asi |
| 4154 | st %g0, [%r23] |
| 4155 | cwq_40_37: |
| 4156 | ta T_CHANGE_NONHPRIV |
| 4157 | .word 0xa1414000 ! 49: RDPC rd %pc, %r16 |
| 4158 | splash_hpstate_40_38: |
| 4159 | ta T_CHANGE_NONHPRIV |
| 4160 | .word 0x8198228c ! 50: WRHPR_HPSTATE_I wrhpr %r0, 0x028c, %hpstate |
| 4161 | .word 0xc30fc000 ! 51: LDXFSR_R ld-fsr [%r31, %r0], %f1 |
| 4162 | invalw |
| 4163 | mov 0x34, %r30 |
| 4164 | .word 0x83d0001e ! 52: Tcc_R te icc_or_xcc, %r0 + %r30 |
| 4165 | splash_cmpr_40_40: |
| 4166 | mov 0, %r18 |
| 4167 | sllx %r18, 63, %r18 |
| 4168 | rd %tick, %r17 |
| 4169 | add %r17, 0x80, %r17 |
| 4170 | or %r17, %r18, %r17 |
| 4171 | .word 0xb3800011 ! 53: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 4172 | setx 0x1926925dbef8bac5, %r1, %r28 |
| 4173 | stxa %r28, [%g0] 0x73 |
| 4174 | intvec_40_41: |
| 4175 | .word 0x39400001 ! 54: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 4176 | trapasi_40_42: |
| 4177 | nop |
| 4178 | mov 0x0, %r1 ! (VA for ASI 0x73) |
| 4179 | .word 0xe4c84e60 ! 55: LDSBA_R ldsba [%r1, %r0] 0x73, %r18 |
| 4180 | memptr_40_43: |
| 4181 | set 0x60340000, %r31 |
| 4182 | .word 0x85852baf ! 56: WRCCR_I wr %r20, 0x0baf, %ccr |
| 4183 | memptr_40_44: |
| 4184 | set 0x60340000, %r31 |
| 4185 | .word 0x85833b79 ! 57: WRCCR_I wr %r12, 0x1b79, %ccr |
| 4186 | .word 0xa1a48d33 ! 58: FsMULd fsmuld %f18, %f50, %f16 |
| 4187 | nop |
| 4188 | ta T_CHANGE_HPRIV ! macro |
| 4189 | donret_40_45: |
| 4190 | rd %pc, %r12 |
| 4191 | add %r12, (donretarg_40_45-donret_40_45+4), %r12 |
| 4192 | add %r12, 0x4, %r11 ! seq tnpc |
| 4193 | wrpr %g0, 0x2, %tl |
| 4194 | wrpr %g0, %r12, %tpc |
| 4195 | wrpr %g0, %r11, %tnpc |
| 4196 | set (0x00b78a00 | (0x4f << 24)), %r13 |
| 4197 | and %r12, 0xfff, %r14 |
| 4198 | sllx %r14, 30, %r14 |
| 4199 | or %r13, %r14, %r20 |
| 4200 | wrpr %r20, %g0, %tstate |
| 4201 | wrhpr %g0, 0x1706, %htstate |
| 4202 | ta T_CHANGE_NONHPRIV ! rand=1 (40) |
| 4203 | done |
| 4204 | donretarg_40_45: |
| 4205 | .word 0xd4ffe126 ! 59: SWAPA_I swapa %r10, [%r31 + 0x0126] %asi |
| 4206 | iaw_40_46: |
| 4207 | nop |
| 4208 | ta T_CHANGE_HPRIV |
| 4209 | mov 8, %r18 |
| 4210 | rd %asi, %r12 |
| 4211 | wr %r0, 0x41, %asi |
| 4212 | set sync_thr_counter4, %r23 |
| 4213 | #ifndef SPC |
| 4214 | ldxa [%g0]0x63, %r8 |
| 4215 | and %r8, 0x38, %r8 ! Core ID |
| 4216 | add %r8, %r23, %r23 |
| 4217 | #else |
| 4218 | mov 0, %r8 |
| 4219 | #endif |
| 4220 | mov 0x40, %r16 |
| 4221 | iaw_startwait40_46: |
| 4222 | cas [%r23],%g0,%r16 !lock |
| 4223 | brz,a %r16, continue_iaw_40_46 |
| 4224 | mov (~0x40&0xf0), %r16 |
| 4225 | ld [%r23], %r16 |
| 4226 | iaw_wait40_46: |
| 4227 | brnz %r16, iaw_wait40_46 |
| 4228 | ld [%r23], %r16 |
| 4229 | ba iaw_startwait40_46 |
| 4230 | mov 0x40, %r16 |
| 4231 | continue_iaw_40_46: |
| 4232 | sllx %r16, %r8, %r16 !Mask for my core only |
| 4233 | ldxa [0x58]%asi, %r17 !Running_status |
| 4234 | wait_for_stat_40_46: |
| 4235 | ldxa [0x50]%asi, %r13 !Running_rw |
| 4236 | cmp %r13, %r17 |
| 4237 | bne,a %xcc, wait_for_stat_40_46 |
| 4238 | ldxa [0x58]%asi, %r17 !Running_status |
| 4239 | stxa %r16, [0x68]%asi !Park (W1C) |
| 4240 | ldxa [0x50]%asi, %r14 !Running_rw |
| 4241 | wait_for_iaw_40_46: |
| 4242 | ldxa [0x58]%asi, %r17 !Running_status |
| 4243 | cmp %r14, %r17 |
| 4244 | bne,a %xcc, wait_for_iaw_40_46 |
| 4245 | ldxa [0x50]%asi, %r14 !Running_rw |
| 4246 | iaw_doit40_46: |
| 4247 | mov 0x38, %r18 |
| 4248 | iaw4_40_46: |
| 4249 | setx common_target, %r20, %r19 |
| 4250 | or %r19, 0x1, %r19 |
| 4251 | stxa %r19, [%r18]0x50 |
| 4252 | stxa %r16, [0x60] %asi ! Unpark (W1S) |
| 4253 | st %g0, [%r23] !clear lock |
| 4254 | wr %r0, %r12, %asi ! restore %asi |
| 4255 | ta T_CHANGE_NONHPRIV |
| 4256 | .word 0x91702cb7 ! 60: POPC_I popc 0x0cb7, %r8 |
| 4257 | splash_tba_40_47: |
| 4258 | nop |
| 4259 | ta T_CHANGE_PRIV |
| 4260 | setx 0x0000000400380000, %r11, %r12 |
| 4261 | .word 0x8b90000c ! 61: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 4262 | ibp_40_48: |
| 4263 | nop |
| 4264 | ta T_CHANGE_NONHPRIV |
| 4265 | .word 0x9ba509d4 ! 62: FDIVd fdivd %f20, %f20, %f44 |
| 4266 | .word 0x97450000 ! 63: RD_SET_SOFTINT rd %set_softint, %r11 |
| 4267 | .word 0xd677c000 ! 64: STX_R stx %r11, [%r31 + %r0] |
| 4268 | .word 0xd71fe1f0 ! 65: LDDF_I ldd [%r31, 0x01f0], %f11 |
| 4269 | memptr_40_49: |
| 4270 | set 0x60540000, %r31 |
| 4271 | .word 0x85847554 ! 66: WRCCR_I wr %r17, 0x1554, %ccr |
| 4272 | .word 0x81b01021 ! 67: SIAM siam 1 |
| 4273 | iaw_40_50: |
| 4274 | nop |
| 4275 | ta T_CHANGE_HPRIV |
| 4276 | mov 8, %r18 |
| 4277 | rd %asi, %r12 |
| 4278 | wr %r0, 0x41, %asi |
| 4279 | set sync_thr_counter4, %r23 |
| 4280 | #ifndef SPC |
| 4281 | ldxa [%g0]0x63, %r8 |
| 4282 | and %r8, 0x38, %r8 ! Core ID |
| 4283 | add %r8, %r23, %r23 |
| 4284 | #else |
| 4285 | mov 0, %r8 |
| 4286 | #endif |
| 4287 | mov 0x40, %r16 |
| 4288 | iaw_startwait40_50: |
| 4289 | cas [%r23],%g0,%r16 !lock |
| 4290 | brz,a %r16, continue_iaw_40_50 |
| 4291 | mov (~0x40&0xf0), %r16 |
| 4292 | ld [%r23], %r16 |
| 4293 | iaw_wait40_50: |
| 4294 | brnz %r16, iaw_wait40_50 |
| 4295 | ld [%r23], %r16 |
| 4296 | ba iaw_startwait40_50 |
| 4297 | mov 0x40, %r16 |
| 4298 | continue_iaw_40_50: |
| 4299 | sllx %r16, %r8, %r16 !Mask for my core only |
| 4300 | ldxa [0x58]%asi, %r17 !Running_status |
| 4301 | wait_for_stat_40_50: |
| 4302 | ldxa [0x50]%asi, %r13 !Running_rw |
| 4303 | cmp %r13, %r17 |
| 4304 | bne,a %xcc, wait_for_stat_40_50 |
| 4305 | ldxa [0x58]%asi, %r17 !Running_status |
| 4306 | stxa %r16, [0x68]%asi !Park (W1C) |
| 4307 | ldxa [0x50]%asi, %r14 !Running_rw |
| 4308 | wait_for_iaw_40_50: |
| 4309 | ldxa [0x58]%asi, %r17 !Running_status |
| 4310 | cmp %r14, %r17 |
| 4311 | bne,a %xcc, wait_for_iaw_40_50 |
| 4312 | ldxa [0x50]%asi, %r14 !Running_rw |
| 4313 | iaw_doit40_50: |
| 4314 | mov 0x38, %r18 |
| 4315 | iaw1_40_50: |
| 4316 | best_set_reg(0x00000000e0a00000, %r20, %r19) |
| 4317 | or %r19, 0x1, %r19 |
| 4318 | stxa %r19, [%r18]0x50 |
| 4319 | stxa %r16, [0x60] %asi ! Unpark (W1S) |
| 4320 | st %g0, [%r23] !clear lock |
| 4321 | wr %r0, %r12, %asi ! restore %asi |
| 4322 | ta T_CHANGE_NONHPRIV |
| 4323 | .word 0x87a8ca4c ! 68: FCMPd fcmpd %fcc<n>, %f34, %f12 |
| 4324 | .word 0xdb1fe1b0 ! 69: LDDF_I ldd [%r31, 0x01b0], %f13 |
| 4325 | .word 0x36780001 ! 70: BPGE <illegal instruction> |
| 4326 | dvapa_40_51: |
| 4327 | nop |
| 4328 | ta T_CHANGE_HPRIV |
| 4329 | mov 0x977, %r20 |
| 4330 | mov 0x0, %r19 |
| 4331 | sllx %r20, 23, %r20 |
| 4332 | or %r19, %r20, %r19 |
| 4333 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 4334 | mov 0x38, %r18 |
| 4335 | stxa %r31, [%r18]0x58 |
| 4336 | ta T_CHANGE_NONHPRIV |
| 4337 | .word 0xa3702e41 ! 71: POPC_I popc 0x0e41, %r17 |
| 4338 | splash_cmpr_40_52: |
| 4339 | mov 0, %r18 |
| 4340 | sllx %r18, 63, %r18 |
| 4341 | rd %tick, %r17 |
| 4342 | add %r17, 0x80, %r17 |
| 4343 | or %r17, %r18, %r17 |
| 4344 | ta T_CHANGE_HPRIV |
| 4345 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 4346 | ta T_CHANGE_PRIV |
| 4347 | .word 0xb3800011 ! 72: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 4348 | intveclr_40_53: |
| 4349 | nop |
| 4350 | ta T_CHANGE_HPRIV |
| 4351 | setx 0x1440f3fe669fec96, %r1, %r28 |
| 4352 | stxa %r28, [%g0] 0x72 |
| 4353 | ta T_CHANGE_NONHPRIV |
| 4354 | .word 0x25400001 ! 73: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 4355 | jmptr_40_54: |
| 4356 | nop |
| 4357 | best_set_reg(0xe0200000, %r20, %r27) |
| 4358 | .word 0xb7c6c000 ! 74: JMPL_R jmpl %r27 + %r0, %r27 |
| 4359 | mondo_40_55: |
| 4360 | nop |
| 4361 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 4362 | ta T_CHANGE_PRIV |
| 4363 | stxa %r2, [%r0+0x3d8] %asi |
| 4364 | .word 0x9d90c003 ! 75: WRPR_WSTATE_R wrpr %r3, %r3, %wstate |
| 4365 | #if (defined SPC || defined CMP1) |
| 4366 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_56) + 48, 16, 16)) -> intp(3,0,27) |
| 4367 | #else |
| 4368 | setx 0xe03d9dede4a035d2, %r1, %r28 |
| 4369 | stxa %r28, [%g0] 0x73 |
| 4370 | #endif |
| 4371 | intvec_40_56: |
| 4372 | .word 0x39400001 ! 76: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 4373 | .word 0x89800011 ! 77: WRTICK_R wr %r0, %r17, %tick |
| 4374 | splash_lsu_40_58: |
| 4375 | nop |
| 4376 | ta T_CHANGE_HPRIV |
| 4377 | set 0x8dcfcb9f, %r2 |
| 4378 | mov 0x1, %r1 |
| 4379 | sllx %r1, 32, %r1 |
| 4380 | or %r1, %r2, %r2 |
| 4381 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 4382 | .word 0x3d400001 ! 78: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 4383 | splash_tba_40_59: |
| 4384 | nop |
| 4385 | ta T_CHANGE_PRIV |
| 4386 | setx 0x0000000400380000, %r11, %r12 |
| 4387 | .word 0x8b90000c ! 79: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 4388 | .word 0x8780204f ! 80: WRASI_I wr %r0, 0x004f, %asi |
| 4389 | .word 0xd45fe1d0 ! 81: LDX_I ldx [%r31 + 0x01d0], %r10 |
| 4390 | br_badelay1_40_60: |
| 4391 | .word 0xd43fc011 ! 1: STD_R std %r10, [%r31 + %r17] |
| 4392 | .word 0xe7320006 ! 1: STQF_R - %f19, [%r6, %r8] |
| 4393 | .word 0xa9a7c9c9 ! 1: FDIVd fdivd %f62, %f40, %f20 |
| 4394 | normalw |
| 4395 | .word 0x95458000 ! 82: RD_SOFTINT_REG rd %softint, %r10 |
| 4396 | mondo_40_61: |
| 4397 | nop |
| 4398 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 4399 | stxa %r2, [%r0+0x3e0] %asi |
| 4400 | .word 0x9d948014 ! 83: WRPR_WSTATE_R wrpr %r18, %r20, %wstate |
| 4401 | nop |
| 4402 | mov 0x80, %g3 |
| 4403 | stxa %g3, [%g3] 0x57 |
| 4404 | .word 0xe45fc000 ! 84: LDX_R ldx [%r31 + %r0], %r18 |
| 4405 | nop |
| 4406 | ta T_CHANGE_HPRIV |
| 4407 | mov 0x40+1, %r10 |
| 4408 | set sync_thr_counter5, %r23 |
| 4409 | #ifndef SPC |
| 4410 | ldxa [%g0]0x63, %o1 |
| 4411 | and %o1, 0x38, %o1 |
| 4412 | add %o1, %r23, %r23 |
| 4413 | sllx %o1, 5, %o3 !(CID*256) |
| 4414 | #endif |
| 4415 | cas [%r23],%g0,%r10 !lock |
| 4416 | brnz %r10, cwq_40_62 |
| 4417 | rd %asi, %r12 |
| 4418 | wr %g0, 0x40, %asi |
| 4419 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 4420 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 4421 | cmp %l1, 1 |
| 4422 | bne cwq_40_62 |
| 4423 | set CWQ_BASE, %l6 |
| 4424 | #ifndef SPC |
| 4425 | add %l6, %o3, %l6 |
| 4426 | #endif |
| 4427 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 4428 | best_set_reg(0x20610040, %l1, %l2) !# Control Word |
| 4429 | sllx %l2, 32, %l2 |
| 4430 | stx %l2, [%l6 + 0x0] |
| 4431 | membar #Sync |
| 4432 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 4433 | sub %l2, 0x40, %l2 |
| 4434 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 4435 | wr %r12, %g0, %asi |
| 4436 | st %g0, [%r23] |
| 4437 | cwq_40_62: |
| 4438 | ta T_CHANGE_NONHPRIV |
| 4439 | .word 0x9b414000 ! 85: RDPC rd %pc, %r13 |
| 4440 | pmu_40_63: |
| 4441 | nop |
| 4442 | setx 0xfffff671fffffd8d, %g1, %g7 |
| 4443 | .word 0xa3800007 ! 86: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 4444 | splash_tba_40_64: |
| 4445 | nop |
| 4446 | ta T_CHANGE_PRIV |
| 4447 | set 0x120000, %r12 |
| 4448 | .word 0x8b90000c ! 87: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 4449 | splash_cmpr_40_65: |
| 4450 | mov 1, %r18 |
| 4451 | sllx %r18, 63, %r18 |
| 4452 | rd %tick, %r17 |
| 4453 | add %r17, 0x100, %r17 |
| 4454 | or %r17, %r18, %r17 |
| 4455 | ta T_CHANGE_PRIV |
| 4456 | .word 0xb3800011 ! 88: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 4457 | splash_lsu_40_66: |
| 4458 | nop |
| 4459 | ta T_CHANGE_HPRIV |
| 4460 | set 0xc3c39744, %r2 |
| 4461 | mov 0x6, %r1 |
| 4462 | sllx %r1, 32, %r1 |
| 4463 | or %r1, %r2, %r2 |
| 4464 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 4465 | ta T_CHANGE_NONHPRIV |
| 4466 | .word 0x3d400001 ! 89: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 4467 | .word 0xc30fc000 ! 90: LDXFSR_R ld-fsr [%r31, %r0], %f1 |
| 4468 | nop |
| 4469 | ta T_CHANGE_HPRIV |
| 4470 | mov 0x40+1, %r10 |
| 4471 | set sync_thr_counter5, %r23 |
| 4472 | #ifndef SPC |
| 4473 | ldxa [%g0]0x63, %o1 |
| 4474 | and %o1, 0x38, %o1 |
| 4475 | add %o1, %r23, %r23 |
| 4476 | sllx %o1, 5, %o3 !(CID*256) |
| 4477 | #endif |
| 4478 | cas [%r23],%g0,%r10 !lock |
| 4479 | brnz %r10, cwq_40_67 |
| 4480 | rd %asi, %r12 |
| 4481 | wr %g0, 0x40, %asi |
| 4482 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 4483 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 4484 | cmp %l1, 1 |
| 4485 | bne cwq_40_67 |
| 4486 | set CWQ_BASE, %l6 |
| 4487 | #ifndef SPC |
| 4488 | add %l6, %o3, %l6 |
| 4489 | #endif |
| 4490 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 4491 | best_set_reg(0x206100e0, %l1, %l2) !# Control Word |
| 4492 | sllx %l2, 32, %l2 |
| 4493 | stx %l2, [%l6 + 0x0] |
| 4494 | membar #Sync |
| 4495 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 4496 | sub %l2, 0x40, %l2 |
| 4497 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 4498 | wr %r12, %g0, %asi |
| 4499 | st %g0, [%r23] |
| 4500 | cwq_40_67: |
| 4501 | ta T_CHANGE_NONHPRIV |
| 4502 | .word 0xa5414000 ! 91: RDPC rd %pc, %r18 |
| 4503 | .word 0xd827e17c ! 92: STW_I stw %r12, [%r31 + 0x017c] |
| 4504 | splash_tba_40_68: |
| 4505 | nop |
| 4506 | ta T_CHANGE_PRIV |
| 4507 | set 0x120000, %r12 |
| 4508 | .word 0x8b90000c ! 93: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 4509 | setx 0xf6b1512f3758253a, %r1, %r28 |
| 4510 | stxa %r28, [%g0] 0x73 |
| 4511 | intvec_40_69: |
| 4512 | .word 0x39400001 ! 94: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 4513 | nop |
| 4514 | mov 0x80, %g3 |
| 4515 | stxa %g3, [%g3] 0x5f |
| 4516 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 |
| 4517 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 |
| 4518 | .word 0xd85fc000 ! 95: LDX_R ldx [%r31 + %r0], %r12 |
| 4519 | .word 0x8d802004 ! 96: WRFPRS_I wr %r0, 0x0004, %fprs |
| 4520 | iaw_40_70: |
| 4521 | nop |
| 4522 | ta T_CHANGE_HPRIV |
| 4523 | mov 8, %r18 |
| 4524 | rd %asi, %r12 |
| 4525 | wr %r0, 0x41, %asi |
| 4526 | set sync_thr_counter4, %r23 |
| 4527 | #ifndef SPC |
| 4528 | ldxa [%g0]0x63, %r8 |
| 4529 | and %r8, 0x38, %r8 ! Core ID |
| 4530 | add %r8, %r23, %r23 |
| 4531 | #else |
| 4532 | mov 0, %r8 |
| 4533 | #endif |
| 4534 | mov 0x40, %r16 |
| 4535 | iaw_startwait40_70: |
| 4536 | cas [%r23],%g0,%r16 !lock |
| 4537 | brz,a %r16, continue_iaw_40_70 |
| 4538 | mov (~0x40&0xf0), %r16 |
| 4539 | ld [%r23], %r16 |
| 4540 | iaw_wait40_70: |
| 4541 | brnz %r16, iaw_wait40_70 |
| 4542 | ld [%r23], %r16 |
| 4543 | ba iaw_startwait40_70 |
| 4544 | mov 0x40, %r16 |
| 4545 | continue_iaw_40_70: |
| 4546 | sllx %r16, %r8, %r16 !Mask for my core only |
| 4547 | ldxa [0x58]%asi, %r17 !Running_status |
| 4548 | wait_for_stat_40_70: |
| 4549 | ldxa [0x50]%asi, %r13 !Running_rw |
| 4550 | cmp %r13, %r17 |
| 4551 | bne,a %xcc, wait_for_stat_40_70 |
| 4552 | ldxa [0x58]%asi, %r17 !Running_status |
| 4553 | stxa %r16, [0x68]%asi !Park (W1C) |
| 4554 | ldxa [0x50]%asi, %r14 !Running_rw |
| 4555 | wait_for_iaw_40_70: |
| 4556 | ldxa [0x58]%asi, %r17 !Running_status |
| 4557 | cmp %r14, %r17 |
| 4558 | bne,a %xcc, wait_for_iaw_40_70 |
| 4559 | ldxa [0x50]%asi, %r14 !Running_rw |
| 4560 | iaw_doit40_70: |
| 4561 | mov 0x38, %r18 |
| 4562 | iaw4_40_70: |
| 4563 | setx common_target, %r20, %r19 |
| 4564 | or %r19, 0x1, %r19 |
| 4565 | stxa %r19, [%r18]0x50 |
| 4566 | stxa %r16, [0x60] %asi ! Unpark (W1S) |
| 4567 | st %g0, [%r23] !clear lock |
| 4568 | wr %r0, %r12, %asi ! restore %asi |
| 4569 | ta T_CHANGE_NONHPRIV |
| 4570 | .word 0xd89fe040 ! 97: LDDA_I ldda [%r31, + 0x0040] %asi, %r12 |
| 4571 | splash_cmpr_40_71: |
| 4572 | mov 0, %r18 |
| 4573 | sllx %r18, 63, %r18 |
| 4574 | rd %tick, %r17 |
| 4575 | add %r17, 0x70, %r17 |
| 4576 | or %r17, %r18, %r17 |
| 4577 | ta T_CHANGE_HPRIV |
| 4578 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 4579 | ta T_CHANGE_PRIV |
| 4580 | .word 0xb3800011 ! 98: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 4581 | nop |
| 4582 | mov 0x80, %g3 |
| 4583 | stxa %g3, [%g3] 0x5f |
| 4584 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate |
| 4585 | .word 0xd85fc000 ! 99: LDX_R ldx [%r31 + %r0], %r12 |
| 4586 | ceter_40_72: |
| 4587 | nop |
| 4588 | ta T_CHANGE_HPRIV |
| 4589 | mov 7, %r17 |
| 4590 | sllx %r17, 60, %r17 |
| 4591 | mov 0x18, %r16 |
| 4592 | stxa %r17, [%r16]0x4c |
| 4593 | ta T_CHANGE_NONHPRIV |
| 4594 | .word 0x93410000 ! 100: RDTICK rd %tick, %r9 |
| 4595 | .word 0x3d400001 ! 1: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 4596 | .word 0x8d903ffb ! 101: WRPR_PSTATE_I wrpr %r0, 0x1ffb, %pstate |
| 4597 | intveclr_40_74: |
| 4598 | nop |
| 4599 | ta T_CHANGE_HPRIV |
| 4600 | setx 0x099f503ea75fec4c, %r1, %r28 |
| 4601 | stxa %r28, [%g0] 0x72 |
| 4602 | ta T_CHANGE_NONHPRIV |
| 4603 | .word 0x25400001 ! 102: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 4604 | fpinit_40_75: |
| 4605 | nop |
| 4606 | setx fp_data_quads, %r19, %r20 |
| 4607 | ldd [%r20], %f0 |
| 4608 | ldd [%r20+8], %f4 |
| 4609 | ld [%r20+16], %fsr |
| 4610 | ld [%r20+24], %r19 |
| 4611 | wr %r19, %g0, %gsr |
| 4612 | .word 0x8da009a4 ! 103: FDIVs fdivs %f0, %f4, %f6 |
| 4613 | jmptr_40_76: |
| 4614 | nop |
| 4615 | best_set_reg(0xe0200000, %r20, %r27) |
| 4616 | .word 0xb7c6c000 ! 104: JMPL_R jmpl %r27 + %r0, %r27 |
| 4617 | jmptr_40_77: |
| 4618 | nop |
| 4619 | best_set_reg(0xe0200000, %r20, %r27) |
| 4620 | .word 0xb7c6c000 ! 105: JMPL_R jmpl %r27 + %r0, %r27 |
| 4621 | nop |
| 4622 | ta T_CHANGE_HPRIV |
| 4623 | mov 0x40, %r10 |
| 4624 | set sync_thr_counter6, %r23 |
| 4625 | #ifndef SPC |
| 4626 | ldxa [%g0]0x63, %o1 |
| 4627 | and %o1, 0x38, %o1 |
| 4628 | add %o1, %r23, %r23 |
| 4629 | #endif |
| 4630 | cas [%r23],%g0,%r10 !lock |
| 4631 | brnz %r10, sma_40_78 |
| 4632 | rd %asi, %r12 |
| 4633 | wr %g0, 0x40, %asi |
| 4634 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 4635 | set 0x000e1fff, %g1 |
| 4636 | stxa %g1, [%g0 + 0x80] %asi |
| 4637 | wr %r12, %g0, %asi |
| 4638 | st %g0, [%r23] |
| 4639 | sma_40_78: |
| 4640 | ta T_CHANGE_NONHPRIV |
| 4641 | .word 0xe9e7e009 ! 106: CASA_R casa [%r31] %asi, %r9, %r20 |
| 4642 | nop |
| 4643 | ta T_CHANGE_HPRIV |
| 4644 | mov 0x40, %r10 |
| 4645 | set sync_thr_counter6, %r23 |
| 4646 | #ifndef SPC |
| 4647 | ldxa [%g0]0x63, %o1 |
| 4648 | and %o1, 0x38, %o1 |
| 4649 | add %o1, %r23, %r23 |
| 4650 | #endif |
| 4651 | cas [%r23],%g0,%r10 !lock |
| 4652 | brnz %r10, sma_40_79 |
| 4653 | rd %asi, %r12 |
| 4654 | wr %g0, 0x40, %asi |
| 4655 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 4656 | set 0x00161fff, %g1 |
| 4657 | stxa %g1, [%g0 + 0x80] %asi |
| 4658 | wr %r12, %g0, %asi |
| 4659 | st %g0, [%r23] |
| 4660 | sma_40_79: |
| 4661 | ta T_CHANGE_NONHPRIV |
| 4662 | .word 0xe9e7e008 ! 107: CASA_R casa [%r31] %asi, %r8, %r20 |
| 4663 | splash_cmpr_40_80: |
| 4664 | mov 1, %r18 |
| 4665 | sllx %r18, 63, %r18 |
| 4666 | rd %tick, %r17 |
| 4667 | add %r17, 0x70, %r17 |
| 4668 | or %r17, %r18, %r17 |
| 4669 | ta T_CHANGE_HPRIV |
| 4670 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 4671 | .word 0xb3800011 ! 108: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 4672 | ibp_40_81: |
| 4673 | nop |
| 4674 | .word 0xe1bfe000 ! 109: STDFA_I stda %f16, [0x0000, %r31] |
| 4675 | .word 0xe88008a0 ! 110: LDUWA_R lduwa [%r0, %r0] 0x45, %r20 |
| 4676 | .word 0x87accad2 ! 111: FCMPEd fcmped %fcc<n>, %f50, %f18 |
| 4677 | nop |
| 4678 | ta T_CHANGE_HPRIV |
| 4679 | mov 0x40+1, %r10 |
| 4680 | set sync_thr_counter5, %r23 |
| 4681 | #ifndef SPC |
| 4682 | ldxa [%g0]0x63, %o1 |
| 4683 | and %o1, 0x38, %o1 |
| 4684 | add %o1, %r23, %r23 |
| 4685 | sllx %o1, 5, %o3 !(CID*256) |
| 4686 | #endif |
| 4687 | cas [%r23],%g0,%r10 !lock |
| 4688 | brnz %r10, cwq_40_82 |
| 4689 | rd %asi, %r12 |
| 4690 | wr %g0, 0x40, %asi |
| 4691 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 4692 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 4693 | cmp %l1, 1 |
| 4694 | bne cwq_40_82 |
| 4695 | set CWQ_BASE, %l6 |
| 4696 | #ifndef SPC |
| 4697 | add %l6, %o3, %l6 |
| 4698 | #endif |
| 4699 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 4700 | best_set_reg(0x20610040, %l1, %l2) !# Control Word |
| 4701 | sllx %l2, 32, %l2 |
| 4702 | stx %l2, [%l6 + 0x0] |
| 4703 | membar #Sync |
| 4704 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 4705 | sub %l2, 0x40, %l2 |
| 4706 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 4707 | wr %r12, %g0, %asi |
| 4708 | st %g0, [%r23] |
| 4709 | cwq_40_82: |
| 4710 | ta T_CHANGE_NONHPRIV |
| 4711 | .word 0x91414000 ! 112: RDPC rd %pc, %r8 |
| 4712 | cwp_40_83: |
| 4713 | set user_data_start, %o7 |
| 4714 | .word 0x93902005 ! 113: WRPR_CWP_I wrpr %r0, 0x0005, %cwp |
| 4715 | .word 0x98d98010 ! 114: SMULcc_R smulcc %r6, %r16, %r12 |
| 4716 | .word 0x8d802004 ! 115: WRFPRS_I wr %r0, 0x0004, %fprs |
| 4717 | trapasi_40_84: |
| 4718 | nop |
| 4719 | mov 0x3c8, %r1 ! (VA for ASI 0x25) |
| 4720 | .word 0xe4d044a0 ! 116: LDSHA_R ldsha [%r1, %r0] 0x25, %r18 |
| 4721 | .word 0x8d802000 ! 117: WRFPRS_I wr %r0, 0x0000, %fprs |
| 4722 | trapasi_40_85: |
| 4723 | nop |
| 4724 | mov 0x3e8, %r1 ! (VA for ASI 0x25) |
| 4725 | .word 0xe48844a0 ! 118: LDUBA_R lduba [%r1, %r0] 0x25, %r18 |
| 4726 | .word 0xa553c000 ! 119: RDPR_FQ <illegal instruction> |
| 4727 | splash_hpstate_40_86: |
| 4728 | .word 0x35400001 ! 1: FBPUE fbue,a,pn %fcc0, <label_0x1> |
| 4729 | .word 0x81983c37 ! 120: WRHPR_HPSTATE_I wrhpr %r0, 0x1c37, %hpstate |
| 4730 | intveclr_40_87: |
| 4731 | nop |
| 4732 | ta T_CHANGE_HPRIV |
| 4733 | setx 0xaa8ab0fc2c50f98d, %r1, %r28 |
| 4734 | stxa %r28, [%g0] 0x72 |
| 4735 | .word 0x25400001 ! 121: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 4736 | .word 0xe937e0aa ! 122: STQF_I - %f20, [0x00aa, %r31] |
| 4737 | .word 0xa4c4b743 ! 123: ADDCcc_I addccc %r18, 0xfffff743, %r18 |
| 4738 | #if (defined SPC || defined CMP1) |
| 4739 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_88) + 40, 16, 16)) -> intp(1,0,14) |
| 4740 | #else |
| 4741 | setx 0x220265e2c2003450, %r1, %r28 |
| 4742 | stxa %r28, [%g0] 0x73 |
| 4743 | #endif |
| 4744 | intvec_40_88: |
| 4745 | .word 0x39400001 ! 124: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 4746 | trapasi_40_89: |
| 4747 | nop |
| 4748 | mov 0x0, %r1 ! (VA for ASI 0x73) |
| 4749 | .word 0xe8c04e60 ! 125: LDSWA_R ldswa [%r1, %r0] 0x73, %r20 |
| 4750 | trapasi_40_90: |
| 4751 | nop |
| 4752 | mov 0x3c0, %r1 ! (VA for ASI 0x25) |
| 4753 | .word 0xe8c844a0 ! 126: LDSBA_R ldsba [%r1, %r0] 0x25, %r20 |
| 4754 | .word 0x95a509d0 ! 127: FDIVd fdivd %f20, %f16, %f10 |
| 4755 | intveclr_40_92: |
| 4756 | nop |
| 4757 | ta T_CHANGE_HPRIV |
| 4758 | setx 0x905b3541e783d15b, %r1, %r28 |
| 4759 | stxa %r28, [%g0] 0x72 |
| 4760 | ta T_CHANGE_NONHPRIV |
| 4761 | .word 0x25400001 ! 128: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 4762 | trapasi_40_93: |
| 4763 | nop |
| 4764 | mov 0x18, %r1 ! (VA for ASI 0x50) |
| 4765 | .word 0xd0d84a00 ! 129: LDXA_R ldxa [%r1, %r0] 0x50, %r8 |
| 4766 | .word 0x89800011 ! 130: WRTICK_R wr %r0, %r17, %tick |
| 4767 | .word 0xc19fc2c0 ! 131: LDDFA_R ldda [%r31, %r0], %f0 |
| 4768 | .word 0x89800011 ! 132: WRTICK_R wr %r0, %r17, %tick |
| 4769 | .word 0xd197e1d0 ! 133: LDQFA_I - [%r31, 0x01d0], %f8 |
| 4770 | dvapa_40_96: |
| 4771 | nop |
| 4772 | ta T_CHANGE_HPRIV |
| 4773 | mov 0x90d, %r20 |
| 4774 | mov 0xb, %r19 |
| 4775 | sllx %r20, 23, %r20 |
| 4776 | or %r19, %r20, %r19 |
| 4777 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 4778 | mov 0x38, %r18 |
| 4779 | stxa %r31, [%r18]0x58 |
| 4780 | ta T_CHANGE_NONHPRIV |
| 4781 | .word 0xc3eb4032 ! 134: PREFETCHA_R prefetcha [%r13, %r18] 0x01, #one_read |
| 4782 | .word 0xd13fc000 ! 135: STDF_R std %f8, [%r0, %r31] |
| 4783 | otherw |
| 4784 | mov 0xb3, %r30 |
| 4785 | .word 0x91d0001e ! 136: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 4786 | .word 0x8780201c ! 137: WRASI_I wr %r0, 0x001c, %asi |
| 4787 | memptr_40_97: |
| 4788 | set 0x60340000, %r31 |
| 4789 | .word 0x8581a1f6 ! 138: WRCCR_I wr %r6, 0x01f6, %ccr |
| 4790 | splash_cmpr_40_98: |
| 4791 | mov 1, %r18 |
| 4792 | sllx %r18, 63, %r18 |
| 4793 | rd %tick, %r17 |
| 4794 | add %r17, 0x50, %r17 |
| 4795 | or %r17, %r18, %r17 |
| 4796 | .word 0xb3800011 ! 139: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 4797 | .word 0x87ac8a2b ! 140: FCMPs fcmps %fcc<n>, %f18, %f11 |
| 4798 | .word 0x89800011 ! 141: WRTICK_R wr %r0, %r17, %tick |
| 4799 | .word 0xd0c7e168 ! 142: LDSWA_I ldswa [%r31, + 0x0168] %asi, %r8 |
| 4800 | splash_tba_40_100: |
| 4801 | nop |
| 4802 | ta T_CHANGE_PRIV |
| 4803 | set 0x120000, %r12 |
| 4804 | .word 0x8b90000c ! 143: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 4805 | change_to_randtl_40_101: |
| 4806 | ta T_CHANGE_HPRIV ! macro |
| 4807 | done_change_to_randtl_40_101: |
| 4808 | .word 0x8f902000 ! 144: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 4809 | nop |
| 4810 | ta T_CHANGE_HPRIV ! macro |
| 4811 | donret_40_102: |
| 4812 | rd %pc, %r12 |
| 4813 | add %r12, (donretarg_40_102-donret_40_102+4), %r12 |
| 4814 | add %r12, 0x4, %r11 ! seq tnpc |
| 4815 | wrpr %g0, 0x2, %tl |
| 4816 | wrpr %g0, %r12, %tpc |
| 4817 | wrpr %g0, %r11, %tnpc |
| 4818 | set (0x6000 | (0x4f << 24)), %r13 |
| 4819 | and %r12, 0xfff, %r14 |
| 4820 | sllx %r14, 30, %r14 |
| 4821 | or %r13, %r14, %r20 |
| 4822 | wrpr %r20, %g0, %tstate |
| 4823 | wrhpr %g0, 0xf4a, %htstate |
| 4824 | ta T_CHANGE_NONHPRIV ! rand=1 (40) |
| 4825 | .word 0x2e800001 ! 1: BVS bvs,a <label_0x1> |
| 4826 | retry |
| 4827 | donretarg_40_102: |
| 4828 | .word 0x24800001 ! 145: BLE ble,a <label_0x1> |
| 4829 | iaw_40_103: |
| 4830 | nop |
| 4831 | ta T_CHANGE_HPRIV |
| 4832 | mov 8, %r18 |
| 4833 | rd %asi, %r12 |
| 4834 | wr %r0, 0x41, %asi |
| 4835 | set sync_thr_counter4, %r23 |
| 4836 | #ifndef SPC |
| 4837 | ldxa [%g0]0x63, %r8 |
| 4838 | and %r8, 0x38, %r8 ! Core ID |
| 4839 | add %r8, %r23, %r23 |
| 4840 | #else |
| 4841 | mov 0, %r8 |
| 4842 | #endif |
| 4843 | mov 0x40, %r16 |
| 4844 | iaw_startwait40_103: |
| 4845 | cas [%r23],%g0,%r16 !lock |
| 4846 | brz,a %r16, continue_iaw_40_103 |
| 4847 | mov (~0x40&0xf0), %r16 |
| 4848 | ld [%r23], %r16 |
| 4849 | iaw_wait40_103: |
| 4850 | brnz %r16, iaw_wait40_103 |
| 4851 | ld [%r23], %r16 |
| 4852 | ba iaw_startwait40_103 |
| 4853 | mov 0x40, %r16 |
| 4854 | continue_iaw_40_103: |
| 4855 | sllx %r16, %r8, %r16 !Mask for my core only |
| 4856 | ldxa [0x58]%asi, %r17 !Running_status |
| 4857 | wait_for_stat_40_103: |
| 4858 | ldxa [0x50]%asi, %r13 !Running_rw |
| 4859 | cmp %r13, %r17 |
| 4860 | bne,a %xcc, wait_for_stat_40_103 |
| 4861 | ldxa [0x58]%asi, %r17 !Running_status |
| 4862 | stxa %r16, [0x68]%asi !Park (W1C) |
| 4863 | ldxa [0x50]%asi, %r14 !Running_rw |
| 4864 | wait_for_iaw_40_103: |
| 4865 | ldxa [0x58]%asi, %r17 !Running_status |
| 4866 | cmp %r14, %r17 |
| 4867 | bne,a %xcc, wait_for_iaw_40_103 |
| 4868 | ldxa [0x50]%asi, %r14 !Running_rw |
| 4869 | iaw_doit40_103: |
| 4870 | mov 0x38, %r18 |
| 4871 | iaw4_40_103: |
| 4872 | setx common_target, %r20, %r19 |
| 4873 | or %r19, 0x1, %r19 |
| 4874 | stxa %r19, [%r18]0x50 |
| 4875 | stxa %r16, [0x60] %asi ! Unpark (W1S) |
| 4876 | st %g0, [%r23] !clear lock |
| 4877 | wr %r0, %r12, %asi ! restore %asi |
| 4878 | ta T_CHANGE_NONHPRIV |
| 4879 | .word 0xd1e7e014 ! 146: CASA_R casa [%r31] %asi, %r20, %r8 |
| 4880 | .word 0x91d02034 ! 147: Tcc_I ta icc_or_xcc, %r0 + 52 |
| 4881 | nop |
| 4882 | ta T_CHANGE_HPRIV |
| 4883 | mov 0x40+1, %r10 |
| 4884 | set sync_thr_counter5, %r23 |
| 4885 | #ifndef SPC |
| 4886 | ldxa [%g0]0x63, %o1 |
| 4887 | and %o1, 0x38, %o1 |
| 4888 | add %o1, %r23, %r23 |
| 4889 | sllx %o1, 5, %o3 !(CID*256) |
| 4890 | #endif |
| 4891 | cas [%r23],%g0,%r10 !lock |
| 4892 | brnz %r10, cwq_40_104 |
| 4893 | rd %asi, %r12 |
| 4894 | wr %g0, 0x40, %asi |
| 4895 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 4896 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 4897 | cmp %l1, 1 |
| 4898 | bne cwq_40_104 |
| 4899 | set CWQ_BASE, %l6 |
| 4900 | #ifndef SPC |
| 4901 | add %l6, %o3, %l6 |
| 4902 | #endif |
| 4903 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 4904 | best_set_reg(0x20610070, %l1, %l2) !# Control Word |
| 4905 | sllx %l2, 32, %l2 |
| 4906 | stx %l2, [%l6 + 0x0] |
| 4907 | membar #Sync |
| 4908 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 4909 | sub %l2, 0x40, %l2 |
| 4910 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 4911 | wr %r12, %g0, %asi |
| 4912 | st %g0, [%r23] |
| 4913 | cwq_40_104: |
| 4914 | ta T_CHANGE_NONHPRIV |
| 4915 | .word 0x93414000 ! 148: RDPC rd %pc, %r9 |
| 4916 | mondo_40_105: |
| 4917 | nop |
| 4918 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 4919 | ta T_CHANGE_PRIV |
| 4920 | stxa %r20, [%r0+0x3c0] %asi |
| 4921 | .word 0x9d914010 ! 149: WRPR_WSTATE_R wrpr %r5, %r16, %wstate |
| 4922 | .word 0xc19fe1a0 ! 150: LDDFA_I ldda [%r31, 0x01a0], %f0 |
| 4923 | nop |
| 4924 | ta T_CHANGE_HPRIV |
| 4925 | mov 0x40+1, %r10 |
| 4926 | set sync_thr_counter5, %r23 |
| 4927 | #ifndef SPC |
| 4928 | ldxa [%g0]0x63, %o1 |
| 4929 | and %o1, 0x38, %o1 |
| 4930 | add %o1, %r23, %r23 |
| 4931 | sllx %o1, 5, %o3 !(CID*256) |
| 4932 | #endif |
| 4933 | cas [%r23],%g0,%r10 !lock |
| 4934 | brnz %r10, cwq_40_106 |
| 4935 | rd %asi, %r12 |
| 4936 | wr %g0, 0x40, %asi |
| 4937 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 4938 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 4939 | cmp %l1, 1 |
| 4940 | bne cwq_40_106 |
| 4941 | set CWQ_BASE, %l6 |
| 4942 | #ifndef SPC |
| 4943 | add %l6, %o3, %l6 |
| 4944 | #endif |
| 4945 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 4946 | best_set_reg(0x206100d0, %l1, %l2) !# Control Word |
| 4947 | sllx %l2, 32, %l2 |
| 4948 | stx %l2, [%l6 + 0x0] |
| 4949 | membar #Sync |
| 4950 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 4951 | sub %l2, 0x40, %l2 |
| 4952 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 4953 | wr %r12, %g0, %asi |
| 4954 | st %g0, [%r23] |
| 4955 | cwq_40_106: |
| 4956 | ta T_CHANGE_NONHPRIV |
| 4957 | .word 0xa5414000 ! 151: RDPC rd %pc, %r18 |
| 4958 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 4959 | reduce_priv_lvl_40_107: |
| 4960 | ta T_CHANGE_NONPRIV ! macro |
| 4961 | #if (defined SPC || defined CMP1) |
| 4962 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_108) + 24, 16, 16)) -> intp(5,0,29) |
| 4963 | #else |
| 4964 | setx 0x6ef837b9ec5e09c7, %r1, %r28 |
| 4965 | stxa %r28, [%g0] 0x73 |
| 4966 | #endif |
| 4967 | intvec_40_108: |
| 4968 | .word 0x39400001 ! 153: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 4969 | .word 0x8d9033ed ! 154: WRPR_PSTATE_I wrpr %r0, 0x13ed, %pstate |
| 4970 | dvapa_40_110: |
| 4971 | nop |
| 4972 | ta T_CHANGE_HPRIV |
| 4973 | mov 0x94f, %r20 |
| 4974 | mov 0xd, %r19 |
| 4975 | sllx %r20, 23, %r20 |
| 4976 | or %r19, %r20, %r19 |
| 4977 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 4978 | mov 0x38, %r18 |
| 4979 | stxa %r31, [%r18]0x58 |
| 4980 | ta T_CHANGE_NONHPRIV |
| 4981 | .word 0x91b44490 ! 155: FCMPLE32 fcmple32 %d48, %d16, %r8 |
| 4982 | .word 0xd08008a0 ! 156: LDUWA_R lduwa [%r0, %r0] 0x45, %r8 |
| 4983 | .word 0x89800011 ! 157: WRTICK_R wr %r0, %r17, %tick |
| 4984 | memptr_40_112: |
| 4985 | set 0x60540000, %r31 |
| 4986 | .word 0x8584fa1c ! 158: WRCCR_I wr %r19, 0x1a1c, %ccr |
| 4987 | .word 0xa24d0012 ! 159: MULX_R mulx %r20, %r18, %r17 |
| 4988 | nop |
| 4989 | ta T_CHANGE_HPRIV |
| 4990 | mov 0x40, %r10 |
| 4991 | set sync_thr_counter6, %r23 |
| 4992 | #ifndef SPC |
| 4993 | ldxa [%g0]0x63, %o1 |
| 4994 | and %o1, 0x38, %o1 |
| 4995 | add %o1, %r23, %r23 |
| 4996 | #endif |
| 4997 | cas [%r23],%g0,%r10 !lock |
| 4998 | brnz %r10, sma_40_113 |
| 4999 | rd %asi, %r12 |
| 5000 | wr %g0, 0x40, %asi |
| 5001 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 5002 | set 0x00161fff, %g1 |
| 5003 | stxa %g1, [%g0 + 0x80] %asi |
| 5004 | wr %r12, %g0, %asi |
| 5005 | st %g0, [%r23] |
| 5006 | sma_40_113: |
| 5007 | ta T_CHANGE_NONHPRIV |
| 5008 | .word 0xe3e7e008 ! 160: CASA_R casa [%r31] %asi, %r8, %r17 |
| 5009 | ibp_40_114: |
| 5010 | nop |
| 5011 | .word 0xa7a189c7 ! 161: FDIVd fdivd %f6, %f38, %f50 |
| 5012 | memptr_40_115: |
| 5013 | set 0x60740000, %r31 |
| 5014 | .word 0x8582e699 ! 162: WRCCR_I wr %r11, 0x0699, %ccr |
| 5015 | splash_tba_40_116: |
| 5016 | nop |
| 5017 | ta T_CHANGE_PRIV |
| 5018 | set 0x120000, %r12 |
| 5019 | .word 0x8b90000c ! 163: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 5020 | .word 0x904d0010 ! 164: MULX_R mulx %r20, %r16, %r8 |
| 5021 | .word 0x93d02035 ! 165: Tcc_I tne icc_or_xcc, %r0 + 53 |
| 5022 | ibp_40_117: |
| 5023 | nop |
| 5024 | ta T_CHANGE_NONHPRIV |
| 5025 | .word 0xc3ec4025 ! 166: PREFETCHA_R prefetcha [%r17, %r5] 0x01, #one_read |
| 5026 | brcommon2_40_118: |
| 5027 | nop |
| 5028 | setx common_target, %r12, %r27 |
| 5029 | ba,a .+12 |
| 5030 | .word 0xc36fe150 ! 1: PREFETCH_I prefetch [%r31 + 0x0150], #one_read |
| 5031 | ba,a .+8 |
| 5032 | jmpl %r27+0, %r27 |
| 5033 | .word 0xc1bfe000 ! 167: STDFA_I stda %f0, [0x0000, %r31] |
| 5034 | .word 0xd027e189 ! 168: STW_I stw %r8, [%r31 + 0x0189] |
| 5035 | ibp_40_119: |
| 5036 | nop |
| 5037 | ta T_CHANGE_NONHPRIV |
| 5038 | .word 0x997038d6 ! 169: POPC_I popc 0x18d6, %r12 |
| 5039 | .word 0xa9520000 ! 170: RDPR_PIL rdpr %pil, %r20 |
| 5040 | mondo_40_120: |
| 5041 | nop |
| 5042 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 5043 | stxa %r2, [%r0+0x3d8] %asi |
| 5044 | .word 0x9d94c011 ! 171: WRPR_WSTATE_R wrpr %r19, %r17, %wstate |
| 5045 | .word 0x8d802004 ! 172: WRFPRS_I wr %r0, 0x0004, %fprs |
| 5046 | .word 0xe08fe0c8 ! 173: LDUBA_I lduba [%r31, + 0x00c8] %asi, %r16 |
| 5047 | setx 0x837e61c552c2e108, %r1, %r28 |
| 5048 | stxa %r28, [%g0] 0x73 |
| 5049 | intvec_40_121: |
| 5050 | .word 0x39400001 ! 174: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 5051 | .word 0xa4c16829 ! 175: ADDCcc_I addccc %r5, 0x0829, %r18 |
| 5052 | ibp_40_122: |
| 5053 | nop |
| 5054 | .word 0xe1bfe0a0 ! 176: STDFA_I stda %f16, [0x00a0, %r31] |
| 5055 | ibp_40_123: |
| 5056 | nop |
| 5057 | .word 0xc19fe000 ! 177: LDDFA_I ldda [%r31, 0x0000], %f0 |
| 5058 | ibp_40_124: |
| 5059 | nop |
| 5060 | .word 0xa7b287c2 ! 178: PDIST pdistn %d10, %d2, %d50 |
| 5061 | .word 0xe897e160 ! 179: LDUHA_I lduha [%r31, + 0x0160] %asi, %r20 |
| 5062 | fpinit_40_125: |
| 5063 | nop |
| 5064 | setx fp_data_quads, %r19, %r20 |
| 5065 | ldd [%r20], %f0 |
| 5066 | ldd [%r20+8], %f4 |
| 5067 | ld [%r20+16], %fsr |
| 5068 | ld [%r20+24], %r19 |
| 5069 | wr %r19, %g0, %gsr |
| 5070 | .word 0x8da009c4 ! 180: FDIVd fdivd %f0, %f4, %f6 |
| 5071 | .word 0x8143e011 ! 181: MEMBAR membar #LoadLoad | #Lookaside |
| 5072 | ibp_40_127: |
| 5073 | nop |
| 5074 | ta T_CHANGE_NONHPRIV |
| 5075 | .word 0xe19fc3e0 ! 182: LDDFA_R ldda [%r31, %r0], %f16 |
| 5076 | #if (defined SPC || defined CMP1) |
| 5077 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_128) + 8, 16, 16)) -> intp(2,0,3) |
| 5078 | #else |
| 5079 | setx 0x508eaee153d49400, %r1, %r28 |
| 5080 | stxa %r28, [%g0] 0x73 |
| 5081 | #endif |
| 5082 | intvec_40_128: |
| 5083 | .word 0x39400001 ! 183: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 5084 | intveclr_40_129: |
| 5085 | nop |
| 5086 | ta T_CHANGE_HPRIV |
| 5087 | setx 0x13592f1344993101, %r1, %r28 |
| 5088 | stxa %r28, [%g0] 0x72 |
| 5089 | ta T_CHANGE_NONHPRIV |
| 5090 | .word 0x25400001 ! 184: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 5091 | dvapa_40_130: |
| 5092 | nop |
| 5093 | ta T_CHANGE_HPRIV |
| 5094 | mov 0xd5f, %r20 |
| 5095 | mov 0x1a, %r19 |
| 5096 | sllx %r20, 23, %r20 |
| 5097 | or %r19, %r20, %r19 |
| 5098 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 5099 | mov 0x38, %r18 |
| 5100 | stxa %r31, [%r18]0x58 |
| 5101 | ta T_CHANGE_NONHPRIV |
| 5102 | .word 0xc19fe040 ! 185: LDDFA_I ldda [%r31, 0x0040], %f0 |
| 5103 | mondo_40_131: |
| 5104 | nop |
| 5105 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 5106 | stxa %r20, [%r0+0x3d0] %asi |
| 5107 | .word 0x9d928006 ! 186: WRPR_WSTATE_R wrpr %r10, %r6, %wstate |
| 5108 | .word 0xe877c000 ! 187: STX_R stx %r20, [%r31 + %r0] |
| 5109 | mondo_40_132: |
| 5110 | nop |
| 5111 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 5112 | stxa %r18, [%r0+0x3d0] %asi |
| 5113 | .word 0x9d92800c ! 188: WRPR_WSTATE_R wrpr %r10, %r12, %wstate |
| 5114 | mondo_40_133: |
| 5115 | nop |
| 5116 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 5117 | ta T_CHANGE_PRIV |
| 5118 | stxa %r18, [%r0+0x3c8] %asi |
| 5119 | .word 0x9d944010 ! 189: WRPR_WSTATE_R wrpr %r17, %r16, %wstate |
| 5120 | memptr_40_134: |
| 5121 | set 0x60140000, %r31 |
| 5122 | .word 0x85837efb ! 190: WRCCR_I wr %r13, 0x1efb, %ccr |
| 5123 | splash_hpstate_40_135: |
| 5124 | .word 0x81983b07 ! 191: WRHPR_HPSTATE_I wrhpr %r0, 0x1b07, %hpstate |
| 5125 | .word 0xe937c000 ! 192: STQF_R - %f20, [%r0, %r31] |
| 5126 | splash_hpstate_40_136: |
| 5127 | .word 0x2b400001 ! 1: FBPUG fbug,a,pn %fcc0, <label_0x1> |
| 5128 | .word 0x819837c7 ! 193: WRHPR_HPSTATE_I wrhpr %r0, 0x17c7, %hpstate |
| 5129 | splash_hpstate_40_137: |
| 5130 | ta T_CHANGE_NONHPRIV |
| 5131 | .word 0x2acc8001 ! 1: BRNZ brnz,a,pt %r18,<label_0xc8001> |
| 5132 | .word 0x8198229b ! 194: WRHPR_HPSTATE_I wrhpr %r0, 0x029b, %hpstate |
| 5133 | .word 0xc19fc3e0 ! 195: LDDFA_R ldda [%r31, %r0], %f0 |
| 5134 | .word 0x89800011 ! 196: WRTICK_R wr %r0, %r17, %tick |
| 5135 | intveclr_40_139: |
| 5136 | nop |
| 5137 | ta T_CHANGE_HPRIV |
| 5138 | setx 0xc69acc4f6964099c, %r1, %r28 |
| 5139 | stxa %r28, [%g0] 0x72 |
| 5140 | ta T_CHANGE_NONHPRIV |
| 5141 | .word 0x25400001 ! 197: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 5142 | .word 0x89800011 ! 198: WRTICK_R wr %r0, %r17, %tick |
| 5143 | mondo_40_141: |
| 5144 | nop |
| 5145 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 5146 | stxa %r20, [%r0+0x3d8] %asi |
| 5147 | .word 0x9d90c012 ! 199: WRPR_WSTATE_R wrpr %r3, %r18, %wstate |
| 5148 | splash_lsu_40_142: |
| 5149 | nop |
| 5150 | ta T_CHANGE_HPRIV |
| 5151 | set 0x76ed3aaf, %r2 |
| 5152 | mov 0x7, %r1 |
| 5153 | sllx %r1, 32, %r1 |
| 5154 | or %r1, %r2, %r2 |
| 5155 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 5156 | .word 0x3d400001 ! 200: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 5157 | change_to_randtl_40_143: |
| 5158 | ta T_CHANGE_HPRIV ! macro |
| 5159 | done_change_to_randtl_40_143: |
| 5160 | .word 0x8f902000 ! 201: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 5161 | nop |
| 5162 | nop |
| 5163 | ta T_CHANGE_PRIV |
| 5164 | wrpr %g0, %g0, %gl |
| 5165 | nop |
| 5166 | nop |
| 5167 | setx join_lbl_0_0, %g1, %g2 |
| 5168 | jmp %g2 |
| 5169 | nop |
| 5170 | fork_lbl_0_6: |
| 5171 | ta T_CHANGE_NONHPRIV |
| 5172 | mondo_20_0: |
| 5173 | nop |
| 5174 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 5175 | ta T_CHANGE_PRIV |
| 5176 | stxa %r2, [%r0+0x3e0] %asi |
| 5177 | .word 0x9d93400b ! 1: WRPR_WSTATE_R wrpr %r13, %r11, %wstate |
| 5178 | trapasi_20_1: |
| 5179 | nop |
| 5180 | mov 0x3f8, %r1 ! (VA for ASI 0x25) |
| 5181 | .word 0xd0c844a0 ! 2: LDSBA_R ldsba [%r1, %r0] 0x25, %r8 |
| 5182 | splash_cmpr_20_2: |
| 5183 | mov 0, %r18 |
| 5184 | sllx %r18, 63, %r18 |
| 5185 | rd %tick, %r17 |
| 5186 | add %r17, 0x70, %r17 |
| 5187 | or %r17, %r18, %r17 |
| 5188 | ta T_CHANGE_HPRIV |
| 5189 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 5190 | .word 0xb3800011 ! 3: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 5191 | change_to_randtl_20_3: |
| 5192 | ta T_CHANGE_HPRIV ! macro |
| 5193 | done_change_to_randtl_20_3: |
| 5194 | .word 0x8f902001 ! 4: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 5195 | .word 0xd077c000 ! 5: STX_R stx %r8, [%r31 + %r0] |
| 5196 | splash_cmpr_20_4: |
| 5197 | mov 0, %r18 |
| 5198 | sllx %r18, 63, %r18 |
| 5199 | rd %tick, %r17 |
| 5200 | add %r17, 0x70, %r17 |
| 5201 | or %r17, %r18, %r17 |
| 5202 | ta T_CHANGE_PRIV |
| 5203 | .word 0xaf800011 ! 6: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 5204 | .word 0xa782c001 ! 7: WR_GRAPHICS_STATUS_REG_R wr %r11, %r1, %- |
| 5205 | .word 0xd07fe1c0 ! 8: SWAP_I swap %r8, [%r31 + 0x01c0] |
| 5206 | .word 0x9190c00c ! 9: WRPR_PIL_R wrpr %r3, %r12, %pil |
| 5207 | brcommon3_20_7: |
| 5208 | nop |
| 5209 | setx common_target, %r12, %r27 |
| 5210 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 5211 | ba,a .+12 |
| 5212 | .word 0xd1e7c029 ! 1: CASA_I casa [%r31] 0x 1, %r9, %r8 |
| 5213 | ba,a .+8 |
| 5214 | jmpl %r27+0, %r27 |
| 5215 | .word 0xd0bfc033 ! 10: STDA_R stda %r8, [%r31 + %r19] 0x01 |
| 5216 | nop |
| 5217 | ta T_CHANGE_HPRIV ! macro |
| 5218 | donret_20_8: |
| 5219 | rd %pc, %r12 |
| 5220 | add %r12, (donretarg_20_8-donret_20_8), %r12 |
| 5221 | add %r12, 0x4, %r11 ! seq tnpc |
| 5222 | wrpr %g0, 0x2, %tl |
| 5223 | wrpr %g0, %r12, %tpc |
| 5224 | wrpr %g0, %r11, %tnpc |
| 5225 | set (0x002c9d00 | (0x8b << 24)), %r13 |
| 5226 | and %r12, 0xfff, %r14 |
| 5227 | sllx %r14, 30, %r14 |
| 5228 | or %r13, %r14, %r20 |
| 5229 | wrpr %r20, %g0, %tstate |
| 5230 | wrhpr %g0, 0x175f, %htstate |
| 5231 | ta T_CHANGE_NONPRIV ! rand=0 (20) |
| 5232 | .word 0x20800001 ! 1: BN bn,a <label_0x1> |
| 5233 | retry |
| 5234 | donretarg_20_8: |
| 5235 | .word 0xd06fe10d ! 11: LDSTUB_I ldstub %r8, [%r31 + 0x010d] |
| 5236 | .word 0xab844014 ! 12: WR_CLEAR_SOFTINT_R wr %r17, %r20, %clear_softint |
| 5237 | dvapa_20_9: |
| 5238 | nop |
| 5239 | ta T_CHANGE_HPRIV |
| 5240 | mov 0xc05, %r20 |
| 5241 | mov 0x14, %r19 |
| 5242 | sllx %r20, 23, %r20 |
| 5243 | or %r19, %r20, %r19 |
| 5244 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 5245 | mov 0x38, %r18 |
| 5246 | stxa %r31, [%r18]0x58 |
| 5247 | ta T_CHANGE_NONHPRIV |
| 5248 | .word 0xd097c032 ! 13: LDUHA_R lduha [%r31, %r18] 0x01, %r8 |
| 5249 | .word 0xa16cc013 ! 14: SDIVX_R sdivx %r19, %r19, %r16 |
| 5250 | nop |
| 5251 | ta T_CHANGE_HPRIV |
| 5252 | mov 0x20+1, %r10 |
| 5253 | set sync_thr_counter5, %r23 |
| 5254 | #ifndef SPC |
| 5255 | ldxa [%g0]0x63, %o1 |
| 5256 | and %o1, 0x38, %o1 |
| 5257 | add %o1, %r23, %r23 |
| 5258 | sllx %o1, 5, %o3 !(CID*256) |
| 5259 | #endif |
| 5260 | cas [%r23],%g0,%r10 !lock |
| 5261 | brnz %r10, cwq_20_10 |
| 5262 | rd %asi, %r12 |
| 5263 | wr %g0, 0x40, %asi |
| 5264 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 5265 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 5266 | cmp %l1, 1 |
| 5267 | bne cwq_20_10 |
| 5268 | set CWQ_BASE, %l6 |
| 5269 | #ifndef SPC |
| 5270 | add %l6, %o3, %l6 |
| 5271 | #endif |
| 5272 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 5273 | best_set_reg(0x20610060, %l1, %l2) !# Control Word |
| 5274 | sllx %l2, 32, %l2 |
| 5275 | stx %l2, [%l6 + 0x0] |
| 5276 | membar #Sync |
| 5277 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 5278 | sub %l2, 0x40, %l2 |
| 5279 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 5280 | wr %r12, %g0, %asi |
| 5281 | st %g0, [%r23] |
| 5282 | cwq_20_10: |
| 5283 | ta T_CHANGE_NONHPRIV |
| 5284 | .word 0x97414000 ! 15: RDPC rd %pc, %r11 |
| 5285 | .word 0xe4800c80 ! 16: LDUWA_R lduwa [%r0, %r0] 0x64, %r18 |
| 5286 | nop |
| 5287 | ta T_CHANGE_HPRIV |
| 5288 | mov 0x20, %r10 |
| 5289 | set sync_thr_counter6, %r23 |
| 5290 | #ifndef SPC |
| 5291 | ldxa [%g0]0x63, %o1 |
| 5292 | and %o1, 0x38, %o1 |
| 5293 | add %o1, %r23, %r23 |
| 5294 | #endif |
| 5295 | cas [%r23],%g0,%r10 !lock |
| 5296 | brnz %r10, sma_20_11 |
| 5297 | rd %asi, %r12 |
| 5298 | wr %g0, 0x40, %asi |
| 5299 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 5300 | set 0x000a1fff, %g1 |
| 5301 | stxa %g1, [%g0 + 0x80] %asi |
| 5302 | wr %r12, %g0, %asi |
| 5303 | st %g0, [%r23] |
| 5304 | sma_20_11: |
| 5305 | ta T_CHANGE_NONHPRIV |
| 5306 | .word 0xe5e7e00b ! 17: CASA_R casa [%r31] %asi, %r11, %r18 |
| 5307 | brcommon1_20_12: |
| 5308 | nop |
| 5309 | setx common_target, %r12, %r27 |
| 5310 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 5311 | ba,a .+12 |
| 5312 | .word 0xc32fe120 ! 1: STXFSR_I st-sfr %f1, [0x0120, %r31] |
| 5313 | ba,a .+8 |
| 5314 | jmpl %r27+0, %r27 |
| 5315 | .word 0xa1b04493 ! 18: FCMPLE32 fcmple32 %d32, %d50, %r16 |
| 5316 | .word 0x8d903b13 ! 19: WRPR_PSTATE_I wrpr %r0, 0x1b13, %pstate |
| 5317 | #if (defined SPC || defined CMP1) |
| 5318 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_14) + 8, 16, 16)) -> intp(4,0,20) |
| 5319 | #else |
| 5320 | setx 0x43ecbd852ac9bcef, %r1, %r28 |
| 5321 | stxa %r28, [%g0] 0x73 |
| 5322 | #endif |
| 5323 | intvec_20_14: |
| 5324 | .word 0x39400001 ! 20: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 5325 | splash_tba_20_15: |
| 5326 | nop |
| 5327 | ta T_CHANGE_PRIV |
| 5328 | setx 0x00000004003a0000, %r11, %r12 |
| 5329 | .word 0x8b90000c ! 21: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 5330 | .word 0xa7808011 ! 22: WR_GRAPHICS_STATUS_REG_R wr %r2, %r17, %- |
| 5331 | intveclr_20_17: |
| 5332 | nop |
| 5333 | ta T_CHANGE_HPRIV |
| 5334 | setx 0xb88a470f2d06922e, %r1, %r28 |
| 5335 | stxa %r28, [%g0] 0x72 |
| 5336 | ta T_CHANGE_NONHPRIV |
| 5337 | .word 0x25400001 ! 23: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 5338 | trapasi_20_18: |
| 5339 | nop |
| 5340 | mov 0x0, %r1 ! (VA for ASI 0x4c) |
| 5341 | .word 0xd4d04980 ! 24: LDSHA_R ldsha [%r1, %r0] 0x4c, %r10 |
| 5342 | nop |
| 5343 | mov 0x80, %g3 |
| 5344 | stxa %g3, [%g3] 0x5f |
| 5345 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 |
| 5346 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 |
| 5347 | .word 0xd45fc000 ! 25: LDX_R ldx [%r31 + %r0], %r10 |
| 5348 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 5349 | reduce_priv_lvl_20_19: |
| 5350 | ta T_CHANGE_NONPRIV ! macro |
| 5351 | intveclr_20_20: |
| 5352 | nop |
| 5353 | ta T_CHANGE_HPRIV |
| 5354 | setx 0xd0fed285229a538d, %r1, %r28 |
| 5355 | stxa %r28, [%g0] 0x72 |
| 5356 | .word 0x25400001 ! 27: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 5357 | intveclr_20_21: |
| 5358 | nop |
| 5359 | ta T_CHANGE_HPRIV |
| 5360 | setx 0x8afe3cee83ea1e98, %r1, %r28 |
| 5361 | stxa %r28, [%g0] 0x72 |
| 5362 | ta T_CHANGE_NONHPRIV |
| 5363 | .word 0x25400001 ! 28: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 5364 | nop |
| 5365 | mov 0x80, %g3 |
| 5366 | stxa %g3, [%g3] 0x5f |
| 5367 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 |
| 5368 | .word 0xd45fc000 ! 29: LDX_R ldx [%r31 + %r0], %r10 |
| 5369 | brcommon3_20_22: |
| 5370 | nop |
| 5371 | setx common_target, %r12, %r27 |
| 5372 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 5373 | ba,a .+12 |
| 5374 | .word 0xd46fe110 ! 1: LDSTUB_I ldstub %r10, [%r31 + 0x0110] |
| 5375 | ba,a .+8 |
| 5376 | jmpl %r27+0, %r27 |
| 5377 | .word 0xd49fe1f0 ! 30: LDDA_I ldda [%r31, + 0x01f0] %asi, %r10 |
| 5378 | nop |
| 5379 | ta T_CHANGE_HPRIV |
| 5380 | mov 0x20+1, %r10 |
| 5381 | set sync_thr_counter5, %r23 |
| 5382 | #ifndef SPC |
| 5383 | ldxa [%g0]0x63, %o1 |
| 5384 | and %o1, 0x38, %o1 |
| 5385 | add %o1, %r23, %r23 |
| 5386 | sllx %o1, 5, %o3 !(CID*256) |
| 5387 | #endif |
| 5388 | cas [%r23],%g0,%r10 !lock |
| 5389 | brnz %r10, cwq_20_23 |
| 5390 | rd %asi, %r12 |
| 5391 | wr %g0, 0x40, %asi |
| 5392 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 5393 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 5394 | cmp %l1, 1 |
| 5395 | bne cwq_20_23 |
| 5396 | set CWQ_BASE, %l6 |
| 5397 | #ifndef SPC |
| 5398 | add %l6, %o3, %l6 |
| 5399 | #endif |
| 5400 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 5401 | best_set_reg(0x206100c0, %l1, %l2) !# Control Word |
| 5402 | sllx %l2, 32, %l2 |
| 5403 | stx %l2, [%l6 + 0x0] |
| 5404 | membar #Sync |
| 5405 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 5406 | sub %l2, 0x40, %l2 |
| 5407 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 5408 | wr %r12, %g0, %asi |
| 5409 | st %g0, [%r23] |
| 5410 | cwq_20_23: |
| 5411 | ta T_CHANGE_NONHPRIV |
| 5412 | .word 0x9b414000 ! 31: RDPC rd %pc, %r13 |
| 5413 | .word 0x8799e3f8 ! 32: WRHPR_HINTP_I wrhpr %r7, 0x03f8, %hintp |
| 5414 | .word 0xd497e038 ! 33: LDUHA_I lduha [%r31, + 0x0038] %asi, %r10 |
| 5415 | .word 0xd497c02c ! 34: LDUHA_R lduha [%r31, %r12] 0x01, %r10 |
| 5416 | splash_lsu_20_25: |
| 5417 | nop |
| 5418 | ta T_CHANGE_HPRIV |
| 5419 | set 0x8340b3d6, %r2 |
| 5420 | mov 0x4, %r1 |
| 5421 | sllx %r1, 32, %r1 |
| 5422 | or %r1, %r2, %r2 |
| 5423 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 5424 | ta T_CHANGE_NONHPRIV |
| 5425 | .word 0x3d400001 ! 35: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 5426 | .word 0xa784000d ! 36: WR_GRAPHICS_STATUS_REG_R wr %r16, %r13, %- |
| 5427 | nop |
| 5428 | ta T_CHANGE_HPRIV ! macro |
| 5429 | donret_20_27: |
| 5430 | rd %pc, %r12 |
| 5431 | add %r12, (donretarg_20_27-donret_20_27), %r12 |
| 5432 | add %r12, 0x4, %r11 ! seq tnpc |
| 5433 | wrpr %g0, 0x2, %tl |
| 5434 | wrpr %g0, %r12, %tpc |
| 5435 | wrpr %g0, %r11, %tnpc |
| 5436 | set (0x00140a00 | (0x88 << 24)), %r13 |
| 5437 | and %r12, 0xfff, %r14 |
| 5438 | sllx %r14, 30, %r14 |
| 5439 | or %r13, %r14, %r20 |
| 5440 | wrpr %r20, %g0, %tstate |
| 5441 | wrhpr %g0, 0xfd7, %htstate |
| 5442 | ta T_CHANGE_NONHPRIV ! rand=1 (20) |
| 5443 | .word 0x2a800001 ! 1: BCS bcs,a <label_0x1> |
| 5444 | done |
| 5445 | donretarg_20_27: |
| 5446 | .word 0x2a800001 ! 37: BCS bcs,a <label_0x1> |
| 5447 | #if (defined SPC || defined CMP1) |
| 5448 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_28) + 24, 16, 16)) -> intp(6,0,8) |
| 5449 | #else |
| 5450 | setx 0x0cc941411927058a, %r1, %r28 |
| 5451 | stxa %r28, [%g0] 0x73 |
| 5452 | #endif |
| 5453 | intvec_20_28: |
| 5454 | .word 0x39400001 ! 38: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 5455 | .word 0x91944011 ! 39: WRPR_PIL_R wrpr %r17, %r17, %pil |
| 5456 | nop |
| 5457 | ta T_CHANGE_HPRIV |
| 5458 | mov 0x20, %r10 |
| 5459 | set sync_thr_counter6, %r23 |
| 5460 | #ifndef SPC |
| 5461 | ldxa [%g0]0x63, %o1 |
| 5462 | and %o1, 0x38, %o1 |
| 5463 | add %o1, %r23, %r23 |
| 5464 | #endif |
| 5465 | cas [%r23],%g0,%r10 !lock |
| 5466 | brnz %r10, sma_20_30 |
| 5467 | rd %asi, %r12 |
| 5468 | wr %g0, 0x40, %asi |
| 5469 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 5470 | set 0x00021fff, %g1 |
| 5471 | stxa %g1, [%g0 + 0x80] %asi |
| 5472 | wr %r12, %g0, %asi |
| 5473 | st %g0, [%r23] |
| 5474 | sma_20_30: |
| 5475 | ta T_CHANGE_NONHPRIV |
| 5476 | .word 0xd5e7e011 ! 40: CASA_R casa [%r31] %asi, %r17, %r10 |
| 5477 | .word 0xd497e110 ! 41: LDUHA_I lduha [%r31, + 0x0110] %asi, %r10 |
| 5478 | .word 0x8d802000 ! 42: WRFPRS_I wr %r0, 0x0000, %fprs |
| 5479 | intveclr_20_31: |
| 5480 | nop |
| 5481 | ta T_CHANGE_HPRIV |
| 5482 | setx 0xe0388dd9a4b48192, %r1, %r28 |
| 5483 | stxa %r28, [%g0] 0x72 |
| 5484 | ta T_CHANGE_NONHPRIV |
| 5485 | .word 0x25400001 ! 43: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 5486 | .word 0xa7848012 ! 44: WR_GRAPHICS_STATUS_REG_R wr %r18, %r18, %- |
| 5487 | .word 0x8143e011 ! 45: MEMBAR membar #LoadLoad | #Lookaside |
| 5488 | fpinit_20_34: |
| 5489 | nop |
| 5490 | setx fp_data_quads, %r19, %r20 |
| 5491 | ldd [%r20], %f0 |
| 5492 | ldd [%r20+8], %f4 |
| 5493 | ld [%r20+16], %fsr |
| 5494 | ld [%r20+24], %r19 |
| 5495 | wr %r19, %g0, %gsr |
| 5496 | .word 0xc3e82af6 ! 46: PREFETCHA_I prefetcha [%r0, + 0x0af6] %asi, #one_read |
| 5497 | .word 0x29800001 ! 47: FBL fbl,a <label_0x1> |
| 5498 | splash_hpstate_20_36: |
| 5499 | .word 0x2f400001 ! 1: FBPU fbu,a,pn %fcc0, <label_0x1> |
| 5500 | .word 0x81982e1b ! 48: WRHPR_HPSTATE_I wrhpr %r0, 0x0e1b, %hpstate |
| 5501 | nop |
| 5502 | ta T_CHANGE_HPRIV |
| 5503 | mov 0x20+1, %r10 |
| 5504 | set sync_thr_counter5, %r23 |
| 5505 | #ifndef SPC |
| 5506 | ldxa [%g0]0x63, %o1 |
| 5507 | and %o1, 0x38, %o1 |
| 5508 | add %o1, %r23, %r23 |
| 5509 | sllx %o1, 5, %o3 !(CID*256) |
| 5510 | #endif |
| 5511 | cas [%r23],%g0,%r10 !lock |
| 5512 | brnz %r10, cwq_20_37 |
| 5513 | rd %asi, %r12 |
| 5514 | wr %g0, 0x40, %asi |
| 5515 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 5516 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 5517 | cmp %l1, 1 |
| 5518 | bne cwq_20_37 |
| 5519 | set CWQ_BASE, %l6 |
| 5520 | #ifndef SPC |
| 5521 | add %l6, %o3, %l6 |
| 5522 | #endif |
| 5523 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 5524 | best_set_reg(0x20610080, %l1, %l2) !# Control Word |
| 5525 | sllx %l2, 32, %l2 |
| 5526 | stx %l2, [%l6 + 0x0] |
| 5527 | membar #Sync |
| 5528 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 5529 | sub %l2, 0x40, %l2 |
| 5530 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 5531 | wr %r12, %g0, %asi |
| 5532 | st %g0, [%r23] |
| 5533 | cwq_20_37: |
| 5534 | ta T_CHANGE_NONHPRIV |
| 5535 | .word 0xa7414000 ! 49: RDPC rd %pc, %r19 |
| 5536 | splash_hpstate_20_38: |
| 5537 | ta T_CHANGE_NONHPRIV |
| 5538 | .word 0x819830d7 ! 50: WRHPR_HPSTATE_I wrhpr %r0, 0x10d7, %hpstate |
| 5539 | brlz,a,pn %r16, skip_20_39 |
| 5540 | .word 0x87ac8a4c ! 1: FCMPd fcmpd %fcc<n>, %f18, %f12 |
| 5541 | .align 2048 |
| 5542 | skip_20_39: |
| 5543 | .word 0xe43fc000 ! 51: STD_R std %r18, [%r31 + %r0] |
| 5544 | invalw |
| 5545 | mov 0xb3, %r30 |
| 5546 | .word 0x91d0001e ! 52: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 5547 | splash_cmpr_20_40: |
| 5548 | mov 1, %r18 |
| 5549 | sllx %r18, 63, %r18 |
| 5550 | rd %tick, %r17 |
| 5551 | add %r17, 0x100, %r17 |
| 5552 | or %r17, %r18, %r17 |
| 5553 | .word 0xaf800011 ! 53: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 5554 | setx 0x5a3e4b4e47097c47, %r1, %r28 |
| 5555 | stxa %r28, [%g0] 0x73 |
| 5556 | intvec_20_41: |
| 5557 | .word 0x39400001 ! 54: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 5558 | trapasi_20_42: |
| 5559 | nop |
| 5560 | mov 0x0, %r1 ! (VA for ASI 0x73) |
| 5561 | .word 0xe4d04e60 ! 55: LDSHA_R ldsha [%r1, %r0] 0x73, %r18 |
| 5562 | memptr_20_43: |
| 5563 | set 0x60140000, %r31 |
| 5564 | .word 0x8581615b ! 56: WRCCR_I wr %r5, 0x015b, %ccr |
| 5565 | memptr_20_44: |
| 5566 | set 0x60740000, %r31 |
| 5567 | .word 0x8584fbe3 ! 57: WRCCR_I wr %r19, 0x1be3, %ccr |
| 5568 | .word 0x95a18d29 ! 58: FsMULd fsmuld %f6, %f40, %f10 |
| 5569 | nop |
| 5570 | ta T_CHANGE_HPRIV ! macro |
| 5571 | donret_20_45: |
| 5572 | rd %pc, %r12 |
| 5573 | add %r12, (donretarg_20_45-donret_20_45+4), %r12 |
| 5574 | add %r12, 0x4, %r11 ! seq tnpc |
| 5575 | wrpr %g0, 0x1, %tl |
| 5576 | wrpr %g0, %r12, %tpc |
| 5577 | wrpr %g0, %r11, %tnpc |
| 5578 | set (0x0065fd00 | (0x89 << 24)), %r13 |
| 5579 | and %r12, 0xfff, %r14 |
| 5580 | sllx %r14, 30, %r14 |
| 5581 | or %r13, %r14, %r20 |
| 5582 | wrpr %r20, %g0, %tstate |
| 5583 | wrhpr %g0, 0x16d4, %htstate |
| 5584 | ta T_CHANGE_NONHPRIV ! rand=1 (20) |
| 5585 | done |
| 5586 | donretarg_20_45: |
| 5587 | .word 0xd4ffe1a0 ! 59: SWAPA_I swapa %r10, [%r31 + 0x01a0] %asi |
| 5588 | .word 0x95702c8b ! 60: POPC_I popc 0x0c8b, %r10 |
| 5589 | splash_tba_20_47: |
| 5590 | nop |
| 5591 | ta T_CHANGE_PRIV |
| 5592 | setx 0x00000004003a0000, %r11, %r12 |
| 5593 | .word 0x8b90000c ! 61: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 5594 | ibp_20_48: |
| 5595 | nop |
| 5596 | ta T_CHANGE_NONHPRIV |
| 5597 | .word 0xa1a289d2 ! 62: FDIVd fdivd %f10, %f18, %f16 |
| 5598 | .word 0x95450000 ! 63: RD_SET_SOFTINT rd %set_softint, %r10 |
| 5599 | .word 0xd677c000 ! 64: STX_R stx %r11, [%r31 + %r0] |
| 5600 | .word 0xd71fe070 ! 65: LDDF_I ldd [%r31, 0x0070], %f11 |
| 5601 | memptr_20_49: |
| 5602 | set 0x60740000, %r31 |
| 5603 | .word 0x85846b79 ! 66: WRCCR_I wr %r17, 0x0b79, %ccr |
| 5604 | .word 0x81b01021 ! 67: SIAM siam 1 |
| 5605 | .word 0x97703bda ! 68: POPC_I popc 0x1bda, %r11 |
| 5606 | .word 0xdb1fe028 ! 69: LDDF_I ldd [%r31, 0x0028], %f13 |
| 5607 | .word 0x36780001 ! 70: BPGE <illegal instruction> |
| 5608 | dvapa_20_51: |
| 5609 | nop |
| 5610 | ta T_CHANGE_HPRIV |
| 5611 | mov 0xc87, %r20 |
| 5612 | mov 0xb, %r19 |
| 5613 | sllx %r20, 23, %r20 |
| 5614 | or %r19, %r20, %r19 |
| 5615 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 5616 | mov 0x38, %r18 |
| 5617 | stxa %r31, [%r18]0x58 |
| 5618 | ta T_CHANGE_NONHPRIV |
| 5619 | .word 0x87ac0a53 ! 71: FCMPd fcmpd %fcc<n>, %f16, %f50 |
| 5620 | splash_cmpr_20_52: |
| 5621 | mov 1, %r18 |
| 5622 | sllx %r18, 63, %r18 |
| 5623 | rd %tick, %r17 |
| 5624 | add %r17, 0x60, %r17 |
| 5625 | or %r17, %r18, %r17 |
| 5626 | ta T_CHANGE_HPRIV |
| 5627 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 5628 | ta T_CHANGE_PRIV |
| 5629 | .word 0xaf800011 ! 72: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 5630 | intveclr_20_53: |
| 5631 | nop |
| 5632 | ta T_CHANGE_HPRIV |
| 5633 | setx 0x191c13d8bc0af6f7, %r1, %r28 |
| 5634 | stxa %r28, [%g0] 0x72 |
| 5635 | ta T_CHANGE_NONHPRIV |
| 5636 | .word 0x25400001 ! 73: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 5637 | jmptr_20_54: |
| 5638 | nop |
| 5639 | best_set_reg(0xe0a00000, %r20, %r27) |
| 5640 | .word 0xb7c6c000 ! 74: JMPL_R jmpl %r27 + %r0, %r27 |
| 5641 | mondo_20_55: |
| 5642 | nop |
| 5643 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 5644 | ta T_CHANGE_PRIV |
| 5645 | stxa %r20, [%r0+0x3c0] %asi |
| 5646 | .word 0x9d920010 ! 75: WRPR_WSTATE_R wrpr %r8, %r16, %wstate |
| 5647 | #if (defined SPC || defined CMP1) |
| 5648 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_56) + 8, 16, 16)) -> intp(4,0,6) |
| 5649 | #else |
| 5650 | setx 0xbbcf192329cec6b8, %r1, %r28 |
| 5651 | stxa %r28, [%g0] 0x73 |
| 5652 | #endif |
| 5653 | intvec_20_56: |
| 5654 | .word 0x39400001 ! 76: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 5655 | .word 0x89800011 ! 77: WRTICK_R wr %r0, %r17, %tick |
| 5656 | splash_lsu_20_58: |
| 5657 | nop |
| 5658 | ta T_CHANGE_HPRIV |
| 5659 | set 0xa206dbec, %r2 |
| 5660 | mov 0x4, %r1 |
| 5661 | sllx %r1, 32, %r1 |
| 5662 | or %r1, %r2, %r2 |
| 5663 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 5664 | .word 0x3d400001 ! 78: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 5665 | splash_tba_20_59: |
| 5666 | nop |
| 5667 | ta T_CHANGE_PRIV |
| 5668 | setx 0x00000004003a0000, %r11, %r12 |
| 5669 | .word 0x8b90000c ! 79: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 5670 | .word 0x8780208b ! 80: WRASI_I wr %r0, 0x008b, %asi |
| 5671 | .word 0xd45fe0d0 ! 81: LDX_I ldx [%r31 + 0x00d0], %r10 |
| 5672 | br_badelay1_20_60: |
| 5673 | .word 0xd43fc008 ! 1: STD_R std %r10, [%r31 + %r8] |
| 5674 | .word 0xe730c012 ! 1: STQF_R - %f19, [%r18, %r3] |
| 5675 | .word 0xa9b7c4d3 ! 1: FCMPNE32 fcmpne32 %d62, %d50, %r20 |
| 5676 | normalw |
| 5677 | .word 0xa7458000 ! 82: RD_SOFTINT_REG rd %softint, %r19 |
| 5678 | mondo_20_61: |
| 5679 | nop |
| 5680 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 5681 | stxa %r13, [%r0+0x3d8] %asi |
| 5682 | .word 0x9d948007 ! 83: WRPR_WSTATE_R wrpr %r18, %r7, %wstate |
| 5683 | nop |
| 5684 | mov 0x80, %g3 |
| 5685 | stxa %g3, [%g3] 0x57 |
| 5686 | .word 0xe45fc000 ! 84: LDX_R ldx [%r31 + %r0], %r18 |
| 5687 | nop |
| 5688 | ta T_CHANGE_HPRIV |
| 5689 | mov 0x20+1, %r10 |
| 5690 | set sync_thr_counter5, %r23 |
| 5691 | #ifndef SPC |
| 5692 | ldxa [%g0]0x63, %o1 |
| 5693 | and %o1, 0x38, %o1 |
| 5694 | add %o1, %r23, %r23 |
| 5695 | sllx %o1, 5, %o3 !(CID*256) |
| 5696 | #endif |
| 5697 | cas [%r23],%g0,%r10 !lock |
| 5698 | brnz %r10, cwq_20_62 |
| 5699 | rd %asi, %r12 |
| 5700 | wr %g0, 0x40, %asi |
| 5701 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 5702 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 5703 | cmp %l1, 1 |
| 5704 | bne cwq_20_62 |
| 5705 | set CWQ_BASE, %l6 |
| 5706 | #ifndef SPC |
| 5707 | add %l6, %o3, %l6 |
| 5708 | #endif |
| 5709 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 5710 | best_set_reg(0x20610000, %l1, %l2) !# Control Word |
| 5711 | sllx %l2, 32, %l2 |
| 5712 | stx %l2, [%l6 + 0x0] |
| 5713 | membar #Sync |
| 5714 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 5715 | sub %l2, 0x40, %l2 |
| 5716 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 5717 | wr %r12, %g0, %asi |
| 5718 | st %g0, [%r23] |
| 5719 | cwq_20_62: |
| 5720 | ta T_CHANGE_NONHPRIV |
| 5721 | .word 0x9b414000 ! 85: RDPC rd %pc, %r13 |
| 5722 | pmu_20_63: |
| 5723 | nop |
| 5724 | setx 0xfffffe66fffff6ad, %g1, %g7 |
| 5725 | .word 0xa3800007 ! 86: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 5726 | splash_tba_20_64: |
| 5727 | nop |
| 5728 | ta T_CHANGE_PRIV |
| 5729 | set 0x120000, %r12 |
| 5730 | .word 0x8b90000c ! 87: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 5731 | splash_cmpr_20_65: |
| 5732 | mov 0, %r18 |
| 5733 | sllx %r18, 63, %r18 |
| 5734 | rd %tick, %r17 |
| 5735 | add %r17, 0x50, %r17 |
| 5736 | or %r17, %r18, %r17 |
| 5737 | ta T_CHANGE_PRIV |
| 5738 | .word 0xb3800011 ! 88: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 5739 | splash_lsu_20_66: |
| 5740 | nop |
| 5741 | ta T_CHANGE_HPRIV |
| 5742 | set 0xad0129f5, %r2 |
| 5743 | mov 0x4, %r1 |
| 5744 | sllx %r1, 32, %r1 |
| 5745 | or %r1, %r2, %r2 |
| 5746 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 5747 | ta T_CHANGE_NONHPRIV |
| 5748 | .word 0x3d400001 ! 89: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 5749 | .word 0xc30fc000 ! 90: LDXFSR_R ld-fsr [%r31, %r0], %f1 |
| 5750 | nop |
| 5751 | ta T_CHANGE_HPRIV |
| 5752 | mov 0x20+1, %r10 |
| 5753 | set sync_thr_counter5, %r23 |
| 5754 | #ifndef SPC |
| 5755 | ldxa [%g0]0x63, %o1 |
| 5756 | and %o1, 0x38, %o1 |
| 5757 | add %o1, %r23, %r23 |
| 5758 | sllx %o1, 5, %o3 !(CID*256) |
| 5759 | #endif |
| 5760 | cas [%r23],%g0,%r10 !lock |
| 5761 | brnz %r10, cwq_20_67 |
| 5762 | rd %asi, %r12 |
| 5763 | wr %g0, 0x40, %asi |
| 5764 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 5765 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 5766 | cmp %l1, 1 |
| 5767 | bne cwq_20_67 |
| 5768 | set CWQ_BASE, %l6 |
| 5769 | #ifndef SPC |
| 5770 | add %l6, %o3, %l6 |
| 5771 | #endif |
| 5772 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 5773 | best_set_reg(0x20610090, %l1, %l2) !# Control Word |
| 5774 | sllx %l2, 32, %l2 |
| 5775 | stx %l2, [%l6 + 0x0] |
| 5776 | membar #Sync |
| 5777 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 5778 | sub %l2, 0x40, %l2 |
| 5779 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 5780 | wr %r12, %g0, %asi |
| 5781 | st %g0, [%r23] |
| 5782 | cwq_20_67: |
| 5783 | ta T_CHANGE_NONHPRIV |
| 5784 | .word 0x97414000 ! 91: RDPC rd %pc, %r11 |
| 5785 | .word 0xd827e041 ! 92: STW_I stw %r12, [%r31 + 0x0041] |
| 5786 | splash_tba_20_68: |
| 5787 | nop |
| 5788 | ta T_CHANGE_PRIV |
| 5789 | set 0x120000, %r12 |
| 5790 | .word 0x8b90000c ! 93: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 5791 | setx 0x81cedefee082d2c7, %r1, %r28 |
| 5792 | stxa %r28, [%g0] 0x73 |
| 5793 | intvec_20_69: |
| 5794 | .word 0x39400001 ! 94: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 5795 | nop |
| 5796 | mov 0x80, %g3 |
| 5797 | stxa %g3, [%g3] 0x57 |
| 5798 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 |
| 5799 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 |
| 5800 | .word 0xd85fc000 ! 95: LDX_R ldx [%r31 + %r0], %r12 |
| 5801 | .word 0x8d802000 ! 96: WRFPRS_I wr %r0, 0x0000, %fprs |
| 5802 | .word 0xd9e7e009 ! 97: CASA_R casa [%r31] %asi, %r9, %r12 |
| 5803 | splash_cmpr_20_71: |
| 5804 | mov 0, %r18 |
| 5805 | sllx %r18, 63, %r18 |
| 5806 | rd %tick, %r17 |
| 5807 | add %r17, 0x100, %r17 |
| 5808 | or %r17, %r18, %r17 |
| 5809 | ta T_CHANGE_HPRIV |
| 5810 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 5811 | ta T_CHANGE_PRIV |
| 5812 | .word 0xaf800011 ! 98: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 5813 | nop |
| 5814 | mov 0x80, %g3 |
| 5815 | stxa %g3, [%g3] 0x57 |
| 5816 | .word 0x9d97c000 ! 1: WRPR_WSTATE_R wrpr %r31, %r0, %wstate |
| 5817 | .word 0xd85fc000 ! 99: LDX_R ldx [%r31 + %r0], %r12 |
| 5818 | ceter_20_72: |
| 5819 | nop |
| 5820 | ta T_CHANGE_HPRIV |
| 5821 | mov 6, %r17 |
| 5822 | sllx %r17, 60, %r17 |
| 5823 | mov 0x18, %r16 |
| 5824 | stxa %r17, [%r16]0x4c |
| 5825 | ta T_CHANGE_NONHPRIV |
| 5826 | .word 0x99410000 ! 100: RDTICK rd %tick, %r12 |
| 5827 | .word 0x24800001 ! 1: BLE ble,a <label_0x1> |
| 5828 | .word 0x8d902e6d ! 101: WRPR_PSTATE_I wrpr %r0, 0x0e6d, %pstate |
| 5829 | intveclr_20_74: |
| 5830 | nop |
| 5831 | ta T_CHANGE_HPRIV |
| 5832 | setx 0x27c53966f2b2febb, %r1, %r28 |
| 5833 | stxa %r28, [%g0] 0x72 |
| 5834 | ta T_CHANGE_NONHPRIV |
| 5835 | .word 0x25400001 ! 102: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 5836 | fpinit_20_75: |
| 5837 | nop |
| 5838 | setx fp_data_quads, %r19, %r20 |
| 5839 | ldd [%r20], %f0 |
| 5840 | ldd [%r20+8], %f4 |
| 5841 | ld [%r20+16], %fsr |
| 5842 | ld [%r20+24], %r19 |
| 5843 | wr %r19, %g0, %gsr |
| 5844 | .word 0x8da009a4 ! 103: FDIVs fdivs %f0, %f4, %f6 |
| 5845 | jmptr_20_76: |
| 5846 | nop |
| 5847 | best_set_reg(0xe0a00000, %r20, %r27) |
| 5848 | .word 0xb7c6c000 ! 104: JMPL_R jmpl %r27 + %r0, %r27 |
| 5849 | jmptr_20_77: |
| 5850 | nop |
| 5851 | best_set_reg(0xe0a00000, %r20, %r27) |
| 5852 | .word 0xb7c6c000 ! 105: JMPL_R jmpl %r27 + %r0, %r27 |
| 5853 | nop |
| 5854 | ta T_CHANGE_HPRIV |
| 5855 | mov 0x20, %r10 |
| 5856 | set sync_thr_counter6, %r23 |
| 5857 | #ifndef SPC |
| 5858 | ldxa [%g0]0x63, %o1 |
| 5859 | and %o1, 0x38, %o1 |
| 5860 | add %o1, %r23, %r23 |
| 5861 | #endif |
| 5862 | cas [%r23],%g0,%r10 !lock |
| 5863 | brnz %r10, sma_20_78 |
| 5864 | rd %asi, %r12 |
| 5865 | wr %g0, 0x40, %asi |
| 5866 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 5867 | set 0x000e1fff, %g1 |
| 5868 | stxa %g1, [%g0 + 0x80] %asi |
| 5869 | wr %r12, %g0, %asi |
| 5870 | st %g0, [%r23] |
| 5871 | sma_20_78: |
| 5872 | ta T_CHANGE_NONHPRIV |
| 5873 | .word 0xe9e7e014 ! 106: CASA_R casa [%r31] %asi, %r20, %r20 |
| 5874 | nop |
| 5875 | ta T_CHANGE_HPRIV |
| 5876 | mov 0x20, %r10 |
| 5877 | set sync_thr_counter6, %r23 |
| 5878 | #ifndef SPC |
| 5879 | ldxa [%g0]0x63, %o1 |
| 5880 | and %o1, 0x38, %o1 |
| 5881 | add %o1, %r23, %r23 |
| 5882 | #endif |
| 5883 | cas [%r23],%g0,%r10 !lock |
| 5884 | brnz %r10, sma_20_79 |
| 5885 | rd %asi, %r12 |
| 5886 | wr %g0, 0x40, %asi |
| 5887 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 5888 | set 0x00021fff, %g1 |
| 5889 | stxa %g1, [%g0 + 0x80] %asi |
| 5890 | wr %r12, %g0, %asi |
| 5891 | st %g0, [%r23] |
| 5892 | sma_20_79: |
| 5893 | ta T_CHANGE_NONHPRIV |
| 5894 | .word 0xe9e7e00d ! 107: CASA_R casa [%r31] %asi, %r13, %r20 |
| 5895 | splash_cmpr_20_80: |
| 5896 | mov 1, %r18 |
| 5897 | sllx %r18, 63, %r18 |
| 5898 | rd %tick, %r17 |
| 5899 | add %r17, 0x80, %r17 |
| 5900 | or %r17, %r18, %r17 |
| 5901 | ta T_CHANGE_HPRIV |
| 5902 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 5903 | .word 0xaf800011 ! 108: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 5904 | ibp_20_81: |
| 5905 | nop |
| 5906 | .word 0xc1bfc3e0 ! 109: STDFA_R stda %f0, [%r0, %r31] |
| 5907 | .word 0xe88008a0 ! 110: LDUWA_R lduwa [%r0, %r0] 0x45, %r20 |
| 5908 | .word 0x87ac0ad4 ! 111: FCMPEd fcmped %fcc<n>, %f16, %f20 |
| 5909 | nop |
| 5910 | ta T_CHANGE_HPRIV |
| 5911 | mov 0x20+1, %r10 |
| 5912 | set sync_thr_counter5, %r23 |
| 5913 | #ifndef SPC |
| 5914 | ldxa [%g0]0x63, %o1 |
| 5915 | and %o1, 0x38, %o1 |
| 5916 | add %o1, %r23, %r23 |
| 5917 | sllx %o1, 5, %o3 !(CID*256) |
| 5918 | #endif |
| 5919 | cas [%r23],%g0,%r10 !lock |
| 5920 | brnz %r10, cwq_20_82 |
| 5921 | rd %asi, %r12 |
| 5922 | wr %g0, 0x40, %asi |
| 5923 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 5924 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 5925 | cmp %l1, 1 |
| 5926 | bne cwq_20_82 |
| 5927 | set CWQ_BASE, %l6 |
| 5928 | #ifndef SPC |
| 5929 | add %l6, %o3, %l6 |
| 5930 | #endif |
| 5931 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 5932 | best_set_reg(0x20610000, %l1, %l2) !# Control Word |
| 5933 | sllx %l2, 32, %l2 |
| 5934 | stx %l2, [%l6 + 0x0] |
| 5935 | membar #Sync |
| 5936 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 5937 | sub %l2, 0x40, %l2 |
| 5938 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 5939 | wr %r12, %g0, %asi |
| 5940 | st %g0, [%r23] |
| 5941 | cwq_20_82: |
| 5942 | ta T_CHANGE_NONHPRIV |
| 5943 | .word 0x9b414000 ! 112: RDPC rd %pc, %r13 |
| 5944 | cwp_20_83: |
| 5945 | set user_data_start, %o7 |
| 5946 | .word 0x93902004 ! 113: WRPR_CWP_I wrpr %r0, 0x0004, %cwp |
| 5947 | .word 0xa6dc800c ! 114: SMULcc_R smulcc %r18, %r12, %r19 |
| 5948 | .word 0x8d802004 ! 115: WRFPRS_I wr %r0, 0x0004, %fprs |
| 5949 | trapasi_20_84: |
| 5950 | nop |
| 5951 | mov 0x3d0, %r1 ! (VA for ASI 0x25) |
| 5952 | .word 0xe4c044a0 ! 116: LDSWA_R ldswa [%r1, %r0] 0x25, %r18 |
| 5953 | .word 0x8d802004 ! 117: WRFPRS_I wr %r0, 0x0004, %fprs |
| 5954 | trapasi_20_85: |
| 5955 | nop |
| 5956 | mov 0x3d8, %r1 ! (VA for ASI 0x25) |
| 5957 | .word 0xe49044a0 ! 118: LDUHA_R lduha [%r1, %r0] 0x25, %r18 |
| 5958 | .word 0x9153c000 ! 119: RDPR_FQ <illegal instruction> |
| 5959 | splash_hpstate_20_86: |
| 5960 | .word 0x24800001 ! 1: BLE ble,a <label_0x1> |
| 5961 | .word 0x81983517 ! 120: WRHPR_HPSTATE_I wrhpr %r0, 0x1517, %hpstate |
| 5962 | intveclr_20_87: |
| 5963 | nop |
| 5964 | ta T_CHANGE_HPRIV |
| 5965 | setx 0xad5b10ca50279aae, %r1, %r28 |
| 5966 | stxa %r28, [%g0] 0x72 |
| 5967 | .word 0x25400001 ! 121: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 5968 | .word 0xe937e01c ! 122: STQF_I - %f20, [0x001c, %r31] |
| 5969 | .word 0xa4c5244c ! 123: ADDCcc_I addccc %r20, 0x044c, %r18 |
| 5970 | #if (defined SPC || defined CMP1) |
| 5971 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_88) + 0, 16, 16)) -> intp(3,0,8) |
| 5972 | #else |
| 5973 | setx 0x1c091018cbb37d71, %r1, %r28 |
| 5974 | stxa %r28, [%g0] 0x73 |
| 5975 | #endif |
| 5976 | intvec_20_88: |
| 5977 | .word 0x39400001 ! 124: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 5978 | trapasi_20_89: |
| 5979 | nop |
| 5980 | mov 0x0, %r1 ! (VA for ASI 0x73) |
| 5981 | .word 0xe8c84e60 ! 125: LDSBA_R ldsba [%r1, %r0] 0x73, %r20 |
| 5982 | trapasi_20_90: |
| 5983 | nop |
| 5984 | mov 0x3e0, %r1 ! (VA for ASI 0x25) |
| 5985 | .word 0xe8c844a0 ! 126: LDSBA_R ldsba [%r1, %r0] 0x25, %r20 |
| 5986 | fbug skip_20_91 |
| 5987 | .word 0xc36c7328 ! 1: PREFETCH_I prefetch [%r17 + 0xfffff328], #one_read |
| 5988 | .align 512 |
| 5989 | skip_20_91: |
| 5990 | .word 0x9f8039ac ! 127: SIR sir 0x19ac |
| 5991 | intveclr_20_92: |
| 5992 | nop |
| 5993 | ta T_CHANGE_HPRIV |
| 5994 | setx 0x8c8cad755fada476, %r1, %r28 |
| 5995 | stxa %r28, [%g0] 0x72 |
| 5996 | ta T_CHANGE_NONHPRIV |
| 5997 | .word 0x25400001 ! 128: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 5998 | trapasi_20_93: |
| 5999 | nop |
| 6000 | mov 0x18, %r1 ! (VA for ASI 0x50) |
| 6001 | .word 0xd0d04a00 ! 129: LDSHA_R ldsha [%r1, %r0] 0x50, %r8 |
| 6002 | .word 0x89800011 ! 130: WRTICK_R wr %r0, %r17, %tick |
| 6003 | .word 0xe19fc2c0 ! 131: LDDFA_R ldda [%r31, %r0], %f16 |
| 6004 | .word 0x89800011 ! 132: WRTICK_R wr %r0, %r17, %tick |
| 6005 | .word 0xd197e150 ! 133: LDQFA_I - [%r31, 0x0150], %f8 |
| 6006 | dvapa_20_96: |
| 6007 | nop |
| 6008 | ta T_CHANGE_HPRIV |
| 6009 | mov 0x973, %r20 |
| 6010 | mov 0xa, %r19 |
| 6011 | sllx %r20, 23, %r20 |
| 6012 | or %r19, %r20, %r19 |
| 6013 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 6014 | mov 0x38, %r18 |
| 6015 | stxa %r31, [%r18]0x58 |
| 6016 | ta T_CHANGE_NONHPRIV |
| 6017 | .word 0x87aa0a54 ! 134: FCMPd fcmpd %fcc<n>, %f8, %f20 |
| 6018 | .word 0xd13fc000 ! 135: STDF_R std %f8, [%r0, %r31] |
| 6019 | otherw |
| 6020 | mov 0xb1, %r30 |
| 6021 | .word 0x91d0001e ! 136: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 6022 | .word 0x87802088 ! 137: WRASI_I wr %r0, 0x0088, %asi |
| 6023 | memptr_20_97: |
| 6024 | set 0x60740000, %r31 |
| 6025 | .word 0x8580e0fe ! 138: WRCCR_I wr %r3, 0x00fe, %ccr |
| 6026 | splash_cmpr_20_98: |
| 6027 | mov 0, %r18 |
| 6028 | sllx %r18, 63, %r18 |
| 6029 | rd %tick, %r17 |
| 6030 | add %r17, 0x80, %r17 |
| 6031 | or %r17, %r18, %r17 |
| 6032 | .word 0xaf800011 ! 139: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 6033 | .word 0x87ad0a33 ! 140: FCMPs fcmps %fcc<n>, %f20, %f19 |
| 6034 | .word 0x89800011 ! 141: WRTICK_R wr %r0, %r17, %tick |
| 6035 | .word 0xd0c7e1f0 ! 142: LDSWA_I ldswa [%r31, + 0x01f0] %asi, %r8 |
| 6036 | splash_tba_20_100: |
| 6037 | nop |
| 6038 | ta T_CHANGE_PRIV |
| 6039 | set 0x120000, %r12 |
| 6040 | .word 0x8b90000c ! 143: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 6041 | change_to_randtl_20_101: |
| 6042 | ta T_CHANGE_HPRIV ! macro |
| 6043 | done_change_to_randtl_20_101: |
| 6044 | .word 0x8f902000 ! 144: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 6045 | nop |
| 6046 | ta T_CHANGE_HPRIV ! macro |
| 6047 | donret_20_102: |
| 6048 | rd %pc, %r12 |
| 6049 | add %r12, (donretarg_20_102-donret_20_102+4), %r12 |
| 6050 | add %r12, 0x4, %r11 ! seq tnpc |
| 6051 | wrpr %g0, 0x1, %tl |
| 6052 | wrpr %g0, %r12, %tpc |
| 6053 | wrpr %g0, %r11, %tnpc |
| 6054 | set (0x008df400 | (0x8a << 24)), %r13 |
| 6055 | and %r12, 0xfff, %r14 |
| 6056 | sllx %r14, 30, %r14 |
| 6057 | or %r13, %r14, %r20 |
| 6058 | wrpr %r20, %g0, %tstate |
| 6059 | wrhpr %g0, 0x1c06, %htstate |
| 6060 | ta T_CHANGE_NONHPRIV ! rand=1 (20) |
| 6061 | .word 0x37400001 ! 1: FBPGE fbge,a,pn %fcc0, <label_0x1> |
| 6062 | retry |
| 6063 | donretarg_20_102: |
| 6064 | .word 0x36800001 ! 145: BGE bge,a <label_0x1> |
| 6065 | .word 0xd09fc034 ! 146: LDDA_R ldda [%r31, %r20] 0x01, %r8 |
| 6066 | .word 0x93d020b4 ! 147: Tcc_I tne icc_or_xcc, %r0 + 180 |
| 6067 | nop |
| 6068 | ta T_CHANGE_HPRIV |
| 6069 | mov 0x20+1, %r10 |
| 6070 | set sync_thr_counter5, %r23 |
| 6071 | #ifndef SPC |
| 6072 | ldxa [%g0]0x63, %o1 |
| 6073 | and %o1, 0x38, %o1 |
| 6074 | add %o1, %r23, %r23 |
| 6075 | sllx %o1, 5, %o3 !(CID*256) |
| 6076 | #endif |
| 6077 | cas [%r23],%g0,%r10 !lock |
| 6078 | brnz %r10, cwq_20_104 |
| 6079 | rd %asi, %r12 |
| 6080 | wr %g0, 0x40, %asi |
| 6081 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 6082 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 6083 | cmp %l1, 1 |
| 6084 | bne cwq_20_104 |
| 6085 | set CWQ_BASE, %l6 |
| 6086 | #ifndef SPC |
| 6087 | add %l6, %o3, %l6 |
| 6088 | #endif |
| 6089 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 6090 | best_set_reg(0x206100c0, %l1, %l2) !# Control Word |
| 6091 | sllx %l2, 32, %l2 |
| 6092 | stx %l2, [%l6 + 0x0] |
| 6093 | membar #Sync |
| 6094 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 6095 | sub %l2, 0x40, %l2 |
| 6096 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 6097 | wr %r12, %g0, %asi |
| 6098 | st %g0, [%r23] |
| 6099 | cwq_20_104: |
| 6100 | ta T_CHANGE_NONHPRIV |
| 6101 | .word 0xa3414000 ! 148: RDPC rd %pc, %r17 |
| 6102 | mondo_20_105: |
| 6103 | nop |
| 6104 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 6105 | ta T_CHANGE_PRIV |
| 6106 | stxa %r7, [%r0+0x3e0] %asi |
| 6107 | .word 0x9d920014 ! 149: WRPR_WSTATE_R wrpr %r8, %r20, %wstate |
| 6108 | .word 0xc19fe1a0 ! 150: LDDFA_I ldda [%r31, 0x01a0], %f0 |
| 6109 | nop |
| 6110 | ta T_CHANGE_HPRIV |
| 6111 | mov 0x20+1, %r10 |
| 6112 | set sync_thr_counter5, %r23 |
| 6113 | #ifndef SPC |
| 6114 | ldxa [%g0]0x63, %o1 |
| 6115 | and %o1, 0x38, %o1 |
| 6116 | add %o1, %r23, %r23 |
| 6117 | sllx %o1, 5, %o3 !(CID*256) |
| 6118 | #endif |
| 6119 | cas [%r23],%g0,%r10 !lock |
| 6120 | brnz %r10, cwq_20_106 |
| 6121 | rd %asi, %r12 |
| 6122 | wr %g0, 0x40, %asi |
| 6123 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 6124 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 6125 | cmp %l1, 1 |
| 6126 | bne cwq_20_106 |
| 6127 | set CWQ_BASE, %l6 |
| 6128 | #ifndef SPC |
| 6129 | add %l6, %o3, %l6 |
| 6130 | #endif |
| 6131 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 6132 | best_set_reg(0x206100c0, %l1, %l2) !# Control Word |
| 6133 | sllx %l2, 32, %l2 |
| 6134 | stx %l2, [%l6 + 0x0] |
| 6135 | membar #Sync |
| 6136 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 6137 | sub %l2, 0x40, %l2 |
| 6138 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 6139 | wr %r12, %g0, %asi |
| 6140 | st %g0, [%r23] |
| 6141 | cwq_20_106: |
| 6142 | ta T_CHANGE_NONHPRIV |
| 6143 | .word 0xa1414000 ! 151: RDPC rd %pc, %r16 |
| 6144 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 6145 | reduce_priv_lvl_20_107: |
| 6146 | ta T_CHANGE_NONPRIV ! macro |
| 6147 | #if (defined SPC || defined CMP1) |
| 6148 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_108) + 48, 16, 16)) -> intp(7,0,18) |
| 6149 | #else |
| 6150 | setx 0xb37e8ac57c781a7f, %r1, %r28 |
| 6151 | stxa %r28, [%g0] 0x73 |
| 6152 | #endif |
| 6153 | intvec_20_108: |
| 6154 | .word 0x39400001 ! 153: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 6155 | .word 0x8d903e62 ! 154: WRPR_PSTATE_I wrpr %r0, 0x1e62, %pstate |
| 6156 | dvapa_20_110: |
| 6157 | nop |
| 6158 | ta T_CHANGE_HPRIV |
| 6159 | mov 0xbb6, %r20 |
| 6160 | mov 0x1e, %r19 |
| 6161 | sllx %r20, 23, %r20 |
| 6162 | or %r19, %r20, %r19 |
| 6163 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 6164 | mov 0x38, %r18 |
| 6165 | stxa %r31, [%r18]0x58 |
| 6166 | ta T_CHANGE_NONHPRIV |
| 6167 | .word 0xa5b187c8 ! 155: PDIST pdistn %d6, %d8, %d18 |
| 6168 | .word 0xd08008a0 ! 156: LDUWA_R lduwa [%r0, %r0] 0x45, %r8 |
| 6169 | .word 0x89800011 ! 157: WRTICK_R wr %r0, %r17, %tick |
| 6170 | memptr_20_112: |
| 6171 | set 0x60140000, %r31 |
| 6172 | .word 0x858239d1 ! 158: WRCCR_I wr %r8, 0x19d1, %ccr |
| 6173 | .word 0xa64cc011 ! 159: MULX_R mulx %r19, %r17, %r19 |
| 6174 | nop |
| 6175 | ta T_CHANGE_HPRIV |
| 6176 | mov 0x20, %r10 |
| 6177 | set sync_thr_counter6, %r23 |
| 6178 | #ifndef SPC |
| 6179 | ldxa [%g0]0x63, %o1 |
| 6180 | and %o1, 0x38, %o1 |
| 6181 | add %o1, %r23, %r23 |
| 6182 | #endif |
| 6183 | cas [%r23],%g0,%r10 !lock |
| 6184 | brnz %r10, sma_20_113 |
| 6185 | rd %asi, %r12 |
| 6186 | wr %g0, 0x40, %asi |
| 6187 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 6188 | set 0x00121fff, %g1 |
| 6189 | stxa %g1, [%g0 + 0x80] %asi |
| 6190 | wr %r12, %g0, %asi |
| 6191 | st %g0, [%r23] |
| 6192 | sma_20_113: |
| 6193 | ta T_CHANGE_NONHPRIV |
| 6194 | .word 0xe3e7e014 ! 160: CASA_R casa [%r31] %asi, %r20, %r17 |
| 6195 | ibp_20_114: |
| 6196 | nop |
| 6197 | .word 0xa3b4c7ca ! 161: PDIST pdistn %d50, %d10, %d48 |
| 6198 | memptr_20_115: |
| 6199 | set 0x60740000, %r31 |
| 6200 | .word 0x85852e4d ! 162: WRCCR_I wr %r20, 0x0e4d, %ccr |
| 6201 | splash_tba_20_116: |
| 6202 | nop |
| 6203 | ta T_CHANGE_PRIV |
| 6204 | set 0x120000, %r12 |
| 6205 | .word 0x8b90000c ! 163: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 6206 | .word 0xa04d0009 ! 164: MULX_R mulx %r20, %r9, %r16 |
| 6207 | .word 0x91d020b2 ! 165: Tcc_I ta icc_or_xcc, %r0 + 178 |
| 6208 | ibp_20_117: |
| 6209 | nop |
| 6210 | ta T_CHANGE_NONHPRIV |
| 6211 | .word 0x95b1c7c3 ! 166: PDIST pdistn %d38, %d34, %d10 |
| 6212 | brcommon2_20_118: |
| 6213 | nop |
| 6214 | setx common_target, %r12, %r27 |
| 6215 | ba,a .+12 |
| 6216 | .word 0xa3a0c9d3 ! 1: FDIVd fdivd %f34, %f50, %f48 |
| 6217 | ba,a .+8 |
| 6218 | jmpl %r27+0, %r27 |
| 6219 | .word 0xc19fdf20 ! 167: LDDFA_R ldda [%r31, %r0], %f0 |
| 6220 | .word 0xd027e00c ! 168: STW_I stw %r8, [%r31 + 0x000c] |
| 6221 | ibp_20_119: |
| 6222 | nop |
| 6223 | ta T_CHANGE_NONHPRIV |
| 6224 | .word 0xa5b10494 ! 169: FCMPLE32 fcmple32 %d4, %d20, %r18 |
| 6225 | .word 0xa5520000 ! 170: RDPR_PIL <illegal instruction> |
| 6226 | mondo_20_120: |
| 6227 | nop |
| 6228 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 6229 | stxa %r9, [%r0+0x3d0] %asi |
| 6230 | .word 0x9d91c003 ! 171: WRPR_WSTATE_R wrpr %r7, %r3, %wstate |
| 6231 | .word 0x8d802004 ! 172: WRFPRS_I wr %r0, 0x0004, %fprs |
| 6232 | .word 0xe08fe0e8 ! 173: LDUBA_I lduba [%r31, + 0x00e8] %asi, %r16 |
| 6233 | setx 0x838184cb49d2d9a9, %r1, %r28 |
| 6234 | stxa %r28, [%g0] 0x73 |
| 6235 | intvec_20_121: |
| 6236 | .word 0x39400001 ! 174: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 6237 | .word 0xa8c467f6 ! 175: ADDCcc_I addccc %r17, 0x07f6, %r20 |
| 6238 | ibp_20_122: |
| 6239 | nop |
| 6240 | .word 0xe1bfda00 ! 176: STDFA_R stda %f16, [%r0, %r31] |
| 6241 | ibp_20_123: |
| 6242 | nop |
| 6243 | .word 0xe19fdf20 ! 177: LDDFA_R ldda [%r31, %r0], %f16 |
| 6244 | ibp_20_124: |
| 6245 | nop |
| 6246 | .word 0xa1b4c492 ! 178: FCMPLE32 fcmple32 %d50, %d18, %r16 |
| 6247 | .word 0xe897e0d8 ! 179: LDUHA_I lduha [%r31, + 0x00d8] %asi, %r20 |
| 6248 | fpinit_20_125: |
| 6249 | nop |
| 6250 | setx fp_data_quads, %r19, %r20 |
| 6251 | ldd [%r20], %f0 |
| 6252 | ldd [%r20+8], %f4 |
| 6253 | ld [%r20+16], %fsr |
| 6254 | ld [%r20+24], %r19 |
| 6255 | wr %r19, %g0, %gsr |
| 6256 | .word 0xc3e8234d ! 180: PREFETCHA_I prefetcha [%r0, + 0x034d] %asi, #one_read |
| 6257 | .word 0x8143e011 ! 181: MEMBAR membar #LoadLoad | #Lookaside |
| 6258 | ibp_20_127: |
| 6259 | nop |
| 6260 | ta T_CHANGE_NONHPRIV |
| 6261 | .word 0xe1bfe1e0 ! 182: STDFA_I stda %f16, [0x01e0, %r31] |
| 6262 | #if (defined SPC || defined CMP1) |
| 6263 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_128) + 8, 16, 16)) -> intp(2,0,28) |
| 6264 | #else |
| 6265 | setx 0x469c3958fb297135, %r1, %r28 |
| 6266 | stxa %r28, [%g0] 0x73 |
| 6267 | #endif |
| 6268 | intvec_20_128: |
| 6269 | .word 0x39400001 ! 183: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 6270 | intveclr_20_129: |
| 6271 | nop |
| 6272 | ta T_CHANGE_HPRIV |
| 6273 | setx 0x65ebb5b1d57c57c4, %r1, %r28 |
| 6274 | stxa %r28, [%g0] 0x72 |
| 6275 | ta T_CHANGE_NONHPRIV |
| 6276 | .word 0x25400001 ! 184: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 6277 | dvapa_20_130: |
| 6278 | nop |
| 6279 | ta T_CHANGE_HPRIV |
| 6280 | mov 0xd43, %r20 |
| 6281 | mov 0x8, %r19 |
| 6282 | sllx %r20, 23, %r20 |
| 6283 | or %r19, %r20, %r19 |
| 6284 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 6285 | mov 0x38, %r18 |
| 6286 | stxa %r31, [%r18]0x58 |
| 6287 | ta T_CHANGE_NONHPRIV |
| 6288 | .word 0xe1bfdb60 ! 185: STDFA_R stda %f16, [%r0, %r31] |
| 6289 | mondo_20_131: |
| 6290 | nop |
| 6291 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 6292 | stxa %r12, [%r0+0x3d0] %asi |
| 6293 | .word 0x9d924014 ! 186: WRPR_WSTATE_R wrpr %r9, %r20, %wstate |
| 6294 | .word 0xe877c000 ! 187: STX_R stx %r20, [%r31 + %r0] |
| 6295 | mondo_20_132: |
| 6296 | nop |
| 6297 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 6298 | stxa %r18, [%r0+0x3c0] %asi |
| 6299 | .word 0x9d94000a ! 188: WRPR_WSTATE_R wrpr %r16, %r10, %wstate |
| 6300 | mondo_20_133: |
| 6301 | nop |
| 6302 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 6303 | ta T_CHANGE_PRIV |
| 6304 | stxa %r2, [%r0+0x3d8] %asi |
| 6305 | .word 0x9d950012 ! 189: WRPR_WSTATE_R wrpr %r20, %r18, %wstate |
| 6306 | memptr_20_134: |
| 6307 | set 0x60740000, %r31 |
| 6308 | .word 0x85812e98 ! 190: WRCCR_I wr %r4, 0x0e98, %ccr |
| 6309 | splash_hpstate_20_135: |
| 6310 | .word 0x81982197 ! 191: WRHPR_HPSTATE_I wrhpr %r0, 0x0197, %hpstate |
| 6311 | .word 0xe937c000 ! 192: STQF_R - %f20, [%r0, %r31] |
| 6312 | splash_hpstate_20_136: |
| 6313 | .word 0x2b400001 ! 1: FBPUG fbug,a,pn %fcc0, <label_0x1> |
| 6314 | .word 0x81983cd3 ! 193: WRHPR_HPSTATE_I wrhpr %r0, 0x1cd3, %hpstate |
| 6315 | splash_hpstate_20_137: |
| 6316 | ta T_CHANGE_NONHPRIV |
| 6317 | .word 0x27400001 ! 1: FBPUL fbul,a,pn %fcc0, <label_0x1> |
| 6318 | .word 0x819826cd ! 194: WRHPR_HPSTATE_I wrhpr %r0, 0x06cd, %hpstate |
| 6319 | .word 0xe19fdf20 ! 195: LDDFA_R ldda [%r31, %r0], %f16 |
| 6320 | .word 0x89800011 ! 196: WRTICK_R wr %r0, %r17, %tick |
| 6321 | intveclr_20_139: |
| 6322 | nop |
| 6323 | ta T_CHANGE_HPRIV |
| 6324 | setx 0xba32bbf6c6a5de02, %r1, %r28 |
| 6325 | stxa %r28, [%g0] 0x72 |
| 6326 | ta T_CHANGE_NONHPRIV |
| 6327 | .word 0x25400001 ! 197: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 6328 | .word 0x89800011 ! 198: WRTICK_R wr %r0, %r17, %tick |
| 6329 | mondo_20_141: |
| 6330 | nop |
| 6331 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 6332 | stxa %r17, [%r0+0x3e0] %asi |
| 6333 | .word 0x9d904010 ! 199: WRPR_WSTATE_R wrpr %r1, %r16, %wstate |
| 6334 | splash_lsu_20_142: |
| 6335 | nop |
| 6336 | ta T_CHANGE_HPRIV |
| 6337 | set 0xe35abed7, %r2 |
| 6338 | mov 0x4, %r1 |
| 6339 | sllx %r1, 32, %r1 |
| 6340 | or %r1, %r2, %r2 |
| 6341 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 6342 | .word 0x3d400001 ! 200: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 6343 | change_to_randtl_20_143: |
| 6344 | ta T_CHANGE_HPRIV ! macro |
| 6345 | done_change_to_randtl_20_143: |
| 6346 | .word 0x8f902000 ! 201: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 6347 | nop |
| 6348 | nop |
| 6349 | ta T_CHANGE_PRIV |
| 6350 | wrpr %g0, %g0, %gl |
| 6351 | nop |
| 6352 | nop |
| 6353 | setx join_lbl_0_0, %g1, %g2 |
| 6354 | jmp %g2 |
| 6355 | nop |
| 6356 | fork_lbl_0_5: |
| 6357 | ta T_CHANGE_NONHPRIV |
| 6358 | mondo_10_0: |
| 6359 | nop |
| 6360 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 6361 | ta T_CHANGE_PRIV |
| 6362 | stxa %r17, [%r0+0x3d0] %asi |
| 6363 | .word 0x9d948009 ! 1: WRPR_WSTATE_R wrpr %r18, %r9, %wstate |
| 6364 | trapasi_10_1: |
| 6365 | nop |
| 6366 | mov 0x3c8, %r1 ! (VA for ASI 0x25) |
| 6367 | .word 0xd09044a0 ! 2: LDUHA_R lduha [%r1, %r0] 0x25, %r8 |
| 6368 | splash_cmpr_10_2: |
| 6369 | mov 0, %r18 |
| 6370 | sllx %r18, 63, %r18 |
| 6371 | rd %tick, %r17 |
| 6372 | add %r17, 0x60, %r17 |
| 6373 | or %r17, %r18, %r17 |
| 6374 | ta T_CHANGE_HPRIV |
| 6375 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 6376 | .word 0xb3800011 ! 3: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 6377 | change_to_randtl_10_3: |
| 6378 | ta T_CHANGE_HPRIV ! macro |
| 6379 | done_change_to_randtl_10_3: |
| 6380 | .word 0x8f902000 ! 4: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 6381 | .word 0xd077c000 ! 5: STX_R stx %r8, [%r31 + %r0] |
| 6382 | splash_cmpr_10_4: |
| 6383 | mov 0, %r18 |
| 6384 | sllx %r18, 63, %r18 |
| 6385 | rd %tick, %r17 |
| 6386 | add %r17, 0x80, %r17 |
| 6387 | or %r17, %r18, %r17 |
| 6388 | ta T_CHANGE_PRIV |
| 6389 | .word 0xaf800011 ! 6: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 6390 | splash_decr_10_5: |
| 6391 | nop |
| 6392 | ta T_CHANGE_HPRIV |
| 6393 | mov 8, %r1 |
| 6394 | stxa %r0, [%r1] 0x45 |
| 6395 | .word 0xa784c002 ! 7: WR_GRAPHICS_STATUS_REG_R wr %r19, %r2, %- |
| 6396 | .word 0xd07fe110 ! 8: SWAP_I swap %r8, [%r31 + 0x0110] |
| 6397 | .word 0x91940012 ! 9: WRPR_PIL_R wrpr %r16, %r18, %pil |
| 6398 | brcommon3_10_7: |
| 6399 | nop |
| 6400 | setx common_target, %r12, %r27 |
| 6401 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 6402 | ba,a .+12 |
| 6403 | .word 0xd1e7c02d ! 1: CASA_I casa [%r31] 0x 1, %r13, %r8 |
| 6404 | ba,a .+8 |
| 6405 | jmpl %r27+0, %r27 |
| 6406 | .word 0xd09fe0d0 ! 10: LDDA_I ldda [%r31, + 0x00d0] %asi, %r8 |
| 6407 | nop |
| 6408 | ta T_CHANGE_HPRIV ! macro |
| 6409 | donret_10_8: |
| 6410 | rd %pc, %r12 |
| 6411 | add %r12, (donretarg_10_8-donret_10_8), %r12 |
| 6412 | add %r12, 0x4, %r11 ! seq tnpc |
| 6413 | wrpr %g0, 0x2, %tl |
| 6414 | wrpr %g0, %r12, %tpc |
| 6415 | wrpr %g0, %r11, %tnpc |
| 6416 | set (0x0008ff00 | (0x4f << 24)), %r13 |
| 6417 | and %r12, 0xfff, %r14 |
| 6418 | sllx %r14, 30, %r14 |
| 6419 | or %r13, %r14, %r20 |
| 6420 | wrpr %r20, %g0, %tstate |
| 6421 | wrhpr %g0, 0x1656, %htstate |
| 6422 | ta T_CHANGE_NONPRIV ! rand=0 (10) |
| 6423 | .word 0x22800001 ! 1: BE be,a <label_0x1> |
| 6424 | retry |
| 6425 | donretarg_10_8: |
| 6426 | .word 0xd06fe197 ! 11: LDSTUB_I ldstub %r8, [%r31 + 0x0197] |
| 6427 | .word 0xab850011 ! 12: WR_CLEAR_SOFTINT_R wr %r20, %r17, %clear_softint |
| 6428 | dvapa_10_9: |
| 6429 | nop |
| 6430 | ta T_CHANGE_HPRIV |
| 6431 | mov 0xa2d, %r20 |
| 6432 | mov 0xd, %r19 |
| 6433 | sllx %r20, 23, %r20 |
| 6434 | or %r19, %r20, %r19 |
| 6435 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 6436 | mov 0x38, %r18 |
| 6437 | stxa %r31, [%r18]0x58 |
| 6438 | ta T_CHANGE_NONHPRIV |
| 6439 | .word 0xd0dfc029 ! 13: LDXA_R ldxa [%r31, %r9] 0x01, %r8 |
| 6440 | .word 0x93698003 ! 14: SDIVX_R sdivx %r6, %r3, %r9 |
| 6441 | nop |
| 6442 | ta T_CHANGE_HPRIV |
| 6443 | mov 0x10+1, %r10 |
| 6444 | set sync_thr_counter5, %r23 |
| 6445 | #ifndef SPC |
| 6446 | ldxa [%g0]0x63, %o1 |
| 6447 | and %o1, 0x38, %o1 |
| 6448 | add %o1, %r23, %r23 |
| 6449 | sllx %o1, 5, %o3 !(CID*256) |
| 6450 | #endif |
| 6451 | cas [%r23],%g0,%r10 !lock |
| 6452 | brnz %r10, cwq_10_10 |
| 6453 | rd %asi, %r12 |
| 6454 | wr %g0, 0x40, %asi |
| 6455 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 6456 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 6457 | cmp %l1, 1 |
| 6458 | bne cwq_10_10 |
| 6459 | set CWQ_BASE, %l6 |
| 6460 | #ifndef SPC |
| 6461 | add %l6, %o3, %l6 |
| 6462 | #endif |
| 6463 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 6464 | best_set_reg(0x206100a0, %l1, %l2) !# Control Word |
| 6465 | sllx %l2, 32, %l2 |
| 6466 | stx %l2, [%l6 + 0x0] |
| 6467 | membar #Sync |
| 6468 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 6469 | sub %l2, 0x40, %l2 |
| 6470 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 6471 | wr %r12, %g0, %asi |
| 6472 | st %g0, [%r23] |
| 6473 | cwq_10_10: |
| 6474 | ta T_CHANGE_NONHPRIV |
| 6475 | .word 0x99414000 ! 15: RDPC rd %pc, %r12 |
| 6476 | .word 0xe48008a0 ! 16: LDUWA_R lduwa [%r0, %r0] 0x45, %r18 |
| 6477 | nop |
| 6478 | ta T_CHANGE_HPRIV |
| 6479 | mov 0x10, %r10 |
| 6480 | set sync_thr_counter6, %r23 |
| 6481 | #ifndef SPC |
| 6482 | ldxa [%g0]0x63, %o1 |
| 6483 | and %o1, 0x38, %o1 |
| 6484 | add %o1, %r23, %r23 |
| 6485 | #endif |
| 6486 | cas [%r23],%g0,%r10 !lock |
| 6487 | brnz %r10, sma_10_11 |
| 6488 | rd %asi, %r12 |
| 6489 | wr %g0, 0x40, %asi |
| 6490 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 6491 | set 0x00161fff, %g1 |
| 6492 | stxa %g1, [%g0 + 0x80] %asi |
| 6493 | wr %r12, %g0, %asi |
| 6494 | st %g0, [%r23] |
| 6495 | sma_10_11: |
| 6496 | ta T_CHANGE_NONHPRIV |
| 6497 | .word 0xe5e7e008 ! 17: CASA_R casa [%r31] %asi, %r8, %r18 |
| 6498 | brcommon1_10_12: |
| 6499 | nop |
| 6500 | setx common_target, %r12, %r27 |
| 6501 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 6502 | ba,a .+12 |
| 6503 | .word 0xc32fe110 ! 1: STXFSR_I st-sfr %f1, [0x0110, %r31] |
| 6504 | ba,a .+8 |
| 6505 | jmpl %r27+0, %r27 |
| 6506 | .word 0xa7a4c9a4 ! 18: FDIVs fdivs %f19, %f4, %f19 |
| 6507 | .word 0x8d903423 ! 19: WRPR_PSTATE_I wrpr %r0, 0x1423, %pstate |
| 6508 | #if (defined SPC || defined CMP1) |
| 6509 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_14) + 32, 16, 16)) -> intp(3,0,29) |
| 6510 | #else |
| 6511 | setx 0xb51fbd144ea5b6dc, %r1, %r28 |
| 6512 | stxa %r28, [%g0] 0x73 |
| 6513 | #endif |
| 6514 | intvec_10_14: |
| 6515 | .word 0x39400001 ! 20: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 6516 | splash_tba_10_15: |
| 6517 | nop |
| 6518 | ta T_CHANGE_PRIV |
| 6519 | setx 0x0000000000380000, %r11, %r12 |
| 6520 | .word 0x8b90000c ! 21: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 6521 | splash_decr_10_16: |
| 6522 | nop |
| 6523 | ta T_CHANGE_HPRIV |
| 6524 | mov 8, %r1 |
| 6525 | stxa %r0, [%r1] 0x45 |
| 6526 | .word 0xa784c012 ! 22: WR_GRAPHICS_STATUS_REG_R wr %r19, %r18, %- |
| 6527 | intveclr_10_17: |
| 6528 | nop |
| 6529 | ta T_CHANGE_HPRIV |
| 6530 | setx 0x876746f5f5fe173d, %r1, %r28 |
| 6531 | stxa %r28, [%g0] 0x72 |
| 6532 | ta T_CHANGE_NONHPRIV |
| 6533 | .word 0x25400001 ! 23: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 6534 | trapasi_10_18: |
| 6535 | nop |
| 6536 | mov 0x18, %r1 ! (VA for ASI 0x4c) |
| 6537 | .word 0xd4d84980 ! 24: LDXA_R ldxa [%r1, %r0] 0x4c, %r10 |
| 6538 | nop |
| 6539 | mov 0x80, %g3 |
| 6540 | stxa %g3, [%g3] 0x5f |
| 6541 | .word 0xd45fc000 ! 25: LDX_R ldx [%r31 + %r0], %r10 |
| 6542 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 6543 | reduce_priv_lvl_10_19: |
| 6544 | ta T_CHANGE_NONPRIV ! macro |
| 6545 | intveclr_10_20: |
| 6546 | nop |
| 6547 | ta T_CHANGE_HPRIV |
| 6548 | setx 0xf8e55f906a2f689b, %r1, %r28 |
| 6549 | stxa %r28, [%g0] 0x72 |
| 6550 | .word 0x25400001 ! 27: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 6551 | intveclr_10_21: |
| 6552 | nop |
| 6553 | ta T_CHANGE_HPRIV |
| 6554 | setx 0x186c4077fc5a0c23, %r1, %r28 |
| 6555 | stxa %r28, [%g0] 0x72 |
| 6556 | ta T_CHANGE_NONHPRIV |
| 6557 | .word 0x25400001 ! 28: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 6558 | nop |
| 6559 | mov 0x80, %g3 |
| 6560 | stxa %g3, [%g3] 0x57 |
| 6561 | .word 0xd45fc000 ! 29: LDX_R ldx [%r31 + %r0], %r10 |
| 6562 | brcommon3_10_22: |
| 6563 | nop |
| 6564 | setx common_target, %r12, %r27 |
| 6565 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 6566 | ba,a .+12 |
| 6567 | .word 0xd46fe1c0 ! 1: LDSTUB_I ldstub %r10, [%r31 + 0x01c0] |
| 6568 | ba,a .+8 |
| 6569 | jmpl %r27+0, %r27 |
| 6570 | .word 0xd5e7e00a ! 30: CASA_R casa [%r31] %asi, %r10, %r10 |
| 6571 | nop |
| 6572 | ta T_CHANGE_HPRIV |
| 6573 | mov 0x10+1, %r10 |
| 6574 | set sync_thr_counter5, %r23 |
| 6575 | #ifndef SPC |
| 6576 | ldxa [%g0]0x63, %o1 |
| 6577 | and %o1, 0x38, %o1 |
| 6578 | add %o1, %r23, %r23 |
| 6579 | sllx %o1, 5, %o3 !(CID*256) |
| 6580 | #endif |
| 6581 | cas [%r23],%g0,%r10 !lock |
| 6582 | brnz %r10, cwq_10_23 |
| 6583 | rd %asi, %r12 |
| 6584 | wr %g0, 0x40, %asi |
| 6585 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 6586 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 6587 | cmp %l1, 1 |
| 6588 | bne cwq_10_23 |
| 6589 | set CWQ_BASE, %l6 |
| 6590 | #ifndef SPC |
| 6591 | add %l6, %o3, %l6 |
| 6592 | #endif |
| 6593 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 6594 | best_set_reg(0x20610030, %l1, %l2) !# Control Word |
| 6595 | sllx %l2, 32, %l2 |
| 6596 | stx %l2, [%l6 + 0x0] |
| 6597 | membar #Sync |
| 6598 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 6599 | sub %l2, 0x40, %l2 |
| 6600 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 6601 | wr %r12, %g0, %asi |
| 6602 | st %g0, [%r23] |
| 6603 | cwq_10_23: |
| 6604 | ta T_CHANGE_NONHPRIV |
| 6605 | .word 0x91414000 ! 31: RDPC rd %pc, %r8 |
| 6606 | .word 0x879cb7d8 ! 32: WRHPR_HINTP_I wrhpr %r18, 0x17d8, %hintp |
| 6607 | .word 0xd497e030 ! 33: LDUHA_I lduha [%r31, + 0x0030] %asi, %r10 |
| 6608 | .word 0xd4bfc032 ! 34: STDA_R stda %r10, [%r31 + %r18] 0x01 |
| 6609 | splash_lsu_10_25: |
| 6610 | nop |
| 6611 | ta T_CHANGE_HPRIV |
| 6612 | set 0x999e764d, %r2 |
| 6613 | mov 0x2, %r1 |
| 6614 | sllx %r1, 32, %r1 |
| 6615 | or %r1, %r2, %r2 |
| 6616 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 6617 | ta T_CHANGE_NONHPRIV |
| 6618 | .word 0x3d400001 ! 35: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 6619 | splash_decr_10_26: |
| 6620 | nop |
| 6621 | ta T_CHANGE_HPRIV |
| 6622 | mov 8, %r1 |
| 6623 | stxa %r0, [%r1] 0x45 |
| 6624 | .word 0xa7850013 ! 36: WR_GRAPHICS_STATUS_REG_R wr %r20, %r19, %- |
| 6625 | nop |
| 6626 | ta T_CHANGE_HPRIV ! macro |
| 6627 | donret_10_27: |
| 6628 | rd %pc, %r12 |
| 6629 | add %r12, (donretarg_10_27-donret_10_27), %r12 |
| 6630 | add %r12, 0x4, %r11 ! seq tnpc |
| 6631 | wrpr %g0, 0x2, %tl |
| 6632 | wrpr %g0, %r12, %tpc |
| 6633 | wrpr %g0, %r11, %tnpc |
| 6634 | set (0x00363f00 | (0x88 << 24)), %r13 |
| 6635 | and %r12, 0xfff, %r14 |
| 6636 | sllx %r14, 30, %r14 |
| 6637 | or %r13, %r14, %r20 |
| 6638 | wrpr %r20, %g0, %tstate |
| 6639 | wrhpr %g0, 0xe03, %htstate |
| 6640 | ta T_CHANGE_NONHPRIV ! rand=1 (10) |
| 6641 | .word 0x2b400001 ! 1: FBPUG fbug,a,pn %fcc0, <label_0x1> |
| 6642 | done |
| 6643 | donretarg_10_27: |
| 6644 | .word 0x2e800001 ! 37: BVS bvs,a <label_0x1> |
| 6645 | #if (defined SPC || defined CMP1) |
| 6646 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_28) + 0, 16, 16)) -> intp(2,0,25) |
| 6647 | #else |
| 6648 | setx 0x9b4e334f8233e9a9, %r1, %r28 |
| 6649 | stxa %r28, [%g0] 0x73 |
| 6650 | #endif |
| 6651 | intvec_10_28: |
| 6652 | .word 0x39400001 ! 38: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 6653 | .word 0x91928001 ! 39: WRPR_PIL_R wrpr %r10, %r1, %pil |
| 6654 | nop |
| 6655 | ta T_CHANGE_HPRIV |
| 6656 | mov 0x10, %r10 |
| 6657 | set sync_thr_counter6, %r23 |
| 6658 | #ifndef SPC |
| 6659 | ldxa [%g0]0x63, %o1 |
| 6660 | and %o1, 0x38, %o1 |
| 6661 | add %o1, %r23, %r23 |
| 6662 | #endif |
| 6663 | cas [%r23],%g0,%r10 !lock |
| 6664 | brnz %r10, sma_10_30 |
| 6665 | rd %asi, %r12 |
| 6666 | wr %g0, 0x40, %asi |
| 6667 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 6668 | set 0x00161fff, %g1 |
| 6669 | stxa %g1, [%g0 + 0x80] %asi |
| 6670 | wr %r12, %g0, %asi |
| 6671 | st %g0, [%r23] |
| 6672 | sma_10_30: |
| 6673 | ta T_CHANGE_NONHPRIV |
| 6674 | .word 0xd5e7e011 ! 40: CASA_R casa [%r31] %asi, %r17, %r10 |
| 6675 | .word 0xd497e1d8 ! 41: LDUHA_I lduha [%r31, + 0x01d8] %asi, %r10 |
| 6676 | .word 0x8d802000 ! 42: WRFPRS_I wr %r0, 0x0000, %fprs |
| 6677 | intveclr_10_31: |
| 6678 | nop |
| 6679 | ta T_CHANGE_HPRIV |
| 6680 | setx 0x4c84d31fdd5c2d63, %r1, %r28 |
| 6681 | stxa %r28, [%g0] 0x72 |
| 6682 | ta T_CHANGE_NONHPRIV |
| 6683 | .word 0x25400001 ! 43: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 6684 | splash_decr_10_32: |
| 6685 | nop |
| 6686 | ta T_CHANGE_HPRIV |
| 6687 | mov 8, %r1 |
| 6688 | stxa %r0, [%r1] 0x45 |
| 6689 | .word 0xa784c012 ! 44: WR_GRAPHICS_STATUS_REG_R wr %r19, %r18, %- |
| 6690 | .word 0x8143e011 ! 45: MEMBAR membar #LoadLoad | #Lookaside |
| 6691 | fpinit_10_34: |
| 6692 | nop |
| 6693 | setx fp_data_quads, %r19, %r20 |
| 6694 | ldd [%r20], %f0 |
| 6695 | ldd [%r20+8], %f4 |
| 6696 | ld [%r20+16], %fsr |
| 6697 | ld [%r20+24], %r19 |
| 6698 | wr %r19, %g0, %gsr |
| 6699 | .word 0x87a80a44 ! 46: FCMPd fcmpd %fcc<n>, %f0, %f4 |
| 6700 | invtsb_10_35: |
| 6701 | nop |
| 6702 | ta T_CHANGE_HPRIV |
| 6703 | rd %asi, %r21 |
| 6704 | wr %r0,ASI_MMU_REAL_RANGE, %asi |
| 6705 | mov 1, %r20 |
| 6706 | sllx %r20, 63, %r20 |
| 6707 | ldxa [ASI_MMU_REAL_RANGE_0] %asi, %r22 |
| 6708 | xor %r22 ,%r20, %r22 |
| 6709 | stxa %r22, [ASI_MMU_REAL_RANGE_0] %asi |
| 6710 | ldxa [ASI_MMU_REAL_RANGE_1] %asi, %r22 |
| 6711 | xor %r22 ,%r20, %r22 |
| 6712 | stxa %r22, [ASI_MMU_REAL_RANGE_1] %asi |
| 6713 | ldxa [ASI_MMU_REAL_RANGE_2] %asi, %r22 |
| 6714 | xor %r22 ,%r20, %r22 |
| 6715 | stxa %r22, [ASI_MMU_REAL_RANGE_2] %asi |
| 6716 | ldxa [ASI_MMU_REAL_RANGE_3] %asi, %r22 |
| 6717 | xor %r22 ,%r20, %r22 |
| 6718 | stxa %r22, [ASI_MMU_REAL_RANGE_3] %asi |
| 6719 | wr %r21, %r0, %asi |
| 6720 | ta T_CHANGE_NONHPRIV |
| 6721 | .word 0x29800001 ! 47: FBL fbl,a <label_0x1> |
| 6722 | splash_hpstate_10_36: |
| 6723 | .word 0x3d400001 ! 1: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 6724 | .word 0x81982c4d ! 48: WRHPR_HPSTATE_I wrhpr %r0, 0x0c4d, %hpstate |
| 6725 | nop |
| 6726 | ta T_CHANGE_HPRIV |
| 6727 | mov 0x10+1, %r10 |
| 6728 | set sync_thr_counter5, %r23 |
| 6729 | #ifndef SPC |
| 6730 | ldxa [%g0]0x63, %o1 |
| 6731 | and %o1, 0x38, %o1 |
| 6732 | add %o1, %r23, %r23 |
| 6733 | sllx %o1, 5, %o3 !(CID*256) |
| 6734 | #endif |
| 6735 | cas [%r23],%g0,%r10 !lock |
| 6736 | brnz %r10, cwq_10_37 |
| 6737 | rd %asi, %r12 |
| 6738 | wr %g0, 0x40, %asi |
| 6739 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 6740 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 6741 | cmp %l1, 1 |
| 6742 | bne cwq_10_37 |
| 6743 | set CWQ_BASE, %l6 |
| 6744 | #ifndef SPC |
| 6745 | add %l6, %o3, %l6 |
| 6746 | #endif |
| 6747 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 6748 | best_set_reg(0x20610050, %l1, %l2) !# Control Word |
| 6749 | sllx %l2, 32, %l2 |
| 6750 | stx %l2, [%l6 + 0x0] |
| 6751 | membar #Sync |
| 6752 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 6753 | sub %l2, 0x40, %l2 |
| 6754 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 6755 | wr %r12, %g0, %asi |
| 6756 | st %g0, [%r23] |
| 6757 | cwq_10_37: |
| 6758 | ta T_CHANGE_NONHPRIV |
| 6759 | .word 0x93414000 ! 49: RDPC rd %pc, %r9 |
| 6760 | splash_hpstate_10_38: |
| 6761 | ta T_CHANGE_NONHPRIV |
| 6762 | .word 0x81983ede ! 50: WRHPR_HPSTATE_I wrhpr %r0, 0x1ede, %hpstate |
| 6763 | fbule skip_10_39 |
| 6764 | brlez,pt %r17, skip_10_39 |
| 6765 | .align 2048 |
| 6766 | skip_10_39: |
| 6767 | .word 0xc30fc000 ! 51: LDXFSR_R ld-fsr [%r31, %r0], %f1 |
| 6768 | invalw |
| 6769 | mov 0x30, %r30 |
| 6770 | .word 0x91d0001e ! 52: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 6771 | splash_cmpr_10_40: |
| 6772 | mov 0, %r18 |
| 6773 | sllx %r18, 63, %r18 |
| 6774 | rd %tick, %r17 |
| 6775 | add %r17, 0x80, %r17 |
| 6776 | or %r17, %r18, %r17 |
| 6777 | .word 0xaf800011 ! 53: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 6778 | setx 0x7631a3a80239bbcd, %r1, %r28 |
| 6779 | stxa %r28, [%g0] 0x73 |
| 6780 | intvec_10_41: |
| 6781 | .word 0x39400001 ! 54: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 6782 | trapasi_10_42: |
| 6783 | nop |
| 6784 | mov 0x0, %r1 ! (VA for ASI 0x73) |
| 6785 | .word 0xe4c04e60 ! 55: LDSWA_R ldswa [%r1, %r0] 0x73, %r18 |
| 6786 | memptr_10_43: |
| 6787 | set 0x60540000, %r31 |
| 6788 | .word 0x8582ef41 ! 56: WRCCR_I wr %r11, 0x0f41, %ccr |
| 6789 | memptr_10_44: |
| 6790 | set 0x60740000, %r31 |
| 6791 | .word 0x85837abe ! 57: WRCCR_I wr %r13, 0x1abe, %ccr |
| 6792 | .word 0x95a50d26 ! 58: FsMULd fsmuld %f20, %f6, %f10 |
| 6793 | nop |
| 6794 | ta T_CHANGE_HPRIV ! macro |
| 6795 | donret_10_45: |
| 6796 | rd %pc, %r12 |
| 6797 | add %r12, (donretarg_10_45-donret_10_45+4), %r12 |
| 6798 | add %r12, 0x4, %r11 ! seq tnpc |
| 6799 | wrpr %g0, 0x1, %tl |
| 6800 | wrpr %g0, %r12, %tpc |
| 6801 | wrpr %g0, %r11, %tnpc |
| 6802 | set (0x00466200 | (16 << 24)), %r13 |
| 6803 | and %r12, 0xfff, %r14 |
| 6804 | sllx %r14, 30, %r14 |
| 6805 | or %r13, %r14, %r20 |
| 6806 | wrpr %r20, %g0, %tstate |
| 6807 | wrhpr %g0, 0x54f, %htstate |
| 6808 | ta T_CHANGE_NONHPRIV ! rand=1 (10) |
| 6809 | done |
| 6810 | donretarg_10_45: |
| 6811 | .word 0xd4ffe088 ! 59: SWAPA_I swapa %r10, [%r31 + 0x0088] %asi |
| 6812 | .word 0x97b147c2 ! 60: PDIST pdistn %d36, %d2, %d42 |
| 6813 | splash_tba_10_47: |
| 6814 | nop |
| 6815 | ta T_CHANGE_PRIV |
| 6816 | setx 0x0000000000380000, %r11, %r12 |
| 6817 | .word 0x8b90000c ! 61: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 6818 | ibp_10_48: |
| 6819 | nop |
| 6820 | ta T_CHANGE_NONHPRIV |
| 6821 | .word 0x99b507d4 ! 62: PDIST pdistn %d20, %d20, %d12 |
| 6822 | .word 0xa1450000 ! 63: RD_SET_SOFTINT rd %set_softint, %r16 |
| 6823 | .word 0xd677c000 ! 64: STX_R stx %r11, [%r31 + %r0] |
| 6824 | .word 0xd71fe1b0 ! 65: LDDF_I ldd [%r31, 0x01b0], %f11 |
| 6825 | memptr_10_49: |
| 6826 | set 0x60140000, %r31 |
| 6827 | .word 0x8584fefa ! 66: WRCCR_I wr %r19, 0x1efa, %ccr |
| 6828 | .word 0x81b01021 ! 67: SIAM siam 1 |
| 6829 | .word 0xa7b407c9 ! 68: PDIST pdistn %d16, %d40, %d50 |
| 6830 | .word 0xdb1fe110 ! 69: LDDF_I ldd [%r31, 0x0110], %f13 |
| 6831 | .word 0x36780001 ! 70: BPGE <illegal instruction> |
| 6832 | dvapa_10_51: |
| 6833 | nop |
| 6834 | ta T_CHANGE_HPRIV |
| 6835 | mov 0xcb3, %r20 |
| 6836 | mov 0x11, %r19 |
| 6837 | sllx %r20, 23, %r20 |
| 6838 | or %r19, %r20, %r19 |
| 6839 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 6840 | mov 0x38, %r18 |
| 6841 | stxa %r31, [%r18]0x58 |
| 6842 | ta T_CHANGE_NONHPRIV |
| 6843 | .word 0xa9b447d0 ! 71: PDIST pdistn %d48, %d16, %d20 |
| 6844 | splash_cmpr_10_52: |
| 6845 | mov 0, %r18 |
| 6846 | sllx %r18, 63, %r18 |
| 6847 | rd %tick, %r17 |
| 6848 | add %r17, 0x50, %r17 |
| 6849 | or %r17, %r18, %r17 |
| 6850 | ta T_CHANGE_HPRIV |
| 6851 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 6852 | ta T_CHANGE_PRIV |
| 6853 | .word 0xb3800011 ! 72: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 6854 | intveclr_10_53: |
| 6855 | nop |
| 6856 | ta T_CHANGE_HPRIV |
| 6857 | setx 0xdb225f78ed175b30, %r1, %r28 |
| 6858 | stxa %r28, [%g0] 0x72 |
| 6859 | ta T_CHANGE_NONHPRIV |
| 6860 | .word 0x25400001 ! 73: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 6861 | jmptr_10_54: |
| 6862 | nop |
| 6863 | best_set_reg(0xe1200000, %r20, %r27) |
| 6864 | .word 0xb7c6c000 ! 74: JMPL_R jmpl %r27 + %r0, %r27 |
| 6865 | mondo_10_55: |
| 6866 | nop |
| 6867 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 6868 | ta T_CHANGE_PRIV |
| 6869 | stxa %r4, [%r0+0x3e0] %asi |
| 6870 | .word 0x9d944010 ! 75: WRPR_WSTATE_R wrpr %r17, %r16, %wstate |
| 6871 | #if (defined SPC || defined CMP1) |
| 6872 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_56) + 24, 16, 16)) -> intp(0,0,20) |
| 6873 | #else |
| 6874 | setx 0xd6dbecae64da1f3d, %r1, %r28 |
| 6875 | stxa %r28, [%g0] 0x73 |
| 6876 | #endif |
| 6877 | intvec_10_56: |
| 6878 | .word 0x39400001 ! 76: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 6879 | .word 0x89800011 ! 77: WRTICK_R wr %r0, %r17, %tick |
| 6880 | splash_lsu_10_58: |
| 6881 | nop |
| 6882 | ta T_CHANGE_HPRIV |
| 6883 | set 0xbc8bd185, %r2 |
| 6884 | mov 0x1, %r1 |
| 6885 | sllx %r1, 32, %r1 |
| 6886 | or %r1, %r2, %r2 |
| 6887 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 6888 | .word 0x3d400001 ! 78: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 6889 | splash_tba_10_59: |
| 6890 | nop |
| 6891 | ta T_CHANGE_PRIV |
| 6892 | setx 0x0000000000380000, %r11, %r12 |
| 6893 | .word 0x8b90000c ! 79: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 6894 | .word 0x87802080 ! 80: WRASI_I wr %r0, 0x0080, %asi |
| 6895 | .word 0xd45fe1e8 ! 81: LDX_I ldx [%r31 + 0x01e8], %r10 |
| 6896 | br_badelay1_10_60: |
| 6897 | .word 0xc36fe080 ! 1: PREFETCH_I prefetch [%r31 + 0x0080], #one_read |
| 6898 | .word 0xe1348011 ! 1: STQF_R - %f16, [%r17, %r18] |
| 6899 | .word 0xc36fe110 ! 1: PREFETCH_I prefetch [%r31 + 0x0110], #one_read |
| 6900 | normalw |
| 6901 | .word 0x99458000 ! 82: RD_SOFTINT_REG rd %softint, %r12 |
| 6902 | mondo_10_61: |
| 6903 | nop |
| 6904 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 6905 | stxa %r16, [%r0+0x3c0] %asi |
| 6906 | .word 0x9d90c001 ! 83: WRPR_WSTATE_R wrpr %r3, %r1, %wstate |
| 6907 | nop |
| 6908 | mov 0x80, %g3 |
| 6909 | stxa %g3, [%g3] 0x57 |
| 6910 | .word 0xe45fc000 ! 84: LDX_R ldx [%r31 + %r0], %r18 |
| 6911 | nop |
| 6912 | ta T_CHANGE_HPRIV |
| 6913 | mov 0x10+1, %r10 |
| 6914 | set sync_thr_counter5, %r23 |
| 6915 | #ifndef SPC |
| 6916 | ldxa [%g0]0x63, %o1 |
| 6917 | and %o1, 0x38, %o1 |
| 6918 | add %o1, %r23, %r23 |
| 6919 | sllx %o1, 5, %o3 !(CID*256) |
| 6920 | #endif |
| 6921 | cas [%r23],%g0,%r10 !lock |
| 6922 | brnz %r10, cwq_10_62 |
| 6923 | rd %asi, %r12 |
| 6924 | wr %g0, 0x40, %asi |
| 6925 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 6926 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 6927 | cmp %l1, 1 |
| 6928 | bne cwq_10_62 |
| 6929 | set CWQ_BASE, %l6 |
| 6930 | #ifndef SPC |
| 6931 | add %l6, %o3, %l6 |
| 6932 | #endif |
| 6933 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 6934 | best_set_reg(0x20610060, %l1, %l2) !# Control Word |
| 6935 | sllx %l2, 32, %l2 |
| 6936 | stx %l2, [%l6 + 0x0] |
| 6937 | membar #Sync |
| 6938 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 6939 | sub %l2, 0x40, %l2 |
| 6940 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 6941 | wr %r12, %g0, %asi |
| 6942 | st %g0, [%r23] |
| 6943 | cwq_10_62: |
| 6944 | ta T_CHANGE_NONHPRIV |
| 6945 | .word 0xa7414000 ! 85: RDPC rd %pc, %r19 |
| 6946 | pmu_10_63: |
| 6947 | nop |
| 6948 | setx 0xfffff765fffff25d, %g1, %g7 |
| 6949 | .word 0xa3800007 ! 86: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 6950 | splash_tba_10_64: |
| 6951 | nop |
| 6952 | ta T_CHANGE_PRIV |
| 6953 | set 0x120000, %r12 |
| 6954 | .word 0x8b90000c ! 87: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 6955 | splash_cmpr_10_65: |
| 6956 | mov 0, %r18 |
| 6957 | sllx %r18, 63, %r18 |
| 6958 | rd %tick, %r17 |
| 6959 | add %r17, 0x70, %r17 |
| 6960 | or %r17, %r18, %r17 |
| 6961 | ta T_CHANGE_PRIV |
| 6962 | .word 0xaf800011 ! 88: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 6963 | splash_lsu_10_66: |
| 6964 | nop |
| 6965 | ta T_CHANGE_HPRIV |
| 6966 | set 0x462e8799, %r2 |
| 6967 | mov 0x5, %r1 |
| 6968 | sllx %r1, 32, %r1 |
| 6969 | or %r1, %r2, %r2 |
| 6970 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 6971 | ta T_CHANGE_NONHPRIV |
| 6972 | .word 0x3d400001 ! 89: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 6973 | .word 0xc30fc000 ! 90: LDXFSR_R ld-fsr [%r31, %r0], %f1 |
| 6974 | nop |
| 6975 | ta T_CHANGE_HPRIV |
| 6976 | mov 0x10+1, %r10 |
| 6977 | set sync_thr_counter5, %r23 |
| 6978 | #ifndef SPC |
| 6979 | ldxa [%g0]0x63, %o1 |
| 6980 | and %o1, 0x38, %o1 |
| 6981 | add %o1, %r23, %r23 |
| 6982 | sllx %o1, 5, %o3 !(CID*256) |
| 6983 | #endif |
| 6984 | cas [%r23],%g0,%r10 !lock |
| 6985 | brnz %r10, cwq_10_67 |
| 6986 | rd %asi, %r12 |
| 6987 | wr %g0, 0x40, %asi |
| 6988 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 6989 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 6990 | cmp %l1, 1 |
| 6991 | bne cwq_10_67 |
| 6992 | set CWQ_BASE, %l6 |
| 6993 | #ifndef SPC |
| 6994 | add %l6, %o3, %l6 |
| 6995 | #endif |
| 6996 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 6997 | best_set_reg(0x206100e0, %l1, %l2) !# Control Word |
| 6998 | sllx %l2, 32, %l2 |
| 6999 | stx %l2, [%l6 + 0x0] |
| 7000 | membar #Sync |
| 7001 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 7002 | sub %l2, 0x40, %l2 |
| 7003 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 7004 | wr %r12, %g0, %asi |
| 7005 | st %g0, [%r23] |
| 7006 | cwq_10_67: |
| 7007 | ta T_CHANGE_NONHPRIV |
| 7008 | .word 0x9b414000 ! 91: RDPC rd %pc, %r13 |
| 7009 | .word 0xd827e094 ! 92: STW_I stw %r12, [%r31 + 0x0094] |
| 7010 | splash_tba_10_68: |
| 7011 | nop |
| 7012 | ta T_CHANGE_PRIV |
| 7013 | set 0x120000, %r12 |
| 7014 | .word 0x8b90000c ! 93: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 7015 | setx 0xdeb18d481db1121a, %r1, %r28 |
| 7016 | stxa %r28, [%g0] 0x73 |
| 7017 | intvec_10_69: |
| 7018 | .word 0x39400001 ! 94: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 7019 | nop |
| 7020 | mov 0x80, %g3 |
| 7021 | stxa %g3, [%g3] 0x57 |
| 7022 | .word 0xd85fc000 ! 95: LDX_R ldx [%r31 + %r0], %r12 |
| 7023 | .word 0x8d802004 ! 96: WRFPRS_I wr %r0, 0x0004, %fprs |
| 7024 | .word 0xd8bfc032 ! 97: STDA_R stda %r12, [%r31 + %r18] 0x01 |
| 7025 | splash_cmpr_10_71: |
| 7026 | mov 0, %r18 |
| 7027 | sllx %r18, 63, %r18 |
| 7028 | rd %tick, %r17 |
| 7029 | add %r17, 0x60, %r17 |
| 7030 | or %r17, %r18, %r17 |
| 7031 | ta T_CHANGE_HPRIV |
| 7032 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 7033 | ta T_CHANGE_PRIV |
| 7034 | .word 0xb3800011 ! 98: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 7035 | nop |
| 7036 | mov 0x80, %g3 |
| 7037 | stxa %g3, [%g3] 0x57 |
| 7038 | .word 0xd85fc000 ! 99: LDX_R ldx [%r31 + %r0], %r12 |
| 7039 | ceter_10_72: |
| 7040 | nop |
| 7041 | ta T_CHANGE_HPRIV |
| 7042 | mov 7, %r17 |
| 7043 | sllx %r17, 60, %r17 |
| 7044 | mov 0x18, %r16 |
| 7045 | stxa %r17, [%r16]0x4c |
| 7046 | ta T_CHANGE_NONHPRIV |
| 7047 | .word 0xa1410000 ! 100: RDTICK rd %tick, %r16 |
| 7048 | .word 0x2d400001 ! 1: FBPG fbg,a,pn %fcc0, <label_0x1> |
| 7049 | .word 0x8d90380c ! 101: WRPR_PSTATE_I wrpr %r0, 0x180c, %pstate |
| 7050 | intveclr_10_74: |
| 7051 | nop |
| 7052 | ta T_CHANGE_HPRIV |
| 7053 | setx 0xf86358d97cf2f97e, %r1, %r28 |
| 7054 | stxa %r28, [%g0] 0x72 |
| 7055 | ta T_CHANGE_NONHPRIV |
| 7056 | .word 0x25400001 ! 102: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 7057 | fpinit_10_75: |
| 7058 | nop |
| 7059 | setx fp_data_quads, %r19, %r20 |
| 7060 | ldd [%r20], %f0 |
| 7061 | ldd [%r20+8], %f4 |
| 7062 | ld [%r20+16], %fsr |
| 7063 | ld [%r20+24], %r19 |
| 7064 | wr %r19, %g0, %gsr |
| 7065 | .word 0x91a009a4 ! 103: FDIVs fdivs %f0, %f4, %f8 |
| 7066 | jmptr_10_76: |
| 7067 | nop |
| 7068 | best_set_reg(0xe1200000, %r20, %r27) |
| 7069 | .word 0xb7c6c000 ! 104: JMPL_R jmpl %r27 + %r0, %r27 |
| 7070 | jmptr_10_77: |
| 7071 | nop |
| 7072 | best_set_reg(0xe1200000, %r20, %r27) |
| 7073 | .word 0xb7c6c000 ! 105: JMPL_R jmpl %r27 + %r0, %r27 |
| 7074 | nop |
| 7075 | ta T_CHANGE_HPRIV |
| 7076 | mov 0x10, %r10 |
| 7077 | set sync_thr_counter6, %r23 |
| 7078 | #ifndef SPC |
| 7079 | ldxa [%g0]0x63, %o1 |
| 7080 | and %o1, 0x38, %o1 |
| 7081 | add %o1, %r23, %r23 |
| 7082 | #endif |
| 7083 | cas [%r23],%g0,%r10 !lock |
| 7084 | brnz %r10, sma_10_78 |
| 7085 | rd %asi, %r12 |
| 7086 | wr %g0, 0x40, %asi |
| 7087 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 7088 | set 0x000e1fff, %g1 |
| 7089 | stxa %g1, [%g0 + 0x80] %asi |
| 7090 | wr %r12, %g0, %asi |
| 7091 | st %g0, [%r23] |
| 7092 | sma_10_78: |
| 7093 | ta T_CHANGE_NONHPRIV |
| 7094 | .word 0xe9e7e00d ! 106: CASA_R casa [%r31] %asi, %r13, %r20 |
| 7095 | nop |
| 7096 | ta T_CHANGE_HPRIV |
| 7097 | mov 0x10, %r10 |
| 7098 | set sync_thr_counter6, %r23 |
| 7099 | #ifndef SPC |
| 7100 | ldxa [%g0]0x63, %o1 |
| 7101 | and %o1, 0x38, %o1 |
| 7102 | add %o1, %r23, %r23 |
| 7103 | #endif |
| 7104 | cas [%r23],%g0,%r10 !lock |
| 7105 | brnz %r10, sma_10_79 |
| 7106 | rd %asi, %r12 |
| 7107 | wr %g0, 0x40, %asi |
| 7108 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 7109 | set 0x00061fff, %g1 |
| 7110 | stxa %g1, [%g0 + 0x80] %asi |
| 7111 | wr %r12, %g0, %asi |
| 7112 | st %g0, [%r23] |
| 7113 | sma_10_79: |
| 7114 | ta T_CHANGE_NONHPRIV |
| 7115 | .word 0xe9e7e00d ! 107: CASA_R casa [%r31] %asi, %r13, %r20 |
| 7116 | splash_cmpr_10_80: |
| 7117 | mov 0, %r18 |
| 7118 | sllx %r18, 63, %r18 |
| 7119 | rd %tick, %r17 |
| 7120 | add %r17, 0x100, %r17 |
| 7121 | or %r17, %r18, %r17 |
| 7122 | ta T_CHANGE_HPRIV |
| 7123 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 7124 | .word 0xb3800011 ! 108: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 7125 | ibp_10_81: |
| 7126 | nop |
| 7127 | .word 0xe1bfc3e0 ! 109: STDFA_R stda %f16, [%r0, %r31] |
| 7128 | .word 0xe8800c20 ! 110: LDUWA_R lduwa [%r0, %r0] 0x61, %r20 |
| 7129 | .word 0x87aa0ad2 ! 111: FCMPEd fcmped %fcc<n>, %f8, %f18 |
| 7130 | nop |
| 7131 | ta T_CHANGE_HPRIV |
| 7132 | mov 0x10+1, %r10 |
| 7133 | set sync_thr_counter5, %r23 |
| 7134 | #ifndef SPC |
| 7135 | ldxa [%g0]0x63, %o1 |
| 7136 | and %o1, 0x38, %o1 |
| 7137 | add %o1, %r23, %r23 |
| 7138 | sllx %o1, 5, %o3 !(CID*256) |
| 7139 | #endif |
| 7140 | cas [%r23],%g0,%r10 !lock |
| 7141 | brnz %r10, cwq_10_82 |
| 7142 | rd %asi, %r12 |
| 7143 | wr %g0, 0x40, %asi |
| 7144 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 7145 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 7146 | cmp %l1, 1 |
| 7147 | bne cwq_10_82 |
| 7148 | set CWQ_BASE, %l6 |
| 7149 | #ifndef SPC |
| 7150 | add %l6, %o3, %l6 |
| 7151 | #endif |
| 7152 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 7153 | best_set_reg(0x206100e0, %l1, %l2) !# Control Word |
| 7154 | sllx %l2, 32, %l2 |
| 7155 | stx %l2, [%l6 + 0x0] |
| 7156 | membar #Sync |
| 7157 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 7158 | sub %l2, 0x40, %l2 |
| 7159 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 7160 | wr %r12, %g0, %asi |
| 7161 | st %g0, [%r23] |
| 7162 | cwq_10_82: |
| 7163 | ta T_CHANGE_NONHPRIV |
| 7164 | .word 0x91414000 ! 112: RDPC rd %pc, %r8 |
| 7165 | cwp_10_83: |
| 7166 | set user_data_start, %o7 |
| 7167 | .word 0x93902005 ! 113: WRPR_CWP_I wrpr %r0, 0x0005, %cwp |
| 7168 | .word 0x9adb0010 ! 114: SMULcc_R smulcc %r12, %r16, %r13 |
| 7169 | .word 0x8d802000 ! 115: WRFPRS_I wr %r0, 0x0000, %fprs |
| 7170 | trapasi_10_84: |
| 7171 | nop |
| 7172 | mov 0x3f8, %r1 ! (VA for ASI 0x25) |
| 7173 | .word 0xe4c844a0 ! 116: LDSBA_R ldsba [%r1, %r0] 0x25, %r18 |
| 7174 | .word 0x8d802004 ! 117: WRFPRS_I wr %r0, 0x0004, %fprs |
| 7175 | trapasi_10_85: |
| 7176 | nop |
| 7177 | mov 0x3c0, %r1 ! (VA for ASI 0x25) |
| 7178 | .word 0xe4c844a0 ! 118: LDSBA_R ldsba [%r1, %r0] 0x25, %r18 |
| 7179 | .word 0xa753c000 ! 119: RDPR_FQ <illegal instruction> |
| 7180 | splash_hpstate_10_86: |
| 7181 | .word 0x2ec90001 ! 1: BRGEZ brgez,a,pt %r4,<label_0x90001> |
| 7182 | .word 0x81983ddd ! 120: WRHPR_HPSTATE_I wrhpr %r0, 0x1ddd, %hpstate |
| 7183 | intveclr_10_87: |
| 7184 | nop |
| 7185 | ta T_CHANGE_HPRIV |
| 7186 | setx 0x194e9ae2dbbf6817, %r1, %r28 |
| 7187 | stxa %r28, [%g0] 0x72 |
| 7188 | .word 0x25400001 ! 121: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 7189 | .word 0xe937e19c ! 122: STQF_I - %f20, [0x019c, %r31] |
| 7190 | .word 0x9ac0621d ! 123: ADDCcc_I addccc %r1, 0x021d, %r13 |
| 7191 | #if (defined SPC || defined CMP1) |
| 7192 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_88) + 24, 16, 16)) -> intp(4,0,6) |
| 7193 | #else |
| 7194 | setx 0x041c71904cee2c82, %r1, %r28 |
| 7195 | stxa %r28, [%g0] 0x73 |
| 7196 | #endif |
| 7197 | intvec_10_88: |
| 7198 | .word 0x39400001 ! 124: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 7199 | trapasi_10_89: |
| 7200 | nop |
| 7201 | mov 0x0, %r1 ! (VA for ASI 0x73) |
| 7202 | .word 0xe8884e60 ! 125: LDUBA_R lduba [%r1, %r0] 0x73, %r20 |
| 7203 | trapasi_10_90: |
| 7204 | nop |
| 7205 | mov 0x3d0, %r1 ! (VA for ASI 0x25) |
| 7206 | .word 0xe8c844a0 ! 126: LDSBA_R ldsba [%r1, %r0] 0x25, %r20 |
| 7207 | brlez,pn %r13, skip_10_91 |
| 7208 | .word 0xa5a509c1 ! 1: FDIVd fdivd %f20, %f32, %f18 |
| 7209 | .align 512 |
| 7210 | skip_10_91: |
| 7211 | .word 0x87a9ca52 ! 127: FCMPd fcmpd %fcc<n>, %f38, %f18 |
| 7212 | intveclr_10_92: |
| 7213 | nop |
| 7214 | ta T_CHANGE_HPRIV |
| 7215 | setx 0x59e4a1092662fc0f, %r1, %r28 |
| 7216 | stxa %r28, [%g0] 0x72 |
| 7217 | ta T_CHANGE_NONHPRIV |
| 7218 | .word 0x25400001 ! 128: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 7219 | trapasi_10_93: |
| 7220 | nop |
| 7221 | mov 0x38, %r1 ! (VA for ASI 0x50) |
| 7222 | .word 0xd0884a00 ! 129: LDUBA_R lduba [%r1, %r0] 0x50, %r8 |
| 7223 | .word 0x89800011 ! 130: WRTICK_R wr %r0, %r17, %tick |
| 7224 | .word 0xc19fd920 ! 131: LDDFA_R ldda [%r31, %r0], %f0 |
| 7225 | .word 0x89800011 ! 132: WRTICK_R wr %r0, %r17, %tick |
| 7226 | .word 0xd197e1c0 ! 133: LDQFA_I - [%r31, 0x01c0], %f8 |
| 7227 | dvapa_10_96: |
| 7228 | nop |
| 7229 | ta T_CHANGE_HPRIV |
| 7230 | mov 0xd2d, %r20 |
| 7231 | mov 0x1d, %r19 |
| 7232 | sllx %r20, 23, %r20 |
| 7233 | or %r19, %r20, %r19 |
| 7234 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 7235 | mov 0x38, %r18 |
| 7236 | stxa %r31, [%r18]0x58 |
| 7237 | ta T_CHANGE_NONHPRIV |
| 7238 | .word 0x87aa8a46 ! 134: FCMPd fcmpd %fcc<n>, %f10, %f6 |
| 7239 | .word 0xd13fc000 ! 135: STDF_R std %f8, [%r0, %r31] |
| 7240 | otherw |
| 7241 | mov 0xb2, %r30 |
| 7242 | .word 0x91d0001e ! 136: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 7243 | .word 0x87802082 ! 137: WRASI_I wr %r0, 0x0082, %asi |
| 7244 | memptr_10_97: |
| 7245 | set 0x60740000, %r31 |
| 7246 | .word 0x858429da ! 138: WRCCR_I wr %r16, 0x09da, %ccr |
| 7247 | splash_cmpr_10_98: |
| 7248 | mov 0, %r18 |
| 7249 | sllx %r18, 63, %r18 |
| 7250 | rd %tick, %r17 |
| 7251 | add %r17, 0x50, %r17 |
| 7252 | or %r17, %r18, %r17 |
| 7253 | .word 0xaf800011 ! 139: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 7254 | .word 0x87ac8a34 ! 140: FCMPs fcmps %fcc<n>, %f18, %f20 |
| 7255 | .word 0x89800011 ! 141: WRTICK_R wr %r0, %r17, %tick |
| 7256 | .word 0xd0c7e1d0 ! 142: LDSWA_I ldswa [%r31, + 0x01d0] %asi, %r8 |
| 7257 | splash_tba_10_100: |
| 7258 | nop |
| 7259 | ta T_CHANGE_PRIV |
| 7260 | set 0x120000, %r12 |
| 7261 | .word 0x8b90000c ! 143: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 7262 | change_to_randtl_10_101: |
| 7263 | ta T_CHANGE_HPRIV ! macro |
| 7264 | done_change_to_randtl_10_101: |
| 7265 | .word 0x8f902002 ! 144: WRPR_TL_I wrpr %r0, 0x0002, %tl |
| 7266 | nop |
| 7267 | ta T_CHANGE_HPRIV ! macro |
| 7268 | donret_10_102: |
| 7269 | rd %pc, %r12 |
| 7270 | add %r12, (donretarg_10_102-donret_10_102+4), %r12 |
| 7271 | add %r12, 0x4, %r11 ! seq tnpc |
| 7272 | wrpr %g0, 0x2, %tl |
| 7273 | wrpr %g0, %r12, %tpc |
| 7274 | wrpr %g0, %r11, %tnpc |
| 7275 | set (0x004ca300 | (28 << 24)), %r13 |
| 7276 | and %r12, 0xfff, %r14 |
| 7277 | sllx %r14, 30, %r14 |
| 7278 | or %r13, %r14, %r20 |
| 7279 | wrpr %r20, %g0, %tstate |
| 7280 | wrhpr %g0, 0x1c83, %htstate |
| 7281 | ta T_CHANGE_NONHPRIV ! rand=1 (10) |
| 7282 | .word 0x26cc8001 ! 1: BRLZ brlz,a,pt %r18,<label_0xc8001> |
| 7283 | retry |
| 7284 | donretarg_10_102: |
| 7285 | .word 0x24cc0001 ! 145: BRLEZ brlez,a,pt %r16,<label_0xc0001> |
| 7286 | .word 0xd13fc008 ! 146: STDF_R std %f8, [%r8, %r31] |
| 7287 | .word 0x91d020b2 ! 147: Tcc_I ta icc_or_xcc, %r0 + 178 |
| 7288 | nop |
| 7289 | ta T_CHANGE_HPRIV |
| 7290 | mov 0x10+1, %r10 |
| 7291 | set sync_thr_counter5, %r23 |
| 7292 | #ifndef SPC |
| 7293 | ldxa [%g0]0x63, %o1 |
| 7294 | and %o1, 0x38, %o1 |
| 7295 | add %o1, %r23, %r23 |
| 7296 | sllx %o1, 5, %o3 !(CID*256) |
| 7297 | #endif |
| 7298 | cas [%r23],%g0,%r10 !lock |
| 7299 | brnz %r10, cwq_10_104 |
| 7300 | rd %asi, %r12 |
| 7301 | wr %g0, 0x40, %asi |
| 7302 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 7303 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 7304 | cmp %l1, 1 |
| 7305 | bne cwq_10_104 |
| 7306 | set CWQ_BASE, %l6 |
| 7307 | #ifndef SPC |
| 7308 | add %l6, %o3, %l6 |
| 7309 | #endif |
| 7310 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 7311 | best_set_reg(0x20610020, %l1, %l2) !# Control Word |
| 7312 | sllx %l2, 32, %l2 |
| 7313 | stx %l2, [%l6 + 0x0] |
| 7314 | membar #Sync |
| 7315 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 7316 | sub %l2, 0x40, %l2 |
| 7317 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 7318 | wr %r12, %g0, %asi |
| 7319 | st %g0, [%r23] |
| 7320 | cwq_10_104: |
| 7321 | ta T_CHANGE_NONHPRIV |
| 7322 | .word 0x99414000 ! 148: RDPC rd %pc, %r12 |
| 7323 | mondo_10_105: |
| 7324 | nop |
| 7325 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 7326 | ta T_CHANGE_PRIV |
| 7327 | stxa %r16, [%r0+0x3e8] %asi |
| 7328 | .word 0x9d948011 ! 149: WRPR_WSTATE_R wrpr %r18, %r17, %wstate |
| 7329 | .word 0xe19fe000 ! 150: LDDFA_I ldda [%r31, 0x0000], %f16 |
| 7330 | nop |
| 7331 | ta T_CHANGE_HPRIV |
| 7332 | mov 0x10+1, %r10 |
| 7333 | set sync_thr_counter5, %r23 |
| 7334 | #ifndef SPC |
| 7335 | ldxa [%g0]0x63, %o1 |
| 7336 | and %o1, 0x38, %o1 |
| 7337 | add %o1, %r23, %r23 |
| 7338 | sllx %o1, 5, %o3 !(CID*256) |
| 7339 | #endif |
| 7340 | cas [%r23],%g0,%r10 !lock |
| 7341 | brnz %r10, cwq_10_106 |
| 7342 | rd %asi, %r12 |
| 7343 | wr %g0, 0x40, %asi |
| 7344 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 7345 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 7346 | cmp %l1, 1 |
| 7347 | bne cwq_10_106 |
| 7348 | set CWQ_BASE, %l6 |
| 7349 | #ifndef SPC |
| 7350 | add %l6, %o3, %l6 |
| 7351 | #endif |
| 7352 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 7353 | best_set_reg(0x20610060, %l1, %l2) !# Control Word |
| 7354 | sllx %l2, 32, %l2 |
| 7355 | stx %l2, [%l6 + 0x0] |
| 7356 | membar #Sync |
| 7357 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 7358 | sub %l2, 0x40, %l2 |
| 7359 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 7360 | wr %r12, %g0, %asi |
| 7361 | st %g0, [%r23] |
| 7362 | cwq_10_106: |
| 7363 | ta T_CHANGE_NONHPRIV |
| 7364 | .word 0xa9414000 ! 151: RDPC rd %pc, %r20 |
| 7365 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 7366 | reduce_priv_lvl_10_107: |
| 7367 | ta T_CHANGE_NONPRIV ! macro |
| 7368 | #if (defined SPC || defined CMP1) |
| 7369 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_108) + 56, 16, 16)) -> intp(7,0,13) |
| 7370 | #else |
| 7371 | setx 0xc86c75b8bab69b14, %r1, %r28 |
| 7372 | stxa %r28, [%g0] 0x73 |
| 7373 | #endif |
| 7374 | intvec_10_108: |
| 7375 | .word 0x39400001 ! 153: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 7376 | .word 0x8d902845 ! 154: WRPR_PSTATE_I wrpr %r0, 0x0845, %pstate |
| 7377 | dvapa_10_110: |
| 7378 | nop |
| 7379 | ta T_CHANGE_HPRIV |
| 7380 | mov 0xaa2, %r20 |
| 7381 | mov 0x10, %r19 |
| 7382 | sllx %r20, 23, %r20 |
| 7383 | or %r19, %r20, %r19 |
| 7384 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 7385 | mov 0x38, %r18 |
| 7386 | stxa %r31, [%r18]0x58 |
| 7387 | ta T_CHANGE_NONHPRIV |
| 7388 | .word 0xa1b307cb ! 155: PDIST pdistn %d12, %d42, %d16 |
| 7389 | .word 0xd0800b00 ! 156: LDUWA_R lduwa [%r0, %r0] 0x58, %r8 |
| 7390 | .word 0x89800011 ! 157: WRTICK_R wr %r0, %r17, %tick |
| 7391 | memptr_10_112: |
| 7392 | set 0x60340000, %r31 |
| 7393 | .word 0x858473e6 ! 158: WRCCR_I wr %r17, 0x13e6, %ccr |
| 7394 | .word 0x904c0011 ! 159: MULX_R mulx %r16, %r17, %r8 |
| 7395 | nop |
| 7396 | ta T_CHANGE_HPRIV |
| 7397 | mov 0x10, %r10 |
| 7398 | set sync_thr_counter6, %r23 |
| 7399 | #ifndef SPC |
| 7400 | ldxa [%g0]0x63, %o1 |
| 7401 | and %o1, 0x38, %o1 |
| 7402 | add %o1, %r23, %r23 |
| 7403 | #endif |
| 7404 | cas [%r23],%g0,%r10 !lock |
| 7405 | brnz %r10, sma_10_113 |
| 7406 | rd %asi, %r12 |
| 7407 | wr %g0, 0x40, %asi |
| 7408 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 7409 | set 0x001a1fff, %g1 |
| 7410 | stxa %g1, [%g0 + 0x80] %asi |
| 7411 | wr %r12, %g0, %asi |
| 7412 | st %g0, [%r23] |
| 7413 | sma_10_113: |
| 7414 | ta T_CHANGE_NONHPRIV |
| 7415 | .word 0xe3e7e013 ! 160: CASA_R casa [%r31] %asi, %r19, %r17 |
| 7416 | ibp_10_114: |
| 7417 | nop |
| 7418 | .word 0x97b407d3 ! 161: PDIST pdistn %d16, %d50, %d42 |
| 7419 | memptr_10_115: |
| 7420 | set 0x60340000, %r31 |
| 7421 | .word 0x858537ee ! 162: WRCCR_I wr %r20, 0x17ee, %ccr |
| 7422 | splash_tba_10_116: |
| 7423 | nop |
| 7424 | ta T_CHANGE_PRIV |
| 7425 | set 0x120000, %r12 |
| 7426 | .word 0x8b90000c ! 163: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 7427 | .word 0xa04d0002 ! 164: MULX_R mulx %r20, %r2, %r16 |
| 7428 | .word 0x83d020b2 ! 165: Tcc_I te icc_or_xcc, %r0 + 178 |
| 7429 | ibp_10_117: |
| 7430 | nop |
| 7431 | ta T_CHANGE_NONHPRIV |
| 7432 | .word 0x997022e4 ! 166: POPC_I popc 0x02e4, %r12 |
| 7433 | brcommon2_10_118: |
| 7434 | nop |
| 7435 | setx common_target, %r12, %r27 |
| 7436 | ba,a .+12 |
| 7437 | .word 0xc36fe1d0 ! 1: PREFETCH_I prefetch [%r31 + 0x01d0], #one_read |
| 7438 | ba,a .+8 |
| 7439 | jmpl %r27+0, %r27 |
| 7440 | .word 0xc1bfdf20 ! 167: STDFA_R stda %f0, [%r0, %r31] |
| 7441 | .word 0xd027e0e4 ! 168: STW_I stw %r8, [%r31 + 0x00e4] |
| 7442 | ibp_10_119: |
| 7443 | nop |
| 7444 | ta T_CHANGE_NONHPRIV |
| 7445 | .word 0x91b207d2 ! 169: PDIST pdistn %d8, %d18, %d8 |
| 7446 | .word 0xa9520000 ! 170: RDPR_PIL <illegal instruction> |
| 7447 | mondo_10_120: |
| 7448 | nop |
| 7449 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 7450 | stxa %r6, [%r0+0x3e0] %asi |
| 7451 | .word 0x9d920011 ! 171: WRPR_WSTATE_R wrpr %r8, %r17, %wstate |
| 7452 | .word 0x8d802000 ! 172: WRFPRS_I wr %r0, 0x0000, %fprs |
| 7453 | .word 0xe08fe120 ! 173: LDUBA_I lduba [%r31, + 0x0120] %asi, %r16 |
| 7454 | setx 0x2a3b67a9bed1f95a, %r1, %r28 |
| 7455 | stxa %r28, [%g0] 0x73 |
| 7456 | intvec_10_121: |
| 7457 | .word 0x39400001 ! 174: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 7458 | .word 0xa6c4acf5 ! 175: ADDCcc_I addccc %r18, 0x0cf5, %r19 |
| 7459 | ibp_10_122: |
| 7460 | nop |
| 7461 | .word 0xc19fc2c0 ! 176: LDDFA_R ldda [%r31, %r0], %f0 |
| 7462 | ibp_10_123: |
| 7463 | nop |
| 7464 | .word 0xc1bfe1a0 ! 177: STDFA_I stda %f0, [0x01a0, %r31] |
| 7465 | ibp_10_124: |
| 7466 | nop |
| 7467 | .word 0x93a249ad ! 178: FDIVs fdivs %f9, %f13, %f9 |
| 7468 | .word 0xe897e198 ! 179: LDUHA_I lduha [%r31, + 0x0198] %asi, %r20 |
| 7469 | fpinit_10_125: |
| 7470 | nop |
| 7471 | setx fp_data_quads, %r19, %r20 |
| 7472 | ldd [%r20], %f0 |
| 7473 | ldd [%r20+8], %f4 |
| 7474 | ld [%r20+16], %fsr |
| 7475 | ld [%r20+24], %r19 |
| 7476 | wr %r19, %g0, %gsr |
| 7477 | .word 0x8da009c4 ! 180: FDIVd fdivd %f0, %f4, %f6 |
| 7478 | .word 0x8143e011 ! 181: MEMBAR membar #LoadLoad | #Lookaside |
| 7479 | ibp_10_127: |
| 7480 | nop |
| 7481 | ta T_CHANGE_NONHPRIV |
| 7482 | .word 0xe19fe0a0 ! 182: LDDFA_I ldda [%r31, 0x00a0], %f16 |
| 7483 | #if (defined SPC || defined CMP1) |
| 7484 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_128) + 8, 16, 16)) -> intp(2,0,17) |
| 7485 | #else |
| 7486 | setx 0x73c2a68dee3df29b, %r1, %r28 |
| 7487 | stxa %r28, [%g0] 0x73 |
| 7488 | #endif |
| 7489 | intvec_10_128: |
| 7490 | .word 0x39400001 ! 183: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 7491 | intveclr_10_129: |
| 7492 | nop |
| 7493 | ta T_CHANGE_HPRIV |
| 7494 | setx 0x565487b04a090099, %r1, %r28 |
| 7495 | stxa %r28, [%g0] 0x72 |
| 7496 | ta T_CHANGE_NONHPRIV |
| 7497 | .word 0x25400001 ! 184: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 7498 | dvapa_10_130: |
| 7499 | nop |
| 7500 | ta T_CHANGE_HPRIV |
| 7501 | mov 0xb4d, %r20 |
| 7502 | mov 0x1d, %r19 |
| 7503 | sllx %r20, 23, %r20 |
| 7504 | or %r19, %r20, %r19 |
| 7505 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 7506 | mov 0x38, %r18 |
| 7507 | stxa %r31, [%r18]0x58 |
| 7508 | ta T_CHANGE_NONHPRIV |
| 7509 | .word 0xe19fdf20 ! 185: LDDFA_R ldda [%r31, %r0], %f16 |
| 7510 | mondo_10_131: |
| 7511 | nop |
| 7512 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 7513 | stxa %r11, [%r0+0x3d8] %asi |
| 7514 | .word 0x9d950011 ! 186: WRPR_WSTATE_R wrpr %r20, %r17, %wstate |
| 7515 | .word 0xe877c000 ! 187: STX_R stx %r20, [%r31 + %r0] |
| 7516 | mondo_10_132: |
| 7517 | nop |
| 7518 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 7519 | stxa %r6, [%r0+0x3c0] %asi |
| 7520 | .word 0x9d950010 ! 188: WRPR_WSTATE_R wrpr %r20, %r16, %wstate |
| 7521 | mondo_10_133: |
| 7522 | nop |
| 7523 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 7524 | ta T_CHANGE_PRIV |
| 7525 | stxa %r16, [%r0+0x3c8] %asi |
| 7526 | .word 0x9d930006 ! 189: WRPR_WSTATE_R wrpr %r12, %r6, %wstate |
| 7527 | memptr_10_134: |
| 7528 | set 0x60540000, %r31 |
| 7529 | .word 0x8584ab26 ! 190: WRCCR_I wr %r18, 0x0b26, %ccr |
| 7530 | splash_hpstate_10_135: |
| 7531 | .word 0x8198265d ! 191: WRHPR_HPSTATE_I wrhpr %r0, 0x065d, %hpstate |
| 7532 | .word 0xe937c000 ! 192: STQF_R - %f20, [%r0, %r31] |
| 7533 | splash_hpstate_10_136: |
| 7534 | .word 0x25400001 ! 1: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 7535 | .word 0x81983687 ! 193: WRHPR_HPSTATE_I wrhpr %r0, 0x1687, %hpstate |
| 7536 | splash_hpstate_10_137: |
| 7537 | ta T_CHANGE_NONHPRIV |
| 7538 | .word 0x26ccc001 ! 1: BRLZ brlz,a,pt %r19,<label_0xcc001> |
| 7539 | .word 0x8198369f ! 194: WRHPR_HPSTATE_I wrhpr %r0, 0x169f, %hpstate |
| 7540 | .word 0xc19fc3e0 ! 195: LDDFA_R ldda [%r31, %r0], %f0 |
| 7541 | .word 0x89800011 ! 196: WRTICK_R wr %r0, %r17, %tick |
| 7542 | intveclr_10_139: |
| 7543 | nop |
| 7544 | ta T_CHANGE_HPRIV |
| 7545 | setx 0xd1460ccee7748824, %r1, %r28 |
| 7546 | stxa %r28, [%g0] 0x72 |
| 7547 | ta T_CHANGE_NONHPRIV |
| 7548 | .word 0x25400001 ! 197: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 7549 | .word 0x89800011 ! 198: WRTICK_R wr %r0, %r17, %tick |
| 7550 | mondo_10_141: |
| 7551 | nop |
| 7552 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 7553 | stxa %r20, [%r0+0x3e0] %asi |
| 7554 | .word 0x9d950002 ! 199: WRPR_WSTATE_R wrpr %r20, %r2, %wstate |
| 7555 | splash_lsu_10_142: |
| 7556 | nop |
| 7557 | ta T_CHANGE_HPRIV |
| 7558 | set 0x9b552d31, %r2 |
| 7559 | mov 0x4, %r1 |
| 7560 | sllx %r1, 32, %r1 |
| 7561 | or %r1, %r2, %r2 |
| 7562 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 7563 | .word 0x3d400001 ! 200: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 7564 | change_to_randtl_10_143: |
| 7565 | ta T_CHANGE_HPRIV ! macro |
| 7566 | done_change_to_randtl_10_143: |
| 7567 | .word 0x8f902000 ! 201: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 7568 | nop |
| 7569 | nop |
| 7570 | ta T_CHANGE_PRIV |
| 7571 | wrpr %g0, %g0, %gl |
| 7572 | nop |
| 7573 | nop |
| 7574 | setx join_lbl_0_0, %g1, %g2 |
| 7575 | jmp %g2 |
| 7576 | nop |
| 7577 | fork_lbl_0_4: |
| 7578 | rd %asi, %r12 |
| 7579 | #ifdef XIR_RND_CORES |
| 7580 | setup_xir_8: |
| 7581 | setx 0x4c86dd6f862720e2, %r1, %r28 |
| 7582 | mov 0x30, %r17 |
| 7583 | stxa %r28, [%r17] 0x41 |
| 7584 | #endif |
| 7585 | setup_spu_8: |
| 7586 | wr %g0, 0x40, %asi |
| 7587 | !# allocate control word queue (e.g., setup head/tail/first/last registers) |
| 7588 | set CWQ_BASE, %l6 |
| 7589 | |
| 7590 | #ifndef SPC |
| 7591 | ldxa [%g0]0x63, %o2 |
| 7592 | and %o2, 0x38, %o2 |
| 7593 | sllx %o2, 5, %o2 !(CID*256) |
| 7594 | add %l6, %o2, %l6 |
| 7595 | #endif |
| 7596 | # 780 "diag.j" |
| 7597 | !# write base addr to first, head, and tail ptr |
| 7598 | !# first store to first |
| 7599 | stxa %l6, [%g0 + ASI_SPU_CWQ_FIRST] %asi !# first store to first |
| 7600 | |
| 7601 | stxa %l6, [%g0 + ASI_SPU_CWQ_HEAD] %asi !# then to head |
| 7602 | stxa %l6, [%g0 + ASI_SPU_CWQ_TAIL] %asi !# then to tail |
| 7603 | setx CWQ_LAST, %g1, %l5 !# then end of CWQ region to LAST |
| 7604 | #ifndef SPC |
| 7605 | add %l5, %o2, %l5 |
| 7606 | #endif |
| 7607 | stxa %l5, [%g0 + ASI_SPU_CWQ_LAST] %asi |
| 7608 | |
| 7609 | !# set CWQ control word ([38:36] is strand ID ..) |
| 7610 | best_set_reg(0x20610080, %l1, %l2) !# Control Word |
| 7611 | sllx %l2, 32, %l2 |
| 7612 | |
| 7613 | !# write CWQ entry (%l6 points to CWQ) |
| 7614 | stx %l2, [%l6 + 0x0] |
| 7615 | |
| 7616 | setx msg, %g1, %l2 |
| 7617 | stx %l2, [%l6 + 0x8] !# source address |
| 7618 | |
| 7619 | stx %g0, [%l6 + 0x10] !# Authentication Key Address (40-bit) |
| 7620 | stx %g0, [%l6 + 0x18] !# Authentication IV Address (40-bit) |
| 7621 | stx %g0, [%l6 + 0x20] !# Authentication FSAS Address (40-bit) |
| 7622 | stx %g0, [%l6 + 0x28] !# Encryption Key Address (40-bit) |
| 7623 | stx %g0, [%l6 + 0x30] !# Encryption Initialization Vector Address (40-bit) |
| 7624 | |
| 7625 | setx results, %g1, %o3 |
| 7626 | stx %o3, [%l6 + 0x38] !# Destination Address (40-bit) |
| 7627 | |
| 7628 | membar #Sync |
| 7629 | |
| 7630 | ldxa [%g0 + ASI_SPU_CWQ_TAIL] %asi, %l2 |
| 7631 | add %l2, 0x40, %l2 |
| 7632 | stxa %l2, [%g0 + ASI_SPU_CWQ_TAIL] %asi |
| 7633 | |
| 7634 | !# Kick off the CWQ operation by writing to the CWQ_CSR |
| 7635 | !# Set the enabled bit and reset the other bits |
| 7636 | or %g0, 0x1, %g1 |
| 7637 | stxa %g1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 7638 | |
| 7639 | unlock_sync_thds_8: |
| 7640 | set sync_thr_counter6, %r23 |
| 7641 | #ifndef SPC |
| 7642 | ldxa [%g0]0x63, %o2 |
| 7643 | and %o2, 0x38, %o2 |
| 7644 | add %o2, %r23, %r23 |
| 7645 | #endif |
| 7646 | st %r0, [%r23] !unlock sync_thr_counter6 |
| 7647 | sub %r23, 64, %r23 |
| 7648 | st %r0, [%r23] !unlock sync_thr_counter5 |
| 7649 | sub %r23, 64, %r23 |
| 7650 | st %r0, [%r23] !unlock sync_thr_counter4 |
| 7651 | |
| 7652 | wr %r0, %r12, %asi |
| 7653 | ta T_CHANGE_NONHPRIV |
| 7654 | mondo_8_0: |
| 7655 | nop |
| 7656 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 7657 | ta T_CHANGE_PRIV |
| 7658 | stxa %r12, [%r0+0x3d8] %asi |
| 7659 | .word 0x9d940007 ! 1: WRPR_WSTATE_R wrpr %r16, %r7, %wstate |
| 7660 | trapasi_8_1: |
| 7661 | nop |
| 7662 | mov 0x3c8, %r1 ! (VA for ASI 0x25) |
| 7663 | .word 0xd0d844a0 ! 2: LDXA_R ldxa [%r1, %r0] 0x25, %r8 |
| 7664 | splash_cmpr_8_2: |
| 7665 | mov 0, %r18 |
| 7666 | sllx %r18, 63, %r18 |
| 7667 | rd %tick, %r17 |
| 7668 | add %r17, 0x100, %r17 |
| 7669 | or %r17, %r18, %r17 |
| 7670 | ta T_CHANGE_HPRIV |
| 7671 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 7672 | .word 0xaf800011 ! 3: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 7673 | change_to_randtl_8_3: |
| 7674 | ta T_CHANGE_HPRIV ! macro |
| 7675 | done_change_to_randtl_8_3: |
| 7676 | .word 0x8f902000 ! 4: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 7677 | .word 0xd077c000 ! 5: STX_R stx %r8, [%r31 + %r0] |
| 7678 | splash_cmpr_8_4: |
| 7679 | mov 0, %r18 |
| 7680 | sllx %r18, 63, %r18 |
| 7681 | rd %tick, %r17 |
| 7682 | add %r17, 0x80, %r17 |
| 7683 | or %r17, %r18, %r17 |
| 7684 | ta T_CHANGE_PRIV |
| 7685 | .word 0xb3800011 ! 6: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 7686 | .word 0xa7808011 ! 7: WR_GRAPHICS_STATUS_REG_R wr %r2, %r17, %- |
| 7687 | .word 0xd07fe0a0 ! 8: SWAP_I swap %r8, [%r31 + 0x00a0] |
| 7688 | cmp_8_6: |
| 7689 | nop |
| 7690 | ta T_CHANGE_HPRIV |
| 7691 | rd %asi, %r12 |
| 7692 | wr %r0, 0x41, %asi |
| 7693 | set sync_thr_counter4, %r23 |
| 7694 | #ifndef SPC |
| 7695 | ldxa [%g0]0x63, %r8 |
| 7696 | and %r8, 0x38, %r8 ! Core ID |
| 7697 | add %r8, %r23, %r23 |
| 7698 | mov 0xff, %r9 |
| 7699 | xor %r9, 0x8, %r9 |
| 7700 | sllx %r9, %r8, %r9 ! My core mask |
| 7701 | #else |
| 7702 | mov 0, %r8 |
| 7703 | mov 0xff, %r9 |
| 7704 | xor %r9, 0x8, %r9 ! My core mask |
| 7705 | #endif |
| 7706 | mov 0x8, %r10 |
| 7707 | cmp_startwait8_6: |
| 7708 | cas [%r23],%g0,%r10 !lock |
| 7709 | brz,a %r10, continue_cmp_8_6 |
| 7710 | ldxa [0x50]%asi, %r13 !Running_rw |
| 7711 | ld [%r23], %r10 |
| 7712 | cmp_wait8_6: |
| 7713 | brnz,a %r10, cmp_wait8_6 |
| 7714 | ld [%r23], %r10 |
| 7715 | ba cmp_startwait8_6 |
| 7716 | mov 0x8, %r10 |
| 7717 | continue_cmp_8_6: |
| 7718 | ldxa [0x58]%asi, %r14 !Running_status |
| 7719 | xnor %r14, %r13, %r14 !Bits equal |
| 7720 | brz,a %r8, cmp_multi_core_8_6 |
| 7721 | mov 0x91, %r17 |
| 7722 | best_set_reg(0xd7a94bdd9442d9de, %r16, %r17) |
| 7723 | cmp_multi_core_8_6: |
| 7724 | and %r14, %r17, %r14 !Apply set/clear mask to bits equal |
| 7725 | and %r14, %r9, %r14 !Apply core-mask |
| 7726 | stxa %r14, [0x60]%asi |
| 7727 | st %g0, [%r23] !clear lock |
| 7728 | wr %g0, %r12, %asi |
| 7729 | ta T_CHANGE_NONHPRIV |
| 7730 | .word 0x91940001 ! 9: WRPR_PIL_R wrpr %r16, %r1, %pil |
| 7731 | brcommon3_8_7: |
| 7732 | nop |
| 7733 | setx common_target, %r12, %r27 |
| 7734 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 7735 | ba,a .+12 |
| 7736 | .word 0xd1e7c034 ! 1: CASA_I casa [%r31] 0x 1, %r20, %r8 |
| 7737 | ba,a .+8 |
| 7738 | jmpl %r27+0, %r27 |
| 7739 | .word 0xd11fe130 ! 10: LDDF_I ldd [%r31, 0x0130], %f8 |
| 7740 | nop |
| 7741 | ta T_CHANGE_HPRIV ! macro |
| 7742 | donret_8_8: |
| 7743 | rd %pc, %r12 |
| 7744 | add %r12, (donretarg_8_8-donret_8_8), %r12 |
| 7745 | add %r12, 0x4, %r11 ! seq tnpc |
| 7746 | wrpr %g0, 0x1, %tl |
| 7747 | wrpr %g0, %r12, %tpc |
| 7748 | wrpr %g0, %r11, %tnpc |
| 7749 | set (0x00aad200 | (20 << 24)), %r13 |
| 7750 | and %r12, 0xfff, %r14 |
| 7751 | sllx %r14, 30, %r14 |
| 7752 | or %r13, %r14, %r20 |
| 7753 | wrpr %r20, %g0, %tstate |
| 7754 | wrhpr %g0, 0x1715, %htstate |
| 7755 | ta T_CHANGE_NONPRIV ! rand=0 (8) |
| 7756 | .word 0x21400001 ! 1: FBPN fbn,a,pn %fcc0, <label_0x1> |
| 7757 | retry |
| 7758 | donretarg_8_8: |
| 7759 | .word 0xd06fe052 ! 11: LDSTUB_I ldstub %r8, [%r31 + 0x0052] |
| 7760 | .word 0xab84400b ! 12: WR_CLEAR_SOFTINT_R wr %r17, %r11, %clear_softint |
| 7761 | dvapa_8_9: |
| 7762 | nop |
| 7763 | ta T_CHANGE_HPRIV |
| 7764 | mov 0xbed, %r20 |
| 7765 | mov 0xd, %r19 |
| 7766 | sllx %r20, 23, %r20 |
| 7767 | or %r19, %r20, %r19 |
| 7768 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 7769 | mov 0x38, %r18 |
| 7770 | stxa %r31, [%r18]0x58 |
| 7771 | ta T_CHANGE_NONHPRIV |
| 7772 | .word 0xd11fc010 ! 13: LDDF_R ldd [%r31, %r16], %f8 |
| 7773 | .word 0x976cc001 ! 14: SDIVX_R sdivx %r19, %r1, %r11 |
| 7774 | nop |
| 7775 | ta T_CHANGE_HPRIV |
| 7776 | mov 0x8+1, %r10 |
| 7777 | set sync_thr_counter5, %r23 |
| 7778 | #ifndef SPC |
| 7779 | ldxa [%g0]0x63, %o1 |
| 7780 | and %o1, 0x38, %o1 |
| 7781 | add %o1, %r23, %r23 |
| 7782 | sllx %o1, 5, %o3 !(CID*256) |
| 7783 | #endif |
| 7784 | cas [%r23],%g0,%r10 !lock |
| 7785 | brnz %r10, cwq_8_10 |
| 7786 | rd %asi, %r12 |
| 7787 | wr %g0, 0x40, %asi |
| 7788 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 7789 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 7790 | cmp %l1, 1 |
| 7791 | bne cwq_8_10 |
| 7792 | set CWQ_BASE, %l6 |
| 7793 | #ifndef SPC |
| 7794 | add %l6, %o3, %l6 |
| 7795 | #endif |
| 7796 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 7797 | best_set_reg(0x20610050, %l1, %l2) !# Control Word |
| 7798 | sllx %l2, 32, %l2 |
| 7799 | stx %l2, [%l6 + 0x0] |
| 7800 | membar #Sync |
| 7801 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 7802 | sub %l2, 0x40, %l2 |
| 7803 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 7804 | wr %r12, %g0, %asi |
| 7805 | st %g0, [%r23] |
| 7806 | cwq_8_10: |
| 7807 | ta T_CHANGE_NONHPRIV |
| 7808 | .word 0xa7414000 ! 15: RDPC rd %pc, %r19 |
| 7809 | .word 0xe48008a0 ! 16: LDUWA_R lduwa [%r0, %r0] 0x45, %r18 |
| 7810 | nop |
| 7811 | ta T_CHANGE_HPRIV |
| 7812 | mov 0x8, %r10 |
| 7813 | set sync_thr_counter6, %r23 |
| 7814 | #ifndef SPC |
| 7815 | ldxa [%g0]0x63, %o1 |
| 7816 | and %o1, 0x38, %o1 |
| 7817 | add %o1, %r23, %r23 |
| 7818 | #endif |
| 7819 | cas [%r23],%g0,%r10 !lock |
| 7820 | brnz %r10, sma_8_11 |
| 7821 | rd %asi, %r12 |
| 7822 | wr %g0, 0x40, %asi |
| 7823 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 7824 | set 0x00021fff, %g1 |
| 7825 | stxa %g1, [%g0 + 0x80] %asi |
| 7826 | wr %r12, %g0, %asi |
| 7827 | st %g0, [%r23] |
| 7828 | sma_8_11: |
| 7829 | ta T_CHANGE_NONHPRIV |
| 7830 | .word 0xe5e7e014 ! 17: CASA_R casa [%r31] %asi, %r20, %r18 |
| 7831 | brcommon1_8_12: |
| 7832 | nop |
| 7833 | setx common_target, %r12, %r27 |
| 7834 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 7835 | ba,a .+12 |
| 7836 | .word 0xc32fe080 ! 1: STXFSR_I st-sfr %f1, [0x0080, %r31] |
| 7837 | ba,a .+8 |
| 7838 | jmpl %r27+0, %r27 |
| 7839 | .word 0x99a409b3 ! 18: FDIVs fdivs %f16, %f19, %f12 |
| 7840 | .word 0x8d903245 ! 19: WRPR_PSTATE_I wrpr %r0, 0x1245, %pstate |
| 7841 | #if (defined SPC || defined CMP1) |
| 7842 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_14) + 56, 16, 16)) -> intp(6,0,22) |
| 7843 | #else |
| 7844 | setx 0x2fb23786899a5187, %r1, %r28 |
| 7845 | stxa %r28, [%g0] 0x73 |
| 7846 | #endif |
| 7847 | intvec_8_14: |
| 7848 | .word 0x39400001 ! 20: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 7849 | splash_tba_8_15: |
| 7850 | nop |
| 7851 | ta T_CHANGE_PRIV |
| 7852 | setx 0x00000000003a0000, %r11, %r12 |
| 7853 | .word 0x8b90000c ! 21: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 7854 | .word 0xa7840002 ! 22: WR_GRAPHICS_STATUS_REG_R wr %r16, %r2, %- |
| 7855 | intveclr_8_17: |
| 7856 | nop |
| 7857 | ta T_CHANGE_HPRIV |
| 7858 | setx 0x9cf14fff4193a079, %r1, %r28 |
| 7859 | stxa %r28, [%g0] 0x72 |
| 7860 | ta T_CHANGE_NONHPRIV |
| 7861 | .word 0x25400001 ! 23: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 7862 | trapasi_8_18: |
| 7863 | nop |
| 7864 | mov 0x10, %r1 ! (VA for ASI 0x4c) |
| 7865 | .word 0xd4904980 ! 24: LDUHA_R lduha [%r1, %r0] 0x4c, %r10 |
| 7866 | nop |
| 7867 | mov 0x80, %g3 |
| 7868 | stxa %g3, [%g3] 0x5f |
| 7869 | .word 0xd45fc000 ! 25: LDX_R ldx [%r31 + %r0], %r10 |
| 7870 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 7871 | reduce_priv_lvl_8_19: |
| 7872 | ta T_CHANGE_NONPRIV ! macro |
| 7873 | intveclr_8_20: |
| 7874 | nop |
| 7875 | ta T_CHANGE_HPRIV |
| 7876 | setx 0xae3130f017b8e059, %r1, %r28 |
| 7877 | stxa %r28, [%g0] 0x72 |
| 7878 | .word 0x25400001 ! 27: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 7879 | intveclr_8_21: |
| 7880 | nop |
| 7881 | ta T_CHANGE_HPRIV |
| 7882 | setx 0x3bbf97facf9f37f3, %r1, %r28 |
| 7883 | stxa %r28, [%g0] 0x72 |
| 7884 | ta T_CHANGE_NONHPRIV |
| 7885 | .word 0x25400001 ! 28: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 7886 | nop |
| 7887 | mov 0x80, %g3 |
| 7888 | stxa %g3, [%g3] 0x57 |
| 7889 | .word 0xd45fc000 ! 29: LDX_R ldx [%r31 + %r0], %r10 |
| 7890 | brcommon3_8_22: |
| 7891 | nop |
| 7892 | setx common_target, %r12, %r27 |
| 7893 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 7894 | ba,a .+12 |
| 7895 | .word 0xd46fe0a0 ! 1: LDSTUB_I ldstub %r10, [%r31 + 0x00a0] |
| 7896 | ba,a .+8 |
| 7897 | jmpl %r27+0, %r27 |
| 7898 | .word 0xc32fc00c ! 30: STXFSR_R st-sfr %f1, [%r12, %r31] |
| 7899 | nop |
| 7900 | ta T_CHANGE_HPRIV |
| 7901 | mov 0x8+1, %r10 |
| 7902 | set sync_thr_counter5, %r23 |
| 7903 | #ifndef SPC |
| 7904 | ldxa [%g0]0x63, %o1 |
| 7905 | and %o1, 0x38, %o1 |
| 7906 | add %o1, %r23, %r23 |
| 7907 | sllx %o1, 5, %o3 !(CID*256) |
| 7908 | #endif |
| 7909 | cas [%r23],%g0,%r10 !lock |
| 7910 | brnz %r10, cwq_8_23 |
| 7911 | rd %asi, %r12 |
| 7912 | wr %g0, 0x40, %asi |
| 7913 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 7914 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 7915 | cmp %l1, 1 |
| 7916 | bne cwq_8_23 |
| 7917 | set CWQ_BASE, %l6 |
| 7918 | #ifndef SPC |
| 7919 | add %l6, %o3, %l6 |
| 7920 | #endif |
| 7921 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 7922 | best_set_reg(0x20610020, %l1, %l2) !# Control Word |
| 7923 | sllx %l2, 32, %l2 |
| 7924 | stx %l2, [%l6 + 0x0] |
| 7925 | membar #Sync |
| 7926 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 7927 | sub %l2, 0x40, %l2 |
| 7928 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 7929 | wr %r12, %g0, %asi |
| 7930 | st %g0, [%r23] |
| 7931 | cwq_8_23: |
| 7932 | ta T_CHANGE_NONHPRIV |
| 7933 | .word 0xa9414000 ! 31: RDPC rd %pc, %r20 |
| 7934 | .word 0x87992213 ! 32: WRHPR_HINTP_I wrhpr %r4, 0x0213, %hintp |
| 7935 | .word 0xd497e1d0 ! 33: LDUHA_I lduha [%r31, + 0x01d0] %asi, %r10 |
| 7936 | .word 0xd497c028 ! 34: LDUHA_R lduha [%r31, %r8] 0x01, %r10 |
| 7937 | splash_lsu_8_25: |
| 7938 | nop |
| 7939 | ta T_CHANGE_HPRIV |
| 7940 | set 0xc768e570, %r2 |
| 7941 | mov 0x6, %r1 |
| 7942 | sllx %r1, 32, %r1 |
| 7943 | or %r1, %r2, %r2 |
| 7944 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 7945 | ta T_CHANGE_NONHPRIV |
| 7946 | .word 0x3d400001 ! 35: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 7947 | .word 0xa7814012 ! 36: WR_GRAPHICS_STATUS_REG_R wr %r5, %r18, %- |
| 7948 | nop |
| 7949 | ta T_CHANGE_HPRIV ! macro |
| 7950 | donret_8_27: |
| 7951 | rd %pc, %r12 |
| 7952 | add %r12, (donretarg_8_27-donret_8_27), %r12 |
| 7953 | add %r12, 0x4, %r11 ! seq tnpc |
| 7954 | wrpr %g0, 0x1, %tl |
| 7955 | wrpr %g0, %r12, %tpc |
| 7956 | wrpr %g0, %r11, %tnpc |
| 7957 | set (0x009c0e00 | (4 << 24)), %r13 |
| 7958 | and %r12, 0xfff, %r14 |
| 7959 | sllx %r14, 30, %r14 |
| 7960 | or %r13, %r14, %r20 |
| 7961 | wrpr %r20, %g0, %tstate |
| 7962 | wrhpr %g0, 0x206, %htstate |
| 7963 | ta T_CHANGE_NONHPRIV ! rand=1 (8) |
| 7964 | .word 0x3d400001 ! 1: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 7965 | done |
| 7966 | donretarg_8_27: |
| 7967 | .word 0x30800001 ! 37: BA ba,a <label_0x1> |
| 7968 | #if (defined SPC || defined CMP1) |
| 7969 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_28) + 56, 16, 16)) -> intp(2,0,27) |
| 7970 | #else |
| 7971 | setx 0xf27266e7df779f87, %r1, %r28 |
| 7972 | stxa %r28, [%g0] 0x73 |
| 7973 | #endif |
| 7974 | intvec_8_28: |
| 7975 | .word 0x39400001 ! 38: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 7976 | cmp_8_29: |
| 7977 | nop |
| 7978 | ta T_CHANGE_HPRIV |
| 7979 | rd %asi, %r12 |
| 7980 | wr %r0, 0x41, %asi |
| 7981 | set sync_thr_counter4, %r23 |
| 7982 | #ifndef SPC |
| 7983 | ldxa [%g0]0x63, %r8 |
| 7984 | and %r8, 0x38, %r8 ! Core ID |
| 7985 | add %r8, %r23, %r23 |
| 7986 | mov 0xff, %r9 |
| 7987 | xor %r9, 0x8, %r9 |
| 7988 | sllx %r9, %r8, %r9 ! My core mask |
| 7989 | #else |
| 7990 | mov 0, %r8 |
| 7991 | mov 0xff, %r9 |
| 7992 | xor %r9, 0x8, %r9 ! My core mask |
| 7993 | #endif |
| 7994 | mov 0x8, %r10 |
| 7995 | cmp_startwait8_29: |
| 7996 | cas [%r23],%g0,%r10 !lock |
| 7997 | brz,a %r10, continue_cmp_8_29 |
| 7998 | ldxa [0x50]%asi, %r13 !Running_rw |
| 7999 | ld [%r23], %r10 |
| 8000 | cmp_wait8_29: |
| 8001 | brnz,a %r10, cmp_wait8_29 |
| 8002 | ld [%r23], %r10 |
| 8003 | ba cmp_startwait8_29 |
| 8004 | mov 0x8, %r10 |
| 8005 | continue_cmp_8_29: |
| 8006 | ldxa [0x58]%asi, %r14 !Running_status |
| 8007 | xnor %r14, %r13, %r14 !Bits equal |
| 8008 | brz,a %r8, cmp_multi_core_8_29 |
| 8009 | mov 0xb7, %r17 |
| 8010 | best_set_reg(0xf7cf6a154f71efd2, %r16, %r17) |
| 8011 | cmp_multi_core_8_29: |
| 8012 | and %r14, %r17, %r14 !Apply set/clear mask to bits equal |
| 8013 | and %r14, %r9, %r14 !Apply core-mask |
| 8014 | stxa %r14, [0x68]%asi |
| 8015 | st %g0, [%r23] !clear lock |
| 8016 | wr %g0, %r12, %asi |
| 8017 | ta T_CHANGE_NONHPRIV |
| 8018 | .word 0x91908003 ! 39: WRPR_PIL_R wrpr %r2, %r3, %pil |
| 8019 | nop |
| 8020 | ta T_CHANGE_HPRIV |
| 8021 | mov 0x8, %r10 |
| 8022 | set sync_thr_counter6, %r23 |
| 8023 | #ifndef SPC |
| 8024 | ldxa [%g0]0x63, %o1 |
| 8025 | and %o1, 0x38, %o1 |
| 8026 | add %o1, %r23, %r23 |
| 8027 | #endif |
| 8028 | cas [%r23],%g0,%r10 !lock |
| 8029 | brnz %r10, sma_8_30 |
| 8030 | rd %asi, %r12 |
| 8031 | wr %g0, 0x40, %asi |
| 8032 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 8033 | set 0x001a1fff, %g1 |
| 8034 | stxa %g1, [%g0 + 0x80] %asi |
| 8035 | wr %r12, %g0, %asi |
| 8036 | st %g0, [%r23] |
| 8037 | sma_8_30: |
| 8038 | ta T_CHANGE_NONHPRIV |
| 8039 | .word 0xd5e7e013 ! 40: CASA_R casa [%r31] %asi, %r19, %r10 |
| 8040 | .word 0xd497e0d8 ! 41: LDUHA_I lduha [%r31, + 0x00d8] %asi, %r10 |
| 8041 | .word 0x8d802000 ! 42: WRFPRS_I wr %r0, 0x0000, %fprs |
| 8042 | intveclr_8_31: |
| 8043 | nop |
| 8044 | ta T_CHANGE_HPRIV |
| 8045 | setx 0x2361367764b040a8, %r1, %r28 |
| 8046 | stxa %r28, [%g0] 0x72 |
| 8047 | ta T_CHANGE_NONHPRIV |
| 8048 | .word 0x25400001 ! 43: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 8049 | .word 0xa780c012 ! 44: WR_GRAPHICS_STATUS_REG_R wr %r3, %r18, %- |
| 8050 | cerer_8_33: |
| 8051 | nop |
| 8052 | ta T_CHANGE_HPRIV |
| 8053 | best_set_reg(0x6de2db0f7cc8a650, %r26, %r27) |
| 8054 | sethi %hi(0x20008000), %r26 ! Set ITTM/DTTM |
| 8055 | sllx %r26, 32, %r26 |
| 8056 | or %r26, %r27, %r27 |
| 8057 | mov 0x10, %r26 |
| 8058 | stxa %r27, [%r26]0x4c |
| 8059 | .word 0x8143e011 ! 45: MEMBAR membar #LoadLoad | #Lookaside |
| 8060 | fpinit_8_34: |
| 8061 | nop |
| 8062 | setx fp_data_quads, %r19, %r20 |
| 8063 | ldd [%r20], %f0 |
| 8064 | ldd [%r20+8], %f4 |
| 8065 | ld [%r20+16], %fsr |
| 8066 | ld [%r20+24], %r19 |
| 8067 | wr %r19, %g0, %gsr |
| 8068 | .word 0xc3e82af6 ! 46: PREFETCHA_I prefetcha [%r0, + 0x0af6] %asi, #one_read |
| 8069 | .word 0x29800001 ! 47: FBL fbl,a <label_0x1> |
| 8070 | splash_hpstate_8_36: |
| 8071 | .word 0x22cc8001 ! 1: BRZ brz,a,pt %r18,<label_0xc8001> |
| 8072 | .word 0x81983ce6 ! 48: WRHPR_HPSTATE_I wrhpr %r0, 0x1ce6, %hpstate |
| 8073 | nop |
| 8074 | ta T_CHANGE_HPRIV |
| 8075 | mov 0x8+1, %r10 |
| 8076 | set sync_thr_counter5, %r23 |
| 8077 | #ifndef SPC |
| 8078 | ldxa [%g0]0x63, %o1 |
| 8079 | and %o1, 0x38, %o1 |
| 8080 | add %o1, %r23, %r23 |
| 8081 | sllx %o1, 5, %o3 !(CID*256) |
| 8082 | #endif |
| 8083 | cas [%r23],%g0,%r10 !lock |
| 8084 | brnz %r10, cwq_8_37 |
| 8085 | rd %asi, %r12 |
| 8086 | wr %g0, 0x40, %asi |
| 8087 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 8088 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 8089 | cmp %l1, 1 |
| 8090 | bne cwq_8_37 |
| 8091 | set CWQ_BASE, %l6 |
| 8092 | #ifndef SPC |
| 8093 | add %l6, %o3, %l6 |
| 8094 | #endif |
| 8095 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 8096 | best_set_reg(0x206100e0, %l1, %l2) !# Control Word |
| 8097 | sllx %l2, 32, %l2 |
| 8098 | stx %l2, [%l6 + 0x0] |
| 8099 | membar #Sync |
| 8100 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 8101 | sub %l2, 0x40, %l2 |
| 8102 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 8103 | wr %r12, %g0, %asi |
| 8104 | st %g0, [%r23] |
| 8105 | cwq_8_37: |
| 8106 | ta T_CHANGE_NONHPRIV |
| 8107 | .word 0xa7414000 ! 49: RDPC rd %pc, %r19 |
| 8108 | splash_hpstate_8_38: |
| 8109 | ta T_CHANGE_NONHPRIV |
| 8110 | .word 0x81983595 ! 50: WRHPR_HPSTATE_I wrhpr %r0, 0x1595, %hpstate |
| 8111 | .word 0xc32fc000 ! 51: STXFSR_R st-sfr %f1, [%r0, %r31] |
| 8112 | invalw |
| 8113 | mov 0xb2, %r30 |
| 8114 | .word 0x83d0001e ! 52: Tcc_R te icc_or_xcc, %r0 + %r30 |
| 8115 | splash_cmpr_8_40: |
| 8116 | mov 0, %r18 |
| 8117 | sllx %r18, 63, %r18 |
| 8118 | rd %tick, %r17 |
| 8119 | add %r17, 0x100, %r17 |
| 8120 | or %r17, %r18, %r17 |
| 8121 | .word 0xaf800011 ! 53: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 8122 | setx 0xdfe431d6382ef44f, %r1, %r28 |
| 8123 | stxa %r28, [%g0] 0x73 |
| 8124 | intvec_8_41: |
| 8125 | .word 0x39400001 ! 54: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 8126 | trapasi_8_42: |
| 8127 | nop |
| 8128 | mov 0x0, %r1 ! (VA for ASI 0x73) |
| 8129 | .word 0xe4d04e60 ! 55: LDSHA_R ldsha [%r1, %r0] 0x73, %r18 |
| 8130 | memptr_8_43: |
| 8131 | set 0x60340000, %r31 |
| 8132 | .word 0x858170b2 ! 56: WRCCR_I wr %r5, 0x10b2, %ccr |
| 8133 | memptr_8_44: |
| 8134 | set 0x60340000, %r31 |
| 8135 | .word 0x8582a306 ! 57: WRCCR_I wr %r10, 0x0306, %ccr |
| 8136 | .word 0x97a4cd33 ! 58: FsMULd fsmuld %f19, %f50, %f42 |
| 8137 | nop |
| 8138 | ta T_CHANGE_HPRIV ! macro |
| 8139 | donret_8_45: |
| 8140 | rd %pc, %r12 |
| 8141 | add %r12, (donretarg_8_45-donret_8_45+4), %r12 |
| 8142 | add %r12, 0x4, %r11 ! seq tnpc |
| 8143 | wrpr %g0, 0x2, %tl |
| 8144 | wrpr %g0, %r12, %tpc |
| 8145 | wrpr %g0, %r11, %tnpc |
| 8146 | set (0x00b34100 | (28 << 24)), %r13 |
| 8147 | and %r12, 0xfff, %r14 |
| 8148 | sllx %r14, 30, %r14 |
| 8149 | or %r13, %r14, %r20 |
| 8150 | wrpr %r20, %g0, %tstate |
| 8151 | wrhpr %g0, 0x1056, %htstate |
| 8152 | ta T_CHANGE_NONHPRIV ! rand=1 (8) |
| 8153 | done |
| 8154 | donretarg_8_45: |
| 8155 | .word 0xd4ffe1d5 ! 59: SWAPA_I swapa %r10, [%r31 + 0x01d5] %asi |
| 8156 | .word 0x95a0c9a7 ! 60: FDIVs fdivs %f3, %f7, %f10 |
| 8157 | splash_tba_8_47: |
| 8158 | nop |
| 8159 | ta T_CHANGE_PRIV |
| 8160 | setx 0x00000000003a0000, %r11, %r12 |
| 8161 | .word 0x8b90000c ! 61: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 8162 | ibp_8_48: |
| 8163 | nop |
| 8164 | ta T_CHANGE_NONHPRIV |
| 8165 | .word 0x9ba509a4 ! 62: FDIVs fdivs %f20, %f4, %f13 |
| 8166 | .word 0x97450000 ! 63: RD_SET_SOFTINT rd %set_softint, %r11 |
| 8167 | .word 0xd677c000 ! 64: STX_R stx %r11, [%r31 + %r0] |
| 8168 | .word 0xd71fe0c0 ! 65: LDDF_I ldd [%r31, 0x00c0], %f11 |
| 8169 | memptr_8_49: |
| 8170 | set 0x60340000, %r31 |
| 8171 | .word 0x8584b3e7 ! 66: WRCCR_I wr %r18, 0x13e7, %ccr |
| 8172 | .word 0x81b01021 ! 67: SIAM siam 1 |
| 8173 | .word 0xa3a089d0 ! 68: FDIVd fdivd %f2, %f16, %f48 |
| 8174 | .word 0xdb1fe170 ! 69: LDDF_I ldd [%r31, 0x0170], %f13 |
| 8175 | .word 0x36780001 ! 70: BPGE <illegal instruction> |
| 8176 | dvapa_8_51: |
| 8177 | nop |
| 8178 | ta T_CHANGE_HPRIV |
| 8179 | mov 0xb27, %r20 |
| 8180 | mov 0x7, %r19 |
| 8181 | sllx %r20, 23, %r20 |
| 8182 | or %r19, %r20, %r19 |
| 8183 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 8184 | mov 0x38, %r18 |
| 8185 | stxa %r31, [%r18]0x58 |
| 8186 | ta T_CHANGE_NONHPRIV |
| 8187 | .word 0x977031a8 ! 71: POPC_I popc 0x11a8, %r11 |
| 8188 | splash_cmpr_8_52: |
| 8189 | mov 0, %r18 |
| 8190 | sllx %r18, 63, %r18 |
| 8191 | rd %tick, %r17 |
| 8192 | add %r17, 0x60, %r17 |
| 8193 | or %r17, %r18, %r17 |
| 8194 | ta T_CHANGE_HPRIV |
| 8195 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 8196 | ta T_CHANGE_PRIV |
| 8197 | .word 0xb3800011 ! 72: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 8198 | intveclr_8_53: |
| 8199 | nop |
| 8200 | ta T_CHANGE_HPRIV |
| 8201 | setx 0x0e9e47bc5914f12e, %r1, %r28 |
| 8202 | stxa %r28, [%g0] 0x72 |
| 8203 | ta T_CHANGE_NONHPRIV |
| 8204 | .word 0x25400001 ! 73: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 8205 | jmptr_8_54: |
| 8206 | nop |
| 8207 | best_set_reg(0xe1a00000, %r20, %r27) |
| 8208 | .word 0xb7c6c000 ! 74: JMPL_R jmpl %r27 + %r0, %r27 |
| 8209 | mondo_8_55: |
| 8210 | nop |
| 8211 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 8212 | ta T_CHANGE_PRIV |
| 8213 | stxa %r20, [%r0+0x3c8] %asi |
| 8214 | .word 0x9d950003 ! 75: WRPR_WSTATE_R wrpr %r20, %r3, %wstate |
| 8215 | #if (defined SPC || defined CMP1) |
| 8216 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_56) + 40, 16, 16)) -> intp(0,0,5) |
| 8217 | #else |
| 8218 | setx 0x6dc7051a0fc396d7, %r1, %r28 |
| 8219 | stxa %r28, [%g0] 0x73 |
| 8220 | #endif |
| 8221 | intvec_8_56: |
| 8222 | .word 0x39400001 ! 76: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 8223 | splash_tick_8_57: |
| 8224 | nop |
| 8225 | ta T_CHANGE_HPRIV |
| 8226 | best_set_reg(0x51f6dfee87596c5a, %r16, %r17) |
| 8227 | .word 0x89800011 ! 77: WRTICK_R wr %r0, %r17, %tick |
| 8228 | splash_lsu_8_58: |
| 8229 | nop |
| 8230 | ta T_CHANGE_HPRIV |
| 8231 | set 0x8b6d3a42, %r2 |
| 8232 | mov 0x1, %r1 |
| 8233 | sllx %r1, 32, %r1 |
| 8234 | or %r1, %r2, %r2 |
| 8235 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 8236 | .word 0x3d400001 ! 78: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 8237 | splash_tba_8_59: |
| 8238 | nop |
| 8239 | ta T_CHANGE_PRIV |
| 8240 | setx 0x00000000003a0000, %r11, %r12 |
| 8241 | .word 0x8b90000c ! 79: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 8242 | .word 0x8780208b ! 80: WRASI_I wr %r0, 0x008b, %asi |
| 8243 | .word 0xd45fe060 ! 81: LDX_I ldx [%r31 + 0x0060], %r10 |
| 8244 | br_badelay1_8_60: |
| 8245 | .word 0xc36fe0b0 ! 1: PREFETCH_I prefetch [%r31 + 0x00b0], #one_read |
| 8246 | .word 0xe3334012 ! 1: STQF_R - %f17, [%r18, %r13] |
| 8247 | .word 0xa9a7c9d0 ! 1: FDIVd fdivd %f62, %f16, %f20 |
| 8248 | normalw |
| 8249 | .word 0x91458000 ! 82: RD_SOFTINT_REG rd %softint, %r8 |
| 8250 | mondo_8_61: |
| 8251 | nop |
| 8252 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 8253 | stxa %r10, [%r0+0x3c8] %asi |
| 8254 | .word 0x9d918013 ! 83: WRPR_WSTATE_R wrpr %r6, %r19, %wstate |
| 8255 | nop |
| 8256 | mov 0x80, %g3 |
| 8257 | stxa %g3, [%g3] 0x57 |
| 8258 | .word 0xe45fc000 ! 84: LDX_R ldx [%r31 + %r0], %r18 |
| 8259 | nop |
| 8260 | ta T_CHANGE_HPRIV |
| 8261 | mov 0x8+1, %r10 |
| 8262 | set sync_thr_counter5, %r23 |
| 8263 | #ifndef SPC |
| 8264 | ldxa [%g0]0x63, %o1 |
| 8265 | and %o1, 0x38, %o1 |
| 8266 | add %o1, %r23, %r23 |
| 8267 | sllx %o1, 5, %o3 !(CID*256) |
| 8268 | #endif |
| 8269 | cas [%r23],%g0,%r10 !lock |
| 8270 | brnz %r10, cwq_8_62 |
| 8271 | rd %asi, %r12 |
| 8272 | wr %g0, 0x40, %asi |
| 8273 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 8274 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 8275 | cmp %l1, 1 |
| 8276 | bne cwq_8_62 |
| 8277 | set CWQ_BASE, %l6 |
| 8278 | #ifndef SPC |
| 8279 | add %l6, %o3, %l6 |
| 8280 | #endif |
| 8281 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 8282 | best_set_reg(0x20610060, %l1, %l2) !# Control Word |
| 8283 | sllx %l2, 32, %l2 |
| 8284 | stx %l2, [%l6 + 0x0] |
| 8285 | membar #Sync |
| 8286 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 8287 | sub %l2, 0x40, %l2 |
| 8288 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 8289 | wr %r12, %g0, %asi |
| 8290 | st %g0, [%r23] |
| 8291 | cwq_8_62: |
| 8292 | ta T_CHANGE_NONHPRIV |
| 8293 | .word 0xa7414000 ! 85: RDPC rd %pc, %r19 |
| 8294 | pmu_8_63: |
| 8295 | nop |
| 8296 | setx 0xfffff1d9fffffe37, %g1, %g7 |
| 8297 | .word 0xa3800007 ! 86: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 8298 | splash_tba_8_64: |
| 8299 | nop |
| 8300 | ta T_CHANGE_PRIV |
| 8301 | set 0x120000, %r12 |
| 8302 | .word 0x8b90000c ! 87: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 8303 | splash_cmpr_8_65: |
| 8304 | mov 0, %r18 |
| 8305 | sllx %r18, 63, %r18 |
| 8306 | rd %tick, %r17 |
| 8307 | add %r17, 0x100, %r17 |
| 8308 | or %r17, %r18, %r17 |
| 8309 | ta T_CHANGE_PRIV |
| 8310 | .word 0xb3800011 ! 88: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 8311 | splash_lsu_8_66: |
| 8312 | nop |
| 8313 | ta T_CHANGE_HPRIV |
| 8314 | set 0xe5784d0b, %r2 |
| 8315 | mov 0x2, %r1 |
| 8316 | sllx %r1, 32, %r1 |
| 8317 | or %r1, %r2, %r2 |
| 8318 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 8319 | ta T_CHANGE_NONHPRIV |
| 8320 | .word 0x3d400001 ! 89: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 8321 | .word 0xc30fc000 ! 90: LDXFSR_R ld-fsr [%r31, %r0], %f1 |
| 8322 | nop |
| 8323 | ta T_CHANGE_HPRIV |
| 8324 | mov 0x8+1, %r10 |
| 8325 | set sync_thr_counter5, %r23 |
| 8326 | #ifndef SPC |
| 8327 | ldxa [%g0]0x63, %o1 |
| 8328 | and %o1, 0x38, %o1 |
| 8329 | add %o1, %r23, %r23 |
| 8330 | sllx %o1, 5, %o3 !(CID*256) |
| 8331 | #endif |
| 8332 | cas [%r23],%g0,%r10 !lock |
| 8333 | brnz %r10, cwq_8_67 |
| 8334 | rd %asi, %r12 |
| 8335 | wr %g0, 0x40, %asi |
| 8336 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 8337 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 8338 | cmp %l1, 1 |
| 8339 | bne cwq_8_67 |
| 8340 | set CWQ_BASE, %l6 |
| 8341 | #ifndef SPC |
| 8342 | add %l6, %o3, %l6 |
| 8343 | #endif |
| 8344 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 8345 | best_set_reg(0x206100a0, %l1, %l2) !# Control Word |
| 8346 | sllx %l2, 32, %l2 |
| 8347 | stx %l2, [%l6 + 0x0] |
| 8348 | membar #Sync |
| 8349 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 8350 | sub %l2, 0x40, %l2 |
| 8351 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 8352 | wr %r12, %g0, %asi |
| 8353 | st %g0, [%r23] |
| 8354 | cwq_8_67: |
| 8355 | ta T_CHANGE_NONHPRIV |
| 8356 | .word 0xa3414000 ! 91: RDPC rd %pc, %r17 |
| 8357 | .word 0xd827e020 ! 92: STW_I stw %r12, [%r31 + 0x0020] |
| 8358 | splash_tba_8_68: |
| 8359 | nop |
| 8360 | ta T_CHANGE_PRIV |
| 8361 | set 0x120000, %r12 |
| 8362 | .word 0x8b90000c ! 93: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 8363 | setx 0x12c02065f94310d0, %r1, %r28 |
| 8364 | stxa %r28, [%g0] 0x73 |
| 8365 | intvec_8_69: |
| 8366 | .word 0x39400001 ! 94: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 8367 | nop |
| 8368 | mov 0x80, %g3 |
| 8369 | stxa %g3, [%g3] 0x5f |
| 8370 | .word 0xd85fc000 ! 95: LDX_R ldx [%r31 + %r0], %r12 |
| 8371 | .word 0x8d802004 ! 96: WRFPRS_I wr %r0, 0x0004, %fprs |
| 8372 | .word 0xd91fc009 ! 97: LDDF_R ldd [%r31, %r9], %f12 |
| 8373 | splash_cmpr_8_71: |
| 8374 | mov 0, %r18 |
| 8375 | sllx %r18, 63, %r18 |
| 8376 | rd %tick, %r17 |
| 8377 | add %r17, 0x100, %r17 |
| 8378 | or %r17, %r18, %r17 |
| 8379 | ta T_CHANGE_HPRIV |
| 8380 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 8381 | ta T_CHANGE_PRIV |
| 8382 | .word 0xaf800011 ! 98: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 8383 | nop |
| 8384 | mov 0x80, %g3 |
| 8385 | stxa %g3, [%g3] 0x5f |
| 8386 | .word 0xd85fc000 ! 99: LDX_R ldx [%r31 + %r0], %r12 |
| 8387 | ceter_8_72: |
| 8388 | nop |
| 8389 | ta T_CHANGE_HPRIV |
| 8390 | mov 7, %r17 |
| 8391 | sllx %r17, 60, %r17 |
| 8392 | mov 0x18, %r16 |
| 8393 | stxa %r17, [%r16]0x4c |
| 8394 | ta T_CHANGE_NONHPRIV |
| 8395 | .word 0x91410000 ! 100: RDTICK rd %tick, %r8 |
| 8396 | .word 0x33400001 ! 1: FBPE fbe,a,pn %fcc0, <label_0x1> |
| 8397 | .word 0x8d902afb ! 101: WRPR_PSTATE_I wrpr %r0, 0x0afb, %pstate |
| 8398 | intveclr_8_74: |
| 8399 | nop |
| 8400 | ta T_CHANGE_HPRIV |
| 8401 | setx 0xc3aaadb71dd01104, %r1, %r28 |
| 8402 | stxa %r28, [%g0] 0x72 |
| 8403 | ta T_CHANGE_NONHPRIV |
| 8404 | .word 0x25400001 ! 102: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 8405 | fpinit_8_75: |
| 8406 | nop |
| 8407 | setx fp_data_quads, %r19, %r20 |
| 8408 | ldd [%r20], %f0 |
| 8409 | ldd [%r20+8], %f4 |
| 8410 | ld [%r20+16], %fsr |
| 8411 | ld [%r20+24], %r19 |
| 8412 | wr %r19, %g0, %gsr |
| 8413 | .word 0x89b00484 ! 103: FCMPLE32 fcmple32 %d0, %d4, %r4 |
| 8414 | jmptr_8_76: |
| 8415 | nop |
| 8416 | best_set_reg(0xe1a00000, %r20, %r27) |
| 8417 | .word 0xb7c6c000 ! 104: JMPL_R jmpl %r27 + %r0, %r27 |
| 8418 | jmptr_8_77: |
| 8419 | nop |
| 8420 | best_set_reg(0xe1a00000, %r20, %r27) |
| 8421 | .word 0xb7c6c000 ! 105: JMPL_R jmpl %r27 + %r0, %r27 |
| 8422 | nop |
| 8423 | ta T_CHANGE_HPRIV |
| 8424 | mov 0x8, %r10 |
| 8425 | set sync_thr_counter6, %r23 |
| 8426 | #ifndef SPC |
| 8427 | ldxa [%g0]0x63, %o1 |
| 8428 | and %o1, 0x38, %o1 |
| 8429 | add %o1, %r23, %r23 |
| 8430 | #endif |
| 8431 | cas [%r23],%g0,%r10 !lock |
| 8432 | brnz %r10, sma_8_78 |
| 8433 | rd %asi, %r12 |
| 8434 | wr %g0, 0x40, %asi |
| 8435 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 8436 | set 0x000a1fff, %g1 |
| 8437 | stxa %g1, [%g0 + 0x80] %asi |
| 8438 | wr %r12, %g0, %asi |
| 8439 | st %g0, [%r23] |
| 8440 | sma_8_78: |
| 8441 | ta T_CHANGE_NONHPRIV |
| 8442 | .word 0xe9e7e00c ! 106: CASA_R casa [%r31] %asi, %r12, %r20 |
| 8443 | nop |
| 8444 | ta T_CHANGE_HPRIV |
| 8445 | mov 0x8, %r10 |
| 8446 | set sync_thr_counter6, %r23 |
| 8447 | #ifndef SPC |
| 8448 | ldxa [%g0]0x63, %o1 |
| 8449 | and %o1, 0x38, %o1 |
| 8450 | add %o1, %r23, %r23 |
| 8451 | #endif |
| 8452 | cas [%r23],%g0,%r10 !lock |
| 8453 | brnz %r10, sma_8_79 |
| 8454 | rd %asi, %r12 |
| 8455 | wr %g0, 0x40, %asi |
| 8456 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 8457 | set 0x00121fff, %g1 |
| 8458 | stxa %g1, [%g0 + 0x80] %asi |
| 8459 | wr %r12, %g0, %asi |
| 8460 | st %g0, [%r23] |
| 8461 | sma_8_79: |
| 8462 | ta T_CHANGE_NONHPRIV |
| 8463 | .word 0xe9e7e00a ! 107: CASA_R casa [%r31] %asi, %r10, %r20 |
| 8464 | splash_cmpr_8_80: |
| 8465 | mov 0, %r18 |
| 8466 | sllx %r18, 63, %r18 |
| 8467 | rd %tick, %r17 |
| 8468 | add %r17, 0x50, %r17 |
| 8469 | or %r17, %r18, %r17 |
| 8470 | ta T_CHANGE_HPRIV |
| 8471 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 8472 | .word 0xaf800011 ! 108: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 8473 | ibp_8_81: |
| 8474 | nop |
| 8475 | .word 0xc19fda00 ! 109: LDDFA_R ldda [%r31, %r0], %f0 |
| 8476 | .word 0xe88008a0 ! 110: LDUWA_R lduwa [%r0, %r0] 0x45, %r20 |
| 8477 | .word 0x87ab4ac3 ! 111: FCMPEd fcmped %fcc<n>, %f44, %f34 |
| 8478 | nop |
| 8479 | ta T_CHANGE_HPRIV |
| 8480 | mov 0x8+1, %r10 |
| 8481 | set sync_thr_counter5, %r23 |
| 8482 | #ifndef SPC |
| 8483 | ldxa [%g0]0x63, %o1 |
| 8484 | and %o1, 0x38, %o1 |
| 8485 | add %o1, %r23, %r23 |
| 8486 | sllx %o1, 5, %o3 !(CID*256) |
| 8487 | #endif |
| 8488 | cas [%r23],%g0,%r10 !lock |
| 8489 | brnz %r10, cwq_8_82 |
| 8490 | rd %asi, %r12 |
| 8491 | wr %g0, 0x40, %asi |
| 8492 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 8493 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 8494 | cmp %l1, 1 |
| 8495 | bne cwq_8_82 |
| 8496 | set CWQ_BASE, %l6 |
| 8497 | #ifndef SPC |
| 8498 | add %l6, %o3, %l6 |
| 8499 | #endif |
| 8500 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 8501 | best_set_reg(0x20610030, %l1, %l2) !# Control Word |
| 8502 | sllx %l2, 32, %l2 |
| 8503 | stx %l2, [%l6 + 0x0] |
| 8504 | membar #Sync |
| 8505 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 8506 | sub %l2, 0x40, %l2 |
| 8507 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 8508 | wr %r12, %g0, %asi |
| 8509 | st %g0, [%r23] |
| 8510 | cwq_8_82: |
| 8511 | ta T_CHANGE_NONHPRIV |
| 8512 | .word 0x91414000 ! 112: RDPC rd %pc, %r8 |
| 8513 | cwp_8_83: |
| 8514 | set user_data_start, %o7 |
| 8515 | .word 0x93902006 ! 113: WRPR_CWP_I wrpr %r0, 0x0006, %cwp |
| 8516 | .word 0x9add0013 ! 114: SMULcc_R smulcc %r20, %r19, %r13 |
| 8517 | .word 0x8d802000 ! 115: WRFPRS_I wr %r0, 0x0000, %fprs |
| 8518 | trapasi_8_84: |
| 8519 | nop |
| 8520 | mov 0x3d8, %r1 ! (VA for ASI 0x25) |
| 8521 | .word 0xe4c044a0 ! 116: LDSWA_R ldswa [%r1, %r0] 0x25, %r18 |
| 8522 | .word 0x8d802004 ! 117: WRFPRS_I wr %r0, 0x0004, %fprs |
| 8523 | trapasi_8_85: |
| 8524 | nop |
| 8525 | mov 0x3d0, %r1 ! (VA for ASI 0x25) |
| 8526 | .word 0xe4d844a0 ! 118: LDXA_R ldxa [%r1, %r0] 0x25, %r18 |
| 8527 | .word 0xa753c000 ! 119: RDPR_FQ <illegal instruction> |
| 8528 | splash_hpstate_8_86: |
| 8529 | .word 0x24800001 ! 1: BLE ble,a <label_0x1> |
| 8530 | .word 0x81982e27 ! 120: WRHPR_HPSTATE_I wrhpr %r0, 0x0e27, %hpstate |
| 8531 | intveclr_8_87: |
| 8532 | nop |
| 8533 | ta T_CHANGE_HPRIV |
| 8534 | setx 0xaee0c7ecebb31252, %r1, %r28 |
| 8535 | stxa %r28, [%g0] 0x72 |
| 8536 | .word 0x25400001 ! 121: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 8537 | .word 0xe937e08e ! 122: STQF_I - %f20, [0x008e, %r31] |
| 8538 | .word 0x96c0ac30 ! 123: ADDCcc_I addccc %r2, 0x0c30, %r11 |
| 8539 | #if (defined SPC || defined CMP1) |
| 8540 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_88) + 48, 16, 16)) -> intp(3,0,7) |
| 8541 | #else |
| 8542 | setx 0x1bcb2fc383e5a8e6, %r1, %r28 |
| 8543 | stxa %r28, [%g0] 0x73 |
| 8544 | #endif |
| 8545 | intvec_8_88: |
| 8546 | .word 0x39400001 ! 124: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 8547 | trapasi_8_89: |
| 8548 | nop |
| 8549 | mov 0x0, %r1 ! (VA for ASI 0x73) |
| 8550 | .word 0xe8904e60 ! 125: LDUHA_R lduha [%r1, %r0] 0x73, %r20 |
| 8551 | trapasi_8_90: |
| 8552 | nop |
| 8553 | mov 0x3f8, %r1 ! (VA for ASI 0x25) |
| 8554 | .word 0xe8c844a0 ! 126: LDSBA_R ldsba [%r1, %r0] 0x25, %r20 |
| 8555 | .word 0x9f802e3b ! 127: SIR sir 0x0e3b |
| 8556 | intveclr_8_92: |
| 8557 | nop |
| 8558 | ta T_CHANGE_HPRIV |
| 8559 | setx 0xc3cdfcebb261f1d9, %r1, %r28 |
| 8560 | stxa %r28, [%g0] 0x72 |
| 8561 | ta T_CHANGE_NONHPRIV |
| 8562 | .word 0x25400001 ! 128: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 8563 | trapasi_8_93: |
| 8564 | nop |
| 8565 | mov 0x38, %r1 ! (VA for ASI 0x50) |
| 8566 | .word 0xd0d84a00 ! 129: LDXA_R ldxa [%r1, %r0] 0x50, %r8 |
| 8567 | splash_tick_8_94: |
| 8568 | nop |
| 8569 | ta T_CHANGE_HPRIV |
| 8570 | best_set_reg(0x454a5339d00033b1, %r16, %r17) |
| 8571 | .word 0x89800011 ! 130: WRTICK_R wr %r0, %r17, %tick |
| 8572 | .word 0xc19fd920 ! 131: LDDFA_R ldda [%r31, %r0], %f0 |
| 8573 | splash_tick_8_95: |
| 8574 | nop |
| 8575 | ta T_CHANGE_HPRIV |
| 8576 | best_set_reg(0xc8d63bb8fd88b816, %r16, %r17) |
| 8577 | .word 0x89800011 ! 132: WRTICK_R wr %r0, %r17, %tick |
| 8578 | .word 0xd197e1d8 ! 133: LDQFA_I - [%r31, 0x01d8], %f8 |
| 8579 | dvapa_8_96: |
| 8580 | nop |
| 8581 | ta T_CHANGE_HPRIV |
| 8582 | mov 0xd17, %r20 |
| 8583 | mov 0x2, %r19 |
| 8584 | sllx %r20, 23, %r20 |
| 8585 | or %r19, %r20, %r19 |
| 8586 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 8587 | mov 0x38, %r18 |
| 8588 | stxa %r31, [%r18]0x58 |
| 8589 | ta T_CHANGE_NONHPRIV |
| 8590 | .word 0x87a98a48 ! 134: FCMPd fcmpd %fcc<n>, %f6, %f8 |
| 8591 | .word 0xd13fc000 ! 135: STDF_R std %f8, [%r0, %r31] |
| 8592 | otherw |
| 8593 | mov 0xb1, %r30 |
| 8594 | .word 0x83d0001e ! 136: Tcc_R te icc_or_xcc, %r0 + %r30 |
| 8595 | .word 0x87802014 ! 137: WRASI_I wr %r0, 0x0014, %asi |
| 8596 | memptr_8_97: |
| 8597 | set 0x60740000, %r31 |
| 8598 | .word 0x85846869 ! 138: WRCCR_I wr %r17, 0x0869, %ccr |
| 8599 | splash_cmpr_8_98: |
| 8600 | mov 0, %r18 |
| 8601 | sllx %r18, 63, %r18 |
| 8602 | rd %tick, %r17 |
| 8603 | add %r17, 0x80, %r17 |
| 8604 | or %r17, %r18, %r17 |
| 8605 | .word 0xb3800011 ! 139: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 8606 | .word 0x87a98a30 ! 140: FCMPs fcmps %fcc<n>, %f6, %f16 |
| 8607 | splash_tick_8_99: |
| 8608 | nop |
| 8609 | ta T_CHANGE_HPRIV |
| 8610 | best_set_reg(0xaacc6ba37ae1e59e, %r16, %r17) |
| 8611 | .word 0x89800011 ! 141: WRTICK_R wr %r0, %r17, %tick |
| 8612 | .word 0xd0c7e020 ! 142: LDSWA_I ldswa [%r31, + 0x0020] %asi, %r8 |
| 8613 | splash_tba_8_100: |
| 8614 | nop |
| 8615 | ta T_CHANGE_PRIV |
| 8616 | set 0x120000, %r12 |
| 8617 | .word 0x8b90000c ! 143: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 8618 | change_to_randtl_8_101: |
| 8619 | ta T_CHANGE_HPRIV ! macro |
| 8620 | done_change_to_randtl_8_101: |
| 8621 | .word 0x8f902000 ! 144: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 8622 | nop |
| 8623 | ta T_CHANGE_HPRIV ! macro |
| 8624 | donret_8_102: |
| 8625 | rd %pc, %r12 |
| 8626 | add %r12, (donretarg_8_102-donret_8_102+4), %r12 |
| 8627 | add %r12, 0x4, %r11 ! seq tnpc |
| 8628 | wrpr %g0, 0x1, %tl |
| 8629 | wrpr %g0, %r12, %tpc |
| 8630 | wrpr %g0, %r11, %tnpc |
| 8631 | set (0x00ae8b00 | (0x4f << 24)), %r13 |
| 8632 | and %r12, 0xfff, %r14 |
| 8633 | sllx %r14, 30, %r14 |
| 8634 | or %r13, %r14, %r20 |
| 8635 | wrpr %r20, %g0, %tstate |
| 8636 | wrhpr %g0, 0x1a0e, %htstate |
| 8637 | ta T_CHANGE_NONHPRIV ! rand=1 (8) |
| 8638 | .word 0x2d400001 ! 1: FBPG fbg,a,pn %fcc0, <label_0x1> |
| 8639 | retry |
| 8640 | donretarg_8_102: |
| 8641 | .word 0x24cc0001 ! 145: BRLEZ brlez,a,pt %r16,<label_0xc0001> |
| 8642 | .word 0xd13fc012 ! 146: STDF_R std %f8, [%r18, %r31] |
| 8643 | .word 0x93d02032 ! 147: Tcc_I tne icc_or_xcc, %r0 + 50 |
| 8644 | nop |
| 8645 | ta T_CHANGE_HPRIV |
| 8646 | mov 0x8+1, %r10 |
| 8647 | set sync_thr_counter5, %r23 |
| 8648 | #ifndef SPC |
| 8649 | ldxa [%g0]0x63, %o1 |
| 8650 | and %o1, 0x38, %o1 |
| 8651 | add %o1, %r23, %r23 |
| 8652 | sllx %o1, 5, %o3 !(CID*256) |
| 8653 | #endif |
| 8654 | cas [%r23],%g0,%r10 !lock |
| 8655 | brnz %r10, cwq_8_104 |
| 8656 | rd %asi, %r12 |
| 8657 | wr %g0, 0x40, %asi |
| 8658 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 8659 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 8660 | cmp %l1, 1 |
| 8661 | bne cwq_8_104 |
| 8662 | set CWQ_BASE, %l6 |
| 8663 | #ifndef SPC |
| 8664 | add %l6, %o3, %l6 |
| 8665 | #endif |
| 8666 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 8667 | best_set_reg(0x20610040, %l1, %l2) !# Control Word |
| 8668 | sllx %l2, 32, %l2 |
| 8669 | stx %l2, [%l6 + 0x0] |
| 8670 | membar #Sync |
| 8671 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 8672 | sub %l2, 0x40, %l2 |
| 8673 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 8674 | wr %r12, %g0, %asi |
| 8675 | st %g0, [%r23] |
| 8676 | cwq_8_104: |
| 8677 | ta T_CHANGE_NONHPRIV |
| 8678 | .word 0x9b414000 ! 148: RDPC rd %pc, %r13 |
| 8679 | mondo_8_105: |
| 8680 | nop |
| 8681 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 8682 | ta T_CHANGE_PRIV |
| 8683 | stxa %r20, [%r0+0x3e0] %asi |
| 8684 | .word 0x9d940003 ! 149: WRPR_WSTATE_R wrpr %r16, %r3, %wstate |
| 8685 | .word 0xe19fe1c0 ! 150: LDDFA_I ldda [%r31, 0x01c0], %f16 |
| 8686 | nop |
| 8687 | ta T_CHANGE_HPRIV |
| 8688 | mov 0x8+1, %r10 |
| 8689 | set sync_thr_counter5, %r23 |
| 8690 | #ifndef SPC |
| 8691 | ldxa [%g0]0x63, %o1 |
| 8692 | and %o1, 0x38, %o1 |
| 8693 | add %o1, %r23, %r23 |
| 8694 | sllx %o1, 5, %o3 !(CID*256) |
| 8695 | #endif |
| 8696 | cas [%r23],%g0,%r10 !lock |
| 8697 | brnz %r10, cwq_8_106 |
| 8698 | rd %asi, %r12 |
| 8699 | wr %g0, 0x40, %asi |
| 8700 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 8701 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 8702 | cmp %l1, 1 |
| 8703 | bne cwq_8_106 |
| 8704 | set CWQ_BASE, %l6 |
| 8705 | #ifndef SPC |
| 8706 | add %l6, %o3, %l6 |
| 8707 | #endif |
| 8708 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 8709 | best_set_reg(0x20610070, %l1, %l2) !# Control Word |
| 8710 | sllx %l2, 32, %l2 |
| 8711 | stx %l2, [%l6 + 0x0] |
| 8712 | membar #Sync |
| 8713 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 8714 | sub %l2, 0x40, %l2 |
| 8715 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 8716 | wr %r12, %g0, %asi |
| 8717 | st %g0, [%r23] |
| 8718 | cwq_8_106: |
| 8719 | ta T_CHANGE_NONHPRIV |
| 8720 | .word 0x91414000 ! 151: RDPC rd %pc, %r8 |
| 8721 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 8722 | reduce_priv_lvl_8_107: |
| 8723 | ta T_CHANGE_NONPRIV ! macro |
| 8724 | #if (defined SPC || defined CMP1) |
| 8725 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_108) + 56, 16, 16)) -> intp(2,0,12) |
| 8726 | #else |
| 8727 | setx 0x927848728860a302, %r1, %r28 |
| 8728 | stxa %r28, [%g0] 0x73 |
| 8729 | #endif |
| 8730 | intvec_8_108: |
| 8731 | .word 0x39400001 ! 153: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 8732 | .word 0x8d90395f ! 154: WRPR_PSTATE_I wrpr %r0, 0x195f, %pstate |
| 8733 | dvapa_8_110: |
| 8734 | nop |
| 8735 | ta T_CHANGE_HPRIV |
| 8736 | mov 0x885, %r20 |
| 8737 | mov 0xf, %r19 |
| 8738 | sllx %r20, 23, %r20 |
| 8739 | or %r19, %r20, %r19 |
| 8740 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 8741 | mov 0x38, %r18 |
| 8742 | stxa %r31, [%r18]0x58 |
| 8743 | ta T_CHANGE_NONHPRIV |
| 8744 | .word 0xc3e98034 ! 155: PREFETCHA_R prefetcha [%r6, %r20] 0x01, #one_read |
| 8745 | .word 0xd0800c20 ! 156: LDUWA_R lduwa [%r0, %r0] 0x61, %r8 |
| 8746 | splash_tick_8_111: |
| 8747 | nop |
| 8748 | ta T_CHANGE_HPRIV |
| 8749 | best_set_reg(0x3b973eeda1a0cd60, %r16, %r17) |
| 8750 | .word 0x89800011 ! 157: WRTICK_R wr %r0, %r17, %tick |
| 8751 | memptr_8_112: |
| 8752 | set 0x60140000, %r31 |
| 8753 | .word 0x858466a4 ! 158: WRCCR_I wr %r17, 0x06a4, %ccr |
| 8754 | .word 0xa44c0014 ! 159: MULX_R mulx %r16, %r20, %r18 |
| 8755 | nop |
| 8756 | ta T_CHANGE_HPRIV |
| 8757 | mov 0x8, %r10 |
| 8758 | set sync_thr_counter6, %r23 |
| 8759 | #ifndef SPC |
| 8760 | ldxa [%g0]0x63, %o1 |
| 8761 | and %o1, 0x38, %o1 |
| 8762 | add %o1, %r23, %r23 |
| 8763 | #endif |
| 8764 | cas [%r23],%g0,%r10 !lock |
| 8765 | brnz %r10, sma_8_113 |
| 8766 | rd %asi, %r12 |
| 8767 | wr %g0, 0x40, %asi |
| 8768 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 8769 | set 0x00061fff, %g1 |
| 8770 | stxa %g1, [%g0 + 0x80] %asi |
| 8771 | wr %r12, %g0, %asi |
| 8772 | st %g0, [%r23] |
| 8773 | sma_8_113: |
| 8774 | ta T_CHANGE_NONHPRIV |
| 8775 | .word 0xe3e7e00c ! 160: CASA_R casa [%r31] %asi, %r12, %r17 |
| 8776 | ibp_8_114: |
| 8777 | nop |
| 8778 | .word 0x95a489a1 ! 161: FDIVs fdivs %f18, %f1, %f10 |
| 8779 | memptr_8_115: |
| 8780 | set 0x60140000, %r31 |
| 8781 | .word 0x8582bdb5 ! 162: WRCCR_I wr %r10, 0x1db5, %ccr |
| 8782 | splash_tba_8_116: |
| 8783 | nop |
| 8784 | ta T_CHANGE_PRIV |
| 8785 | set 0x120000, %r12 |
| 8786 | .word 0x8b90000c ! 163: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 8787 | .word 0x904cc011 ! 164: MULX_R mulx %r19, %r17, %r8 |
| 8788 | .word 0x93d020b2 ! 165: Tcc_I tne icc_or_xcc, %r0 + 178 |
| 8789 | ibp_8_117: |
| 8790 | nop |
| 8791 | ta T_CHANGE_NONHPRIV |
| 8792 | .word 0x87ac0a4a ! 166: FCMPd fcmpd %fcc<n>, %f16, %f10 |
| 8793 | brcommon2_8_118: |
| 8794 | nop |
| 8795 | setx common_target, %r12, %r27 |
| 8796 | ba,a .+12 |
| 8797 | .word 0x93a2c9cc ! 1: FDIVd fdivd %f42, %f12, %f40 |
| 8798 | ba,a .+8 |
| 8799 | jmpl %r27+0, %r27 |
| 8800 | .word 0xc1bfe080 ! 167: STDFA_I stda %f0, [0x0080, %r31] |
| 8801 | .word 0xd027e008 ! 168: STW_I stw %r8, [%r31 + 0x0008] |
| 8802 | ibp_8_119: |
| 8803 | nop |
| 8804 | ta T_CHANGE_NONHPRIV |
| 8805 | .word 0x93a349d4 ! 169: FDIVd fdivd %f44, %f20, %f40 |
| 8806 | .word 0x97520000 ! 170: RDPR_PIL <illegal instruction> |
| 8807 | mondo_8_120: |
| 8808 | nop |
| 8809 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 8810 | stxa %r18, [%r0+0x3d0] %asi |
| 8811 | .word 0x9d914010 ! 171: WRPR_WSTATE_R wrpr %r5, %r16, %wstate |
| 8812 | .word 0x8d802004 ! 172: WRFPRS_I wr %r0, 0x0004, %fprs |
| 8813 | .word 0xe08fe1c8 ! 173: LDUBA_I lduba [%r31, + 0x01c8] %asi, %r16 |
| 8814 | setx 0x322e59371714e18b, %r1, %r28 |
| 8815 | stxa %r28, [%g0] 0x73 |
| 8816 | intvec_8_121: |
| 8817 | .word 0x39400001 ! 174: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 8818 | .word 0x90c22128 ! 175: ADDCcc_I addccc %r8, 0x0128, %r8 |
| 8819 | ibp_8_122: |
| 8820 | nop |
| 8821 | .word 0xe19fda00 ! 176: LDDFA_R ldda [%r31, %r0], %f16 |
| 8822 | ibp_8_123: |
| 8823 | nop |
| 8824 | .word 0xe1bfe140 ! 177: STDFA_I stda %f16, [0x0140, %r31] |
| 8825 | ibp_8_124: |
| 8826 | nop |
| 8827 | .word 0x99a089d1 ! 178: FDIVd fdivd %f2, %f48, %f12 |
| 8828 | .word 0xe897e0d8 ! 179: LDUHA_I lduha [%r31, + 0x00d8] %asi, %r20 |
| 8829 | fpinit_8_125: |
| 8830 | nop |
| 8831 | setx fp_data_quads, %r19, %r20 |
| 8832 | ldd [%r20], %f0 |
| 8833 | ldd [%r20+8], %f4 |
| 8834 | ld [%r20+16], %fsr |
| 8835 | ld [%r20+24], %r19 |
| 8836 | wr %r19, %g0, %gsr |
| 8837 | .word 0x87a80a44 ! 180: FCMPd fcmpd %fcc<n>, %f0, %f4 |
| 8838 | cerer_8_126: |
| 8839 | nop |
| 8840 | ta T_CHANGE_HPRIV |
| 8841 | best_set_reg(0xe3098fa23c32bb39, %r26, %r27) |
| 8842 | sethi %hi(0x20008000), %r26 ! Set ITTM/DTTM |
| 8843 | sllx %r26, 32, %r26 |
| 8844 | or %r26, %r27, %r27 |
| 8845 | mov 0x10, %r26 |
| 8846 | stxa %r27, [%r26]0x4c |
| 8847 | .word 0x8143e011 ! 181: MEMBAR membar #LoadLoad | #Lookaside |
| 8848 | ibp_8_127: |
| 8849 | nop |
| 8850 | ta T_CHANGE_NONHPRIV |
| 8851 | .word 0xe19fd920 ! 182: LDDFA_R ldda [%r31, %r0], %f16 |
| 8852 | #if (defined SPC || defined CMP1) |
| 8853 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_128) + 32, 16, 16)) -> intp(7,0,11) |
| 8854 | #else |
| 8855 | setx 0x6004b2e17b346700, %r1, %r28 |
| 8856 | stxa %r28, [%g0] 0x73 |
| 8857 | #endif |
| 8858 | intvec_8_128: |
| 8859 | .word 0x39400001 ! 183: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 8860 | intveclr_8_129: |
| 8861 | nop |
| 8862 | ta T_CHANGE_HPRIV |
| 8863 | setx 0xda51725376dcd3c0, %r1, %r28 |
| 8864 | stxa %r28, [%g0] 0x72 |
| 8865 | ta T_CHANGE_NONHPRIV |
| 8866 | .word 0x25400001 ! 184: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 8867 | dvapa_8_130: |
| 8868 | nop |
| 8869 | ta T_CHANGE_HPRIV |
| 8870 | mov 0xd56, %r20 |
| 8871 | mov 0x12, %r19 |
| 8872 | sllx %r20, 23, %r20 |
| 8873 | or %r19, %r20, %r19 |
| 8874 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 8875 | mov 0x38, %r18 |
| 8876 | stxa %r31, [%r18]0x58 |
| 8877 | ta T_CHANGE_NONHPRIV |
| 8878 | .word 0xe19fe1e0 ! 185: LDDFA_I ldda [%r31, 0x01e0], %f16 |
| 8879 | mondo_8_131: |
| 8880 | nop |
| 8881 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 8882 | stxa %r18, [%r0+0x3d0] %asi |
| 8883 | .word 0x9d944004 ! 186: WRPR_WSTATE_R wrpr %r17, %r4, %wstate |
| 8884 | .word 0xe877c000 ! 187: STX_R stx %r20, [%r31 + %r0] |
| 8885 | mondo_8_132: |
| 8886 | nop |
| 8887 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 8888 | stxa %r9, [%r0+0x3e8] %asi |
| 8889 | .word 0x9d924003 ! 188: WRPR_WSTATE_R wrpr %r9, %r3, %wstate |
| 8890 | mondo_8_133: |
| 8891 | nop |
| 8892 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 8893 | ta T_CHANGE_PRIV |
| 8894 | stxa %r6, [%r0+0x3d8] %asi |
| 8895 | .word 0x9d940010 ! 189: WRPR_WSTATE_R wrpr %r16, %r16, %wstate |
| 8896 | memptr_8_134: |
| 8897 | set 0x60740000, %r31 |
| 8898 | .word 0x8581e630 ! 190: WRCCR_I wr %r7, 0x0630, %ccr |
| 8899 | splash_hpstate_8_135: |
| 8900 | .word 0x81982645 ! 191: WRHPR_HPSTATE_I wrhpr %r0, 0x0645, %hpstate |
| 8901 | .word 0xe937c000 ! 192: STQF_R - %f20, [%r0, %r31] |
| 8902 | splash_hpstate_8_136: |
| 8903 | .word 0x24800001 ! 1: BLE ble,a <label_0x1> |
| 8904 | .word 0x81982d85 ! 193: WRHPR_HPSTATE_I wrhpr %r0, 0x0d85, %hpstate |
| 8905 | splash_hpstate_8_137: |
| 8906 | ta T_CHANGE_NONHPRIV |
| 8907 | .word 0x22800001 ! 1: BE be,a <label_0x1> |
| 8908 | .word 0x819832d5 ! 194: WRHPR_HPSTATE_I wrhpr %r0, 0x12d5, %hpstate |
| 8909 | .word 0xc19fd920 ! 195: LDDFA_R ldda [%r31, %r0], %f0 |
| 8910 | splash_tick_8_138: |
| 8911 | nop |
| 8912 | ta T_CHANGE_HPRIV |
| 8913 | best_set_reg(0x821fa3c98b35abd9, %r16, %r17) |
| 8914 | .word 0x89800011 ! 196: WRTICK_R wr %r0, %r17, %tick |
| 8915 | intveclr_8_139: |
| 8916 | nop |
| 8917 | ta T_CHANGE_HPRIV |
| 8918 | setx 0x95f17fb0c53e39f3, %r1, %r28 |
| 8919 | stxa %r28, [%g0] 0x72 |
| 8920 | ta T_CHANGE_NONHPRIV |
| 8921 | .word 0x25400001 ! 197: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 8922 | splash_tick_8_140: |
| 8923 | nop |
| 8924 | ta T_CHANGE_HPRIV |
| 8925 | best_set_reg(0xd31a2067df565145, %r16, %r17) |
| 8926 | .word 0x89800011 ! 198: WRTICK_R wr %r0, %r17, %tick |
| 8927 | mondo_8_141: |
| 8928 | nop |
| 8929 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 8930 | stxa %r11, [%r0+0x3c0] %asi |
| 8931 | .word 0x9d92400b ! 199: WRPR_WSTATE_R wrpr %r9, %r11, %wstate |
| 8932 | splash_lsu_8_142: |
| 8933 | nop |
| 8934 | ta T_CHANGE_HPRIV |
| 8935 | set 0x64c0b741, %r2 |
| 8936 | mov 0x5, %r1 |
| 8937 | sllx %r1, 32, %r1 |
| 8938 | or %r1, %r2, %r2 |
| 8939 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 8940 | .word 0x3d400001 ! 200: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 8941 | change_to_randtl_8_143: |
| 8942 | ta T_CHANGE_HPRIV ! macro |
| 8943 | done_change_to_randtl_8_143: |
| 8944 | .word 0x8f902001 ! 201: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 8945 | cmpenall_8_144: |
| 8946 | nop |
| 8947 | nop |
| 8948 | ta T_CHANGE_HPRIV |
| 8949 | rd %asi, %r12 |
| 8950 | wr %r0, 0x41, %asi |
| 8951 | set sync_thr_counter4, %r23 |
| 8952 | #ifndef SPC |
| 8953 | ldxa [%g0]0x63, %r8 |
| 8954 | and %r8, 0x38, %r8 ! Core ID |
| 8955 | add %r8, %r23, %r23 |
| 8956 | mov 0xff, %r9 |
| 8957 | sllx %r9, %r8, %r9 ! My core mask |
| 8958 | #else |
| 8959 | mov 0xff, %r9 ! My core mask |
| 8960 | #endif |
| 8961 | cmpenall_startwait8_144: |
| 8962 | mov 0x8, %r10 |
| 8963 | cas [%r23],%g0,%r10 !lock |
| 8964 | brz,a %r10, continue_cmpenall_8_144 |
| 8965 | nop |
| 8966 | cmpenall_wait8_144: |
| 8967 | ld [%r23], %r10 |
| 8968 | brnz %r10, cmpenall_wait8_144 |
| 8969 | nop |
| 8970 | ba,a cmpenall_startwait8_144 |
| 8971 | continue_cmpenall_8_144: |
| 8972 | ldxa [0x58]%asi, %r14 !Running_status |
| 8973 | wait_for_cmpstat_8_144: |
| 8974 | ldxa [0x50]%asi, %r13 !Running_rw |
| 8975 | cmp %r13, %r14 |
| 8976 | bne,a %xcc, wait_for_cmpstat_8_144 |
| 8977 | ldxa [0x58]%asi, %r14 !Running_status |
| 8978 | ldxa [0x10]%asi, %r14 !Get enabled threads |
| 8979 | and %r14, %r9, %r14 !My core mask |
| 8980 | stxa %r14, [0x60]%asi !W1S |
| 8981 | ldxa [0x58]%asi, %r16 !Running_status |
| 8982 | wait_for_cmpstat2_8_144: |
| 8983 | and %r16, %r9, %r16 !My core mask |
| 8984 | cmp %r14, %r16 |
| 8985 | bne,a %xcc, wait_for_cmpstat2_8_144 |
| 8986 | ldxa [0x58]%asi, %r16 !Running_status |
| 8987 | st %g0, [%r23] !clear lock |
| 8988 | nop |
| 8989 | nop |
| 8990 | ta T_CHANGE_PRIV |
| 8991 | wrpr %g0, %g0, %gl |
| 8992 | nop |
| 8993 | nop |
| 8994 | setx join_lbl_0_0, %g1, %g2 |
| 8995 | jmp %g2 |
| 8996 | nop |
| 8997 | fork_lbl_0_3: |
| 8998 | ta T_CHANGE_NONHPRIV |
| 8999 | mondo_4_0: |
| 9000 | nop |
| 9001 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 9002 | ta T_CHANGE_PRIV |
| 9003 | stxa %r18, [%r0+0x3e8] %asi |
| 9004 | .word 0x9d92c002 ! 1: WRPR_WSTATE_R wrpr %r11, %r2, %wstate |
| 9005 | trapasi_4_1: |
| 9006 | nop |
| 9007 | mov 0x3c8, %r1 ! (VA for ASI 0x25) |
| 9008 | .word 0xd0d844a0 ! 2: LDXA_R ldxa [%r1, %r0] 0x25, %r8 |
| 9009 | splash_cmpr_4_2: |
| 9010 | mov 0, %r18 |
| 9011 | sllx %r18, 63, %r18 |
| 9012 | rd %tick, %r17 |
| 9013 | add %r17, 0x100, %r17 |
| 9014 | or %r17, %r18, %r17 |
| 9015 | ta T_CHANGE_HPRIV |
| 9016 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 9017 | .word 0xaf800011 ! 3: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 9018 | change_to_randtl_4_3: |
| 9019 | ta T_CHANGE_HPRIV ! macro |
| 9020 | done_change_to_randtl_4_3: |
| 9021 | .word 0x8f902002 ! 4: WRPR_TL_I wrpr %r0, 0x0002, %tl |
| 9022 | .word 0xd077c000 ! 5: STX_R stx %r8, [%r31 + %r0] |
| 9023 | splash_cmpr_4_4: |
| 9024 | mov 1, %r18 |
| 9025 | sllx %r18, 63, %r18 |
| 9026 | rd %tick, %r17 |
| 9027 | add %r17, 0x70, %r17 |
| 9028 | or %r17, %r18, %r17 |
| 9029 | ta T_CHANGE_PRIV |
| 9030 | .word 0xaf800011 ! 6: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 9031 | splash_decr_4_5: |
| 9032 | nop |
| 9033 | ta T_CHANGE_HPRIV |
| 9034 | mov 8, %r1 |
| 9035 | stxa %r0, [%r1] 0x45 |
| 9036 | .word 0xa781800c ! 7: WR_GRAPHICS_STATUS_REG_R wr %r6, %r12, %- |
| 9037 | .word 0xd07fe100 ! 8: SWAP_I swap %r8, [%r31 + 0x0100] |
| 9038 | .word 0x9192c013 ! 9: WRPR_PIL_R wrpr %r11, %r19, %pil |
| 9039 | brcommon3_4_7: |
| 9040 | nop |
| 9041 | setx common_target, %r12, %r27 |
| 9042 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 9043 | ba,a .+12 |
| 9044 | .word 0xd1e7c02c ! 1: CASA_I casa [%r31] 0x 1, %r12, %r8 |
| 9045 | ba,a .+8 |
| 9046 | jmpl %r27+0, %r27 |
| 9047 | .word 0xd09fe140 ! 10: LDDA_I ldda [%r31, + 0x0140] %asi, %r8 |
| 9048 | nop |
| 9049 | ta T_CHANGE_HPRIV ! macro |
| 9050 | donret_4_8: |
| 9051 | rd %pc, %r12 |
| 9052 | add %r12, (donretarg_4_8-donret_4_8), %r12 |
| 9053 | add %r12, 0x4, %r11 ! seq tnpc |
| 9054 | wrpr %g0, 0x2, %tl |
| 9055 | wrpr %g0, %r12, %tpc |
| 9056 | wrpr %g0, %r11, %tnpc |
| 9057 | set (0x007c4500 | (0x8b << 24)), %r13 |
| 9058 | and %r12, 0xfff, %r14 |
| 9059 | sllx %r14, 30, %r14 |
| 9060 | or %r13, %r14, %r20 |
| 9061 | wrpr %r20, %g0, %tstate |
| 9062 | wrhpr %g0, 0x89f, %htstate |
| 9063 | ta T_CHANGE_NONPRIV ! rand=0 (4) |
| 9064 | .word 0x3f400001 ! 1: FBPO fbo,a,pn %fcc0, <label_0x1> |
| 9065 | retry |
| 9066 | donretarg_4_8: |
| 9067 | .word 0xd06fe032 ! 11: LDSTUB_I ldstub %r8, [%r31 + 0x0032] |
| 9068 | .word 0xab834007 ! 12: WR_CLEAR_SOFTINT_R wr %r13, %r7, %clear_softint |
| 9069 | dvapa_4_9: |
| 9070 | nop |
| 9071 | ta T_CHANGE_HPRIV |
| 9072 | mov 0xdd7, %r20 |
| 9073 | mov 0x1c, %r19 |
| 9074 | sllx %r20, 23, %r20 |
| 9075 | or %r19, %r20, %r19 |
| 9076 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 9077 | mov 0x38, %r18 |
| 9078 | stxa %r31, [%r18]0x58 |
| 9079 | ta T_CHANGE_NONHPRIV |
| 9080 | .word 0xd0bfc031 ! 13: STDA_R stda %r8, [%r31 + %r17] 0x01 |
| 9081 | .word 0x996cc014 ! 14: SDIVX_R sdivx %r19, %r20, %r12 |
| 9082 | nop |
| 9083 | ta T_CHANGE_HPRIV |
| 9084 | mov 0x4+1, %r10 |
| 9085 | set sync_thr_counter5, %r23 |
| 9086 | #ifndef SPC |
| 9087 | ldxa [%g0]0x63, %o1 |
| 9088 | and %o1, 0x38, %o1 |
| 9089 | add %o1, %r23, %r23 |
| 9090 | sllx %o1, 5, %o3 !(CID*256) |
| 9091 | #endif |
| 9092 | cas [%r23],%g0,%r10 !lock |
| 9093 | brnz %r10, cwq_4_10 |
| 9094 | rd %asi, %r12 |
| 9095 | wr %g0, 0x40, %asi |
| 9096 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 9097 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 9098 | cmp %l1, 1 |
| 9099 | bne cwq_4_10 |
| 9100 | set CWQ_BASE, %l6 |
| 9101 | #ifndef SPC |
| 9102 | add %l6, %o3, %l6 |
| 9103 | #endif |
| 9104 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 9105 | best_set_reg(0x206100e0, %l1, %l2) !# Control Word |
| 9106 | sllx %l2, 32, %l2 |
| 9107 | stx %l2, [%l6 + 0x0] |
| 9108 | membar #Sync |
| 9109 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 9110 | sub %l2, 0x40, %l2 |
| 9111 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 9112 | wr %r12, %g0, %asi |
| 9113 | st %g0, [%r23] |
| 9114 | cwq_4_10: |
| 9115 | ta T_CHANGE_NONHPRIV |
| 9116 | .word 0xa7414000 ! 15: RDPC rd %pc, %r19 |
| 9117 | .word 0xe4800a60 ! 16: LDUWA_R lduwa [%r0, %r0] 0x53, %r18 |
| 9118 | nop |
| 9119 | ta T_CHANGE_HPRIV |
| 9120 | mov 0x4, %r10 |
| 9121 | set sync_thr_counter6, %r23 |
| 9122 | #ifndef SPC |
| 9123 | ldxa [%g0]0x63, %o1 |
| 9124 | and %o1, 0x38, %o1 |
| 9125 | add %o1, %r23, %r23 |
| 9126 | #endif |
| 9127 | cas [%r23],%g0,%r10 !lock |
| 9128 | brnz %r10, sma_4_11 |
| 9129 | rd %asi, %r12 |
| 9130 | wr %g0, 0x40, %asi |
| 9131 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 9132 | set 0x001e1fff, %g1 |
| 9133 | stxa %g1, [%g0 + 0x80] %asi |
| 9134 | wr %r12, %g0, %asi |
| 9135 | st %g0, [%r23] |
| 9136 | sma_4_11: |
| 9137 | ta T_CHANGE_NONHPRIV |
| 9138 | .word 0xe5e7e011 ! 17: CASA_R casa [%r31] %asi, %r17, %r18 |
| 9139 | brcommon1_4_12: |
| 9140 | nop |
| 9141 | setx common_target, %r12, %r27 |
| 9142 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 9143 | ba,a .+12 |
| 9144 | .word 0xc32fe1f0 ! 1: STXFSR_I st-sfr %f1, [0x01f0, %r31] |
| 9145 | ba,a .+8 |
| 9146 | jmpl %r27+0, %r27 |
| 9147 | .word 0x95a449b3 ! 18: FDIVs fdivs %f17, %f19, %f10 |
| 9148 | .word 0x8d903e02 ! 19: WRPR_PSTATE_I wrpr %r0, 0x1e02, %pstate |
| 9149 | #if (defined SPC || defined CMP1) |
| 9150 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_14) + 0, 16, 16)) -> intp(3,0,17) |
| 9151 | #else |
| 9152 | setx 0xa252469fdb393f68, %r1, %r28 |
| 9153 | stxa %r28, [%g0] 0x73 |
| 9154 | #endif |
| 9155 | intvec_4_14: |
| 9156 | .word 0x39400001 ! 20: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 9157 | splash_tba_4_15: |
| 9158 | nop |
| 9159 | ta T_CHANGE_PRIV |
| 9160 | setx 0x0000000400380000, %r11, %r12 |
| 9161 | .word 0x8b90000c ! 21: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 9162 | splash_decr_4_16: |
| 9163 | nop |
| 9164 | ta T_CHANGE_HPRIV |
| 9165 | mov 8, %r1 |
| 9166 | stxa %r0, [%r1] 0x45 |
| 9167 | .word 0xa780c014 ! 22: WR_GRAPHICS_STATUS_REG_R wr %r3, %r20, %- |
| 9168 | intveclr_4_17: |
| 9169 | nop |
| 9170 | ta T_CHANGE_HPRIV |
| 9171 | setx 0x6d789572559bfb81, %r1, %r28 |
| 9172 | stxa %r28, [%g0] 0x72 |
| 9173 | ta T_CHANGE_NONHPRIV |
| 9174 | .word 0x25400001 ! 23: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 9175 | trapasi_4_18: |
| 9176 | nop |
| 9177 | mov 0x8, %r1 ! (VA for ASI 0x4c) |
| 9178 | .word 0xd4c84980 ! 24: LDSBA_R ldsba [%r1, %r0] 0x4c, %r10 |
| 9179 | nop |
| 9180 | mov 0x80, %g3 |
| 9181 | stxa %g3, [%g3] 0x57 |
| 9182 | .word 0xd45fc000 ! 25: LDX_R ldx [%r31 + %r0], %r10 |
| 9183 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 9184 | reduce_priv_lvl_4_19: |
| 9185 | ta T_CHANGE_NONPRIV ! macro |
| 9186 | intveclr_4_20: |
| 9187 | nop |
| 9188 | ta T_CHANGE_HPRIV |
| 9189 | setx 0xbd6834d35bdedf93, %r1, %r28 |
| 9190 | stxa %r28, [%g0] 0x72 |
| 9191 | .word 0x25400001 ! 27: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 9192 | intveclr_4_21: |
| 9193 | nop |
| 9194 | ta T_CHANGE_HPRIV |
| 9195 | setx 0x2dfc56647ad0ae96, %r1, %r28 |
| 9196 | stxa %r28, [%g0] 0x72 |
| 9197 | ta T_CHANGE_NONHPRIV |
| 9198 | .word 0x25400001 ! 28: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 9199 | nop |
| 9200 | mov 0x80, %g3 |
| 9201 | stxa %g3, [%g3] 0x57 |
| 9202 | .word 0xd45fc000 ! 29: LDX_R ldx [%r31 + %r0], %r10 |
| 9203 | brcommon3_4_22: |
| 9204 | nop |
| 9205 | setx common_target, %r12, %r27 |
| 9206 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 9207 | ba,a .+12 |
| 9208 | .word 0xd46fe1a0 ! 1: LDSTUB_I ldstub %r10, [%r31 + 0x01a0] |
| 9209 | ba,a .+8 |
| 9210 | jmpl %r27+0, %r27 |
| 9211 | .word 0xd51fc009 ! 30: LDDF_R ldd [%r31, %r9], %f10 |
| 9212 | nop |
| 9213 | ta T_CHANGE_HPRIV |
| 9214 | mov 0x4+1, %r10 |
| 9215 | set sync_thr_counter5, %r23 |
| 9216 | #ifndef SPC |
| 9217 | ldxa [%g0]0x63, %o1 |
| 9218 | and %o1, 0x38, %o1 |
| 9219 | add %o1, %r23, %r23 |
| 9220 | sllx %o1, 5, %o3 !(CID*256) |
| 9221 | #endif |
| 9222 | cas [%r23],%g0,%r10 !lock |
| 9223 | brnz %r10, cwq_4_23 |
| 9224 | rd %asi, %r12 |
| 9225 | wr %g0, 0x40, %asi |
| 9226 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 9227 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 9228 | cmp %l1, 1 |
| 9229 | bne cwq_4_23 |
| 9230 | set CWQ_BASE, %l6 |
| 9231 | #ifndef SPC |
| 9232 | add %l6, %o3, %l6 |
| 9233 | #endif |
| 9234 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 9235 | best_set_reg(0x20610010, %l1, %l2) !# Control Word |
| 9236 | sllx %l2, 32, %l2 |
| 9237 | stx %l2, [%l6 + 0x0] |
| 9238 | membar #Sync |
| 9239 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 9240 | sub %l2, 0x40, %l2 |
| 9241 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 9242 | wr %r12, %g0, %asi |
| 9243 | st %g0, [%r23] |
| 9244 | cwq_4_23: |
| 9245 | ta T_CHANGE_NONHPRIV |
| 9246 | .word 0xa3414000 ! 31: RDPC rd %pc, %r17 |
| 9247 | .word 0x879c702f ! 32: WRHPR_HINTP_I wrhpr %r17, 0x102f, %hintp |
| 9248 | .word 0xd497e160 ! 33: LDUHA_I lduha [%r31, + 0x0160] %asi, %r10 |
| 9249 | .word 0xd497c02d ! 34: LDUHA_R lduha [%r31, %r13] 0x01, %r10 |
| 9250 | splash_lsu_4_25: |
| 9251 | nop |
| 9252 | ta T_CHANGE_HPRIV |
| 9253 | set 0xdc15ecb3, %r2 |
| 9254 | mov 0x4, %r1 |
| 9255 | sllx %r1, 32, %r1 |
| 9256 | or %r1, %r2, %r2 |
| 9257 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 9258 | ta T_CHANGE_NONHPRIV |
| 9259 | .word 0x3d400001 ! 35: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 9260 | splash_decr_4_26: |
| 9261 | nop |
| 9262 | ta T_CHANGE_HPRIV |
| 9263 | mov 8, %r1 |
| 9264 | stxa %r0, [%r1] 0x45 |
| 9265 | .word 0xa7828012 ! 36: WR_GRAPHICS_STATUS_REG_R wr %r10, %r18, %- |
| 9266 | nop |
| 9267 | ta T_CHANGE_HPRIV ! macro |
| 9268 | donret_4_27: |
| 9269 | rd %pc, %r12 |
| 9270 | add %r12, (donretarg_4_27-donret_4_27), %r12 |
| 9271 | add %r12, 0x4, %r11 ! seq tnpc |
| 9272 | wrpr %g0, 0x2, %tl |
| 9273 | wrpr %g0, %r12, %tpc |
| 9274 | wrpr %g0, %r11, %tnpc |
| 9275 | set (0x00426b00 | (0x8a << 24)), %r13 |
| 9276 | and %r12, 0xfff, %r14 |
| 9277 | sllx %r14, 30, %r14 |
| 9278 | or %r13, %r14, %r20 |
| 9279 | wrpr %r20, %g0, %tstate |
| 9280 | wrhpr %g0, 0x157, %htstate |
| 9281 | ta T_CHANGE_NONHPRIV ! rand=1 (4) |
| 9282 | .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 9283 | done |
| 9284 | donretarg_4_27: |
| 9285 | .word 0x36800001 ! 37: BGE bge,a <label_0x1> |
| 9286 | #if (defined SPC || defined CMP1) |
| 9287 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_28) + 16, 16, 16)) -> intp(1,0,9) |
| 9288 | #else |
| 9289 | setx 0x1c8a08cda6eeee43, %r1, %r28 |
| 9290 | stxa %r28, [%g0] 0x73 |
| 9291 | #endif |
| 9292 | intvec_4_28: |
| 9293 | .word 0x39400001 ! 38: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 9294 | .word 0x91908014 ! 39: WRPR_PIL_R wrpr %r2, %r20, %pil |
| 9295 | nop |
| 9296 | ta T_CHANGE_HPRIV |
| 9297 | mov 0x4, %r10 |
| 9298 | set sync_thr_counter6, %r23 |
| 9299 | #ifndef SPC |
| 9300 | ldxa [%g0]0x63, %o1 |
| 9301 | and %o1, 0x38, %o1 |
| 9302 | add %o1, %r23, %r23 |
| 9303 | #endif |
| 9304 | cas [%r23],%g0,%r10 !lock |
| 9305 | brnz %r10, sma_4_30 |
| 9306 | rd %asi, %r12 |
| 9307 | wr %g0, 0x40, %asi |
| 9308 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 9309 | set 0x00021fff, %g1 |
| 9310 | stxa %g1, [%g0 + 0x80] %asi |
| 9311 | wr %r12, %g0, %asi |
| 9312 | st %g0, [%r23] |
| 9313 | sma_4_30: |
| 9314 | ta T_CHANGE_NONHPRIV |
| 9315 | .word 0xd5e7e014 ! 40: CASA_R casa [%r31] %asi, %r20, %r10 |
| 9316 | .word 0xd497e178 ! 41: LDUHA_I lduha [%r31, + 0x0178] %asi, %r10 |
| 9317 | .word 0x8d802004 ! 42: WRFPRS_I wr %r0, 0x0004, %fprs |
| 9318 | intveclr_4_31: |
| 9319 | nop |
| 9320 | ta T_CHANGE_HPRIV |
| 9321 | setx 0x12b90a46957ad602, %r1, %r28 |
| 9322 | stxa %r28, [%g0] 0x72 |
| 9323 | ta T_CHANGE_NONHPRIV |
| 9324 | .word 0x25400001 ! 43: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 9325 | splash_decr_4_32: |
| 9326 | nop |
| 9327 | ta T_CHANGE_HPRIV |
| 9328 | mov 8, %r1 |
| 9329 | stxa %r0, [%r1] 0x45 |
| 9330 | .word 0xa7844011 ! 44: WR_GRAPHICS_STATUS_REG_R wr %r17, %r17, %- |
| 9331 | .word 0x8143e011 ! 45: MEMBAR membar #LoadLoad | #Lookaside |
| 9332 | fpinit_4_34: |
| 9333 | nop |
| 9334 | setx fp_data_quads, %r19, %r20 |
| 9335 | ldd [%r20], %f0 |
| 9336 | ldd [%r20+8], %f4 |
| 9337 | ld [%r20+16], %fsr |
| 9338 | ld [%r20+24], %r19 |
| 9339 | wr %r19, %g0, %gsr |
| 9340 | .word 0x89b00484 ! 46: FCMPLE32 fcmple32 %d0, %d4, %r4 |
| 9341 | invtsb_4_35: |
| 9342 | nop |
| 9343 | ta T_CHANGE_HPRIV |
| 9344 | rd %asi, %r21 |
| 9345 | wr %r0,ASI_MMU_REAL_RANGE, %asi |
| 9346 | mov 1, %r20 |
| 9347 | sllx %r20, 63, %r20 |
| 9348 | ldxa [ASI_MMU_REAL_RANGE_0] %asi, %r22 |
| 9349 | xor %r22 ,%r20, %r22 |
| 9350 | stxa %r22, [ASI_MMU_REAL_RANGE_0] %asi |
| 9351 | ldxa [ASI_MMU_REAL_RANGE_1] %asi, %r22 |
| 9352 | xor %r22 ,%r20, %r22 |
| 9353 | stxa %r22, [ASI_MMU_REAL_RANGE_1] %asi |
| 9354 | ldxa [ASI_MMU_REAL_RANGE_2] %asi, %r22 |
| 9355 | xor %r22 ,%r20, %r22 |
| 9356 | stxa %r22, [ASI_MMU_REAL_RANGE_2] %asi |
| 9357 | ldxa [ASI_MMU_REAL_RANGE_3] %asi, %r22 |
| 9358 | xor %r22 ,%r20, %r22 |
| 9359 | stxa %r22, [ASI_MMU_REAL_RANGE_3] %asi |
| 9360 | wr %r21, %r0, %asi |
| 9361 | ta T_CHANGE_NONHPRIV |
| 9362 | .word 0x29800001 ! 47: FBL fbl,a <label_0x1> |
| 9363 | splash_hpstate_4_36: |
| 9364 | .word 0x35400001 ! 1: FBPUE fbue,a,pn %fcc0, <label_0x1> |
| 9365 | .word 0x81982cb7 ! 48: WRHPR_HPSTATE_I wrhpr %r0, 0x0cb7, %hpstate |
| 9366 | nop |
| 9367 | ta T_CHANGE_HPRIV |
| 9368 | mov 0x4+1, %r10 |
| 9369 | set sync_thr_counter5, %r23 |
| 9370 | #ifndef SPC |
| 9371 | ldxa [%g0]0x63, %o1 |
| 9372 | and %o1, 0x38, %o1 |
| 9373 | add %o1, %r23, %r23 |
| 9374 | sllx %o1, 5, %o3 !(CID*256) |
| 9375 | #endif |
| 9376 | cas [%r23],%g0,%r10 !lock |
| 9377 | brnz %r10, cwq_4_37 |
| 9378 | rd %asi, %r12 |
| 9379 | wr %g0, 0x40, %asi |
| 9380 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 9381 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 9382 | cmp %l1, 1 |
| 9383 | bne cwq_4_37 |
| 9384 | set CWQ_BASE, %l6 |
| 9385 | #ifndef SPC |
| 9386 | add %l6, %o3, %l6 |
| 9387 | #endif |
| 9388 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 9389 | best_set_reg(0x20610010, %l1, %l2) !# Control Word |
| 9390 | sllx %l2, 32, %l2 |
| 9391 | stx %l2, [%l6 + 0x0] |
| 9392 | membar #Sync |
| 9393 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 9394 | sub %l2, 0x40, %l2 |
| 9395 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 9396 | wr %r12, %g0, %asi |
| 9397 | st %g0, [%r23] |
| 9398 | cwq_4_37: |
| 9399 | ta T_CHANGE_NONHPRIV |
| 9400 | .word 0x95414000 ! 49: RDPC rd %pc, %r10 |
| 9401 | splash_hpstate_4_38: |
| 9402 | ta T_CHANGE_NONHPRIV |
| 9403 | .word 0x81982d5e ! 50: WRHPR_HPSTATE_I wrhpr %r0, 0x0d5e, %hpstate |
| 9404 | .word 0xc30fc000 ! 51: LDXFSR_R ld-fsr [%r31, %r0], %f1 |
| 9405 | invalw |
| 9406 | mov 0xb1, %r30 |
| 9407 | .word 0x91d0001e ! 52: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 9408 | splash_cmpr_4_40: |
| 9409 | mov 0, %r18 |
| 9410 | sllx %r18, 63, %r18 |
| 9411 | rd %tick, %r17 |
| 9412 | add %r17, 0x100, %r17 |
| 9413 | or %r17, %r18, %r17 |
| 9414 | .word 0xb3800011 ! 53: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 9415 | setx 0xea6365cef7f86888, %r1, %r28 |
| 9416 | stxa %r28, [%g0] 0x73 |
| 9417 | intvec_4_41: |
| 9418 | .word 0x39400001 ! 54: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 9419 | trapasi_4_42: |
| 9420 | nop |
| 9421 | mov 0x0, %r1 ! (VA for ASI 0x73) |
| 9422 | .word 0xe4904e60 ! 55: LDUHA_R lduha [%r1, %r0] 0x73, %r18 |
| 9423 | memptr_4_43: |
| 9424 | set 0x60340000, %r31 |
| 9425 | .word 0x8580657d ! 56: WRCCR_I wr %r1, 0x057d, %ccr |
| 9426 | memptr_4_44: |
| 9427 | set 0x60740000, %r31 |
| 9428 | .word 0x8584ffe6 ! 57: WRCCR_I wr %r19, 0x1fe6, %ccr |
| 9429 | .word 0x95a48d23 ! 58: FsMULd fsmuld %f18, %f34, %f10 |
| 9430 | nop |
| 9431 | ta T_CHANGE_HPRIV ! macro |
| 9432 | donret_4_45: |
| 9433 | rd %pc, %r12 |
| 9434 | add %r12, (donretarg_4_45-donret_4_45+4), %r12 |
| 9435 | add %r12, 0x4, %r11 ! seq tnpc |
| 9436 | wrpr %g0, 0x2, %tl |
| 9437 | wrpr %g0, %r12, %tpc |
| 9438 | wrpr %g0, %r11, %tnpc |
| 9439 | set (0x00c64800 | (22 << 24)), %r13 |
| 9440 | and %r12, 0xfff, %r14 |
| 9441 | sllx %r14, 30, %r14 |
| 9442 | or %r13, %r14, %r20 |
| 9443 | wrpr %r20, %g0, %tstate |
| 9444 | wrhpr %g0, 0x1e49, %htstate |
| 9445 | ta T_CHANGE_NONHPRIV ! rand=1 (4) |
| 9446 | done |
| 9447 | donretarg_4_45: |
| 9448 | .word 0xd4ffe0c0 ! 59: SWAPA_I swapa %r10, [%r31 + 0x00c0] %asi |
| 9449 | .word 0xa1702e10 ! 60: POPC_I popc 0x0e10, %r16 |
| 9450 | splash_tba_4_47: |
| 9451 | nop |
| 9452 | ta T_CHANGE_PRIV |
| 9453 | setx 0x0000000400380000, %r11, %r12 |
| 9454 | .word 0x8b90000c ! 61: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 9455 | ibp_4_48: |
| 9456 | nop |
| 9457 | ta T_CHANGE_HPRIV |
| 9458 | mov 8, %r18 |
| 9459 | rd %asi, %r12 |
| 9460 | wr %r0, 0x41, %asi |
| 9461 | set sync_thr_counter4, %r23 |
| 9462 | #ifndef SPC |
| 9463 | ldxa [%g0]0x63, %r8 |
| 9464 | and %r8, 0x38, %r8 ! Core ID |
| 9465 | add %r8, %r23, %r23 |
| 9466 | #else |
| 9467 | mov 0, %r8 |
| 9468 | #endif |
| 9469 | mov 0x4, %r16 |
| 9470 | ibp_startwait4_48: |
| 9471 | cas [%r23],%g0,%r16 !lock |
| 9472 | brz,a %r16, continue_ibp_4_48 |
| 9473 | mov (~0x4&0xf), %r16 |
| 9474 | ld [%r23], %r16 |
| 9475 | ibp_wait4_48: |
| 9476 | brnz %r16, ibp_wait4_48 |
| 9477 | ld [%r23], %r16 |
| 9478 | ba ibp_startwait4_48 |
| 9479 | mov 0x4, %r16 |
| 9480 | continue_ibp_4_48: |
| 9481 | sllx %r16, %r8, %r16 !Mask for my core only |
| 9482 | ldxa [0x58]%asi, %r17 !Running_status |
| 9483 | wait_for_stat_4_48: |
| 9484 | ldxa [0x50]%asi, %r13 !Running_rw |
| 9485 | cmp %r13, %r17 |
| 9486 | bne,a %xcc, wait_for_stat_4_48 |
| 9487 | ldxa [0x58]%asi, %r17 !Running_status |
| 9488 | stxa %r16, [0x68]%asi !Park (W1C) |
| 9489 | ldxa [0x50]%asi, %r14 !Running_rw |
| 9490 | wait_for_ibp_4_48: |
| 9491 | ldxa [0x58]%asi, %r17 !Running_status |
| 9492 | cmp %r14, %r17 |
| 9493 | bne,a %xcc, wait_for_ibp_4_48 |
| 9494 | ldxa [0x50]%asi, %r14 !Running_rw |
| 9495 | ibp_doit4_48: |
| 9496 | best_set_reg(0x00000040e3c00a1f,%r19, %r20) |
| 9497 | stxa %r20, [%r18]0x42 |
| 9498 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 9499 | st %g0, [%r23] !clear lock |
| 9500 | wr %r0, %r12, %asi !restore %asi |
| 9501 | ta T_CHANGE_NONHPRIV |
| 9502 | .word 0xa5a409b1 ! 62: FDIVs fdivs %f16, %f17, %f18 |
| 9503 | .word 0x95450000 ! 63: RD_SET_SOFTINT rd %set_softint, %r10 |
| 9504 | .word 0xd677c000 ! 64: STX_R stx %r11, [%r31 + %r0] |
| 9505 | .word 0xd71fe048 ! 65: LDDF_I ldd [%r31, 0x0048], %f11 |
| 9506 | memptr_4_49: |
| 9507 | set 0x60740000, %r31 |
| 9508 | .word 0x85843837 ! 66: WRCCR_I wr %r16, 0x1837, %ccr |
| 9509 | .word 0x81b01021 ! 67: SIAM siam 1 |
| 9510 | .word 0x93b447d4 ! 68: PDIST pdistn %d48, %d20, %d40 |
| 9511 | .word 0xdb1fe0e0 ! 69: LDDF_I ldd [%r31, 0x00e0], %f13 |
| 9512 | .word 0x36780001 ! 70: BPGE <illegal instruction> |
| 9513 | dvapa_4_51: |
| 9514 | nop |
| 9515 | ta T_CHANGE_HPRIV |
| 9516 | mov 0xb6e, %r20 |
| 9517 | mov 0x18, %r19 |
| 9518 | sllx %r20, 23, %r20 |
| 9519 | or %r19, %r20, %r19 |
| 9520 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 9521 | mov 0x38, %r18 |
| 9522 | stxa %r31, [%r18]0x58 |
| 9523 | ta T_CHANGE_NONHPRIV |
| 9524 | .word 0xa1b24491 ! 71: FCMPLE32 fcmple32 %d40, %d48, %r16 |
| 9525 | splash_cmpr_4_52: |
| 9526 | mov 0, %r18 |
| 9527 | sllx %r18, 63, %r18 |
| 9528 | rd %tick, %r17 |
| 9529 | add %r17, 0x50, %r17 |
| 9530 | or %r17, %r18, %r17 |
| 9531 | ta T_CHANGE_HPRIV |
| 9532 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 9533 | ta T_CHANGE_PRIV |
| 9534 | .word 0xb3800011 ! 72: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 9535 | intveclr_4_53: |
| 9536 | nop |
| 9537 | ta T_CHANGE_HPRIV |
| 9538 | setx 0x8f44a743f2243170, %r1, %r28 |
| 9539 | stxa %r28, [%g0] 0x72 |
| 9540 | ta T_CHANGE_NONHPRIV |
| 9541 | .word 0x25400001 ! 73: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 9542 | jmptr_4_54: |
| 9543 | nop |
| 9544 | best_set_reg(0xe0200000, %r20, %r27) |
| 9545 | .word 0xb7c6c000 ! 74: JMPL_R jmpl %r27 + %r0, %r27 |
| 9546 | mondo_4_55: |
| 9547 | nop |
| 9548 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 9549 | ta T_CHANGE_PRIV |
| 9550 | stxa %r10, [%r0+0x3c0] %asi |
| 9551 | .word 0x9d92c014 ! 75: WRPR_WSTATE_R wrpr %r11, %r20, %wstate |
| 9552 | #if (defined SPC || defined CMP1) |
| 9553 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_56) + 0, 16, 16)) -> intp(5,0,16) |
| 9554 | #else |
| 9555 | setx 0xd4a372d9ec0c4dc1, %r1, %r28 |
| 9556 | stxa %r28, [%g0] 0x73 |
| 9557 | #endif |
| 9558 | intvec_4_56: |
| 9559 | .word 0x39400001 ! 76: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 9560 | .word 0x89800011 ! 77: WRTICK_R wr %r0, %r17, %tick |
| 9561 | splash_lsu_4_58: |
| 9562 | nop |
| 9563 | ta T_CHANGE_HPRIV |
| 9564 | set 0x2e2a2731, %r2 |
| 9565 | mov 0x2, %r1 |
| 9566 | sllx %r1, 32, %r1 |
| 9567 | or %r1, %r2, %r2 |
| 9568 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 9569 | .word 0x3d400001 ! 78: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 9570 | splash_tba_4_59: |
| 9571 | nop |
| 9572 | ta T_CHANGE_PRIV |
| 9573 | setx 0x0000000400380000, %r11, %r12 |
| 9574 | .word 0x8b90000c ! 79: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 9575 | .word 0x87802020 ! 80: WRASI_I wr %r0, 0x0020, %asi |
| 9576 | .word 0xd45fe1b8 ! 81: LDX_I ldx [%r31 + 0x01b8], %r10 |
| 9577 | br_badelay1_4_60: |
| 9578 | .word 0xd43fc014 ! 1: STD_R std %r10, [%r31 + %r20] |
| 9579 | .word 0xe9334010 ! 1: STQF_R - %f20, [%r16, %r13] |
| 9580 | .word 0xc36fe160 ! 1: PREFETCH_I prefetch [%r31 + 0x0160], #one_read |
| 9581 | normalw |
| 9582 | .word 0x97458000 ! 82: RD_SOFTINT_REG rd %softint, %r11 |
| 9583 | mondo_4_61: |
| 9584 | nop |
| 9585 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 9586 | stxa %r17, [%r0+0x3d8] %asi |
| 9587 | .word 0x9d924013 ! 83: WRPR_WSTATE_R wrpr %r9, %r19, %wstate |
| 9588 | nop |
| 9589 | mov 0x80, %g3 |
| 9590 | stxa %g3, [%g3] 0x57 |
| 9591 | .word 0xe45fc000 ! 84: LDX_R ldx [%r31 + %r0], %r18 |
| 9592 | nop |
| 9593 | ta T_CHANGE_HPRIV |
| 9594 | mov 0x4+1, %r10 |
| 9595 | set sync_thr_counter5, %r23 |
| 9596 | #ifndef SPC |
| 9597 | ldxa [%g0]0x63, %o1 |
| 9598 | and %o1, 0x38, %o1 |
| 9599 | add %o1, %r23, %r23 |
| 9600 | sllx %o1, 5, %o3 !(CID*256) |
| 9601 | #endif |
| 9602 | cas [%r23],%g0,%r10 !lock |
| 9603 | brnz %r10, cwq_4_62 |
| 9604 | rd %asi, %r12 |
| 9605 | wr %g0, 0x40, %asi |
| 9606 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 9607 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 9608 | cmp %l1, 1 |
| 9609 | bne cwq_4_62 |
| 9610 | set CWQ_BASE, %l6 |
| 9611 | #ifndef SPC |
| 9612 | add %l6, %o3, %l6 |
| 9613 | #endif |
| 9614 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 9615 | best_set_reg(0x206100f0, %l1, %l2) !# Control Word |
| 9616 | sllx %l2, 32, %l2 |
| 9617 | stx %l2, [%l6 + 0x0] |
| 9618 | membar #Sync |
| 9619 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 9620 | sub %l2, 0x40, %l2 |
| 9621 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 9622 | wr %r12, %g0, %asi |
| 9623 | st %g0, [%r23] |
| 9624 | cwq_4_62: |
| 9625 | ta T_CHANGE_NONHPRIV |
| 9626 | .word 0xa9414000 ! 85: RDPC rd %pc, %r20 |
| 9627 | pmu_4_63: |
| 9628 | nop |
| 9629 | setx 0xfffffdf9fffff369, %g1, %g7 |
| 9630 | .word 0xa3800007 ! 86: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 9631 | splash_tba_4_64: |
| 9632 | nop |
| 9633 | ta T_CHANGE_PRIV |
| 9634 | set 0x120000, %r12 |
| 9635 | .word 0x8b90000c ! 87: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 9636 | splash_cmpr_4_65: |
| 9637 | mov 1, %r18 |
| 9638 | sllx %r18, 63, %r18 |
| 9639 | rd %tick, %r17 |
| 9640 | add %r17, 0x70, %r17 |
| 9641 | or %r17, %r18, %r17 |
| 9642 | ta T_CHANGE_PRIV |
| 9643 | .word 0xb3800011 ! 88: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 9644 | splash_lsu_4_66: |
| 9645 | nop |
| 9646 | ta T_CHANGE_HPRIV |
| 9647 | set 0xd49902f1, %r2 |
| 9648 | mov 0x5, %r1 |
| 9649 | sllx %r1, 32, %r1 |
| 9650 | or %r1, %r2, %r2 |
| 9651 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 9652 | ta T_CHANGE_NONHPRIV |
| 9653 | .word 0x3d400001 ! 89: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 9654 | .word 0xc30fc000 ! 90: LDXFSR_R ld-fsr [%r31, %r0], %f1 |
| 9655 | nop |
| 9656 | ta T_CHANGE_HPRIV |
| 9657 | mov 0x4+1, %r10 |
| 9658 | set sync_thr_counter5, %r23 |
| 9659 | #ifndef SPC |
| 9660 | ldxa [%g0]0x63, %o1 |
| 9661 | and %o1, 0x38, %o1 |
| 9662 | add %o1, %r23, %r23 |
| 9663 | sllx %o1, 5, %o3 !(CID*256) |
| 9664 | #endif |
| 9665 | cas [%r23],%g0,%r10 !lock |
| 9666 | brnz %r10, cwq_4_67 |
| 9667 | rd %asi, %r12 |
| 9668 | wr %g0, 0x40, %asi |
| 9669 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 9670 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 9671 | cmp %l1, 1 |
| 9672 | bne cwq_4_67 |
| 9673 | set CWQ_BASE, %l6 |
| 9674 | #ifndef SPC |
| 9675 | add %l6, %o3, %l6 |
| 9676 | #endif |
| 9677 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 9678 | best_set_reg(0x20610000, %l1, %l2) !# Control Word |
| 9679 | sllx %l2, 32, %l2 |
| 9680 | stx %l2, [%l6 + 0x0] |
| 9681 | membar #Sync |
| 9682 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 9683 | sub %l2, 0x40, %l2 |
| 9684 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 9685 | wr %r12, %g0, %asi |
| 9686 | st %g0, [%r23] |
| 9687 | cwq_4_67: |
| 9688 | ta T_CHANGE_NONHPRIV |
| 9689 | .word 0x91414000 ! 91: RDPC rd %pc, %r8 |
| 9690 | .word 0xd827e1ac ! 92: STW_I stw %r12, [%r31 + 0x01ac] |
| 9691 | splash_tba_4_68: |
| 9692 | nop |
| 9693 | ta T_CHANGE_PRIV |
| 9694 | set 0x120000, %r12 |
| 9695 | .word 0x8b90000c ! 93: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 9696 | setx 0x8fb7eeadd65bb919, %r1, %r28 |
| 9697 | stxa %r28, [%g0] 0x73 |
| 9698 | intvec_4_69: |
| 9699 | .word 0x39400001 ! 94: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 9700 | nop |
| 9701 | mov 0x80, %g3 |
| 9702 | stxa %g3, [%g3] 0x5f |
| 9703 | .word 0xd85fc000 ! 95: LDX_R ldx [%r31 + %r0], %r12 |
| 9704 | .word 0x8d802000 ! 96: WRFPRS_I wr %r0, 0x0000, %fprs |
| 9705 | .word 0xc32fc013 ! 97: STXFSR_R st-sfr %f1, [%r19, %r31] |
| 9706 | splash_cmpr_4_71: |
| 9707 | mov 1, %r18 |
| 9708 | sllx %r18, 63, %r18 |
| 9709 | rd %tick, %r17 |
| 9710 | add %r17, 0x100, %r17 |
| 9711 | or %r17, %r18, %r17 |
| 9712 | ta T_CHANGE_HPRIV |
| 9713 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 9714 | ta T_CHANGE_PRIV |
| 9715 | .word 0xaf800011 ! 98: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 9716 | nop |
| 9717 | mov 0x80, %g3 |
| 9718 | stxa %g3, [%g3] 0x57 |
| 9719 | .word 0xd85fc000 ! 99: LDX_R ldx [%r31 + %r0], %r12 |
| 9720 | ceter_4_72: |
| 9721 | nop |
| 9722 | ta T_CHANGE_HPRIV |
| 9723 | mov 7, %r17 |
| 9724 | sllx %r17, 60, %r17 |
| 9725 | mov 0x18, %r16 |
| 9726 | stxa %r17, [%r16]0x4c |
| 9727 | ta T_CHANGE_NONHPRIV |
| 9728 | .word 0xa1410000 ! 100: RDTICK rd %tick, %r16 |
| 9729 | .word 0x37400001 ! 1: FBPGE fbge,a,pn %fcc0, <label_0x1> |
| 9730 | .word 0x8d9033e9 ! 101: WRPR_PSTATE_I wrpr %r0, 0x13e9, %pstate |
| 9731 | intveclr_4_74: |
| 9732 | nop |
| 9733 | ta T_CHANGE_HPRIV |
| 9734 | setx 0x7003c9ee6ff142ee, %r1, %r28 |
| 9735 | stxa %r28, [%g0] 0x72 |
| 9736 | ta T_CHANGE_NONHPRIV |
| 9737 | .word 0x25400001 ! 102: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 9738 | fpinit_4_75: |
| 9739 | nop |
| 9740 | setx fp_data_quads, %r19, %r20 |
| 9741 | ldd [%r20], %f0 |
| 9742 | ldd [%r20+8], %f4 |
| 9743 | ld [%r20+16], %fsr |
| 9744 | ld [%r20+24], %r19 |
| 9745 | wr %r19, %g0, %gsr |
| 9746 | .word 0xc3e831a8 ! 103: PREFETCHA_I prefetcha [%r0, + 0xfffff1a8] %asi, #one_read |
| 9747 | jmptr_4_76: |
| 9748 | nop |
| 9749 | best_set_reg(0xe0200000, %r20, %r27) |
| 9750 | .word 0xb7c6c000 ! 104: JMPL_R jmpl %r27 + %r0, %r27 |
| 9751 | jmptr_4_77: |
| 9752 | nop |
| 9753 | best_set_reg(0xe0200000, %r20, %r27) |
| 9754 | .word 0xb7c6c000 ! 105: JMPL_R jmpl %r27 + %r0, %r27 |
| 9755 | nop |
| 9756 | ta T_CHANGE_HPRIV |
| 9757 | mov 0x4, %r10 |
| 9758 | set sync_thr_counter6, %r23 |
| 9759 | #ifndef SPC |
| 9760 | ldxa [%g0]0x63, %o1 |
| 9761 | and %o1, 0x38, %o1 |
| 9762 | add %o1, %r23, %r23 |
| 9763 | #endif |
| 9764 | cas [%r23],%g0,%r10 !lock |
| 9765 | brnz %r10, sma_4_78 |
| 9766 | rd %asi, %r12 |
| 9767 | wr %g0, 0x40, %asi |
| 9768 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 9769 | set 0x00021fff, %g1 |
| 9770 | stxa %g1, [%g0 + 0x80] %asi |
| 9771 | wr %r12, %g0, %asi |
| 9772 | st %g0, [%r23] |
| 9773 | sma_4_78: |
| 9774 | ta T_CHANGE_NONHPRIV |
| 9775 | .word 0xe9e7e00a ! 106: CASA_R casa [%r31] %asi, %r10, %r20 |
| 9776 | nop |
| 9777 | ta T_CHANGE_HPRIV |
| 9778 | mov 0x4, %r10 |
| 9779 | set sync_thr_counter6, %r23 |
| 9780 | #ifndef SPC |
| 9781 | ldxa [%g0]0x63, %o1 |
| 9782 | and %o1, 0x38, %o1 |
| 9783 | add %o1, %r23, %r23 |
| 9784 | #endif |
| 9785 | cas [%r23],%g0,%r10 !lock |
| 9786 | brnz %r10, sma_4_79 |
| 9787 | rd %asi, %r12 |
| 9788 | wr %g0, 0x40, %asi |
| 9789 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 9790 | set 0x00061fff, %g1 |
| 9791 | stxa %g1, [%g0 + 0x80] %asi |
| 9792 | wr %r12, %g0, %asi |
| 9793 | st %g0, [%r23] |
| 9794 | sma_4_79: |
| 9795 | ta T_CHANGE_NONHPRIV |
| 9796 | .word 0xe9e7e008 ! 107: CASA_R casa [%r31] %asi, %r8, %r20 |
| 9797 | splash_cmpr_4_80: |
| 9798 | mov 0, %r18 |
| 9799 | sllx %r18, 63, %r18 |
| 9800 | rd %tick, %r17 |
| 9801 | add %r17, 0x60, %r17 |
| 9802 | or %r17, %r18, %r17 |
| 9803 | ta T_CHANGE_HPRIV |
| 9804 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 9805 | .word 0xaf800011 ! 108: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 9806 | ibp_4_81: |
| 9807 | nop |
| 9808 | ta T_CHANGE_HPRIV |
| 9809 | mov 8, %r18 |
| 9810 | rd %asi, %r12 |
| 9811 | wr %r0, 0x41, %asi |
| 9812 | set sync_thr_counter4, %r23 |
| 9813 | #ifndef SPC |
| 9814 | ldxa [%g0]0x63, %r8 |
| 9815 | and %r8, 0x38, %r8 ! Core ID |
| 9816 | add %r8, %r23, %r23 |
| 9817 | #else |
| 9818 | mov 0, %r8 |
| 9819 | #endif |
| 9820 | mov 0x4, %r16 |
| 9821 | ibp_startwait4_81: |
| 9822 | cas [%r23],%g0,%r16 !lock |
| 9823 | brz,a %r16, continue_ibp_4_81 |
| 9824 | mov (~0x4&0xf), %r16 |
| 9825 | ld [%r23], %r16 |
| 9826 | ibp_wait4_81: |
| 9827 | brnz %r16, ibp_wait4_81 |
| 9828 | ld [%r23], %r16 |
| 9829 | ba ibp_startwait4_81 |
| 9830 | mov 0x4, %r16 |
| 9831 | continue_ibp_4_81: |
| 9832 | sllx %r16, %r8, %r16 !Mask for my core only |
| 9833 | ldxa [0x58]%asi, %r17 !Running_status |
| 9834 | wait_for_stat_4_81: |
| 9835 | ldxa [0x50]%asi, %r13 !Running_rw |
| 9836 | cmp %r13, %r17 |
| 9837 | bne,a %xcc, wait_for_stat_4_81 |
| 9838 | ldxa [0x58]%asi, %r17 !Running_status |
| 9839 | stxa %r16, [0x68]%asi !Park (W1C) |
| 9840 | ldxa [0x50]%asi, %r14 !Running_rw |
| 9841 | wait_for_ibp_4_81: |
| 9842 | ldxa [0x58]%asi, %r17 !Running_status |
| 9843 | cmp %r14, %r17 |
| 9844 | bne,a %xcc, wait_for_ibp_4_81 |
| 9845 | ldxa [0x50]%asi, %r14 !Running_rw |
| 9846 | ibp_doit4_81: |
| 9847 | best_set_reg(0x0000004026ca1f36,%r19, %r20) |
| 9848 | stxa %r20, [%r18]0x42 |
| 9849 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 9850 | st %g0, [%r23] !clear lock |
| 9851 | wr %r0, %r12, %asi !restore %asi |
| 9852 | .word 0xc19fe120 ! 109: LDDFA_I ldda [%r31, 0x0120], %f0 |
| 9853 | .word 0xe88008a0 ! 110: LDUWA_R lduwa [%r0, %r0] 0x45, %r20 |
| 9854 | .word 0x87aa8ad0 ! 111: FCMPEd fcmped %fcc<n>, %f10, %f16 |
| 9855 | nop |
| 9856 | ta T_CHANGE_HPRIV |
| 9857 | mov 0x4+1, %r10 |
| 9858 | set sync_thr_counter5, %r23 |
| 9859 | #ifndef SPC |
| 9860 | ldxa [%g0]0x63, %o1 |
| 9861 | and %o1, 0x38, %o1 |
| 9862 | add %o1, %r23, %r23 |
| 9863 | sllx %o1, 5, %o3 !(CID*256) |
| 9864 | #endif |
| 9865 | cas [%r23],%g0,%r10 !lock |
| 9866 | brnz %r10, cwq_4_82 |
| 9867 | rd %asi, %r12 |
| 9868 | wr %g0, 0x40, %asi |
| 9869 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 9870 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 9871 | cmp %l1, 1 |
| 9872 | bne cwq_4_82 |
| 9873 | set CWQ_BASE, %l6 |
| 9874 | #ifndef SPC |
| 9875 | add %l6, %o3, %l6 |
| 9876 | #endif |
| 9877 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 9878 | best_set_reg(0x206100a0, %l1, %l2) !# Control Word |
| 9879 | sllx %l2, 32, %l2 |
| 9880 | stx %l2, [%l6 + 0x0] |
| 9881 | membar #Sync |
| 9882 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 9883 | sub %l2, 0x40, %l2 |
| 9884 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 9885 | wr %r12, %g0, %asi |
| 9886 | st %g0, [%r23] |
| 9887 | cwq_4_82: |
| 9888 | ta T_CHANGE_NONHPRIV |
| 9889 | .word 0x9b414000 ! 112: RDPC rd %pc, %r13 |
| 9890 | cwp_4_83: |
| 9891 | set user_data_start, %o7 |
| 9892 | .word 0x93902000 ! 113: WRPR_CWP_I wrpr %r0, 0x0000, %cwp |
| 9893 | .word 0x94da4012 ! 114: SMULcc_R smulcc %r9, %r18, %r10 |
| 9894 | .word 0x8d802004 ! 115: WRFPRS_I wr %r0, 0x0004, %fprs |
| 9895 | trapasi_4_84: |
| 9896 | nop |
| 9897 | mov 0x3e0, %r1 ! (VA for ASI 0x25) |
| 9898 | .word 0xe4c844a0 ! 116: LDSBA_R ldsba [%r1, %r0] 0x25, %r18 |
| 9899 | .word 0x8d802000 ! 117: WRFPRS_I wr %r0, 0x0000, %fprs |
| 9900 | trapasi_4_85: |
| 9901 | nop |
| 9902 | mov 0x3e0, %r1 ! (VA for ASI 0x25) |
| 9903 | .word 0xe4d844a0 ! 118: LDXA_R ldxa [%r1, %r0] 0x25, %r18 |
| 9904 | .word 0xa953c000 ! 119: RDPR_FQ <illegal instruction> |
| 9905 | splash_hpstate_4_86: |
| 9906 | .word 0x25400001 ! 1: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 9907 | .word 0x819827d5 ! 120: WRHPR_HPSTATE_I wrhpr %r0, 0x07d5, %hpstate |
| 9908 | intveclr_4_87: |
| 9909 | nop |
| 9910 | ta T_CHANGE_HPRIV |
| 9911 | setx 0x65009caae4ff9a29, %r1, %r28 |
| 9912 | stxa %r28, [%g0] 0x72 |
| 9913 | .word 0x25400001 ! 121: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 9914 | .word 0xe937e09c ! 122: STQF_I - %f20, [0x009c, %r31] |
| 9915 | .word 0x94c52afb ! 123: ADDCcc_I addccc %r20, 0x0afb, %r10 |
| 9916 | #if (defined SPC || defined CMP1) |
| 9917 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_88) + 16, 16, 16)) -> intp(2,0,13) |
| 9918 | #else |
| 9919 | setx 0x88c758faecb5d816, %r1, %r28 |
| 9920 | stxa %r28, [%g0] 0x73 |
| 9921 | #endif |
| 9922 | intvec_4_88: |
| 9923 | .word 0x39400001 ! 124: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 9924 | trapasi_4_89: |
| 9925 | nop |
| 9926 | mov 0x0, %r1 ! (VA for ASI 0x73) |
| 9927 | .word 0xe8c84e60 ! 125: LDSBA_R ldsba [%r1, %r0] 0x73, %r20 |
| 9928 | trapasi_4_90: |
| 9929 | nop |
| 9930 | mov 0x3f0, %r1 ! (VA for ASI 0x25) |
| 9931 | .word 0xe88844a0 ! 126: LDUBA_R lduba [%r1, %r0] 0x25, %r20 |
| 9932 | .word 0xc36d2790 ! 127: PREFETCH_I prefetch [%r20 + 0x0790], #one_read |
| 9933 | intveclr_4_92: |
| 9934 | nop |
| 9935 | ta T_CHANGE_HPRIV |
| 9936 | setx 0x0f751dd29753ae60, %r1, %r28 |
| 9937 | stxa %r28, [%g0] 0x72 |
| 9938 | ta T_CHANGE_NONHPRIV |
| 9939 | .word 0x25400001 ! 128: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 9940 | trapasi_4_93: |
| 9941 | nop |
| 9942 | mov 0x18, %r1 ! (VA for ASI 0x50) |
| 9943 | .word 0xd0d84a00 ! 129: LDXA_R ldxa [%r1, %r0] 0x50, %r8 |
| 9944 | .word 0x89800011 ! 130: WRTICK_R wr %r0, %r17, %tick |
| 9945 | .word 0xe19fdf20 ! 131: LDDFA_R ldda [%r31, %r0], %f16 |
| 9946 | .word 0x89800011 ! 132: WRTICK_R wr %r0, %r17, %tick |
| 9947 | .word 0xd197e0e0 ! 133: LDQFA_I - [%r31, 0x00e0], %f8 |
| 9948 | dvapa_4_96: |
| 9949 | nop |
| 9950 | ta T_CHANGE_HPRIV |
| 9951 | mov 0x8a1, %r20 |
| 9952 | mov 0x2, %r19 |
| 9953 | sllx %r20, 23, %r20 |
| 9954 | or %r19, %r20, %r19 |
| 9955 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 9956 | mov 0x38, %r18 |
| 9957 | stxa %r31, [%r18]0x58 |
| 9958 | ta T_CHANGE_NONHPRIV |
| 9959 | .word 0x87ad0a41 ! 134: FCMPd fcmpd %fcc<n>, %f20, %f32 |
| 9960 | .word 0xd13fc000 ! 135: STDF_R std %f8, [%r0, %r31] |
| 9961 | otherw |
| 9962 | mov 0xb1, %r30 |
| 9963 | .word 0x91d0001e ! 136: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 9964 | .word 0x87802088 ! 137: WRASI_I wr %r0, 0x0088, %asi |
| 9965 | memptr_4_97: |
| 9966 | set 0x60540000, %r31 |
| 9967 | .word 0x858335b9 ! 138: WRCCR_I wr %r12, 0x15b9, %ccr |
| 9968 | splash_cmpr_4_98: |
| 9969 | mov 0, %r18 |
| 9970 | sllx %r18, 63, %r18 |
| 9971 | rd %tick, %r17 |
| 9972 | add %r17, 0x70, %r17 |
| 9973 | or %r17, %r18, %r17 |
| 9974 | .word 0xb3800011 ! 139: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 9975 | .word 0x87aa4a28 ! 140: FCMPs fcmps %fcc<n>, %f9, %f8 |
| 9976 | .word 0x89800011 ! 141: WRTICK_R wr %r0, %r17, %tick |
| 9977 | .word 0xd0c7e160 ! 142: LDSWA_I ldswa [%r31, + 0x0160] %asi, %r8 |
| 9978 | splash_tba_4_100: |
| 9979 | nop |
| 9980 | ta T_CHANGE_PRIV |
| 9981 | set 0x120000, %r12 |
| 9982 | .word 0x8b90000c ! 143: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 9983 | change_to_randtl_4_101: |
| 9984 | ta T_CHANGE_HPRIV ! macro |
| 9985 | done_change_to_randtl_4_101: |
| 9986 | .word 0x8f902000 ! 144: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 9987 | nop |
| 9988 | ta T_CHANGE_HPRIV ! macro |
| 9989 | donret_4_102: |
| 9990 | rd %pc, %r12 |
| 9991 | add %r12, (donretarg_4_102-donret_4_102+4), %r12 |
| 9992 | add %r12, 0x4, %r11 ! seq tnpc |
| 9993 | wrpr %g0, 0x1, %tl |
| 9994 | wrpr %g0, %r12, %tpc |
| 9995 | wrpr %g0, %r11, %tnpc |
| 9996 | set (0x0080ec00 | (0x8a << 24)), %r13 |
| 9997 | and %r12, 0xfff, %r14 |
| 9998 | sllx %r14, 30, %r14 |
| 9999 | or %r13, %r14, %r20 |
| 10000 | wrpr %r20, %g0, %tstate |
| 10001 | wrhpr %g0, 0x1e8d, %htstate |
| 10002 | ta T_CHANGE_NONHPRIV ! rand=1 (4) |
| 10003 | .word 0x2e800001 ! 1: BVS bvs,a <label_0x1> |
| 10004 | retry |
| 10005 | donretarg_4_102: |
| 10006 | .word 0x25400001 ! 145: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 10007 | .word 0xd09fe130 ! 146: LDDA_I ldda [%r31, + 0x0130] %asi, %r8 |
| 10008 | .word 0x91d02033 ! 147: Tcc_I ta icc_or_xcc, %r0 + 51 |
| 10009 | nop |
| 10010 | ta T_CHANGE_HPRIV |
| 10011 | mov 0x4+1, %r10 |
| 10012 | set sync_thr_counter5, %r23 |
| 10013 | #ifndef SPC |
| 10014 | ldxa [%g0]0x63, %o1 |
| 10015 | and %o1, 0x38, %o1 |
| 10016 | add %o1, %r23, %r23 |
| 10017 | sllx %o1, 5, %o3 !(CID*256) |
| 10018 | #endif |
| 10019 | cas [%r23],%g0,%r10 !lock |
| 10020 | brnz %r10, cwq_4_104 |
| 10021 | rd %asi, %r12 |
| 10022 | wr %g0, 0x40, %asi |
| 10023 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 10024 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 10025 | cmp %l1, 1 |
| 10026 | bne cwq_4_104 |
| 10027 | set CWQ_BASE, %l6 |
| 10028 | #ifndef SPC |
| 10029 | add %l6, %o3, %l6 |
| 10030 | #endif |
| 10031 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 10032 | best_set_reg(0x206100f0, %l1, %l2) !# Control Word |
| 10033 | sllx %l2, 32, %l2 |
| 10034 | stx %l2, [%l6 + 0x0] |
| 10035 | membar #Sync |
| 10036 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 10037 | sub %l2, 0x40, %l2 |
| 10038 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 10039 | wr %r12, %g0, %asi |
| 10040 | st %g0, [%r23] |
| 10041 | cwq_4_104: |
| 10042 | ta T_CHANGE_NONHPRIV |
| 10043 | .word 0x99414000 ! 148: RDPC rd %pc, %r12 |
| 10044 | mondo_4_105: |
| 10045 | nop |
| 10046 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 10047 | ta T_CHANGE_PRIV |
| 10048 | stxa %r10, [%r0+0x3c0] %asi |
| 10049 | .word 0x9d940009 ! 149: WRPR_WSTATE_R wrpr %r16, %r9, %wstate |
| 10050 | .word 0xc19fe1a0 ! 150: LDDFA_I ldda [%r31, 0x01a0], %f0 |
| 10051 | nop |
| 10052 | ta T_CHANGE_HPRIV |
| 10053 | mov 0x4+1, %r10 |
| 10054 | set sync_thr_counter5, %r23 |
| 10055 | #ifndef SPC |
| 10056 | ldxa [%g0]0x63, %o1 |
| 10057 | and %o1, 0x38, %o1 |
| 10058 | add %o1, %r23, %r23 |
| 10059 | sllx %o1, 5, %o3 !(CID*256) |
| 10060 | #endif |
| 10061 | cas [%r23],%g0,%r10 !lock |
| 10062 | brnz %r10, cwq_4_106 |
| 10063 | rd %asi, %r12 |
| 10064 | wr %g0, 0x40, %asi |
| 10065 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 10066 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 10067 | cmp %l1, 1 |
| 10068 | bne cwq_4_106 |
| 10069 | set CWQ_BASE, %l6 |
| 10070 | #ifndef SPC |
| 10071 | add %l6, %o3, %l6 |
| 10072 | #endif |
| 10073 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 10074 | best_set_reg(0x20610090, %l1, %l2) !# Control Word |
| 10075 | sllx %l2, 32, %l2 |
| 10076 | stx %l2, [%l6 + 0x0] |
| 10077 | membar #Sync |
| 10078 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 10079 | sub %l2, 0x40, %l2 |
| 10080 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 10081 | wr %r12, %g0, %asi |
| 10082 | st %g0, [%r23] |
| 10083 | cwq_4_106: |
| 10084 | ta T_CHANGE_NONHPRIV |
| 10085 | .word 0xa5414000 ! 151: RDPC rd %pc, %r18 |
| 10086 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 10087 | reduce_priv_lvl_4_107: |
| 10088 | ta T_CHANGE_NONPRIV ! macro |
| 10089 | #if (defined SPC || defined CMP1) |
| 10090 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_108) + 0, 16, 16)) -> intp(2,0,8) |
| 10091 | #else |
| 10092 | setx 0x64dcb04be01468c6, %r1, %r28 |
| 10093 | stxa %r28, [%g0] 0x73 |
| 10094 | #endif |
| 10095 | intvec_4_108: |
| 10096 | .word 0x39400001 ! 153: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 10097 | .word 0x8d903491 ! 154: WRPR_PSTATE_I wrpr %r0, 0x1491, %pstate |
| 10098 | dvapa_4_110: |
| 10099 | nop |
| 10100 | ta T_CHANGE_HPRIV |
| 10101 | mov 0xf83, %r20 |
| 10102 | mov 0x18, %r19 |
| 10103 | sllx %r20, 23, %r20 |
| 10104 | or %r19, %r20, %r19 |
| 10105 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 10106 | mov 0x38, %r18 |
| 10107 | stxa %r31, [%r18]0x58 |
| 10108 | ta T_CHANGE_NONHPRIV |
| 10109 | .word 0x99b1c7c9 ! 155: PDIST pdistn %d38, %d40, %d12 |
| 10110 | .word 0xd08008a0 ! 156: LDUWA_R lduwa [%r0, %r0] 0x45, %r8 |
| 10111 | .word 0x89800011 ! 157: WRTICK_R wr %r0, %r17, %tick |
| 10112 | memptr_4_112: |
| 10113 | set 0x60740000, %r31 |
| 10114 | .word 0x8581e870 ! 158: WRCCR_I wr %r7, 0x0870, %ccr |
| 10115 | .word 0xa64a400b ! 159: MULX_R mulx %r9, %r11, %r19 |
| 10116 | nop |
| 10117 | ta T_CHANGE_HPRIV |
| 10118 | mov 0x4, %r10 |
| 10119 | set sync_thr_counter6, %r23 |
| 10120 | #ifndef SPC |
| 10121 | ldxa [%g0]0x63, %o1 |
| 10122 | and %o1, 0x38, %o1 |
| 10123 | add %o1, %r23, %r23 |
| 10124 | #endif |
| 10125 | cas [%r23],%g0,%r10 !lock |
| 10126 | brnz %r10, sma_4_113 |
| 10127 | rd %asi, %r12 |
| 10128 | wr %g0, 0x40, %asi |
| 10129 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 10130 | set 0x00121fff, %g1 |
| 10131 | stxa %g1, [%g0 + 0x80] %asi |
| 10132 | wr %r12, %g0, %asi |
| 10133 | st %g0, [%r23] |
| 10134 | sma_4_113: |
| 10135 | ta T_CHANGE_NONHPRIV |
| 10136 | .word 0xe3e7e010 ! 160: CASA_R casa [%r31] %asi, %r16, %r17 |
| 10137 | ibp_4_114: |
| 10138 | nop |
| 10139 | ta T_CHANGE_HPRIV |
| 10140 | mov 8, %r18 |
| 10141 | rd %asi, %r12 |
| 10142 | wr %r0, 0x41, %asi |
| 10143 | set sync_thr_counter4, %r23 |
| 10144 | #ifndef SPC |
| 10145 | ldxa [%g0]0x63, %r8 |
| 10146 | and %r8, 0x38, %r8 ! Core ID |
| 10147 | add %r8, %r23, %r23 |
| 10148 | #else |
| 10149 | mov 0, %r8 |
| 10150 | #endif |
| 10151 | mov 0x4, %r16 |
| 10152 | ibp_startwait4_114: |
| 10153 | cas [%r23],%g0,%r16 !lock |
| 10154 | brz,a %r16, continue_ibp_4_114 |
| 10155 | mov (~0x4&0xf), %r16 |
| 10156 | ld [%r23], %r16 |
| 10157 | ibp_wait4_114: |
| 10158 | brnz %r16, ibp_wait4_114 |
| 10159 | ld [%r23], %r16 |
| 10160 | ba ibp_startwait4_114 |
| 10161 | mov 0x4, %r16 |
| 10162 | continue_ibp_4_114: |
| 10163 | sllx %r16, %r8, %r16 !Mask for my core only |
| 10164 | ldxa [0x58]%asi, %r17 !Running_status |
| 10165 | wait_for_stat_4_114: |
| 10166 | ldxa [0x50]%asi, %r13 !Running_rw |
| 10167 | cmp %r13, %r17 |
| 10168 | bne,a %xcc, wait_for_stat_4_114 |
| 10169 | ldxa [0x58]%asi, %r17 !Running_status |
| 10170 | stxa %r16, [0x68]%asi !Park (W1C) |
| 10171 | ldxa [0x50]%asi, %r14 !Running_rw |
| 10172 | wait_for_ibp_4_114: |
| 10173 | ldxa [0x58]%asi, %r17 !Running_status |
| 10174 | cmp %r14, %r17 |
| 10175 | bne,a %xcc, wait_for_ibp_4_114 |
| 10176 | ldxa [0x50]%asi, %r14 !Running_rw |
| 10177 | ibp_doit4_114: |
| 10178 | best_set_reg(0x00000050acdf3688,%r19, %r20) |
| 10179 | stxa %r20, [%r18]0x42 |
| 10180 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 10181 | st %g0, [%r23] !clear lock |
| 10182 | wr %r0, %r12, %asi !restore %asi |
| 10183 | .word 0x99b2048d ! 161: FCMPLE32 fcmple32 %d8, %d44, %r12 |
| 10184 | memptr_4_115: |
| 10185 | set 0x60540000, %r31 |
| 10186 | .word 0x858420a4 ! 162: WRCCR_I wr %r16, 0x00a4, %ccr |
| 10187 | splash_tba_4_116: |
| 10188 | nop |
| 10189 | ta T_CHANGE_PRIV |
| 10190 | set 0x120000, %r12 |
| 10191 | .word 0x8b90000c ! 163: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 10192 | .word 0xa24c0009 ! 164: MULX_R mulx %r16, %r9, %r17 |
| 10193 | .word 0x91d020b4 ! 165: Tcc_I ta icc_or_xcc, %r0 + 180 |
| 10194 | ibp_4_117: |
| 10195 | nop |
| 10196 | ta T_CHANGE_HPRIV |
| 10197 | mov 8, %r18 |
| 10198 | rd %asi, %r12 |
| 10199 | wr %r0, 0x41, %asi |
| 10200 | set sync_thr_counter4, %r23 |
| 10201 | #ifndef SPC |
| 10202 | ldxa [%g0]0x63, %r8 |
| 10203 | and %r8, 0x38, %r8 ! Core ID |
| 10204 | add %r8, %r23, %r23 |
| 10205 | #else |
| 10206 | mov 0, %r8 |
| 10207 | #endif |
| 10208 | mov 0x4, %r16 |
| 10209 | ibp_startwait4_117: |
| 10210 | cas [%r23],%g0,%r16 !lock |
| 10211 | brz,a %r16, continue_ibp_4_117 |
| 10212 | mov (~0x4&0xf), %r16 |
| 10213 | ld [%r23], %r16 |
| 10214 | ibp_wait4_117: |
| 10215 | brnz %r16, ibp_wait4_117 |
| 10216 | ld [%r23], %r16 |
| 10217 | ba ibp_startwait4_117 |
| 10218 | mov 0x4, %r16 |
| 10219 | continue_ibp_4_117: |
| 10220 | sllx %r16, %r8, %r16 !Mask for my core only |
| 10221 | ldxa [0x58]%asi, %r17 !Running_status |
| 10222 | wait_for_stat_4_117: |
| 10223 | ldxa [0x50]%asi, %r13 !Running_rw |
| 10224 | cmp %r13, %r17 |
| 10225 | bne,a %xcc, wait_for_stat_4_117 |
| 10226 | ldxa [0x58]%asi, %r17 !Running_status |
| 10227 | stxa %r16, [0x68]%asi !Park (W1C) |
| 10228 | ldxa [0x50]%asi, %r14 !Running_rw |
| 10229 | wait_for_ibp_4_117: |
| 10230 | ldxa [0x58]%asi, %r17 !Running_status |
| 10231 | cmp %r14, %r17 |
| 10232 | bne,a %xcc, wait_for_ibp_4_117 |
| 10233 | ldxa [0x50]%asi, %r14 !Running_rw |
| 10234 | ibp_doit4_117: |
| 10235 | best_set_reg(0x00000050b5f688b7,%r19, %r20) |
| 10236 | stxa %r20, [%r18]0x42 |
| 10237 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 10238 | st %g0, [%r23] !clear lock |
| 10239 | wr %r0, %r12, %asi !restore %asi |
| 10240 | ta T_CHANGE_NONHPRIV |
| 10241 | .word 0xa1a0c9a6 ! 166: FDIVs fdivs %f3, %f6, %f16 |
| 10242 | brcommon2_4_118: |
| 10243 | nop |
| 10244 | setx common_target, %r12, %r27 |
| 10245 | ba,a .+12 |
| 10246 | .word 0xc36fe150 ! 1: PREFETCH_I prefetch [%r31 + 0x0150], #one_read |
| 10247 | ba,a .+8 |
| 10248 | jmpl %r27+0, %r27 |
| 10249 | .word 0xc1bfe140 ! 167: STDFA_I stda %f0, [0x0140, %r31] |
| 10250 | .word 0xd027e10c ! 168: STW_I stw %r8, [%r31 + 0x010c] |
| 10251 | ibp_4_119: |
| 10252 | nop |
| 10253 | ta T_CHANGE_HPRIV |
| 10254 | mov 8, %r18 |
| 10255 | rd %asi, %r12 |
| 10256 | wr %r0, 0x41, %asi |
| 10257 | set sync_thr_counter4, %r23 |
| 10258 | #ifndef SPC |
| 10259 | ldxa [%g0]0x63, %r8 |
| 10260 | and %r8, 0x38, %r8 ! Core ID |
| 10261 | add %r8, %r23, %r23 |
| 10262 | #else |
| 10263 | mov 0, %r8 |
| 10264 | #endif |
| 10265 | mov 0x4, %r16 |
| 10266 | ibp_startwait4_119: |
| 10267 | cas [%r23],%g0,%r16 !lock |
| 10268 | brz,a %r16, continue_ibp_4_119 |
| 10269 | mov (~0x4&0xf), %r16 |
| 10270 | ld [%r23], %r16 |
| 10271 | ibp_wait4_119: |
| 10272 | brnz %r16, ibp_wait4_119 |
| 10273 | ld [%r23], %r16 |
| 10274 | ba ibp_startwait4_119 |
| 10275 | mov 0x4, %r16 |
| 10276 | continue_ibp_4_119: |
| 10277 | sllx %r16, %r8, %r16 !Mask for my core only |
| 10278 | ldxa [0x58]%asi, %r17 !Running_status |
| 10279 | wait_for_stat_4_119: |
| 10280 | ldxa [0x50]%asi, %r13 !Running_rw |
| 10281 | cmp %r13, %r17 |
| 10282 | bne,a %xcc, wait_for_stat_4_119 |
| 10283 | ldxa [0x58]%asi, %r17 !Running_status |
| 10284 | stxa %r16, [0x68]%asi !Park (W1C) |
| 10285 | ldxa [0x50]%asi, %r14 !Running_rw |
| 10286 | wait_for_ibp_4_119: |
| 10287 | ldxa [0x58]%asi, %r17 !Running_status |
| 10288 | cmp %r14, %r17 |
| 10289 | bne,a %xcc, wait_for_ibp_4_119 |
| 10290 | ldxa [0x50]%asi, %r14 !Running_rw |
| 10291 | ibp_doit4_119: |
| 10292 | best_set_reg(0x00000040e4c8b718,%r19, %r20) |
| 10293 | stxa %r20, [%r18]0x42 |
| 10294 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 10295 | st %g0, [%r23] !clear lock |
| 10296 | wr %r0, %r12, %asi !restore %asi |
| 10297 | ta T_CHANGE_NONHPRIV |
| 10298 | .word 0xc3ecc028 ! 169: PREFETCHA_R prefetcha [%r19, %r8] 0x01, #one_read |
| 10299 | .word 0x99520000 ! 170: RDPR_PIL <illegal instruction> |
| 10300 | mondo_4_120: |
| 10301 | nop |
| 10302 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 10303 | stxa %r11, [%r0+0x3c8] %asi |
| 10304 | .word 0x9d940012 ! 171: WRPR_WSTATE_R wrpr %r16, %r18, %wstate |
| 10305 | .word 0x8d802000 ! 172: WRFPRS_I wr %r0, 0x0000, %fprs |
| 10306 | .word 0xe08fe090 ! 173: LDUBA_I lduba [%r31, + 0x0090] %asi, %r16 |
| 10307 | setx 0x06c9d60a9086f8c2, %r1, %r28 |
| 10308 | stxa %r28, [%g0] 0x73 |
| 10309 | intvec_4_121: |
| 10310 | .word 0x39400001 ! 174: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 10311 | .word 0xa0c325e9 ! 175: ADDCcc_I addccc %r12, 0x05e9, %r16 |
| 10312 | ibp_4_122: |
| 10313 | nop |
| 10314 | ta T_CHANGE_HPRIV |
| 10315 | mov 8, %r18 |
| 10316 | rd %asi, %r12 |
| 10317 | wr %r0, 0x41, %asi |
| 10318 | set sync_thr_counter4, %r23 |
| 10319 | #ifndef SPC |
| 10320 | ldxa [%g0]0x63, %r8 |
| 10321 | and %r8, 0x38, %r8 ! Core ID |
| 10322 | add %r8, %r23, %r23 |
| 10323 | #else |
| 10324 | mov 0, %r8 |
| 10325 | #endif |
| 10326 | mov 0x4, %r16 |
| 10327 | ibp_startwait4_122: |
| 10328 | cas [%r23],%g0,%r16 !lock |
| 10329 | brz,a %r16, continue_ibp_4_122 |
| 10330 | mov (~0x4&0xf), %r16 |
| 10331 | ld [%r23], %r16 |
| 10332 | ibp_wait4_122: |
| 10333 | brnz %r16, ibp_wait4_122 |
| 10334 | ld [%r23], %r16 |
| 10335 | ba ibp_startwait4_122 |
| 10336 | mov 0x4, %r16 |
| 10337 | continue_ibp_4_122: |
| 10338 | sllx %r16, %r8, %r16 !Mask for my core only |
| 10339 | ldxa [0x58]%asi, %r17 !Running_status |
| 10340 | wait_for_stat_4_122: |
| 10341 | ldxa [0x50]%asi, %r13 !Running_rw |
| 10342 | cmp %r13, %r17 |
| 10343 | bne,a %xcc, wait_for_stat_4_122 |
| 10344 | ldxa [0x58]%asi, %r17 !Running_status |
| 10345 | stxa %r16, [0x68]%asi !Park (W1C) |
| 10346 | ldxa [0x50]%asi, %r14 !Running_rw |
| 10347 | wait_for_ibp_4_122: |
| 10348 | ldxa [0x58]%asi, %r17 !Running_status |
| 10349 | cmp %r14, %r17 |
| 10350 | bne,a %xcc, wait_for_ibp_4_122 |
| 10351 | ldxa [0x50]%asi, %r14 !Running_rw |
| 10352 | ibp_doit4_122: |
| 10353 | best_set_reg(0x00000050b0f7184a,%r19, %r20) |
| 10354 | stxa %r20, [%r18]0x42 |
| 10355 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 10356 | st %g0, [%r23] !clear lock |
| 10357 | wr %r0, %r12, %asi !restore %asi |
| 10358 | .word 0xe1bfd920 ! 176: STDFA_R stda %f16, [%r0, %r31] |
| 10359 | ibp_4_123: |
| 10360 | nop |
| 10361 | ta T_CHANGE_HPRIV |
| 10362 | mov 8, %r18 |
| 10363 | rd %asi, %r12 |
| 10364 | wr %r0, 0x41, %asi |
| 10365 | set sync_thr_counter4, %r23 |
| 10366 | #ifndef SPC |
| 10367 | ldxa [%g0]0x63, %r8 |
| 10368 | and %r8, 0x38, %r8 ! Core ID |
| 10369 | add %r8, %r23, %r23 |
| 10370 | #else |
| 10371 | mov 0, %r8 |
| 10372 | #endif |
| 10373 | mov 0x4, %r16 |
| 10374 | ibp_startwait4_123: |
| 10375 | cas [%r23],%g0,%r16 !lock |
| 10376 | brz,a %r16, continue_ibp_4_123 |
| 10377 | mov (~0x4&0xf), %r16 |
| 10378 | ld [%r23], %r16 |
| 10379 | ibp_wait4_123: |
| 10380 | brnz %r16, ibp_wait4_123 |
| 10381 | ld [%r23], %r16 |
| 10382 | ba ibp_startwait4_123 |
| 10383 | mov 0x4, %r16 |
| 10384 | continue_ibp_4_123: |
| 10385 | sllx %r16, %r8, %r16 !Mask for my core only |
| 10386 | ldxa [0x58]%asi, %r17 !Running_status |
| 10387 | wait_for_stat_4_123: |
| 10388 | ldxa [0x50]%asi, %r13 !Running_rw |
| 10389 | cmp %r13, %r17 |
| 10390 | bne,a %xcc, wait_for_stat_4_123 |
| 10391 | ldxa [0x58]%asi, %r17 !Running_status |
| 10392 | stxa %r16, [0x68]%asi !Park (W1C) |
| 10393 | ldxa [0x50]%asi, %r14 !Running_rw |
| 10394 | wait_for_ibp_4_123: |
| 10395 | ldxa [0x58]%asi, %r17 !Running_status |
| 10396 | cmp %r14, %r17 |
| 10397 | bne,a %xcc, wait_for_ibp_4_123 |
| 10398 | ldxa [0x50]%asi, %r14 !Running_rw |
| 10399 | ibp_doit4_123: |
| 10400 | best_set_reg(0x0000005086d84ab9,%r19, %r20) |
| 10401 | stxa %r20, [%r18]0x42 |
| 10402 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 10403 | st %g0, [%r23] !clear lock |
| 10404 | wr %r0, %r12, %asi !restore %asi |
| 10405 | .word 0xe1bfe120 ! 177: STDFA_I stda %f16, [0x0120, %r31] |
| 10406 | ibp_4_124: |
| 10407 | nop |
| 10408 | ta T_CHANGE_HPRIV |
| 10409 | mov 8, %r18 |
| 10410 | rd %asi, %r12 |
| 10411 | wr %r0, 0x41, %asi |
| 10412 | set sync_thr_counter4, %r23 |
| 10413 | #ifndef SPC |
| 10414 | ldxa [%g0]0x63, %r8 |
| 10415 | and %r8, 0x38, %r8 ! Core ID |
| 10416 | add %r8, %r23, %r23 |
| 10417 | #else |
| 10418 | mov 0, %r8 |
| 10419 | #endif |
| 10420 | mov 0x4, %r16 |
| 10421 | ibp_startwait4_124: |
| 10422 | cas [%r23],%g0,%r16 !lock |
| 10423 | brz,a %r16, continue_ibp_4_124 |
| 10424 | mov (~0x4&0xf), %r16 |
| 10425 | ld [%r23], %r16 |
| 10426 | ibp_wait4_124: |
| 10427 | brnz %r16, ibp_wait4_124 |
| 10428 | ld [%r23], %r16 |
| 10429 | ba ibp_startwait4_124 |
| 10430 | mov 0x4, %r16 |
| 10431 | continue_ibp_4_124: |
| 10432 | sllx %r16, %r8, %r16 !Mask for my core only |
| 10433 | ldxa [0x58]%asi, %r17 !Running_status |
| 10434 | wait_for_stat_4_124: |
| 10435 | ldxa [0x50]%asi, %r13 !Running_rw |
| 10436 | cmp %r13, %r17 |
| 10437 | bne,a %xcc, wait_for_stat_4_124 |
| 10438 | ldxa [0x58]%asi, %r17 !Running_status |
| 10439 | stxa %r16, [0x68]%asi !Park (W1C) |
| 10440 | ldxa [0x50]%asi, %r14 !Running_rw |
| 10441 | wait_for_ibp_4_124: |
| 10442 | ldxa [0x58]%asi, %r17 !Running_status |
| 10443 | cmp %r14, %r17 |
| 10444 | bne,a %xcc, wait_for_ibp_4_124 |
| 10445 | ldxa [0x50]%asi, %r14 !Running_rw |
| 10446 | ibp_doit4_124: |
| 10447 | best_set_reg(0x0000004018cab958,%r19, %r20) |
| 10448 | stxa %r20, [%r18]0x42 |
| 10449 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 10450 | st %g0, [%r23] !clear lock |
| 10451 | wr %r0, %r12, %asi !restore %asi |
| 10452 | .word 0xa570234d ! 178: POPC_I popc 0x034d, %r18 |
| 10453 | .word 0xe897e130 ! 179: LDUHA_I lduha [%r31, + 0x0130] %asi, %r20 |
| 10454 | fpinit_4_125: |
| 10455 | nop |
| 10456 | setx fp_data_quads, %r19, %r20 |
| 10457 | ldd [%r20], %f0 |
| 10458 | ldd [%r20+8], %f4 |
| 10459 | ld [%r20+16], %fsr |
| 10460 | ld [%r20+24], %r19 |
| 10461 | wr %r19, %g0, %gsr |
| 10462 | .word 0x91a009c4 ! 180: FDIVd fdivd %f0, %f4, %f8 |
| 10463 | .word 0x8143e011 ! 181: MEMBAR membar #LoadLoad | #Lookaside |
| 10464 | ibp_4_127: |
| 10465 | nop |
| 10466 | ta T_CHANGE_HPRIV |
| 10467 | mov 8, %r18 |
| 10468 | rd %asi, %r12 |
| 10469 | wr %r0, 0x41, %asi |
| 10470 | set sync_thr_counter4, %r23 |
| 10471 | #ifndef SPC |
| 10472 | ldxa [%g0]0x63, %r8 |
| 10473 | and %r8, 0x38, %r8 ! Core ID |
| 10474 | add %r8, %r23, %r23 |
| 10475 | #else |
| 10476 | mov 0, %r8 |
| 10477 | #endif |
| 10478 | mov 0x4, %r16 |
| 10479 | ibp_startwait4_127: |
| 10480 | cas [%r23],%g0,%r16 !lock |
| 10481 | brz,a %r16, continue_ibp_4_127 |
| 10482 | mov (~0x4&0xf), %r16 |
| 10483 | ld [%r23], %r16 |
| 10484 | ibp_wait4_127: |
| 10485 | brnz %r16, ibp_wait4_127 |
| 10486 | ld [%r23], %r16 |
| 10487 | ba ibp_startwait4_127 |
| 10488 | mov 0x4, %r16 |
| 10489 | continue_ibp_4_127: |
| 10490 | sllx %r16, %r8, %r16 !Mask for my core only |
| 10491 | ldxa [0x58]%asi, %r17 !Running_status |
| 10492 | wait_for_stat_4_127: |
| 10493 | ldxa [0x50]%asi, %r13 !Running_rw |
| 10494 | cmp %r13, %r17 |
| 10495 | bne,a %xcc, wait_for_stat_4_127 |
| 10496 | ldxa [0x58]%asi, %r17 !Running_status |
| 10497 | stxa %r16, [0x68]%asi !Park (W1C) |
| 10498 | ldxa [0x50]%asi, %r14 !Running_rw |
| 10499 | wait_for_ibp_4_127: |
| 10500 | ldxa [0x58]%asi, %r17 !Running_status |
| 10501 | cmp %r14, %r17 |
| 10502 | bne,a %xcc, wait_for_ibp_4_127 |
| 10503 | ldxa [0x50]%asi, %r14 !Running_rw |
| 10504 | ibp_doit4_127: |
| 10505 | best_set_reg(0x000000402af95832,%r19, %r20) |
| 10506 | stxa %r20, [%r18]0x42 |
| 10507 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 10508 | st %g0, [%r23] !clear lock |
| 10509 | wr %r0, %r12, %asi !restore %asi |
| 10510 | ta T_CHANGE_NONHPRIV |
| 10511 | .word 0xc19fde00 ! 182: LDDFA_R ldda [%r31, %r0], %f0 |
| 10512 | #if (defined SPC || defined CMP1) |
| 10513 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_128) + 24, 16, 16)) -> intp(4,0,2) |
| 10514 | #else |
| 10515 | setx 0xf91b499fa7713c3d, %r1, %r28 |
| 10516 | stxa %r28, [%g0] 0x73 |
| 10517 | #endif |
| 10518 | intvec_4_128: |
| 10519 | .word 0x39400001 ! 183: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 10520 | intveclr_4_129: |
| 10521 | nop |
| 10522 | ta T_CHANGE_HPRIV |
| 10523 | setx 0x299d9240055f898e, %r1, %r28 |
| 10524 | stxa %r28, [%g0] 0x72 |
| 10525 | ta T_CHANGE_NONHPRIV |
| 10526 | .word 0x25400001 ! 184: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 10527 | dvapa_4_130: |
| 10528 | nop |
| 10529 | ta T_CHANGE_HPRIV |
| 10530 | mov 0xc4b, %r20 |
| 10531 | mov 0xc, %r19 |
| 10532 | sllx %r20, 23, %r20 |
| 10533 | or %r19, %r20, %r19 |
| 10534 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 10535 | mov 0x38, %r18 |
| 10536 | stxa %r31, [%r18]0x58 |
| 10537 | ta T_CHANGE_NONHPRIV |
| 10538 | .word 0xe1bfe0a0 ! 185: STDFA_I stda %f16, [0x00a0, %r31] |
| 10539 | mondo_4_131: |
| 10540 | nop |
| 10541 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 10542 | stxa %r3, [%r0+0x3c8] %asi |
| 10543 | .word 0x9d910012 ! 186: WRPR_WSTATE_R wrpr %r4, %r18, %wstate |
| 10544 | .word 0xe877c000 ! 187: STX_R stx %r20, [%r31 + %r0] |
| 10545 | mondo_4_132: |
| 10546 | nop |
| 10547 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 10548 | stxa %r19, [%r0+0x3c8] %asi |
| 10549 | .word 0x9d944004 ! 188: WRPR_WSTATE_R wrpr %r17, %r4, %wstate |
| 10550 | mondo_4_133: |
| 10551 | nop |
| 10552 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 10553 | ta T_CHANGE_PRIV |
| 10554 | stxa %r9, [%r0+0x3d8] %asi |
| 10555 | .word 0x9d91c00c ! 189: WRPR_WSTATE_R wrpr %r7, %r12, %wstate |
| 10556 | memptr_4_134: |
| 10557 | set 0x60540000, %r31 |
| 10558 | .word 0x85832b67 ! 190: WRCCR_I wr %r12, 0x0b67, %ccr |
| 10559 | splash_hpstate_4_135: |
| 10560 | .word 0x81982355 ! 191: WRHPR_HPSTATE_I wrhpr %r0, 0x0355, %hpstate |
| 10561 | .word 0xe937c000 ! 192: STQF_R - %f20, [%r0, %r31] |
| 10562 | splash_hpstate_4_136: |
| 10563 | .word 0x26cd0001 ! 1: BRLZ brlz,a,pt %r20,<label_0xd0001> |
| 10564 | .word 0x81983621 ! 193: WRHPR_HPSTATE_I wrhpr %r0, 0x1621, %hpstate |
| 10565 | splash_hpstate_4_137: |
| 10566 | ta T_CHANGE_NONHPRIV |
| 10567 | .word 0x20800001 ! 1: BN bn,a <label_0x1> |
| 10568 | .word 0x81983649 ! 194: WRHPR_HPSTATE_I wrhpr %r0, 0x1649, %hpstate |
| 10569 | .word 0xe19fc2c0 ! 195: LDDFA_R ldda [%r31, %r0], %f16 |
| 10570 | .word 0x89800011 ! 196: WRTICK_R wr %r0, %r17, %tick |
| 10571 | intveclr_4_139: |
| 10572 | nop |
| 10573 | ta T_CHANGE_HPRIV |
| 10574 | setx 0xd5d1d2cec309d7de, %r1, %r28 |
| 10575 | stxa %r28, [%g0] 0x72 |
| 10576 | ta T_CHANGE_NONHPRIV |
| 10577 | .word 0x25400001 ! 197: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 10578 | .word 0x89800011 ! 198: WRTICK_R wr %r0, %r17, %tick |
| 10579 | mondo_4_141: |
| 10580 | nop |
| 10581 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 10582 | stxa %r13, [%r0+0x3c0] %asi |
| 10583 | .word 0x9d920003 ! 199: WRPR_WSTATE_R wrpr %r8, %r3, %wstate |
| 10584 | splash_lsu_4_142: |
| 10585 | nop |
| 10586 | ta T_CHANGE_HPRIV |
| 10587 | set 0xc53e1b37, %r2 |
| 10588 | mov 0x6, %r1 |
| 10589 | sllx %r1, 32, %r1 |
| 10590 | or %r1, %r2, %r2 |
| 10591 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 10592 | .word 0x3d400001 ! 200: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 10593 | change_to_randtl_4_143: |
| 10594 | ta T_CHANGE_HPRIV ! macro |
| 10595 | done_change_to_randtl_4_143: |
| 10596 | .word 0x8f902000 ! 201: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 10597 | nop |
| 10598 | nop |
| 10599 | ta T_CHANGE_PRIV |
| 10600 | wrpr %g0, %g0, %gl |
| 10601 | nop |
| 10602 | nop |
| 10603 | setx join_lbl_0_0, %g1, %g2 |
| 10604 | jmp %g2 |
| 10605 | nop |
| 10606 | fork_lbl_0_2: |
| 10607 | ta T_CHANGE_NONHPRIV |
| 10608 | mondo_2_0: |
| 10609 | nop |
| 10610 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 10611 | ta T_CHANGE_PRIV |
| 10612 | stxa %r2, [%r0+0x3e0] %asi |
| 10613 | .word 0x9d908014 ! 1: WRPR_WSTATE_R wrpr %r2, %r20, %wstate |
| 10614 | trapasi_2_1: |
| 10615 | nop |
| 10616 | mov 0x3e0, %r1 ! (VA for ASI 0x25) |
| 10617 | .word 0xd0c044a0 ! 2: LDSWA_R ldswa [%r1, %r0] 0x25, %r8 |
| 10618 | splash_cmpr_2_2: |
| 10619 | mov 1, %r18 |
| 10620 | sllx %r18, 63, %r18 |
| 10621 | rd %tick, %r17 |
| 10622 | add %r17, 0x100, %r17 |
| 10623 | or %r17, %r18, %r17 |
| 10624 | ta T_CHANGE_HPRIV |
| 10625 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 10626 | .word 0xb3800011 ! 3: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 10627 | change_to_randtl_2_3: |
| 10628 | ta T_CHANGE_HPRIV ! macro |
| 10629 | done_change_to_randtl_2_3: |
| 10630 | .word 0x8f902000 ! 4: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 10631 | .word 0xd077c000 ! 5: STX_R stx %r8, [%r31 + %r0] |
| 10632 | splash_cmpr_2_4: |
| 10633 | mov 0, %r18 |
| 10634 | sllx %r18, 63, %r18 |
| 10635 | rd %tick, %r17 |
| 10636 | add %r17, 0x100, %r17 |
| 10637 | or %r17, %r18, %r17 |
| 10638 | ta T_CHANGE_PRIV |
| 10639 | .word 0xaf800011 ! 6: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 10640 | .word 0xa780400d ! 7: WR_GRAPHICS_STATUS_REG_R wr %r1, %r13, %- |
| 10641 | .word 0xd07fe1f0 ! 8: SWAP_I swap %r8, [%r31 + 0x01f0] |
| 10642 | .word 0x91948013 ! 9: WRPR_PIL_R wrpr %r18, %r19, %pil |
| 10643 | brcommon3_2_7: |
| 10644 | nop |
| 10645 | setx common_target, %r12, %r27 |
| 10646 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 10647 | ba,a .+12 |
| 10648 | .word 0xd1e7c031 ! 1: CASA_I casa [%r31] 0x 1, %r17, %r8 |
| 10649 | ba,a .+8 |
| 10650 | jmpl %r27+0, %r27 |
| 10651 | .word 0xd0dfc030 ! 10: LDXA_R ldxa [%r31, %r16] 0x01, %r8 |
| 10652 | nop |
| 10653 | ta T_CHANGE_HPRIV ! macro |
| 10654 | donret_2_8: |
| 10655 | rd %pc, %r12 |
| 10656 | add %r12, (donretarg_2_8-donret_2_8), %r12 |
| 10657 | add %r12, 0x4, %r11 ! seq tnpc |
| 10658 | wrpr %g0, 0x1, %tl |
| 10659 | wrpr %g0, %r12, %tpc |
| 10660 | wrpr %g0, %r11, %tnpc |
| 10661 | set (0x006ee500 | (0x55 << 24)), %r13 |
| 10662 | and %r12, 0xfff, %r14 |
| 10663 | sllx %r14, 30, %r14 |
| 10664 | or %r13, %r14, %r20 |
| 10665 | wrpr %r20, %g0, %tstate |
| 10666 | wrhpr %g0, 0x40d, %htstate |
| 10667 | ta T_CHANGE_NONPRIV ! rand=0 (2) |
| 10668 | .word 0x2acc4001 ! 1: BRNZ brnz,a,pt %r17,<label_0xc4001> |
| 10669 | retry |
| 10670 | donretarg_2_8: |
| 10671 | .word 0xd06fe067 ! 11: LDSTUB_I ldstub %r8, [%r31 + 0x0067] |
| 10672 | .word 0xab85000d ! 12: WR_CLEAR_SOFTINT_R wr %r20, %r13, %clear_softint |
| 10673 | dvapa_2_9: |
| 10674 | nop |
| 10675 | ta T_CHANGE_HPRIV |
| 10676 | mov 0xd75, %r20 |
| 10677 | mov 0xe, %r19 |
| 10678 | sllx %r20, 23, %r20 |
| 10679 | or %r19, %r20, %r19 |
| 10680 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 10681 | mov 0x38, %r18 |
| 10682 | stxa %r31, [%r18]0x58 |
| 10683 | ta T_CHANGE_NONHPRIV |
| 10684 | .word 0xd1e7e00a ! 13: CASA_R casa [%r31] %asi, %r10, %r8 |
| 10685 | .word 0xa36cc00b ! 14: SDIVX_R sdivx %r19, %r11, %r17 |
| 10686 | nop |
| 10687 | ta T_CHANGE_HPRIV |
| 10688 | mov 0x2+1, %r10 |
| 10689 | set sync_thr_counter5, %r23 |
| 10690 | #ifndef SPC |
| 10691 | ldxa [%g0]0x63, %o1 |
| 10692 | and %o1, 0x38, %o1 |
| 10693 | add %o1, %r23, %r23 |
| 10694 | sllx %o1, 5, %o3 !(CID*256) |
| 10695 | #endif |
| 10696 | cas [%r23],%g0,%r10 !lock |
| 10697 | brnz %r10, cwq_2_10 |
| 10698 | rd %asi, %r12 |
| 10699 | wr %g0, 0x40, %asi |
| 10700 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 10701 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 10702 | cmp %l1, 1 |
| 10703 | bne cwq_2_10 |
| 10704 | set CWQ_BASE, %l6 |
| 10705 | #ifndef SPC |
| 10706 | add %l6, %o3, %l6 |
| 10707 | #endif |
| 10708 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 10709 | best_set_reg(0x206100c0, %l1, %l2) !# Control Word |
| 10710 | sllx %l2, 32, %l2 |
| 10711 | stx %l2, [%l6 + 0x0] |
| 10712 | membar #Sync |
| 10713 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 10714 | sub %l2, 0x40, %l2 |
| 10715 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 10716 | wr %r12, %g0, %asi |
| 10717 | st %g0, [%r23] |
| 10718 | cwq_2_10: |
| 10719 | ta T_CHANGE_NONHPRIV |
| 10720 | .word 0xa7414000 ! 15: RDPC rd %pc, %r19 |
| 10721 | .word 0xe48008a0 ! 16: LDUWA_R lduwa [%r0, %r0] 0x45, %r18 |
| 10722 | nop |
| 10723 | ta T_CHANGE_HPRIV |
| 10724 | mov 0x2, %r10 |
| 10725 | set sync_thr_counter6, %r23 |
| 10726 | #ifndef SPC |
| 10727 | ldxa [%g0]0x63, %o1 |
| 10728 | and %o1, 0x38, %o1 |
| 10729 | add %o1, %r23, %r23 |
| 10730 | #endif |
| 10731 | cas [%r23],%g0,%r10 !lock |
| 10732 | brnz %r10, sma_2_11 |
| 10733 | rd %asi, %r12 |
| 10734 | wr %g0, 0x40, %asi |
| 10735 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 10736 | set 0x00161fff, %g1 |
| 10737 | stxa %g1, [%g0 + 0x80] %asi |
| 10738 | wr %r12, %g0, %asi |
| 10739 | st %g0, [%r23] |
| 10740 | sma_2_11: |
| 10741 | ta T_CHANGE_NONHPRIV |
| 10742 | .word 0xe5e7e008 ! 17: CASA_R casa [%r31] %asi, %r8, %r18 |
| 10743 | brcommon1_2_12: |
| 10744 | nop |
| 10745 | setx common_target, %r12, %r27 |
| 10746 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 10747 | ba,a .+12 |
| 10748 | .word 0xc32fe110 ! 1: STXFSR_I st-sfr %f1, [0x0110, %r31] |
| 10749 | ba,a .+8 |
| 10750 | jmpl %r27+0, %r27 |
| 10751 | .word 0x95b507cc ! 18: PDIST pdistn %d20, %d12, %d10 |
| 10752 | .word 0x8d902362 ! 19: WRPR_PSTATE_I wrpr %r0, 0x0362, %pstate |
| 10753 | #if (defined SPC || defined CMP1) |
| 10754 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_14) + 16, 16, 16)) -> intp(7,0,21) |
| 10755 | #else |
| 10756 | setx 0x749c04fea047b3eb, %r1, %r28 |
| 10757 | stxa %r28, [%g0] 0x73 |
| 10758 | #endif |
| 10759 | intvec_2_14: |
| 10760 | .word 0x39400001 ! 20: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 10761 | splash_tba_2_15: |
| 10762 | nop |
| 10763 | ta T_CHANGE_PRIV |
| 10764 | setx 0x00000004003a0000, %r11, %r12 |
| 10765 | .word 0x8b90000c ! 21: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 10766 | .word 0xa7840001 ! 22: WR_GRAPHICS_STATUS_REG_R wr %r16, %r1, %- |
| 10767 | intveclr_2_17: |
| 10768 | nop |
| 10769 | ta T_CHANGE_HPRIV |
| 10770 | setx 0x7af512ed7279d275, %r1, %r28 |
| 10771 | stxa %r28, [%g0] 0x72 |
| 10772 | ta T_CHANGE_NONHPRIV |
| 10773 | .word 0x25400001 ! 23: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 10774 | trapasi_2_18: |
| 10775 | nop |
| 10776 | mov 0x8, %r1 ! (VA for ASI 0x4c) |
| 10777 | .word 0xd4d04980 ! 24: LDSHA_R ldsha [%r1, %r0] 0x4c, %r10 |
| 10778 | nop |
| 10779 | mov 0x80, %g3 |
| 10780 | stxa %g3, [%g3] 0x5f |
| 10781 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 |
| 10782 | .word 0xbfe7c000 ! 1: SAVE_R save %r31, %r0, %r31 |
| 10783 | .word 0xd45fc000 ! 25: LDX_R ldx [%r31 + %r0], %r10 |
| 10784 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 10785 | reduce_priv_lvl_2_19: |
| 10786 | ta T_CHANGE_NONPRIV ! macro |
| 10787 | intveclr_2_20: |
| 10788 | nop |
| 10789 | ta T_CHANGE_HPRIV |
| 10790 | setx 0x0c78a35c9016e8a5, %r1, %r28 |
| 10791 | stxa %r28, [%g0] 0x72 |
| 10792 | .word 0x25400001 ! 27: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 10793 | intveclr_2_21: |
| 10794 | nop |
| 10795 | ta T_CHANGE_HPRIV |
| 10796 | setx 0xbea37a61d9fc410e, %r1, %r28 |
| 10797 | stxa %r28, [%g0] 0x72 |
| 10798 | ta T_CHANGE_NONHPRIV |
| 10799 | .word 0x25400001 ! 28: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 10800 | nop |
| 10801 | mov 0x80, %g3 |
| 10802 | stxa %g3, [%g3] 0x5f |
| 10803 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 |
| 10804 | .word 0xd45fc000 ! 29: LDX_R ldx [%r31 + %r0], %r10 |
| 10805 | brcommon3_2_22: |
| 10806 | nop |
| 10807 | setx common_target, %r12, %r27 |
| 10808 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 10809 | ba,a .+12 |
| 10810 | .word 0xd46fe060 ! 1: LDSTUB_I ldstub %r10, [%r31 + 0x0060] |
| 10811 | ba,a .+8 |
| 10812 | jmpl %r27+0, %r27 |
| 10813 | .word 0xd4bfc031 ! 30: STDA_R stda %r10, [%r31 + %r17] 0x01 |
| 10814 | nop |
| 10815 | ta T_CHANGE_HPRIV |
| 10816 | mov 0x2+1, %r10 |
| 10817 | set sync_thr_counter5, %r23 |
| 10818 | #ifndef SPC |
| 10819 | ldxa [%g0]0x63, %o1 |
| 10820 | and %o1, 0x38, %o1 |
| 10821 | add %o1, %r23, %r23 |
| 10822 | sllx %o1, 5, %o3 !(CID*256) |
| 10823 | #endif |
| 10824 | cas [%r23],%g0,%r10 !lock |
| 10825 | brnz %r10, cwq_2_23 |
| 10826 | rd %asi, %r12 |
| 10827 | wr %g0, 0x40, %asi |
| 10828 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 10829 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 10830 | cmp %l1, 1 |
| 10831 | bne cwq_2_23 |
| 10832 | set CWQ_BASE, %l6 |
| 10833 | #ifndef SPC |
| 10834 | add %l6, %o3, %l6 |
| 10835 | #endif |
| 10836 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 10837 | best_set_reg(0x20610020, %l1, %l2) !# Control Word |
| 10838 | sllx %l2, 32, %l2 |
| 10839 | stx %l2, [%l6 + 0x0] |
| 10840 | membar #Sync |
| 10841 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 10842 | sub %l2, 0x40, %l2 |
| 10843 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 10844 | wr %r12, %g0, %asi |
| 10845 | st %g0, [%r23] |
| 10846 | cwq_2_23: |
| 10847 | ta T_CHANGE_NONHPRIV |
| 10848 | .word 0xa9414000 ! 31: RDPC rd %pc, %r20 |
| 10849 | .word 0x879c7a19 ! 32: WRHPR_HINTP_I wrhpr %r17, 0x1a19, %hintp |
| 10850 | .word 0xd497e040 ! 33: LDUHA_I lduha [%r31, + 0x0040] %asi, %r10 |
| 10851 | iaw_2_24: |
| 10852 | nop |
| 10853 | ta T_CHANGE_HPRIV |
| 10854 | mov 8, %r18 |
| 10855 | rd %asi, %r12 |
| 10856 | wr %r0, 0x41, %asi |
| 10857 | set sync_thr_counter4, %r23 |
| 10858 | #ifndef SPC |
| 10859 | ldxa [%g0]0x63, %r8 |
| 10860 | and %r8, 0x38, %r8 ! Core ID |
| 10861 | add %r8, %r23, %r23 |
| 10862 | #else |
| 10863 | mov 0, %r8 |
| 10864 | #endif |
| 10865 | mov 0x2, %r16 |
| 10866 | iaw_startwait2_24: |
| 10867 | cas [%r23],%g0,%r16 !lock |
| 10868 | brz,a %r16, continue_iaw_2_24 |
| 10869 | mov (~0x2&0xf), %r16 |
| 10870 | ld [%r23], %r16 |
| 10871 | iaw_wait2_24: |
| 10872 | brnz %r16, iaw_wait2_24 |
| 10873 | ld [%r23], %r16 |
| 10874 | ba iaw_startwait2_24 |
| 10875 | mov 0x2, %r16 |
| 10876 | continue_iaw_2_24: |
| 10877 | sllx %r16, %r8, %r16 !Mask for my core only |
| 10878 | ldxa [0x58]%asi, %r17 !Running_status |
| 10879 | wait_for_stat_2_24: |
| 10880 | ldxa [0x50]%asi, %r13 !Running_rw |
| 10881 | cmp %r13, %r17 |
| 10882 | bne,a %xcc, wait_for_stat_2_24 |
| 10883 | ldxa [0x58]%asi, %r17 !Running_status |
| 10884 | stxa %r16, [0x68]%asi !Park (W1C) |
| 10885 | ldxa [0x50]%asi, %r14 !Running_rw |
| 10886 | wait_for_iaw_2_24: |
| 10887 | ldxa [0x58]%asi, %r17 !Running_status |
| 10888 | cmp %r14, %r17 |
| 10889 | bne,a %xcc, wait_for_iaw_2_24 |
| 10890 | ldxa [0x50]%asi, %r14 !Running_rw |
| 10891 | iaw_doit2_24: |
| 10892 | mov 0x38, %r18 |
| 10893 | iaw0_2_24: |
| 10894 | rd %pc, %r19 |
| 10895 | add %r19, (16+1), %r19 |
| 10896 | stxa %r19, [%r18]0x50 |
| 10897 | stxa %r16, [0x60] %asi ! Unpark (W1S) |
| 10898 | st %g0, [%r23] !clear lock |
| 10899 | wr %r0, %r12, %asi ! restore %asi |
| 10900 | ta T_CHANGE_NONHPRIV |
| 10901 | .word 0xc32fc011 ! 34: STXFSR_R st-sfr %f1, [%r17, %r31] |
| 10902 | splash_lsu_2_25: |
| 10903 | nop |
| 10904 | ta T_CHANGE_HPRIV |
| 10905 | set 0xa354933a, %r2 |
| 10906 | mov 0x1, %r1 |
| 10907 | sllx %r1, 32, %r1 |
| 10908 | or %r1, %r2, %r2 |
| 10909 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 10910 | ta T_CHANGE_NONHPRIV |
| 10911 | .word 0x3d400001 ! 35: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 10912 | .word 0xa780c014 ! 36: WR_GRAPHICS_STATUS_REG_R wr %r3, %r20, %- |
| 10913 | nop |
| 10914 | ta T_CHANGE_HPRIV ! macro |
| 10915 | donret_2_27: |
| 10916 | rd %pc, %r12 |
| 10917 | add %r12, (donretarg_2_27-donret_2_27), %r12 |
| 10918 | add %r12, 0x4, %r11 ! seq tnpc |
| 10919 | wrpr %g0, 0x2, %tl |
| 10920 | wrpr %g0, %r12, %tpc |
| 10921 | wrpr %g0, %r11, %tnpc |
| 10922 | set (0x00e83b00 | (28 << 24)), %r13 |
| 10923 | and %r12, 0xfff, %r14 |
| 10924 | sllx %r14, 30, %r14 |
| 10925 | or %r13, %r14, %r20 |
| 10926 | wrpr %r20, %g0, %tstate |
| 10927 | wrhpr %g0, 0x84f, %htstate |
| 10928 | ta T_CHANGE_NONHPRIV ! rand=1 (2) |
| 10929 | .word 0x2f400001 ! 1: FBPU fbu,a,pn %fcc0, <label_0x1> |
| 10930 | done |
| 10931 | donretarg_2_27: |
| 10932 | .word 0x28800001 ! 37: BLEU bleu,a <label_0x1> |
| 10933 | #if (defined SPC || defined CMP1) |
| 10934 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_28) + 0, 16, 16)) -> intp(7,0,6) |
| 10935 | #else |
| 10936 | setx 0xeaaed28d61ad439c, %r1, %r28 |
| 10937 | stxa %r28, [%g0] 0x73 |
| 10938 | #endif |
| 10939 | intvec_2_28: |
| 10940 | .word 0x39400001 ! 38: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 10941 | .word 0x91924014 ! 39: WRPR_PIL_R wrpr %r9, %r20, %pil |
| 10942 | nop |
| 10943 | ta T_CHANGE_HPRIV |
| 10944 | mov 0x2, %r10 |
| 10945 | set sync_thr_counter6, %r23 |
| 10946 | #ifndef SPC |
| 10947 | ldxa [%g0]0x63, %o1 |
| 10948 | and %o1, 0x38, %o1 |
| 10949 | add %o1, %r23, %r23 |
| 10950 | #endif |
| 10951 | cas [%r23],%g0,%r10 !lock |
| 10952 | brnz %r10, sma_2_30 |
| 10953 | rd %asi, %r12 |
| 10954 | wr %g0, 0x40, %asi |
| 10955 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 10956 | set 0x00021fff, %g1 |
| 10957 | stxa %g1, [%g0 + 0x80] %asi |
| 10958 | wr %r12, %g0, %asi |
| 10959 | st %g0, [%r23] |
| 10960 | sma_2_30: |
| 10961 | ta T_CHANGE_NONHPRIV |
| 10962 | .word 0xd5e7e009 ! 40: CASA_R casa [%r31] %asi, %r9, %r10 |
| 10963 | .word 0xd497e0a0 ! 41: LDUHA_I lduha [%r31, + 0x00a0] %asi, %r10 |
| 10964 | .word 0x8d802000 ! 42: WRFPRS_I wr %r0, 0x0000, %fprs |
| 10965 | intveclr_2_31: |
| 10966 | nop |
| 10967 | ta T_CHANGE_HPRIV |
| 10968 | setx 0x809b850e130b263a, %r1, %r28 |
| 10969 | stxa %r28, [%g0] 0x72 |
| 10970 | ta T_CHANGE_NONHPRIV |
| 10971 | .word 0x25400001 ! 43: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 10972 | .word 0xa7840010 ! 44: WR_GRAPHICS_STATUS_REG_R wr %r16, %r16, %- |
| 10973 | .word 0x8143e011 ! 45: MEMBAR membar #LoadLoad | #Lookaside |
| 10974 | fpinit_2_34: |
| 10975 | nop |
| 10976 | setx fp_data_quads, %r19, %r20 |
| 10977 | ldd [%r20], %f0 |
| 10978 | ldd [%r20+8], %f4 |
| 10979 | ld [%r20+16], %fsr |
| 10980 | ld [%r20+24], %r19 |
| 10981 | wr %r19, %g0, %gsr |
| 10982 | .word 0xc3e82af6 ! 46: PREFETCHA_I prefetcha [%r0, + 0x0af6] %asi, #one_read |
| 10983 | .word 0x29800001 ! 47: FBL fbl,a <label_0x1> |
| 10984 | splash_hpstate_2_36: |
| 10985 | .word 0x2c800001 ! 1: BNEG bneg,a <label_0x1> |
| 10986 | .word 0x819822cb ! 48: WRHPR_HPSTATE_I wrhpr %r0, 0x02cb, %hpstate |
| 10987 | nop |
| 10988 | ta T_CHANGE_HPRIV |
| 10989 | mov 0x2+1, %r10 |
| 10990 | set sync_thr_counter5, %r23 |
| 10991 | #ifndef SPC |
| 10992 | ldxa [%g0]0x63, %o1 |
| 10993 | and %o1, 0x38, %o1 |
| 10994 | add %o1, %r23, %r23 |
| 10995 | sllx %o1, 5, %o3 !(CID*256) |
| 10996 | #endif |
| 10997 | cas [%r23],%g0,%r10 !lock |
| 10998 | brnz %r10, cwq_2_37 |
| 10999 | rd %asi, %r12 |
| 11000 | wr %g0, 0x40, %asi |
| 11001 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 11002 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 11003 | cmp %l1, 1 |
| 11004 | bne cwq_2_37 |
| 11005 | set CWQ_BASE, %l6 |
| 11006 | #ifndef SPC |
| 11007 | add %l6, %o3, %l6 |
| 11008 | #endif |
| 11009 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 11010 | best_set_reg(0x206100a0, %l1, %l2) !# Control Word |
| 11011 | sllx %l2, 32, %l2 |
| 11012 | stx %l2, [%l6 + 0x0] |
| 11013 | membar #Sync |
| 11014 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 11015 | sub %l2, 0x40, %l2 |
| 11016 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 11017 | wr %r12, %g0, %asi |
| 11018 | st %g0, [%r23] |
| 11019 | cwq_2_37: |
| 11020 | ta T_CHANGE_NONHPRIV |
| 11021 | .word 0x9b414000 ! 49: RDPC rd %pc, %r13 |
| 11022 | splash_hpstate_2_38: |
| 11023 | ta T_CHANGE_NONHPRIV |
| 11024 | .word 0x819836d4 ! 50: WRHPR_HPSTATE_I wrhpr %r0, 0x16d4, %hpstate |
| 11025 | fbe skip_2_39 |
| 11026 | .word 0x87ac8a43 ! 1: FCMPd fcmpd %fcc<n>, %f18, %f34 |
| 11027 | .align 2048 |
| 11028 | skip_2_39: |
| 11029 | .word 0xc36fe0e0 ! 51: PREFETCH_I prefetch [%r31 + 0x00e0], #one_read |
| 11030 | invalw |
| 11031 | mov 0xb0, %r30 |
| 11032 | .word 0x91d0001e ! 52: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 11033 | splash_cmpr_2_40: |
| 11034 | mov 0, %r18 |
| 11035 | sllx %r18, 63, %r18 |
| 11036 | rd %tick, %r17 |
| 11037 | add %r17, 0x70, %r17 |
| 11038 | or %r17, %r18, %r17 |
| 11039 | .word 0xb3800011 ! 53: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 11040 | setx 0x63f0e0d6b55a2d92, %r1, %r28 |
| 11041 | stxa %r28, [%g0] 0x73 |
| 11042 | intvec_2_41: |
| 11043 | .word 0x39400001 ! 54: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 11044 | trapasi_2_42: |
| 11045 | nop |
| 11046 | mov 0x0, %r1 ! (VA for ASI 0x73) |
| 11047 | .word 0xe4884e60 ! 55: LDUBA_R lduba [%r1, %r0] 0x73, %r18 |
| 11048 | memptr_2_43: |
| 11049 | set 0x60340000, %r31 |
| 11050 | .word 0x8582670c ! 56: WRCCR_I wr %r9, 0x070c, %ccr |
| 11051 | memptr_2_44: |
| 11052 | set 0x60740000, %r31 |
| 11053 | .word 0x85817a8c ! 57: WRCCR_I wr %r5, 0x1a8c, %ccr |
| 11054 | .word 0x9ba50d2d ! 58: FsMULd fsmuld %f20, %f44, %f44 |
| 11055 | nop |
| 11056 | ta T_CHANGE_HPRIV ! macro |
| 11057 | donret_2_45: |
| 11058 | rd %pc, %r12 |
| 11059 | add %r12, (donretarg_2_45-donret_2_45+4), %r12 |
| 11060 | add %r12, 0x4, %r11 ! seq tnpc |
| 11061 | wrpr %g0, 0x2, %tl |
| 11062 | wrpr %g0, %r12, %tpc |
| 11063 | wrpr %g0, %r11, %tnpc |
| 11064 | set (0x00999800 | (0x89 << 24)), %r13 |
| 11065 | and %r12, 0xfff, %r14 |
| 11066 | sllx %r14, 30, %r14 |
| 11067 | or %r13, %r14, %r20 |
| 11068 | wrpr %r20, %g0, %tstate |
| 11069 | wrhpr %g0, 0xedd, %htstate |
| 11070 | ta T_CHANGE_NONHPRIV ! rand=1 (2) |
| 11071 | done |
| 11072 | donretarg_2_45: |
| 11073 | .word 0xd4ffe1bc ! 59: SWAPA_I swapa %r10, [%r31 + 0x01bc] %asi |
| 11074 | iaw_2_46: |
| 11075 | nop |
| 11076 | ta T_CHANGE_HPRIV |
| 11077 | mov 8, %r18 |
| 11078 | rd %asi, %r12 |
| 11079 | wr %r0, 0x41, %asi |
| 11080 | set sync_thr_counter4, %r23 |
| 11081 | #ifndef SPC |
| 11082 | ldxa [%g0]0x63, %r8 |
| 11083 | and %r8, 0x38, %r8 ! Core ID |
| 11084 | add %r8, %r23, %r23 |
| 11085 | #else |
| 11086 | mov 0, %r8 |
| 11087 | #endif |
| 11088 | mov 0x2, %r16 |
| 11089 | iaw_startwait2_46: |
| 11090 | cas [%r23],%g0,%r16 !lock |
| 11091 | brz,a %r16, continue_iaw_2_46 |
| 11092 | mov (~0x2&0xf), %r16 |
| 11093 | ld [%r23], %r16 |
| 11094 | iaw_wait2_46: |
| 11095 | brnz %r16, iaw_wait2_46 |
| 11096 | ld [%r23], %r16 |
| 11097 | ba iaw_startwait2_46 |
| 11098 | mov 0x2, %r16 |
| 11099 | continue_iaw_2_46: |
| 11100 | sllx %r16, %r8, %r16 !Mask for my core only |
| 11101 | ldxa [0x58]%asi, %r17 !Running_status |
| 11102 | wait_for_stat_2_46: |
| 11103 | ldxa [0x50]%asi, %r13 !Running_rw |
| 11104 | cmp %r13, %r17 |
| 11105 | bne,a %xcc, wait_for_stat_2_46 |
| 11106 | ldxa [0x58]%asi, %r17 !Running_status |
| 11107 | stxa %r16, [0x68]%asi !Park (W1C) |
| 11108 | ldxa [0x50]%asi, %r14 !Running_rw |
| 11109 | wait_for_iaw_2_46: |
| 11110 | ldxa [0x58]%asi, %r17 !Running_status |
| 11111 | cmp %r14, %r17 |
| 11112 | bne,a %xcc, wait_for_iaw_2_46 |
| 11113 | ldxa [0x50]%asi, %r14 !Running_rw |
| 11114 | iaw_doit2_46: |
| 11115 | mov 0x38, %r18 |
| 11116 | iaw4_2_46: |
| 11117 | setx common_target, %r20, %r19 |
| 11118 | or %r19, 0x1, %r19 |
| 11119 | stxa %r19, [%r18]0x50 |
| 11120 | stxa %r16, [0x60] %asi ! Unpark (W1S) |
| 11121 | st %g0, [%r23] !clear lock |
| 11122 | wr %r0, %r12, %asi ! restore %asi |
| 11123 | ta T_CHANGE_NONHPRIV |
| 11124 | .word 0x87ac4a48 ! 60: FCMPd fcmpd %fcc<n>, %f48, %f8 |
| 11125 | splash_tba_2_47: |
| 11126 | nop |
| 11127 | ta T_CHANGE_PRIV |
| 11128 | setx 0x00000004003a0000, %r11, %r12 |
| 11129 | .word 0x8b90000c ! 61: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 11130 | ibp_2_48: |
| 11131 | nop |
| 11132 | ta T_CHANGE_NONHPRIV |
| 11133 | .word 0x87ac8a52 ! 62: FCMPd fcmpd %fcc<n>, %f18, %f18 |
| 11134 | .word 0xa3450000 ! 63: RD_SET_SOFTINT rd %set_softint, %r17 |
| 11135 | .word 0xd677c000 ! 64: STX_R stx %r11, [%r31 + %r0] |
| 11136 | .word 0xd71fe168 ! 65: LDDF_I ldd [%r31, 0x0168], %f11 |
| 11137 | memptr_2_49: |
| 11138 | set 0x60740000, %r31 |
| 11139 | .word 0x85836ab9 ! 66: WRCCR_I wr %r13, 0x0ab9, %ccr |
| 11140 | .word 0x81b01021 ! 67: SIAM siam 1 |
| 11141 | iaw_2_50: |
| 11142 | nop |
| 11143 | ta T_CHANGE_HPRIV |
| 11144 | mov 8, %r18 |
| 11145 | rd %asi, %r12 |
| 11146 | wr %r0, 0x41, %asi |
| 11147 | set sync_thr_counter4, %r23 |
| 11148 | #ifndef SPC |
| 11149 | ldxa [%g0]0x63, %r8 |
| 11150 | and %r8, 0x38, %r8 ! Core ID |
| 11151 | add %r8, %r23, %r23 |
| 11152 | #else |
| 11153 | mov 0, %r8 |
| 11154 | #endif |
| 11155 | mov 0x2, %r16 |
| 11156 | iaw_startwait2_50: |
| 11157 | cas [%r23],%g0,%r16 !lock |
| 11158 | brz,a %r16, continue_iaw_2_50 |
| 11159 | mov (~0x2&0xf), %r16 |
| 11160 | ld [%r23], %r16 |
| 11161 | iaw_wait2_50: |
| 11162 | brnz %r16, iaw_wait2_50 |
| 11163 | ld [%r23], %r16 |
| 11164 | ba iaw_startwait2_50 |
| 11165 | mov 0x2, %r16 |
| 11166 | continue_iaw_2_50: |
| 11167 | sllx %r16, %r8, %r16 !Mask for my core only |
| 11168 | ldxa [0x58]%asi, %r17 !Running_status |
| 11169 | wait_for_stat_2_50: |
| 11170 | ldxa [0x50]%asi, %r13 !Running_rw |
| 11171 | cmp %r13, %r17 |
| 11172 | bne,a %xcc, wait_for_stat_2_50 |
| 11173 | ldxa [0x58]%asi, %r17 !Running_status |
| 11174 | stxa %r16, [0x68]%asi !Park (W1C) |
| 11175 | ldxa [0x50]%asi, %r14 !Running_rw |
| 11176 | wait_for_iaw_2_50: |
| 11177 | ldxa [0x58]%asi, %r17 !Running_status |
| 11178 | cmp %r14, %r17 |
| 11179 | bne,a %xcc, wait_for_iaw_2_50 |
| 11180 | ldxa [0x50]%asi, %r14 !Running_rw |
| 11181 | iaw_doit2_50: |
| 11182 | mov 0x38, %r18 |
| 11183 | iaw1_2_50: |
| 11184 | best_set_reg(0x00000000e1200000, %r20, %r19) |
| 11185 | or %r19, 0x1, %r19 |
| 11186 | stxa %r19, [%r18]0x50 |
| 11187 | stxa %r16, [0x60] %asi ! Unpark (W1S) |
| 11188 | st %g0, [%r23] !clear lock |
| 11189 | wr %r0, %r12, %asi ! restore %asi |
| 11190 | ta T_CHANGE_NONHPRIV |
| 11191 | .word 0x9bb487d0 ! 68: PDIST pdistn %d18, %d16, %d44 |
| 11192 | .word 0xdb1fe008 ! 69: LDDF_I ldd [%r31, 0x0008], %f13 |
| 11193 | .word 0x36780001 ! 70: BPGE <illegal instruction> |
| 11194 | dvapa_2_51: |
| 11195 | nop |
| 11196 | ta T_CHANGE_HPRIV |
| 11197 | mov 0xfaf, %r20 |
| 11198 | mov 0x10, %r19 |
| 11199 | sllx %r20, 23, %r20 |
| 11200 | or %r19, %r20, %r19 |
| 11201 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 11202 | mov 0x38, %r18 |
| 11203 | stxa %r31, [%r18]0x58 |
| 11204 | ta T_CHANGE_NONHPRIV |
| 11205 | .word 0xa5a189c6 ! 71: FDIVd fdivd %f6, %f6, %f18 |
| 11206 | splash_cmpr_2_52: |
| 11207 | mov 0, %r18 |
| 11208 | sllx %r18, 63, %r18 |
| 11209 | rd %tick, %r17 |
| 11210 | add %r17, 0x70, %r17 |
| 11211 | or %r17, %r18, %r17 |
| 11212 | ta T_CHANGE_HPRIV |
| 11213 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 11214 | ta T_CHANGE_PRIV |
| 11215 | .word 0xaf800011 ! 72: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 11216 | intveclr_2_53: |
| 11217 | nop |
| 11218 | ta T_CHANGE_HPRIV |
| 11219 | setx 0x56c382e8012324e0, %r1, %r28 |
| 11220 | stxa %r28, [%g0] 0x72 |
| 11221 | ta T_CHANGE_NONHPRIV |
| 11222 | .word 0x25400001 ! 73: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 11223 | jmptr_2_54: |
| 11224 | nop |
| 11225 | best_set_reg(0xe0a00000, %r20, %r27) |
| 11226 | .word 0xb7c6c000 ! 74: JMPL_R jmpl %r27 + %r0, %r27 |
| 11227 | mondo_2_55: |
| 11228 | nop |
| 11229 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 11230 | ta T_CHANGE_PRIV |
| 11231 | stxa %r5, [%r0+0x3c0] %asi |
| 11232 | .word 0x9d918003 ! 75: WRPR_WSTATE_R wrpr %r6, %r3, %wstate |
| 11233 | #if (defined SPC || defined CMP1) |
| 11234 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_56) + 48, 16, 16)) -> intp(1,0,7) |
| 11235 | #else |
| 11236 | setx 0x58955131797c20a3, %r1, %r28 |
| 11237 | stxa %r28, [%g0] 0x73 |
| 11238 | #endif |
| 11239 | intvec_2_56: |
| 11240 | .word 0x39400001 ! 76: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 11241 | .word 0x89800011 ! 77: WRTICK_R wr %r0, %r17, %tick |
| 11242 | splash_lsu_2_58: |
| 11243 | nop |
| 11244 | ta T_CHANGE_HPRIV |
| 11245 | set 0xd11fa03a, %r2 |
| 11246 | mov 0x1, %r1 |
| 11247 | sllx %r1, 32, %r1 |
| 11248 | or %r1, %r2, %r2 |
| 11249 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 11250 | .word 0x3d400001 ! 78: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 11251 | splash_tba_2_59: |
| 11252 | nop |
| 11253 | ta T_CHANGE_PRIV |
| 11254 | setx 0x00000004003a0000, %r11, %r12 |
| 11255 | .word 0x8b90000c ! 79: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 11256 | .word 0x87802058 ! 80: WRASI_I wr %r0, 0x0058, %asi |
| 11257 | .word 0xd45fe128 ! 81: LDX_I ldx [%r31 + 0x0128], %r10 |
| 11258 | br_badelay1_2_60: |
| 11259 | .word 0xc36fe070 ! 1: PREFETCH_I prefetch [%r31 + 0x0070], #one_read |
| 11260 | .word 0xe9344003 ! 1: STQF_R - %f20, [%r3, %r17] |
| 11261 | .word 0xa9a7c9d1 ! 1: FDIVd fdivd %f62, %f48, %f20 |
| 11262 | normalw |
| 11263 | .word 0x91458000 ! 82: RD_SOFTINT_REG rd %softint, %r8 |
| 11264 | mondo_2_61: |
| 11265 | nop |
| 11266 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 11267 | stxa %r20, [%r0+0x3c8] %asi |
| 11268 | .word 0x9d904013 ! 83: WRPR_WSTATE_R wrpr %r1, %r19, %wstate |
| 11269 | nop |
| 11270 | mov 0x80, %g3 |
| 11271 | stxa %g3, [%g3] 0x57 |
| 11272 | .word 0xe45fc000 ! 84: LDX_R ldx [%r31 + %r0], %r18 |
| 11273 | nop |
| 11274 | ta T_CHANGE_HPRIV |
| 11275 | mov 0x2+1, %r10 |
| 11276 | set sync_thr_counter5, %r23 |
| 11277 | #ifndef SPC |
| 11278 | ldxa [%g0]0x63, %o1 |
| 11279 | and %o1, 0x38, %o1 |
| 11280 | add %o1, %r23, %r23 |
| 11281 | sllx %o1, 5, %o3 !(CID*256) |
| 11282 | #endif |
| 11283 | cas [%r23],%g0,%r10 !lock |
| 11284 | brnz %r10, cwq_2_62 |
| 11285 | rd %asi, %r12 |
| 11286 | wr %g0, 0x40, %asi |
| 11287 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 11288 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 11289 | cmp %l1, 1 |
| 11290 | bne cwq_2_62 |
| 11291 | set CWQ_BASE, %l6 |
| 11292 | #ifndef SPC |
| 11293 | add %l6, %o3, %l6 |
| 11294 | #endif |
| 11295 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 11296 | best_set_reg(0x20610030, %l1, %l2) !# Control Word |
| 11297 | sllx %l2, 32, %l2 |
| 11298 | stx %l2, [%l6 + 0x0] |
| 11299 | membar #Sync |
| 11300 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 11301 | sub %l2, 0x40, %l2 |
| 11302 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 11303 | wr %r12, %g0, %asi |
| 11304 | st %g0, [%r23] |
| 11305 | cwq_2_62: |
| 11306 | ta T_CHANGE_NONHPRIV |
| 11307 | .word 0x9b414000 ! 85: RDPC rd %pc, %r13 |
| 11308 | pmu_2_63: |
| 11309 | nop |
| 11310 | setx 0xfffffd69fffff61a, %g1, %g7 |
| 11311 | .word 0xa3800007 ! 86: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 11312 | splash_tba_2_64: |
| 11313 | nop |
| 11314 | ta T_CHANGE_PRIV |
| 11315 | set 0x120000, %r12 |
| 11316 | .word 0x8b90000c ! 87: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 11317 | splash_cmpr_2_65: |
| 11318 | mov 0, %r18 |
| 11319 | sllx %r18, 63, %r18 |
| 11320 | rd %tick, %r17 |
| 11321 | add %r17, 0x70, %r17 |
| 11322 | or %r17, %r18, %r17 |
| 11323 | ta T_CHANGE_PRIV |
| 11324 | .word 0xaf800011 ! 88: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 11325 | splash_lsu_2_66: |
| 11326 | nop |
| 11327 | ta T_CHANGE_HPRIV |
| 11328 | set 0xcc71382d, %r2 |
| 11329 | mov 0x7, %r1 |
| 11330 | sllx %r1, 32, %r1 |
| 11331 | or %r1, %r2, %r2 |
| 11332 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 11333 | ta T_CHANGE_NONHPRIV |
| 11334 | .word 0x3d400001 ! 89: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 11335 | .word 0xc30fc000 ! 90: LDXFSR_R ld-fsr [%r31, %r0], %f1 |
| 11336 | nop |
| 11337 | ta T_CHANGE_HPRIV |
| 11338 | mov 0x2+1, %r10 |
| 11339 | set sync_thr_counter5, %r23 |
| 11340 | #ifndef SPC |
| 11341 | ldxa [%g0]0x63, %o1 |
| 11342 | and %o1, 0x38, %o1 |
| 11343 | add %o1, %r23, %r23 |
| 11344 | sllx %o1, 5, %o3 !(CID*256) |
| 11345 | #endif |
| 11346 | cas [%r23],%g0,%r10 !lock |
| 11347 | brnz %r10, cwq_2_67 |
| 11348 | rd %asi, %r12 |
| 11349 | wr %g0, 0x40, %asi |
| 11350 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 11351 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 11352 | cmp %l1, 1 |
| 11353 | bne cwq_2_67 |
| 11354 | set CWQ_BASE, %l6 |
| 11355 | #ifndef SPC |
| 11356 | add %l6, %o3, %l6 |
| 11357 | #endif |
| 11358 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 11359 | best_set_reg(0x20610070, %l1, %l2) !# Control Word |
| 11360 | sllx %l2, 32, %l2 |
| 11361 | stx %l2, [%l6 + 0x0] |
| 11362 | membar #Sync |
| 11363 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 11364 | sub %l2, 0x40, %l2 |
| 11365 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 11366 | wr %r12, %g0, %asi |
| 11367 | st %g0, [%r23] |
| 11368 | cwq_2_67: |
| 11369 | ta T_CHANGE_NONHPRIV |
| 11370 | .word 0x95414000 ! 91: RDPC rd %pc, %r10 |
| 11371 | .word 0xd827e1c0 ! 92: STW_I stw %r12, [%r31 + 0x01c0] |
| 11372 | splash_tba_2_68: |
| 11373 | nop |
| 11374 | ta T_CHANGE_PRIV |
| 11375 | set 0x120000, %r12 |
| 11376 | .word 0x8b90000c ! 93: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 11377 | setx 0xb3666800f8d54075, %r1, %r28 |
| 11378 | stxa %r28, [%g0] 0x73 |
| 11379 | intvec_2_69: |
| 11380 | .word 0x39400001 ! 94: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 11381 | nop |
| 11382 | mov 0x80, %g3 |
| 11383 | stxa %g3, [%g3] 0x5f |
| 11384 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 |
| 11385 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 |
| 11386 | .word 0xd85fc000 ! 95: LDX_R ldx [%r31 + %r0], %r12 |
| 11387 | .word 0x8d802000 ! 96: WRFPRS_I wr %r0, 0x0000, %fprs |
| 11388 | iaw_2_70: |
| 11389 | nop |
| 11390 | ta T_CHANGE_HPRIV |
| 11391 | mov 8, %r18 |
| 11392 | rd %asi, %r12 |
| 11393 | wr %r0, 0x41, %asi |
| 11394 | set sync_thr_counter4, %r23 |
| 11395 | #ifndef SPC |
| 11396 | ldxa [%g0]0x63, %r8 |
| 11397 | and %r8, 0x38, %r8 ! Core ID |
| 11398 | add %r8, %r23, %r23 |
| 11399 | #else |
| 11400 | mov 0, %r8 |
| 11401 | #endif |
| 11402 | mov 0x2, %r16 |
| 11403 | iaw_startwait2_70: |
| 11404 | cas [%r23],%g0,%r16 !lock |
| 11405 | brz,a %r16, continue_iaw_2_70 |
| 11406 | mov (~0x2&0xf), %r16 |
| 11407 | ld [%r23], %r16 |
| 11408 | iaw_wait2_70: |
| 11409 | brnz %r16, iaw_wait2_70 |
| 11410 | ld [%r23], %r16 |
| 11411 | ba iaw_startwait2_70 |
| 11412 | mov 0x2, %r16 |
| 11413 | continue_iaw_2_70: |
| 11414 | sllx %r16, %r8, %r16 !Mask for my core only |
| 11415 | ldxa [0x58]%asi, %r17 !Running_status |
| 11416 | wait_for_stat_2_70: |
| 11417 | ldxa [0x50]%asi, %r13 !Running_rw |
| 11418 | cmp %r13, %r17 |
| 11419 | bne,a %xcc, wait_for_stat_2_70 |
| 11420 | ldxa [0x58]%asi, %r17 !Running_status |
| 11421 | stxa %r16, [0x68]%asi !Park (W1C) |
| 11422 | ldxa [0x50]%asi, %r14 !Running_rw |
| 11423 | wait_for_iaw_2_70: |
| 11424 | ldxa [0x58]%asi, %r17 !Running_status |
| 11425 | cmp %r14, %r17 |
| 11426 | bne,a %xcc, wait_for_iaw_2_70 |
| 11427 | ldxa [0x50]%asi, %r14 !Running_rw |
| 11428 | iaw_doit2_70: |
| 11429 | mov 0x38, %r18 |
| 11430 | iaw4_2_70: |
| 11431 | setx common_target, %r20, %r19 |
| 11432 | or %r19, 0x1, %r19 |
| 11433 | stxa %r19, [%r18]0x50 |
| 11434 | stxa %r16, [0x60] %asi ! Unpark (W1S) |
| 11435 | st %g0, [%r23] !clear lock |
| 11436 | wr %r0, %r12, %asi ! restore %asi |
| 11437 | ta T_CHANGE_NONHPRIV |
| 11438 | .word 0xd83fe080 ! 97: STD_I std %r12, [%r31 + 0x0080] |
| 11439 | splash_cmpr_2_71: |
| 11440 | mov 0, %r18 |
| 11441 | sllx %r18, 63, %r18 |
| 11442 | rd %tick, %r17 |
| 11443 | add %r17, 0x70, %r17 |
| 11444 | or %r17, %r18, %r17 |
| 11445 | ta T_CHANGE_HPRIV |
| 11446 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 11447 | ta T_CHANGE_PRIV |
| 11448 | .word 0xaf800011 ! 98: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 11449 | nop |
| 11450 | mov 0x80, %g3 |
| 11451 | stxa %g3, [%g3] 0x57 |
| 11452 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 |
| 11453 | .word 0xd85fc000 ! 99: LDX_R ldx [%r31 + %r0], %r12 |
| 11454 | ceter_2_72: |
| 11455 | nop |
| 11456 | ta T_CHANGE_HPRIV |
| 11457 | mov 7, %r17 |
| 11458 | sllx %r17, 60, %r17 |
| 11459 | mov 0x18, %r16 |
| 11460 | stxa %r17, [%r16]0x4c |
| 11461 | ta T_CHANGE_NONHPRIV |
| 11462 | .word 0x9b410000 ! 100: RDTICK rd %tick, %r13 |
| 11463 | .word 0x2ccd0001 ! 1: BRGZ brgz,a,pt %r20,<label_0xd0001> |
| 11464 | .word 0x8d903175 ! 101: WRPR_PSTATE_I wrpr %r0, 0x1175, %pstate |
| 11465 | intveclr_2_74: |
| 11466 | nop |
| 11467 | ta T_CHANGE_HPRIV |
| 11468 | setx 0xc9ab9ffcedddc9b1, %r1, %r28 |
| 11469 | stxa %r28, [%g0] 0x72 |
| 11470 | ta T_CHANGE_NONHPRIV |
| 11471 | .word 0x25400001 ! 102: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 11472 | fpinit_2_75: |
| 11473 | nop |
| 11474 | setx fp_data_quads, %r19, %r20 |
| 11475 | ldd [%r20], %f0 |
| 11476 | ldd [%r20+8], %f4 |
| 11477 | ld [%r20+16], %fsr |
| 11478 | ld [%r20+24], %r19 |
| 11479 | wr %r19, %g0, %gsr |
| 11480 | .word 0x8da009a4 ! 103: FDIVs fdivs %f0, %f4, %f6 |
| 11481 | jmptr_2_76: |
| 11482 | nop |
| 11483 | best_set_reg(0xe0a00000, %r20, %r27) |
| 11484 | .word 0xb7c6c000 ! 104: JMPL_R jmpl %r27 + %r0, %r27 |
| 11485 | jmptr_2_77: |
| 11486 | nop |
| 11487 | best_set_reg(0xe0a00000, %r20, %r27) |
| 11488 | .word 0xb7c6c000 ! 105: JMPL_R jmpl %r27 + %r0, %r27 |
| 11489 | nop |
| 11490 | ta T_CHANGE_HPRIV |
| 11491 | mov 0x2, %r10 |
| 11492 | set sync_thr_counter6, %r23 |
| 11493 | #ifndef SPC |
| 11494 | ldxa [%g0]0x63, %o1 |
| 11495 | and %o1, 0x38, %o1 |
| 11496 | add %o1, %r23, %r23 |
| 11497 | #endif |
| 11498 | cas [%r23],%g0,%r10 !lock |
| 11499 | brnz %r10, sma_2_78 |
| 11500 | rd %asi, %r12 |
| 11501 | wr %g0, 0x40, %asi |
| 11502 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 11503 | set 0x00121fff, %g1 |
| 11504 | stxa %g1, [%g0 + 0x80] %asi |
| 11505 | wr %r12, %g0, %asi |
| 11506 | st %g0, [%r23] |
| 11507 | sma_2_78: |
| 11508 | ta T_CHANGE_NONHPRIV |
| 11509 | .word 0xe9e7e011 ! 106: CASA_R casa [%r31] %asi, %r17, %r20 |
| 11510 | nop |
| 11511 | ta T_CHANGE_HPRIV |
| 11512 | mov 0x2, %r10 |
| 11513 | set sync_thr_counter6, %r23 |
| 11514 | #ifndef SPC |
| 11515 | ldxa [%g0]0x63, %o1 |
| 11516 | and %o1, 0x38, %o1 |
| 11517 | add %o1, %r23, %r23 |
| 11518 | #endif |
| 11519 | cas [%r23],%g0,%r10 !lock |
| 11520 | brnz %r10, sma_2_79 |
| 11521 | rd %asi, %r12 |
| 11522 | wr %g0, 0x40, %asi |
| 11523 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 11524 | set 0x00161fff, %g1 |
| 11525 | stxa %g1, [%g0 + 0x80] %asi |
| 11526 | wr %r12, %g0, %asi |
| 11527 | st %g0, [%r23] |
| 11528 | sma_2_79: |
| 11529 | ta T_CHANGE_NONHPRIV |
| 11530 | .word 0xe9e7e00c ! 107: CASA_R casa [%r31] %asi, %r12, %r20 |
| 11531 | splash_cmpr_2_80: |
| 11532 | mov 0, %r18 |
| 11533 | sllx %r18, 63, %r18 |
| 11534 | rd %tick, %r17 |
| 11535 | add %r17, 0x50, %r17 |
| 11536 | or %r17, %r18, %r17 |
| 11537 | ta T_CHANGE_HPRIV |
| 11538 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 11539 | .word 0xaf800011 ! 108: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 11540 | ibp_2_81: |
| 11541 | nop |
| 11542 | .word 0xe1bfe100 ! 109: STDFA_I stda %f16, [0x0100, %r31] |
| 11543 | .word 0xe88008a0 ! 110: LDUWA_R lduwa [%r0, %r0] 0x45, %r20 |
| 11544 | .word 0x87aa4ad0 ! 111: FCMPEd fcmped %fcc<n>, %f40, %f16 |
| 11545 | nop |
| 11546 | ta T_CHANGE_HPRIV |
| 11547 | mov 0x2+1, %r10 |
| 11548 | set sync_thr_counter5, %r23 |
| 11549 | #ifndef SPC |
| 11550 | ldxa [%g0]0x63, %o1 |
| 11551 | and %o1, 0x38, %o1 |
| 11552 | add %o1, %r23, %r23 |
| 11553 | sllx %o1, 5, %o3 !(CID*256) |
| 11554 | #endif |
| 11555 | cas [%r23],%g0,%r10 !lock |
| 11556 | brnz %r10, cwq_2_82 |
| 11557 | rd %asi, %r12 |
| 11558 | wr %g0, 0x40, %asi |
| 11559 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 11560 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 11561 | cmp %l1, 1 |
| 11562 | bne cwq_2_82 |
| 11563 | set CWQ_BASE, %l6 |
| 11564 | #ifndef SPC |
| 11565 | add %l6, %o3, %l6 |
| 11566 | #endif |
| 11567 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 11568 | best_set_reg(0x206100b0, %l1, %l2) !# Control Word |
| 11569 | sllx %l2, 32, %l2 |
| 11570 | stx %l2, [%l6 + 0x0] |
| 11571 | membar #Sync |
| 11572 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 11573 | sub %l2, 0x40, %l2 |
| 11574 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 11575 | wr %r12, %g0, %asi |
| 11576 | st %g0, [%r23] |
| 11577 | cwq_2_82: |
| 11578 | ta T_CHANGE_NONHPRIV |
| 11579 | .word 0x93414000 ! 112: RDPC rd %pc, %r9 |
| 11580 | cwp_2_83: |
| 11581 | set user_data_start, %o7 |
| 11582 | .word 0x93902001 ! 113: WRPR_CWP_I wrpr %r0, 0x0001, %cwp |
| 11583 | .word 0x90dc0011 ! 114: SMULcc_R smulcc %r16, %r17, %r8 |
| 11584 | .word 0x8d802000 ! 115: WRFPRS_I wr %r0, 0x0000, %fprs |
| 11585 | trapasi_2_84: |
| 11586 | nop |
| 11587 | mov 0x3c8, %r1 ! (VA for ASI 0x25) |
| 11588 | .word 0xe48844a0 ! 116: LDUBA_R lduba [%r1, %r0] 0x25, %r18 |
| 11589 | .word 0x8d802004 ! 117: WRFPRS_I wr %r0, 0x0004, %fprs |
| 11590 | trapasi_2_85: |
| 11591 | nop |
| 11592 | mov 0x3e8, %r1 ! (VA for ASI 0x25) |
| 11593 | .word 0xe49044a0 ! 118: LDUHA_R lduha [%r1, %r0] 0x25, %r18 |
| 11594 | .word 0x9753c000 ! 119: RDPR_FQ <illegal instruction> |
| 11595 | splash_hpstate_2_86: |
| 11596 | .word 0x22ca0001 ! 1: BRZ brz,a,pt %r8,<label_0xa0001> |
| 11597 | .word 0x819822d5 ! 120: WRHPR_HPSTATE_I wrhpr %r0, 0x02d5, %hpstate |
| 11598 | intveclr_2_87: |
| 11599 | nop |
| 11600 | ta T_CHANGE_HPRIV |
| 11601 | setx 0xfc7d9d5fa4eaff96, %r1, %r28 |
| 11602 | stxa %r28, [%g0] 0x72 |
| 11603 | .word 0x25400001 ! 121: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 11604 | .word 0xe937e0c9 ! 122: STQF_I - %f20, [0x00c9, %r31] |
| 11605 | .word 0x9ac4eb10 ! 123: ADDCcc_I addccc %r19, 0x0b10, %r13 |
| 11606 | #if (defined SPC || defined CMP1) |
| 11607 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_88) + 0, 16, 16)) -> intp(2,0,20) |
| 11608 | #else |
| 11609 | setx 0xe9ff13302e336074, %r1, %r28 |
| 11610 | stxa %r28, [%g0] 0x73 |
| 11611 | #endif |
| 11612 | intvec_2_88: |
| 11613 | .word 0x39400001 ! 124: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 11614 | trapasi_2_89: |
| 11615 | nop |
| 11616 | mov 0x0, %r1 ! (VA for ASI 0x73) |
| 11617 | .word 0xe8d04e60 ! 125: LDSHA_R ldsha [%r1, %r0] 0x73, %r20 |
| 11618 | trapasi_2_90: |
| 11619 | nop |
| 11620 | mov 0x3e0, %r1 ! (VA for ASI 0x25) |
| 11621 | .word 0xe89044a0 ! 126: LDUHA_R lduha [%r1, %r0] 0x25, %r20 |
| 11622 | fbuge,a,pn %fcc0, skip_2_91 |
| 11623 | .word 0x9f803f18 ! 1: SIR sir 0x1f18 |
| 11624 | .align 512 |
| 11625 | skip_2_91: |
| 11626 | .word 0x87a9ca52 ! 127: FCMPd fcmpd %fcc<n>, %f38, %f18 |
| 11627 | intveclr_2_92: |
| 11628 | nop |
| 11629 | ta T_CHANGE_HPRIV |
| 11630 | setx 0x362894d849e421b4, %r1, %r28 |
| 11631 | stxa %r28, [%g0] 0x72 |
| 11632 | ta T_CHANGE_NONHPRIV |
| 11633 | .word 0x25400001 ! 128: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 11634 | trapasi_2_93: |
| 11635 | nop |
| 11636 | mov 0x18, %r1 ! (VA for ASI 0x50) |
| 11637 | .word 0xd0d04a00 ! 129: LDSHA_R ldsha [%r1, %r0] 0x50, %r8 |
| 11638 | .word 0x89800011 ! 130: WRTICK_R wr %r0, %r17, %tick |
| 11639 | .word 0xe19fc2c0 ! 131: LDDFA_R ldda [%r31, %r0], %f16 |
| 11640 | .word 0x89800011 ! 132: WRTICK_R wr %r0, %r17, %tick |
| 11641 | .word 0xd197e1b8 ! 133: LDQFA_I - [%r31, 0x01b8], %f8 |
| 11642 | dvapa_2_96: |
| 11643 | nop |
| 11644 | ta T_CHANGE_HPRIV |
| 11645 | mov 0xb52, %r20 |
| 11646 | mov 0xa, %r19 |
| 11647 | sllx %r20, 23, %r20 |
| 11648 | or %r19, %r20, %r19 |
| 11649 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 11650 | mov 0x38, %r18 |
| 11651 | stxa %r31, [%r18]0x58 |
| 11652 | ta T_CHANGE_NONHPRIV |
| 11653 | .word 0xc3ea802c ! 134: PREFETCHA_R prefetcha [%r10, %r12] 0x01, #one_read |
| 11654 | .word 0xd13fc000 ! 135: STDF_R std %f8, [%r0, %r31] |
| 11655 | otherw |
| 11656 | mov 0x30, %r30 |
| 11657 | .word 0x83d0001e ! 136: Tcc_R te icc_or_xcc, %r0 + %r30 |
| 11658 | .word 0x8780201c ! 137: WRASI_I wr %r0, 0x001c, %asi |
| 11659 | memptr_2_97: |
| 11660 | set 0x60340000, %r31 |
| 11661 | .word 0x8580f984 ! 138: WRCCR_I wr %r3, 0x1984, %ccr |
| 11662 | splash_cmpr_2_98: |
| 11663 | mov 0, %r18 |
| 11664 | sllx %r18, 63, %r18 |
| 11665 | rd %tick, %r17 |
| 11666 | add %r17, 0x80, %r17 |
| 11667 | or %r17, %r18, %r17 |
| 11668 | .word 0xaf800011 ! 139: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 11669 | .word 0x87ad0a28 ! 140: FCMPs fcmps %fcc<n>, %f20, %f8 |
| 11670 | .word 0x89800011 ! 141: WRTICK_R wr %r0, %r17, %tick |
| 11671 | .word 0xd0c7e078 ! 142: LDSWA_I ldswa [%r31, + 0x0078] %asi, %r8 |
| 11672 | splash_tba_2_100: |
| 11673 | nop |
| 11674 | ta T_CHANGE_PRIV |
| 11675 | set 0x120000, %r12 |
| 11676 | .word 0x8b90000c ! 143: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 11677 | change_to_randtl_2_101: |
| 11678 | ta T_CHANGE_HPRIV ! macro |
| 11679 | done_change_to_randtl_2_101: |
| 11680 | .word 0x8f902000 ! 144: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 11681 | nop |
| 11682 | ta T_CHANGE_HPRIV ! macro |
| 11683 | donret_2_102: |
| 11684 | rd %pc, %r12 |
| 11685 | add %r12, (donretarg_2_102-donret_2_102+4), %r12 |
| 11686 | add %r12, 0x4, %r11 ! seq tnpc |
| 11687 | wrpr %g0, 0x2, %tl |
| 11688 | wrpr %g0, %r12, %tpc |
| 11689 | wrpr %g0, %r11, %tnpc |
| 11690 | set (0x0078c600 | (0x88 << 24)), %r13 |
| 11691 | and %r12, 0xfff, %r14 |
| 11692 | sllx %r14, 30, %r14 |
| 11693 | or %r13, %r14, %r20 |
| 11694 | wrpr %r20, %g0, %tstate |
| 11695 | wrhpr %g0, 0xd1e, %htstate |
| 11696 | ta T_CHANGE_NONHPRIV ! rand=1 (2) |
| 11697 | .word 0x25400001 ! 1: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 11698 | retry |
| 11699 | donretarg_2_102: |
| 11700 | .word 0x3e800001 ! 145: BVC bvc,a <label_0x1> |
| 11701 | iaw_2_103: |
| 11702 | nop |
| 11703 | ta T_CHANGE_HPRIV |
| 11704 | mov 8, %r18 |
| 11705 | rd %asi, %r12 |
| 11706 | wr %r0, 0x41, %asi |
| 11707 | set sync_thr_counter4, %r23 |
| 11708 | #ifndef SPC |
| 11709 | ldxa [%g0]0x63, %r8 |
| 11710 | and %r8, 0x38, %r8 ! Core ID |
| 11711 | add %r8, %r23, %r23 |
| 11712 | #else |
| 11713 | mov 0, %r8 |
| 11714 | #endif |
| 11715 | mov 0x2, %r16 |
| 11716 | iaw_startwait2_103: |
| 11717 | cas [%r23],%g0,%r16 !lock |
| 11718 | brz,a %r16, continue_iaw_2_103 |
| 11719 | mov (~0x2&0xf), %r16 |
| 11720 | ld [%r23], %r16 |
| 11721 | iaw_wait2_103: |
| 11722 | brnz %r16, iaw_wait2_103 |
| 11723 | ld [%r23], %r16 |
| 11724 | ba iaw_startwait2_103 |
| 11725 | mov 0x2, %r16 |
| 11726 | continue_iaw_2_103: |
| 11727 | sllx %r16, %r8, %r16 !Mask for my core only |
| 11728 | ldxa [0x58]%asi, %r17 !Running_status |
| 11729 | wait_for_stat_2_103: |
| 11730 | ldxa [0x50]%asi, %r13 !Running_rw |
| 11731 | cmp %r13, %r17 |
| 11732 | bne,a %xcc, wait_for_stat_2_103 |
| 11733 | ldxa [0x58]%asi, %r17 !Running_status |
| 11734 | stxa %r16, [0x68]%asi !Park (W1C) |
| 11735 | ldxa [0x50]%asi, %r14 !Running_rw |
| 11736 | wait_for_iaw_2_103: |
| 11737 | ldxa [0x58]%asi, %r17 !Running_status |
| 11738 | cmp %r14, %r17 |
| 11739 | bne,a %xcc, wait_for_iaw_2_103 |
| 11740 | ldxa [0x50]%asi, %r14 !Running_rw |
| 11741 | iaw_doit2_103: |
| 11742 | mov 0x38, %r18 |
| 11743 | iaw4_2_103: |
| 11744 | setx common_target, %r20, %r19 |
| 11745 | or %r19, 0x1, %r19 |
| 11746 | stxa %r19, [%r18]0x50 |
| 11747 | stxa %r16, [0x60] %asi ! Unpark (W1S) |
| 11748 | st %g0, [%r23] !clear lock |
| 11749 | wr %r0, %r12, %asi ! restore %asi |
| 11750 | ta T_CHANGE_NONHPRIV |
| 11751 | .word 0xd13fc008 ! 146: STDF_R std %f8, [%r8, %r31] |
| 11752 | .word 0x91d02032 ! 147: Tcc_I ta icc_or_xcc, %r0 + 50 |
| 11753 | nop |
| 11754 | ta T_CHANGE_HPRIV |
| 11755 | mov 0x2+1, %r10 |
| 11756 | set sync_thr_counter5, %r23 |
| 11757 | #ifndef SPC |
| 11758 | ldxa [%g0]0x63, %o1 |
| 11759 | and %o1, 0x38, %o1 |
| 11760 | add %o1, %r23, %r23 |
| 11761 | sllx %o1, 5, %o3 !(CID*256) |
| 11762 | #endif |
| 11763 | cas [%r23],%g0,%r10 !lock |
| 11764 | brnz %r10, cwq_2_104 |
| 11765 | rd %asi, %r12 |
| 11766 | wr %g0, 0x40, %asi |
| 11767 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 11768 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 11769 | cmp %l1, 1 |
| 11770 | bne cwq_2_104 |
| 11771 | set CWQ_BASE, %l6 |
| 11772 | #ifndef SPC |
| 11773 | add %l6, %o3, %l6 |
| 11774 | #endif |
| 11775 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 11776 | best_set_reg(0x206100e0, %l1, %l2) !# Control Word |
| 11777 | sllx %l2, 32, %l2 |
| 11778 | stx %l2, [%l6 + 0x0] |
| 11779 | membar #Sync |
| 11780 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 11781 | sub %l2, 0x40, %l2 |
| 11782 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 11783 | wr %r12, %g0, %asi |
| 11784 | st %g0, [%r23] |
| 11785 | cwq_2_104: |
| 11786 | ta T_CHANGE_NONHPRIV |
| 11787 | .word 0x91414000 ! 148: RDPC rd %pc, %r8 |
| 11788 | mondo_2_105: |
| 11789 | nop |
| 11790 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 11791 | ta T_CHANGE_PRIV |
| 11792 | stxa %r8, [%r0+0x3e8] %asi |
| 11793 | .word 0x9d930005 ! 149: WRPR_WSTATE_R wrpr %r12, %r5, %wstate |
| 11794 | .word 0xc19fe060 ! 150: LDDFA_I ldda [%r31, 0x0060], %f0 |
| 11795 | nop |
| 11796 | ta T_CHANGE_HPRIV |
| 11797 | mov 0x2+1, %r10 |
| 11798 | set sync_thr_counter5, %r23 |
| 11799 | #ifndef SPC |
| 11800 | ldxa [%g0]0x63, %o1 |
| 11801 | and %o1, 0x38, %o1 |
| 11802 | add %o1, %r23, %r23 |
| 11803 | sllx %o1, 5, %o3 !(CID*256) |
| 11804 | #endif |
| 11805 | cas [%r23],%g0,%r10 !lock |
| 11806 | brnz %r10, cwq_2_106 |
| 11807 | rd %asi, %r12 |
| 11808 | wr %g0, 0x40, %asi |
| 11809 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 11810 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 11811 | cmp %l1, 1 |
| 11812 | bne cwq_2_106 |
| 11813 | set CWQ_BASE, %l6 |
| 11814 | #ifndef SPC |
| 11815 | add %l6, %o3, %l6 |
| 11816 | #endif |
| 11817 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 11818 | best_set_reg(0x206100a0, %l1, %l2) !# Control Word |
| 11819 | sllx %l2, 32, %l2 |
| 11820 | stx %l2, [%l6 + 0x0] |
| 11821 | membar #Sync |
| 11822 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 11823 | sub %l2, 0x40, %l2 |
| 11824 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 11825 | wr %r12, %g0, %asi |
| 11826 | st %g0, [%r23] |
| 11827 | cwq_2_106: |
| 11828 | ta T_CHANGE_NONHPRIV |
| 11829 | .word 0xa9414000 ! 151: RDPC rd %pc, %r20 |
| 11830 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 11831 | reduce_priv_lvl_2_107: |
| 11832 | ta T_CHANGE_NONPRIV ! macro |
| 11833 | #if (defined SPC || defined CMP1) |
| 11834 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_108) + 56, 16, 16)) -> intp(2,0,2) |
| 11835 | #else |
| 11836 | setx 0xa33c94c012e9af27, %r1, %r28 |
| 11837 | stxa %r28, [%g0] 0x73 |
| 11838 | #endif |
| 11839 | intvec_2_108: |
| 11840 | .word 0x39400001 ! 153: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 11841 | .word 0x8d902e5d ! 154: WRPR_PSTATE_I wrpr %r0, 0x0e5d, %pstate |
| 11842 | dvapa_2_110: |
| 11843 | nop |
| 11844 | ta T_CHANGE_HPRIV |
| 11845 | mov 0x89f, %r20 |
| 11846 | mov 0x1b, %r19 |
| 11847 | sllx %r20, 23, %r20 |
| 11848 | or %r19, %r20, %r19 |
| 11849 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 11850 | mov 0x38, %r18 |
| 11851 | stxa %r31, [%r18]0x58 |
| 11852 | ta T_CHANGE_NONHPRIV |
| 11853 | .word 0x91a309a9 ! 155: FDIVs fdivs %f12, %f9, %f8 |
| 11854 | .word 0xd0800b80 ! 156: LDUWA_R lduwa [%r0, %r0] 0x5c, %r8 |
| 11855 | .word 0x89800011 ! 157: WRTICK_R wr %r0, %r17, %tick |
| 11856 | memptr_2_112: |
| 11857 | set 0x60540000, %r31 |
| 11858 | .word 0x85847ad3 ! 158: WRCCR_I wr %r17, 0x1ad3, %ccr |
| 11859 | .word 0x984c0003 ! 159: MULX_R mulx %r16, %r3, %r12 |
| 11860 | nop |
| 11861 | ta T_CHANGE_HPRIV |
| 11862 | mov 0x2, %r10 |
| 11863 | set sync_thr_counter6, %r23 |
| 11864 | #ifndef SPC |
| 11865 | ldxa [%g0]0x63, %o1 |
| 11866 | and %o1, 0x38, %o1 |
| 11867 | add %o1, %r23, %r23 |
| 11868 | #endif |
| 11869 | cas [%r23],%g0,%r10 !lock |
| 11870 | brnz %r10, sma_2_113 |
| 11871 | rd %asi, %r12 |
| 11872 | wr %g0, 0x40, %asi |
| 11873 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 11874 | set 0x001e1fff, %g1 |
| 11875 | stxa %g1, [%g0 + 0x80] %asi |
| 11876 | wr %r12, %g0, %asi |
| 11877 | st %g0, [%r23] |
| 11878 | sma_2_113: |
| 11879 | ta T_CHANGE_NONHPRIV |
| 11880 | .word 0xe3e7e014 ! 160: CASA_R casa [%r31] %asi, %r20, %r17 |
| 11881 | ibp_2_114: |
| 11882 | nop |
| 11883 | .word 0xc3e94032 ! 161: PREFETCHA_R prefetcha [%r5, %r18] 0x01, #one_read |
| 11884 | memptr_2_115: |
| 11885 | set 0x60740000, %r31 |
| 11886 | .word 0x8582b65c ! 162: WRCCR_I wr %r10, 0x165c, %ccr |
| 11887 | splash_tba_2_116: |
| 11888 | nop |
| 11889 | ta T_CHANGE_PRIV |
| 11890 | set 0x120000, %r12 |
| 11891 | .word 0x8b90000c ! 163: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 11892 | .word 0x9a4d0010 ! 164: MULX_R mulx %r20, %r16, %r13 |
| 11893 | .word 0x91d02033 ! 165: Tcc_I ta icc_or_xcc, %r0 + 51 |
| 11894 | ibp_2_117: |
| 11895 | nop |
| 11896 | ta T_CHANGE_NONHPRIV |
| 11897 | .word 0x95b487c2 ! 166: PDIST pdistn %d18, %d2, %d10 |
| 11898 | brcommon2_2_118: |
| 11899 | nop |
| 11900 | setx common_target, %r12, %r27 |
| 11901 | ba,a .+12 |
| 11902 | .word 0x91a189c4 ! 1: FDIVd fdivd %f6, %f4, %f8 |
| 11903 | ba,a .+8 |
| 11904 | jmpl %r27+0, %r27 |
| 11905 | .word 0xe1bfe080 ! 167: STDFA_I stda %f16, [0x0080, %r31] |
| 11906 | .word 0xd027e164 ! 168: STW_I stw %r8, [%r31 + 0x0164] |
| 11907 | ibp_2_119: |
| 11908 | nop |
| 11909 | ta T_CHANGE_NONHPRIV |
| 11910 | .word 0xa3b40489 ! 169: FCMPLE32 fcmple32 %d16, %d40, %r17 |
| 11911 | .word 0x99520000 ! 170: RDPR_PIL <illegal instruction> |
| 11912 | mondo_2_120: |
| 11913 | nop |
| 11914 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 11915 | stxa %r19, [%r0+0x3e0] %asi |
| 11916 | .word 0x9d92000b ! 171: WRPR_WSTATE_R wrpr %r8, %r11, %wstate |
| 11917 | .word 0x8d802004 ! 172: WRFPRS_I wr %r0, 0x0004, %fprs |
| 11918 | .word 0xe08fe1d0 ! 173: LDUBA_I lduba [%r31, + 0x01d0] %asi, %r16 |
| 11919 | setx 0xcab83f55efe5a54b, %r1, %r28 |
| 11920 | stxa %r28, [%g0] 0x73 |
| 11921 | intvec_2_121: |
| 11922 | .word 0x39400001 ! 174: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 11923 | .word 0x92c4bc2b ! 175: ADDCcc_I addccc %r18, 0xfffffc2b, %r9 |
| 11924 | ibp_2_122: |
| 11925 | nop |
| 11926 | .word 0xe1bfd920 ! 176: STDFA_R stda %f16, [%r0, %r31] |
| 11927 | ibp_2_123: |
| 11928 | nop |
| 11929 | .word 0xc19fdc00 ! 177: LDDFA_R ldda [%r31, %r0], %f0 |
| 11930 | ibp_2_124: |
| 11931 | nop |
| 11932 | .word 0x97b4c489 ! 178: FCMPLE32 fcmple32 %d50, %d40, %r11 |
| 11933 | .word 0xe897e188 ! 179: LDUHA_I lduha [%r31, + 0x0188] %asi, %r20 |
| 11934 | fpinit_2_125: |
| 11935 | nop |
| 11936 | setx fp_data_quads, %r19, %r20 |
| 11937 | ldd [%r20], %f0 |
| 11938 | ldd [%r20+8], %f4 |
| 11939 | ld [%r20+16], %fsr |
| 11940 | ld [%r20+24], %r19 |
| 11941 | wr %r19, %g0, %gsr |
| 11942 | .word 0x8db00484 ! 180: FCMPLE32 fcmple32 %d0, %d4, %r6 |
| 11943 | .word 0x8143e011 ! 181: MEMBAR membar #LoadLoad | #Lookaside |
| 11944 | ibp_2_127: |
| 11945 | nop |
| 11946 | ta T_CHANGE_NONHPRIV |
| 11947 | .word 0xc19fde00 ! 182: LDDFA_R ldda [%r31, %r0], %f0 |
| 11948 | #if (defined SPC || defined CMP1) |
| 11949 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_128) + 16, 16, 16)) -> intp(7,0,4) |
| 11950 | #else |
| 11951 | setx 0x2b57968a8473b60e, %r1, %r28 |
| 11952 | stxa %r28, [%g0] 0x73 |
| 11953 | #endif |
| 11954 | intvec_2_128: |
| 11955 | .word 0x39400001 ! 183: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 11956 | intveclr_2_129: |
| 11957 | nop |
| 11958 | ta T_CHANGE_HPRIV |
| 11959 | setx 0x2fa5885207d31795, %r1, %r28 |
| 11960 | stxa %r28, [%g0] 0x72 |
| 11961 | ta T_CHANGE_NONHPRIV |
| 11962 | .word 0x25400001 ! 184: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 11963 | dvapa_2_130: |
| 11964 | nop |
| 11965 | ta T_CHANGE_HPRIV |
| 11966 | mov 0xb1f, %r20 |
| 11967 | mov 0x4, %r19 |
| 11968 | sllx %r20, 23, %r20 |
| 11969 | or %r19, %r20, %r19 |
| 11970 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 11971 | mov 0x38, %r18 |
| 11972 | stxa %r31, [%r18]0x58 |
| 11973 | ta T_CHANGE_NONHPRIV |
| 11974 | .word 0xc19fe060 ! 185: LDDFA_I ldda [%r31, 0x0060], %f0 |
| 11975 | mondo_2_131: |
| 11976 | nop |
| 11977 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 11978 | stxa %r3, [%r0+0x3e0] %asi |
| 11979 | .word 0x9d948014 ! 186: WRPR_WSTATE_R wrpr %r18, %r20, %wstate |
| 11980 | .word 0xe877c000 ! 187: STX_R stx %r20, [%r31 + %r0] |
| 11981 | mondo_2_132: |
| 11982 | nop |
| 11983 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 11984 | stxa %r9, [%r0+0x3c0] %asi |
| 11985 | .word 0x9d94c013 ! 188: WRPR_WSTATE_R wrpr %r19, %r19, %wstate |
| 11986 | mondo_2_133: |
| 11987 | nop |
| 11988 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 11989 | ta T_CHANGE_PRIV |
| 11990 | stxa %r7, [%r0+0x3c0] %asi |
| 11991 | .word 0x9d94c00d ! 189: WRPR_WSTATE_R wrpr %r19, %r13, %wstate |
| 11992 | memptr_2_134: |
| 11993 | set 0x60340000, %r31 |
| 11994 | .word 0x8584e2b7 ! 190: WRCCR_I wr %r19, 0x02b7, %ccr |
| 11995 | splash_hpstate_2_135: |
| 11996 | .word 0x81982cc1 ! 191: WRHPR_HPSTATE_I wrhpr %r0, 0x0cc1, %hpstate |
| 11997 | .word 0xe937c000 ! 192: STQF_R - %f20, [%r0, %r31] |
| 11998 | splash_hpstate_2_136: |
| 11999 | .word 0x22c94001 ! 1: BRZ brz,a,pt %r5,<label_0x94001> |
| 12000 | .word 0x81982495 ! 193: WRHPR_HPSTATE_I wrhpr %r0, 0x0495, %hpstate |
| 12001 | splash_hpstate_2_137: |
| 12002 | ta T_CHANGE_NONHPRIV |
| 12003 | .word 0x29400001 ! 1: FBPL fbl,a,pn %fcc0, <label_0x1> |
| 12004 | .word 0x8198341f ! 194: WRHPR_HPSTATE_I wrhpr %r0, 0x141f, %hpstate |
| 12005 | .word 0xe19fdf20 ! 195: LDDFA_R ldda [%r31, %r0], %f16 |
| 12006 | .word 0x89800011 ! 196: WRTICK_R wr %r0, %r17, %tick |
| 12007 | intveclr_2_139: |
| 12008 | nop |
| 12009 | ta T_CHANGE_HPRIV |
| 12010 | setx 0xf4ae4251d6a29a3a, %r1, %r28 |
| 12011 | stxa %r28, [%g0] 0x72 |
| 12012 | ta T_CHANGE_NONHPRIV |
| 12013 | .word 0x25400001 ! 197: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 12014 | .word 0x89800011 ! 198: WRTICK_R wr %r0, %r17, %tick |
| 12015 | mondo_2_141: |
| 12016 | nop |
| 12017 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 12018 | stxa %r20, [%r0+0x3d8] %asi |
| 12019 | .word 0x9d924004 ! 199: WRPR_WSTATE_R wrpr %r9, %r4, %wstate |
| 12020 | splash_lsu_2_142: |
| 12021 | nop |
| 12022 | ta T_CHANGE_HPRIV |
| 12023 | set 0xee8170d9, %r2 |
| 12024 | mov 0x6, %r1 |
| 12025 | sllx %r1, 32, %r1 |
| 12026 | or %r1, %r2, %r2 |
| 12027 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 12028 | .word 0x3d400001 ! 200: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 12029 | change_to_randtl_2_143: |
| 12030 | ta T_CHANGE_HPRIV ! macro |
| 12031 | done_change_to_randtl_2_143: |
| 12032 | .word 0x8f902000 ! 201: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 12033 | nop |
| 12034 | nop |
| 12035 | ta T_CHANGE_PRIV |
| 12036 | wrpr %g0, %g0, %gl |
| 12037 | nop |
| 12038 | nop |
| 12039 | setx join_lbl_0_0, %g1, %g2 |
| 12040 | jmp %g2 |
| 12041 | nop |
| 12042 | fork_lbl_0_1: |
| 12043 | ta T_CHANGE_NONHPRIV |
| 12044 | mondo_1_0: |
| 12045 | nop |
| 12046 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 12047 | ta T_CHANGE_PRIV |
| 12048 | stxa %r19, [%r0+0x3c0] %asi |
| 12049 | .word 0x9d934013 ! 1: WRPR_WSTATE_R wrpr %r13, %r19, %wstate |
| 12050 | trapasi_1_1: |
| 12051 | nop |
| 12052 | mov 0x3f8, %r1 ! (VA for ASI 0x25) |
| 12053 | .word 0xd0c844a0 ! 2: LDSBA_R ldsba [%r1, %r0] 0x25, %r8 |
| 12054 | splash_cmpr_1_2: |
| 12055 | mov 0, %r18 |
| 12056 | sllx %r18, 63, %r18 |
| 12057 | rd %tick, %r17 |
| 12058 | add %r17, 0x80, %r17 |
| 12059 | or %r17, %r18, %r17 |
| 12060 | ta T_CHANGE_HPRIV |
| 12061 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 12062 | .word 0xaf800011 ! 3: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 12063 | change_to_randtl_1_3: |
| 12064 | ta T_CHANGE_HPRIV ! macro |
| 12065 | done_change_to_randtl_1_3: |
| 12066 | .word 0x8f902001 ! 4: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 12067 | .word 0xd077c000 ! 5: STX_R stx %r8, [%r31 + %r0] |
| 12068 | splash_cmpr_1_4: |
| 12069 | mov 0, %r18 |
| 12070 | sllx %r18, 63, %r18 |
| 12071 | rd %tick, %r17 |
| 12072 | add %r17, 0x80, %r17 |
| 12073 | or %r17, %r18, %r17 |
| 12074 | ta T_CHANGE_PRIV |
| 12075 | .word 0xaf800011 ! 6: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 12076 | splash_decr_1_5: |
| 12077 | nop |
| 12078 | ta T_CHANGE_HPRIV |
| 12079 | mov 8, %r1 |
| 12080 | stxa %r0, [%r1] 0x45 |
| 12081 | .word 0xa7850013 ! 7: WR_GRAPHICS_STATUS_REG_R wr %r20, %r19, %- |
| 12082 | .word 0xd07fe160 ! 8: SWAP_I swap %r8, [%r31 + 0x0160] |
| 12083 | .word 0x91948005 ! 9: WRPR_PIL_R wrpr %r18, %r5, %pil |
| 12084 | brcommon3_1_7: |
| 12085 | nop |
| 12086 | setx common_target, %r12, %r27 |
| 12087 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 12088 | ba,a .+12 |
| 12089 | .word 0xd1e7c031 ! 1: CASA_I casa [%r31] 0x 1, %r17, %r8 |
| 12090 | ba,a .+8 |
| 12091 | jmpl %r27+0, %r27 |
| 12092 | .word 0xd11fc008 ! 10: LDDF_R ldd [%r31, %r8], %f8 |
| 12093 | nop |
| 12094 | ta T_CHANGE_HPRIV ! macro |
| 12095 | donret_1_8: |
| 12096 | rd %pc, %r12 |
| 12097 | add %r12, (donretarg_1_8-donret_1_8), %r12 |
| 12098 | add %r12, 0x4, %r11 ! seq tnpc |
| 12099 | wrpr %g0, 0x1, %tl |
| 12100 | wrpr %g0, %r12, %tpc |
| 12101 | wrpr %g0, %r11, %tnpc |
| 12102 | set (0x00f3f200 | (0x58 << 24)), %r13 |
| 12103 | and %r12, 0xfff, %r14 |
| 12104 | sllx %r14, 30, %r14 |
| 12105 | or %r13, %r14, %r20 |
| 12106 | wrpr %r20, %g0, %tstate |
| 12107 | wrhpr %g0, 0x1d99, %htstate |
| 12108 | ta T_CHANGE_NONPRIV ! rand=0 (1) |
| 12109 | .word 0x26800001 ! 1: BL bl,a <label_0x1> |
| 12110 | retry |
| 12111 | donretarg_1_8: |
| 12112 | .word 0xd06fe16b ! 11: LDSTUB_I ldstub %r8, [%r31 + 0x016b] |
| 12113 | .word 0xab808012 ! 12: WR_CLEAR_SOFTINT_R wr %r2, %r18, %clear_softint |
| 12114 | dvapa_1_9: |
| 12115 | nop |
| 12116 | ta T_CHANGE_HPRIV |
| 12117 | mov 0xf10, %r20 |
| 12118 | mov 0x5, %r19 |
| 12119 | sllx %r20, 23, %r20 |
| 12120 | or %r19, %r20, %r19 |
| 12121 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 12122 | mov 0x38, %r18 |
| 12123 | stxa %r31, [%r18]0x58 |
| 12124 | ta T_CHANGE_NONHPRIV |
| 12125 | .word 0xd03fe0e0 ! 13: STD_I std %r8, [%r31 + 0x00e0] |
| 12126 | .word 0x9169c004 ! 14: SDIVX_R sdivx %r7, %r4, %r8 |
| 12127 | nop |
| 12128 | ta T_CHANGE_HPRIV |
| 12129 | mov 0x1+1, %r10 |
| 12130 | set sync_thr_counter5, %r23 |
| 12131 | #ifndef SPC |
| 12132 | ldxa [%g0]0x63, %o1 |
| 12133 | and %o1, 0x38, %o1 |
| 12134 | add %o1, %r23, %r23 |
| 12135 | sllx %o1, 5, %o3 !(CID*256) |
| 12136 | #endif |
| 12137 | cas [%r23],%g0,%r10 !lock |
| 12138 | brnz %r10, cwq_1_10 |
| 12139 | rd %asi, %r12 |
| 12140 | wr %g0, 0x40, %asi |
| 12141 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 12142 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 12143 | cmp %l1, 1 |
| 12144 | bne cwq_1_10 |
| 12145 | set CWQ_BASE, %l6 |
| 12146 | #ifndef SPC |
| 12147 | add %l6, %o3, %l6 |
| 12148 | #endif |
| 12149 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 12150 | best_set_reg(0x206100a0, %l1, %l2) !# Control Word |
| 12151 | sllx %l2, 32, %l2 |
| 12152 | stx %l2, [%l6 + 0x0] |
| 12153 | membar #Sync |
| 12154 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 12155 | sub %l2, 0x40, %l2 |
| 12156 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 12157 | wr %r12, %g0, %asi |
| 12158 | st %g0, [%r23] |
| 12159 | cwq_1_10: |
| 12160 | ta T_CHANGE_NONHPRIV |
| 12161 | .word 0xa5414000 ! 15: RDPC rd %pc, %r18 |
| 12162 | .word 0xe4800ac0 ! 16: LDUWA_R lduwa [%r0, %r0] 0x56, %r18 |
| 12163 | nop |
| 12164 | ta T_CHANGE_HPRIV |
| 12165 | mov 0x1, %r10 |
| 12166 | set sync_thr_counter6, %r23 |
| 12167 | #ifndef SPC |
| 12168 | ldxa [%g0]0x63, %o1 |
| 12169 | and %o1, 0x38, %o1 |
| 12170 | add %o1, %r23, %r23 |
| 12171 | #endif |
| 12172 | cas [%r23],%g0,%r10 !lock |
| 12173 | brnz %r10, sma_1_11 |
| 12174 | rd %asi, %r12 |
| 12175 | wr %g0, 0x40, %asi |
| 12176 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 12177 | set 0x00161fff, %g1 |
| 12178 | stxa %g1, [%g0 + 0x80] %asi |
| 12179 | wr %r12, %g0, %asi |
| 12180 | st %g0, [%r23] |
| 12181 | sma_1_11: |
| 12182 | ta T_CHANGE_NONHPRIV |
| 12183 | .word 0xe5e7e012 ! 17: CASA_R casa [%r31] %asi, %r18, %r18 |
| 12184 | brcommon1_1_12: |
| 12185 | nop |
| 12186 | setx common_target, %r12, %r27 |
| 12187 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 12188 | ba,a .+12 |
| 12189 | .word 0xc32fe0a0 ! 1: STXFSR_I st-sfr %f1, [0x00a0, %r31] |
| 12190 | ba,a .+8 |
| 12191 | jmpl %r27+0, %r27 |
| 12192 | .word 0xc3ec4025 ! 18: PREFETCHA_R prefetcha [%r17, %r5] 0x01, #one_read |
| 12193 | .word 0x8d9035c9 ! 19: WRPR_PSTATE_I wrpr %r0, 0x15c9, %pstate |
| 12194 | #if (defined SPC || defined CMP1) |
| 12195 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_14) + 56, 16, 16)) -> intp(2,0,27) |
| 12196 | #else |
| 12197 | setx 0xbdfe4c1506ba6719, %r1, %r28 |
| 12198 | stxa %r28, [%g0] 0x73 |
| 12199 | #endif |
| 12200 | intvec_1_14: |
| 12201 | .word 0x39400001 ! 20: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 12202 | splash_tba_1_15: |
| 12203 | nop |
| 12204 | ta T_CHANGE_PRIV |
| 12205 | setx 0x0000000000380000, %r11, %r12 |
| 12206 | .word 0x8b90000c ! 21: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 12207 | splash_decr_1_16: |
| 12208 | nop |
| 12209 | ta T_CHANGE_HPRIV |
| 12210 | mov 8, %r1 |
| 12211 | stxa %r0, [%r1] 0x45 |
| 12212 | .word 0xa7830006 ! 22: WR_GRAPHICS_STATUS_REG_R wr %r12, %r6, %- |
| 12213 | intveclr_1_17: |
| 12214 | nop |
| 12215 | ta T_CHANGE_HPRIV |
| 12216 | setx 0x9de4e82df974a214, %r1, %r28 |
| 12217 | stxa %r28, [%g0] 0x72 |
| 12218 | ta T_CHANGE_NONHPRIV |
| 12219 | .word 0x25400001 ! 23: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 12220 | trapasi_1_18: |
| 12221 | nop |
| 12222 | mov 0x28, %r1 ! (VA for ASI 0x4c) |
| 12223 | .word 0xd4c04980 ! 24: LDSWA_R ldswa [%r1, %r0] 0x4c, %r10 |
| 12224 | nop |
| 12225 | mov 0x80, %g3 |
| 12226 | stxa %g3, [%g3] 0x57 |
| 12227 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 |
| 12228 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 |
| 12229 | .word 0xd45fc000 ! 25: LDX_R ldx [%r31 + %r0], %r10 |
| 12230 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 12231 | reduce_priv_lvl_1_19: |
| 12232 | ta T_CHANGE_NONPRIV ! macro |
| 12233 | intveclr_1_20: |
| 12234 | nop |
| 12235 | ta T_CHANGE_HPRIV |
| 12236 | setx 0xaffaf2ea34e41731, %r1, %r28 |
| 12237 | stxa %r28, [%g0] 0x72 |
| 12238 | .word 0x25400001 ! 27: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 12239 | intveclr_1_21: |
| 12240 | nop |
| 12241 | ta T_CHANGE_HPRIV |
| 12242 | setx 0x8224f39556f4a914, %r1, %r28 |
| 12243 | stxa %r28, [%g0] 0x72 |
| 12244 | ta T_CHANGE_NONHPRIV |
| 12245 | .word 0x25400001 ! 28: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 12246 | nop |
| 12247 | mov 0x80, %g3 |
| 12248 | stxa %g3, [%g3] 0x57 |
| 12249 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 |
| 12250 | .word 0xd45fc000 ! 29: LDX_R ldx [%r31 + %r0], %r10 |
| 12251 | brcommon3_1_22: |
| 12252 | nop |
| 12253 | setx common_target, %r12, %r27 |
| 12254 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 12255 | ba,a .+12 |
| 12256 | .word 0xd46fe180 ! 1: LDSTUB_I ldstub %r10, [%r31 + 0x0180] |
| 12257 | ba,a .+8 |
| 12258 | jmpl %r27+0, %r27 |
| 12259 | .word 0xd49fe1a0 ! 30: LDDA_I ldda [%r31, + 0x01a0] %asi, %r10 |
| 12260 | nop |
| 12261 | ta T_CHANGE_HPRIV |
| 12262 | mov 0x1+1, %r10 |
| 12263 | set sync_thr_counter5, %r23 |
| 12264 | #ifndef SPC |
| 12265 | ldxa [%g0]0x63, %o1 |
| 12266 | and %o1, 0x38, %o1 |
| 12267 | add %o1, %r23, %r23 |
| 12268 | sllx %o1, 5, %o3 !(CID*256) |
| 12269 | #endif |
| 12270 | cas [%r23],%g0,%r10 !lock |
| 12271 | brnz %r10, cwq_1_23 |
| 12272 | rd %asi, %r12 |
| 12273 | wr %g0, 0x40, %asi |
| 12274 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 12275 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 12276 | cmp %l1, 1 |
| 12277 | bne cwq_1_23 |
| 12278 | set CWQ_BASE, %l6 |
| 12279 | #ifndef SPC |
| 12280 | add %l6, %o3, %l6 |
| 12281 | #endif |
| 12282 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 12283 | best_set_reg(0x20610020, %l1, %l2) !# Control Word |
| 12284 | sllx %l2, 32, %l2 |
| 12285 | stx %l2, [%l6 + 0x0] |
| 12286 | membar #Sync |
| 12287 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 12288 | sub %l2, 0x40, %l2 |
| 12289 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 12290 | wr %r12, %g0, %asi |
| 12291 | st %g0, [%r23] |
| 12292 | cwq_1_23: |
| 12293 | ta T_CHANGE_NONHPRIV |
| 12294 | .word 0x95414000 ! 31: RDPC rd %pc, %r10 |
| 12295 | .word 0x8799aaf6 ! 32: WRHPR_HINTP_I wrhpr %r6, 0x0af6, %hintp |
| 12296 | .word 0xd497e170 ! 33: LDUHA_I lduha [%r31, + 0x0170] %asi, %r10 |
| 12297 | .word 0xd4bfc02c ! 34: STDA_R stda %r10, [%r31 + %r12] 0x01 |
| 12298 | splash_lsu_1_25: |
| 12299 | nop |
| 12300 | ta T_CHANGE_HPRIV |
| 12301 | set 0x73c2d9bc, %r2 |
| 12302 | mov 0x2, %r1 |
| 12303 | sllx %r1, 32, %r1 |
| 12304 | or %r1, %r2, %r2 |
| 12305 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 12306 | ta T_CHANGE_NONHPRIV |
| 12307 | .word 0x3d400001 ! 35: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 12308 | splash_decr_1_26: |
| 12309 | nop |
| 12310 | ta T_CHANGE_HPRIV |
| 12311 | mov 8, %r1 |
| 12312 | stxa %r0, [%r1] 0x45 |
| 12313 | .word 0xa7840011 ! 36: WR_GRAPHICS_STATUS_REG_R wr %r16, %r17, %- |
| 12314 | nop |
| 12315 | ta T_CHANGE_HPRIV ! macro |
| 12316 | donret_1_27: |
| 12317 | rd %pc, %r12 |
| 12318 | add %r12, (donretarg_1_27-donret_1_27), %r12 |
| 12319 | add %r12, 0x4, %r11 ! seq tnpc |
| 12320 | wrpr %g0, 0x1, %tl |
| 12321 | wrpr %g0, %r12, %tpc |
| 12322 | wrpr %g0, %r11, %tnpc |
| 12323 | set (0x0019f700 | (22 << 24)), %r13 |
| 12324 | and %r12, 0xfff, %r14 |
| 12325 | sllx %r14, 30, %r14 |
| 12326 | or %r13, %r14, %r20 |
| 12327 | wrpr %r20, %g0, %tstate |
| 12328 | wrhpr %g0, 0xd8f, %htstate |
| 12329 | ta T_CHANGE_NONHPRIV ! rand=1 (1) |
| 12330 | .word 0x3f400001 ! 1: FBPO fbo,a,pn %fcc0, <label_0x1> |
| 12331 | done |
| 12332 | donretarg_1_27: |
| 12333 | .word 0x24800001 ! 37: BLE ble,a <label_0x1> |
| 12334 | #if (defined SPC || defined CMP1) |
| 12335 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_28) + 16, 16, 16)) -> intp(3,0,10) |
| 12336 | #else |
| 12337 | setx 0x6cac0d5aef295d27, %r1, %r28 |
| 12338 | stxa %r28, [%g0] 0x73 |
| 12339 | #endif |
| 12340 | intvec_1_28: |
| 12341 | .word 0x39400001 ! 38: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 12342 | .word 0x9194000b ! 39: WRPR_PIL_R wrpr %r16, %r11, %pil |
| 12343 | nop |
| 12344 | ta T_CHANGE_HPRIV |
| 12345 | mov 0x1, %r10 |
| 12346 | set sync_thr_counter6, %r23 |
| 12347 | #ifndef SPC |
| 12348 | ldxa [%g0]0x63, %o1 |
| 12349 | and %o1, 0x38, %o1 |
| 12350 | add %o1, %r23, %r23 |
| 12351 | #endif |
| 12352 | cas [%r23],%g0,%r10 !lock |
| 12353 | brnz %r10, sma_1_30 |
| 12354 | rd %asi, %r12 |
| 12355 | wr %g0, 0x40, %asi |
| 12356 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 12357 | set 0x001a1fff, %g1 |
| 12358 | stxa %g1, [%g0 + 0x80] %asi |
| 12359 | wr %r12, %g0, %asi |
| 12360 | st %g0, [%r23] |
| 12361 | sma_1_30: |
| 12362 | ta T_CHANGE_NONHPRIV |
| 12363 | .word 0xd5e7e008 ! 40: CASA_R casa [%r31] %asi, %r8, %r10 |
| 12364 | .word 0xd497e1f8 ! 41: LDUHA_I lduha [%r31, + 0x01f8] %asi, %r10 |
| 12365 | .word 0x8d802004 ! 42: WRFPRS_I wr %r0, 0x0004, %fprs |
| 12366 | intveclr_1_31: |
| 12367 | nop |
| 12368 | ta T_CHANGE_HPRIV |
| 12369 | setx 0x86677fb4054a9e47, %r1, %r28 |
| 12370 | stxa %r28, [%g0] 0x72 |
| 12371 | ta T_CHANGE_NONHPRIV |
| 12372 | .word 0x25400001 ! 43: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 12373 | splash_decr_1_32: |
| 12374 | nop |
| 12375 | ta T_CHANGE_HPRIV |
| 12376 | mov 8, %r1 |
| 12377 | stxa %r0, [%r1] 0x45 |
| 12378 | .word 0xa7844012 ! 44: WR_GRAPHICS_STATUS_REG_R wr %r17, %r18, %- |
| 12379 | .word 0x8143e011 ! 45: MEMBAR membar #LoadLoad | #Lookaside |
| 12380 | fpinit_1_34: |
| 12381 | nop |
| 12382 | setx fp_data_quads, %r19, %r20 |
| 12383 | ldd [%r20], %f0 |
| 12384 | ldd [%r20+8], %f4 |
| 12385 | ld [%r20+16], %fsr |
| 12386 | ld [%r20+24], %r19 |
| 12387 | wr %r19, %g0, %gsr |
| 12388 | .word 0x89a009a4 ! 46: FDIVs fdivs %f0, %f4, %f4 |
| 12389 | invtsb_1_35: |
| 12390 | nop |
| 12391 | ta T_CHANGE_HPRIV |
| 12392 | rd %asi, %r21 |
| 12393 | wr %r0,ASI_MMU_REAL_RANGE, %asi |
| 12394 | mov 1, %r20 |
| 12395 | sllx %r20, 63, %r20 |
| 12396 | ldxa [ASI_MMU_REAL_RANGE_0] %asi, %r22 |
| 12397 | xor %r22 ,%r20, %r22 |
| 12398 | stxa %r22, [ASI_MMU_REAL_RANGE_0] %asi |
| 12399 | ldxa [ASI_MMU_REAL_RANGE_1] %asi, %r22 |
| 12400 | xor %r22 ,%r20, %r22 |
| 12401 | stxa %r22, [ASI_MMU_REAL_RANGE_1] %asi |
| 12402 | ldxa [ASI_MMU_REAL_RANGE_2] %asi, %r22 |
| 12403 | xor %r22 ,%r20, %r22 |
| 12404 | stxa %r22, [ASI_MMU_REAL_RANGE_2] %asi |
| 12405 | ldxa [ASI_MMU_REAL_RANGE_3] %asi, %r22 |
| 12406 | xor %r22 ,%r20, %r22 |
| 12407 | stxa %r22, [ASI_MMU_REAL_RANGE_3] %asi |
| 12408 | wr %r21, %r0, %asi |
| 12409 | ta T_CHANGE_NONHPRIV |
| 12410 | .word 0x29800001 ! 47: FBL fbl,a <label_0x1> |
| 12411 | splash_hpstate_1_36: |
| 12412 | .word 0x26ca0001 ! 1: BRLZ brlz,a,pt %r8,<label_0xa0001> |
| 12413 | .word 0x81983ec7 ! 48: WRHPR_HPSTATE_I wrhpr %r0, 0x1ec7, %hpstate |
| 12414 | nop |
| 12415 | ta T_CHANGE_HPRIV |
| 12416 | mov 0x1+1, %r10 |
| 12417 | set sync_thr_counter5, %r23 |
| 12418 | #ifndef SPC |
| 12419 | ldxa [%g0]0x63, %o1 |
| 12420 | and %o1, 0x38, %o1 |
| 12421 | add %o1, %r23, %r23 |
| 12422 | sllx %o1, 5, %o3 !(CID*256) |
| 12423 | #endif |
| 12424 | cas [%r23],%g0,%r10 !lock |
| 12425 | brnz %r10, cwq_1_37 |
| 12426 | rd %asi, %r12 |
| 12427 | wr %g0, 0x40, %asi |
| 12428 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 12429 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 12430 | cmp %l1, 1 |
| 12431 | bne cwq_1_37 |
| 12432 | set CWQ_BASE, %l6 |
| 12433 | #ifndef SPC |
| 12434 | add %l6, %o3, %l6 |
| 12435 | #endif |
| 12436 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 12437 | best_set_reg(0x20610020, %l1, %l2) !# Control Word |
| 12438 | sllx %l2, 32, %l2 |
| 12439 | stx %l2, [%l6 + 0x0] |
| 12440 | membar #Sync |
| 12441 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 12442 | sub %l2, 0x40, %l2 |
| 12443 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 12444 | wr %r12, %g0, %asi |
| 12445 | st %g0, [%r23] |
| 12446 | cwq_1_37: |
| 12447 | ta T_CHANGE_NONHPRIV |
| 12448 | .word 0xa5414000 ! 49: RDPC rd %pc, %r18 |
| 12449 | splash_hpstate_1_38: |
| 12450 | ta T_CHANGE_NONHPRIV |
| 12451 | .word 0x81983915 ! 50: WRHPR_HPSTATE_I wrhpr %r0, 0x1915, %hpstate |
| 12452 | .word 0xe43fc000 ! 51: STD_R std %r18, [%r31 + %r0] |
| 12453 | invalw |
| 12454 | mov 0x33, %r30 |
| 12455 | .word 0x91d0001e ! 52: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 12456 | splash_cmpr_1_40: |
| 12457 | mov 0, %r18 |
| 12458 | sllx %r18, 63, %r18 |
| 12459 | rd %tick, %r17 |
| 12460 | add %r17, 0x80, %r17 |
| 12461 | or %r17, %r18, %r17 |
| 12462 | .word 0xb3800011 ! 53: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 12463 | setx 0x8e6e59886d00a267, %r1, %r28 |
| 12464 | stxa %r28, [%g0] 0x73 |
| 12465 | intvec_1_41: |
| 12466 | .word 0x39400001 ! 54: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 12467 | trapasi_1_42: |
| 12468 | nop |
| 12469 | mov 0x0, %r1 ! (VA for ASI 0x73) |
| 12470 | .word 0xe4c04e60 ! 55: LDSWA_R ldswa [%r1, %r0] 0x73, %r18 |
| 12471 | memptr_1_43: |
| 12472 | set 0x60340000, %r31 |
| 12473 | .word 0x8584601d ! 56: WRCCR_I wr %r17, 0x001d, %ccr |
| 12474 | memptr_1_44: |
| 12475 | set 0x60540000, %r31 |
| 12476 | .word 0x858129bc ! 57: WRCCR_I wr %r4, 0x09bc, %ccr |
| 12477 | .word 0x95a14d29 ! 58: FsMULd fsmuld %f5, %f40, %f10 |
| 12478 | nop |
| 12479 | ta T_CHANGE_HPRIV ! macro |
| 12480 | donret_1_45: |
| 12481 | rd %pc, %r12 |
| 12482 | add %r12, (donretarg_1_45-donret_1_45+4), %r12 |
| 12483 | add %r12, 0x4, %r11 ! seq tnpc |
| 12484 | wrpr %g0, 0x2, %tl |
| 12485 | wrpr %g0, %r12, %tpc |
| 12486 | wrpr %g0, %r11, %tnpc |
| 12487 | set (0x00b58000 | (4 << 24)), %r13 |
| 12488 | and %r12, 0xfff, %r14 |
| 12489 | sllx %r14, 30, %r14 |
| 12490 | or %r13, %r14, %r20 |
| 12491 | wrpr %r20, %g0, %tstate |
| 12492 | wrhpr %g0, 0x15d3, %htstate |
| 12493 | ta T_CHANGE_NONHPRIV ! rand=1 (1) |
| 12494 | done |
| 12495 | donretarg_1_45: |
| 12496 | .word 0xd4ffe1d8 ! 59: SWAPA_I swapa %r10, [%r31 + 0x01d8] %asi |
| 12497 | .word 0x97703ed3 ! 60: POPC_I popc 0x1ed3, %r11 |
| 12498 | splash_tba_1_47: |
| 12499 | nop |
| 12500 | ta T_CHANGE_PRIV |
| 12501 | setx 0x0000000000380000, %r11, %r12 |
| 12502 | .word 0x8b90000c ! 61: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 12503 | ibp_1_48: |
| 12504 | nop |
| 12505 | ta T_CHANGE_NONHPRIV |
| 12506 | .word 0x91a509b2 ! 62: FDIVs fdivs %f20, %f18, %f8 |
| 12507 | .word 0x97450000 ! 63: RD_SET_SOFTINT rd %set_softint, %r11 |
| 12508 | .word 0xd677c000 ! 64: STX_R stx %r11, [%r31 + %r0] |
| 12509 | .word 0xd71fe018 ! 65: LDDF_I ldd [%r31, 0x0018], %f11 |
| 12510 | memptr_1_49: |
| 12511 | set 0x60340000, %r31 |
| 12512 | .word 0x85812086 ! 66: WRCCR_I wr %r4, 0x0086, %ccr |
| 12513 | .word 0x81b01021 ! 67: SIAM siam 1 |
| 12514 | .word 0x87ab0a45 ! 68: FCMPd fcmpd %fcc<n>, %f12, %f36 |
| 12515 | .word 0xdb1fe018 ! 69: LDDF_I ldd [%r31, 0x0018], %f13 |
| 12516 | .word 0x36780001 ! 70: BPGE <illegal instruction> |
| 12517 | dvapa_1_51: |
| 12518 | nop |
| 12519 | ta T_CHANGE_HPRIV |
| 12520 | mov 0xd6b, %r20 |
| 12521 | mov 0xa, %r19 |
| 12522 | sllx %r20, 23, %r20 |
| 12523 | or %r19, %r20, %r19 |
| 12524 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 12525 | mov 0x38, %r18 |
| 12526 | stxa %r31, [%r18]0x58 |
| 12527 | ta T_CHANGE_NONHPRIV |
| 12528 | .word 0x95b34490 ! 71: FCMPLE32 fcmple32 %d44, %d16, %r10 |
| 12529 | splash_cmpr_1_52: |
| 12530 | mov 1, %r18 |
| 12531 | sllx %r18, 63, %r18 |
| 12532 | rd %tick, %r17 |
| 12533 | add %r17, 0x70, %r17 |
| 12534 | or %r17, %r18, %r17 |
| 12535 | ta T_CHANGE_HPRIV |
| 12536 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 12537 | ta T_CHANGE_PRIV |
| 12538 | .word 0xb3800011 ! 72: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 12539 | intveclr_1_53: |
| 12540 | nop |
| 12541 | ta T_CHANGE_HPRIV |
| 12542 | setx 0x39ff3ea4d4e23e7b, %r1, %r28 |
| 12543 | stxa %r28, [%g0] 0x72 |
| 12544 | ta T_CHANGE_NONHPRIV |
| 12545 | .word 0x25400001 ! 73: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 12546 | jmptr_1_54: |
| 12547 | nop |
| 12548 | best_set_reg(0xe1200000, %r20, %r27) |
| 12549 | .word 0xb7c6c000 ! 74: JMPL_R jmpl %r27 + %r0, %r27 |
| 12550 | mondo_1_55: |
| 12551 | nop |
| 12552 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 12553 | ta T_CHANGE_PRIV |
| 12554 | stxa %r19, [%r0+0x3c8] %asi |
| 12555 | .word 0x9d950010 ! 75: WRPR_WSTATE_R wrpr %r20, %r16, %wstate |
| 12556 | #if (defined SPC || defined CMP1) |
| 12557 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_56) + 8, 16, 16)) -> intp(1,0,4) |
| 12558 | #else |
| 12559 | setx 0xbb50c03c2cf0ec2c, %r1, %r28 |
| 12560 | stxa %r28, [%g0] 0x73 |
| 12561 | #endif |
| 12562 | intvec_1_56: |
| 12563 | .word 0x39400001 ! 76: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 12564 | .word 0x89800011 ! 77: WRTICK_R wr %r0, %r17, %tick |
| 12565 | splash_lsu_1_58: |
| 12566 | nop |
| 12567 | ta T_CHANGE_HPRIV |
| 12568 | set 0xa1a04c63, %r2 |
| 12569 | mov 0x6, %r1 |
| 12570 | sllx %r1, 32, %r1 |
| 12571 | or %r1, %r2, %r2 |
| 12572 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 12573 | .word 0x3d400001 ! 78: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 12574 | splash_tba_1_59: |
| 12575 | nop |
| 12576 | ta T_CHANGE_PRIV |
| 12577 | setx 0x0000000000380000, %r11, %r12 |
| 12578 | .word 0x8b90000c ! 79: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 12579 | .word 0x87802055 ! 80: WRASI_I wr %r0, 0x0055, %asi |
| 12580 | .word 0xd45fe080 ! 81: LDX_I ldx [%r31 + 0x0080], %r10 |
| 12581 | br_badelay1_1_60: |
| 12582 | .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 12583 | .word 0xe932c008 ! 1: STQF_R - %f20, [%r8, %r11] |
| 12584 | .word 0xe9e7c031 ! 1: CASA_I casa [%r31] 0x 1, %r17, %r20 |
| 12585 | normalw |
| 12586 | .word 0xa5458000 ! 82: RD_SOFTINT_REG rd %softint, %r18 |
| 12587 | mondo_1_61: |
| 12588 | nop |
| 12589 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 12590 | stxa %r19, [%r0+0x3c0] %asi |
| 12591 | .word 0x9d950005 ! 83: WRPR_WSTATE_R wrpr %r20, %r5, %wstate |
| 12592 | nop |
| 12593 | mov 0x80, %g3 |
| 12594 | stxa %g3, [%g3] 0x57 |
| 12595 | .word 0xe45fc000 ! 84: LDX_R ldx [%r31 + %r0], %r18 |
| 12596 | nop |
| 12597 | ta T_CHANGE_HPRIV |
| 12598 | mov 0x1+1, %r10 |
| 12599 | set sync_thr_counter5, %r23 |
| 12600 | #ifndef SPC |
| 12601 | ldxa [%g0]0x63, %o1 |
| 12602 | and %o1, 0x38, %o1 |
| 12603 | add %o1, %r23, %r23 |
| 12604 | sllx %o1, 5, %o3 !(CID*256) |
| 12605 | #endif |
| 12606 | cas [%r23],%g0,%r10 !lock |
| 12607 | brnz %r10, cwq_1_62 |
| 12608 | rd %asi, %r12 |
| 12609 | wr %g0, 0x40, %asi |
| 12610 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 12611 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 12612 | cmp %l1, 1 |
| 12613 | bne cwq_1_62 |
| 12614 | set CWQ_BASE, %l6 |
| 12615 | #ifndef SPC |
| 12616 | add %l6, %o3, %l6 |
| 12617 | #endif |
| 12618 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 12619 | best_set_reg(0x20610040, %l1, %l2) !# Control Word |
| 12620 | sllx %l2, 32, %l2 |
| 12621 | stx %l2, [%l6 + 0x0] |
| 12622 | membar #Sync |
| 12623 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 12624 | sub %l2, 0x40, %l2 |
| 12625 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 12626 | wr %r12, %g0, %asi |
| 12627 | st %g0, [%r23] |
| 12628 | cwq_1_62: |
| 12629 | ta T_CHANGE_NONHPRIV |
| 12630 | .word 0x93414000 ! 85: RDPC rd %pc, %r9 |
| 12631 | pmu_1_63: |
| 12632 | nop |
| 12633 | setx 0xfffffb74ffffffce, %g1, %g7 |
| 12634 | .word 0xa3800007 ! 86: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 12635 | splash_tba_1_64: |
| 12636 | nop |
| 12637 | ta T_CHANGE_PRIV |
| 12638 | set 0x120000, %r12 |
| 12639 | .word 0x8b90000c ! 87: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 12640 | splash_cmpr_1_65: |
| 12641 | mov 0, %r18 |
| 12642 | sllx %r18, 63, %r18 |
| 12643 | rd %tick, %r17 |
| 12644 | add %r17, 0x70, %r17 |
| 12645 | or %r17, %r18, %r17 |
| 12646 | ta T_CHANGE_PRIV |
| 12647 | .word 0xaf800011 ! 88: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 12648 | splash_lsu_1_66: |
| 12649 | nop |
| 12650 | ta T_CHANGE_HPRIV |
| 12651 | set 0xd624109e, %r2 |
| 12652 | mov 0x7, %r1 |
| 12653 | sllx %r1, 32, %r1 |
| 12654 | or %r1, %r2, %r2 |
| 12655 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 12656 | ta T_CHANGE_NONHPRIV |
| 12657 | .word 0x3d400001 ! 89: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 12658 | .word 0xc30fc000 ! 90: LDXFSR_R ld-fsr [%r31, %r0], %f1 |
| 12659 | nop |
| 12660 | ta T_CHANGE_HPRIV |
| 12661 | mov 0x1+1, %r10 |
| 12662 | set sync_thr_counter5, %r23 |
| 12663 | #ifndef SPC |
| 12664 | ldxa [%g0]0x63, %o1 |
| 12665 | and %o1, 0x38, %o1 |
| 12666 | add %o1, %r23, %r23 |
| 12667 | sllx %o1, 5, %o3 !(CID*256) |
| 12668 | #endif |
| 12669 | cas [%r23],%g0,%r10 !lock |
| 12670 | brnz %r10, cwq_1_67 |
| 12671 | rd %asi, %r12 |
| 12672 | wr %g0, 0x40, %asi |
| 12673 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 12674 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 12675 | cmp %l1, 1 |
| 12676 | bne cwq_1_67 |
| 12677 | set CWQ_BASE, %l6 |
| 12678 | #ifndef SPC |
| 12679 | add %l6, %o3, %l6 |
| 12680 | #endif |
| 12681 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 12682 | best_set_reg(0x20610000, %l1, %l2) !# Control Word |
| 12683 | sllx %l2, 32, %l2 |
| 12684 | stx %l2, [%l6 + 0x0] |
| 12685 | membar #Sync |
| 12686 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 12687 | sub %l2, 0x40, %l2 |
| 12688 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 12689 | wr %r12, %g0, %asi |
| 12690 | st %g0, [%r23] |
| 12691 | cwq_1_67: |
| 12692 | ta T_CHANGE_NONHPRIV |
| 12693 | .word 0x99414000 ! 91: RDPC rd %pc, %r12 |
| 12694 | .word 0xd827e0ac ! 92: STW_I stw %r12, [%r31 + 0x00ac] |
| 12695 | splash_tba_1_68: |
| 12696 | nop |
| 12697 | ta T_CHANGE_PRIV |
| 12698 | set 0x120000, %r12 |
| 12699 | .word 0x8b90000c ! 93: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 12700 | setx 0x101bed930ff1a1fa, %r1, %r28 |
| 12701 | stxa %r28, [%g0] 0x73 |
| 12702 | intvec_1_69: |
| 12703 | .word 0x39400001 ! 94: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 12704 | nop |
| 12705 | mov 0x80, %g3 |
| 12706 | stxa %g3, [%g3] 0x5f |
| 12707 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 |
| 12708 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 |
| 12709 | .word 0xd85fc000 ! 95: LDX_R ldx [%r31 + %r0], %r12 |
| 12710 | .word 0x8d802000 ! 96: WRFPRS_I wr %r0, 0x0000, %fprs |
| 12711 | .word 0xd91fc011 ! 97: LDDF_R ldd [%r31, %r17], %f12 |
| 12712 | splash_cmpr_1_71: |
| 12713 | mov 0, %r18 |
| 12714 | sllx %r18, 63, %r18 |
| 12715 | rd %tick, %r17 |
| 12716 | add %r17, 0x70, %r17 |
| 12717 | or %r17, %r18, %r17 |
| 12718 | ta T_CHANGE_HPRIV |
| 12719 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 12720 | ta T_CHANGE_PRIV |
| 12721 | .word 0xb3800011 ! 98: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 12722 | nop |
| 12723 | mov 0x80, %g3 |
| 12724 | stxa %g3, [%g3] 0x5f |
| 12725 | .word 0xbfefc000 ! 1: RESTORE_R restore %r31, %r0, %r31 |
| 12726 | .word 0xd85fc000 ! 99: LDX_R ldx [%r31 + %r0], %r12 |
| 12727 | ceter_1_72: |
| 12728 | nop |
| 12729 | ta T_CHANGE_HPRIV |
| 12730 | mov 6, %r17 |
| 12731 | sllx %r17, 60, %r17 |
| 12732 | mov 0x18, %r16 |
| 12733 | stxa %r17, [%r16]0x4c |
| 12734 | ta T_CHANGE_NONHPRIV |
| 12735 | .word 0xa9410000 ! 100: RDTICK rd %tick, %r20 |
| 12736 | .word 0x23400001 ! 1: FBPNE fbne,a,pn %fcc0, <label_0x1> |
| 12737 | .word 0x8d903d21 ! 101: WRPR_PSTATE_I wrpr %r0, 0x1d21, %pstate |
| 12738 | intveclr_1_74: |
| 12739 | nop |
| 12740 | ta T_CHANGE_HPRIV |
| 12741 | setx 0x08accab1faf7cbc0, %r1, %r28 |
| 12742 | stxa %r28, [%g0] 0x72 |
| 12743 | ta T_CHANGE_NONHPRIV |
| 12744 | .word 0x25400001 ! 102: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 12745 | fpinit_1_75: |
| 12746 | nop |
| 12747 | setx fp_data_quads, %r19, %r20 |
| 12748 | ldd [%r20], %f0 |
| 12749 | ldd [%r20+8], %f4 |
| 12750 | ld [%r20+16], %fsr |
| 12751 | ld [%r20+24], %r19 |
| 12752 | wr %r19, %g0, %gsr |
| 12753 | .word 0x91a009c4 ! 103: FDIVd fdivd %f0, %f4, %f8 |
| 12754 | jmptr_1_76: |
| 12755 | nop |
| 12756 | best_set_reg(0xe1200000, %r20, %r27) |
| 12757 | .word 0xb7c6c000 ! 104: JMPL_R jmpl %r27 + %r0, %r27 |
| 12758 | jmptr_1_77: |
| 12759 | nop |
| 12760 | best_set_reg(0xe1200000, %r20, %r27) |
| 12761 | .word 0xb7c6c000 ! 105: JMPL_R jmpl %r27 + %r0, %r27 |
| 12762 | nop |
| 12763 | ta T_CHANGE_HPRIV |
| 12764 | mov 0x1, %r10 |
| 12765 | set sync_thr_counter6, %r23 |
| 12766 | #ifndef SPC |
| 12767 | ldxa [%g0]0x63, %o1 |
| 12768 | and %o1, 0x38, %o1 |
| 12769 | add %o1, %r23, %r23 |
| 12770 | #endif |
| 12771 | cas [%r23],%g0,%r10 !lock |
| 12772 | brnz %r10, sma_1_78 |
| 12773 | rd %asi, %r12 |
| 12774 | wr %g0, 0x40, %asi |
| 12775 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 12776 | set 0x001e1fff, %g1 |
| 12777 | stxa %g1, [%g0 + 0x80] %asi |
| 12778 | wr %r12, %g0, %asi |
| 12779 | st %g0, [%r23] |
| 12780 | sma_1_78: |
| 12781 | ta T_CHANGE_NONHPRIV |
| 12782 | .word 0xe9e7e014 ! 106: CASA_R casa [%r31] %asi, %r20, %r20 |
| 12783 | nop |
| 12784 | ta T_CHANGE_HPRIV |
| 12785 | mov 0x1, %r10 |
| 12786 | set sync_thr_counter6, %r23 |
| 12787 | #ifndef SPC |
| 12788 | ldxa [%g0]0x63, %o1 |
| 12789 | and %o1, 0x38, %o1 |
| 12790 | add %o1, %r23, %r23 |
| 12791 | #endif |
| 12792 | cas [%r23],%g0,%r10 !lock |
| 12793 | brnz %r10, sma_1_79 |
| 12794 | rd %asi, %r12 |
| 12795 | wr %g0, 0x40, %asi |
| 12796 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 12797 | set 0x000e1fff, %g1 |
| 12798 | stxa %g1, [%g0 + 0x80] %asi |
| 12799 | wr %r12, %g0, %asi |
| 12800 | st %g0, [%r23] |
| 12801 | sma_1_79: |
| 12802 | ta T_CHANGE_NONHPRIV |
| 12803 | .word 0xe9e7e00d ! 107: CASA_R casa [%r31] %asi, %r13, %r20 |
| 12804 | splash_cmpr_1_80: |
| 12805 | mov 0, %r18 |
| 12806 | sllx %r18, 63, %r18 |
| 12807 | rd %tick, %r17 |
| 12808 | add %r17, 0x100, %r17 |
| 12809 | or %r17, %r18, %r17 |
| 12810 | ta T_CHANGE_HPRIV |
| 12811 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 12812 | .word 0xb3800011 ! 108: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 12813 | ibp_1_81: |
| 12814 | nop |
| 12815 | .word 0xe1bfc3e0 ! 109: STDFA_R stda %f16, [%r0, %r31] |
| 12816 | .word 0xe88008a0 ! 110: LDUWA_R lduwa [%r0, %r0] 0x45, %r20 |
| 12817 | .word 0x87aa0ad4 ! 111: FCMPEd fcmped %fcc<n>, %f8, %f20 |
| 12818 | nop |
| 12819 | ta T_CHANGE_HPRIV |
| 12820 | mov 0x1+1, %r10 |
| 12821 | set sync_thr_counter5, %r23 |
| 12822 | #ifndef SPC |
| 12823 | ldxa [%g0]0x63, %o1 |
| 12824 | and %o1, 0x38, %o1 |
| 12825 | add %o1, %r23, %r23 |
| 12826 | sllx %o1, 5, %o3 !(CID*256) |
| 12827 | #endif |
| 12828 | cas [%r23],%g0,%r10 !lock |
| 12829 | brnz %r10, cwq_1_82 |
| 12830 | rd %asi, %r12 |
| 12831 | wr %g0, 0x40, %asi |
| 12832 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 12833 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 12834 | cmp %l1, 1 |
| 12835 | bne cwq_1_82 |
| 12836 | set CWQ_BASE, %l6 |
| 12837 | #ifndef SPC |
| 12838 | add %l6, %o3, %l6 |
| 12839 | #endif |
| 12840 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 12841 | best_set_reg(0x206100b0, %l1, %l2) !# Control Word |
| 12842 | sllx %l2, 32, %l2 |
| 12843 | stx %l2, [%l6 + 0x0] |
| 12844 | membar #Sync |
| 12845 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 12846 | sub %l2, 0x40, %l2 |
| 12847 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 12848 | wr %r12, %g0, %asi |
| 12849 | st %g0, [%r23] |
| 12850 | cwq_1_82: |
| 12851 | ta T_CHANGE_NONHPRIV |
| 12852 | .word 0x9b414000 ! 112: RDPC rd %pc, %r13 |
| 12853 | cwp_1_83: |
| 12854 | set user_data_start, %o7 |
| 12855 | .word 0x93902004 ! 113: WRPR_CWP_I wrpr %r0, 0x0004, %cwp |
| 12856 | .word 0xa4dc800d ! 114: SMULcc_R smulcc %r18, %r13, %r18 |
| 12857 | .word 0x8d802004 ! 115: WRFPRS_I wr %r0, 0x0004, %fprs |
| 12858 | trapasi_1_84: |
| 12859 | nop |
| 12860 | mov 0x3d0, %r1 ! (VA for ASI 0x25) |
| 12861 | .word 0xe49044a0 ! 116: LDUHA_R lduha [%r1, %r0] 0x25, %r18 |
| 12862 | .word 0x8d802000 ! 117: WRFPRS_I wr %r0, 0x0000, %fprs |
| 12863 | trapasi_1_85: |
| 12864 | nop |
| 12865 | mov 0x3d8, %r1 ! (VA for ASI 0x25) |
| 12866 | .word 0xe4c044a0 ! 118: LDSWA_R ldswa [%r1, %r0] 0x25, %r18 |
| 12867 | .word 0xa953c000 ! 119: RDPR_FQ <illegal instruction> |
| 12868 | splash_hpstate_1_86: |
| 12869 | .word 0x3b400001 ! 1: FBPLE fble,a,pn %fcc0, <label_0x1> |
| 12870 | .word 0x81982c97 ! 120: WRHPR_HPSTATE_I wrhpr %r0, 0x0c97, %hpstate |
| 12871 | intveclr_1_87: |
| 12872 | nop |
| 12873 | ta T_CHANGE_HPRIV |
| 12874 | setx 0xcdffff1725a4290b, %r1, %r28 |
| 12875 | stxa %r28, [%g0] 0x72 |
| 12876 | .word 0x25400001 ! 121: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 12877 | .word 0xe937e08c ! 122: STQF_I - %f20, [0x008c, %r31] |
| 12878 | .word 0xa8c1757a ! 123: ADDCcc_I addccc %r5, 0xfffff57a, %r20 |
| 12879 | #if (defined SPC || defined CMP1) |
| 12880 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_88) + 32, 16, 16)) -> intp(0,0,16) |
| 12881 | #else |
| 12882 | setx 0x915fd2453dd39c1f, %r1, %r28 |
| 12883 | stxa %r28, [%g0] 0x73 |
| 12884 | #endif |
| 12885 | intvec_1_88: |
| 12886 | .word 0x39400001 ! 124: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 12887 | trapasi_1_89: |
| 12888 | nop |
| 12889 | mov 0x0, %r1 ! (VA for ASI 0x73) |
| 12890 | .word 0xe8d84e60 ! 125: LDXA_R ldxa [%r1, %r0] 0x73, %r20 |
| 12891 | trapasi_1_90: |
| 12892 | nop |
| 12893 | mov 0x3c0, %r1 ! (VA for ASI 0x25) |
| 12894 | .word 0xe89044a0 ! 126: LDUHA_R lduha [%r1, %r0] 0x25, %r20 |
| 12895 | .word 0x91a0c9c2 ! 127: FDIVd fdivd %f34, %f2, %f8 |
| 12896 | intveclr_1_92: |
| 12897 | nop |
| 12898 | ta T_CHANGE_HPRIV |
| 12899 | setx 0x9753899e58325aa4, %r1, %r28 |
| 12900 | stxa %r28, [%g0] 0x72 |
| 12901 | ta T_CHANGE_NONHPRIV |
| 12902 | .word 0x25400001 ! 128: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 12903 | trapasi_1_93: |
| 12904 | nop |
| 12905 | mov 0x38, %r1 ! (VA for ASI 0x50) |
| 12906 | .word 0xd0d84a00 ! 129: LDXA_R ldxa [%r1, %r0] 0x50, %r8 |
| 12907 | .word 0x89800011 ! 130: WRTICK_R wr %r0, %r17, %tick |
| 12908 | .word 0xc19fc2c0 ! 131: LDDFA_R ldda [%r31, %r0], %f0 |
| 12909 | .word 0x89800011 ! 132: WRTICK_R wr %r0, %r17, %tick |
| 12910 | .word 0xd197e050 ! 133: LDQFA_I - [%r31, 0x0050], %f8 |
| 12911 | dvapa_1_96: |
| 12912 | nop |
| 12913 | ta T_CHANGE_HPRIV |
| 12914 | mov 0xb41, %r20 |
| 12915 | mov 0x5, %r19 |
| 12916 | sllx %r20, 23, %r20 |
| 12917 | or %r19, %r20, %r19 |
| 12918 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 12919 | mov 0x38, %r18 |
| 12920 | stxa %r31, [%r18]0x58 |
| 12921 | ta T_CHANGE_NONHPRIV |
| 12922 | .word 0x9f80220f ! 134: SIR sir 0x020f |
| 12923 | .word 0xd13fc000 ! 135: STDF_R std %f8, [%r0, %r31] |
| 12924 | otherw |
| 12925 | mov 0x30, %r30 |
| 12926 | .word 0x93d0001e ! 136: Tcc_R tne icc_or_xcc, %r0 + %r30 |
| 12927 | .word 0x87802083 ! 137: WRASI_I wr %r0, 0x0083, %asi |
| 12928 | memptr_1_97: |
| 12929 | set 0x60540000, %r31 |
| 12930 | .word 0x8581738d ! 138: WRCCR_I wr %r5, 0x138d, %ccr |
| 12931 | splash_cmpr_1_98: |
| 12932 | mov 0, %r18 |
| 12933 | sllx %r18, 63, %r18 |
| 12934 | rd %tick, %r17 |
| 12935 | add %r17, 0x80, %r17 |
| 12936 | or %r17, %r18, %r17 |
| 12937 | .word 0xb3800011 ! 139: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 12938 | .word 0x87ab4a33 ! 140: FCMPs fcmps %fcc<n>, %f13, %f19 |
| 12939 | .word 0x89800011 ! 141: WRTICK_R wr %r0, %r17, %tick |
| 12940 | .word 0xd0c7e0d0 ! 142: LDSWA_I ldswa [%r31, + 0x00d0] %asi, %r8 |
| 12941 | splash_tba_1_100: |
| 12942 | nop |
| 12943 | ta T_CHANGE_PRIV |
| 12944 | set 0x120000, %r12 |
| 12945 | .word 0x8b90000c ! 143: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 12946 | change_to_randtl_1_101: |
| 12947 | ta T_CHANGE_HPRIV ! macro |
| 12948 | done_change_to_randtl_1_101: |
| 12949 | .word 0x8f902001 ! 144: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 12950 | nop |
| 12951 | ta T_CHANGE_HPRIV ! macro |
| 12952 | donret_1_102: |
| 12953 | rd %pc, %r12 |
| 12954 | add %r12, (donretarg_1_102-donret_1_102+4), %r12 |
| 12955 | add %r12, 0x4, %r11 ! seq tnpc |
| 12956 | wrpr %g0, 0x2, %tl |
| 12957 | wrpr %g0, %r12, %tpc |
| 12958 | wrpr %g0, %r11, %tnpc |
| 12959 | set (0x00776600 | (0x88 << 24)), %r13 |
| 12960 | and %r12, 0xfff, %r14 |
| 12961 | sllx %r14, 30, %r14 |
| 12962 | or %r13, %r14, %r20 |
| 12963 | wrpr %r20, %g0, %tstate |
| 12964 | wrhpr %g0, 0xb3, %htstate |
| 12965 | ta T_CHANGE_NONHPRIV ! rand=1 (1) |
| 12966 | .word 0x3b400001 ! 1: FBPLE fble,a,pn %fcc0, <label_0x1> |
| 12967 | retry |
| 12968 | donretarg_1_102: |
| 12969 | .word 0x2cca4001 ! 145: BRGZ brgz,a,pt %r9,<label_0xa4001> |
| 12970 | .word 0xd03fe0c0 ! 146: STD_I std %r8, [%r31 + 0x00c0] |
| 12971 | .word 0x91d02034 ! 147: Tcc_I ta icc_or_xcc, %r0 + 52 |
| 12972 | nop |
| 12973 | ta T_CHANGE_HPRIV |
| 12974 | mov 0x1+1, %r10 |
| 12975 | set sync_thr_counter5, %r23 |
| 12976 | #ifndef SPC |
| 12977 | ldxa [%g0]0x63, %o1 |
| 12978 | and %o1, 0x38, %o1 |
| 12979 | add %o1, %r23, %r23 |
| 12980 | sllx %o1, 5, %o3 !(CID*256) |
| 12981 | #endif |
| 12982 | cas [%r23],%g0,%r10 !lock |
| 12983 | brnz %r10, cwq_1_104 |
| 12984 | rd %asi, %r12 |
| 12985 | wr %g0, 0x40, %asi |
| 12986 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 12987 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 12988 | cmp %l1, 1 |
| 12989 | bne cwq_1_104 |
| 12990 | set CWQ_BASE, %l6 |
| 12991 | #ifndef SPC |
| 12992 | add %l6, %o3, %l6 |
| 12993 | #endif |
| 12994 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 12995 | best_set_reg(0x20610060, %l1, %l2) !# Control Word |
| 12996 | sllx %l2, 32, %l2 |
| 12997 | stx %l2, [%l6 + 0x0] |
| 12998 | membar #Sync |
| 12999 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 13000 | sub %l2, 0x40, %l2 |
| 13001 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 13002 | wr %r12, %g0, %asi |
| 13003 | st %g0, [%r23] |
| 13004 | cwq_1_104: |
| 13005 | ta T_CHANGE_NONHPRIV |
| 13006 | .word 0x95414000 ! 148: RDPC rd %pc, %r10 |
| 13007 | mondo_1_105: |
| 13008 | nop |
| 13009 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 13010 | ta T_CHANGE_PRIV |
| 13011 | stxa %r19, [%r0+0x3d8] %asi |
| 13012 | .word 0x9d94c013 ! 149: WRPR_WSTATE_R wrpr %r19, %r19, %wstate |
| 13013 | .word 0xe19fe180 ! 150: LDDFA_I ldda [%r31, 0x0180], %f16 |
| 13014 | nop |
| 13015 | ta T_CHANGE_HPRIV |
| 13016 | mov 0x1+1, %r10 |
| 13017 | set sync_thr_counter5, %r23 |
| 13018 | #ifndef SPC |
| 13019 | ldxa [%g0]0x63, %o1 |
| 13020 | and %o1, 0x38, %o1 |
| 13021 | add %o1, %r23, %r23 |
| 13022 | sllx %o1, 5, %o3 !(CID*256) |
| 13023 | #endif |
| 13024 | cas [%r23],%g0,%r10 !lock |
| 13025 | brnz %r10, cwq_1_106 |
| 13026 | rd %asi, %r12 |
| 13027 | wr %g0, 0x40, %asi |
| 13028 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 13029 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 13030 | cmp %l1, 1 |
| 13031 | bne cwq_1_106 |
| 13032 | set CWQ_BASE, %l6 |
| 13033 | #ifndef SPC |
| 13034 | add %l6, %o3, %l6 |
| 13035 | #endif |
| 13036 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 13037 | best_set_reg(0x20610050, %l1, %l2) !# Control Word |
| 13038 | sllx %l2, 32, %l2 |
| 13039 | stx %l2, [%l6 + 0x0] |
| 13040 | membar #Sync |
| 13041 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 13042 | sub %l2, 0x40, %l2 |
| 13043 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 13044 | wr %r12, %g0, %asi |
| 13045 | st %g0, [%r23] |
| 13046 | cwq_1_106: |
| 13047 | ta T_CHANGE_NONHPRIV |
| 13048 | .word 0xa3414000 ! 151: RDPC rd %pc, %r17 |
| 13049 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 13050 | reduce_priv_lvl_1_107: |
| 13051 | ta T_CHANGE_NONPRIV ! macro |
| 13052 | #if (defined SPC || defined CMP1) |
| 13053 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_108) + 40, 16, 16)) -> intp(7,0,4) |
| 13054 | #else |
| 13055 | setx 0x3e7cabb3955958ac, %r1, %r28 |
| 13056 | stxa %r28, [%g0] 0x73 |
| 13057 | #endif |
| 13058 | intvec_1_108: |
| 13059 | .word 0x39400001 ! 153: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 13060 | .word 0x8d9031e9 ! 154: WRPR_PSTATE_I wrpr %r0, 0x11e9, %pstate |
| 13061 | dvapa_1_110: |
| 13062 | nop |
| 13063 | ta T_CHANGE_HPRIV |
| 13064 | mov 0xd71, %r20 |
| 13065 | mov 0x16, %r19 |
| 13066 | sllx %r20, 23, %r20 |
| 13067 | or %r19, %r20, %r19 |
| 13068 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 13069 | mov 0x38, %r18 |
| 13070 | stxa %r31, [%r18]0x58 |
| 13071 | ta T_CHANGE_NONHPRIV |
| 13072 | .word 0xc3ed002d ! 155: PREFETCHA_R prefetcha [%r20, %r13] 0x01, #one_read |
| 13073 | .word 0xd0800a80 ! 156: LDUWA_R lduwa [%r0, %r0] 0x54, %r8 |
| 13074 | .word 0x89800011 ! 157: WRTICK_R wr %r0, %r17, %tick |
| 13075 | memptr_1_112: |
| 13076 | set 0x60740000, %r31 |
| 13077 | .word 0x85846682 ! 158: WRCCR_I wr %r17, 0x0682, %ccr |
| 13078 | .word 0xa24a0004 ! 159: MULX_R mulx %r8, %r4, %r17 |
| 13079 | nop |
| 13080 | ta T_CHANGE_HPRIV |
| 13081 | mov 0x1, %r10 |
| 13082 | set sync_thr_counter6, %r23 |
| 13083 | #ifndef SPC |
| 13084 | ldxa [%g0]0x63, %o1 |
| 13085 | and %o1, 0x38, %o1 |
| 13086 | add %o1, %r23, %r23 |
| 13087 | #endif |
| 13088 | cas [%r23],%g0,%r10 !lock |
| 13089 | brnz %r10, sma_1_113 |
| 13090 | rd %asi, %r12 |
| 13091 | wr %g0, 0x40, %asi |
| 13092 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 13093 | set 0x000a1fff, %g1 |
| 13094 | stxa %g1, [%g0 + 0x80] %asi |
| 13095 | wr %r12, %g0, %asi |
| 13096 | st %g0, [%r23] |
| 13097 | sma_1_113: |
| 13098 | ta T_CHANGE_NONHPRIV |
| 13099 | .word 0xe3e7e00b ! 160: CASA_R casa [%r31] %asi, %r11, %r17 |
| 13100 | ibp_1_114: |
| 13101 | nop |
| 13102 | .word 0x93b407c2 ! 161: PDIST pdistn %d16, %d2, %d40 |
| 13103 | memptr_1_115: |
| 13104 | set 0x60340000, %r31 |
| 13105 | .word 0x85843544 ! 162: WRCCR_I wr %r16, 0x1544, %ccr |
| 13106 | splash_tba_1_116: |
| 13107 | nop |
| 13108 | ta T_CHANGE_PRIV |
| 13109 | set 0x120000, %r12 |
| 13110 | .word 0x8b90000c ! 163: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 13111 | .word 0x964d000a ! 164: MULX_R mulx %r20, %r10, %r11 |
| 13112 | .word 0x93d02035 ! 165: Tcc_I tne icc_or_xcc, %r0 + 53 |
| 13113 | ibp_1_117: |
| 13114 | nop |
| 13115 | ta T_CHANGE_NONHPRIV |
| 13116 | .word 0x97b48491 ! 166: FCMPLE32 fcmple32 %d18, %d48, %r11 |
| 13117 | brcommon2_1_118: |
| 13118 | nop |
| 13119 | setx common_target, %r12, %r27 |
| 13120 | ba,a .+12 |
| 13121 | .word 0xc36fe1b0 ! 1: PREFETCH_I prefetch [%r31 + 0x01b0], #one_read |
| 13122 | ba,a .+8 |
| 13123 | jmpl %r27+0, %r27 |
| 13124 | .word 0xc1bfe1e0 ! 167: STDFA_I stda %f0, [0x01e0, %r31] |
| 13125 | .word 0xd027e189 ! 168: STW_I stw %r8, [%r31 + 0x0189] |
| 13126 | ibp_1_119: |
| 13127 | nop |
| 13128 | ta T_CHANGE_NONHPRIV |
| 13129 | .word 0x93b307d2 ! 169: PDIST pdistn %d12, %d18, %d40 |
| 13130 | .word 0xa1520000 ! 170: RDPR_PIL <illegal instruction> |
| 13131 | mondo_1_120: |
| 13132 | nop |
| 13133 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 13134 | stxa %r17, [%r0+0x3e8] %asi |
| 13135 | .word 0x9d91c011 ! 171: WRPR_WSTATE_R wrpr %r7, %r17, %wstate |
| 13136 | .word 0x8d802004 ! 172: WRFPRS_I wr %r0, 0x0004, %fprs |
| 13137 | .word 0xe08fe1d8 ! 173: LDUBA_I lduba [%r31, + 0x01d8] %asi, %r16 |
| 13138 | setx 0x3ae453699b68cccb, %r1, %r28 |
| 13139 | stxa %r28, [%g0] 0x73 |
| 13140 | intvec_1_121: |
| 13141 | .word 0x39400001 ! 174: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 13142 | .word 0xa6c1623a ! 175: ADDCcc_I addccc %r5, 0x023a, %r19 |
| 13143 | ibp_1_122: |
| 13144 | nop |
| 13145 | .word 0xe19fc2c0 ! 176: LDDFA_R ldda [%r31, %r0], %f16 |
| 13146 | ibp_1_123: |
| 13147 | nop |
| 13148 | .word 0xe1bfd960 ! 177: STDFA_R stda %f16, [%r0, %r31] |
| 13149 | ibp_1_124: |
| 13150 | nop |
| 13151 | .word 0xa9a489d2 ! 178: FDIVd fdivd %f18, %f18, %f20 |
| 13152 | .word 0xe897e0b8 ! 179: LDUHA_I lduha [%r31, + 0x00b8] %asi, %r20 |
| 13153 | fpinit_1_125: |
| 13154 | nop |
| 13155 | setx fp_data_quads, %r19, %r20 |
| 13156 | ldd [%r20], %f0 |
| 13157 | ldd [%r20+8], %f4 |
| 13158 | ld [%r20+16], %fsr |
| 13159 | ld [%r20+24], %r19 |
| 13160 | wr %r19, %g0, %gsr |
| 13161 | .word 0x8db00484 ! 180: FCMPLE32 fcmple32 %d0, %d4, %r6 |
| 13162 | .word 0x8143e011 ! 181: MEMBAR membar #LoadLoad | #Lookaside |
| 13163 | ibp_1_127: |
| 13164 | nop |
| 13165 | ta T_CHANGE_NONHPRIV |
| 13166 | .word 0xe19fe180 ! 182: LDDFA_I ldda [%r31, 0x0180], %f16 |
| 13167 | #if (defined SPC || defined CMP1) |
| 13168 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_128) + 40, 16, 16)) -> intp(5,0,10) |
| 13169 | #else |
| 13170 | setx 0x22e7d8466a24ec6a, %r1, %r28 |
| 13171 | stxa %r28, [%g0] 0x73 |
| 13172 | #endif |
| 13173 | intvec_1_128: |
| 13174 | .word 0x39400001 ! 183: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 13175 | intveclr_1_129: |
| 13176 | nop |
| 13177 | ta T_CHANGE_HPRIV |
| 13178 | setx 0x797dfba07cde78da, %r1, %r28 |
| 13179 | stxa %r28, [%g0] 0x72 |
| 13180 | ta T_CHANGE_NONHPRIV |
| 13181 | .word 0x25400001 ! 184: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 13182 | dvapa_1_130: |
| 13183 | nop |
| 13184 | ta T_CHANGE_HPRIV |
| 13185 | mov 0x926, %r20 |
| 13186 | mov 0x7, %r19 |
| 13187 | sllx %r20, 23, %r20 |
| 13188 | or %r19, %r20, %r19 |
| 13189 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 13190 | mov 0x38, %r18 |
| 13191 | stxa %r31, [%r18]0x58 |
| 13192 | ta T_CHANGE_NONHPRIV |
| 13193 | .word 0xc1bfe0a0 ! 185: STDFA_I stda %f0, [0x00a0, %r31] |
| 13194 | mondo_1_131: |
| 13195 | nop |
| 13196 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 13197 | stxa %r7, [%r0+0x3e0] %asi |
| 13198 | .word 0x9d94c005 ! 186: WRPR_WSTATE_R wrpr %r19, %r5, %wstate |
| 13199 | .word 0xe877c000 ! 187: STX_R stx %r20, [%r31 + %r0] |
| 13200 | mondo_1_132: |
| 13201 | nop |
| 13202 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 13203 | stxa %r18, [%r0+0x3e0] %asi |
| 13204 | .word 0x9d930013 ! 188: WRPR_WSTATE_R wrpr %r12, %r19, %wstate |
| 13205 | mondo_1_133: |
| 13206 | nop |
| 13207 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 13208 | ta T_CHANGE_PRIV |
| 13209 | stxa %r7, [%r0+0x3e8] %asi |
| 13210 | .word 0x9d950014 ! 189: WRPR_WSTATE_R wrpr %r20, %r20, %wstate |
| 13211 | memptr_1_134: |
| 13212 | set 0x60140000, %r31 |
| 13213 | .word 0x85827434 ! 190: WRCCR_I wr %r9, 0x1434, %ccr |
| 13214 | splash_hpstate_1_135: |
| 13215 | .word 0x8198200b ! 191: WRHPR_HPSTATE_I wrhpr %r0, 0x000b, %hpstate |
| 13216 | .word 0xe937c000 ! 192: STQF_R - %f20, [%r0, %r31] |
| 13217 | splash_hpstate_1_136: |
| 13218 | .word 0x2b400001 ! 1: FBPUG fbug,a,pn %fcc0, <label_0x1> |
| 13219 | .word 0x81983f15 ! 193: WRHPR_HPSTATE_I wrhpr %r0, 0x1f15, %hpstate |
| 13220 | splash_hpstate_1_137: |
| 13221 | ta T_CHANGE_NONHPRIV |
| 13222 | .word 0x24800001 ! 1: BLE ble,a <label_0x1> |
| 13223 | .word 0x81983f84 ! 194: WRHPR_HPSTATE_I wrhpr %r0, 0x1f84, %hpstate |
| 13224 | .word 0xc19fdc00 ! 195: LDDFA_R ldda [%r31, %r0], %f0 |
| 13225 | .word 0x89800011 ! 196: WRTICK_R wr %r0, %r17, %tick |
| 13226 | intveclr_1_139: |
| 13227 | nop |
| 13228 | ta T_CHANGE_HPRIV |
| 13229 | setx 0x2ff17e43e32144bd, %r1, %r28 |
| 13230 | stxa %r28, [%g0] 0x72 |
| 13231 | ta T_CHANGE_NONHPRIV |
| 13232 | .word 0x25400001 ! 197: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 13233 | .word 0x89800011 ! 198: WRTICK_R wr %r0, %r17, %tick |
| 13234 | mondo_1_141: |
| 13235 | nop |
| 13236 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 13237 | stxa %r13, [%r0+0x3d0] %asi |
| 13238 | .word 0x9d930014 ! 199: WRPR_WSTATE_R wrpr %r12, %r20, %wstate |
| 13239 | splash_lsu_1_142: |
| 13240 | nop |
| 13241 | ta T_CHANGE_HPRIV |
| 13242 | set 0xa6f6ed21, %r2 |
| 13243 | mov 0x6, %r1 |
| 13244 | sllx %r1, 32, %r1 |
| 13245 | or %r1, %r2, %r2 |
| 13246 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 13247 | .word 0x3d400001 ! 200: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 13248 | change_to_randtl_1_143: |
| 13249 | ta T_CHANGE_HPRIV ! macro |
| 13250 | done_change_to_randtl_1_143: |
| 13251 | .word 0x8f902001 ! 201: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 13252 | nop |
| 13253 | nop |
| 13254 | ta T_CHANGE_PRIV |
| 13255 | wrpr %g0, %g0, %gl |
| 13256 | nop |
| 13257 | nop |
| 13258 | |
| 13259 | join_lbl_0_0: |
| 13260 | SECTION .MAIN |
| 13261 | .text |
| 13262 | diag_finish: |
| 13263 | nop |
| 13264 | nop |
| 13265 | nop |
| 13266 | ta T_CHANGE_HPRIV |
| 13267 | best_set_reg(HV_TRAP_BASE_PA, %r1, %r2) |
| 13268 | wrhpr %g2, %g0, %htba |
| 13269 | ta T_GOOD_TRAP |
| 13270 | nop |
| 13271 | nop |
| 13272 | nop |
| 13273 | .data |
| 13274 | .xword 0x0 |
| 13275 | ! fp data rs1, rs2, fsr, gsr quads .. |
| 13276 | .global fp_data_quads |
| 13277 | fp_data_quads: |
| 13278 | .xword 0x0044000000000000 |
| 13279 | .xword 0x4028000000000000 |
| 13280 | .xword 0x0fc0400400000000 |
| 13281 | .xword 0x0000000000000000 |
| 13282 | .xword 0x0041000000000000 |
| 13283 | .xword 0x4022000000000000 |
| 13284 | .xword 0x0600800000000000 |
| 13285 | .xword 0x0000000000000000 |
| 13286 | .xword 0x0220000000000000 |
| 13287 | .xword 0x4140000000000000 |
| 13288 | .xword 0x4fc0400400000000 |
| 13289 | .xword 0x0000000000000000 |
| 13290 | .xword 0x4090000000000000 |
| 13291 | .xword 0x0090000000000000 |
| 13292 | .xword 0x0f80400800000000 |
| 13293 | .xword 0x0a00000000000000 |
| 13294 | .align 128 |
| 13295 | .global user_data_start |
| 13296 | .data |
| 13297 | user_data_start: |
| 13298 | |
| 13299 | .xword 0x6a286ee2c39769f4 |
| 13300 | .xword 0x718c24c69d3e506b |
| 13301 | .xword 0x2a84596b05d0eb82 |
| 13302 | .xword 0xc64a5c30427b3903 |
| 13303 | .xword 0x9631238ce933e105 |
| 13304 | .xword 0x22ddbae185f75e0b |
| 13305 | .xword 0x38bcd6dddfc27ebd |
| 13306 | .xword 0x95857c6f48525454 |
| 13307 | .xword 0x8d9fbefcee8f27ff |
| 13308 | .xword 0xd0b80d9edbccae6a |
| 13309 | .xword 0x3f36c4c72d54a8a1 |
| 13310 | .xword 0x463788d2ad343ef4 |
| 13311 | .xword 0x5b7f2fc0f44a96aa |
| 13312 | .xword 0x36a397e60fde61be |
| 13313 | .xword 0x207101c051eeec97 |
| 13314 | .xword 0x03799b6c9dc6f096 |
| 13315 | .xword 0x2849aec93e610264 |
| 13316 | .xword 0x0a62c61d5c453a83 |
| 13317 | .xword 0x245b02fa336a63cc |
| 13318 | .xword 0xf6f5a233bff0e694 |
| 13319 | .xword 0xcc410f846988605d |
| 13320 | .xword 0x6e30e42ad3d77183 |
| 13321 | .xword 0xde6a1665b01c2448 |
| 13322 | .xword 0x60aab2c7b860f1a4 |
| 13323 | .xword 0x42622f2d96beb4d6 |
| 13324 | .xword 0xf11388a5f11d5ae4 |
| 13325 | .xword 0xf90577720215f29b |
| 13326 | .xword 0x16b52b19a0f8f65d |
| 13327 | .xword 0x1254aacefda0eadb |
| 13328 | .xword 0xa63c6041fb2f0953 |
| 13329 | .xword 0x4700f61cc7eb5c22 |
| 13330 | .xword 0x3d638dbcae53c74f |
| 13331 | .xword 0xecc6a5a66e340564 |
| 13332 | .xword 0x186bcfcd9a44c99b |
| 13333 | .xword 0xce31fb70faaeb9bf |
| 13334 | .xword 0x5be05493d63563d7 |
| 13335 | .xword 0x06bb5eb0432ba665 |
| 13336 | .xword 0x7030d9cd3f80a451 |
| 13337 | .xword 0x0291aa948d5d50c4 |
| 13338 | .xword 0x1068166719b63b10 |
| 13339 | .xword 0xd11d16aa3029d910 |
| 13340 | .xword 0x1e92b22d0b7a11c6 |
| 13341 | .xword 0xbbf91bc56177d896 |
| 13342 | .xword 0xe18cc6a85d16f329 |
| 13343 | .xword 0x061f0219bf070812 |
| 13344 | .xword 0xeeaf7742c665d513 |
| 13345 | .xword 0x0dfcfca7e94eec3e |
| 13346 | .xword 0xe82888980200a82b |
| 13347 | .xword 0x8d9ff8e879c3e0f1 |
| 13348 | .xword 0xa3b5073f57e4ae6e |
| 13349 | .xword 0xbf97354feaceedd2 |
| 13350 | .xword 0x1602eaf78a859f2a |
| 13351 | .xword 0x2514132d6c9f59d1 |
| 13352 | .xword 0xc1e3989a905afe11 |
| 13353 | .xword 0x3eea541a12bb86db |
| 13354 | .xword 0x492c2041f57ab62c |
| 13355 | .xword 0x5d038da13634debb |
| 13356 | .xword 0x08791f4816a6bb50 |
| 13357 | .xword 0x73bd250e07f72bb8 |
| 13358 | .xword 0xc3a6ff7428486a15 |
| 13359 | .xword 0x80d76d97a92016d0 |
| 13360 | .xword 0x565e0fa87820e4d6 |
| 13361 | .xword 0x620a31156fc954b1 |
| 13362 | .xword 0xdc3471579ce19b34 |
| 13363 | .xword 0x780a7e5bb2ebec59 |
| 13364 | .xword 0xf4c14fe9867ec3d0 |
| 13365 | .xword 0x3662197dbf1a2b24 |
| 13366 | .xword 0x671c38f7347ecd7c |
| 13367 | .xword 0x4782f190a1070fc3 |
| 13368 | .xword 0xb47afba32af98abe |
| 13369 | .xword 0x2c0b3fdf55d85061 |
| 13370 | .xword 0x998e12a9af4531f9 |
| 13371 | .xword 0x8ed2c675deea8d2c |
| 13372 | .xword 0xf8b77d3299b0f483 |
| 13373 | .xword 0xc60fe8d5b525d4ad |
| 13374 | .xword 0x2fc3d86a9d8848a3 |
| 13375 | .xword 0x2b53acf77f80a32e |
| 13376 | .xword 0xd9cc299607ef85df |
| 13377 | .xword 0x0412f80f46c8a092 |
| 13378 | .xword 0xfc40b97b35d8e3b7 |
| 13379 | .xword 0xbc23ae73c3978a50 |
| 13380 | .xword 0x01696986b6c2a14b |
| 13381 | .xword 0xd2d5ad11f11a6dd3 |
| 13382 | .xword 0x5b5796c95f5dea18 |
| 13383 | .xword 0x9e5b5a00c078d360 |
| 13384 | .xword 0x509c9c9714e7f851 |
| 13385 | .xword 0xe1bab6b84e8ac959 |
| 13386 | .xword 0xb87e915d452c4da6 |
| 13387 | .xword 0xbfa61619d0397fae |
| 13388 | .xword 0x3ccc13de3345be64 |
| 13389 | .xword 0x5dfc19060645787e |
| 13390 | .xword 0xa1169d88d8160b56 |
| 13391 | .xword 0x0cdb758854aa499a |
| 13392 | .xword 0x26b156dbc9ceeed0 |
| 13393 | .xword 0xf7cea0914f06f438 |
| 13394 | .xword 0xd2fc90745149519c |
| 13395 | .xword 0xf6f4b905825147bb |
| 13396 | .xword 0x6d46ed9effc97ed1 |
| 13397 | .xword 0x488c039931e55dad |
| 13398 | .xword 0xa4b4ed9314817fdb |
| 13399 | .xword 0x0b6a9bb16cdede9f |
| 13400 | .xword 0x58eefd9ae5c826ba |
| 13401 | .xword 0x40b3a0dfac3f9cdb |
| 13402 | .xword 0x53006527fef25000 |
| 13403 | .xword 0xc544e7213432ede1 |
| 13404 | .xword 0xa912e5ba8e51fef2 |
| 13405 | .xword 0x9a2af56304b2abf4 |
| 13406 | .xword 0xd87c325043d643f8 |
| 13407 | .xword 0x2fca5255eaee0974 |
| 13408 | .xword 0x8b6431e4e33d0875 |
| 13409 | .xword 0x4e8ebecc435b0d61 |
| 13410 | .xword 0xca4267be5630bd66 |
| 13411 | .xword 0xf8f8251859a49702 |
| 13412 | .xword 0x1198f6f6f9b4cdbd |
| 13413 | .xword 0xcea6eb01a4bf9681 |
| 13414 | .xword 0xee7a186e2a5ed34e |
| 13415 | .xword 0xa3054b7a14cf15ed |
| 13416 | .xword 0x641e00c59d5a56f1 |
| 13417 | .xword 0x51015c2d1eae587d |
| 13418 | .xword 0xe51b280d3204567f |
| 13419 | .xword 0x62c1aadcebdb0392 |
| 13420 | .xword 0x7c7205346289ebc6 |
| 13421 | .xword 0xe8fe059ee89f247f |
| 13422 | .xword 0x64de602c5caa8550 |
| 13423 | .xword 0xaf383d90227fbf01 |
| 13424 | .xword 0x01241c6757bf50fe |
| 13425 | .xword 0x43eb9688f28092b9 |
| 13426 | .xword 0x96473c2fb39626eb |
| 13427 | .xword 0x78b1afd1bb895921 |
| 13428 | .xword 0xb3b61a881522371a |
| 13429 | .xword 0x656573c3154b67b3 |
| 13430 | .xword 0x16e5004ccab71f5b |
| 13431 | .xword 0x57994d171d07d41e |
| 13432 | .xword 0xeaf2ec9e5dd0e510 |
| 13433 | .xword 0x30aeb22fcf181aea |
| 13434 | .xword 0x377fd8b753af3431 |
| 13435 | .xword 0x4b91ea9ebf3061d6 |
| 13436 | .xword 0xbbe3914eb420a925 |
| 13437 | .xword 0xaeaf32d72a0345a2 |
| 13438 | .xword 0xefd3d441969d787e |
| 13439 | .xword 0x8e81363eca1497aa |
| 13440 | .xword 0x28568250cdd5871e |
| 13441 | .xword 0x6f1cb1ee4eb31b09 |
| 13442 | .xword 0xd0ffd4ee65351fbc |
| 13443 | .xword 0x2c2a267b26ec57fd |
| 13444 | .xword 0x51670adff08d6a1b |
| 13445 | .xword 0x705ecd3140685b99 |
| 13446 | .xword 0xa349429924448009 |
| 13447 | .xword 0x3a97547fd5bfc1a7 |
| 13448 | .xword 0x03c3a9f7b7ab260b |
| 13449 | .xword 0xb3a2fd3fb10b62b7 |
| 13450 | .xword 0x1cbb514364edc1f1 |
| 13451 | .xword 0x50bd9ac303cc04fb |
| 13452 | .xword 0xb76a59ef1323ca3f |
| 13453 | .xword 0xd9ef9e4296cd93b5 |
| 13454 | .xword 0x9fe960dad7d8697b |
| 13455 | .xword 0x5d665d497bd68ff7 |
| 13456 | .xword 0xf80557b752e2593d |
| 13457 | .xword 0x582f608b5dc1aac9 |
| 13458 | .xword 0x182dca6a0c9a68c2 |
| 13459 | .xword 0x0838daa91923adff |
| 13460 | .xword 0x4c5c7a786c58e201 |
| 13461 | .xword 0x39b25fe7f6652b82 |
| 13462 | .xword 0xa10f7a40d4e24e6b |
| 13463 | .xword 0x4e7a2c6e27df4fd7 |
| 13464 | .xword 0x096f81a21dfd3541 |
| 13465 | .xword 0x2a4fdf5faaa9e4e4 |
| 13466 | .xword 0x959894c0539ac789 |
| 13467 | .xword 0x3ea7503fe2323382 |
| 13468 | .xword 0x8d777db092b5c363 |
| 13469 | .xword 0xdd47d18a3983a268 |
| 13470 | .xword 0x1fac7f1d6d005f73 |
| 13471 | .xword 0x93fcaa51e98a4bc4 |
| 13472 | .xword 0x9174e5c0f0d767e1 |
| 13473 | .xword 0x2c0a95efb773d0fb |
| 13474 | .xword 0x3ff3a8d5e14a0163 |
| 13475 | .xword 0xc1ed190a86c789e6 |
| 13476 | .xword 0x14b53153bef04233 |
| 13477 | .xword 0x81e5c9e9d6ed4332 |
| 13478 | .xword 0xebe4e7e381643cc3 |
| 13479 | .xword 0x3f5451b7ad53abe4 |
| 13480 | .xword 0xfcf2b4695c295702 |
| 13481 | .xword 0x4d33bdd2cd206711 |
| 13482 | .xword 0x3ffaf01fb3105f91 |
| 13483 | .xword 0x3d32616558e6326b |
| 13484 | .xword 0x34edc803559e3953 |
| 13485 | .xword 0x3f35cb12d5cc5441 |
| 13486 | .xword 0x1ba55efe4326c430 |
| 13487 | .xword 0xaed6c13b1da87b7f |
| 13488 | .xword 0xa90cbc17e4405986 |
| 13489 | .xword 0x070d17002c21cadf |
| 13490 | .xword 0xe52eddb83ad27bb0 |
| 13491 | .xword 0xc195c603b6ea7a7f |
| 13492 | .xword 0xf42c6ad8046cab23 |
| 13493 | .xword 0x42795797ffc98605 |
| 13494 | .xword 0x61cdbb69f6f76de3 |
| 13495 | .xword 0x46a21466a48776c3 |
| 13496 | .xword 0xa5dcd8a46ed558da |
| 13497 | .xword 0x7f16aeca3b2e0b85 |
| 13498 | .xword 0xf19ec643cc00d8d6 |
| 13499 | .xword 0x720c2b4b8551392c |
| 13500 | .xword 0x9cffb0c0492c0df2 |
| 13501 | .xword 0xa352a1e6f2443314 |
| 13502 | .xword 0x0609910f66ed0c1b |
| 13503 | .xword 0x483e7da1e9b9284d |
| 13504 | .xword 0xcab2476105b2a6a0 |
| 13505 | .xword 0x3e2a956cf8a413f0 |
| 13506 | .xword 0xe17d9239e8b6377b |
| 13507 | .xword 0xac88cc0da4a3ca26 |
| 13508 | .xword 0xe8debac172dc4d2a |
| 13509 | .xword 0xe6288d14c7a4798b |
| 13510 | .xword 0x9e35d6d90ad5c9eb |
| 13511 | .xword 0x310bdfbcf7ee1d4a |
| 13512 | .xword 0x140c6315ef391374 |
| 13513 | .xword 0x53f6db70d7ed8070 |
| 13514 | .xword 0x44b3aa9cc94af85e |
| 13515 | .xword 0x4843f958a36e22bb |
| 13516 | .xword 0x273df5a83f7a8207 |
| 13517 | .xword 0xbd040b1e27fcfe35 |
| 13518 | .xword 0x8183600d1c817e3e |
| 13519 | .xword 0x48c8a0e192f64fc4 |
| 13520 | .xword 0xf1e26b24d1c58f5d |
| 13521 | .xword 0x858bfade7b58f907 |
| 13522 | .xword 0x29e1641a46d8617e |
| 13523 | .xword 0x9c27fd76f5fef242 |
| 13524 | .xword 0x89680ebb110e53af |
| 13525 | .xword 0x81611ca69979fe03 |
| 13526 | .xword 0xd527d137d04a0e51 |
| 13527 | .xword 0xeb472e06e3e8364e |
| 13528 | .xword 0xad82cfe5270058a8 |
| 13529 | .xword 0x419893877ab020fc |
| 13530 | .xword 0x43789bc4133c9736 |
| 13531 | .xword 0xe6a2491f802d06ba |
| 13532 | .xword 0xa714dfd16be18941 |
| 13533 | .xword 0x44b6501b15f461fe |
| 13534 | .xword 0x291be31aab50261c |
| 13535 | .xword 0xc5afbcc52ed2e45e |
| 13536 | .xword 0x51ecc7e93a2e641c |
| 13537 | .xword 0x9fa126568b4f2402 |
| 13538 | .xword 0x51158dbbc475b7b3 |
| 13539 | .xword 0xf778b9838b513b9e |
| 13540 | .xword 0x7dad1a5052d1223d |
| 13541 | .xword 0xf253f450bfcaf3a1 |
| 13542 | .xword 0x24dc65f56046128b |
| 13543 | .xword 0x9866ff8098023f42 |
| 13544 | .xword 0xceec18a49875634c |
| 13545 | .xword 0xbac6aaf9c65b8c15 |
| 13546 | .xword 0xc24c175e70246fd9 |
| 13547 | .xword 0x42eacf1171738277 |
| 13548 | .xword 0x7879dd0f0fdba427 |
| 13549 | .xword 0xe18fe0a874caa0d3 |
| 13550 | .xword 0x19785459fe1aa0da |
| 13551 | .xword 0x6ea074d62de95820 |
| 13552 | .xword 0x81829f2a5cf86afb |
| 13553 | .xword 0x68e33ec778185b45 |
| 13554 | .xword 0xe0b9ad689932f522 |
| 13555 | |
| 13556 | SECTION .HTRAPS |
| 13557 | .text |
| 13558 | .global restore_range_regs |
| 13559 | restore_range_regs: |
| 13560 | wr %g0, ASI_MMU_REAL_RANGE, %asi |
| 13561 | mov 1, %g1 |
| 13562 | sllx %g1, 63, %g1 |
| 13563 | ldxa [ASI_MMU_REAL_RANGE_0] %asi, %g2 |
| 13564 | or %g2 ,%g1, %g2 |
| 13565 | stxa %g2, [ASI_MMU_REAL_RANGE_0] %asi |
| 13566 | ldxa [ASI_MMU_REAL_RANGE_1] %asi, %g2 |
| 13567 | or %g2 ,%g1, %g2 |
| 13568 | stxa %g2, [ASI_MMU_REAL_RANGE_1] %asi |
| 13569 | ldxa [ASI_MMU_REAL_RANGE_2] %asi, %g2 |
| 13570 | or %g2 ,%g1, %g2 |
| 13571 | stxa %g2, [ASI_MMU_REAL_RANGE_2] %asi |
| 13572 | ldxa [ASI_MMU_REAL_RANGE_3] %asi, %g2 |
| 13573 | or %g2 ,%g1, %g2 |
| 13574 | stxa %g2, [ASI_MMU_REAL_RANGE_3] %asi |
| 13575 | retry |
| 13576 | |
| 13577 | .global wdog_2_ext |
| 13578 | # 10 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_extensions.s" |
| 13579 | SECTION .HTRAPS |
| 13580 | .global wdog_2_ext |
| 13581 | .global retry_with_base_tba |
| 13582 | .global resolve_bad_tte |
| 13583 | |
| 13584 | .text |
| 13585 | resolve_bad_tte: |
| 13586 | !if pc[13:5]==0, then assume not a relocated handler |
| 13587 | rdpr %tpc, %r4 |
| 13588 | andn %r4, 0xf, %r4 |
| 13589 | sllx %r4, 49, %r5 |
| 13590 | brnz,a %r5, retry_with_base_tba |
| 13591 | !assume %r27 is where we came from .. |
| 13592 | fdivd %f0, %f4, %f12 |
| 13593 | jmpl %r27+8, %r0 |
| 13594 | fdivs %f0, %f4, %f12 |
| 13595 | retry_with_base_tba: |
| 13596 | best_set_reg(TRAP_BASE_VA, %r3, %r5) |
| 13597 | cmp %r4, %r5 |
| 13598 | bz htrap_5_ext_done |
| 13599 | set 0x7fff, %r3 |
| 13600 | and %r4, %r3, %r4 |
| 13601 | or %r5, %r4, %r4 |
| 13602 | wrpr %r4, %tpc |
| 13603 | rdpr %tnpc, %r4 |
| 13604 | and %r4, %r3, %r4 |
| 13605 | or %r5, %r4, %r4 |
| 13606 | wrpr %r4, %tnpc |
| 13607 | retry |
| 13608 | |
| 13609 | htrap_5_ext: |
| 13610 | rd %pc, %l2 |
| 13611 | inc %l3 |
| 13612 | add %l2, htrap_5_ext_done-htrap_5_ext, %l2 |
| 13613 | rdpr %tl, %l3 |
| 13614 | rdpr %tstate, %l4 |
| 13615 | rdhpr %htstate, %l5 |
| 13616 | or %l5, 0x4, %l5 |
| 13617 | inc %l3 |
| 13618 | wrpr %l3, %tl |
| 13619 | wrpr %l2, %tpc |
| 13620 | add %l2, 4, %l2 |
| 13621 | wrpr %l2, %tnpc |
| 13622 | wrpr %l4, %tstate |
| 13623 | wrhpr %l5, %htstate |
| 13624 | retry |
| 13625 | htrap_5_ext_done: |
| 13626 | done |
| 13627 | |
| 13628 | wdog_2_ext: |
| 13629 | mov 0x1f, %l1 |
| 13630 | stxa %l1, [%g0] ASI_LSU_CTL_REG |
| 13631 | ! If TT != 2, then goto trap handler |
| 13632 | rdpr %tt, %l1 |
| 13633 | cmp %l1, 0x2 |
| 13634 | bne wdog_2_goto_handler |
| 13635 | nop |
| 13636 | ! else done |
| 13637 | done |
| 13638 | wdog_2_goto_handler: |
| 13639 | rdhpr %htstate, %l3 |
| 13640 | and %l3, 0x4, %l3 ! If previously in hpriv mode, go to hpriv |
| 13641 | brnz,a %l3, wdog_2_goto_handler_1 |
| 13642 | rdhpr %htba, %l3 |
| 13643 | srlx %l1, 7, %l3 ! Send priv sw traps to priv mode .. |
| 13644 | cmp %l3, 0x2 ! 0x2 = priv sw trap, 0x3=hpriv sw trap .. |
| 13645 | be,a wdog_2_goto_handler_1 |
| 13646 | rdpr %tba, %l3 |
| 13647 | rdhpr %htba, %l3 |
| 13648 | wdog_2_goto_handler_1: |
| 13649 | sllx %l1, 5, %l1 |
| 13650 | add %l1, %l3, %l3 |
| 13651 | jmp %l3 |
| 13652 | nop |
| 13653 | # 86 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_extensions.s" |
| 13654 | ! Red mode other reset handler |
| 13655 | ! Get htba, and tt and make trap address |
| 13656 | ! Jump to trap handler .. |
| 13657 | |
| 13658 | SECTION .RED_SEC |
| 13659 | .global red_other_ext |
| 13660 | .global wdog_red_ext |
| 13661 | .text |
| 13662 | red_other_ext: |
| 13663 | ! IF TL=6, shift stack by one .. |
| 13664 | rdpr %tl, %l1 |
| 13665 | cmp %l1, 6 |
| 13666 | be start_tsa_shift |
| 13667 | nop |
| 13668 | |
| 13669 | continue_red_other: |
| 13670 | mov 0x1f, %l1 |
| 13671 | stxa %l1, [%g0] ASI_LSU_CTL_REG |
| 13672 | |
| 13673 | rdpr %tt, %l1 |
| 13674 | |
| 13675 | rdhpr %htstate, %l2 |
| 13676 | and %l2, 0x4, %l2 ! If previously in hpriv mode, go to hpriv |
| 13677 | brnz,a %l2, red_goto_handler |
| 13678 | rdhpr %htba, %l2 |
| 13679 | srlx %l1, 7, %l2 ! Send priv sw traps to priv mode .. |
| 13680 | cmp %l2, 0x2 ! 0x2 = priv sw trap, 0x3=hpriv sw trap .. |
| 13681 | be,a red_goto_handler |
| 13682 | rdpr %tba, %l2 |
| 13683 | rdhpr %htba, %l2 |
| 13684 | red_goto_handler: |
| 13685 | |
| 13686 | sllx %l1, 5, %l1 |
| 13687 | add %l1, %l2, %l2 |
| 13688 | rdhpr %hpstate, %l1 |
| 13689 | jmp %l2 |
| 13690 | wrhpr %l1, 0x20, %hpstate |
| 13691 | nop |
| 13692 | |
| 13693 | wdog_red_ext: |
| 13694 | ! Shift stack down by 1 ... |
| 13695 | rdpr %tl, %l1 |
| 13696 | cmp %l1, 6 |
| 13697 | bl wdog_end |
| 13698 | start_tsa_shift: |
| 13699 | mov 0x2, %l2 |
| 13700 | |
| 13701 | tsa_shift: |
| 13702 | wrpr %l2, %tl |
| 13703 | rdpr %tt, %l3 |
| 13704 | rdpr %tpc, %l4 |
| 13705 | rdpr %tnpc, %l5 |
| 13706 | rdpr %tstate, %l6 |
| 13707 | rdhpr %htstate, %l7 |
| 13708 | dec %l2 |
| 13709 | wrpr %l2, %tl |
| 13710 | wrpr %l3, %tt |
| 13711 | wrpr %l4, %tpc |
| 13712 | wrpr %l5, %tnpc |
| 13713 | wrpr %l6, %tstate |
| 13714 | wrhpr %l7, %htstate |
| 13715 | add %l2, 2, %l2 |
| 13716 | cmp %l2, %l1 |
| 13717 | ble tsa_shift |
| 13718 | nop |
| 13719 | tsa_shift_done: |
| 13720 | dec %l1 |
| 13721 | wrpr %l1, %tl |
| 13722 | |
| 13723 | wdog_end: |
| 13724 | ! If TT != 2, then goto trap handler |
| 13725 | rdpr %tt, %l1 |
| 13726 | |
| 13727 | cmp %l1, 0x2 |
| 13728 | bne continue_red_other |
| 13729 | nop |
| 13730 | ! else done |
| 13731 | mov 0x1f, %l1 |
| 13732 | stxa %l1, [%g0] ASI_LSU_CTL_REG |
| 13733 | done |
| 13734 | # 973 "diag.j" |
| 13735 | |
| 13736 | SECTION .CWQ_DATA DATA_VA =0x4000 |
| 13737 | attr_data { |
| 13738 | Name = .CWQ_DATA |
| 13739 | hypervisor |
| 13740 | } |
| 13741 | |
| 13742 | .data |
| 13743 | .align 16 |
| 13744 | .global msg |
| 13745 | msg: |
| 13746 | .xword 0xad32fa52374cc6ba |
| 13747 | .xword 0x4cbf52280549003a |
| 13748 | |
| 13749 | .align 16 |
| 13750 | .global results |
| 13751 | results: |
| 13752 | .xword 0xDEADBEEFDEADBEEF |
| 13753 | .xword 0xDEADBEEFDEADBEEF |
| 13754 | !# CWQ data area |
| 13755 | !# CWQ_BASE for core N is CWQ_BASE+(N*256) |
| 13756 | !# CWQ_LAST for core N is CWQ_LAST+(N*256) |
| 13757 | .align 64 |
| 13758 | .global CWQ_BASE |
| 13759 | CWQ_BASE: |
| 13760 | .xword 0xAAAAAAAAAAAAAAA |
| 13761 | .xword 0xAAAAAAAAAAAAAAA |
| 13762 | .xword 0xAAAAAAAAAAAAAAA |
| 13763 | .xword 0xAAAAAAAAAAAAAAA |
| 13764 | .xword 0xAAAAAAAAAAAAAAA |
| 13765 | .xword 0xAAAAAAAAAAAAAAA |
| 13766 | .xword 0xAAAAAAAAAAAAAAA |
| 13767 | .xword 0xAAAAAAAAAAAAAAA |
| 13768 | .xword 0xAAAAAAAAAAAAAAA |
| 13769 | .xword 0xAAAAAAAAAAAAAAA |
| 13770 | .xword 0xAAAAAAAAAAAAAAA |
| 13771 | .xword 0xAAAAAAAAAAAAAAA |
| 13772 | .xword 0xAAAAAAAAAAAAAAA |
| 13773 | .xword 0xAAAAAAAAAAAAAAA |
| 13774 | .xword 0xAAAAAAAAAAAAAAA |
| 13775 | .xword 0xAAAAAAAAAAAAAAA |
| 13776 | .xword 0xAAAAAAAAAAAAAAA |
| 13777 | .xword 0xAAAAAAAAAAAAAAA |
| 13778 | .xword 0xAAAAAAAAAAAAAAA |
| 13779 | .xword 0xAAAAAAAAAAAAAAA |
| 13780 | .xword 0xAAAAAAAAAAAAAAA |
| 13781 | .xword 0xAAAAAAAAAAAAAAA |
| 13782 | .xword 0xAAAAAAAAAAAAAAA |
| 13783 | .xword 0xAAAAAAAAAAAAAAA |
| 13784 | .global CWQ_LAST |
| 13785 | .align 64 |
| 13786 | CWQ_LAST: |
| 13787 | .word 0x0 |
| 13788 | .align 64 |
| 13789 | cwq_base1: |
| 13790 | .xword 0xAAAAAAAAAAAAAAA |
| 13791 | .xword 0xAAAAAAAAAAAAAAA |
| 13792 | .xword 0xAAAAAAAAAAAAAAA |
| 13793 | .xword 0xAAAAAAAAAAAAAAA |
| 13794 | .xword 0xAAAAAAAAAAAAAAA |
| 13795 | .xword 0xAAAAAAAAAAAAAAA |
| 13796 | .xword 0xAAAAAAAAAAAAAAA |
| 13797 | .xword 0xAAAAAAAAAAAAAAA |
| 13798 | .xword 0xAAAAAAAAAAAAAAA |
| 13799 | .xword 0xAAAAAAAAAAAAAAA |
| 13800 | .xword 0xAAAAAAAAAAAAAAA |
| 13801 | .xword 0xAAAAAAAAAAAAAAA |
| 13802 | .xword 0xAAAAAAAAAAAAAAA |
| 13803 | .xword 0xAAAAAAAAAAAAAAA |
| 13804 | .xword 0xAAAAAAAAAAAAAAA |
| 13805 | .xword 0xAAAAAAAAAAAAAAA |
| 13806 | .xword 0xAAAAAAAAAAAAAAA |
| 13807 | .xword 0xAAAAAAAAAAAAAAA |
| 13808 | .xword 0xAAAAAAAAAAAAAAA |
| 13809 | .xword 0xAAAAAAAAAAAAAAA |
| 13810 | .xword 0xAAAAAAAAAAAAAAA |
| 13811 | .xword 0xAAAAAAAAAAAAAAA |
| 13812 | .xword 0xAAAAAAAAAAAAAAA |
| 13813 | .xword 0xAAAAAAAAAAAAAAA |
| 13814 | .align 64 |
| 13815 | cwq_last1: |
| 13816 | .word 0x0 |
| 13817 | .align 64 |
| 13818 | .xword 0xAAAAAAAAAAAAAAA |
| 13819 | .xword 0xAAAAAAAAAAAAAAA |
| 13820 | .xword 0xAAAAAAAAAAAAAAA |
| 13821 | .xword 0xAAAAAAAAAAAAAAA |
| 13822 | .xword 0xAAAAAAAAAAAAAAA |
| 13823 | .xword 0xAAAAAAAAAAAAAAA |
| 13824 | .xword 0xAAAAAAAAAAAAAAA |
| 13825 | .xword 0xAAAAAAAAAAAAAAA |
| 13826 | .xword 0xAAAAAAAAAAAAAAA |
| 13827 | .xword 0xAAAAAAAAAAAAAAA |
| 13828 | .xword 0xAAAAAAAAAAAAAAA |
| 13829 | .xword 0xAAAAAAAAAAAAAAA |
| 13830 | .xword 0xAAAAAAAAAAAAAAA |
| 13831 | .xword 0xAAAAAAAAAAAAAAA |
| 13832 | .xword 0xAAAAAAAAAAAAAAA |
| 13833 | .xword 0xAAAAAAAAAAAAAAA |
| 13834 | .xword 0xAAAAAAAAAAAAAAA |
| 13835 | .xword 0xAAAAAAAAAAAAAAA |
| 13836 | .xword 0xAAAAAAAAAAAAAAA |
| 13837 | .xword 0xAAAAAAAAAAAAAAA |
| 13838 | .xword 0xAAAAAAAAAAAAAAA |
| 13839 | .xword 0xAAAAAAAAAAAAAAA |
| 13840 | .xword 0xAAAAAAAAAAAAAAA |
| 13841 | .xword 0xAAAAAAAAAAAAAAA |
| 13842 | .align 64 |
| 13843 | .word 0x0 |
| 13844 | .align 64 |
| 13845 | .xword 0xAAAAAAAAAAAAAAA |
| 13846 | .xword 0xAAAAAAAAAAAAAAA |
| 13847 | .xword 0xAAAAAAAAAAAAAAA |
| 13848 | .xword 0xAAAAAAAAAAAAAAA |
| 13849 | .xword 0xAAAAAAAAAAAAAAA |
| 13850 | .xword 0xAAAAAAAAAAAAAAA |
| 13851 | .xword 0xAAAAAAAAAAAAAAA |
| 13852 | .xword 0xAAAAAAAAAAAAAAA |
| 13853 | .xword 0xAAAAAAAAAAAAAAA |
| 13854 | .xword 0xAAAAAAAAAAAAAAA |
| 13855 | .xword 0xAAAAAAAAAAAAAAA |
| 13856 | .xword 0xAAAAAAAAAAAAAAA |
| 13857 | .xword 0xAAAAAAAAAAAAAAA |
| 13858 | .xword 0xAAAAAAAAAAAAAAA |
| 13859 | .xword 0xAAAAAAAAAAAAAAA |
| 13860 | .xword 0xAAAAAAAAAAAAAAA |
| 13861 | .xword 0xAAAAAAAAAAAAAAA |
| 13862 | .xword 0xAAAAAAAAAAAAAAA |
| 13863 | .xword 0xAAAAAAAAAAAAAAA |
| 13864 | .xword 0xAAAAAAAAAAAAAAA |
| 13865 | .xword 0xAAAAAAAAAAAAAAA |
| 13866 | .xword 0xAAAAAAAAAAAAAAA |
| 13867 | .xword 0xAAAAAAAAAAAAAAA |
| 13868 | .xword 0xAAAAAAAAAAAAAAA |
| 13869 | .align 64 |
| 13870 | .word 0x0 |
| 13871 | .align 64 |
| 13872 | .xword 0xAAAAAAAAAAAAAAA |
| 13873 | .xword 0xAAAAAAAAAAAAAAA |
| 13874 | .xword 0xAAAAAAAAAAAAAAA |
| 13875 | .xword 0xAAAAAAAAAAAAAAA |
| 13876 | .xword 0xAAAAAAAAAAAAAAA |
| 13877 | .xword 0xAAAAAAAAAAAAAAA |
| 13878 | .xword 0xAAAAAAAAAAAAAAA |
| 13879 | .xword 0xAAAAAAAAAAAAAAA |
| 13880 | .xword 0xAAAAAAAAAAAAAAA |
| 13881 | .xword 0xAAAAAAAAAAAAAAA |
| 13882 | .xword 0xAAAAAAAAAAAAAAA |
| 13883 | .xword 0xAAAAAAAAAAAAAAA |
| 13884 | .xword 0xAAAAAAAAAAAAAAA |
| 13885 | .xword 0xAAAAAAAAAAAAAAA |
| 13886 | .xword 0xAAAAAAAAAAAAAAA |
| 13887 | .xword 0xAAAAAAAAAAAAAAA |
| 13888 | .xword 0xAAAAAAAAAAAAAAA |
| 13889 | .xword 0xAAAAAAAAAAAAAAA |
| 13890 | .xword 0xAAAAAAAAAAAAAAA |
| 13891 | .xword 0xAAAAAAAAAAAAAAA |
| 13892 | .xword 0xAAAAAAAAAAAAAAA |
| 13893 | .xword 0xAAAAAAAAAAAAAAA |
| 13894 | .xword 0xAAAAAAAAAAAAAAA |
| 13895 | .xword 0xAAAAAAAAAAAAAAA |
| 13896 | .align 64 |
| 13897 | .word 0x0 |
| 13898 | .align 64 |
| 13899 | .xword 0xAAAAAAAAAAAAAAA |
| 13900 | .xword 0xAAAAAAAAAAAAAAA |
| 13901 | .xword 0xAAAAAAAAAAAAAAA |
| 13902 | .xword 0xAAAAAAAAAAAAAAA |
| 13903 | .xword 0xAAAAAAAAAAAAAAA |
| 13904 | .xword 0xAAAAAAAAAAAAAAA |
| 13905 | .xword 0xAAAAAAAAAAAAAAA |
| 13906 | .xword 0xAAAAAAAAAAAAAAA |
| 13907 | .xword 0xAAAAAAAAAAAAAAA |
| 13908 | .xword 0xAAAAAAAAAAAAAAA |
| 13909 | .xword 0xAAAAAAAAAAAAAAA |
| 13910 | .xword 0xAAAAAAAAAAAAAAA |
| 13911 | .xword 0xAAAAAAAAAAAAAAA |
| 13912 | .xword 0xAAAAAAAAAAAAAAA |
| 13913 | .xword 0xAAAAAAAAAAAAAAA |
| 13914 | .xword 0xAAAAAAAAAAAAAAA |
| 13915 | .xword 0xAAAAAAAAAAAAAAA |
| 13916 | .xword 0xAAAAAAAAAAAAAAA |
| 13917 | .xword 0xAAAAAAAAAAAAAAA |
| 13918 | .xword 0xAAAAAAAAAAAAAAA |
| 13919 | .xword 0xAAAAAAAAAAAAAAA |
| 13920 | .xword 0xAAAAAAAAAAAAAAA |
| 13921 | .xword 0xAAAAAAAAAAAAAAA |
| 13922 | .xword 0xAAAAAAAAAAAAAAA |
| 13923 | .align 64 |
| 13924 | .word 0x0 |
| 13925 | .align 64 |
| 13926 | .xword 0xAAAAAAAAAAAAAAA |
| 13927 | .xword 0xAAAAAAAAAAAAAAA |
| 13928 | .xword 0xAAAAAAAAAAAAAAA |
| 13929 | .xword 0xAAAAAAAAAAAAAAA |
| 13930 | .xword 0xAAAAAAAAAAAAAAA |
| 13931 | .xword 0xAAAAAAAAAAAAAAA |
| 13932 | .xword 0xAAAAAAAAAAAAAAA |
| 13933 | .xword 0xAAAAAAAAAAAAAAA |
| 13934 | .xword 0xAAAAAAAAAAAAAAA |
| 13935 | .xword 0xAAAAAAAAAAAAAAA |
| 13936 | .xword 0xAAAAAAAAAAAAAAA |
| 13937 | .xword 0xAAAAAAAAAAAAAAA |
| 13938 | .xword 0xAAAAAAAAAAAAAAA |
| 13939 | .xword 0xAAAAAAAAAAAAAAA |
| 13940 | .xword 0xAAAAAAAAAAAAAAA |
| 13941 | .xword 0xAAAAAAAAAAAAAAA |
| 13942 | .xword 0xAAAAAAAAAAAAAAA |
| 13943 | .xword 0xAAAAAAAAAAAAAAA |
| 13944 | .xword 0xAAAAAAAAAAAAAAA |
| 13945 | .xword 0xAAAAAAAAAAAAAAA |
| 13946 | .xword 0xAAAAAAAAAAAAAAA |
| 13947 | .xword 0xAAAAAAAAAAAAAAA |
| 13948 | .xword 0xAAAAAAAAAAAAAAA |
| 13949 | .xword 0xAAAAAAAAAAAAAAA |
| 13950 | .align 64 |
| 13951 | .word 0x0 |
| 13952 | .align 64 |
| 13953 | .xword 0xAAAAAAAAAAAAAAA |
| 13954 | .xword 0xAAAAAAAAAAAAAAA |
| 13955 | .xword 0xAAAAAAAAAAAAAAA |
| 13956 | .xword 0xAAAAAAAAAAAAAAA |
| 13957 | .xword 0xAAAAAAAAAAAAAAA |
| 13958 | .xword 0xAAAAAAAAAAAAAAA |
| 13959 | .xword 0xAAAAAAAAAAAAAAA |
| 13960 | .xword 0xAAAAAAAAAAAAAAA |
| 13961 | .xword 0xAAAAAAAAAAAAAAA |
| 13962 | .xword 0xAAAAAAAAAAAAAAA |
| 13963 | .xword 0xAAAAAAAAAAAAAAA |
| 13964 | .xword 0xAAAAAAAAAAAAAAA |
| 13965 | .xword 0xAAAAAAAAAAAAAAA |
| 13966 | .xword 0xAAAAAAAAAAAAAAA |
| 13967 | .xword 0xAAAAAAAAAAAAAAA |
| 13968 | .xword 0xAAAAAAAAAAAAAAA |
| 13969 | .xword 0xAAAAAAAAAAAAAAA |
| 13970 | .xword 0xAAAAAAAAAAAAAAA |
| 13971 | .xword 0xAAAAAAAAAAAAAAA |
| 13972 | .xword 0xAAAAAAAAAAAAAAA |
| 13973 | .xword 0xAAAAAAAAAAAAAAA |
| 13974 | .xword 0xAAAAAAAAAAAAAAA |
| 13975 | .xword 0xAAAAAAAAAAAAAAA |
| 13976 | .xword 0xAAAAAAAAAAAAAAA |
| 13977 | .align 64 |
| 13978 | .word 0x0 |
| 13979 | |
| 13980 | |
| 13981 | |
| 13982 | SECTION .MyHTRAPS_0 TEXT_VA = 0x0000000000280000, DATA_VA = 0x00000000002c0000 |
| 13983 | attr_text { |
| 13984 | Name = .MyHTRAPS_0, |
| 13985 | RA = 0x0000000000280000, |
| 13986 | PA = ra2pa(0x0000000000280000,0), |
| 13987 | part_0_ctx_zero_tsb_config_3, |
| 13988 | part_0_ctx_nonzero_tsb_config_3, |
| 13989 | TTE_G = 1, |
| 13990 | TTE_Context = 0, |
| 13991 | TTE_V = 1, |
| 13992 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 13993 | TTE_NFO = 0, |
| 13994 | TTE_IE = 0, |
| 13995 | TTE_Soft2 = 0, |
| 13996 | TTE_Diag = 0, |
| 13997 | TTE_Soft = 0, |
| 13998 | TTE_L = 0, |
| 13999 | TTE_CP = 1, |
| 14000 | TTE_CV = 0, |
| 14001 | TTE_E = 1, |
| 14002 | TTE_P = 1, |
| 14003 | TTE_W = 0, |
| 14004 | TTE_X = 0 |
| 14005 | } |
| 14006 | |
| 14007 | |
| 14008 | attr_data { |
| 14009 | Name = .MyHTRAPS_0, |
| 14010 | RA = 0x00000000002c0000, |
| 14011 | PA = ra2pa(0x00000000002c0000,0), |
| 14012 | part_0_ctx_zero_tsb_config_3, |
| 14013 | part_0_ctx_nonzero_tsb_config_3, |
| 14014 | TTE_G = 1, |
| 14015 | TTE_Context = 0, |
| 14016 | TTE_V = 1, |
| 14017 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 14018 | TTE_NFO = 0, |
| 14019 | TTE_IE = 0, |
| 14020 | TTE_Soft2 = 0, |
| 14021 | TTE_Diag = 0, |
| 14022 | TTE_Soft = 0, |
| 14023 | TTE_L = 0, |
| 14024 | TTE_CP = 0, |
| 14025 | TTE_CV = 0, |
| 14026 | TTE_E = 0, |
| 14027 | TTE_P = 1, |
| 14028 | TTE_W = 0 |
| 14029 | } |
| 14030 | |
| 14031 | .text |
| 14032 | #include "htraps.s" |
| 14033 | #include "tlu_htraps_ext.s" |
| 14034 | |
| 14035 | |
| 14036 | |
| 14037 | SECTION .MyHTRAPS_1 TEXT_VA = 0x00000000002a0000, DATA_VA = 0x00000000002e0000 |
| 14038 | attr_text { |
| 14039 | Name = .MyHTRAPS_1, |
| 14040 | RA = 0x00000000002a0000, |
| 14041 | PA = ra2pa(0x00000000002a0000,0), |
| 14042 | part_0_ctx_zero_tsb_config_3, |
| 14043 | part_0_ctx_nonzero_tsb_config_3, |
| 14044 | TTE_G = 1, |
| 14045 | TTE_Context = 0, |
| 14046 | TTE_V = 1, |
| 14047 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 14048 | TTE_NFO = 0, |
| 14049 | TTE_IE = 0, |
| 14050 | TTE_Soft2 = 0, |
| 14051 | TTE_Diag = 0, |
| 14052 | TTE_Soft = 0, |
| 14053 | TTE_L = 0, |
| 14054 | TTE_CP = 0, |
| 14055 | TTE_CV = 1, |
| 14056 | TTE_E = 1, |
| 14057 | TTE_P = 1, |
| 14058 | TTE_W = 0, |
| 14059 | TTE_X = 0 |
| 14060 | } |
| 14061 | |
| 14062 | |
| 14063 | attr_data { |
| 14064 | Name = .MyHTRAPS_1, |
| 14065 | RA = 0x00000000002e0000, |
| 14066 | PA = ra2pa(0x00000000002e0000,0), |
| 14067 | part_0_ctx_zero_tsb_config_3, |
| 14068 | part_0_ctx_nonzero_tsb_config_3, |
| 14069 | TTE_G = 1, |
| 14070 | TTE_Context = 0, |
| 14071 | TTE_V = 1, |
| 14072 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 14073 | TTE_NFO = 0, |
| 14074 | TTE_IE = 0, |
| 14075 | TTE_Soft2 = 0, |
| 14076 | TTE_Diag = 0, |
| 14077 | TTE_Soft = 0, |
| 14078 | TTE_L = 0, |
| 14079 | TTE_CP = 1, |
| 14080 | TTE_CV = 1, |
| 14081 | TTE_E = 0, |
| 14082 | TTE_P = 1, |
| 14083 | TTE_W = 0 |
| 14084 | } |
| 14085 | |
| 14086 | .text |
| 14087 | #include "htraps.s" |
| 14088 | #include "tlu_htraps_ext.s" |
| 14089 | |
| 14090 | |
| 14091 | |
| 14092 | SECTION .MyHTRAPS_2 TEXT_VA = 0x0000000200280000, DATA_VA = 0x00000002002c0000 |
| 14093 | attr_text { |
| 14094 | Name = .MyHTRAPS_2, |
| 14095 | RA = 0x0000000200280000, |
| 14096 | PA = ra2pa(0x0000000200280000,0), |
| 14097 | part_0_ctx_zero_tsb_config_3, |
| 14098 | part_0_ctx_nonzero_tsb_config_3, |
| 14099 | TTE_G = 1, |
| 14100 | TTE_Context = 0, |
| 14101 | TTE_V = 1, |
| 14102 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 14103 | TTE_NFO = 0, |
| 14104 | TTE_IE = 0, |
| 14105 | TTE_Soft2 = 0, |
| 14106 | TTE_Diag = 0, |
| 14107 | TTE_Soft = 0, |
| 14108 | TTE_L = 0, |
| 14109 | TTE_CP = 0, |
| 14110 | TTE_CV = 0, |
| 14111 | TTE_E = 0, |
| 14112 | TTE_P = 1, |
| 14113 | TTE_W = 0, |
| 14114 | TTE_X = 0 |
| 14115 | } |
| 14116 | |
| 14117 | |
| 14118 | attr_data { |
| 14119 | Name = .MyHTRAPS_2, |
| 14120 | RA = 0x00000002002c0000, |
| 14121 | PA = ra2pa(0x00000002002c0000,0), |
| 14122 | part_0_ctx_zero_tsb_config_3, |
| 14123 | part_0_ctx_nonzero_tsb_config_3, |
| 14124 | TTE_G = 1, |
| 14125 | TTE_Context = 0, |
| 14126 | TTE_V = 1, |
| 14127 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 14128 | TTE_NFO = 0, |
| 14129 | TTE_IE = 0, |
| 14130 | TTE_Soft2 = 0, |
| 14131 | TTE_Diag = 0, |
| 14132 | TTE_Soft = 0, |
| 14133 | TTE_L = 0, |
| 14134 | TTE_CP = 1, |
| 14135 | TTE_CV = 0, |
| 14136 | TTE_E = 0, |
| 14137 | TTE_P = 1, |
| 14138 | TTE_W = 0 |
| 14139 | } |
| 14140 | |
| 14141 | .text |
| 14142 | #include "htraps.s" |
| 14143 | #include "tlu_htraps_ext.s" |
| 14144 | |
| 14145 | |
| 14146 | |
| 14147 | SECTION .MyHTRAPS_3 TEXT_VA = 0x00000002002a0000, DATA_VA = 0x00000002002e0000 |
| 14148 | attr_text { |
| 14149 | Name = .MyHTRAPS_3, |
| 14150 | RA = 0x00000002002a0000, |
| 14151 | PA = ra2pa(0x00000002002a0000,0), |
| 14152 | part_0_ctx_zero_tsb_config_3, |
| 14153 | part_0_ctx_nonzero_tsb_config_3, |
| 14154 | TTE_G = 1, |
| 14155 | TTE_Context = 0, |
| 14156 | TTE_V = 1, |
| 14157 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 14158 | TTE_NFO = 0, |
| 14159 | TTE_IE = 0, |
| 14160 | TTE_Soft2 = 0, |
| 14161 | TTE_Diag = 0, |
| 14162 | TTE_Soft = 0, |
| 14163 | TTE_L = 0, |
| 14164 | TTE_CP = 0, |
| 14165 | TTE_CV = 1, |
| 14166 | TTE_E = 0, |
| 14167 | TTE_P = 1, |
| 14168 | TTE_W = 0, |
| 14169 | TTE_X = 0 |
| 14170 | } |
| 14171 | |
| 14172 | |
| 14173 | attr_data { |
| 14174 | Name = .MyHTRAPS_3, |
| 14175 | RA = 0x00000002002e0000, |
| 14176 | PA = ra2pa(0x00000002002e0000,0), |
| 14177 | part_0_ctx_zero_tsb_config_3, |
| 14178 | part_0_ctx_nonzero_tsb_config_3, |
| 14179 | TTE_G = 1, |
| 14180 | TTE_Context = 0, |
| 14181 | TTE_V = 1, |
| 14182 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 14183 | TTE_NFO = 0, |
| 14184 | TTE_IE = 0, |
| 14185 | TTE_Soft2 = 0, |
| 14186 | TTE_Diag = 0, |
| 14187 | TTE_Soft = 0, |
| 14188 | TTE_L = 0, |
| 14189 | TTE_CP = 0, |
| 14190 | TTE_CV = 0, |
| 14191 | TTE_E = 0, |
| 14192 | TTE_P = 1, |
| 14193 | TTE_W = 0 |
| 14194 | } |
| 14195 | |
| 14196 | .text |
| 14197 | #include "htraps.s" |
| 14198 | #include "tlu_htraps_ext.s" |
| 14199 | |
| 14200 | |
| 14201 | |
| 14202 | |
| 14203 | |
| 14204 | SECTION .MyTRAPS_0 TEXT_VA = 0x0000000000380000, DATA_VA = 0x00000000003c0000 |
| 14205 | attr_text { |
| 14206 | Name = .MyTRAPS_0, |
| 14207 | RA = 0x0000000000380000, |
| 14208 | PA = ra2pa(0x0000000000380000,0), |
| 14209 | part_0_ctx_zero_tsb_config_3, |
| 14210 | part_0_ctx_nonzero_tsb_config_3, |
| 14211 | TTE_G = 1, |
| 14212 | TTE_Context = 0, |
| 14213 | TTE_V = 1, |
| 14214 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 14215 | TTE_NFO = 0, |
| 14216 | TTE_IE = 1, |
| 14217 | TTE_Soft2 = 0, |
| 14218 | TTE_Diag = 0, |
| 14219 | TTE_Soft = 0, |
| 14220 | TTE_L = 0, |
| 14221 | TTE_CP = 1, |
| 14222 | TTE_CV = 0, |
| 14223 | TTE_E = 0, |
| 14224 | TTE_P = 1, |
| 14225 | TTE_W = 0, |
| 14226 | TTE_X = 0 |
| 14227 | } |
| 14228 | |
| 14229 | |
| 14230 | attr_data { |
| 14231 | Name = .MyTRAPS_0, |
| 14232 | RA = 0x00000000003c0000, |
| 14233 | PA = ra2pa(0x00000000003c0000,0), |
| 14234 | part_0_ctx_zero_tsb_config_3, |
| 14235 | part_0_ctx_nonzero_tsb_config_3, |
| 14236 | TTE_G = 1, |
| 14237 | TTE_Context = 0, |
| 14238 | TTE_V = 1, |
| 14239 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 14240 | TTE_NFO = 1, |
| 14241 | TTE_IE = 0, |
| 14242 | TTE_Soft2 = 0, |
| 14243 | TTE_Diag = 0, |
| 14244 | TTE_Soft = 0, |
| 14245 | TTE_L = 0, |
| 14246 | TTE_CP = 1, |
| 14247 | TTE_CV = 1, |
| 14248 | TTE_E = 0, |
| 14249 | TTE_P = 1, |
| 14250 | TTE_W = 1 |
| 14251 | } |
| 14252 | |
| 14253 | #include "traps.s" |
| 14254 | |
| 14255 | |
| 14256 | |
| 14257 | SECTION .MyTRAPS_1 TEXT_VA = 0x00000000003a0000, DATA_VA = 0x00000000003e0000 |
| 14258 | attr_text { |
| 14259 | Name = .MyTRAPS_1, |
| 14260 | RA = 0x00000000003a0000, |
| 14261 | PA = ra2pa(0x00000000003a0000,0), |
| 14262 | part_0_ctx_zero_tsb_config_3, |
| 14263 | part_0_ctx_nonzero_tsb_config_3, |
| 14264 | TTE_G = 1, |
| 14265 | TTE_Context = 0, |
| 14266 | TTE_V = 1, |
| 14267 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 14268 | TTE_NFO = 0, |
| 14269 | TTE_IE = 1, |
| 14270 | TTE_Soft2 = 0, |
| 14271 | TTE_Diag = 0, |
| 14272 | TTE_Soft = 0, |
| 14273 | TTE_L = 0, |
| 14274 | TTE_CP = 1, |
| 14275 | TTE_CV = 1, |
| 14276 | TTE_E = 1, |
| 14277 | TTE_P = 0, |
| 14278 | TTE_W = 1, |
| 14279 | TTE_X = 1 |
| 14280 | } |
| 14281 | |
| 14282 | |
| 14283 | attr_data { |
| 14284 | Name = .MyTRAPS_1, |
| 14285 | RA = 0x00000000003e0000, |
| 14286 | PA = ra2pa(0x00000000003e0000,0), |
| 14287 | part_0_ctx_zero_tsb_config_3, |
| 14288 | part_0_ctx_nonzero_tsb_config_3, |
| 14289 | TTE_G = 1, |
| 14290 | TTE_Context = 0, |
| 14291 | TTE_V = 1, |
| 14292 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 14293 | TTE_NFO = 0, |
| 14294 | TTE_IE = 0, |
| 14295 | TTE_Soft2 = 0, |
| 14296 | TTE_Diag = 0, |
| 14297 | TTE_Soft = 0, |
| 14298 | TTE_L = 0, |
| 14299 | TTE_CP = 1, |
| 14300 | TTE_CV = 0, |
| 14301 | TTE_E = 0, |
| 14302 | TTE_P = 1, |
| 14303 | TTE_W = 0 |
| 14304 | } |
| 14305 | |
| 14306 | #include "traps.s" |
| 14307 | |
| 14308 | |
| 14309 | |
| 14310 | SECTION .MyTRAPS_2 TEXT_VA = 0x0000000400380000, DATA_VA = 0x00000004003c0000 |
| 14311 | attr_text { |
| 14312 | Name = .MyTRAPS_2, |
| 14313 | RA = 0x0000000400380000, |
| 14314 | PA = ra2pa(0x0000000400380000,0), |
| 14315 | part_0_ctx_zero_tsb_config_3, |
| 14316 | part_0_ctx_nonzero_tsb_config_3, |
| 14317 | TTE_G = 1, |
| 14318 | TTE_Context = 0, |
| 14319 | TTE_V = 1, |
| 14320 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 14321 | TTE_NFO = 1, |
| 14322 | TTE_IE = 1, |
| 14323 | TTE_Soft2 = 0, |
| 14324 | TTE_Diag = 0, |
| 14325 | TTE_Soft = 0, |
| 14326 | TTE_L = 0, |
| 14327 | TTE_CP = 0, |
| 14328 | TTE_CV = 0, |
| 14329 | TTE_E = 1, |
| 14330 | TTE_P = 1, |
| 14331 | TTE_W = 1, |
| 14332 | TTE_X = 1 |
| 14333 | } |
| 14334 | |
| 14335 | |
| 14336 | attr_data { |
| 14337 | Name = .MyTRAPS_2, |
| 14338 | RA = 0x00000004003c0000, |
| 14339 | PA = ra2pa(0x00000004003c0000,0), |
| 14340 | part_0_ctx_zero_tsb_config_3, |
| 14341 | part_0_ctx_nonzero_tsb_config_3, |
| 14342 | TTE_G = 1, |
| 14343 | TTE_Context = 0, |
| 14344 | TTE_V = 1, |
| 14345 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 14346 | TTE_NFO = 1, |
| 14347 | TTE_IE = 1, |
| 14348 | TTE_Soft2 = 0, |
| 14349 | TTE_Diag = 0, |
| 14350 | TTE_Soft = 0, |
| 14351 | TTE_L = 0, |
| 14352 | TTE_CP = 0, |
| 14353 | TTE_CV = 0, |
| 14354 | TTE_E = 0, |
| 14355 | TTE_P = 1, |
| 14356 | TTE_W = 1 |
| 14357 | } |
| 14358 | |
| 14359 | #include "traps.s" |
| 14360 | |
| 14361 | |
| 14362 | |
| 14363 | SECTION .MyTRAPS_3 TEXT_VA = 0x00000004003a0000, DATA_VA = 0x00000004003e0000 |
| 14364 | attr_text { |
| 14365 | Name = .MyTRAPS_3, |
| 14366 | RA = 0x00000004003a0000, |
| 14367 | PA = ra2pa(0x00000004003a0000,0), |
| 14368 | part_0_ctx_zero_tsb_config_3, |
| 14369 | part_0_ctx_nonzero_tsb_config_3, |
| 14370 | TTE_G = 1, |
| 14371 | TTE_Context = 0, |
| 14372 | TTE_V = 1, |
| 14373 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 14374 | TTE_NFO = 0, |
| 14375 | TTE_IE = 0, |
| 14376 | TTE_Soft2 = 0, |
| 14377 | TTE_Diag = 0, |
| 14378 | TTE_Soft = 0, |
| 14379 | TTE_L = 0, |
| 14380 | TTE_CP = 1, |
| 14381 | TTE_CV = 1, |
| 14382 | TTE_E = 0, |
| 14383 | TTE_P = 1, |
| 14384 | TTE_W = 1, |
| 14385 | TTE_X = 0 |
| 14386 | } |
| 14387 | |
| 14388 | |
| 14389 | attr_data { |
| 14390 | Name = .MyTRAPS_3, |
| 14391 | RA = 0x00000004003e0000, |
| 14392 | PA = ra2pa(0x00000004003e0000,0), |
| 14393 | part_0_ctx_zero_tsb_config_3, |
| 14394 | part_0_ctx_nonzero_tsb_config_3, |
| 14395 | TTE_G = 1, |
| 14396 | TTE_Context = 0, |
| 14397 | TTE_V = 1, |
| 14398 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 14399 | TTE_NFO = 1, |
| 14400 | TTE_IE = 0, |
| 14401 | TTE_Soft2 = 0, |
| 14402 | TTE_Diag = 0, |
| 14403 | TTE_Soft = 0, |
| 14404 | TTE_L = 0, |
| 14405 | TTE_CP = 1, |
| 14406 | TTE_CV = 1, |
| 14407 | TTE_E = 0, |
| 14408 | TTE_P = 1, |
| 14409 | TTE_W = 1 |
| 14410 | } |
| 14411 | |
| 14412 | #include "traps.s" |
| 14413 | |
| 14414 | |
| 14415 | |
| 14416 | |
| 14417 | |
| 14418 | SECTION .MyDATA_0 TEXT_VA = 0x00000000e0140000, DATA_VA = 0x0000000060140000 |
| 14419 | attr_data { |
| 14420 | Name = .MyDATA_0, |
| 14421 | RA = 0x0000000170100000, |
| 14422 | PA = ra2pa(0x0000000170100000,0), |
| 14423 | part_0_ctx_zero_tsb_config_0, |
| 14424 | part_0_ctx_nonzero_tsb_config_0, |
| 14425 | TTE_G = 1, |
| 14426 | TTE_Context = PCONTEXT, |
| 14427 | TTE_V = 1, |
| 14428 | TTE_Size = 0, |
| 14429 | TTE_NFO = 0, |
| 14430 | TTE_IE = 0, |
| 14431 | TTE_Soft2 = 0, |
| 14432 | TTE_Diag = 0, |
| 14433 | TTE_Soft = 0, |
| 14434 | TTE_L = 0, |
| 14435 | TTE_CP = 1, |
| 14436 | TTE_CV = 1, |
| 14437 | TTE_E = 0, |
| 14438 | TTE_P = 1, |
| 14439 | TTE_W = 0 |
| 14440 | } |
| 14441 | |
| 14442 | |
| 14443 | attr_data { |
| 14444 | Name = .MyDATA_0, |
| 14445 | RA = 0x0000000170100000, |
| 14446 | PA = ra2pa(0x0000000170100000,0), |
| 14447 | part_0_ctx_zero_tsb_config_1, |
| 14448 | part_0_ctx_nonzero_tsb_config_1, |
| 14449 | TTE_G = 1, |
| 14450 | TTE_Context = SCONTEXT, |
| 14451 | TTE_V = 1, |
| 14452 | TTE_Size = 5, |
| 14453 | TTE_NFO = 0, |
| 14454 | TTE_IE = 0, |
| 14455 | TTE_Soft2 = 0, |
| 14456 | TTE_Diag = 0, |
| 14457 | TTE_Soft = 0, |
| 14458 | TTE_L = 0, |
| 14459 | TTE_CP = 0, |
| 14460 | TTE_CV = 0, |
| 14461 | TTE_E = 1, |
| 14462 | TTE_P = 1, |
| 14463 | TTE_W = 0, |
| 14464 | tsbonly |
| 14465 | } |
| 14466 | |
| 14467 | |
| 14468 | attr_data { |
| 14469 | Name = .MyDATA_0, |
| 14470 | hypervisor |
| 14471 | } |
| 14472 | |
| 14473 | |
| 14474 | attr_text { |
| 14475 | Name = .MyDATA_0, |
| 14476 | hypervisor |
| 14477 | } |
| 14478 | |
| 14479 | .data |
| 14480 | .xword 0xca284d3a64b556f2 |
| 14481 | .xword 0xa2c79d0fc5782815 |
| 14482 | .xword 0xecb3732de43d69c4 |
| 14483 | .xword 0xc67dfc5f871af7b5 |
| 14484 | .xword 0x31c7547f63873a65 |
| 14485 | .xword 0x860ad761d65604d4 |
| 14486 | .xword 0x05deb18b68996258 |
| 14487 | .xword 0xe4bf5de864c7f207 |
| 14488 | .xword 0x7e4c721a3069c5c1 |
| 14489 | .xword 0xfc3bddd9c376b496 |
| 14490 | .xword 0x59f0ada3219e6701 |
| 14491 | .xword 0xa6a4a6f1300d1e3e |
| 14492 | .xword 0x5fb565f71c1d5674 |
| 14493 | .xword 0xab0b294a2b27dcd7 |
| 14494 | .xword 0x42ccfa45b4ec9a2e |
| 14495 | .xword 0x1bdfb5d061d3c617 |
| 14496 | .xword 0x16b53bdd427eef79 |
| 14497 | .xword 0x74ef17cbf15bfac8 |
| 14498 | .xword 0xbce567f7cd4724c6 |
| 14499 | .xword 0xe045a8a5caca2eca |
| 14500 | .xword 0xb38493401a00c4c2 |
| 14501 | .xword 0xc033e77755d04c7b |
| 14502 | .xword 0x063da9a4b423efe5 |
| 14503 | .xword 0xbfd7904a3b2219d9 |
| 14504 | .xword 0x09388ea7c5583211 |
| 14505 | .xword 0xda1d794167f061a6 |
| 14506 | .xword 0xe077b5a6ba20c7d1 |
| 14507 | .xword 0x83238cb6611073b0 |
| 14508 | .xword 0xb235096f350b895a |
| 14509 | .xword 0x3c967d224c7c375c |
| 14510 | .xword 0x89ddfa7654f21e5a |
| 14511 | .xword 0x13b761c601b064b2 |
| 14512 | |
| 14513 | |
| 14514 | |
| 14515 | SECTION .MyDATA_1 TEXT_VA = 0x00000000e0340000, DATA_VA = 0x0000000060340000 |
| 14516 | attr_data { |
| 14517 | Name = .MyDATA_1, |
| 14518 | RA = 0x0000000170300000, |
| 14519 | PA = ra2pa(0x0000000170300000,0), |
| 14520 | part_0_ctx_zero_tsb_config_0, |
| 14521 | part_0_ctx_nonzero_tsb_config_0, |
| 14522 | TTE_G = 1, |
| 14523 | TTE_Context = PCONTEXT, |
| 14524 | TTE_V = 1, |
| 14525 | TTE_Size = 3, |
| 14526 | TTE_NFO = 1, |
| 14527 | TTE_IE = 1, |
| 14528 | TTE_Soft2 = 0, |
| 14529 | TTE_Diag = 0, |
| 14530 | TTE_Soft = 0, |
| 14531 | TTE_L = 0, |
| 14532 | TTE_CP = 1, |
| 14533 | TTE_CV = 0, |
| 14534 | TTE_E = 1, |
| 14535 | TTE_P = 0, |
| 14536 | TTE_W = 1 |
| 14537 | } |
| 14538 | |
| 14539 | |
| 14540 | attr_data { |
| 14541 | Name = .MyDATA_1, |
| 14542 | RA = 0x0000000170300000, |
| 14543 | PA = ra2pa(0x0000000170300000,0), |
| 14544 | part_0_ctx_zero_tsb_config_1, |
| 14545 | part_0_ctx_nonzero_tsb_config_1, |
| 14546 | TTE_G = 1, |
| 14547 | TTE_Context = SCONTEXT, |
| 14548 | TTE_V = 1, |
| 14549 | TTE_Size = 1, |
| 14550 | TTE_NFO = 1, |
| 14551 | TTE_IE = 0, |
| 14552 | TTE_Soft2 = 0, |
| 14553 | TTE_Diag = 0, |
| 14554 | TTE_Soft = 0, |
| 14555 | TTE_L = 0, |
| 14556 | TTE_CP = 0, |
| 14557 | TTE_CV = 1, |
| 14558 | TTE_E = 0, |
| 14559 | TTE_P = 0, |
| 14560 | TTE_W = 0, |
| 14561 | tsbonly |
| 14562 | } |
| 14563 | |
| 14564 | |
| 14565 | attr_data { |
| 14566 | Name = .MyDATA_1, |
| 14567 | hypervisor |
| 14568 | } |
| 14569 | |
| 14570 | |
| 14571 | attr_text { |
| 14572 | Name = .MyDATA_1, |
| 14573 | hypervisor |
| 14574 | } |
| 14575 | |
| 14576 | .data |
| 14577 | .xword 0xdeb0c4bab33237f3 |
| 14578 | .xword 0x3df5b50228e176b1 |
| 14579 | .xword 0x0d0101a6fbdc8be0 |
| 14580 | .xword 0x4a0d0822ab310d97 |
| 14581 | .xword 0xde05fae4b1d4a2a2 |
| 14582 | .xword 0x633b29b354ed8b26 |
| 14583 | .xword 0x5a66e17827a987c6 |
| 14584 | .xword 0xc38fd9c7bc13aa8c |
| 14585 | .xword 0x4981c6838c6c2d0f |
| 14586 | .xword 0xf8aca712ae668f58 |
| 14587 | .xword 0x9f6fc46144939364 |
| 14588 | .xword 0xa195cf68ea8ddbf6 |
| 14589 | .xword 0x86ca0dd7cdceea04 |
| 14590 | .xword 0x0ba83bfe0ca46be1 |
| 14591 | .xword 0x0ae91d9a9e8d700b |
| 14592 | .xword 0x561196db5c534e7b |
| 14593 | .xword 0x775a9b0a8eceab7c |
| 14594 | .xword 0x9075f9b94b495798 |
| 14595 | .xword 0x5f80705df26f3de2 |
| 14596 | .xword 0x471fdfaf889ee875 |
| 14597 | .xword 0xa450ad3044db5fb1 |
| 14598 | .xword 0x45ac4676dd4da732 |
| 14599 | .xword 0xfb8021a8d571a9fb |
| 14600 | .xword 0x990c402ce49e2856 |
| 14601 | .xword 0x2437fd7339ba92db |
| 14602 | .xword 0x7f3c823fed3540ce |
| 14603 | .xword 0x2fd7002178b9fc93 |
| 14604 | .xword 0x1e9d4cdb1b5149e8 |
| 14605 | .xword 0x35e92ebe3d49bf4b |
| 14606 | .xword 0x851022cf28a253d3 |
| 14607 | .xword 0x117ae3d44359d2fd |
| 14608 | .xword 0xe87fb5bcb3223af5 |
| 14609 | |
| 14610 | |
| 14611 | |
| 14612 | SECTION .MyDATA_2 TEXT_VA = 0x00000000e0540000, DATA_VA = 0x0000000060540000 |
| 14613 | attr_data { |
| 14614 | Name = .MyDATA_2, |
| 14615 | RA = 0x0000000170500000, |
| 14616 | PA = ra2pa(0x0000000170500000,0), |
| 14617 | part_0_ctx_zero_tsb_config_0, |
| 14618 | part_0_ctx_nonzero_tsb_config_0, |
| 14619 | TTE_G = 1, |
| 14620 | TTE_Context = PCONTEXT, |
| 14621 | TTE_V = 1, |
| 14622 | TTE_Size = 0, |
| 14623 | TTE_NFO = 1, |
| 14624 | TTE_IE = 0, |
| 14625 | TTE_Soft2 = 0, |
| 14626 | TTE_Diag = 0, |
| 14627 | TTE_Soft = 0, |
| 14628 | TTE_L = 0, |
| 14629 | TTE_CP = 1, |
| 14630 | TTE_CV = 1, |
| 14631 | TTE_E = 1, |
| 14632 | TTE_P = 0, |
| 14633 | TTE_W = 0 |
| 14634 | } |
| 14635 | |
| 14636 | |
| 14637 | attr_data { |
| 14638 | Name = .MyDATA_2, |
| 14639 | RA = 0x0000000170500000, |
| 14640 | PA = ra2pa(0x0000000170500000,0), |
| 14641 | part_0_ctx_zero_tsb_config_1, |
| 14642 | part_0_ctx_nonzero_tsb_config_1, |
| 14643 | TTE_G = 1, |
| 14644 | TTE_Context = SCONTEXT, |
| 14645 | TTE_V = 1, |
| 14646 | TTE_Size = 3, |
| 14647 | TTE_NFO = 0, |
| 14648 | TTE_IE = 1, |
| 14649 | TTE_Soft2 = 0, |
| 14650 | TTE_Diag = 0, |
| 14651 | TTE_Soft = 0, |
| 14652 | TTE_L = 0, |
| 14653 | TTE_CP = 0, |
| 14654 | TTE_CV = 0, |
| 14655 | TTE_E = 1, |
| 14656 | TTE_P = 1, |
| 14657 | TTE_W = 1, |
| 14658 | tsbonly |
| 14659 | } |
| 14660 | |
| 14661 | |
| 14662 | attr_data { |
| 14663 | Name = .MyDATA_2, |
| 14664 | hypervisor |
| 14665 | } |
| 14666 | |
| 14667 | |
| 14668 | attr_text { |
| 14669 | Name = .MyDATA_2, |
| 14670 | hypervisor |
| 14671 | } |
| 14672 | |
| 14673 | .data |
| 14674 | .xword 0xaf8fbd0bc9b1fd84 |
| 14675 | .xword 0xbf145d66dcf463e4 |
| 14676 | .xword 0xaa7df9885fd95710 |
| 14677 | .xword 0xbb3ec882e1cb8bfd |
| 14678 | .xword 0x719e0a72189d3eb3 |
| 14679 | .xword 0x0f25172b906a3ef3 |
| 14680 | .xword 0x80bf0c9d896b3236 |
| 14681 | .xword 0xd6be08a7d81014d8 |
| 14682 | .xword 0xef7e507ddd8afa2f |
| 14683 | .xword 0xc210b4bed9794c60 |
| 14684 | .xword 0xdd89c7c32246f49c |
| 14685 | .xword 0xa37bb24c4e87d1cb |
| 14686 | .xword 0xc7380ed189bcf6f8 |
| 14687 | .xword 0x20c0326471811d33 |
| 14688 | .xword 0x39d25b4ab2dc6b06 |
| 14689 | .xword 0xaee2166058264e41 |
| 14690 | .xword 0x2df1b411333c29aa |
| 14691 | .xword 0xddbd0384d159385a |
| 14692 | .xword 0xbe89c0ec4741c1cf |
| 14693 | .xword 0xce6d72c045785f32 |
| 14694 | .xword 0x9d53e611ec24ea6f |
| 14695 | .xword 0x5d0976c090c101b7 |
| 14696 | .xword 0xda094414992d7991 |
| 14697 | .xword 0xebce2607533512bb |
| 14698 | .xword 0xcac8efdd328cce21 |
| 14699 | .xword 0xc93863b8448e238c |
| 14700 | .xword 0x9d868affd76d7c70 |
| 14701 | .xword 0xaa89341f9677847d |
| 14702 | .xword 0x6829ce00d59e2120 |
| 14703 | .xword 0xd92961e2dd29e58a |
| 14704 | .xword 0x96b8c33d029ab3e7 |
| 14705 | .xword 0xdec77343df1e5bf4 |
| 14706 | |
| 14707 | |
| 14708 | |
| 14709 | SECTION .MyDATA_3 TEXT_VA = 0x00000000e0740000, DATA_VA = 0x0000000060740000 |
| 14710 | attr_data { |
| 14711 | Name = .MyDATA_3, |
| 14712 | RA = 0x0000000170700000, |
| 14713 | PA = ra2pa(0x0000000170700000,0), |
| 14714 | part_0_ctx_zero_tsb_config_0, |
| 14715 | part_0_ctx_nonzero_tsb_config_0, |
| 14716 | TTE_G = 1, |
| 14717 | TTE_Context = PCONTEXT, |
| 14718 | TTE_V = 1, |
| 14719 | TTE_Size = 3, |
| 14720 | TTE_NFO = 1, |
| 14721 | TTE_IE = 0, |
| 14722 | TTE_Soft2 = 0, |
| 14723 | TTE_Diag = 0, |
| 14724 | TTE_Soft = 0, |
| 14725 | TTE_L = 0, |
| 14726 | TTE_CP = 1, |
| 14727 | TTE_CV = 1, |
| 14728 | TTE_E = 1, |
| 14729 | TTE_P = 0, |
| 14730 | TTE_W = 0 |
| 14731 | } |
| 14732 | |
| 14733 | |
| 14734 | attr_data { |
| 14735 | Name = .MyDATA_3, |
| 14736 | RA = 0x0000000170700000, |
| 14737 | PA = ra2pa(0x0000000170700000,0), |
| 14738 | part_0_ctx_zero_tsb_config_1, |
| 14739 | part_0_ctx_nonzero_tsb_config_1, |
| 14740 | TTE_G = 1, |
| 14741 | TTE_Context = SCONTEXT, |
| 14742 | TTE_V = 1, |
| 14743 | TTE_Size = 3, |
| 14744 | TTE_NFO = 1, |
| 14745 | TTE_IE = 1, |
| 14746 | TTE_Soft2 = 0, |
| 14747 | TTE_Diag = 0, |
| 14748 | TTE_Soft = 0, |
| 14749 | TTE_L = 0, |
| 14750 | TTE_CP = 1, |
| 14751 | TTE_CV = 1, |
| 14752 | TTE_E = 1, |
| 14753 | TTE_P = 0, |
| 14754 | TTE_W = 0, |
| 14755 | tsbonly |
| 14756 | } |
| 14757 | |
| 14758 | |
| 14759 | attr_data { |
| 14760 | Name = .MyDATA_3, |
| 14761 | hypervisor |
| 14762 | } |
| 14763 | |
| 14764 | |
| 14765 | attr_text { |
| 14766 | Name = .MyDATA_3, |
| 14767 | hypervisor |
| 14768 | } |
| 14769 | |
| 14770 | .data |
| 14771 | .xword 0x819f79378ce0d5ab |
| 14772 | .xword 0x6d4052498cf634b8 |
| 14773 | .xword 0x4b6244c53e7c4a5d |
| 14774 | .xword 0x0e4c8087e38f2f2e |
| 14775 | .xword 0x9bce351a6f478b52 |
| 14776 | .xword 0x04c53c6e269f33d8 |
| 14777 | .xword 0x8e64b560f80744bd |
| 14778 | .xword 0x8782c3853f24ac50 |
| 14779 | .xword 0xde99283f9a2d680e |
| 14780 | .xword 0x4369d9e9ee9ac013 |
| 14781 | .xword 0xcd55be343dbf3af4 |
| 14782 | .xword 0xe448670a9bf17784 |
| 14783 | .xword 0x68d7903bf7170ba8 |
| 14784 | .xword 0x503dbd6d8115e9ed |
| 14785 | .xword 0x8c56e34f05fbb79f |
| 14786 | .xword 0x9d29638e122c00b3 |
| 14787 | .xword 0xa6cdc4662f64157d |
| 14788 | .xword 0xaba735264a1d0a32 |
| 14789 | .xword 0x53542d305f69473e |
| 14790 | .xword 0x2300ae2bbf4b8e45 |
| 14791 | .xword 0x5cf373ab307b3342 |
| 14792 | .xword 0x3245e9dfefcd6903 |
| 14793 | .xword 0xf764f78580f25707 |
| 14794 | .xword 0x1b845510e722eee0 |
| 14795 | .xword 0xc5f3ac1b3590da9a |
| 14796 | .xword 0xc79a6fd48fc758f4 |
| 14797 | .xword 0x6a542f62ddf59241 |
| 14798 | .xword 0x0f9164a93b668a99 |
| 14799 | .xword 0x2c618ce787b3842d |
| 14800 | .xword 0x45787f16cd2785ea |
| 14801 | .xword 0xc0f467abb8962462 |
| 14802 | .xword 0x963ec4781ca1b30d |
| 14803 | |
| 14804 | |
| 14805 | |
| 14806 | |
| 14807 | |
| 14808 | SECTION .MyTEXT_0 TEXT_VA = 0x00000000e0200000 |
| 14809 | attr_text { |
| 14810 | Name = .MyTEXT_0, |
| 14811 | RA = 0x00000000e0200000, |
| 14812 | PA = ra2pa(0x00000000e0200000,0), |
| 14813 | part_0_ctx_zero_tsb_config_1, |
| 14814 | part_0_ctx_nonzero_tsb_config_1, |
| 14815 | TTE_G = 1, |
| 14816 | TTE_Context = PCONTEXT, |
| 14817 | TTE_V = 1, |
| 14818 | TTE_Size = 0, |
| 14819 | TTE_NFO = 0, |
| 14820 | TTE_IE = 1, |
| 14821 | TTE_Soft2 = 0, |
| 14822 | TTE_Diag = 0, |
| 14823 | TTE_Soft = 0, |
| 14824 | TTE_L = 0, |
| 14825 | TTE_CP = 0, |
| 14826 | TTE_CV = 1, |
| 14827 | TTE_E = 1, |
| 14828 | TTE_P = 0, |
| 14829 | TTE_W = 1 |
| 14830 | } |
| 14831 | |
| 14832 | .text |
| 14833 | nuff_said_0: |
| 14834 | fdivd %f0, %f4, %f8 |
| 14835 | jmpl %r27+8, %r0 |
| 14836 | fdivs %f0, %f4, %f4 |
| 14837 | |
| 14838 | |
| 14839 | |
| 14840 | SECTION .MyTEXT_1 TEXT_VA = 0x00000000e0a00000 |
| 14841 | attr_text { |
| 14842 | Name = .MyTEXT_1, |
| 14843 | RA = 0x00000000e0a00000, |
| 14844 | PA = ra2pa(0x00000000e0a00000,0), |
| 14845 | part_0_ctx_zero_tsb_config_1, |
| 14846 | part_0_ctx_nonzero_tsb_config_1, |
| 14847 | TTE_G = 1, |
| 14848 | TTE_Context = PCONTEXT, |
| 14849 | TTE_V = 1, |
| 14850 | TTE_Size = 1, |
| 14851 | TTE_NFO = 0, |
| 14852 | TTE_IE = 0, |
| 14853 | TTE_Soft2 = 0, |
| 14854 | TTE_Diag = 0, |
| 14855 | TTE_Soft = 0, |
| 14856 | TTE_L = 0, |
| 14857 | TTE_CP = 1, |
| 14858 | TTE_CV = 1, |
| 14859 | TTE_E = 1, |
| 14860 | TTE_P = 0, |
| 14861 | TTE_W = 0 |
| 14862 | } |
| 14863 | |
| 14864 | .text |
| 14865 | nuff_said_1: |
| 14866 | fdivs %f0, %f4, %f6 |
| 14867 | jmpl %r27+8, %r0 |
| 14868 | fdivd %f0, %f4, %f6 |
| 14869 | |
| 14870 | |
| 14871 | |
| 14872 | SECTION .MyTEXT_2 TEXT_VA = 0x00000000e1200000 |
| 14873 | attr_text { |
| 14874 | Name = .MyTEXT_2, |
| 14875 | RA = 0x00000000e1200000, |
| 14876 | PA = ra2pa(0x00000000e1200000,0), |
| 14877 | part_0_ctx_zero_tsb_config_1, |
| 14878 | part_0_ctx_nonzero_tsb_config_1, |
| 14879 | TTE_G = 1, |
| 14880 | TTE_Context = PCONTEXT, |
| 14881 | TTE_V = 1, |
| 14882 | TTE_Size = 3, |
| 14883 | TTE_NFO = 0, |
| 14884 | TTE_IE = 0, |
| 14885 | TTE_Soft2 = 0, |
| 14886 | TTE_Diag = 0, |
| 14887 | TTE_Soft = 0, |
| 14888 | TTE_L = 0, |
| 14889 | TTE_CP = 1, |
| 14890 | TTE_CV = 1, |
| 14891 | TTE_E = 0, |
| 14892 | TTE_P = 0, |
| 14893 | TTE_W = 1 |
| 14894 | } |
| 14895 | |
| 14896 | .text |
| 14897 | nuff_said_2: |
| 14898 | fdivd %f0, %f4, %f6 |
| 14899 | jmpl %r27+8, %r0 |
| 14900 | fdivs %f0, %f4, %f4 |
| 14901 | |
| 14902 | |
| 14903 | |
| 14904 | SECTION .MyTEXT_3 TEXT_VA = 0x00000000e1a00000 |
| 14905 | attr_text { |
| 14906 | Name = .MyTEXT_3, |
| 14907 | RA = 0x00000000e1a00000, |
| 14908 | PA = ra2pa(0x00000000e1a00000,0), |
| 14909 | part_0_ctx_zero_tsb_config_1, |
| 14910 | part_0_ctx_nonzero_tsb_config_1, |
| 14911 | TTE_G = 1, |
| 14912 | TTE_Context = PCONTEXT, |
| 14913 | TTE_V = 1, |
| 14914 | TTE_Size = 0, |
| 14915 | TTE_NFO = 0, |
| 14916 | TTE_IE = 1, |
| 14917 | TTE_Soft2 = 0, |
| 14918 | TTE_Diag = 0, |
| 14919 | TTE_Soft = 0, |
| 14920 | TTE_L = 0, |
| 14921 | TTE_CP = 1, |
| 14922 | TTE_CV = 0, |
| 14923 | TTE_E = 1, |
| 14924 | TTE_P = 1, |
| 14925 | TTE_W = 0 |
| 14926 | } |
| 14927 | |
| 14928 | .text |
| 14929 | nuff_said_3: |
| 14930 | fdivs %f0, %f4, %f4 |
| 14931 | jmpl %r27+8, %r0 |
| 14932 | fdivd %f0, %f4, %f8 |
| 14933 | |
| 14934 | |
| 14935 | |
| 14936 | |
| 14937 | |
| 14938 | SECTION .VaHOLE_0 TEXT_VA = 0x00007fffffffe000 |
| 14939 | attr_text { |
| 14940 | Name = .VaHOLE_0, |
| 14941 | RA = 0x00000000ffffe000, |
| 14942 | PA = ra2pa(0x00000000ffffe000,0), |
| 14943 | part_0_ctx_zero_tsb_config_1, |
| 14944 | part_0_ctx_nonzero_tsb_config_1, |
| 14945 | TTE_G = 1, |
| 14946 | TTE_Context = PCONTEXT, |
| 14947 | TTE_V = 1, |
| 14948 | TTE_Size = 5, |
| 14949 | TTE_NFO = 0, |
| 14950 | TTE_IE = 1, |
| 14951 | TTE_Soft2 = 0, |
| 14952 | TTE_Diag = 0, |
| 14953 | TTE_Soft = 0, |
| 14954 | TTE_L = 0, |
| 14955 | TTE_CP = 1, |
| 14956 | TTE_CV = 1, |
| 14957 | TTE_E = 0, |
| 14958 | TTE_P = 0, |
| 14959 | TTE_W = 0, |
| 14960 | TTE_X = 1 |
| 14961 | } |
| 14962 | |
| 14963 | .text |
| 14964 | .global vahole_target0 |
| 14965 | .text |
| 14966 | .global vahole_target1 |
| 14967 | .text |
| 14968 | .global vahole_target2 |
| 14969 | .text |
| 14970 | .global vahole_target3 |
| 14971 | nop |
| 14972 | .align 4096 |
| 14973 | nop |
| 14974 | .align 2048 |
| 14975 | nop |
| 14976 | .align 1024 |
| 14977 | nop |
| 14978 | .align 512 |
| 14979 | nop |
| 14980 | .align 256 |
| 14981 | nop |
| 14982 | .align 128 |
| 14983 | nop |
| 14984 | .align 64 |
| 14985 | nop |
| 14986 | nop |
| 14987 | .align 16 |
| 14988 | nop;nop;nop |
| 14989 | vahole_target0: nop;nop |
| 14990 | vahole_target1: nop |
| 14991 | vahole_target2: nop;nop;nop |
| 14992 | vahole_target3: nop;nop;nop |
| 14993 | |
| 14994 | |
| 14995 | |
| 14996 | |
| 14997 | |
| 14998 | SECTION .VaHOLEL_0 TEXT_VA = 0x00000000ffffe000 |
| 14999 | attr_text { |
| 15000 | Name = .VaHOLEL_0, |
| 15001 | RA = 0x00000000ffffe000, |
| 15002 | PA = ra2pa(0x00000000ffffe000,0), |
| 15003 | part_0_ctx_zero_tsb_config_0, |
| 15004 | part_0_ctx_nonzero_tsb_config_0, |
| 15005 | TTE_G = 1, |
| 15006 | TTE_Context = PCONTEXT, |
| 15007 | TTE_V = 1, |
| 15008 | TTE_Size = 5, |
| 15009 | TTE_NFO = 0, |
| 15010 | TTE_IE = 1, |
| 15011 | TTE_Soft2 = 0, |
| 15012 | TTE_Diag = 0, |
| 15013 | TTE_Soft = 0, |
| 15014 | TTE_L = 0, |
| 15015 | TTE_CP = 1, |
| 15016 | TTE_CV = 1, |
| 15017 | TTE_E = 0, |
| 15018 | TTE_P = 0, |
| 15019 | TTE_W = 1, |
| 15020 | TTE_X = 1, |
| 15021 | tsbonly |
| 15022 | } |
| 15023 | |
| 15024 | .text |
| 15025 | nop |
| 15026 | |
| 15027 | |
| 15028 | |
| 15029 | |
| 15030 | |
| 15031 | SECTION .ZERO_0 TEXT_VA = 0x0000000000000000 |
| 15032 | attr_text { |
| 15033 | Name = .ZERO_0, |
| 15034 | RA = 0x0000000000000000, |
| 15035 | PA = ra2pa(0x0000000000000000,0), |
| 15036 | part_0_ctx_zero_tsb_config_1, |
| 15037 | part_0_ctx_nonzero_tsb_config_1, |
| 15038 | TTE_G = 1, |
| 15039 | TTE_Context = 0x44, |
| 15040 | TTE_V = 1, |
| 15041 | TTE_Size = 3, |
| 15042 | TTE_NFO = 0, |
| 15043 | TTE_IE = 1, |
| 15044 | TTE_Soft2 = 0, |
| 15045 | TTE_Diag = 0, |
| 15046 | TTE_Soft = 0, |
| 15047 | TTE_L = 0, |
| 15048 | TTE_CP = 0, |
| 15049 | TTE_CV = 0, |
| 15050 | TTE_E = 0, |
| 15051 | TTE_P = 0, |
| 15052 | TTE_W = 1, |
| 15053 | TTE_X = 1 |
| 15054 | } |
| 15055 | |
| 15056 | |
| 15057 | .text |
| 15058 | nop |
| 15059 | nop |
| 15060 | jmpl %r27+8, %r0 |
| 15061 | nop |
| 15062 | nop |
| 15063 | nop |
| 15064 | nop |
| 15065 | nop |
| 15066 | |
| 15067 | Power_On_Reset: |
| 15068 | setx HRedmode_Reset_Handler, %g1, %g2 |
| 15069 | jmp %g2 |
| 15070 | nop |
| 15071 | .align 32 |
| 15072 | |
| 15073 | Watchdog_Reset: |
| 15074 | setx wdog_red_ext, %g1, %g2 |
| 15075 | jmp %g2 |
| 15076 | nop |
| 15077 | .align 32 |
| 15078 | |
| 15079 | External_Reset: |
| 15080 | My_External_Reset |
| 15081 | |
| 15082 | .align 32 |
| 15083 | |
| 15084 | Software_Initiated_Reset: |
| 15085 | setx Software_Reset_Handler, %g1, %g2 |
| 15086 | jmp %g2 |
| 15087 | nop |
| 15088 | |
| 15089 | .align 32 |
| 15090 | |
| 15091 | |
| 15092 | RED_Mode_Other_Reset: |
| 15093 | ! IF TL=6, shift stack by one .. |
| 15094 | rdpr %tl, %l1 |
| 15095 | cmp %l1, 6 |
| 15096 | be start_tsa_shift |
| 15097 | nop |
| 15098 | |
| 15099 | continue_red_other: |
| 15100 | mov 0x1f, %l1 |
| 15101 | stxa %l1, [%g0] ASI_LSU_CTL_REG |
| 15102 | |
| 15103 | rdpr %tt, %l1 |
| 15104 | |
| 15105 | rdhpr %htstate, %l2 |
| 15106 | and %l2, 0x4, %l2 ! If previously in hpriv mode, go to hpriv |
| 15107 | brnz,a %l2, red_goto_handler |
| 15108 | rdhpr %htba, %l2 |
| 15109 | srlx %l1, 7, %l2 ! Send priv sw traps to priv mode .. |
| 15110 | cmp %l2, 0x2 ! 0x2 = priv sw trap, 0x3=hpriv sw trap .. |
| 15111 | be,a red_goto_handler |
| 15112 | rdpr %tba, %l2 |
| 15113 | rdhpr %htba, %l2 |
| 15114 | red_goto_handler: |
| 15115 | |
| 15116 | sllx %l1, 5, %l1 |
| 15117 | add %l1, %l2, %l2 |
| 15118 | rdhpr %hpstate, %l1 |
| 15119 | jmp %l2 |
| 15120 | wrhpr %l1, 0x20, %hpstate |
| 15121 | nop |
| 15122 | |
| 15123 | wdog_red_ext: |
| 15124 | ! Shift stack down by 1 ... |
| 15125 | rdpr %tl, %l1 |
| 15126 | cmp %l1, 6 |
| 15127 | bl wdog_end |
| 15128 | start_tsa_shift: |
| 15129 | mov 0x2, %l2 |
| 15130 | |
| 15131 | tsa_shift: |
| 15132 | wrpr %l2, %tl |
| 15133 | rdpr %tt, %l3 |
| 15134 | rdpr %tpc, %l4 |
| 15135 | rdpr %tnpc, %l5 |
| 15136 | rdpr %tstate, %l6 |
| 15137 | rdhpr %htstate, %l7 |
| 15138 | dec %l2 |
| 15139 | wrpr %l2, %tl |
| 15140 | wrpr %l3, %tt |
| 15141 | wrpr %l4, %tpc |
| 15142 | wrpr %l5, %tnpc |
| 15143 | wrpr %l6, %tstate |
| 15144 | wrhpr %l7, %htstate |
| 15145 | add %l2, 2, %l2 |
| 15146 | cmp %l2, %l1 |
| 15147 | ble tsa_shift |
| 15148 | nop |
| 15149 | tsa_shift_done: |
| 15150 | dec %l1 |
| 15151 | wrpr %l1, %tl |
| 15152 | |
| 15153 | wdog_end: |
| 15154 | ! If TT != 2, then goto trap handler |
| 15155 | rdpr %tt, %l1 |
| 15156 | |
| 15157 | cmp %l1, 0x2 |
| 15158 | bne continue_red_other |
| 15159 | nop |
| 15160 | ! else done |
| 15161 | mov 0x1f, %l1 |
| 15162 | stxa %l1, [%g0] ASI_LSU_CTL_REG |
| 15163 | done |
| 15164 | |
| 15165 | |
| 15166 | |
| 15167 | |
| 15168 | |
| 15169 | |
| 15170 | SECTION .VaHOLE_PA_0 TEXT_VA = 0x000000ffffffe000 |
| 15171 | attr_text { |
| 15172 | Name = .VAHOLE_PA_0, |
| 15173 | hypervisor |
| 15174 | } |
| 15175 | |
| 15176 | nop |
| 15177 | .align 4096 |
| 15178 | nop |
| 15179 | .align 2048 |
| 15180 | nop |
| 15181 | .align 1024 |
| 15182 | nop |
| 15183 | .align 512 |
| 15184 | nop |
| 15185 | .align 256 |
| 15186 | nop |
| 15187 | .align 128 |
| 15188 | nop |
| 15189 | .align 64 |
| 15190 | nop |
| 15191 | nop |
| 15192 | .align 16 |
| 15193 | nop;nop;nop |
| 15194 | nop |
| 15195 | nop |
| 15196 | jmpl %r27+8, %r0 |
| 15197 | nop |
| 15198 | nop |
| 15199 | nop |
| 15200 | jmpl %r27+8, %r0 |
| 15201 | nop |
| 15202 | |
| 15203 | |
| 15204 | |
| 15205 | #if 0 |
| 15206 | #endif |