| 1 | /* |
| 2 | * ========== Copyright Header Begin ========================================== |
| 3 | * |
| 4 | * OpenSPARC T2 Processor File: tlu_fcrand05_ind_16.s |
| 5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved |
| 6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. |
| 7 | * |
| 8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License as published by |
| 12 | * the Free Software Foundation; version 2 of the License. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 22 | * |
| 23 | * For the avoidance of doubt, and except that if any non-GPL license |
| 24 | * choice is available it will apply instead, Sun elects to use only |
| 25 | * the General Public License version 2 (GPLv2) at this time for any |
| 26 | * software where a choice of GPL license versions is made |
| 27 | * available with the language indicating that GPLv2 or any later version |
| 28 | * may be used, or where a choice of which version of the GPL is applied is |
| 29 | * otherwise unspecified. |
| 30 | * |
| 31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
| 32 | * CA 95054 USA or visit www.sun.com if you need additional information or |
| 33 | * have any questions. |
| 34 | * |
| 35 | * |
| 36 | * ========== Copyright Header End ============================================ |
| 37 | */ |
| 38 | #define IMMU_SKIP_IF_NO_TTE |
| 39 | #define DMMU_SKIP_IF_NO_TTE |
| 40 | #define MAIN_PAGE_NUCLEUS_ALSO |
| 41 | #define MAIN_PAGE_HV_ALSO |
| 42 | #define MAIN_PAGE_VA_IS_RA_ALSO |
| 43 | #define DISABLE_PART_LIMIT_CHECK |
| 44 | #define MAIN_PAGE_USE_CONFIG 3 |
| 45 | #define PART0_Z_TSB_SIZE_3 10 |
| 46 | #define PART0_Z_PAGE_SIZE_3 1 |
| 47 | #define PART0_NZ_TSB_SIZE_3 10 |
| 48 | #define PART0_NZ_PAGE_SIZE_3 1 |
| 49 | #define PART0_Z_TSB_SIZE_1 3 |
| 50 | #define PART0_NZ_TSB_SIZE_1 3 |
| 51 | |
| 52 | #define PART_0_BASE 0x0 |
| 53 | #define USER_PAGE_CUSTOM_MAP |
| 54 | #define MAIN_BASE_TEXT_VA 0x333000000 |
| 55 | #define MAIN_BASE_TEXT_RA 0x033000000 |
| 56 | #define MAIN_BASE_DATA_VA 0x379400000 |
| 57 | #define MAIN_BASE_DATA_RA 0x079400000 |
| 58 | |
| 59 | #d |
| 60 | # 474 "diag.j" |
| 61 | #define H_HT0_Instruction_Access_MMU_Error_0x71 inst_access_mmu_error_handler |
| 62 | #define H_HT0_Instruction_access_error_0x0a inst_access_error_handler |
| 63 | #define H_HT0_Internal_Processor_Error_0x29 int_proc_err_handler |
| 64 | #define H_HT0_Data_Access_MMU_Error_0x72 data_access_mmu_error_handler |
| 65 | #define H_HT0_Data_access_error_0x32 data_access_error_handler |
| 66 | #define H_HT0_Hw_Corrected_Error_0x63 hw_corrected_error_handler |
| 67 | #define H_HT0_Sw_Recoverable_Error_0x40 sw_recoverable_error_handler |
| 68 | #define H_HT0_Store_Error_0x07 store_error_handler |
| 69 | |
| 70 | #define DAE_SKIP_IF_SOCU_ERROR |
| 71 | # 5 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" |
| 72 | #ifndef T_HANDLER_RAND4_1 |
| 73 | #define T_HANDLER_RAND4_1 b .+16;\ |
| 74 | sdiv %r1, %r0, %l4;nop;nop |
| 75 | #endif |
| 76 | #ifndef T_HANDLER_RAND7_1 |
| 77 | #define T_HANDLER_RAND7_1 b .+28;\ |
| 78 | pdist %f4, %f6, %f20; \ |
| 79 | nop; nop ; nop; nop; illtrap |
| 80 | #endif |
| 81 | #ifndef T_HANDLER_RAND4_2 |
| 82 | #define T_HANDLER_RAND4_2 save %i7, %g0, %i7; \ |
| 83 | save %i7, %g0, %i7; \ |
| 84 | restore %i7, %g0, %i7;\ |
| 85 | restore %i7, %g0, %i7; |
| 86 | #endif |
| 87 | #ifndef T_HANDLER_RAND7_2 |
| 88 | #define T_HANDLER_RAND7_2 b .+8 ;\ |
| 89 | rdpr %pstate, %l2;\ |
| 90 | b .+8 ;\ |
| 91 | rdpr %tstate, %l3;\ |
| 92 | b .+12 ;\ |
| 93 | wrpr %l3, %r0, %tstate; nop |
| 94 | #endif |
| 95 | #ifndef T_HANDLER_RAND4_3 |
| 96 | #define T_HANDLER_RAND4_3 save %i7, %g0, %i7;\ |
| 97 | restore %i7, %g0, %i7;\ |
| 98 | save %i7, %g0, %i7; \ |
| 99 | restore %i7, %g0, %i7; |
| 100 | #endif |
| 101 | #ifndef T_HANDLER_RAND7_3 |
| 102 | #define T_HANDLER_RAND7_3 b .+8 ;\ |
| 103 | rdpr %tnpc, %l2;\ |
| 104 | and %l2, 0xfc0, %l2;\ |
| 105 | add %i7, %l2, %l2;\ |
| 106 | stda %f16,[%l2]ASI_BLOCK_AS_IF_USER_PRIMARY ;\ |
| 107 | b .+8 ;\ |
| 108 | stda %f0,[%l2]ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE ; |
| 109 | #endif |
| 110 | #ifndef T_HANDLER_RAND4_4 |
| 111 | #define T_HANDLER_RAND4_4 b .+4 ; b .+4; b .+4; b .+4 |
| 112 | #endif |
| 113 | #ifndef T_HANDLER_RAND7_4 |
| 114 | #define T_HANDLER_RAND7_4 b .+8;\ |
| 115 | save %i7, %g0, %i7; \ |
| 116 | b,a .+8;\ |
| 117 | b .+12;\ |
| 118 | stw %i7, [%i7];\ |
| 119 | b .-8;;\ |
| 120 | restore %i7, %g0, %i7; |
| 121 | |
| 122 | #endif |
| 123 | #ifndef T_HANDLER_RAND4_5 |
| 124 | #define T_HANDLER_RAND4_5 ldda [%r31]ASI_NUCLEUS_QUAD_LDD, %l4;\ |
| 125 | sdiv %l4, %l5, %l7;\ |
| 126 | add %r31, 128, %l5;\ |
| 127 | stda %l4, [%l5]ASI_BLOCK_PRIMARY_LITTLE; |
| 128 | #endif |
| 129 | #ifndef T_HANDLER_RAND7_5 |
| 130 | #define T_HANDLER_RAND7_5 save %i7, %g0, %i7;\ |
| 131 | rdpr %tnpc, %l2;\ |
| 132 | wrpr %l2, %tpc;\ |
| 133 | add %l2, 4, %l2;\ |
| 134 | wrpr %l2, %tnpc;\ |
| 135 | restore %i7, %g0, %i7;\ |
| 136 | retry; |
| 137 | #endif |
| 138 | #ifndef T_HANDLER_RAND4_6 |
| 139 | #define T_HANDLER_RAND4_6 ldda [%r31]ASI_BLOCK_AS_IF_USER_PRIMARY, %l2;\ |
| 140 | rd %fprs, %l2; \ |
| 141 | wr %l2, 0x4, %fprs ;\ |
| 142 | stda %f0,[%l2]ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE; |
| 143 | #endif |
| 144 | #ifndef T_HANDLER_RAND7_6 |
| 145 | #define T_HANDLER_RAND7_6 umul %o4, 2, %o5;\ |
| 146 | rdpr %tnpc, %l2;\ |
| 147 | wrpr %l2, %tpc;\ |
| 148 | add %l2, 4, %l2;\ |
| 149 | wrpr %l2, %tnpc;\ |
| 150 | stw %l2, [%i7];\ |
| 151 | retry; |
| 152 | #endif |
| 153 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! |
| 154 | #ifndef HT_HANDLER_RAND4_1 |
| 155 | #define HT_HANDLER_RAND4_1 mov 0x80, %l3;\ |
| 156 | b .+12;\ |
| 157 | stxa %l3, [%l3]0x57 ;\ |
| 158 | nop |
| 159 | #endif |
| 160 | #ifndef HT_HANDLER_RAND7_1 |
| 161 | #define HT_HANDLER_RAND7_1 b .+28;\ |
| 162 | pdist %f4, %f4, %f20;\ |
| 163 | nop; nop ; nop; nop; illtrap |
| 164 | #endif |
| 165 | #ifndef HT_HANDLER_RAND4_2 |
| 166 | #define HT_HANDLER_RAND4_2 save %i7, %g0, %i7; \ |
| 167 | save %i7, %g0, %i7; \ |
| 168 | restore %i7, %g0, %i7;\ |
| 169 | restore %i7, %g0, %i7; |
| 170 | #endif |
| 171 | #ifndef HT_HANDLER_RAND7_2 |
| 172 | #define HT_HANDLER_RAND7_2 b .+8 ;\ |
| 173 | rdhpr %hpstate, %l2;\ |
| 174 | b .+8 ;\ |
| 175 | rdhpr %htstate, %l3;\ |
| 176 | b .+12 ;\ |
| 177 | wrhpr %l3, %r0, %htstate; nop |
| 178 | #endif |
| 179 | #ifndef HT_HANDLER_RAND4_3 |
| 180 | #define HT_HANDLER_RAND4_3 stxa %l4, [%r31]ASI_AS_IF_USER_PRIMARY;\ |
| 181 | mov 0x80, %l3;\ |
| 182 | stxa %l3, [%l3]0x5f ;\ |
| 183 | b .+8 ;\ |
| 184 | ldxa [%r31]ASI_AS_IF_USER_PRIMARY, %l4; |
| 185 | #endif |
| 186 | #ifndef HT_HANDLER_RAND7_3 |
| 187 | #define HT_HANDLER_RAND7_3 b .+8 ;\ |
| 188 | rdpr %tnpc, %l2;\ |
| 189 | and %l2, 0xfc0, %l2;\ |
| 190 | add %i7, %l2, %l2;\ |
| 191 | stda %f16,[%l2]ASI_BLOCK_AS_IF_USER_PRIMARY ;\ |
| 192 | b .+8 ;\ |
| 193 | stda %f0,[%l2]ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE ; |
| 194 | #endif |
| 195 | #ifndef HT_HANDLER_RAND4_4 |
| 196 | #define HT_HANDLER_RAND4_4 ldda [%i7]ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE, %l3;\ |
| 197 | b .+12 ;\ |
| 198 | stxa %l3, [%g0]ASI_LSU_CONTROL; nop |
| 199 | #endif |
| 200 | #ifndef HT_HANDLER_RAND7_4 |
| 201 | #define HT_HANDLER_RAND7_4 rdpr %tnpc, %l3;\ |
| 202 | mov ASI_DMMU_VA_WATCHPOINT_VAL, %l4 ;\ |
| 203 | stxa %l3, [%l4]ASI_DMMU_VA_WATCHPOINT ;\ |
| 204 | mov 1, %l4;\ |
| 205 | sllx %l4, 33, %l4 ;\ |
| 206 | not %l4, %l3 ;\ |
| 207 | stxa %l3, [%g0]ASI_LSU_CONTROL; |
| 208 | #endif |
| 209 | #ifndef HT_HANDLER_RAND4_5 |
| 210 | #define HT_HANDLER_RAND4_5 ldda [%r31]ASI_NUCLEUS_QUAD_LDD, %l4;\ |
| 211 | sdiv %l4, %l5, %l6;\ |
| 212 | sdiv %l3, %l6, %l7;\ |
| 213 | stda %f32, [%r31]ASI_BLOCK_PRIMARY_LITTLE; |
| 214 | #endif |
| 215 | #ifndef HT_HANDLER_RAND7_5 |
| 216 | #define HT_HANDLER_RAND7_5 save %i7, %g0, %i7;\ |
| 217 | rdpr %tnpc, %l2;\ |
| 218 | wrpr %l2, %tpc;\ |
| 219 | add %l2, 4, %l2;\ |
| 220 | wrpr %l2, %tnpc;\ |
| 221 | restore %i7, %g0, %i7;\ |
| 222 | retry; |
| 223 | #endif |
| 224 | #ifndef HT_HANDLER_RAND4_6 |
| 225 | #define HT_HANDLER_RAND4_6 ld [%r31], %l2;\ |
| 226 | rd %fprs, %l2; \ |
| 227 | wr %l2, 0x4, %fprs ;\ |
| 228 | stda %f0,[%l2]ASI_BLOCK_AS_IF_USER_PRIMARY_LITTLE; |
| 229 | #endif |
| 230 | #ifndef HT_HANDLER_RAND7_6 |
| 231 | #define HT_HANDLER_RAND7_6 rdhpr %htstate, %o4;\ |
| 232 | rdpr %tnpc, %l2;\ |
| 233 | wrpr %l2, %tpc;\ |
| 234 | add %l2, 4, %l2;\ |
| 235 | wrpr %l2, %tnpc;\ |
| 236 | wrhpr %o4, %r0, %htstate;\ |
| 237 | retry; |
| 238 | #endif |
| 239 | |
| 240 | !!!!!!!!!!!!!!!!!!!!!!!!! |
| 241 | !! Disable trap checking |
| 242 | #define NO_TRAPCHECK |
| 243 | |
| 244 | ! Enable Traps |
| 245 | #define ENABLE_T1_Privileged_Opcode_0x11 |
| 246 | #define ENABLE_T1_Fp_Disabled_0x20 |
| 247 | #define ENABLE_HT0_Watchdog_Reset_0x02 |
| 248 | |
| 249 | #define FILL_TRAP_RETRY |
| 250 | #define SPILL_TRAP_RETRY |
| 251 | #define CLEAN_WIN_RETRY |
| 252 | |
| 253 | #define My_RED_Mode_Other_Reset |
| 254 | #define My_RED_Mode_Other_Reset \ |
| 255 | ba red_other_ext;\ |
| 256 | nop;retry;nop;nop;nop;nop;nop |
| 257 | |
| 258 | #define H_HT0_Software_Initiated_Reset_0x04 |
| 259 | #define SUN_H_HT0_Software_Initiated_Reset_0x04 \ |
| 260 | setx Software_Reset_Handler, %g1, %g2 ;\ |
| 261 | jmp %g2 ;\ |
| 262 | nop |
| 263 | # 198 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" |
| 264 | #define H_T1_Clean_Window_0x24 |
| 265 | #define SUN_H_T1_Clean_Window_0x24 \ |
| 266 | rdpr %cleanwin, %l1;\ |
| 267 | add %l1,1,%l1;\ |
| 268 | wrpr %l1, %g0, %cleanwin;\ |
| 269 | retry; nop; nop; nop; nop |
| 270 | |
| 271 | #define H_T1_Clean_Window_0x25 |
| 272 | #define SUN_H_T1_Clean_Window_0x25 \ |
| 273 | rdpr %cleanwin, %l1;\ |
| 274 | add %l1,1,%l1;\ |
| 275 | wrpr %l1, %g0, %cleanwin;\ |
| 276 | retry; nop; nop; nop; nop |
| 277 | |
| 278 | #define H_T1_Clean_Window_0x26 |
| 279 | #define SUN_H_T1_Clean_Window_0x26 \ |
| 280 | rdpr %cleanwin, %l1;\ |
| 281 | add %l1,1,%l1;\ |
| 282 | wrpr %l1, %g0, %cleanwin;\ |
| 283 | retry; nop; nop; nop; nop |
| 284 | |
| 285 | #define H_T1_Clean_Window_0x27 |
| 286 | #define SUN_H_T1_Clean_Window_0x27 \ |
| 287 | rdpr %cleanwin, %l1;\ |
| 288 | add %l1,1,%l1;\ |
| 289 | wrpr %l1, %g0, %cleanwin;\ |
| 290 | retry; nop; nop; nop; nop |
| 291 | # 227 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" |
| 292 | #define H_HT0_Tag_Overflow |
| 293 | #define My_HT0_Tag_Overflow \ |
| 294 | HT_HANDLER_RAND7_1 ;\ |
| 295 | done |
| 296 | |
| 297 | #define H_T0_Tag_Overflow |
| 298 | #define My_T0_Tag_Overflow \ |
| 299 | T_HANDLER_RAND7_2 ;\ |
| 300 | done |
| 301 | |
| 302 | #define H_T1_Tag_Overflow_0x23 |
| 303 | #define SUN_H_T1_Tag_Overflow_0x23 \ |
| 304 | T_HANDLER_RAND7_3 ;\ |
| 305 | done |
| 306 | |
| 307 | #define H_T0_Window_Spill_0_Normal_Trap |
| 308 | #define SUN_H_T0_Window_Spill_0_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 309 | |
| 310 | #define H_T0_Window_Spill_1_Normal_Trap |
| 311 | #define SUN_H_T0_Window_Spill_1_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 312 | |
| 313 | #define H_T0_Window_Spill_2_Normal_Trap |
| 314 | #define SUN_H_T0_Window_Spill_2_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 315 | |
| 316 | #define H_T0_Window_Spill_3_Normal_Trap |
| 317 | #define SUN_H_T0_Window_Spill_3_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 318 | |
| 319 | #define H_T0_Window_Spill_4_Normal_Trap |
| 320 | #define SUN_H_T0_Window_Spill_4_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 321 | |
| 322 | #define H_T0_Window_Spill_5_Normal_Trap |
| 323 | #define SUN_H_T0_Window_Spill_5_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 324 | |
| 325 | #define H_T0_Window_Spill_6_Normal_Trap |
| 326 | #define SUN_H_T0_Window_Spill_6_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 327 | |
| 328 | #define H_T0_Window_Spill_7_Normal_Trap |
| 329 | #define SUN_H_T0_Window_Spill_7_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 330 | |
| 331 | #define H_T0_Window_Spill_0_Other_Trap |
| 332 | #define SUN_H_T0_Window_Spill_0_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 333 | |
| 334 | #define H_T0_Window_Spill_1_Other_Trap |
| 335 | #define SUN_H_T0_Window_Spill_1_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 336 | |
| 337 | #define H_T0_Window_Spill_2_Other_Trap |
| 338 | #define SUN_H_T0_Window_Spill_2_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 339 | |
| 340 | #define H_T0_Window_Spill_3_Other_Trap |
| 341 | #define SUN_H_T0_Window_Spill_3_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 342 | |
| 343 | #define H_T0_Window_Spill_4_Other_Trap |
| 344 | #define SUN_H_T0_Window_Spill_4_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 345 | |
| 346 | #define H_T0_Window_Spill_5_Other_Trap |
| 347 | #define SUN_H_T0_Window_Spill_5_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 348 | |
| 349 | #define H_T0_Window_Spill_6_Other_Trap |
| 350 | #define SUN_H_T0_Window_Spill_6_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 351 | |
| 352 | #define H_T0_Window_Spill_7_Other_Trap |
| 353 | #define SUN_H_T0_Window_Spill_7_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 354 | |
| 355 | #define H_T0_Window_Fill_0_Normal_Trap |
| 356 | #define SUN_H_T0_Window_Fill_0_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 357 | |
| 358 | #define H_T0_Window_Fill_1_Normal_Trap |
| 359 | #define SUN_H_T0_Window_Fill_1_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 360 | |
| 361 | #define H_T0_Window_Fill_2_Normal_Trap |
| 362 | #define SUN_H_T0_Window_Fill_2_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 363 | |
| 364 | #define H_T0_Window_Fill_3_Normal_Trap |
| 365 | #define SUN_H_T0_Window_Fill_3_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 366 | |
| 367 | #define H_T0_Window_Fill_4_Normal_Trap |
| 368 | #define SUN_H_T0_Window_Fill_4_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 369 | |
| 370 | #define H_T0_Window_Fill_5_Normal_Trap |
| 371 | #define SUN_H_T0_Window_Fill_5_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 372 | |
| 373 | #define H_T0_Window_Fill_6_Normal_Trap |
| 374 | #define SUN_H_T0_Window_Fill_6_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 375 | |
| 376 | #define H_T0_Window_Fill_7_Normal_Trap |
| 377 | #define SUN_H_T0_Window_Fill_7_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 378 | |
| 379 | #define H_T0_Window_Fill_0_Other_Trap |
| 380 | #define SUN_H_T0_Window_Fill_0_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 381 | |
| 382 | #define H_T0_Window_Fill_1_Other_Trap |
| 383 | #define SUN_H_T0_Window_Fill_1_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 384 | |
| 385 | #define H_T0_Window_Fill_2_Other_Trap |
| 386 | #define SUN_H_T0_Window_Fill_2_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 387 | |
| 388 | #define H_T0_Window_Fill_3_Other_Trap |
| 389 | #define SUN_H_T0_Window_Fill_3_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 390 | |
| 391 | #define H_T0_Window_Fill_4_Other_Trap |
| 392 | #define SUN_H_T0_Window_Fill_4_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 393 | |
| 394 | #define H_T0_Window_Fill_5_Other_Trap |
| 395 | #define SUN_H_T0_Window_Fill_5_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 396 | |
| 397 | #define H_T0_Window_Fill_6_Other_Trap |
| 398 | #define SUN_H_T0_Window_Fill_6_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 399 | |
| 400 | #define H_T0_Window_Fill_7_Other_Trap |
| 401 | #define SUN_H_T0_Window_Fill_7_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 402 | # 339 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" |
| 403 | #define H_T1_Window_Spill_0_Normal_Trap |
| 404 | #define SUN_H_T1_Window_Spill_0_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 405 | |
| 406 | #define H_T1_Window_Spill_1_Normal_Trap |
| 407 | #define SUN_H_T1_Window_Spill_1_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 408 | |
| 409 | #define H_T1_Window_Spill_2_Normal_Trap |
| 410 | #define SUN_H_T1_Window_Spill_2_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 411 | |
| 412 | #define H_T1_Window_Spill_3_Normal_Trap |
| 413 | #define SUN_H_T1_Window_Spill_3_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 414 | |
| 415 | #define H_T1_Window_Spill_4_Normal_Trap |
| 416 | #define SUN_H_T1_Window_Spill_4_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 417 | |
| 418 | #define H_T1_Window_Spill_5_Normal_Trap |
| 419 | #define SUN_H_T1_Window_Spill_5_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 420 | |
| 421 | #define H_T1_Window_Spill_6_Normal_Trap |
| 422 | #define SUN_H_T1_Window_Spill_6_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 423 | |
| 424 | #define H_T1_Window_Spill_7_Normal_Trap |
| 425 | #define SUN_H_T1_Window_Spill_7_Normal_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 426 | |
| 427 | #define H_T1_Window_Spill_0_Other_Trap |
| 428 | #define SUN_H_T1_Window_Spill_0_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 429 | |
| 430 | #define H_T1_Window_Spill_1_Other_Trap |
| 431 | #define SUN_H_T1_Window_Spill_1_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 432 | |
| 433 | #define H_T1_Window_Spill_2_Other_Trap |
| 434 | #define SUN_H_T1_Window_Spill_2_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 435 | |
| 436 | #define H_T1_Window_Spill_3_Other_Trap |
| 437 | #define SUN_H_T1_Window_Spill_3_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 438 | |
| 439 | #define H_T1_Window_Spill_4_Other_Trap |
| 440 | #define SUN_H_T1_Window_Spill_4_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 441 | |
| 442 | #define H_T1_Window_Spill_5_Other_Trap |
| 443 | #define SUN_H_T1_Window_Spill_5_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 444 | |
| 445 | #define H_T1_Window_Spill_6_Other_Trap |
| 446 | #define SUN_H_T1_Window_Spill_6_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 447 | |
| 448 | #define H_T1_Window_Spill_7_Other_Trap |
| 449 | #define SUN_H_T1_Window_Spill_7_Other_Trap saved; retry; nop;nop;nop;nop;nop;nop; |
| 450 | |
| 451 | #define H_T1_Window_Fill_0_Normal_Trap |
| 452 | #define SUN_H_T1_Window_Fill_0_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 453 | |
| 454 | #define H_T1_Window_Fill_1_Normal_Trap |
| 455 | #define SUN_H_T1_Window_Fill_1_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 456 | |
| 457 | #define H_T1_Window_Fill_2_Normal_Trap |
| 458 | #define SUN_H_T1_Window_Fill_2_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 459 | |
| 460 | #define H_T1_Window_Fill_3_Normal_Trap |
| 461 | #define SUN_H_T1_Window_Fill_3_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 462 | |
| 463 | #define H_T1_Window_Fill_4_Normal_Trap |
| 464 | #define SUN_H_T1_Window_Fill_4_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 465 | |
| 466 | #define H_T1_Window_Fill_5_Normal_Trap |
| 467 | #define SUN_H_T1_Window_Fill_5_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 468 | |
| 469 | #define H_T1_Window_Fill_6_Normal_Trap |
| 470 | #define SUN_H_T1_Window_Fill_6_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 471 | |
| 472 | #define H_T1_Window_Fill_7_Normal_Trap |
| 473 | #define SUN_H_T1_Window_Fill_7_Normal_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 474 | |
| 475 | #define H_T1_Window_Fill_0_Other_Trap |
| 476 | #define SUN_H_T1_Window_Fill_0_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 477 | |
| 478 | #define H_T1_Window_Fill_1_Other_Trap |
| 479 | #define SUN_H_T1_Window_Fill_1_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 480 | |
| 481 | #define H_T1_Window_Fill_2_Other_Trap |
| 482 | #define SUN_H_T1_Window_Fill_2_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 483 | |
| 484 | #define H_T1_Window_Fill_3_Other_Trap |
| 485 | #define SUN_H_T1_Window_Fill_3_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 486 | |
| 487 | #define H_T1_Window_Fill_4_Other_Trap |
| 488 | #define SUN_H_T1_Window_Fill_4_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 489 | |
| 490 | #define H_T1_Window_Fill_5_Other_Trap |
| 491 | #define SUN_H_T1_Window_Fill_5_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 492 | |
| 493 | #define H_T1_Window_Fill_6_Other_Trap |
| 494 | #define SUN_H_T1_Window_Fill_6_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 495 | |
| 496 | #define H_T1_Window_Fill_7_Other_Trap |
| 497 | #define SUN_H_T1_Window_Fill_7_Other_Trap restored; retry; nop;nop;nop;nop;nop;nop; |
| 498 | |
| 499 | #define H_T0_Trap_Instruction_0 |
| 500 | #define My_T0_Trap_Instruction_0 \ |
| 501 | T_HANDLER_RAND7_5 ;\ |
| 502 | done; |
| 503 | |
| 504 | #define H_T0_Trap_Instruction_1 |
| 505 | #define My_T0_Trap_Instruction_1 \ |
| 506 | T_HANDLER_RAND7_6 ;\ |
| 507 | done; |
| 508 | |
| 509 | #define H_T0_Trap_Instruction_2 |
| 510 | #define My_T0_Trap_Instruction_2 \ |
| 511 | inc %o3;\ |
| 512 | umul %o3, 2, %o4;\ |
| 513 | ba 1f; \ |
| 514 | save %i7, %g0, %i7; \ |
| 515 | 2: done; \ |
| 516 | nop; \ |
| 517 | 1: ba 2b; \ |
| 518 | restore %i7, %g0, %i7 |
| 519 | #define H_T0_Trap_Instruction_3 |
| 520 | #define My_T0_Trap_Instruction_3 \ |
| 521 | save %i7, %g0, %i7 ;\ |
| 522 | T_HANDLER_RAND4_5;\ |
| 523 | stw %o4, [%i7];\ |
| 524 | restore %i7, %g0, %i7 ;\ |
| 525 | done |
| 526 | #define H_T0_Trap_Instruction_4 |
| 527 | #define My_T0_Trap_Instruction_4 \ |
| 528 | T_HANDLER_RAND7_6 ;\ |
| 529 | done; |
| 530 | |
| 531 | #define H_T0_Trap_Instruction_5 |
| 532 | #define My_T0_Trap_Instruction_5 \ |
| 533 | T_HANDLER_RAND4_5;\ |
| 534 | done; |
| 535 | |
| 536 | #define H_T1_Trap_Instruction_0 |
| 537 | #define My_T1_Trap_Instruction_0 \ |
| 538 | inc %o4;\ |
| 539 | umul %o4, 2, %o5;\ |
| 540 | ba 3f; \ |
| 541 | save %i7, %g0, %i7; \ |
| 542 | 4: done; \ |
| 543 | nop; \ |
| 544 | 3: ba 4b; \ |
| 545 | restore %i7, %g0, %i7 |
| 546 | #define H_T1_Trap_Instruction_1 |
| 547 | #define My_T1_Trap_Instruction_1 \ |
| 548 | T_HANDLER_RAND7_3;\ |
| 549 | done |
| 550 | #define H_T1_Trap_Instruction_2 |
| 551 | #define My_T1_Trap_Instruction_2 \ |
| 552 | inc %o3;\ |
| 553 | umul %o3, 2, %o4;\ |
| 554 | ba 5f; \ |
| 555 | save %i7, %g0, %i7; \ |
| 556 | 6: done; \ |
| 557 | nop; \ |
| 558 | 5: ba 6b; \ |
| 559 | restore %i7, %g0, %i7 |
| 560 | #define H_T1_Trap_Instruction_3 |
| 561 | #define My_T1_Trap_Instruction_3 \ |
| 562 | T_HANDLER_RAND4_1;\ |
| 563 | done; |
| 564 | |
| 565 | #define H_T1_Trap_Instruction_4 |
| 566 | #define My_T1_Trap_Instruction_4 \ |
| 567 | T_HANDLER_RAND7_1;\ |
| 568 | done; |
| 569 | #define H_T1_Trap_Instruction_5 |
| 570 | #define My_T1_Trap_Instruction_5 \ |
| 571 | T_HANDLER_RAND7_2;\ |
| 572 | done |
| 573 | #define H_HT0_Trap_Instruction_0 |
| 574 | #define My_HT0_Trap_Instruction_0 \ |
| 575 | HT_HANDLER_RAND4_1 ;\ |
| 576 | done; |
| 577 | #define H_HT0_Trap_Instruction_1 |
| 578 | #define My_HT0_Trap_Instruction_1 \ |
| 579 | HT_HANDLER_RAND4_3 ;\ |
| 580 | done |
| 581 | #define H_HT0_Trap_Instruction_2 |
| 582 | #define My_HT0_Trap_Instruction_2 \ |
| 583 | HT_HANDLER_RAND7_5 ;\ |
| 584 | done; |
| 585 | #define H_HT0_Trap_Instruction_3 |
| 586 | #define My_HT0_Trap_Instruction_3 \ |
| 587 | HT_HANDLER_RAND4_5 ;\ |
| 588 | done |
| 589 | #define H_HT0_Trap_Instruction_4 |
| 590 | #define My_HT0_Trap_Instruction_4 \ |
| 591 | HT_HANDLER_RAND7_4 ;\ |
| 592 | done |
| 593 | #define H_HT0_Trap_Instruction_5 |
| 594 | #define My_HT0_Trap_Instruction_5 \ |
| 595 | ba htrap_5_ext;\ |
| 596 | nop; retry;\ |
| 597 | nop; nop; nop; nop; nop |
| 598 | |
| 599 | #define H_HT0_Mem_Address_Not_Aligned_0x34 |
| 600 | #define My_HT0_Mem_Address_Not_Aligned_0x34 \ |
| 601 | HT_HANDLER_RAND4_4 ;\ |
| 602 | done ; |
| 603 | #define H_HT0_Illegal_instruction_0x10 |
| 604 | #define My_HT0_Illegal_instruction_0x10 \ |
| 605 | HT_HANDLER_RAND7_6 ;\ |
| 606 | done; |
| 607 | |
| 608 | #define H_HT0_DAE_so_page_0x30 |
| 609 | #define My_HT0_DAE_so_page_0x30 \ |
| 610 | HT_HANDLER_RAND4_2;\ |
| 611 | done; |
| 612 | #define H_HT0_DAE_invalid_asi_0x14 |
| 613 | #define SUN_H_HT0_DAE_invalid_asi_0x14 \ |
| 614 | HT_HANDLER_RAND4_3 ;\ |
| 615 | done |
| 616 | #define H_HT0_DAE_privilege_violation_0x15 |
| 617 | #define SUN_H_HT0_DAE_privilege_violation_0x15 \ |
| 618 | HT_HANDLER_RAND4_4 ;\ |
| 619 | done; |
| 620 | #define H_HT0_Privileged_Action_0x37 |
| 621 | #define My_HT0_Privileged_Action_0x37 \ |
| 622 | done; \ |
| 623 | nop; nop |
| 624 | #define H_HT0_Lddf_Mem_Address_Not_Aligned_0x35 |
| 625 | #define My_HT0_Lddf_Mem_Address_Not_Aligned_0x35 \ |
| 626 | HT_HANDLER_RAND7_4 ;\ |
| 627 | done |
| 628 | #define H_HT0_Stdf_Mem_Address_Not_Aligned_0x36 |
| 629 | #define My_HT0_Stdf_Mem_Address_Not_Aligned_0x36 \ |
| 630 | HT_HANDLER_RAND7_1;\ |
| 631 | done |
| 632 | #define H_HT0_Fp_exception_ieee_754_0x21 |
| 633 | #define My_HT0_Fp_exception_ieee_754_0x21 \ |
| 634 | HT_HANDLER_RAND4_2 ;\ |
| 635 | done |
| 636 | #define H_HT0_Fp_exception_other_0x22 |
| 637 | #define My_HT0_Fp_exception_other_0x22 \ |
| 638 | HT_HANDLER_RAND7_2 ;\ |
| 639 | done |
| 640 | #define H_HT0_Division_By_Zero |
| 641 | #define My_HT0_Division_By_Zero \ |
| 642 | HT_HANDLER_RAND4_6;\ |
| 643 | done |
| 644 | #define H_T0_Division_By_Zero |
| 645 | #define My_T0_Division_By_Zero \ |
| 646 | T_HANDLER_RAND4_3;\ |
| 647 | done |
| 648 | #define H_T1_Division_By_Zero_0x28 |
| 649 | #define My_H_T1_Division_By_Zero_0x28 \ |
| 650 | T_HANDLER_RAND4_3;\ |
| 651 | done |
| 652 | #define H_T0_Division_By_Zero |
| 653 | #define My_T0_Division_By_Zero\ |
| 654 | T_HANDLER_RAND4_4 ;\ |
| 655 | done |
| 656 | #define H_T0_Fp_exception_ieee_754_0x21 |
| 657 | #define My_T0_Fp_exception_ieee_754_0x21 \ |
| 658 | T_HANDLER_RAND4_3 ;\ |
| 659 | done |
| 660 | #define H_T1_Fp_Exception_Ieee_754_0x21 |
| 661 | #define My_H_T1_Fp_Exception_Ieee_754_0x21 \ |
| 662 | T_HANDLER_RAND4_4 ;\ |
| 663 | done |
| 664 | #define H_T1_Fp_Exception_Other_0x22 |
| 665 | #define My_H_T1_Fp_Exception_Other_0x22 \ |
| 666 | T_HANDLER_RAND4_5 ;\ |
| 667 | done |
| 668 | #define H_T1_Privileged_Opcode_0x11 |
| 669 | #define SUN_H_T1_Privileged_Opcode_0x11 \ |
| 670 | T_HANDLER_RAND4_6 ;\ |
| 671 | done |
| 672 | |
| 673 | #define H_HT0_Privileged_opcode_0x11 |
| 674 | #define My_HT0_Privileged_opcode_0x11 \ |
| 675 | HT_HANDLER_RAND4_1;\ |
| 676 | done; |
| 677 | |
| 678 | #define H_HT0_Fp_disabled_0x20 |
| 679 | #define My_HT0_Fp_disabled_0x20 \ |
| 680 | mov 0x4, %l2 ;\ |
| 681 | wr %l2, 0x0, %fprs ;\ |
| 682 | sllx %l2, 10, %l3; \ |
| 683 | rdpr %tstate, %l2;\ |
| 684 | or %l2, %l3, %l2 ;\ |
| 685 | stw %l2, [%i7];\ |
| 686 | wrpr %l2, 0x0, %tstate;\ |
| 687 | retry; |
| 688 | |
| 689 | #define H_T0_Fp_disabled_0x20 |
| 690 | #define My_T0_Fp_disabled_0x20 \ |
| 691 | mov 0x4, %l2 ;\ |
| 692 | wr %l2, 0x0, %fprs ;\ |
| 693 | sllx %l2, 10, %l3; \ |
| 694 | rdpr %tstate, %l2;\ |
| 695 | or %l2, %l3, %l2 ;\ |
| 696 | wrpr %l2, 0x0, %tstate;\ |
| 697 | retry; nop |
| 698 | |
| 699 | #define H_T1_Fp_Disabled_0x20 |
| 700 | #define My_H_T1_Fp_Disabled_0x20 \ |
| 701 | mov 0x4, %l2 ;\ |
| 702 | wr %l2, 0x0, %fprs ;\ |
| 703 | sllx %l2, 10, %l3; \ |
| 704 | rdpr %tstate, %l2;\ |
| 705 | or %l2, %l3, %l2 ;\ |
| 706 | wrpr %l2, 0x0, %tstate;\ |
| 707 | stw %l2, [%i7];\ |
| 708 | retry |
| 709 | |
| 710 | #define H_HT0_Watchdog_Reset_0x02 |
| 711 | #define My_HT0_Watchdog_Reset_0x02 \ |
| 712 | ba wdog_2_ext;\ |
| 713 | nop;retry;nop;nop;nop;nop;nop |
| 714 | |
| 715 | #define H_T0_Privileged_opcode_0x11 |
| 716 | #define My_T0_Privileged_opcode_0x11 \ |
| 717 | T_HANDLER_RAND4_4;\ |
| 718 | done |
| 719 | |
| 720 | #define H_T1_Fp_exception_other_0x22 |
| 721 | #define My_T1_Fp_exception_other_0x22 \ |
| 722 | T_HANDLER_RAND7_3 ;\ |
| 723 | done; |
| 724 | |
| 725 | #define H_T0_Fp_exception_other_0x22 |
| 726 | #define My_T0_Fp_exception_other_0x22 \ |
| 727 | T_HANDLER_RAND7_4;\ |
| 728 | done |
| 729 | |
| 730 | #define H_HT0_Trap_Level_Zero_0x5f |
| 731 | #define My_HT0_Trap_Level_Zero_0x5f \ |
| 732 | not %g0, %r13; \ |
| 733 | rdhpr %hpstate, %l3;\ |
| 734 | jmp %r13;\ |
| 735 | rdhpr %htstate, %l3;\ |
| 736 | and %l3, 0xfe, %l3;\ |
| 737 | wrhpr %l3, 0, %htstate;\ |
| 738 | stw %r13, [%i7];\ |
| 739 | retry |
| 740 | |
| 741 | #define My_Watchdog_Reset |
| 742 | #define My_Watchdog_Reset \ |
| 743 | ba wdog_red_ext;\ |
| 744 | nop;retry;nop;nop;nop;nop;nop |
| 745 | |
| 746 | #define H_HT0_Control_Transfer_Instr_0x74 |
| 747 | #define My_H_HT0_Control_Transfer_Instr_0x74 \ |
| 748 | rdpr %tstate, %l3;\ |
| 749 | mov 1, %l4;\ |
| 750 | sllx %l4, 20, %l4;\ |
| 751 | wrpr %l3, %l4, %tstate ;\ |
| 752 | retry;nop; |
| 753 | |
| 754 | #define H_T0_Control_Transfer_Instr_0x74 |
| 755 | #define My_H_T0_Control_Transfer_Instr_0x74 \ |
| 756 | rdpr %tstate, %l3;\ |
| 757 | mov 1, %l4;\ |
| 758 | sllx %l4, 20, %l4;\ |
| 759 | wrpr %l3, %l4, %tstate ;\ |
| 760 | retry;nop; |
| 761 | |
| 762 | #define H_T1_Control_Transfer_Instr_0x74 |
| 763 | #define My_H_T1_Control_Transfer_Instr_0x74 \ |
| 764 | rdpr %tstate, %l3;\ |
| 765 | mov 1, %l4;\ |
| 766 | sllx %l4, 20, %l4;\ |
| 767 | wrpr %l3, %l4, %tstate ;\ |
| 768 | retry;nop; |
| 769 | # 707 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" |
| 770 | #define H_HT0_data_access_protection_0x6c |
| 771 | #define SUN_H_HT0_data_access_protection_0x6c ba daccess_prot_handler; nop |
| 772 | |
| 773 | #define H_HT0_PA_Watchpoint_0x61 |
| 774 | #define My_H_HT0_PA_Watchpoint_0x61 \ |
| 775 | HT_HANDLER_RAND7_4;\ |
| 776 | done |
| 777 | |
| 778 | #define H_HT0_Data_access_error_0x32 |
| 779 | #define SUN_H_HT0_Data_access_error_0x32 \ |
| 780 | done;nop |
| 781 | |
| 782 | #define H_T0_VA_Watchpoint_0x62 |
| 783 | #define My_T0_VA_Watchpoint_0x62 \ |
| 784 | T_HANDLER_RAND7_5;\ |
| 785 | done |
| 786 | |
| 787 | #define H_T1_VA_Watchpoint_0x62 |
| 788 | #define SUN_H_T1_VA_Watchpoint_0x62 \ |
| 789 | T_HANDLER_RAND7_3;\ |
| 790 | done |
| 791 | |
| 792 | #define H_HT0_VA_Watchpoint_0x62 |
| 793 | #define My_H_HT0_VA_Watchpoint_0x62 \ |
| 794 | HT_HANDLER_RAND7_5;\ |
| 795 | done |
| 796 | |
| 797 | #define H_T0_Instruction_VA_Watchpoint_0x75 |
| 798 | #define SUN_H_T0_Instruction_VA_Watchpoint_0x75 \ |
| 799 | T_HANDLER_RAND7_4;\ |
| 800 | done; |
| 801 | |
| 802 | #define H_T1_Instruction_VA_Watchpoint_0x75 |
| 803 | #define SUN_H_T1_Instruction_VA_Watchpoint_0x75 \ |
| 804 | T_HANDLER_RAND7_5;\ |
| 805 | done; |
| 806 | |
| 807 | #define H_HT0_Instruction_VA_Watchpoint_0x75 |
| 808 | #define SUN_H_HT0_Instruction_VA_Watchpoint_0x75 \ |
| 809 | HT_HANDLER_RAND7_6;\ |
| 810 | done; |
| 811 | |
| 812 | #define H_HT0_Instruction_Breakpoint_0x76 |
| 813 | #define SUN_H_HT0_Instruction_Breakpoint_0x76 \ |
| 814 | rdhpr %htstate, %g1;\ |
| 815 | wrhpr %g1, 0x400, %htstate;\ |
| 816 | retry;nop |
| 817 | # 756 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" |
| 818 | #define H_HT0_Instruction_address_range_0x0d |
| 819 | #define SUN_H_HT0_Instruction_address_range_0x0d \ |
| 820 | HT_HANDLER_RAND4_1;\ |
| 821 | done; |
| 822 | |
| 823 | #define H_HT0_mem_real_range_0x2d |
| 824 | #define SUN_H_HT0_mem_real_range_0x2d \ |
| 825 | HT_HANDLER_RAND4_2;\ |
| 826 | done; |
| 827 | # 767 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" |
| 828 | #define H_HT0_mem_address_range_0x2e |
| 829 | #define SUN_H_HT0_mem_address_range_0x2e \ |
| 830 | HT_HANDLER_RAND4_3;\ |
| 831 | done; |
| 832 | |
| 833 | #define H_HT0_DAE_nc_page_0x16 |
| 834 | #define SUN_H_HT0_DAE_nc_page_0x16 \ |
| 835 | HT_HANDLER_RAND4_4;\ |
| 836 | done; |
| 837 | |
| 838 | #define H_HT0_DAE_nfo_page_0x17 |
| 839 | #define SUN_H_HT0_DAE_nfo_page_0x17 \ |
| 840 | HT_HANDLER_RAND4_5;\ |
| 841 | done; |
| 842 | # 783 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" |
| 843 | #define H_HT0_IAE_unauth_access_0x0b |
| 844 | #define SUN_H_HT0_IAE_unauth_access_0x0b \ |
| 845 | HT_HANDLER_RAND7_3;\ |
| 846 | done; |
| 847 | # 789 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" |
| 848 | #define H_HT0_IAE_nfo_page_0x0c |
| 849 | #define SUN_H_HT0_IAE_nfo_page_0x0c \ |
| 850 | HT_HANDLER_RAND7_6;\ |
| 851 | done; |
| 852 | # 795 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" |
| 853 | #define H_HT0_Reserved_0x3b |
| 854 | #define SUN_H_HT0_Reserved_0x3b \ |
| 855 | mov 0x80, %l3;\ |
| 856 | stxa %l3, [%l3]0x5f ;\ |
| 857 | stxa %l3, [%l3]0x57 ;\ |
| 858 | done; |
| 859 | # 805 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" |
| 860 | #define H_HT0_IAE_privilege_violation_0x08 |
| 861 | #define My_HT0_IAE_privilege_violation_0x08 \ |
| 862 | HT_HANDLER_RAND7_2;\ |
| 863 | done; |
| 864 | |
| 865 | #define H_HT0_Instruction_Access_MMU_Error_0x71 |
| 866 | #define SUN_H_HT0_Instruction_Access_MMU_Error_0x71 \ |
| 867 | mov 0x80, %l3;\ |
| 868 | stxa %l3, [%l3]0x5f ;\ |
| 869 | stxa %l3, [%l3]0x57 ;\ |
| 870 | retry; |
| 871 | |
| 872 | #define H_HT0_Data_Access_MMU_Error_0x72 |
| 873 | #define SUN_H_HT0_Data_Access_MMU_Error_0x72 \ |
| 874 | mov 0x80, %l3;\ |
| 875 | stxa %l3, [%l3]0x5f ;\ |
| 876 | stxa %l3, [%l3]0x57 ;\ |
| 877 | retry; |
| 878 | # 825 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_handlers.s" |
| 879 | !!!!!!!!!!!!!!!!!!!!!! END of all handlers !!!!!!!!!!!!!!!!!!! |
| 880 | # 12 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" |
| 881 | !!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!!! |
| 882 | !!!!!!!!!!!!!!!! START of Interrupt Handlers !!!!!!!!!!!!!!!!! |
| 883 | |
| 884 | #ifndef INT_HANDLER_RAND4_1 |
| 885 | #define INT_HANDLER_RAND4_1 retry; nop; nop; nop |
| 886 | #endif |
| 887 | #ifndef INT_HANDLER_RAND7_1 |
| 888 | #define INT_HANDLER_RAND7_1 mov 0x20,%g1; mov 1, %g2;stxa %g2,[%g1]0x40 |
| 889 | #endif |
| 890 | #ifndef INT_HANDLER_RAND4_2 |
| 891 | #define INT_HANDLER_RAND4_2 retry; nop; nop; nop |
| 892 | #endif |
| 893 | #ifndef INT_HANDLER_RAND7_2 |
| 894 | #define INT_HANDLER_RAND7_2 mov 0x80,%g1;stxa %g0,[%g1]0x40 |
| 895 | #endif |
| 896 | #ifndef INT_HANDLER_RAND4_3 |
| 897 | #define INT_HANDLER_RAND4_3 retry; nop; nop; nop |
| 898 | #endif |
| 899 | #ifndef INT_HANDLER_RAND7_3 |
| 900 | #define INT_HANDLER_RAND7_3 retry; nop; nop; nop ; nop; nop; nop |
| 901 | #endif |
| 902 | #define H_HT0_Externally_Initiated_Reset_0x03 |
| 903 | #define SUN_H_HT0_Externally_Initiated_Reset_0x03 \ |
| 904 | ldxa [%g0] ASI_LSU_CTL_REG, %g1; \ |
| 905 | set cregs_lsu_ctl_reg_r64, %g1; \ |
| 906 | stxa %g1, [%g0] ASI_LSU_CTL_REG; \ |
| 907 | retry;nop |
| 908 | |
| 909 | #define My_External_Reset \ |
| 910 | ldxa [%g0] ASI_LSU_CTL_REG, %l5; \ |
| 911 | set cregs_lsu_ctl_reg_r64, %l5; \ |
| 912 | stxa %l5, [%g0] ASI_LSU_CTL_REG; \ |
| 913 | retry;nop |
| 914 | |
| 915 | !!!!! SPU Interrupt Handlers |
| 916 | |
| 917 | #define H_HT0_Control_Word_Queue_Interrupt_0x3c |
| 918 | #define My_HT0_Control_Word_Queue_Interrupt_0x3c \ |
| 919 | INT_HANDLER_RAND7_1 ;\ |
| 920 | retry ; |
| 921 | |
| 922 | #define H_HT0_Modular_Arithmetic_Interrupt_0x3d |
| 923 | #define My_H_HT0_Modular_Arithmetic_Interrupt_0x3d \ |
| 924 | INT_HANDLER_RAND7_2 ;\ |
| 925 | retry ; |
| 926 | # 59 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" |
| 927 | !!!!! HW interrupt handlers |
| 928 | |
| 929 | #define H_HT0_Interrupt_0x60 |
| 930 | #define My_HT0_Interrupt_0x60 \ |
| 931 | ldxa [%g0] ASI_SWVR_INTR_RECEIVE, %g5 ;\ |
| 932 | ldxa [%g0] ASI_SWVR_INTR_R, %g4 ;\ |
| 933 | ldxa [%g0] ASI_SWVR_INTR_RECEIVE, %g3 ;\ |
| 934 | INT_HANDLER_RAND4_1 ;\ |
| 935 | retry; |
| 936 | |
| 937 | !!!!! Queue interrupt handler |
| 938 | # 72 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" |
| 939 | #define H_T0_Cpu_Mondo_Trap_0x7c |
| 940 | #define My_T0_Cpu_Mondo_Trap_0x7c \ |
| 941 | mov 0x3c8, %g3; \ |
| 942 | ldxa [%g3] 0x25, %g5; \ |
| 943 | mov 0x3c0, %g3; \ |
| 944 | stxa %g5, [%g3] 0x25; \ |
| 945 | retry; \ |
| 946 | nop; \ |
| 947 | nop; \ |
| 948 | nop |
| 949 | |
| 950 | #define H_T0_Dev_Mondo_Trap_0x7d |
| 951 | #define My_T0_Dev_Mondo_Trap_0x7d \ |
| 952 | mov 0x3d8, %g3; \ |
| 953 | ldxa [%g3] 0x25, %g5; \ |
| 954 | mov 0x3d0, %g3; \ |
| 955 | stxa %g5, [%g3] 0x25; \ |
| 956 | retry; \ |
| 957 | nop; \ |
| 958 | nop; \ |
| 959 | nop |
| 960 | |
| 961 | #define H_T0_Resumable_Error_0x7e |
| 962 | #define My_T0_Resumable_Error_0x7e \ |
| 963 | mov 0x3e8, %g3; \ |
| 964 | ldxa [%g3] 0x25, %g5; \ |
| 965 | mov 0x3e0, %g3; \ |
| 966 | stxa %g5, [%g3] 0x25; \ |
| 967 | retry; \ |
| 968 | nop; \ |
| 969 | nop; \ |
| 970 | nop |
| 971 | |
| 972 | #define H_T1_Cpu_Mondo_Trap_0x7c |
| 973 | #define My_T1_Cpu_Mondo_Trap_0x7c \ |
| 974 | mov 0x3c8, %g3; \ |
| 975 | ldxa [%g3] 0x25, %g5; \ |
| 976 | mov 0x3c0, %g3; \ |
| 977 | stxa %g5, [%g3] 0x25; \ |
| 978 | retry; \ |
| 979 | nop; \ |
| 980 | nop; \ |
| 981 | nop |
| 982 | |
| 983 | #define H_T1_Dev_Mondo_Trap_0x7d |
| 984 | #define My_T1_Dev_Mondo_Trap_0x7d \ |
| 985 | mov 0x3d8, %g3; \ |
| 986 | ldxa [%g3] 0x25, %g5; \ |
| 987 | mov 0x3d0, %g3; \ |
| 988 | stxa %g5, [%g3] 0x25; \ |
| 989 | retry; \ |
| 990 | nop; \ |
| 991 | nop; \ |
| 992 | nop |
| 993 | |
| 994 | #define H_T1_Resumable_Error_0x7e |
| 995 | #define My_T1_Resumable_Error_0x7e \ |
| 996 | mov 0x3e8, %g3; \ |
| 997 | ldxa [%g3] 0x25, %g5; \ |
| 998 | mov 0x3e0, %g3; \ |
| 999 | stxa %g5, [%g3] 0x25; \ |
| 1000 | retry; \ |
| 1001 | nop; \ |
| 1002 | nop; \ |
| 1003 | nop |
| 1004 | |
| 1005 | #define H_HT0_Reserved_0x7c |
| 1006 | #define SUN_H_HT0_Reserved_0x7c \ |
| 1007 | mov 0x3c8, %g3; \ |
| 1008 | ldxa [%g3] 0x25, %g5; \ |
| 1009 | mov 0x3c0, %g3; \ |
| 1010 | stxa %g5, [%g3] 0x25; \ |
| 1011 | retry; \ |
| 1012 | nop; \ |
| 1013 | nop; \ |
| 1014 | nop |
| 1015 | |
| 1016 | #define H_HT0_Reserved_0x7d |
| 1017 | #define SUN_H_HT0_Reserved_0x7d \ |
| 1018 | mov 0x3d8, %g3; \ |
| 1019 | ldxa [%g3] 0x25, %g5; \ |
| 1020 | mov 0x3d0, %g3; \ |
| 1021 | stxa %g5, [%g3] 0x25; \ |
| 1022 | retry; \ |
| 1023 | nop; \ |
| 1024 | nop; \ |
| 1025 | nop |
| 1026 | |
| 1027 | #define H_HT0_Reserved_0x7e |
| 1028 | #define SUN_H_HT0_Reserved_0x7e \ |
| 1029 | mov 0x3e8, %g3; \ |
| 1030 | ldxa [%g3] 0x25, %g5; \ |
| 1031 | mov 0x3e0, %g3; \ |
| 1032 | stxa %g5, [%g3] 0x25; \ |
| 1033 | retry; \ |
| 1034 | nop; \ |
| 1035 | nop; \ |
| 1036 | nop |
| 1037 | # 172 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" |
| 1038 | !!!!! Hstick-match trap handler |
| 1039 | # 175 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" |
| 1040 | #define H_T0_Reserved_0x5e |
| 1041 | #define My_T0_Reserved_0x5e \ |
| 1042 | rdhpr %hintp, %g3; \ |
| 1043 | wrhpr %g3, %g3, %hintp; \ |
| 1044 | retry; \ |
| 1045 | nop; \ |
| 1046 | nop; \ |
| 1047 | nop; \ |
| 1048 | nop; \ |
| 1049 | nop |
| 1050 | |
| 1051 | #define H_HT0_Hstick_Match_0x5e |
| 1052 | #define My_HT0_Hstick_Match_0x5e \ |
| 1053 | rdhpr %hintp, %g3; \ |
| 1054 | wrhpr %g3, %g3, %hintp; \ |
| 1055 | retry; \ |
| 1056 | nop; \ |
| 1057 | nop; \ |
| 1058 | nop; \ |
| 1059 | nop; \ |
| 1060 | nop |
| 1061 | |
| 1062 | #define H_T0_Reserved_0x5e |
| 1063 | #define My_T0_Reserved_0x5e \ |
| 1064 | rdhpr %hintp, %g3; \ |
| 1065 | wrhpr %g3, %g3, %hintp; \ |
| 1066 | retry; \ |
| 1067 | nop; \ |
| 1068 | nop; \ |
| 1069 | nop; \ |
| 1070 | nop; \ |
| 1071 | nop |
| 1072 | |
| 1073 | #define H_T1_Reserved_0x5e |
| 1074 | #define My_T1_Reserved_0x5e \ |
| 1075 | rdhpr %hintp, %g3; \ |
| 1076 | wrhpr %g3, %g3, %hintp; \ |
| 1077 | retry; \ |
| 1078 | nop; \ |
| 1079 | nop; \ |
| 1080 | nop; \ |
| 1081 | nop; \ |
| 1082 | nop |
| 1083 | # 220 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" |
| 1084 | !!!!! SW interuupt handlers |
| 1085 | # 223 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" |
| 1086 | #define H_T0_Interrupt_Level_14_0x4e |
| 1087 | #define My_T0_Interrupt_Level_14_0x4e \ |
| 1088 | rd %softint, %g3; \ |
| 1089 | sethi %hi(0x14000), %g3; \ |
| 1090 | or %g3, 0x1, %g3; \ |
| 1091 | wr %g3, %g0, %clear_softint; \ |
| 1092 | retry; \ |
| 1093 | nop; \ |
| 1094 | nop; \ |
| 1095 | nop |
| 1096 | |
| 1097 | #define H_T0_Interrupt_Level_1_0x41 |
| 1098 | #define My_T0_Interrupt_Level_1_0x41 \ |
| 1099 | rd %softint, %g3; \ |
| 1100 | or %g0, 0x2, %g3; \ |
| 1101 | wr %g3, %g0, %clear_softint; \ |
| 1102 | retry; \ |
| 1103 | nop; \ |
| 1104 | nop; \ |
| 1105 | nop; \ |
| 1106 | nop |
| 1107 | |
| 1108 | #define H_T0_Interrupt_Level_2_0x42 |
| 1109 | #define My_T0_Interrupt_Level_2_0x42 \ |
| 1110 | rd %softint, %g3; \ |
| 1111 | or %g0, 0x4, %g3; \ |
| 1112 | wr %g3, %g0, %clear_softint; \ |
| 1113 | retry; \ |
| 1114 | nop; \ |
| 1115 | nop; \ |
| 1116 | nop; \ |
| 1117 | nop |
| 1118 | |
| 1119 | #define H_T0_Interrupt_Level_3_0x43 |
| 1120 | #define My_T0_Interrupt_Level_3_0x43 \ |
| 1121 | rd %softint, %g3; \ |
| 1122 | or %g0, 0x8, %g3; \ |
| 1123 | wr %g3, %g0, %clear_softint; \ |
| 1124 | retry; \ |
| 1125 | nop; \ |
| 1126 | nop; \ |
| 1127 | nop; \ |
| 1128 | nop |
| 1129 | |
| 1130 | #define H_T0_Interrupt_Level_4_0x44 |
| 1131 | #define My_T0_Interrupt_Level_4_0x44 \ |
| 1132 | rd %softint, %g3; \ |
| 1133 | or %g0, 0x10, %g3; \ |
| 1134 | wr %g3, %g0, %clear_softint; \ |
| 1135 | retry; \ |
| 1136 | nop; \ |
| 1137 | nop; \ |
| 1138 | nop; \ |
| 1139 | nop |
| 1140 | |
| 1141 | #define H_T0_Interrupt_Level_5_0x45 |
| 1142 | #define My_T0_Interrupt_Level_5_0x45 \ |
| 1143 | rd %softint, %g3; \ |
| 1144 | or %g0, 0x20, %g3; \ |
| 1145 | wr %g3, %g0, %clear_softint; \ |
| 1146 | retry; \ |
| 1147 | nop; \ |
| 1148 | nop; \ |
| 1149 | nop; \ |
| 1150 | nop |
| 1151 | |
| 1152 | #define H_T0_Interrupt_Level_6_0x46 |
| 1153 | #define My_T0_Interrupt_Level_6_0x46 \ |
| 1154 | rd %softint, %g3; \ |
| 1155 | or %g0, 0x40, %g3; \ |
| 1156 | wr %g3, %g0, %clear_softint; \ |
| 1157 | retry; \ |
| 1158 | nop; \ |
| 1159 | nop; \ |
| 1160 | nop; \ |
| 1161 | nop |
| 1162 | |
| 1163 | #define H_T0_Interrupt_Level_7_0x47 |
| 1164 | #define My_T0_Interrupt_Level_7_0x47 \ |
| 1165 | rd %softint, %g3; \ |
| 1166 | or %g0, 0x80, %g3; \ |
| 1167 | wr %g3, %g0, %clear_softint; \ |
| 1168 | retry; \ |
| 1169 | nop; \ |
| 1170 | nop; \ |
| 1171 | nop; \ |
| 1172 | nop |
| 1173 | |
| 1174 | #define H_T0_Interrupt_Level_8_0x48 |
| 1175 | #define My_T0_Interrupt_Level_8_0x48 \ |
| 1176 | rd %softint, %g3; \ |
| 1177 | or %g0, 0x100, %g3; \ |
| 1178 | wr %g3, %g0, %clear_softint; \ |
| 1179 | retry; \ |
| 1180 | nop; \ |
| 1181 | nop; \ |
| 1182 | nop; \ |
| 1183 | nop |
| 1184 | |
| 1185 | #define H_T0_Interrupt_Level_9_0x49 |
| 1186 | #define My_T0_Interrupt_Level_9_0x49 \ |
| 1187 | rd %softint, %g3; \ |
| 1188 | or %g0, 0x200, %g3; \ |
| 1189 | wr %g3, %g0, %clear_softint; \ |
| 1190 | retry; \ |
| 1191 | nop; \ |
| 1192 | nop; \ |
| 1193 | nop; \ |
| 1194 | nop |
| 1195 | |
| 1196 | #define H_T0_Interrupt_Level_10_0x4a |
| 1197 | #define My_T0_Interrupt_Level_10_0x4a \ |
| 1198 | rd %softint, %g3; \ |
| 1199 | or %g0, 0x400, %g3; \ |
| 1200 | wr %g3, %g0, %clear_softint; \ |
| 1201 | retry; \ |
| 1202 | nop; \ |
| 1203 | nop; \ |
| 1204 | nop; \ |
| 1205 | nop |
| 1206 | |
| 1207 | #define H_T0_Interrupt_Level_11_0x4b |
| 1208 | #define My_T0_Interrupt_Level_11_0x4b \ |
| 1209 | rd %softint, %g3; \ |
| 1210 | or %g0, 0x800, %g3; \ |
| 1211 | wr %g3, %g0, %clear_softint; \ |
| 1212 | retry; \ |
| 1213 | nop; \ |
| 1214 | nop; \ |
| 1215 | nop; \ |
| 1216 | nop |
| 1217 | |
| 1218 | #define H_T0_Interrupt_Level_12_0x4c |
| 1219 | #define My_T0_Interrupt_Level_12_0x4c \ |
| 1220 | rd %softint, %g3; \ |
| 1221 | sethi %hi(0x1000), %g3; \ |
| 1222 | wr %g3, %g0, %clear_softint; \ |
| 1223 | retry; \ |
| 1224 | nop; \ |
| 1225 | nop; \ |
| 1226 | nop; \ |
| 1227 | nop |
| 1228 | |
| 1229 | #define H_T0_Interrupt_Level_13_0x4d |
| 1230 | #define My_T0_Interrupt_Level_13_0x4d \ |
| 1231 | rd %softint, %g3; \ |
| 1232 | sethi %hi(0x2000), %g3; \ |
| 1233 | wr %g3, %g0, %clear_softint; \ |
| 1234 | retry; \ |
| 1235 | nop; \ |
| 1236 | nop; \ |
| 1237 | nop; \ |
| 1238 | nop |
| 1239 | |
| 1240 | #define H_T0_Interrupt_Level_15_0x4f |
| 1241 | #define My_T0_Interrupt_Level_15_0x4f \ |
| 1242 | sethi %hi(0x8000), %g3; \ |
| 1243 | wr %g3, %g0, %clear_softint; \ |
| 1244 | wr %g0, %g0, %pic;\ |
| 1245 | set 0x1ff8bfff, %g4;\ |
| 1246 | wr %g4, %g0, %pcr;\ |
| 1247 | retry; |
| 1248 | |
| 1249 | #define H_T1_Interrupt_Level_14_0x4e |
| 1250 | #define My_T1_Interrupt_Level_14_0x4e \ |
| 1251 | rd %softint, %g3; \ |
| 1252 | sethi %hi(0x14000), %g3; \ |
| 1253 | or %g3, 0x1, %g3; \ |
| 1254 | wr %g3, %g0, %clear_softint; \ |
| 1255 | retry; \ |
| 1256 | nop; \ |
| 1257 | nop; \ |
| 1258 | nop |
| 1259 | |
| 1260 | #define H_T1_Interrupt_Level_1_0x41 |
| 1261 | #define My_T1_Interrupt_Level_1_0x41 \ |
| 1262 | rd %softint, %g3; \ |
| 1263 | or %g0, 0x2, %g3; \ |
| 1264 | wr %g3, %g0, %clear_softint; \ |
| 1265 | retry; \ |
| 1266 | nop; \ |
| 1267 | nop; \ |
| 1268 | nop; \ |
| 1269 | nop |
| 1270 | |
| 1271 | #define H_T1_Interrupt_Level_2_0x42 |
| 1272 | #define My_T1_Interrupt_Level_2_0x42 \ |
| 1273 | rd %softint, %g3; \ |
| 1274 | or %g0, 0x4, %g3; \ |
| 1275 | wr %g3, %g0, %clear_softint; \ |
| 1276 | retry; \ |
| 1277 | nop; \ |
| 1278 | nop; \ |
| 1279 | nop; \ |
| 1280 | nop |
| 1281 | |
| 1282 | #define H_T1_Interrupt_Level_3_0x43 |
| 1283 | #define My_T1_Interrupt_Level_3_0x43 \ |
| 1284 | rd %softint, %g3; \ |
| 1285 | or %g0, 0x8, %g3; \ |
| 1286 | wr %g3, %g0, %clear_softint; \ |
| 1287 | retry; \ |
| 1288 | nop; \ |
| 1289 | nop; \ |
| 1290 | nop; \ |
| 1291 | nop |
| 1292 | |
| 1293 | #define H_T1_Interrupt_Level_4_0x44 |
| 1294 | #define My_T1_Interrupt_Level_4_0x44 \ |
| 1295 | rd %softint, %g3; \ |
| 1296 | or %g0, 0x10, %g3; \ |
| 1297 | wr %g3, %g0, %clear_softint; \ |
| 1298 | retry; \ |
| 1299 | nop; \ |
| 1300 | nop; \ |
| 1301 | nop; \ |
| 1302 | nop |
| 1303 | |
| 1304 | #define H_T1_Interrupt_Level_5_0x45 |
| 1305 | #define My_T1_Interrupt_Level_5_0x45 \ |
| 1306 | rd %softint, %g3; \ |
| 1307 | or %g0, 0x20, %g3; \ |
| 1308 | wr %g3, %g0, %clear_softint; \ |
| 1309 | retry; \ |
| 1310 | nop; \ |
| 1311 | nop; \ |
| 1312 | nop; \ |
| 1313 | nop |
| 1314 | |
| 1315 | #define H_T1_Interrupt_Level_6_0x46 |
| 1316 | #define My_T1_Interrupt_Level_6_0x46 \ |
| 1317 | rd %softint, %g3; \ |
| 1318 | or %g0, 0x40, %g3; \ |
| 1319 | wr %g3, %g0, %clear_softint; \ |
| 1320 | retry; \ |
| 1321 | nop; \ |
| 1322 | nop; \ |
| 1323 | nop; \ |
| 1324 | nop |
| 1325 | |
| 1326 | #define H_T1_Interrupt_Level_7_0x47 |
| 1327 | #define My_T1_Interrupt_Level_7_0x47 \ |
| 1328 | rd %softint, %g3; \ |
| 1329 | or %g0, 0x80, %g3; \ |
| 1330 | wr %g3, %g0, %clear_softint; \ |
| 1331 | retry; \ |
| 1332 | nop; \ |
| 1333 | nop; \ |
| 1334 | nop; \ |
| 1335 | nop |
| 1336 | |
| 1337 | #define H_T1_Interrupt_Level_8_0x48 |
| 1338 | #define My_T1_Interrupt_Level_8_0x48 \ |
| 1339 | rd %softint, %g3; \ |
| 1340 | or %g0, 0x100, %g3; \ |
| 1341 | wr %g3, %g0, %clear_softint; \ |
| 1342 | retry; \ |
| 1343 | nop; \ |
| 1344 | nop; \ |
| 1345 | nop; \ |
| 1346 | nop |
| 1347 | |
| 1348 | #define H_T1_Interrupt_Level_9_0x49 |
| 1349 | #define My_T1_Interrupt_Level_9_0x49 \ |
| 1350 | rd %softint, %g3; \ |
| 1351 | or %g0, 0x200, %g3; \ |
| 1352 | wr %g3, %g0, %clear_softint; \ |
| 1353 | retry; \ |
| 1354 | nop; \ |
| 1355 | nop; \ |
| 1356 | nop; \ |
| 1357 | nop |
| 1358 | |
| 1359 | #define H_T1_Interrupt_Level_10_0x4a |
| 1360 | #define My_T1_Interrupt_Level_10_0x4a \ |
| 1361 | rd %softint, %g3; \ |
| 1362 | or %g0, 0x400, %g3; \ |
| 1363 | wr %g3, %g0, %clear_softint; \ |
| 1364 | retry; \ |
| 1365 | nop; \ |
| 1366 | nop; \ |
| 1367 | nop; \ |
| 1368 | nop |
| 1369 | |
| 1370 | #define H_T1_Interrupt_Level_11_0x4b |
| 1371 | #define My_T1_Interrupt_Level_11_0x4b \ |
| 1372 | rd %softint, %g3; \ |
| 1373 | or %g0, 0x800, %g3; \ |
| 1374 | wr %g3, %g0, %clear_softint; \ |
| 1375 | retry; \ |
| 1376 | nop; \ |
| 1377 | nop; \ |
| 1378 | nop; \ |
| 1379 | nop |
| 1380 | |
| 1381 | #define H_T1_Interrupt_Level_12_0x4c |
| 1382 | #define My_T1_Interrupt_Level_12_0x4c \ |
| 1383 | rd %softint, %g3; \ |
| 1384 | sethi %hi(0x1000), %g3; \ |
| 1385 | wr %g3, %g0, %clear_softint; \ |
| 1386 | retry; \ |
| 1387 | nop; \ |
| 1388 | nop; \ |
| 1389 | nop; \ |
| 1390 | nop |
| 1391 | |
| 1392 | #define H_T1_Interrupt_Level_13_0x4d |
| 1393 | #define My_T1_Interrupt_Level_13_0x4d \ |
| 1394 | rd %softint, %g3; \ |
| 1395 | sethi %hi(0x2000), %g3; \ |
| 1396 | wr %g3, %g0, %clear_softint; \ |
| 1397 | retry; \ |
| 1398 | nop; \ |
| 1399 | nop; \ |
| 1400 | nop; \ |
| 1401 | nop |
| 1402 | |
| 1403 | #define H_T1_Interrupt_Level_15_0x4f |
| 1404 | #define My_T1_Interrupt_Level_15_0x4f \ |
| 1405 | sethi %hi(0x8000), %g3; \ |
| 1406 | wr %g3, %g0, %clear_softint; \ |
| 1407 | wr %g0, %g0, %pic;\ |
| 1408 | set 0x1ff8bfff, %g4;\ |
| 1409 | wr %g4, %g0, %pcr;\ |
| 1410 | retry; |
| 1411 | |
| 1412 | #define H_HT0_Interrupt_Level_14_0x4e |
| 1413 | #define My_HT0_Interrupt_Level_14_0x4e \ |
| 1414 | rd %softint, %g3; \ |
| 1415 | sethi %hi(0x14000), %g3; \ |
| 1416 | or %g3, 0x1, %g3; \ |
| 1417 | wr %g3, %g0, %clear_softint; \ |
| 1418 | retry; \ |
| 1419 | nop; \ |
| 1420 | nop; \ |
| 1421 | nop |
| 1422 | |
| 1423 | #define H_HT0_Interrupt_Level_1_0x41 |
| 1424 | #define My_HT0_Interrupt_Level_1_0x41 \ |
| 1425 | rd %softint, %g3; \ |
| 1426 | or %g0, 0x2, %g3; \ |
| 1427 | wr %g3, %g0, %clear_softint; \ |
| 1428 | retry; \ |
| 1429 | nop; \ |
| 1430 | nop; \ |
| 1431 | nop; \ |
| 1432 | nop |
| 1433 | |
| 1434 | #define H_HT0_Interrupt_Level_2_0x42 |
| 1435 | #define My_HT0_Interrupt_Level_2_0x42 \ |
| 1436 | rd %softint, %g3; \ |
| 1437 | or %g0, 0x4, %g3; \ |
| 1438 | wr %g3, %g0, %clear_softint; \ |
| 1439 | retry; \ |
| 1440 | nop; \ |
| 1441 | nop; \ |
| 1442 | nop; \ |
| 1443 | nop |
| 1444 | |
| 1445 | #define H_HT0_Interrupt_Level_3_0x43 |
| 1446 | #define My_HT0_Interrupt_Level_3_0x43 \ |
| 1447 | rd %softint, %g3; \ |
| 1448 | or %g0, 0x8, %g3; \ |
| 1449 | wr %g3, %g0, %clear_softint; \ |
| 1450 | retry; \ |
| 1451 | nop; \ |
| 1452 | nop; \ |
| 1453 | nop; \ |
| 1454 | nop |
| 1455 | |
| 1456 | #define H_HT0_Interrupt_Level_4_0x44 |
| 1457 | #define My_HT0_Interrupt_Level_4_0x44 \ |
| 1458 | rd %softint, %g3; \ |
| 1459 | or %g0, 0x10, %g3; \ |
| 1460 | wr %g3, %g0, %clear_softint; \ |
| 1461 | retry; \ |
| 1462 | nop; \ |
| 1463 | nop; \ |
| 1464 | nop; \ |
| 1465 | nop |
| 1466 | |
| 1467 | #define H_HT0_Interrupt_Level_5_0x45 |
| 1468 | #define My_HT0_Interrupt_Level_5_0x45 \ |
| 1469 | rd %softint, %g3; \ |
| 1470 | or %g0, 0x20, %g3; \ |
| 1471 | wr %g3, %g0, %clear_softint; \ |
| 1472 | retry; \ |
| 1473 | nop; \ |
| 1474 | nop; \ |
| 1475 | nop; \ |
| 1476 | nop |
| 1477 | |
| 1478 | #define H_HT0_Interrupt_Level_6_0x46 |
| 1479 | #define My_HT0_Interrupt_Level_6_0x46 \ |
| 1480 | rd %softint, %g3; \ |
| 1481 | or %g0, 0x40, %g3; \ |
| 1482 | wr %g3, %g0, %clear_softint; \ |
| 1483 | retry; \ |
| 1484 | nop; \ |
| 1485 | nop; \ |
| 1486 | nop; \ |
| 1487 | nop |
| 1488 | |
| 1489 | #define H_HT0_Interrupt_Level_7_0x47 |
| 1490 | #define My_HT0_Interrupt_Level_7_0x47 \ |
| 1491 | rd %softint, %g3; \ |
| 1492 | or %g0, 0x80, %g3; \ |
| 1493 | wr %g3, %g0, %clear_softint; \ |
| 1494 | retry; \ |
| 1495 | nop; \ |
| 1496 | nop; \ |
| 1497 | nop; \ |
| 1498 | nop |
| 1499 | |
| 1500 | #define H_HT0_Interrupt_Level_8_0x48 |
| 1501 | #define My_HT0_Interrupt_Level_8_0x48 \ |
| 1502 | rd %softint, %g3; \ |
| 1503 | or %g0, 0x100, %g3; \ |
| 1504 | wr %g3, %g0, %clear_softint; \ |
| 1505 | retry; \ |
| 1506 | nop; \ |
| 1507 | nop; \ |
| 1508 | nop; \ |
| 1509 | nop |
| 1510 | |
| 1511 | #define H_HT0_Interrupt_Level_9_0x49 |
| 1512 | #define My_HT0_Interrupt_Level_9_0x49 \ |
| 1513 | rd %softint, %g3; \ |
| 1514 | or %g0, 0x200, %g3; \ |
| 1515 | wr %g3, %g0, %clear_softint; \ |
| 1516 | retry; \ |
| 1517 | nop; \ |
| 1518 | nop; \ |
| 1519 | nop; \ |
| 1520 | nop |
| 1521 | |
| 1522 | #define H_HT0_Interrupt_Level_10_0x4a |
| 1523 | #define My_HT0_Interrupt_Level_10_0x4a \ |
| 1524 | rd %softint, %g3; \ |
| 1525 | or %g0, 0x400, %g3; \ |
| 1526 | wr %g3, %g0, %clear_softint; \ |
| 1527 | retry; \ |
| 1528 | nop; \ |
| 1529 | nop; \ |
| 1530 | nop; \ |
| 1531 | nop |
| 1532 | |
| 1533 | #define H_HT0_Interrupt_Level_11_0x4b |
| 1534 | #define My_HT0_Interrupt_Level_11_0x4b \ |
| 1535 | rd %softint, %g3; \ |
| 1536 | or %g0, 0x800, %g3; \ |
| 1537 | wr %g3, %g0, %clear_softint; \ |
| 1538 | retry; \ |
| 1539 | nop; \ |
| 1540 | nop; \ |
| 1541 | nop; \ |
| 1542 | nop |
| 1543 | |
| 1544 | #define H_HT0_Interrupt_Level_12_0x4c |
| 1545 | #define My_HT0_Interrupt_Level_12_0x4c \ |
| 1546 | rd %softint, %g3; \ |
| 1547 | sethi %hi(0x1000), %g3; \ |
| 1548 | wr %g3, %g0, %clear_softint; \ |
| 1549 | retry; \ |
| 1550 | nop; \ |
| 1551 | nop; \ |
| 1552 | nop; \ |
| 1553 | nop |
| 1554 | |
| 1555 | #define H_HT0_Interrupt_Level_13_0x4d |
| 1556 | #define My_HT0_Interrupt_Level_13_0x4d \ |
| 1557 | rd %softint, %g3; \ |
| 1558 | sethi %hi(0x2000), %g3; \ |
| 1559 | wr %g3, %g0, %clear_softint; \ |
| 1560 | retry; \ |
| 1561 | nop; \ |
| 1562 | nop; \ |
| 1563 | nop; \ |
| 1564 | nop |
| 1565 | |
| 1566 | #define H_HT0_Interrupt_Level_15_0x4f |
| 1567 | #define My_HT0_Interrupt_Level_15_0x4f \ |
| 1568 | sethi %hi(0x8000), %g3; \ |
| 1569 | wr %g3, %g0, %clear_softint; \ |
| 1570 | wr %g0, %g0, %pic;\ |
| 1571 | set 0x1ff8bfff, %g4;\ |
| 1572 | wr %g4, %g0, %pcr;\ |
| 1573 | retry; |
| 1574 | # 713 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_intr_handlers.s" |
| 1575 | !!!!!!!!!!!!!!!!!!!!!! END of all handlers !!!!!!!!!!!!!!!!!!! |
| 1576 | # 488 "diag.j" |
| 1577 | !# Steer towards main TBA on these errors .. |
| 1578 | !# These are redefines ... |
| 1579 | #undef SUN_H_HT0_DAE_nc_page_0x16 |
| 1580 | #define SUN_H_HT0_DAE_nc_page_0x16 \ |
| 1581 | best_set_reg(0x120000, %r1, %r2);\ |
| 1582 | wrpr %r0, %r2, %tba; \ |
| 1583 | done;nop |
| 1584 | |
| 1585 | #undef SUN_H_HT0_DAE_nfo_page_0x17 |
| 1586 | #define SUN_H_HT0_DAE_nfo_page_0x17 \ |
| 1587 | best_set_reg(0x120000, %r1, %r2);\ |
| 1588 | wrpr %r0, %r2, %tba; \ |
| 1589 | done;nop |
| 1590 | |
| 1591 | #undef SUN_H_HT0_IAE_unauth_access_0x0b |
| 1592 | #define SUN_H_HT0_IAE_unauth_access_0x0b \ |
| 1593 | set resolve_bad_tte, %g3;\ |
| 1594 | jmp %g3;\ |
| 1595 | nop |
| 1596 | |
| 1597 | #undef My_HT0_IAE_privilege_violation_0x08 |
| 1598 | #define My_HT0_IAE_privilege_violation_0x08 \ |
| 1599 | set resolve_bad_tte, %g3;\ |
| 1600 | jmp %g3;\ |
| 1601 | nop |
| 1602 | |
| 1603 | #define H_HT0_Instruction_address_range_0x0d |
| 1604 | #define SUN_H_HT0_Instruction_address_range_0x0d \ |
| 1605 | rdpr %tpc, %g1;\ |
| 1606 | rdpr %tnpc, %g2;\ |
| 1607 | stw %g1, [%i7];\ |
| 1608 | stw %g2, [%i7+4];\ |
| 1609 | jmpl %r27+8, %r27;\ |
| 1610 | fdivd %f0, %f4, %f4;\ |
| 1611 | nop; |
| 1612 | |
| 1613 | #define H_HT0_Instruction_real_range_0x0e |
| 1614 | #define SUN_H_HT0_Instruction_real_range_0x0e \ |
| 1615 | rdpr %tpc, %g1;\ |
| 1616 | rdpr %tnpc, %g2;\ |
| 1617 | stw %g1, [%i7];\ |
| 1618 | stw %g2, [%i7+4];\ |
| 1619 | jmpl %r27+8, %r27;\ |
| 1620 | fdivd %f0, %f4, %f4;\ |
| 1621 | nop; |
| 1622 | |
| 1623 | #undef SUN_H_HT0_IAE_nfo_page_0x0c |
| 1624 | #define SUN_H_HT0_IAE_nfo_page_0x0c \ |
| 1625 | set resolve_bad_tte, %g3;\ |
| 1626 | jmp %g3;\ |
| 1627 | nop |
| 1628 | |
| 1629 | #define H_HT0_Instruction_Invalid_TSB_Entry_0x2a |
| 1630 | #define SUN_H_HT0_Instruction_Invalid_TSB_Entry_0x2a \ |
| 1631 | set restore_range_regs, %g3;\ |
| 1632 | jmp %g3;\ |
| 1633 | nop |
| 1634 | |
| 1635 | #define H_HT0_Data_Invalid_TSB_Entry_0x2b |
| 1636 | #define SUN_H_HT0_Data_Invalid_TSB_Entry_0x2b \ |
| 1637 | set restore_range_regs, %g3;\ |
| 1638 | jmp %g3;\ |
| 1639 | nop |
| 1640 | |
| 1641 | #undef FAST_BOOT |
| 1642 | #include "hboot.s" |
| 1643 | # 556 "diag.j" |
| 1644 | #define LOMEIN_TEXT_VA [0x]mpeval(MAIN_BASE_TEXT_VA&0xffffffff,16) |
| 1645 | #define LOMEIN_DATA_VA [0x]mpeval(MAIN_BASE_DATA_VA&0xffffffff,16) |
| 1646 | changequote([, ])dnl |
| 1647 | SECTION .LOMEIN TEXT_VA=LOMEIN_TEXT_VA, DATA_VA=LOMEIN_DATA_VA |
| 1648 | attr_text { |
| 1649 | Name = .LOMEIN, |
| 1650 | VA= LOMEIN_TEXT_VA, |
| 1651 | RA= MAIN_BASE_TEXT_RA, |
| 1652 | PA= ra2pa2(MAIN_BASE_TEXT_RA, 0), |
| 1653 | part_0_ctx_nonzero_tsb_config_1, |
| 1654 | part_0_ctx_zero_tsb_config_1, |
| 1655 | TTE_G=1, TTE_Context=0x44, TTE_V=1, |
| 1656 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, |
| 1657 | TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=1, |
| 1658 | tsbonly |
| 1659 | } |
| 1660 | attr_data { |
| 1661 | Name = .LOMEIN, |
| 1662 | VA= LOMEIN_DATA_VA, |
| 1663 | RA= MAIN_BASE_DATA_RA, |
| 1664 | PA= ra2pa2(MAIN_BASE_DATA_RA, 0), |
| 1665 | part_0_ctx_nonzero_tsb_config_2, |
| 1666 | part_0_ctx_zero_tsb_config_2 |
| 1667 | TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0, |
| 1668 | TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, |
| 1669 | TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=0, |
| 1670 | tsbonly |
| 1671 | } |
| 1672 | attr_data { |
| 1673 | Name = .LOMEIN, |
| 1674 | VA= LOMEIN_DATA_VA, |
| 1675 | RA= MAIN_BASE_DATA_RA, |
| 1676 | PA= ra2pa2(MAIN_BASE_DATA_RA, 0), |
| 1677 | part_0_ctx_nonzero_tsb_config_3, |
| 1678 | part_0_ctx_zero_tsb_config_3 |
| 1679 | TTE_G=1, TTE_Context=0x55, TTE_V=1, TTE_Size=0, TTE_NFO=0, |
| 1680 | TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, |
| 1681 | TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=0, |
| 1682 | tsbonly |
| 1683 | } |
| 1684 | .text |
| 1685 | .align 0x100000 |
| 1686 | nop |
| 1687 | .data |
| 1688 | .word 0x0 |
| 1689 | |
| 1690 | SECTION .MAIN TEXT_VA=MAIN_BASE_TEXT_VA, DATA_VA=MAIN_BASE_DATA_VA |
| 1691 | attr_text { |
| 1692 | Name = .MAIN, |
| 1693 | VA=MAIN_BASE_TEXT_VA, |
| 1694 | RA= LOMEIN_TEXT_VA, |
| 1695 | PA= LOMEIN_TEXT_VA, |
| 1696 | part_0_ctx_nonzero_tsb_config_2, |
| 1697 | part_0_ctx_zero_tsb_config_2, |
| 1698 | TTE_G=1, TTE_Context=0x44, TTE_V=1, |
| 1699 | TTE_Size=0, TTE_NFO=0, TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, |
| 1700 | TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=1, |
| 1701 | } |
| 1702 | |
| 1703 | attr_data { |
| 1704 | Name = .MAIN, |
| 1705 | VA=MAIN_BASE_DATA_VA |
| 1706 | RA= LOMEIN_DATA_VA, |
| 1707 | PA= LOMEIN_DATA_VA, |
| 1708 | part_0_ctx_nonzero_tsb_config_1, |
| 1709 | part_0_ctx_zero_tsb_config_1 |
| 1710 | TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0, |
| 1711 | TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, |
| 1712 | TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=0, |
| 1713 | } |
| 1714 | |
| 1715 | attr_data { |
| 1716 | Name = .MAIN, |
| 1717 | VA=MAIN_BASE_DATA_VA |
| 1718 | RA= LOMEIN_DATA_VA, |
| 1719 | PA= LOMEIN_DATA_VA, |
| 1720 | part_0_ctx_nonzero_tsb_config_3, |
| 1721 | part_0_ctx_zero_tsb_config_3 |
| 1722 | TTE_G=1, TTE_Context=0x55, TTE_V=1, TTE_Size=0, TTE_NFO=0, |
| 1723 | TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, |
| 1724 | TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1, TTE_X=0, |
| 1725 | tsbonly |
| 1726 | } |
| 1727 | |
| 1728 | attr_text { |
| 1729 | Name = .MAIN, |
| 1730 | VA=MAIN_BASE_TEXT_VA, |
| 1731 | hypervisor |
| 1732 | } |
| 1733 | |
| 1734 | attr_data { |
| 1735 | Name = .MAIN, |
| 1736 | VA=MAIN_BASE_DATA_VA |
| 1737 | hypervisor |
| 1738 | } |
| 1739 | changequote(`,')dnl' |
| 1740 | |
| 1741 | .text |
| 1742 | .global main |
| 1743 | main: |
| 1744 | |
| 1745 | ! Set up ld/st area per thread |
| 1746 | ta T_CHANGE_HPRIV |
| 1747 | ldxa [%g0]0x63, %o2 |
| 1748 | and %o2, 0x7, %o1 |
| 1749 | brnz %o1, init_start |
| 1750 | mov 0xff, %r10 |
| 1751 | lock_sync_thds: |
| 1752 | set sync_thr_counter4, %r23 |
| 1753 | #ifndef SPC |
| 1754 | and %o2, 0x38, %o2 |
| 1755 | add %o2,%r23,%r23 !Core's sync counter |
| 1756 | #endif |
| 1757 | st %r10, [%r23] !lock sync_thr_counter4 |
| 1758 | add %r23, 64, %r23 |
| 1759 | st %r10, [%r23] !lock sync_thr_counter5 |
| 1760 | add %r23, 64, %r23 |
| 1761 | st %r10, [%r23] !lock sync_thr_counter6 |
| 1762 | init_start: |
| 1763 | ta T_CHANGE_NONHPRIV |
| 1764 | umul %r9, 256, %r31 |
| 1765 | setx user_data_start, %r1, %r3 |
| 1766 | add %r31, %r3, %r31 |
| 1767 | wr %r0, 0x4, %asi |
| 1768 | |
| 1769 | !Initializing integer registers |
| 1770 | ldx [%r31+0], %r0 |
| 1771 | ldx [%r31+8], %r1 |
| 1772 | ldx [%r31+16], %r2 |
| 1773 | ldx [%r31+24], %r3 |
| 1774 | ldx [%r31+32], %r4 |
| 1775 | ldx [%r31+40], %r5 |
| 1776 | ldx [%r31+48], %r6 |
| 1777 | ldx [%r31+56], %r7 |
| 1778 | ldx [%r31+64], %r8 |
| 1779 | ldx [%r31+72], %r9 |
| 1780 | ldx [%r31+80], %r10 |
| 1781 | ldx [%r31+88], %r11 |
| 1782 | ldx [%r31+96], %r12 |
| 1783 | ldx [%r31+104], %r13 |
| 1784 | ldx [%r31+112], %r14 |
| 1785 | mov %r31, %r15 |
| 1786 | ldx [%r31+128], %r16 |
| 1787 | ldx [%r31+136], %r17 |
| 1788 | ldx [%r31+144], %r18 |
| 1789 | ldx [%r31+152], %r19 |
| 1790 | ldx [%r31+160], %r20 |
| 1791 | ldx [%r31+168], %r21 |
| 1792 | ldx [%r31+176], %r22 |
| 1793 | ldx [%r31+184], %r23 |
| 1794 | ldx [%r31+192], %r24 |
| 1795 | ldx [%r31+200], %r25 |
| 1796 | ldx [%r31+208], %r26 |
| 1797 | ldx [%r31+216], %r27 |
| 1798 | ldx [%r31+224], %r28 |
| 1799 | ldx [%r31+232], %r29 |
| 1800 | mov 0x30, %r14 |
| 1801 | mov 0xb3, %r30 |
| 1802 | save %r31, %r0, %r31 |
| 1803 | ldx [%r31+0], %r0 |
| 1804 | ldx [%r31+8], %r1 |
| 1805 | ldx [%r31+16], %r2 |
| 1806 | ldx [%r31+24], %r3 |
| 1807 | ldx [%r31+32], %r4 |
| 1808 | ldx [%r31+40], %r5 |
| 1809 | ldx [%r31+48], %r6 |
| 1810 | ldx [%r31+56], %r7 |
| 1811 | ldx [%r31+64], %r8 |
| 1812 | ldx [%r31+72], %r9 |
| 1813 | ldx [%r31+80], %r10 |
| 1814 | ldx [%r31+88], %r11 |
| 1815 | ldx [%r31+96], %r12 |
| 1816 | ldx [%r31+104], %r13 |
| 1817 | ldx [%r31+112], %r14 |
| 1818 | mov %r31, %r15 |
| 1819 | ldx [%r31+128], %r16 |
| 1820 | ldx [%r31+136], %r17 |
| 1821 | ldx [%r31+144], %r18 |
| 1822 | ldx [%r31+152], %r19 |
| 1823 | ldx [%r31+160], %r20 |
| 1824 | ldx [%r31+168], %r21 |
| 1825 | ldx [%r31+176], %r22 |
| 1826 | ldx [%r31+184], %r23 |
| 1827 | ldx [%r31+192], %r24 |
| 1828 | ldx [%r31+200], %r25 |
| 1829 | ldx [%r31+208], %r26 |
| 1830 | ldx [%r31+216], %r27 |
| 1831 | ldx [%r31+224], %r28 |
| 1832 | ldx [%r31+232], %r29 |
| 1833 | mov 0xb2, %r14 |
| 1834 | mov 0x32, %r30 |
| 1835 | save %r31, %r0, %r31 |
| 1836 | ldx [%r31+0], %r0 |
| 1837 | ldx [%r31+8], %r1 |
| 1838 | ldx [%r31+16], %r2 |
| 1839 | ldx [%r31+24], %r3 |
| 1840 | ldx [%r31+32], %r4 |
| 1841 | ldx [%r31+40], %r5 |
| 1842 | ldx [%r31+48], %r6 |
| 1843 | ldx [%r31+56], %r7 |
| 1844 | ldx [%r31+64], %r8 |
| 1845 | ldx [%r31+72], %r9 |
| 1846 | ldx [%r31+80], %r10 |
| 1847 | ldx [%r31+88], %r11 |
| 1848 | ldx [%r31+96], %r12 |
| 1849 | ldx [%r31+104], %r13 |
| 1850 | ldx [%r31+112], %r14 |
| 1851 | mov %r31, %r15 |
| 1852 | ldx [%r31+128], %r16 |
| 1853 | ldx [%r31+136], %r17 |
| 1854 | ldx [%r31+144], %r18 |
| 1855 | ldx [%r31+152], %r19 |
| 1856 | ldx [%r31+160], %r20 |
| 1857 | ldx [%r31+168], %r21 |
| 1858 | ldx [%r31+176], %r22 |
| 1859 | ldx [%r31+184], %r23 |
| 1860 | ldx [%r31+192], %r24 |
| 1861 | ldx [%r31+200], %r25 |
| 1862 | ldx [%r31+208], %r26 |
| 1863 | ldx [%r31+216], %r27 |
| 1864 | ldx [%r31+224], %r28 |
| 1865 | ldx [%r31+232], %r29 |
| 1866 | mov 0x32, %r14 |
| 1867 | mov 0x33, %r30 |
| 1868 | save %r31, %r0, %r31 |
| 1869 | ldx [%r31+0], %r0 |
| 1870 | ldx [%r31+8], %r1 |
| 1871 | ldx [%r31+16], %r2 |
| 1872 | ldx [%r31+24], %r3 |
| 1873 | ldx [%r31+32], %r4 |
| 1874 | ldx [%r31+40], %r5 |
| 1875 | ldx [%r31+48], %r6 |
| 1876 | ldx [%r31+56], %r7 |
| 1877 | ldx [%r31+64], %r8 |
| 1878 | ldx [%r31+72], %r9 |
| 1879 | ldx [%r31+80], %r10 |
| 1880 | ldx [%r31+88], %r11 |
| 1881 | ldx [%r31+96], %r12 |
| 1882 | ldx [%r31+104], %r13 |
| 1883 | ldx [%r31+112], %r14 |
| 1884 | mov %r31, %r15 |
| 1885 | ldx [%r31+128], %r16 |
| 1886 | ldx [%r31+136], %r17 |
| 1887 | ldx [%r31+144], %r18 |
| 1888 | ldx [%r31+152], %r19 |
| 1889 | ldx [%r31+160], %r20 |
| 1890 | ldx [%r31+168], %r21 |
| 1891 | ldx [%r31+176], %r22 |
| 1892 | ldx [%r31+184], %r23 |
| 1893 | ldx [%r31+192], %r24 |
| 1894 | ldx [%r31+200], %r25 |
| 1895 | ldx [%r31+208], %r26 |
| 1896 | ldx [%r31+216], %r27 |
| 1897 | ldx [%r31+224], %r28 |
| 1898 | ldx [%r31+232], %r29 |
| 1899 | mov 0xb0, %r14 |
| 1900 | mov 0xb1, %r30 |
| 1901 | save %r31, %r0, %r31 |
| 1902 | ldx [%r31+0], %r0 |
| 1903 | ldx [%r31+8], %r1 |
| 1904 | ldx [%r31+16], %r2 |
| 1905 | ldx [%r31+24], %r3 |
| 1906 | ldx [%r31+32], %r4 |
| 1907 | ldx [%r31+40], %r5 |
| 1908 | ldx [%r31+48], %r6 |
| 1909 | ldx [%r31+56], %r7 |
| 1910 | ldx [%r31+64], %r8 |
| 1911 | ldx [%r31+72], %r9 |
| 1912 | ldx [%r31+80], %r10 |
| 1913 | ldx [%r31+88], %r11 |
| 1914 | ldx [%r31+96], %r12 |
| 1915 | ldx [%r31+104], %r13 |
| 1916 | ldx [%r31+112], %r14 |
| 1917 | mov %r31, %r15 |
| 1918 | ldx [%r31+128], %r16 |
| 1919 | ldx [%r31+136], %r17 |
| 1920 | ldx [%r31+144], %r18 |
| 1921 | ldx [%r31+152], %r19 |
| 1922 | ldx [%r31+160], %r20 |
| 1923 | ldx [%r31+168], %r21 |
| 1924 | ldx [%r31+176], %r22 |
| 1925 | ldx [%r31+184], %r23 |
| 1926 | ldx [%r31+192], %r24 |
| 1927 | ldx [%r31+200], %r25 |
| 1928 | ldx [%r31+208], %r26 |
| 1929 | ldx [%r31+216], %r27 |
| 1930 | ldx [%r31+224], %r28 |
| 1931 | ldx [%r31+232], %r29 |
| 1932 | mov 0xb0, %r14 |
| 1933 | mov 0xb5, %r30 |
| 1934 | save %r31, %r0, %r31 |
| 1935 | ldx [%r31+0], %r0 |
| 1936 | ldx [%r31+8], %r1 |
| 1937 | ldx [%r31+16], %r2 |
| 1938 | ldx [%r31+24], %r3 |
| 1939 | ldx [%r31+32], %r4 |
| 1940 | ldx [%r31+40], %r5 |
| 1941 | ldx [%r31+48], %r6 |
| 1942 | ldx [%r31+56], %r7 |
| 1943 | ldx [%r31+64], %r8 |
| 1944 | ldx [%r31+72], %r9 |
| 1945 | ldx [%r31+80], %r10 |
| 1946 | ldx [%r31+88], %r11 |
| 1947 | ldx [%r31+96], %r12 |
| 1948 | ldx [%r31+104], %r13 |
| 1949 | ldx [%r31+112], %r14 |
| 1950 | mov %r31, %r15 |
| 1951 | ldx [%r31+128], %r16 |
| 1952 | ldx [%r31+136], %r17 |
| 1953 | ldx [%r31+144], %r18 |
| 1954 | ldx [%r31+152], %r19 |
| 1955 | ldx [%r31+160], %r20 |
| 1956 | ldx [%r31+168], %r21 |
| 1957 | ldx [%r31+176], %r22 |
| 1958 | ldx [%r31+184], %r23 |
| 1959 | ldx [%r31+192], %r24 |
| 1960 | ldx [%r31+200], %r25 |
| 1961 | ldx [%r31+208], %r26 |
| 1962 | ldx [%r31+216], %r27 |
| 1963 | ldx [%r31+224], %r28 |
| 1964 | ldx [%r31+232], %r29 |
| 1965 | mov 0x35, %r14 |
| 1966 | mov 0xb2, %r30 |
| 1967 | save %r31, %r0, %r31 |
| 1968 | ldx [%r31+0], %r0 |
| 1969 | ldx [%r31+8], %r1 |
| 1970 | ldx [%r31+16], %r2 |
| 1971 | ldx [%r31+24], %r3 |
| 1972 | ldx [%r31+32], %r4 |
| 1973 | ldx [%r31+40], %r5 |
| 1974 | ldx [%r31+48], %r6 |
| 1975 | ldx [%r31+56], %r7 |
| 1976 | ldx [%r31+64], %r8 |
| 1977 | ldx [%r31+72], %r9 |
| 1978 | ldx [%r31+80], %r10 |
| 1979 | ldx [%r31+88], %r11 |
| 1980 | ldx [%r31+96], %r12 |
| 1981 | ldx [%r31+104], %r13 |
| 1982 | ldx [%r31+112], %r14 |
| 1983 | mov %r31, %r15 |
| 1984 | ldx [%r31+128], %r16 |
| 1985 | ldx [%r31+136], %r17 |
| 1986 | ldx [%r31+144], %r18 |
| 1987 | ldx [%r31+152], %r19 |
| 1988 | ldx [%r31+160], %r20 |
| 1989 | ldx [%r31+168], %r21 |
| 1990 | ldx [%r31+176], %r22 |
| 1991 | ldx [%r31+184], %r23 |
| 1992 | ldx [%r31+192], %r24 |
| 1993 | ldx [%r31+200], %r25 |
| 1994 | ldx [%r31+208], %r26 |
| 1995 | ldx [%r31+216], %r27 |
| 1996 | ldx [%r31+224], %r28 |
| 1997 | ldx [%r31+232], %r29 |
| 1998 | mov 0x31, %r14 |
| 1999 | mov 0xb3, %r30 |
| 2000 | save %r31, %r0, %r31 |
| 2001 | restore |
| 2002 | restore |
| 2003 | restore |
| 2004 | !Initializing float registers |
| 2005 | ldd [%r31+0], %f0 |
| 2006 | ldd [%r31+16], %f2 |
| 2007 | ldd [%r31+32], %f4 |
| 2008 | ldd [%r31+48], %f6 |
| 2009 | ldd [%r31+64], %f8 |
| 2010 | ldd [%r31+80], %f10 |
| 2011 | ldd [%r31+96], %f12 |
| 2012 | ldd [%r31+112], %f14 |
| 2013 | ldd [%r31+128], %f16 |
| 2014 | ldd [%r31+144], %f18 |
| 2015 | ldd [%r31+160], %f20 |
| 2016 | ldd [%r31+176], %f22 |
| 2017 | ldd [%r31+192], %f24 |
| 2018 | ldd [%r31+208], %f26 |
| 2019 | ldd [%r31+224], %f28 |
| 2020 | ldd [%r31+240], %f30 |
| 2021 | !! Set TPC/TNPC to diag-finish in case we get to a strange TL .. |
| 2022 | ta T_CHANGE_HPRIV |
| 2023 | setx diag_finish, %r29, %r28 |
| 2024 | add %r28, 4, %r29 |
| 2025 | wrpr %g0, 1, %tl |
| 2026 | wrpr %r28, %tpc |
| 2027 | wrpr %r29, %tnpc |
| 2028 | wrpr %g0, 2, %tl |
| 2029 | wrpr %r28, %tpc |
| 2030 | wrpr %r29, %tnpc |
| 2031 | wrpr %g0, 3, %tl |
| 2032 | wrpr %r28, %tpc |
| 2033 | wrpr %r29, %tnpc |
| 2034 | wrpr %g0, 4, %tl |
| 2035 | wrpr %r28, %tpc |
| 2036 | wrpr %r29, %tnpc |
| 2037 | wrpr %g0, 5, %tl |
| 2038 | wrpr %r28, %tpc |
| 2039 | wrpr %r29, %tnpc |
| 2040 | wrpr %g0, 6, %tl |
| 2041 | wrpr %r28, %tpc |
| 2042 | wrpr %r29, %tnpc |
| 2043 | wrpr %g0, 0, %tl |
| 2044 | |
| 2045 | !Initializing Tick Cmprs |
| 2046 | mov 1, %g2 |
| 2047 | sllx %g2, 63, %g2 |
| 2048 | or %g1, %g2, %g1 |
| 2049 | wrhpr %g1, %g0, %hsys_tick_cmpr |
| 2050 | wr %g1, %g0, %tick_cmpr |
| 2051 | wr %g1, %g0, %sys_tick_cmpr |
| 2052 | |
| 2053 | ! Set up fpr PMU traps |
| 2054 | set 0x1ff8bfff, %g2 |
| 2055 | b fork_threads |
| 2056 | wr %g2, %g0, %pcr |
| 2057 | |
| 2058 | common_target: |
| 2059 | nop |
| 2060 | sub %r27, 8, %r27 |
| 2061 | and %r27, 8, %r12 |
| 2062 | brz,a %r12, .+8 |
| 2063 | lduw [%r27], %r12 ! load jmp dest into dcache - xinval |
| 2064 | jmp %r27 |
| 2065 | .word 0xc30fc000 ! 1: LDXFSR_R ld-fsr [%r31, %r0], %f1 |
| 2066 | nop |
| 2067 | jmp %r27 |
| 2068 | nop |
| 2069 | fork_threads: |
| 2070 | ta %icc, T_RD_THID |
| 2071 | ! fork: source strm = 0xffffffff; target strm = 0x1 |
| 2072 | cmp %o1, 0 |
| 2073 | setx fork_lbl_0_1, %g2, %g3 |
| 2074 | be,a .+8 |
| 2075 | jmp %g3 |
| 2076 | nop |
| 2077 | ! fork: source strm = 0xffffffff; target strm = 0x2 |
| 2078 | cmp %o1, 1 |
| 2079 | setx fork_lbl_0_2, %g2, %g3 |
| 2080 | be,a .+8 |
| 2081 | jmp %g3 |
| 2082 | nop |
| 2083 | ! fork: source strm = 0xffffffff; target strm = 0x4 |
| 2084 | cmp %o1, 2 |
| 2085 | setx fork_lbl_0_3, %g2, %g3 |
| 2086 | be,a .+8 |
| 2087 | jmp %g3 |
| 2088 | nop |
| 2089 | ! fork: source strm = 0xffffffff; target strm = 0x8 |
| 2090 | cmp %o1, 3 |
| 2091 | setx fork_lbl_0_4, %g2, %g3 |
| 2092 | be,a .+8 |
| 2093 | jmp %g3 |
| 2094 | nop |
| 2095 | ! fork: source strm = 0xffffffff; target strm = 0x10 |
| 2096 | cmp %o1, 4 |
| 2097 | setx fork_lbl_0_5, %g2, %g3 |
| 2098 | be,a .+8 |
| 2099 | jmp %g3 |
| 2100 | nop |
| 2101 | ! fork: source strm = 0xffffffff; target strm = 0x20 |
| 2102 | cmp %o1, 5 |
| 2103 | setx fork_lbl_0_6, %g2, %g3 |
| 2104 | be,a .+8 |
| 2105 | jmp %g3 |
| 2106 | nop |
| 2107 | ! fork: source strm = 0xffffffff; target strm = 0x40 |
| 2108 | cmp %o1, 6 |
| 2109 | setx fork_lbl_0_7, %g2, %g3 |
| 2110 | be,a .+8 |
| 2111 | jmp %g3 |
| 2112 | nop |
| 2113 | ! fork: source strm = 0xffffffff; target strm = 0x80 |
| 2114 | cmp %o1, 7 |
| 2115 | setx fork_lbl_0_8, %g2, %g3 |
| 2116 | be,a .+8 |
| 2117 | jmp %g3 |
| 2118 | nop |
| 2119 | setx join_lbl_0_0, %g1, %g2 |
| 2120 | jmp %g2 |
| 2121 | nop |
| 2122 | setx join_lbl_0_0, %g1, %g2 |
| 2123 | jmp %g2 |
| 2124 | nop |
| 2125 | fork_lbl_0_8: |
| 2126 | rd %asi, %r12 |
| 2127 | #ifdef XIR_RND_CORES |
| 2128 | setup_xir_80: |
| 2129 | setx 0x52e6604d1aca1d3a, %r1, %r28 |
| 2130 | mov 0x30, %r17 |
| 2131 | stxa %r28, [%r17] 0x41 |
| 2132 | #endif |
| 2133 | setup_spu_80: |
| 2134 | wr %g0, 0x40, %asi |
| 2135 | !# allocate control word queue (e.g., setup head/tail/first/last registers) |
| 2136 | set CWQ_BASE, %l6 |
| 2137 | |
| 2138 | #ifndef SPC |
| 2139 | ldxa [%g0]0x63, %o2 |
| 2140 | and %o2, 0x38, %o2 |
| 2141 | sllx %o2, 5, %o2 !(CID*256) |
| 2142 | add %l6, %o2, %l6 |
| 2143 | #endif |
| 2144 | # 780 "diag.j" |
| 2145 | !# write base addr to first, head, and tail ptr |
| 2146 | !# first store to first |
| 2147 | stxa %l6, [%g0 + ASI_SPU_CWQ_FIRST] %asi !# first store to first |
| 2148 | |
| 2149 | stxa %l6, [%g0 + ASI_SPU_CWQ_HEAD] %asi !# then to head |
| 2150 | stxa %l6, [%g0 + ASI_SPU_CWQ_TAIL] %asi !# then to tail |
| 2151 | setx CWQ_LAST, %g1, %l5 !# then end of CWQ region to LAST |
| 2152 | #ifndef SPC |
| 2153 | add %l5, %o2, %l5 |
| 2154 | #endif |
| 2155 | stxa %l5, [%g0 + ASI_SPU_CWQ_LAST] %asi |
| 2156 | |
| 2157 | !# set CWQ control word ([38:36] is strand ID ..) |
| 2158 | best_set_reg(0x20610000, %l1, %l2) !# Control Word |
| 2159 | sllx %l2, 32, %l2 |
| 2160 | |
| 2161 | !# write CWQ entry (%l6 points to CWQ) |
| 2162 | stx %l2, [%l6 + 0x0] |
| 2163 | |
| 2164 | setx msg, %g1, %l2 |
| 2165 | stx %l2, [%l6 + 0x8] !# source address |
| 2166 | |
| 2167 | stx %g0, [%l6 + 0x10] !# Authentication Key Address (40-bit) |
| 2168 | stx %g0, [%l6 + 0x18] !# Authentication IV Address (40-bit) |
| 2169 | stx %g0, [%l6 + 0x20] !# Authentication FSAS Address (40-bit) |
| 2170 | stx %g0, [%l6 + 0x28] !# Encryption Key Address (40-bit) |
| 2171 | stx %g0, [%l6 + 0x30] !# Encryption Initialization Vector Address (40-bit) |
| 2172 | |
| 2173 | setx results, %g1, %o3 |
| 2174 | stx %o3, [%l6 + 0x38] !# Destination Address (40-bit) |
| 2175 | |
| 2176 | membar #Sync |
| 2177 | |
| 2178 | ldxa [%g0 + ASI_SPU_CWQ_TAIL] %asi, %l2 |
| 2179 | add %l2, 0x40, %l2 |
| 2180 | stxa %l2, [%g0 + ASI_SPU_CWQ_TAIL] %asi |
| 2181 | |
| 2182 | !# Kick off the CWQ operation by writing to the CWQ_CSR |
| 2183 | !# Set the enabled bit and reset the other bits |
| 2184 | or %g0, 0x1, %g1 |
| 2185 | stxa %g1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 2186 | |
| 2187 | unlock_sync_thds_80: |
| 2188 | set sync_thr_counter6, %r23 |
| 2189 | #ifndef SPC |
| 2190 | ldxa [%g0]0x63, %o2 |
| 2191 | and %o2, 0x38, %o2 |
| 2192 | add %o2, %r23, %r23 |
| 2193 | #endif |
| 2194 | st %r0, [%r23] !unlock sync_thr_counter6 |
| 2195 | sub %r23, 64, %r23 |
| 2196 | st %r0, [%r23] !unlock sync_thr_counter5 |
| 2197 | sub %r23, 64, %r23 |
| 2198 | st %r0, [%r23] !unlock sync_thr_counter4 |
| 2199 | |
| 2200 | wr %r0, %r12, %asi |
| 2201 | ta T_CHANGE_NONHPRIV |
| 2202 | setx vahole_target1, %r18, %r27 |
| 2203 | cwp_80_1: |
| 2204 | set user_data_start, %o7 |
| 2205 | .word 0x93902007 ! 1: WRPR_CWP_I wrpr %r0, 0x0007, %cwp |
| 2206 | pmu_80_2: |
| 2207 | nop |
| 2208 | ta T_CHANGE_PRIV |
| 2209 | setx 0xfffff2d1fffff922, %g1, %g7 |
| 2210 | .word 0xa3800007 ! 2: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 2211 | .word 0xd337c000 ! 3: STQF_R - %f9, [%r0, %r31] |
| 2212 | fpinit_80_3: |
| 2213 | nop |
| 2214 | setx fp_data_quads, %r19, %r20 |
| 2215 | ldd [%r20], %f0 |
| 2216 | ldd [%r20+8], %f4 |
| 2217 | ld [%r20+16], %fsr |
| 2218 | ld [%r20+24], %r19 |
| 2219 | wr %r19, %g0, %gsr |
| 2220 | .word 0x89a009a4 ! 4: FDIVs fdivs %f0, %f4, %f4 |
| 2221 | .word 0x8d802004 ! 5: WRFPRS_I wr %r0, 0x0004, %fprs |
| 2222 | .word 0x2ac98001 ! 1: BRNZ brnz,a,pt %r6,<label_0x98001> |
| 2223 | .word 0x8d9021db ! 6: WRPR_PSTATE_I wrpr %r0, 0x01db, %pstate |
| 2224 | brcommon1_80_5: |
| 2225 | nop |
| 2226 | setx common_target, %r12, %r27 |
| 2227 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 2228 | ba,a .+12 |
| 2229 | .word 0x93a7c9d4 ! 1: FDIVd fdivd %f62, %f20, %f40 |
| 2230 | ba,a .+8 |
| 2231 | jmpl %r27+0, %r27 |
| 2232 | .word 0x87aa0a42 ! 7: FCMPd fcmpd %fcc<n>, %f8, %f2 |
| 2233 | .word 0xe277e132 ! 8: STX_I stx %r17, [%r31 + 0x0132] |
| 2234 | ibp_80_6: |
| 2235 | nop |
| 2236 | ta T_CHANGE_HPRIV |
| 2237 | mov 8, %r18 |
| 2238 | rd %asi, %r12 |
| 2239 | wr %r0, 0x41, %asi |
| 2240 | set sync_thr_counter4, %r23 |
| 2241 | #ifndef SPC |
| 2242 | ldxa [%g0]0x63, %r8 |
| 2243 | and %r8, 0x38, %r8 ! Core ID |
| 2244 | add %r8, %r23, %r23 |
| 2245 | #else |
| 2246 | mov 0, %r8 |
| 2247 | #endif |
| 2248 | mov 0x80, %r16 |
| 2249 | ibp_startwait80_6: |
| 2250 | cas [%r23],%g0,%r16 !lock |
| 2251 | brz,a %r16, continue_ibp_80_6 |
| 2252 | mov (~0x80&0xf0), %r16 |
| 2253 | ld [%r23], %r16 |
| 2254 | ibp_wait80_6: |
| 2255 | brnz %r16, ibp_wait80_6 |
| 2256 | ld [%r23], %r16 |
| 2257 | ba ibp_startwait80_6 |
| 2258 | mov 0x80, %r16 |
| 2259 | continue_ibp_80_6: |
| 2260 | sllx %r16, %r8, %r16 !Mask for my core only |
| 2261 | ldxa [0x58]%asi, %r17 !Running_status |
| 2262 | wait_for_stat_80_6: |
| 2263 | ldxa [0x50]%asi, %r13 !Running_rw |
| 2264 | cmp %r13, %r17 |
| 2265 | bne,a %xcc, wait_for_stat_80_6 |
| 2266 | ldxa [0x58]%asi, %r17 !Running_status |
| 2267 | stxa %r16, [0x68]%asi !Park (W1C) |
| 2268 | ldxa [0x50]%asi, %r14 !Running_rw |
| 2269 | wait_for_ibp_80_6: |
| 2270 | ldxa [0x58]%asi, %r17 !Running_status |
| 2271 | cmp %r14, %r17 |
| 2272 | bne,a %xcc, wait_for_ibp_80_6 |
| 2273 | ldxa [0x50]%asi, %r14 !Running_rw |
| 2274 | ibp_doit80_6: |
| 2275 | best_set_reg(0x00000040cfc000ff,%r19, %r20) |
| 2276 | stxa %r20, [%r18]0x42 |
| 2277 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 2278 | st %g0, [%r23] !clear lock |
| 2279 | wr %r0, %r12, %asi !restore %asi |
| 2280 | .word 0xc32fc00a ! 9: STXFSR_R st-sfr %f1, [%r10, %r31] |
| 2281 | .word 0xa7520000 ! 10: RDPR_PIL rdpr %pil, %r19 |
| 2282 | .word 0x3f400001 ! 1: FBPO fbo,a,pn %fcc0, <label_0x1> |
| 2283 | .word 0x8d903a8c ! 11: WRPR_PSTATE_I wrpr %r0, 0x1a8c, %pstate |
| 2284 | .word 0xe537c000 ! 12: STQF_R - %f18, [%r0, %r31] |
| 2285 | .word 0xe48008a0 ! 13: LDUWA_R lduwa [%r0, %r0] 0x45, %r18 |
| 2286 | .word 0xa3520000 ! 14: RDPR_PIL rdpr %pil, %r17 |
| 2287 | mondo_80_8: |
| 2288 | nop |
| 2289 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 2290 | ta T_CHANGE_PRIV |
| 2291 | stxa %r9, [%r0+0x3e0] %asi |
| 2292 | .word 0x9d91c011 ! 15: WRPR_WSTATE_R wrpr %r7, %r17, %wstate |
| 2293 | jmptr_80_9: |
| 2294 | nop |
| 2295 | best_set_reg(0xe0a00000, %r20, %r27) |
| 2296 | .word 0xb7c6c000 ! 16: JMPL_R jmpl %r27 + %r0, %r27 |
| 2297 | #if (defined SPC || defined CMP1) |
| 2298 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_10) + 48, 16, 16)) -> intp(4,0,2) |
| 2299 | #else |
| 2300 | setx 0x157abb89b85d6f66, %r1, %r28 |
| 2301 | stxa %r28, [%g0] 0x73 |
| 2302 | #endif |
| 2303 | intvec_80_10: |
| 2304 | .word 0x39400001 ! 17: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 2305 | nop |
| 2306 | ta T_CHANGE_HPRIV ! macro |
| 2307 | donret_80_11: |
| 2308 | rd %pc, %r12 |
| 2309 | add %r12, (donretarg_80_11-donret_80_11+4), %r12 |
| 2310 | add %r12, 0x4, %r11 ! seq tnpc |
| 2311 | wrpr %g0, 0x2, %tl |
| 2312 | wrpr %g0, %r12, %tpc |
| 2313 | wrpr %g0, %r11, %tnpc |
| 2314 | set (0x00b3a800 | (22 << 24)), %r13 |
| 2315 | and %r12, 0xfff, %r14 |
| 2316 | sllx %r14, 30, %r14 |
| 2317 | or %r13, %r14, %r20 |
| 2318 | wrpr %r20, %g0, %tstate |
| 2319 | wrhpr %g0, 0x1d15, %htstate |
| 2320 | ta T_CHANGE_NONPRIV ! rand=0 (80) |
| 2321 | .word 0x3a800001 ! 1: BCC bcc,a <label_0x1> |
| 2322 | done |
| 2323 | donretarg_80_11: |
| 2324 | .word 0xd8ffe138 ! 18: SWAPA_I swapa %r12, [%r31 + 0x0138] %asi |
| 2325 | splash_hpstate_80_12: |
| 2326 | .word 0x81983087 ! 19: WRHPR_HPSTATE_I wrhpr %r0, 0x1087, %hpstate |
| 2327 | .word 0xab82c002 ! 20: WR_CLEAR_SOFTINT_R wr %r11, %r2, %clear_softint |
| 2328 | splash_cmpr_80_13: |
| 2329 | mov 0, %r18 |
| 2330 | sllx %r18, 63, %r18 |
| 2331 | rd %tick, %r17 |
| 2332 | add %r17, 0x80, %r17 |
| 2333 | or %r17, %r18, %r17 |
| 2334 | ta T_CHANGE_HPRIV |
| 2335 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 2336 | ta T_CHANGE_PRIV |
| 2337 | .word 0xaf800011 ! 21: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 2338 | trapasi_80_14: |
| 2339 | nop |
| 2340 | mov 0x28, %r1 ! (VA for ASI 0x4c) |
| 2341 | .word 0xd8c84980 ! 22: LDSBA_R ldsba [%r1, %r0] 0x4c, %r12 |
| 2342 | .word 0xd8c7e090 ! 23: LDSWA_I ldswa [%r31, + 0x0090] %asi, %r12 |
| 2343 | .word 0x8d9036c1 ! 24: WRPR_PSTATE_I wrpr %r0, 0x16c1, %pstate |
| 2344 | nop |
| 2345 | ta T_CHANGE_HPRIV |
| 2346 | mov 0x80, %r10 |
| 2347 | set sync_thr_counter6, %r23 |
| 2348 | #ifndef SPC |
| 2349 | ldxa [%g0]0x63, %o1 |
| 2350 | and %o1, 0x38, %o1 |
| 2351 | add %o1, %r23, %r23 |
| 2352 | #endif |
| 2353 | cas [%r23],%g0,%r10 !lock |
| 2354 | brnz %r10, sma_80_16 |
| 2355 | rd %asi, %r12 |
| 2356 | wr %g0, 0x40, %asi |
| 2357 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 2358 | set 0x001a1fff, %g1 |
| 2359 | stxa %g1, [%g0 + 0x80] %asi |
| 2360 | wr %r12, %g0, %asi |
| 2361 | st %g0, [%r23] |
| 2362 | sma_80_16: |
| 2363 | ta T_CHANGE_NONHPRIV |
| 2364 | .word 0xd9e7e014 ! 25: CASA_R casa [%r31] %asi, %r20, %r12 |
| 2365 | brcommon3_80_17: |
| 2366 | nop |
| 2367 | setx common_target, %r12, %r27 |
| 2368 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 2369 | ba,a .+12 |
| 2370 | .word 0xd937c010 ! 1: STQF_R - %f12, [%r16, %r31] |
| 2371 | ba,a .+8 |
| 2372 | jmpl %r27+0, %r27 |
| 2373 | .word 0xd83fe140 ! 26: STD_I std %r12, [%r31 + 0x0140] |
| 2374 | trapasi_80_18: |
| 2375 | nop |
| 2376 | mov 0x0, %r1 ! (VA for ASI 0x73) |
| 2377 | .word 0xd8904e60 ! 27: LDUHA_R lduha [%r1, %r0] 0x73, %r12 |
| 2378 | ceter_80_19: |
| 2379 | nop |
| 2380 | ta T_CHANGE_HPRIV |
| 2381 | mov 7, %r17 |
| 2382 | sllx %r17, 60, %r17 |
| 2383 | mov 0x18, %r16 |
| 2384 | stxa %r17, [%r16]0x4c |
| 2385 | ta T_CHANGE_NONHPRIV |
| 2386 | .word 0x95410000 ! 28: RDTICK rd %tick, %r10 |
| 2387 | splash_cmpr_80_20: |
| 2388 | mov 1, %r18 |
| 2389 | sllx %r18, 63, %r18 |
| 2390 | rd %tick, %r17 |
| 2391 | add %r17, 0x70, %r17 |
| 2392 | or %r17, %r18, %r17 |
| 2393 | ta T_CHANGE_HPRIV |
| 2394 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 2395 | ta T_CHANGE_PRIV |
| 2396 | .word 0xb3800011 ! 29: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 2397 | memptr_80_21: |
| 2398 | set user_data_start, %r31 |
| 2399 | .word 0x8582210d ! 30: WRCCR_I wr %r8, 0x010d, %ccr |
| 2400 | .word 0xa680c014 ! 31: ADDcc_R addcc %r3, %r20, %r19 |
| 2401 | .word 0xe1bfe1c0 ! 32: STDFA_I stda %f16, [0x01c0, %r31] |
| 2402 | set 0x3c48, %l3 |
| 2403 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT |
| 2404 | .word 0xa7b447c1 ! 33: PDIST pdistn %d48, %d32, %d50 |
| 2405 | brcommon3_80_22: |
| 2406 | nop |
| 2407 | setx common_target, %r12, %r27 |
| 2408 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 2409 | ba,a .+12 |
| 2410 | .word 0xdb37e0f0 ! 1: STQF_I - %f13, [0x00f0, %r31] |
| 2411 | ba,a .+8 |
| 2412 | jmpl %r27+0, %r27 |
| 2413 | .word 0xdb1fc013 ! 34: LDDF_R ldd [%r31, %r19], %f13 |
| 2414 | .word 0xdac7e098 ! 35: LDSWA_I ldswa [%r31, + 0x0098] %asi, %r13 |
| 2415 | ibp_80_23: |
| 2416 | nop |
| 2417 | ta T_CHANGE_HPRIV |
| 2418 | mov 8, %r18 |
| 2419 | rd %asi, %r12 |
| 2420 | wr %r0, 0x41, %asi |
| 2421 | set sync_thr_counter4, %r23 |
| 2422 | #ifndef SPC |
| 2423 | ldxa [%g0]0x63, %r8 |
| 2424 | and %r8, 0x38, %r8 ! Core ID |
| 2425 | add %r8, %r23, %r23 |
| 2426 | #else |
| 2427 | mov 0, %r8 |
| 2428 | #endif |
| 2429 | mov 0x80, %r16 |
| 2430 | ibp_startwait80_23: |
| 2431 | cas [%r23],%g0,%r16 !lock |
| 2432 | brz,a %r16, continue_ibp_80_23 |
| 2433 | mov (~0x80&0xf0), %r16 |
| 2434 | ld [%r23], %r16 |
| 2435 | ibp_wait80_23: |
| 2436 | brnz %r16, ibp_wait80_23 |
| 2437 | ld [%r23], %r16 |
| 2438 | ba ibp_startwait80_23 |
| 2439 | mov 0x80, %r16 |
| 2440 | continue_ibp_80_23: |
| 2441 | sllx %r16, %r8, %r16 !Mask for my core only |
| 2442 | ldxa [0x58]%asi, %r17 !Running_status |
| 2443 | wait_for_stat_80_23: |
| 2444 | ldxa [0x50]%asi, %r13 !Running_rw |
| 2445 | cmp %r13, %r17 |
| 2446 | bne,a %xcc, wait_for_stat_80_23 |
| 2447 | ldxa [0x58]%asi, %r17 !Running_status |
| 2448 | stxa %r16, [0x68]%asi !Park (W1C) |
| 2449 | ldxa [0x50]%asi, %r14 !Running_rw |
| 2450 | wait_for_ibp_80_23: |
| 2451 | ldxa [0x58]%asi, %r17 !Running_status |
| 2452 | cmp %r14, %r17 |
| 2453 | bne,a %xcc, wait_for_ibp_80_23 |
| 2454 | ldxa [0x50]%asi, %r14 !Running_rw |
| 2455 | ibp_doit80_23: |
| 2456 | best_set_reg(0x000000402dc0ff8c,%r19, %r20) |
| 2457 | stxa %r20, [%r18]0x42 |
| 2458 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 2459 | st %g0, [%r23] !clear lock |
| 2460 | wr %r0, %r12, %asi !restore %asi |
| 2461 | ta T_CHANGE_NONHPRIV |
| 2462 | .word 0xe19fe1a0 ! 36: LDDFA_I ldda [%r31, 0x01a0], %f16 |
| 2463 | .word 0x8d802004 ! 37: WRFPRS_I wr %r0, 0x0004, %fprs |
| 2464 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 2465 | reduce_priv_lvl_80_24: |
| 2466 | ta T_CHANGE_NONPRIV ! macro |
| 2467 | trapasi_80_25: |
| 2468 | nop |
| 2469 | mov 0x18, %r1 ! (VA for ASI 0x50) |
| 2470 | .word 0xda884a00 ! 39: LDUBA_R lduba [%r1, %r0] 0x50, %r13 |
| 2471 | brcommon1_80_26: |
| 2472 | nop |
| 2473 | setx common_target, %r12, %r27 |
| 2474 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 2475 | ba,a .+12 |
| 2476 | .word 0xc32fe030 ! 1: STXFSR_I st-sfr %f1, [0x0030, %r31] |
| 2477 | ba,a .+8 |
| 2478 | jmpl %r27+0, %r27 |
| 2479 | .word 0xa3702ead ! 40: POPC_I popc 0x0ead, %r17 |
| 2480 | ibp_80_27: |
| 2481 | nop |
| 2482 | ta T_CHANGE_HPRIV |
| 2483 | mov 8, %r18 |
| 2484 | rd %asi, %r12 |
| 2485 | wr %r0, 0x41, %asi |
| 2486 | set sync_thr_counter4, %r23 |
| 2487 | #ifndef SPC |
| 2488 | ldxa [%g0]0x63, %r8 |
| 2489 | and %r8, 0x38, %r8 ! Core ID |
| 2490 | add %r8, %r23, %r23 |
| 2491 | #else |
| 2492 | mov 0, %r8 |
| 2493 | #endif |
| 2494 | mov 0x80, %r16 |
| 2495 | ibp_startwait80_27: |
| 2496 | cas [%r23],%g0,%r16 !lock |
| 2497 | brz,a %r16, continue_ibp_80_27 |
| 2498 | mov (~0x80&0xf0), %r16 |
| 2499 | ld [%r23], %r16 |
| 2500 | ibp_wait80_27: |
| 2501 | brnz %r16, ibp_wait80_27 |
| 2502 | ld [%r23], %r16 |
| 2503 | ba ibp_startwait80_27 |
| 2504 | mov 0x80, %r16 |
| 2505 | continue_ibp_80_27: |
| 2506 | sllx %r16, %r8, %r16 !Mask for my core only |
| 2507 | ldxa [0x58]%asi, %r17 !Running_status |
| 2508 | wait_for_stat_80_27: |
| 2509 | ldxa [0x50]%asi, %r13 !Running_rw |
| 2510 | cmp %r13, %r17 |
| 2511 | bne,a %xcc, wait_for_stat_80_27 |
| 2512 | ldxa [0x58]%asi, %r17 !Running_status |
| 2513 | stxa %r16, [0x68]%asi !Park (W1C) |
| 2514 | ldxa [0x50]%asi, %r14 !Running_rw |
| 2515 | wait_for_ibp_80_27: |
| 2516 | ldxa [0x58]%asi, %r17 !Running_status |
| 2517 | cmp %r14, %r17 |
| 2518 | bne,a %xcc, wait_for_ibp_80_27 |
| 2519 | ldxa [0x50]%asi, %r14 !Running_rw |
| 2520 | ibp_doit80_27: |
| 2521 | best_set_reg(0x0000004092ff8cb0,%r19, %r20) |
| 2522 | stxa %r20, [%r18]0x42 |
| 2523 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 2524 | st %g0, [%r23] !clear lock |
| 2525 | wr %r0, %r12, %asi !restore %asi |
| 2526 | .word 0xd4bfc02a ! 41: STDA_R stda %r10, [%r31 + %r10] 0x01 |
| 2527 | .word 0xa5a000d4 ! 42: FNEGd fnegd %f20, %f18 |
| 2528 | nop |
| 2529 | ta T_CHANGE_HPRIV |
| 2530 | mov 0x80+1, %r10 |
| 2531 | set sync_thr_counter5, %r23 |
| 2532 | #ifndef SPC |
| 2533 | ldxa [%g0]0x63, %o1 |
| 2534 | and %o1, 0x38, %o1 |
| 2535 | add %o1, %r23, %r23 |
| 2536 | sllx %o1, 5, %o3 !(CID*256) |
| 2537 | #endif |
| 2538 | cas [%r23],%g0,%r10 !lock |
| 2539 | brnz %r10, cwq_80_28 |
| 2540 | rd %asi, %r12 |
| 2541 | wr %g0, 0x40, %asi |
| 2542 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 2543 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 2544 | cmp %l1, 1 |
| 2545 | bne cwq_80_28 |
| 2546 | set CWQ_BASE, %l6 |
| 2547 | #ifndef SPC |
| 2548 | add %l6, %o3, %l6 |
| 2549 | #endif |
| 2550 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 2551 | best_set_reg(0x206100e0, %l1, %l2) !# Control Word |
| 2552 | sllx %l2, 32, %l2 |
| 2553 | stx %l2, [%l6 + 0x0] |
| 2554 | membar #Sync |
| 2555 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 2556 | sub %l2, 0x40, %l2 |
| 2557 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 2558 | wr %r12, %g0, %asi |
| 2559 | st %g0, [%r23] |
| 2560 | cwq_80_28: |
| 2561 | ta T_CHANGE_NONHPRIV |
| 2562 | .word 0xa9414000 ! 43: RDPC rd %pc, %r20 |
| 2563 | splash_htba_80_29: |
| 2564 | nop |
| 2565 | ta T_CHANGE_HPRIV |
| 2566 | setx 0x00000000002a0000, %r11, %r12 |
| 2567 | .word 0x8b98000c ! 44: WRHPR_HTBA_R wrhpr %r0, %r12, %htba |
| 2568 | #if (defined SPC || defined CMP1) |
| 2569 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_30) + 16, 16, 16)) -> intp(4,0,27) |
| 2570 | #else |
| 2571 | setx 0x0771889a420d4910, %r1, %r28 |
| 2572 | stxa %r28, [%g0] 0x73 |
| 2573 | #endif |
| 2574 | intvec_80_30: |
| 2575 | .word 0x39400001 ! 45: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 2576 | .word 0x37400001 ! 1: FBPGE fbge,a,pn %fcc0, <label_0x1> |
| 2577 | .word 0x8d90310b ! 46: WRPR_PSTATE_I wrpr %r0, 0x110b, %pstate |
| 2578 | ibp_80_32: |
| 2579 | nop |
| 2580 | ta T_CHANGE_HPRIV |
| 2581 | mov 8, %r18 |
| 2582 | rd %asi, %r12 |
| 2583 | wr %r0, 0x41, %asi |
| 2584 | set sync_thr_counter4, %r23 |
| 2585 | #ifndef SPC |
| 2586 | ldxa [%g0]0x63, %r8 |
| 2587 | and %r8, 0x38, %r8 ! Core ID |
| 2588 | add %r8, %r23, %r23 |
| 2589 | #else |
| 2590 | mov 0, %r8 |
| 2591 | #endif |
| 2592 | mov 0x80, %r16 |
| 2593 | ibp_startwait80_32: |
| 2594 | cas [%r23],%g0,%r16 !lock |
| 2595 | brz,a %r16, continue_ibp_80_32 |
| 2596 | mov (~0x80&0xf0), %r16 |
| 2597 | ld [%r23], %r16 |
| 2598 | ibp_wait80_32: |
| 2599 | brnz %r16, ibp_wait80_32 |
| 2600 | ld [%r23], %r16 |
| 2601 | ba ibp_startwait80_32 |
| 2602 | mov 0x80, %r16 |
| 2603 | continue_ibp_80_32: |
| 2604 | sllx %r16, %r8, %r16 !Mask for my core only |
| 2605 | ldxa [0x58]%asi, %r17 !Running_status |
| 2606 | wait_for_stat_80_32: |
| 2607 | ldxa [0x50]%asi, %r13 !Running_rw |
| 2608 | cmp %r13, %r17 |
| 2609 | bne,a %xcc, wait_for_stat_80_32 |
| 2610 | ldxa [0x58]%asi, %r17 !Running_status |
| 2611 | stxa %r16, [0x68]%asi !Park (W1C) |
| 2612 | ldxa [0x50]%asi, %r14 !Running_rw |
| 2613 | wait_for_ibp_80_32: |
| 2614 | ldxa [0x58]%asi, %r17 !Running_status |
| 2615 | cmp %r14, %r17 |
| 2616 | bne,a %xcc, wait_for_ibp_80_32 |
| 2617 | ldxa [0x50]%asi, %r14 !Running_rw |
| 2618 | ibp_doit80_32: |
| 2619 | best_set_reg(0x00000050b1ccb0f5,%r19, %r20) |
| 2620 | stxa %r20, [%r18]0x42 |
| 2621 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 2622 | st %g0, [%r23] !clear lock |
| 2623 | wr %r0, %r12, %asi !restore %asi |
| 2624 | .word 0xc19fe180 ! 47: LDDFA_I ldda [%r31, 0x0180], %f0 |
| 2625 | .word 0xe537c000 ! 48: STQF_R - %f18, [%r0, %r31] |
| 2626 | ibp_80_33: |
| 2627 | nop |
| 2628 | ta T_CHANGE_HPRIV |
| 2629 | mov 8, %r18 |
| 2630 | rd %asi, %r12 |
| 2631 | wr %r0, 0x41, %asi |
| 2632 | set sync_thr_counter4, %r23 |
| 2633 | #ifndef SPC |
| 2634 | ldxa [%g0]0x63, %r8 |
| 2635 | and %r8, 0x38, %r8 ! Core ID |
| 2636 | add %r8, %r23, %r23 |
| 2637 | #else |
| 2638 | mov 0, %r8 |
| 2639 | #endif |
| 2640 | mov 0x80, %r16 |
| 2641 | ibp_startwait80_33: |
| 2642 | cas [%r23],%g0,%r16 !lock |
| 2643 | brz,a %r16, continue_ibp_80_33 |
| 2644 | mov (~0x80&0xf0), %r16 |
| 2645 | ld [%r23], %r16 |
| 2646 | ibp_wait80_33: |
| 2647 | brnz %r16, ibp_wait80_33 |
| 2648 | ld [%r23], %r16 |
| 2649 | ba ibp_startwait80_33 |
| 2650 | mov 0x80, %r16 |
| 2651 | continue_ibp_80_33: |
| 2652 | sllx %r16, %r8, %r16 !Mask for my core only |
| 2653 | ldxa [0x58]%asi, %r17 !Running_status |
| 2654 | wait_for_stat_80_33: |
| 2655 | ldxa [0x50]%asi, %r13 !Running_rw |
| 2656 | cmp %r13, %r17 |
| 2657 | bne,a %xcc, wait_for_stat_80_33 |
| 2658 | ldxa [0x58]%asi, %r17 !Running_status |
| 2659 | stxa %r16, [0x68]%asi !Park (W1C) |
| 2660 | ldxa [0x50]%asi, %r14 !Running_rw |
| 2661 | wait_for_ibp_80_33: |
| 2662 | ldxa [0x58]%asi, %r17 !Running_status |
| 2663 | cmp %r14, %r17 |
| 2664 | bne,a %xcc, wait_for_ibp_80_33 |
| 2665 | ldxa [0x50]%asi, %r14 !Running_rw |
| 2666 | ibp_doit80_33: |
| 2667 | best_set_reg(0x00000050b2f0f5d1,%r19, %r20) |
| 2668 | stxa %r20, [%r18]0x42 |
| 2669 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 2670 | st %g0, [%r23] !clear lock |
| 2671 | wr %r0, %r12, %asi !restore %asi |
| 2672 | ta T_CHANGE_NONHPRIV |
| 2673 | .word 0xe1bfe020 ! 49: STDFA_I stda %f16, [0x0020, %r31] |
| 2674 | ibp_80_34: |
| 2675 | nop |
| 2676 | ta T_CHANGE_HPRIV |
| 2677 | mov 8, %r18 |
| 2678 | rd %asi, %r12 |
| 2679 | wr %r0, 0x41, %asi |
| 2680 | set sync_thr_counter4, %r23 |
| 2681 | #ifndef SPC |
| 2682 | ldxa [%g0]0x63, %r8 |
| 2683 | and %r8, 0x38, %r8 ! Core ID |
| 2684 | add %r8, %r23, %r23 |
| 2685 | #else |
| 2686 | mov 0, %r8 |
| 2687 | #endif |
| 2688 | mov 0x80, %r16 |
| 2689 | ibp_startwait80_34: |
| 2690 | cas [%r23],%g0,%r16 !lock |
| 2691 | brz,a %r16, continue_ibp_80_34 |
| 2692 | mov (~0x80&0xf0), %r16 |
| 2693 | ld [%r23], %r16 |
| 2694 | ibp_wait80_34: |
| 2695 | brnz %r16, ibp_wait80_34 |
| 2696 | ld [%r23], %r16 |
| 2697 | ba ibp_startwait80_34 |
| 2698 | mov 0x80, %r16 |
| 2699 | continue_ibp_80_34: |
| 2700 | sllx %r16, %r8, %r16 !Mask for my core only |
| 2701 | ldxa [0x58]%asi, %r17 !Running_status |
| 2702 | wait_for_stat_80_34: |
| 2703 | ldxa [0x50]%asi, %r13 !Running_rw |
| 2704 | cmp %r13, %r17 |
| 2705 | bne,a %xcc, wait_for_stat_80_34 |
| 2706 | ldxa [0x58]%asi, %r17 !Running_status |
| 2707 | stxa %r16, [0x68]%asi !Park (W1C) |
| 2708 | ldxa [0x50]%asi, %r14 !Running_rw |
| 2709 | wait_for_ibp_80_34: |
| 2710 | ldxa [0x58]%asi, %r17 !Running_status |
| 2711 | cmp %r14, %r17 |
| 2712 | bne,a %xcc, wait_for_ibp_80_34 |
| 2713 | ldxa [0x50]%asi, %r14 !Running_rw |
| 2714 | ibp_doit80_34: |
| 2715 | best_set_reg(0x00000050e2f5d186,%r19, %r20) |
| 2716 | stxa %r20, [%r18]0x42 |
| 2717 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 2718 | st %g0, [%r23] !clear lock |
| 2719 | wr %r0, %r12, %asi !restore %asi |
| 2720 | ta T_CHANGE_NONHPRIV |
| 2721 | .word 0xa97033aa ! 50: POPC_I popc 0x13aa, %r20 |
| 2722 | .word 0x8d9024fb ! 51: WRPR_PSTATE_I wrpr %r0, 0x04fb, %pstate |
| 2723 | .word 0xe24fc000 ! 52: LDSB_R ldsb [%r31 + %r0], %r17 |
| 2724 | .word 0xe2c7e120 ! 53: LDSWA_I ldswa [%r31, + 0x0120] %asi, %r17 |
| 2725 | .word 0xe33fe1d3 ! 54: STDF_I std %f17, [0x01d3, %r31] |
| 2726 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 2727 | reduce_priv_lvl_80_36: |
| 2728 | ta T_CHANGE_NONHPRIV ! macro |
| 2729 | intveclr_80_37: |
| 2730 | nop |
| 2731 | ta T_CHANGE_HPRIV |
| 2732 | setx 0x387be15a56093e21, %r1, %r28 |
| 2733 | stxa %r28, [%g0] 0x72 |
| 2734 | .word 0x25400001 ! 56: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 2735 | ibp_80_38: |
| 2736 | nop |
| 2737 | ta T_CHANGE_HPRIV |
| 2738 | mov 8, %r18 |
| 2739 | rd %asi, %r12 |
| 2740 | wr %r0, 0x41, %asi |
| 2741 | set sync_thr_counter4, %r23 |
| 2742 | #ifndef SPC |
| 2743 | ldxa [%g0]0x63, %r8 |
| 2744 | and %r8, 0x38, %r8 ! Core ID |
| 2745 | add %r8, %r23, %r23 |
| 2746 | #else |
| 2747 | mov 0, %r8 |
| 2748 | #endif |
| 2749 | mov 0x80, %r16 |
| 2750 | ibp_startwait80_38: |
| 2751 | cas [%r23],%g0,%r16 !lock |
| 2752 | brz,a %r16, continue_ibp_80_38 |
| 2753 | mov (~0x80&0xf0), %r16 |
| 2754 | ld [%r23], %r16 |
| 2755 | ibp_wait80_38: |
| 2756 | brnz %r16, ibp_wait80_38 |
| 2757 | ld [%r23], %r16 |
| 2758 | ba ibp_startwait80_38 |
| 2759 | mov 0x80, %r16 |
| 2760 | continue_ibp_80_38: |
| 2761 | sllx %r16, %r8, %r16 !Mask for my core only |
| 2762 | ldxa [0x58]%asi, %r17 !Running_status |
| 2763 | wait_for_stat_80_38: |
| 2764 | ldxa [0x50]%asi, %r13 !Running_rw |
| 2765 | cmp %r13, %r17 |
| 2766 | bne,a %xcc, wait_for_stat_80_38 |
| 2767 | ldxa [0x58]%asi, %r17 !Running_status |
| 2768 | stxa %r16, [0x68]%asi !Park (W1C) |
| 2769 | ldxa [0x50]%asi, %r14 !Running_rw |
| 2770 | wait_for_ibp_80_38: |
| 2771 | ldxa [0x58]%asi, %r17 !Running_status |
| 2772 | cmp %r14, %r17 |
| 2773 | bne,a %xcc, wait_for_ibp_80_38 |
| 2774 | ldxa [0x50]%asi, %r14 !Running_rw |
| 2775 | ibp_doit80_38: |
| 2776 | best_set_reg(0x00000040c1d186b6,%r19, %r20) |
| 2777 | stxa %r20, [%r18]0x42 |
| 2778 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 2779 | st %g0, [%r23] !clear lock |
| 2780 | wr %r0, %r12, %asi !restore %asi |
| 2781 | ta T_CHANGE_NONHPRIV |
| 2782 | .word 0xe29fc029 ! 57: LDDA_R ldda [%r31, %r9] 0x01, %r17 |
| 2783 | .word 0xa5524000 ! 58: RDPR_CWP rdpr %cwp, %r18 |
| 2784 | ibp_80_39: |
| 2785 | nop |
| 2786 | ta T_CHANGE_HPRIV |
| 2787 | mov 8, %r18 |
| 2788 | rd %asi, %r12 |
| 2789 | wr %r0, 0x41, %asi |
| 2790 | set sync_thr_counter4, %r23 |
| 2791 | #ifndef SPC |
| 2792 | ldxa [%g0]0x63, %r8 |
| 2793 | and %r8, 0x38, %r8 ! Core ID |
| 2794 | add %r8, %r23, %r23 |
| 2795 | #else |
| 2796 | mov 0, %r8 |
| 2797 | #endif |
| 2798 | mov 0x80, %r16 |
| 2799 | ibp_startwait80_39: |
| 2800 | cas [%r23],%g0,%r16 !lock |
| 2801 | brz,a %r16, continue_ibp_80_39 |
| 2802 | mov (~0x80&0xf0), %r16 |
| 2803 | ld [%r23], %r16 |
| 2804 | ibp_wait80_39: |
| 2805 | brnz %r16, ibp_wait80_39 |
| 2806 | ld [%r23], %r16 |
| 2807 | ba ibp_startwait80_39 |
| 2808 | mov 0x80, %r16 |
| 2809 | continue_ibp_80_39: |
| 2810 | sllx %r16, %r8, %r16 !Mask for my core only |
| 2811 | ldxa [0x58]%asi, %r17 !Running_status |
| 2812 | wait_for_stat_80_39: |
| 2813 | ldxa [0x50]%asi, %r13 !Running_rw |
| 2814 | cmp %r13, %r17 |
| 2815 | bne,a %xcc, wait_for_stat_80_39 |
| 2816 | ldxa [0x58]%asi, %r17 !Running_status |
| 2817 | stxa %r16, [0x68]%asi !Park (W1C) |
| 2818 | ldxa [0x50]%asi, %r14 !Running_rw |
| 2819 | wait_for_ibp_80_39: |
| 2820 | ldxa [0x58]%asi, %r17 !Running_status |
| 2821 | cmp %r14, %r17 |
| 2822 | bne,a %xcc, wait_for_ibp_80_39 |
| 2823 | ldxa [0x50]%asi, %r14 !Running_rw |
| 2824 | ibp_doit80_39: |
| 2825 | best_set_reg(0x0000004006c6b636,%r19, %r20) |
| 2826 | stxa %r20, [%r18]0x42 |
| 2827 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 2828 | st %g0, [%r23] !clear lock |
| 2829 | wr %r0, %r12, %asi !restore %asi |
| 2830 | ta T_CHANGE_NONHPRIV |
| 2831 | .word 0xe1bfe040 ! 59: STDFA_I stda %f16, [0x0040, %r31] |
| 2832 | mondo_80_40: |
| 2833 | nop |
| 2834 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 2835 | stxa %r17, [%r0+0x3c8] %asi |
| 2836 | .word 0x9d90c012 ! 60: WRPR_WSTATE_R wrpr %r3, %r18, %wstate |
| 2837 | ibp_80_41: |
| 2838 | nop |
| 2839 | ta T_CHANGE_HPRIV |
| 2840 | mov 8, %r18 |
| 2841 | rd %asi, %r12 |
| 2842 | wr %r0, 0x41, %asi |
| 2843 | set sync_thr_counter4, %r23 |
| 2844 | #ifndef SPC |
| 2845 | ldxa [%g0]0x63, %r8 |
| 2846 | and %r8, 0x38, %r8 ! Core ID |
| 2847 | add %r8, %r23, %r23 |
| 2848 | #else |
| 2849 | mov 0, %r8 |
| 2850 | #endif |
| 2851 | mov 0x80, %r16 |
| 2852 | ibp_startwait80_41: |
| 2853 | cas [%r23],%g0,%r16 !lock |
| 2854 | brz,a %r16, continue_ibp_80_41 |
| 2855 | mov (~0x80&0xf0), %r16 |
| 2856 | ld [%r23], %r16 |
| 2857 | ibp_wait80_41: |
| 2858 | brnz %r16, ibp_wait80_41 |
| 2859 | ld [%r23], %r16 |
| 2860 | ba ibp_startwait80_41 |
| 2861 | mov 0x80, %r16 |
| 2862 | continue_ibp_80_41: |
| 2863 | sllx %r16, %r8, %r16 !Mask for my core only |
| 2864 | ldxa [0x58]%asi, %r17 !Running_status |
| 2865 | wait_for_stat_80_41: |
| 2866 | ldxa [0x50]%asi, %r13 !Running_rw |
| 2867 | cmp %r13, %r17 |
| 2868 | bne,a %xcc, wait_for_stat_80_41 |
| 2869 | ldxa [0x58]%asi, %r17 !Running_status |
| 2870 | stxa %r16, [0x68]%asi !Park (W1C) |
| 2871 | ldxa [0x50]%asi, %r14 !Running_rw |
| 2872 | wait_for_ibp_80_41: |
| 2873 | ldxa [0x58]%asi, %r17 !Running_status |
| 2874 | cmp %r14, %r17 |
| 2875 | bne,a %xcc, wait_for_ibp_80_41 |
| 2876 | ldxa [0x50]%asi, %r14 !Running_rw |
| 2877 | ibp_doit80_41: |
| 2878 | best_set_reg(0x000000408af636f8,%r19, %r20) |
| 2879 | stxa %r20, [%r18]0x42 |
| 2880 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 2881 | st %g0, [%r23] !clear lock |
| 2882 | wr %r0, %r12, %asi !restore %asi |
| 2883 | .word 0xc19fd920 ! 61: LDDFA_R ldda [%r31, %r0], %f0 |
| 2884 | .word 0xe8dfe0c8 ! 62: LDXA_I ldxa [%r31, + 0x00c8] %asi, %r20 |
| 2885 | .word 0x879a4012 ! 63: WRHPR_HINTP_R wrhpr %r9, %r18, %hintp |
| 2886 | #if (defined SPC || defined CMP1) |
| 2887 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_42) + 32, 16, 16)) -> intp(6,0,31) |
| 2888 | #else |
| 2889 | setx 0x6e1ec3fb60b5b7ac, %r1, %r28 |
| 2890 | stxa %r28, [%g0] 0x73 |
| 2891 | #endif |
| 2892 | intvec_80_42: |
| 2893 | .word 0x39400001 ! 64: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 2894 | .word 0xc1bfe000 ! 65: STDFA_I stda %f0, [0x0000, %r31] |
| 2895 | ibp_80_44: |
| 2896 | nop |
| 2897 | ta T_CHANGE_HPRIV |
| 2898 | mov 8, %r18 |
| 2899 | rd %asi, %r12 |
| 2900 | wr %r0, 0x41, %asi |
| 2901 | set sync_thr_counter4, %r23 |
| 2902 | #ifndef SPC |
| 2903 | ldxa [%g0]0x63, %r8 |
| 2904 | and %r8, 0x38, %r8 ! Core ID |
| 2905 | add %r8, %r23, %r23 |
| 2906 | #else |
| 2907 | mov 0, %r8 |
| 2908 | #endif |
| 2909 | mov 0x80, %r16 |
| 2910 | ibp_startwait80_44: |
| 2911 | cas [%r23],%g0,%r16 !lock |
| 2912 | brz,a %r16, continue_ibp_80_44 |
| 2913 | mov (~0x80&0xf0), %r16 |
| 2914 | ld [%r23], %r16 |
| 2915 | ibp_wait80_44: |
| 2916 | brnz %r16, ibp_wait80_44 |
| 2917 | ld [%r23], %r16 |
| 2918 | ba ibp_startwait80_44 |
| 2919 | mov 0x80, %r16 |
| 2920 | continue_ibp_80_44: |
| 2921 | sllx %r16, %r8, %r16 !Mask for my core only |
| 2922 | ldxa [0x58]%asi, %r17 !Running_status |
| 2923 | wait_for_stat_80_44: |
| 2924 | ldxa [0x50]%asi, %r13 !Running_rw |
| 2925 | cmp %r13, %r17 |
| 2926 | bne,a %xcc, wait_for_stat_80_44 |
| 2927 | ldxa [0x58]%asi, %r17 !Running_status |
| 2928 | stxa %r16, [0x68]%asi !Park (W1C) |
| 2929 | ldxa [0x50]%asi, %r14 !Running_rw |
| 2930 | wait_for_ibp_80_44: |
| 2931 | ldxa [0x58]%asi, %r17 !Running_status |
| 2932 | cmp %r14, %r17 |
| 2933 | bne,a %xcc, wait_for_ibp_80_44 |
| 2934 | ldxa [0x50]%asi, %r14 !Running_rw |
| 2935 | ibp_doit80_44: |
| 2936 | best_set_reg(0x0000004034f6f8cf,%r19, %r20) |
| 2937 | stxa %r20, [%r18]0x42 |
| 2938 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 2939 | st %g0, [%r23] !clear lock |
| 2940 | wr %r0, %r12, %asi !restore %asi |
| 2941 | .word 0xe19fd920 ! 66: LDDFA_R ldda [%r31, %r0], %f16 |
| 2942 | ibp_80_45: |
| 2943 | nop |
| 2944 | ta T_CHANGE_HPRIV |
| 2945 | mov 8, %r18 |
| 2946 | rd %asi, %r12 |
| 2947 | wr %r0, 0x41, %asi |
| 2948 | set sync_thr_counter4, %r23 |
| 2949 | #ifndef SPC |
| 2950 | ldxa [%g0]0x63, %r8 |
| 2951 | and %r8, 0x38, %r8 ! Core ID |
| 2952 | add %r8, %r23, %r23 |
| 2953 | #else |
| 2954 | mov 0, %r8 |
| 2955 | #endif |
| 2956 | mov 0x80, %r16 |
| 2957 | ibp_startwait80_45: |
| 2958 | cas [%r23],%g0,%r16 !lock |
| 2959 | brz,a %r16, continue_ibp_80_45 |
| 2960 | mov (~0x80&0xf0), %r16 |
| 2961 | ld [%r23], %r16 |
| 2962 | ibp_wait80_45: |
| 2963 | brnz %r16, ibp_wait80_45 |
| 2964 | ld [%r23], %r16 |
| 2965 | ba ibp_startwait80_45 |
| 2966 | mov 0x80, %r16 |
| 2967 | continue_ibp_80_45: |
| 2968 | sllx %r16, %r8, %r16 !Mask for my core only |
| 2969 | ldxa [0x58]%asi, %r17 !Running_status |
| 2970 | wait_for_stat_80_45: |
| 2971 | ldxa [0x50]%asi, %r13 !Running_rw |
| 2972 | cmp %r13, %r17 |
| 2973 | bne,a %xcc, wait_for_stat_80_45 |
| 2974 | ldxa [0x58]%asi, %r17 !Running_status |
| 2975 | stxa %r16, [0x68]%asi !Park (W1C) |
| 2976 | ldxa [0x50]%asi, %r14 !Running_rw |
| 2977 | wait_for_ibp_80_45: |
| 2978 | ldxa [0x58]%asi, %r17 !Running_status |
| 2979 | cmp %r14, %r17 |
| 2980 | bne,a %xcc, wait_for_ibp_80_45 |
| 2981 | ldxa [0x50]%asi, %r14 !Running_rw |
| 2982 | ibp_doit80_45: |
| 2983 | best_set_reg(0x000000401af8cf95,%r19, %r20) |
| 2984 | stxa %r20, [%r18]0x42 |
| 2985 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 2986 | st %g0, [%r23] !clear lock |
| 2987 | wr %r0, %r12, %asi !restore %asi |
| 2988 | .word 0xe91fc010 ! 67: LDDF_R ldd [%r31, %r16], %f20 |
| 2989 | .word 0xe927e04a ! 68: STF_I st %f20, [0x004a, %r31] |
| 2990 | mondo_80_46: |
| 2991 | nop |
| 2992 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 2993 | ta T_CHANGE_PRIV |
| 2994 | stxa %r9, [%r0+0x3d8] %asi |
| 2995 | .word 0x9d940003 ! 69: WRPR_WSTATE_R wrpr %r16, %r3, %wstate |
| 2996 | .word 0xb1840010 ! 70: WR_STICK_REG_R wr %r16, %r16, %- |
| 2997 | br_badelay3_80_47: |
| 2998 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> |
| 2999 | .word 0x20800001 ! 1: BN bn,a <label_0x1> |
| 3000 | .word 0xe3150012 ! 1: LDQF_R - [%r20, %r18], %f17 |
| 3001 | .word 0xa9a50822 ! 71: FADDs fadds %f20, %f2, %f20 |
| 3002 | fpinit_80_48: |
| 3003 | nop |
| 3004 | setx fp_data_quads, %r19, %r20 |
| 3005 | ldd [%r20], %f0 |
| 3006 | ldd [%r20+8], %f4 |
| 3007 | ld [%r20+16], %fsr |
| 3008 | ld [%r20+24], %r19 |
| 3009 | wr %r19, %g0, %gsr |
| 3010 | .word 0xc3e833aa ! 72: PREFETCHA_I prefetcha [%r0, + 0xfffff3aa] %asi, #one_read |
| 3011 | brcommon2_80_49: |
| 3012 | nop |
| 3013 | setx common_target, %r12, %r27 |
| 3014 | ba,a .+12 |
| 3015 | .word 0x95a0c9c4 ! 1: FDIVd fdivd %f34, %f4, %f10 |
| 3016 | ba,a .+8 |
| 3017 | jmpl %r27+0, %r27 |
| 3018 | .word 0xe1bfe040 ! 73: STDFA_I stda %f16, [0x0040, %r31] |
| 3019 | #if (defined SPC || defined CMP1) |
| 3020 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_50) + 24, 16, 16)) -> intp(4,0,26) |
| 3021 | #else |
| 3022 | setx 0x2fee9a703faba29e, %r1, %r28 |
| 3023 | stxa %r28, [%g0] 0x73 |
| 3024 | #endif |
| 3025 | intvec_80_50: |
| 3026 | .word 0x39400001 ! 74: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 3027 | .word 0xc32fc000 ! 75: STXFSR_R st-sfr %f1, [%r0, %r31] |
| 3028 | intveclr_80_51: |
| 3029 | nop |
| 3030 | ta T_CHANGE_HPRIV |
| 3031 | setx 0x2ab92c738c339a7d, %r1, %r28 |
| 3032 | stxa %r28, [%g0] 0x72 |
| 3033 | ta T_CHANGE_NONHPRIV |
| 3034 | .word 0x25400001 ! 76: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 3035 | brcommon3_80_52: |
| 3036 | nop |
| 3037 | setx common_target, %r12, %r27 |
| 3038 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 3039 | ba,a .+12 |
| 3040 | .word 0xdb37e140 ! 1: STQF_I - %f13, [0x0140, %r31] |
| 3041 | ba,a .+8 |
| 3042 | jmpl %r27+0, %r27 |
| 3043 | .word 0xda97c031 ! 77: LDUHA_R lduha [%r31, %r17] 0x01, %r13 |
| 3044 | .word 0xa980c012 ! 78: WR_SET_SOFTINT_R wr %r3, %r18, %set_softint |
| 3045 | .word 0x3f400001 ! 1: FBPO fbo,a,pn %fcc0, <label_0x1> |
| 3046 | .word 0x8d9036e7 ! 79: WRPR_PSTATE_I wrpr %r0, 0x16e7, %pstate |
| 3047 | splash_lsu_80_54: |
| 3048 | nop |
| 3049 | ta T_CHANGE_HPRIV |
| 3050 | set 0x2db5a6a8, %r2 |
| 3051 | mov 0x6, %r1 |
| 3052 | sllx %r1, 32, %r1 |
| 3053 | or %r1, %r2, %r2 |
| 3054 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 3055 | ta T_CHANGE_NONHPRIV |
| 3056 | .word 0x3d400001 ! 80: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 3057 | splash_lsu_80_55: |
| 3058 | nop |
| 3059 | ta T_CHANGE_HPRIV |
| 3060 | set 0xcd973459, %r2 |
| 3061 | mov 0x6, %r1 |
| 3062 | sllx %r1, 32, %r1 |
| 3063 | or %r1, %r2, %r2 |
| 3064 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 3065 | .word 0x3d400001 ! 81: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 3066 | nop |
| 3067 | ta T_CHANGE_HPRIV ! macro |
| 3068 | donret_80_56: |
| 3069 | rd %pc, %r12 |
| 3070 | add %r12, (donretarg_80_56-donret_80_56+4), %r12 |
| 3071 | add %r12, 0x4, %r11 ! seq tnpc |
| 3072 | wrpr %g0, 0x2, %tl |
| 3073 | wrpr %g0, %r12, %tpc |
| 3074 | wrpr %g0, %r11, %tnpc |
| 3075 | set (0x008a8900 | (0x83 << 24)), %r13 |
| 3076 | and %r12, 0xfff, %r14 |
| 3077 | sllx %r14, 30, %r14 |
| 3078 | or %r13, %r14, %r20 |
| 3079 | wrpr %r20, %g0, %tstate |
| 3080 | wrhpr %g0, 0x1b0d, %htstate |
| 3081 | ta T_CHANGE_NONHPRIV ! rand=1 (80) |
| 3082 | retry |
| 3083 | donretarg_80_56: |
| 3084 | .word 0x95a489d1 ! 82: FDIVd fdivd %f18, %f48, %f10 |
| 3085 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 3086 | reduce_priv_lvl_80_57: |
| 3087 | ta T_CHANGE_NONHPRIV ! macro |
| 3088 | dvapa_80_58: |
| 3089 | nop |
| 3090 | ta T_CHANGE_HPRIV |
| 3091 | mov 0x895, %r20 |
| 3092 | mov 0x1c, %r19 |
| 3093 | sllx %r20, 23, %r20 |
| 3094 | or %r19, %r20, %r19 |
| 3095 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 3096 | mov 0x38, %r18 |
| 3097 | stxa %r31, [%r18]0x58 |
| 3098 | ta T_CHANGE_NONHPRIV |
| 3099 | .word 0x87ac0a50 ! 84: FCMPd fcmpd %fcc<n>, %f16, %f16 |
| 3100 | nop |
| 3101 | ta T_CHANGE_HPRIV ! macro |
| 3102 | donret_80_59: |
| 3103 | rd %pc, %r12 |
| 3104 | add %r12, (donretarg_80_59-donret_80_59), %r12 |
| 3105 | add %r12, 0x8, %r11 ! nonseq tnpc |
| 3106 | wrpr %g0, 0x1, %tl |
| 3107 | wrpr %g0, %r12, %tpc |
| 3108 | wrpr %g0, %r11, %tnpc |
| 3109 | set (0x009c7400 | (0x8a << 24)), %r13 |
| 3110 | and %r12, 0xfff, %r14 |
| 3111 | sllx %r14, 30, %r14 |
| 3112 | or %r13, %r14, %r20 |
| 3113 | wrpr %r20, %g0, %tstate |
| 3114 | wrhpr %g0, 0xade, %htstate |
| 3115 | ta T_CHANGE_NONPRIV ! rand=0 (80) |
| 3116 | .word 0x30800001 ! 1: BA ba,a <label_0x1> |
| 3117 | done |
| 3118 | donretarg_80_59: |
| 3119 | .word 0xd86fe1ef ! 85: LDSTUB_I ldstub %r12, [%r31 + 0x01ef] |
| 3120 | trapasi_80_60: |
| 3121 | nop |
| 3122 | mov 0x20, %r1 ! (VA for ASI 0x5b) |
| 3123 | .word 0xd8d84b60 ! 86: LDXA_R ldxa [%r1, %r0] 0x5b, %r12 |
| 3124 | otherw |
| 3125 | mov 0x30, %r30 |
| 3126 | .word 0x91d0001e ! 87: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 3127 | pmu_80_61: |
| 3128 | nop |
| 3129 | setx 0xfffff512fffffd38, %g1, %g7 |
| 3130 | .word 0xa3800007 ! 88: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 3131 | splash_tick_80_62: |
| 3132 | nop |
| 3133 | ta T_CHANGE_HPRIV |
| 3134 | best_set_reg(0x421a84e4679d924c, %r16, %r17) |
| 3135 | .word 0x89800011 ! 89: WRTICK_R wr %r0, %r17, %tick |
| 3136 | dvapa_80_63: |
| 3137 | nop |
| 3138 | ta T_CHANGE_HPRIV |
| 3139 | mov 0x978, %r20 |
| 3140 | mov 0x7, %r19 |
| 3141 | sllx %r20, 23, %r20 |
| 3142 | or %r19, %r20, %r19 |
| 3143 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 3144 | mov 0x38, %r18 |
| 3145 | stxa %r31, [%r18]0x58 |
| 3146 | ta T_CHANGE_NONHPRIV |
| 3147 | .word 0xc32fc011 ! 90: STXFSR_R st-sfr %f1, [%r17, %r31] |
| 3148 | .word 0xd857e068 ! 91: LDSH_I ldsh [%r31 + 0x0068], %r12 |
| 3149 | .word 0xb1804012 ! 92: WR_STICK_REG_R wr %r1, %r18, %- |
| 3150 | .word 0xd89fd160 ! 93: LDDA_R ldda [%r31, %r0] 0x8b, %r12 |
| 3151 | splash_hpstate_80_64: |
| 3152 | .word 0x3e800001 ! 1: BVC bvc,a <label_0x1> |
| 3153 | .word 0x81983f83 ! 94: WRHPR_HPSTATE_I wrhpr %r0, 0x1f83, %hpstate |
| 3154 | .word 0xc30fc000 ! 95: LDXFSR_R ld-fsr [%r31, %r0], %f1 |
| 3155 | brcommon1_80_65: |
| 3156 | nop |
| 3157 | setx common_target, %r12, %r27 |
| 3158 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 3159 | ba,a .+12 |
| 3160 | .word 0x997020f0 ! 1: POPC_I popc 0x00f0, %r12 |
| 3161 | ba,a .+8 |
| 3162 | jmpl %r27+0, %r27 |
| 3163 | .word 0xa570299b ! 96: POPC_I popc 0x099b, %r18 |
| 3164 | .word 0x9f802f75 ! 97: SIR sir 0x0f75 |
| 3165 | intveclr_80_66: |
| 3166 | nop |
| 3167 | ta T_CHANGE_HPRIV |
| 3168 | setx 0xc4971271beda8e17, %r1, %r28 |
| 3169 | stxa %r28, [%g0] 0x72 |
| 3170 | ta T_CHANGE_NONHPRIV |
| 3171 | .word 0x25400001 ! 98: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 3172 | splash_tick_80_67: |
| 3173 | nop |
| 3174 | ta T_CHANGE_HPRIV |
| 3175 | best_set_reg(0x77a8cfe1faa92574, %r16, %r17) |
| 3176 | .word 0x89800011 ! 99: WRTICK_R wr %r0, %r17, %tick |
| 3177 | splash_tba_80_68: |
| 3178 | nop |
| 3179 | ta T_CHANGE_PRIV |
| 3180 | set 0x120000, %r12 |
| 3181 | .word 0x8b90000c ! 100: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 3182 | brcommon1_80_69: |
| 3183 | nop |
| 3184 | setx common_target, %r12, %r27 |
| 3185 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 3186 | ba,a .+12 |
| 3187 | .word 0xd06fe1a0 ! 1: LDSTUB_I ldstub %r8, [%r31 + 0x01a0] |
| 3188 | ba,a .+8 |
| 3189 | jmpl %r27+0, %r27 |
| 3190 | .word 0x9f802382 ! 101: SIR sir 0x0382 |
| 3191 | intveclr_80_70: |
| 3192 | nop |
| 3193 | ta T_CHANGE_HPRIV |
| 3194 | setx 0xa5f107d2953d68ee, %r1, %r28 |
| 3195 | stxa %r28, [%g0] 0x72 |
| 3196 | .word 0x25400001 ! 102: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 3197 | setx 0x76cf13486332d5c7, %r1, %r28 |
| 3198 | stxa %r28, [%g0] 0x73 |
| 3199 | intvec_80_71: |
| 3200 | .word 0x39400001 ! 103: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 3201 | nop |
| 3202 | ta T_CHANGE_HPRIV ! macro |
| 3203 | donret_80_72: |
| 3204 | rd %pc, %r12 |
| 3205 | add %r12, (donretarg_80_72-donret_80_72), %r12 |
| 3206 | add %r12, 0x8, %r11 ! nonseq tnpc |
| 3207 | wrpr %g0, 0x1, %tl |
| 3208 | wrpr %g0, %r12, %tpc |
| 3209 | wrpr %g0, %r11, %tnpc |
| 3210 | set (0x003da300 | (0x55 << 24)), %r13 |
| 3211 | and %r12, 0xfff, %r14 |
| 3212 | sllx %r14, 30, %r14 |
| 3213 | or %r13, %r14, %r20 |
| 3214 | wrpr %r20, %g0, %tstate |
| 3215 | wrhpr %g0, 0x1d07, %htstate |
| 3216 | ta T_CHANGE_NONHPRIV ! rand=1 (80) |
| 3217 | .word 0x2a800001 ! 1: BCS bcs,a <label_0x1> |
| 3218 | retry |
| 3219 | donretarg_80_72: |
| 3220 | .word 0x22cc8001 ! 104: BRZ brz,a,pt %r18,<label_0xc8001> |
| 3221 | intveclr_80_73: |
| 3222 | nop |
| 3223 | ta T_CHANGE_HPRIV |
| 3224 | setx 0x555bf37c206e4772, %r1, %r28 |
| 3225 | stxa %r28, [%g0] 0x72 |
| 3226 | ta T_CHANGE_NONHPRIV |
| 3227 | .word 0x25400001 ! 105: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 3228 | .word 0xc1bfd960 ! 106: STDFA_R stda %f0, [%r0, %r31] |
| 3229 | cerer_80_75: |
| 3230 | nop |
| 3231 | ta T_CHANGE_HPRIV |
| 3232 | best_set_reg(0xf52364b407cf1e43, %r26, %r27) |
| 3233 | sethi %hi(0x20008000), %r26 ! Set ITTM/DTTM |
| 3234 | sllx %r26, 32, %r26 |
| 3235 | or %r26, %r27, %r27 |
| 3236 | mov 0x10, %r26 |
| 3237 | stxa %r27, [%r26]0x4c |
| 3238 | ta T_CHANGE_NONHPRIV |
| 3239 | .word 0x8143e011 ! 107: MEMBAR membar #LoadLoad | #Lookaside |
| 3240 | .word 0xc32fc000 ! 108: STXFSR_R st-sfr %f1, [%r0, %r31] |
| 3241 | .word 0x9f80396f ! 109: SIR sir 0x196f |
| 3242 | .word 0xc1bfe1c0 ! 110: STDFA_I stda %f0, [0x01c0, %r31] |
| 3243 | intveclr_80_77: |
| 3244 | nop |
| 3245 | ta T_CHANGE_HPRIV |
| 3246 | setx 0x782989abb25d2a3e, %r1, %r28 |
| 3247 | stxa %r28, [%g0] 0x72 |
| 3248 | ta T_CHANGE_NONHPRIV |
| 3249 | .word 0x25400001 ! 111: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 3250 | splash_cmpr_80_78: |
| 3251 | mov 0, %r18 |
| 3252 | sllx %r18, 63, %r18 |
| 3253 | rd %tick, %r17 |
| 3254 | add %r17, 0x70, %r17 |
| 3255 | or %r17, %r18, %r17 |
| 3256 | ta T_CHANGE_HPRIV |
| 3257 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 3258 | ta T_CHANGE_PRIV |
| 3259 | .word 0xb3800011 ! 112: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 3260 | .word 0xc1bfe1c0 ! 113: STDFA_I stda %f0, [0x01c0, %r31] |
| 3261 | .word 0xc3e84033 ! 114: PREFETCHA_R prefetcha [%r1, %r19] 0x01, #one_read |
| 3262 | tagged_80_80: |
| 3263 | tsubcctv %r17, 0x18b4, %r19 |
| 3264 | .word 0xd807e07a ! 115: LDUW_I lduw [%r31 + 0x007a], %r12 |
| 3265 | .word 0x96d0c010 ! 116: UMULcc_R umulcc %r3, %r16, %r11 |
| 3266 | setx 0xa564a1142dc71094, %r1, %r28 |
| 3267 | stxa %r28, [%g0] 0x73 |
| 3268 | intvec_80_81: |
| 3269 | .word 0x39400001 ! 117: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 3270 | trapasi_80_82: |
| 3271 | nop |
| 3272 | mov 0x30, %r1 ! (VA for ASI 0x5a) |
| 3273 | .word 0xd2d04b40 ! 118: LDSHA_R ldsha [%r1, %r0] 0x5a, %r9 |
| 3274 | .word 0x3e800001 ! 1: BVC bvc,a <label_0x1> |
| 3275 | .word 0x8d902c6d ! 119: WRPR_PSTATE_I wrpr %r0, 0x0c6d, %pstate |
| 3276 | ibp_80_84: |
| 3277 | nop |
| 3278 | ta T_CHANGE_HPRIV |
| 3279 | mov 8, %r18 |
| 3280 | rd %asi, %r12 |
| 3281 | wr %r0, 0x41, %asi |
| 3282 | set sync_thr_counter4, %r23 |
| 3283 | #ifndef SPC |
| 3284 | ldxa [%g0]0x63, %r8 |
| 3285 | and %r8, 0x38, %r8 ! Core ID |
| 3286 | add %r8, %r23, %r23 |
| 3287 | #else |
| 3288 | mov 0, %r8 |
| 3289 | #endif |
| 3290 | mov 0x80, %r16 |
| 3291 | ibp_startwait80_84: |
| 3292 | cas [%r23],%g0,%r16 !lock |
| 3293 | brz,a %r16, continue_ibp_80_84 |
| 3294 | mov (~0x80&0xf0), %r16 |
| 3295 | ld [%r23], %r16 |
| 3296 | ibp_wait80_84: |
| 3297 | brnz %r16, ibp_wait80_84 |
| 3298 | ld [%r23], %r16 |
| 3299 | ba ibp_startwait80_84 |
| 3300 | mov 0x80, %r16 |
| 3301 | continue_ibp_80_84: |
| 3302 | sllx %r16, %r8, %r16 !Mask for my core only |
| 3303 | ldxa [0x58]%asi, %r17 !Running_status |
| 3304 | wait_for_stat_80_84: |
| 3305 | ldxa [0x50]%asi, %r13 !Running_rw |
| 3306 | cmp %r13, %r17 |
| 3307 | bne,a %xcc, wait_for_stat_80_84 |
| 3308 | ldxa [0x58]%asi, %r17 !Running_status |
| 3309 | stxa %r16, [0x68]%asi !Park (W1C) |
| 3310 | ldxa [0x50]%asi, %r14 !Running_rw |
| 3311 | wait_for_ibp_80_84: |
| 3312 | ldxa [0x58]%asi, %r17 !Running_status |
| 3313 | cmp %r14, %r17 |
| 3314 | bne,a %xcc, wait_for_ibp_80_84 |
| 3315 | ldxa [0x50]%asi, %r14 !Running_rw |
| 3316 | ibp_doit80_84: |
| 3317 | best_set_reg(0x0000004084cf95d1,%r19, %r20) |
| 3318 | stxa %r20, [%r18]0x42 |
| 3319 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 3320 | st %g0, [%r23] !clear lock |
| 3321 | wr %r0, %r12, %asi !restore %asi |
| 3322 | .word 0xd297c028 ! 120: LDUHA_R lduha [%r31, %r8] 0x01, %r9 |
| 3323 | nop |
| 3324 | ta T_CHANGE_HPRIV |
| 3325 | mov 0x80, %r10 |
| 3326 | set sync_thr_counter6, %r23 |
| 3327 | #ifndef SPC |
| 3328 | ldxa [%g0]0x63, %o1 |
| 3329 | and %o1, 0x38, %o1 |
| 3330 | add %o1, %r23, %r23 |
| 3331 | #endif |
| 3332 | cas [%r23],%g0,%r10 !lock |
| 3333 | brnz %r10, sma_80_85 |
| 3334 | rd %asi, %r12 |
| 3335 | wr %g0, 0x40, %asi |
| 3336 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 3337 | set 0x000a1fff, %g1 |
| 3338 | stxa %g1, [%g0 + 0x80] %asi |
| 3339 | wr %r12, %g0, %asi |
| 3340 | st %g0, [%r23] |
| 3341 | sma_80_85: |
| 3342 | ta T_CHANGE_NONHPRIV |
| 3343 | .word 0xd3e7e00d ! 121: CASA_R casa [%r31] %asi, %r13, %r9 |
| 3344 | fpinit_80_86: |
| 3345 | nop |
| 3346 | setx fp_data_quads, %r19, %r20 |
| 3347 | ldd [%r20], %f0 |
| 3348 | ldd [%r20+8], %f4 |
| 3349 | ld [%r20+16], %fsr |
| 3350 | ld [%r20+24], %r19 |
| 3351 | wr %r19, %g0, %gsr |
| 3352 | .word 0xc3e82159 ! 122: PREFETCHA_I prefetcha [%r0, + 0x0159] %asi, #one_read |
| 3353 | cmp_80_87: |
| 3354 | nop |
| 3355 | ta T_CHANGE_HPRIV |
| 3356 | rd %asi, %r12 |
| 3357 | wr %r0, 0x41, %asi |
| 3358 | set sync_thr_counter4, %r23 |
| 3359 | #ifndef SPC |
| 3360 | ldxa [%g0]0x63, %r8 |
| 3361 | and %r8, 0x38, %r8 ! Core ID |
| 3362 | add %r8, %r23, %r23 |
| 3363 | mov 0xff, %r9 |
| 3364 | xor %r9, 0x80, %r9 |
| 3365 | sllx %r9, %r8, %r9 ! My core mask |
| 3366 | #else |
| 3367 | mov 0, %r8 |
| 3368 | mov 0xff, %r9 |
| 3369 | xor %r9, 0x80, %r9 ! My core mask |
| 3370 | #endif |
| 3371 | mov 0x80, %r10 |
| 3372 | cmp_startwait80_87: |
| 3373 | cas [%r23],%g0,%r10 !lock |
| 3374 | brz,a %r10, continue_cmp_80_87 |
| 3375 | ldxa [0x50]%asi, %r13 !Running_rw |
| 3376 | ld [%r23], %r10 |
| 3377 | cmp_wait80_87: |
| 3378 | brnz,a %r10, cmp_wait80_87 |
| 3379 | ld [%r23], %r10 |
| 3380 | ba cmp_startwait80_87 |
| 3381 | mov 0x80, %r10 |
| 3382 | continue_cmp_80_87: |
| 3383 | ldxa [0x58]%asi, %r14 !Running_status |
| 3384 | xnor %r14, %r13, %r14 !Bits equal |
| 3385 | brz,a %r8, cmp_multi_core_80_87 |
| 3386 | mov 0xe2, %r17 |
| 3387 | best_set_reg(0x77d0d9510735d9ae, %r16, %r17) |
| 3388 | cmp_multi_core_80_87: |
| 3389 | and %r14, %r17, %r14 !Apply set/clear mask to bits equal |
| 3390 | and %r14, %r9, %r14 !Apply core-mask |
| 3391 | stxa %r14, [0x68]%asi |
| 3392 | st %g0, [%r23] !clear lock |
| 3393 | wr %g0, %r12, %asi |
| 3394 | ta T_CHANGE_NONHPRIV |
| 3395 | .word 0x91948011 ! 123: WRPR_PIL_R wrpr %r18, %r17, %pil |
| 3396 | intveclr_80_88: |
| 3397 | nop |
| 3398 | ta T_CHANGE_HPRIV |
| 3399 | setx 0xfbeb3f4b7dde7712, %r1, %r28 |
| 3400 | stxa %r28, [%g0] 0x72 |
| 3401 | .word 0x25400001 ! 124: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 3402 | mondo_80_89: |
| 3403 | nop |
| 3404 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 3405 | stxa %r7, [%r0+0x3e0] %asi |
| 3406 | .word 0x9d94c007 ! 125: WRPR_WSTATE_R wrpr %r19, %r7, %wstate |
| 3407 | nop |
| 3408 | ta T_CHANGE_HPRIV ! macro |
| 3409 | donret_80_90: |
| 3410 | rd %pc, %r12 |
| 3411 | add %r12, (donretarg_80_90-donret_80_90+4), %r12 |
| 3412 | add %r12, 0x4, %r11 ! seq tnpc |
| 3413 | wrpr %g0, 0x1, %tl |
| 3414 | wrpr %g0, %r12, %tpc |
| 3415 | wrpr %g0, %r11, %tnpc |
| 3416 | set (0x00c25f00 | (28 << 24)), %r13 |
| 3417 | and %r12, 0xfff, %r14 |
| 3418 | sllx %r14, 30, %r14 |
| 3419 | or %r13, %r14, %r20 |
| 3420 | wrpr %r20, %g0, %tstate |
| 3421 | wrhpr %g0, 0x1a19, %htstate |
| 3422 | ta T_CHANGE_NONHPRIV ! rand=1 (80) |
| 3423 | retry |
| 3424 | donretarg_80_90: |
| 3425 | .word 0xd26fe0e8 ! 126: LDSTUB_I ldstub %r9, [%r31 + 0x00e8] |
| 3426 | .word 0xd2cfe068 ! 127: LDSBA_I ldsba [%r31, + 0x0068] %asi, %r9 |
| 3427 | .word 0xd23fe023 ! 128: STD_I std %r9, [%r31 + 0x0023] |
| 3428 | .word 0x8d802000 ! 129: WRFPRS_I wr %r0, 0x0000, %fprs |
| 3429 | .word 0x93d020b2 ! 130: Tcc_I tne icc_or_xcc, %r0 + 178 |
| 3430 | .word 0x91520000 ! 131: RDPR_PIL rdpr %pil, %r8 |
| 3431 | mondo_80_91: |
| 3432 | nop |
| 3433 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 3434 | ta T_CHANGE_PRIV |
| 3435 | stxa %r3, [%r0+0x3e8] %asi |
| 3436 | .word 0x9d924011 ! 132: WRPR_WSTATE_R wrpr %r9, %r17, %wstate |
| 3437 | #if (defined SPC || defined CMP1) |
| 3438 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_92) + 32, 16, 16)) -> intp(4,0,11) |
| 3439 | #else |
| 3440 | setx 0x6555ea15fbbe0db8, %r1, %r28 |
| 3441 | stxa %r28, [%g0] 0x73 |
| 3442 | #endif |
| 3443 | intvec_80_92: |
| 3444 | .word 0x39400001 ! 133: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 3445 | fpinit_80_93: |
| 3446 | nop |
| 3447 | setx fp_data_quads, %r19, %r20 |
| 3448 | ldd [%r20], %f0 |
| 3449 | ldd [%r20+8], %f4 |
| 3450 | ld [%r20+16], %fsr |
| 3451 | ld [%r20+24], %r19 |
| 3452 | wr %r19, %g0, %gsr |
| 3453 | .word 0x8da009c4 ! 134: FDIVd fdivd %f0, %f4, %f6 |
| 3454 | invalw |
| 3455 | mov 0x30, %r30 |
| 3456 | .word 0x91d0001e ! 135: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 3457 | .word 0xe2800a80 ! 136: LDUWA_R lduwa [%r0, %r0] 0x54, %r17 |
| 3458 | ibp_80_94: |
| 3459 | nop |
| 3460 | ta T_CHANGE_HPRIV |
| 3461 | mov 8, %r18 |
| 3462 | rd %asi, %r12 |
| 3463 | wr %r0, 0x41, %asi |
| 3464 | set sync_thr_counter4, %r23 |
| 3465 | #ifndef SPC |
| 3466 | ldxa [%g0]0x63, %r8 |
| 3467 | and %r8, 0x38, %r8 ! Core ID |
| 3468 | add %r8, %r23, %r23 |
| 3469 | #else |
| 3470 | mov 0, %r8 |
| 3471 | #endif |
| 3472 | mov 0x80, %r16 |
| 3473 | ibp_startwait80_94: |
| 3474 | cas [%r23],%g0,%r16 !lock |
| 3475 | brz,a %r16, continue_ibp_80_94 |
| 3476 | mov (~0x80&0xf0), %r16 |
| 3477 | ld [%r23], %r16 |
| 3478 | ibp_wait80_94: |
| 3479 | brnz %r16, ibp_wait80_94 |
| 3480 | ld [%r23], %r16 |
| 3481 | ba ibp_startwait80_94 |
| 3482 | mov 0x80, %r16 |
| 3483 | continue_ibp_80_94: |
| 3484 | sllx %r16, %r8, %r16 !Mask for my core only |
| 3485 | ldxa [0x58]%asi, %r17 !Running_status |
| 3486 | wait_for_stat_80_94: |
| 3487 | ldxa [0x50]%asi, %r13 !Running_rw |
| 3488 | cmp %r13, %r17 |
| 3489 | bne,a %xcc, wait_for_stat_80_94 |
| 3490 | ldxa [0x58]%asi, %r17 !Running_status |
| 3491 | stxa %r16, [0x68]%asi !Park (W1C) |
| 3492 | ldxa [0x50]%asi, %r14 !Running_rw |
| 3493 | wait_for_ibp_80_94: |
| 3494 | ldxa [0x58]%asi, %r17 !Running_status |
| 3495 | cmp %r14, %r17 |
| 3496 | bne,a %xcc, wait_for_ibp_80_94 |
| 3497 | ldxa [0x50]%asi, %r14 !Running_rw |
| 3498 | ibp_doit80_94: |
| 3499 | best_set_reg(0x0000005021d5d177,%r19, %r20) |
| 3500 | stxa %r20, [%r18]0x42 |
| 3501 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 3502 | st %g0, [%r23] !clear lock |
| 3503 | wr %r0, %r12, %asi !restore %asi |
| 3504 | .word 0xe2dfc032 ! 137: LDXA_R ldxa [%r31, %r18] 0x01, %r17 |
| 3505 | nop |
| 3506 | ta T_CHANGE_HPRIV |
| 3507 | mov 0x80+1, %r10 |
| 3508 | set sync_thr_counter5, %r23 |
| 3509 | #ifndef SPC |
| 3510 | ldxa [%g0]0x63, %o1 |
| 3511 | and %o1, 0x38, %o1 |
| 3512 | add %o1, %r23, %r23 |
| 3513 | sllx %o1, 5, %o3 !(CID*256) |
| 3514 | #endif |
| 3515 | cas [%r23],%g0,%r10 !lock |
| 3516 | brnz %r10, cwq_80_95 |
| 3517 | rd %asi, %r12 |
| 3518 | wr %g0, 0x40, %asi |
| 3519 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 3520 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 3521 | cmp %l1, 1 |
| 3522 | bne cwq_80_95 |
| 3523 | set CWQ_BASE, %l6 |
| 3524 | #ifndef SPC |
| 3525 | add %l6, %o3, %l6 |
| 3526 | #endif |
| 3527 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 3528 | best_set_reg(0x20610000, %l1, %l2) !# Control Word |
| 3529 | sllx %l2, 32, %l2 |
| 3530 | stx %l2, [%l6 + 0x0] |
| 3531 | membar #Sync |
| 3532 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 3533 | sub %l2, 0x40, %l2 |
| 3534 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 3535 | wr %r12, %g0, %asi |
| 3536 | st %g0, [%r23] |
| 3537 | cwq_80_95: |
| 3538 | ta T_CHANGE_NONHPRIV |
| 3539 | .word 0x99414000 ! 138: RDPC rd %pc, %r12 |
| 3540 | .word 0x87802020 ! 139: WRASI_I wr %r0, 0x0020, %asi |
| 3541 | #if (defined SPC || defined CMP1) |
| 3542 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_96) + 24, 16, 16)) -> intp(4,0,1) |
| 3543 | #else |
| 3544 | setx 0x36f07e35b5992715, %r1, %r28 |
| 3545 | stxa %r28, [%g0] 0x73 |
| 3546 | #endif |
| 3547 | intvec_80_96: |
| 3548 | .word 0x39400001 ! 140: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 3549 | .word 0xe1e7e010 ! 141: CASA_R casa [%r31] %asi, %r16, %r16 |
| 3550 | dvapa_80_98: |
| 3551 | nop |
| 3552 | ta T_CHANGE_HPRIV |
| 3553 | mov 0xc5a, %r20 |
| 3554 | mov 0x5, %r19 |
| 3555 | sllx %r20, 23, %r20 |
| 3556 | or %r19, %r20, %r19 |
| 3557 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 3558 | mov 0x38, %r18 |
| 3559 | stxa %r31, [%r18]0x58 |
| 3560 | ta T_CHANGE_NONHPRIV |
| 3561 | .word 0x87ad0a51 ! 142: FCMPd fcmpd %fcc<n>, %f20, %f48 |
| 3562 | nop |
| 3563 | ta T_CHANGE_HPRIV ! macro |
| 3564 | donret_80_99: |
| 3565 | rd %pc, %r12 |
| 3566 | add %r12, (donretarg_80_99-donret_80_99+4), %r12 |
| 3567 | add %r12, 0x4, %r11 ! seq tnpc |
| 3568 | wrpr %g0, 0x2, %tl |
| 3569 | wrpr %g0, %r12, %tpc |
| 3570 | wrpr %g0, %r11, %tnpc |
| 3571 | set (0x00a5d300 | (0x82 << 24)), %r13 |
| 3572 | and %r12, 0xfff, %r14 |
| 3573 | sllx %r14, 30, %r14 |
| 3574 | or %r13, %r14, %r20 |
| 3575 | wrpr %r20, %g0, %tstate |
| 3576 | wrhpr %g0, 0x1785, %htstate |
| 3577 | ta T_CHANGE_NONHPRIV ! rand=1 (80) |
| 3578 | .word 0x2d400001 ! 1: FBPG fbg,a,pn %fcc0, <label_0x1> |
| 3579 | done |
| 3580 | donretarg_80_99: |
| 3581 | .word 0x23400001 ! 143: FBPNE fbne,a,pn %fcc0, <label_0x1> |
| 3582 | .word 0xe477e0b8 ! 144: STX_I stx %r18, [%r31 + 0x00b8] |
| 3583 | .word 0x8d903067 ! 145: WRPR_PSTATE_I wrpr %r0, 0x1067, %pstate |
| 3584 | .word 0xe4800c20 ! 146: LDUWA_R lduwa [%r0, %r0] 0x61, %r18 |
| 3585 | trapasi_80_101: |
| 3586 | nop |
| 3587 | mov 0x3c8, %r1 ! (VA for ASI 0x25) |
| 3588 | .word 0xe49044a0 ! 147: LDUHA_R lduha [%r1, %r0] 0x25, %r18 |
| 3589 | ibp_80_102: |
| 3590 | nop |
| 3591 | ta T_CHANGE_HPRIV |
| 3592 | mov 8, %r18 |
| 3593 | rd %asi, %r12 |
| 3594 | wr %r0, 0x41, %asi |
| 3595 | set sync_thr_counter4, %r23 |
| 3596 | #ifndef SPC |
| 3597 | ldxa [%g0]0x63, %r8 |
| 3598 | and %r8, 0x38, %r8 ! Core ID |
| 3599 | add %r8, %r23, %r23 |
| 3600 | #else |
| 3601 | mov 0, %r8 |
| 3602 | #endif |
| 3603 | mov 0x80, %r16 |
| 3604 | ibp_startwait80_102: |
| 3605 | cas [%r23],%g0,%r16 !lock |
| 3606 | brz,a %r16, continue_ibp_80_102 |
| 3607 | mov (~0x80&0xf0), %r16 |
| 3608 | ld [%r23], %r16 |
| 3609 | ibp_wait80_102: |
| 3610 | brnz %r16, ibp_wait80_102 |
| 3611 | ld [%r23], %r16 |
| 3612 | ba ibp_startwait80_102 |
| 3613 | mov 0x80, %r16 |
| 3614 | continue_ibp_80_102: |
| 3615 | sllx %r16, %r8, %r16 !Mask for my core only |
| 3616 | ldxa [0x58]%asi, %r17 !Running_status |
| 3617 | wait_for_stat_80_102: |
| 3618 | ldxa [0x50]%asi, %r13 !Running_rw |
| 3619 | cmp %r13, %r17 |
| 3620 | bne,a %xcc, wait_for_stat_80_102 |
| 3621 | ldxa [0x58]%asi, %r17 !Running_status |
| 3622 | stxa %r16, [0x68]%asi !Park (W1C) |
| 3623 | ldxa [0x50]%asi, %r14 !Running_rw |
| 3624 | wait_for_ibp_80_102: |
| 3625 | ldxa [0x58]%asi, %r17 !Running_status |
| 3626 | cmp %r14, %r17 |
| 3627 | bne,a %xcc, wait_for_ibp_80_102 |
| 3628 | ldxa [0x50]%asi, %r14 !Running_rw |
| 3629 | ibp_doit80_102: |
| 3630 | best_set_reg(0x00000040cdd17716,%r19, %r20) |
| 3631 | stxa %r20, [%r18]0x42 |
| 3632 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 3633 | st %g0, [%r23] !clear lock |
| 3634 | wr %r0, %r12, %asi !restore %asi |
| 3635 | .word 0xe4dfc030 ! 148: LDXA_R ldxa [%r31, %r16] 0x01, %r18 |
| 3636 | setx 0xdea54024b780fce8, %r1, %r28 |
| 3637 | stxa %r28, [%g0] 0x73 |
| 3638 | intvec_80_103: |
| 3639 | .word 0x39400001 ! 149: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 3640 | mondo_80_104: |
| 3641 | nop |
| 3642 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 3643 | stxa %r19, [%r0+0x3e8] %asi |
| 3644 | .word 0x9d918012 ! 150: WRPR_WSTATE_R wrpr %r6, %r18, %wstate |
| 3645 | setx 0xf60cf6a677ac0337, %r1, %r28 |
| 3646 | stxa %r28, [%g0] 0x73 |
| 3647 | intvec_80_105: |
| 3648 | .word 0x39400001 ! 151: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 3649 | ibp_80_106: |
| 3650 | nop |
| 3651 | ta T_CHANGE_HPRIV |
| 3652 | mov 8, %r18 |
| 3653 | rd %asi, %r12 |
| 3654 | wr %r0, 0x41, %asi |
| 3655 | set sync_thr_counter4, %r23 |
| 3656 | #ifndef SPC |
| 3657 | ldxa [%g0]0x63, %r8 |
| 3658 | and %r8, 0x38, %r8 ! Core ID |
| 3659 | add %r8, %r23, %r23 |
| 3660 | #else |
| 3661 | mov 0, %r8 |
| 3662 | #endif |
| 3663 | mov 0x80, %r16 |
| 3664 | ibp_startwait80_106: |
| 3665 | cas [%r23],%g0,%r16 !lock |
| 3666 | brz,a %r16, continue_ibp_80_106 |
| 3667 | mov (~0x80&0xf0), %r16 |
| 3668 | ld [%r23], %r16 |
| 3669 | ibp_wait80_106: |
| 3670 | brnz %r16, ibp_wait80_106 |
| 3671 | ld [%r23], %r16 |
| 3672 | ba ibp_startwait80_106 |
| 3673 | mov 0x80, %r16 |
| 3674 | continue_ibp_80_106: |
| 3675 | sllx %r16, %r8, %r16 !Mask for my core only |
| 3676 | ldxa [0x58]%asi, %r17 !Running_status |
| 3677 | wait_for_stat_80_106: |
| 3678 | ldxa [0x50]%asi, %r13 !Running_rw |
| 3679 | cmp %r13, %r17 |
| 3680 | bne,a %xcc, wait_for_stat_80_106 |
| 3681 | ldxa [0x58]%asi, %r17 !Running_status |
| 3682 | stxa %r16, [0x68]%asi !Park (W1C) |
| 3683 | ldxa [0x50]%asi, %r14 !Running_rw |
| 3684 | wait_for_ibp_80_106: |
| 3685 | ldxa [0x58]%asi, %r17 !Running_status |
| 3686 | cmp %r14, %r17 |
| 3687 | bne,a %xcc, wait_for_ibp_80_106 |
| 3688 | ldxa [0x50]%asi, %r14 !Running_rw |
| 3689 | ibp_doit80_106: |
| 3690 | best_set_reg(0x000000502bf716c9,%r19, %r20) |
| 3691 | stxa %r20, [%r18]0x42 |
| 3692 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 3693 | st %g0, [%r23] !clear lock |
| 3694 | wr %r0, %r12, %asi !restore %asi |
| 3695 | .word 0xe43fe190 ! 152: STD_I std %r18, [%r31 + 0x0190] |
| 3696 | trapasi_80_107: |
| 3697 | nop |
| 3698 | mov 0x0, %r1 ! (VA for ASI 0x72) |
| 3699 | .word 0xe4d04e40 ! 153: LDSHA_R ldsha [%r1, %r0] 0x72, %r18 |
| 3700 | .word 0x9f8031ed ! 154: SIR sir 0x11ed |
| 3701 | splash_cmpr_80_108: |
| 3702 | mov 1, %r18 |
| 3703 | sllx %r18, 63, %r18 |
| 3704 | rd %tick, %r17 |
| 3705 | add %r17, 0x70, %r17 |
| 3706 | or %r17, %r18, %r17 |
| 3707 | .word 0xaf800011 ! 155: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 3708 | intveclr_80_109: |
| 3709 | nop |
| 3710 | ta T_CHANGE_HPRIV |
| 3711 | setx 0x64b5996a3f50b4ba, %r1, %r28 |
| 3712 | stxa %r28, [%g0] 0x72 |
| 3713 | ta T_CHANGE_NONHPRIV |
| 3714 | .word 0x25400001 ! 156: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 3715 | ibp_80_110: |
| 3716 | nop |
| 3717 | ta T_CHANGE_HPRIV |
| 3718 | mov 8, %r18 |
| 3719 | rd %asi, %r12 |
| 3720 | wr %r0, 0x41, %asi |
| 3721 | set sync_thr_counter4, %r23 |
| 3722 | #ifndef SPC |
| 3723 | ldxa [%g0]0x63, %r8 |
| 3724 | and %r8, 0x38, %r8 ! Core ID |
| 3725 | add %r8, %r23, %r23 |
| 3726 | #else |
| 3727 | mov 0, %r8 |
| 3728 | #endif |
| 3729 | mov 0x80, %r16 |
| 3730 | ibp_startwait80_110: |
| 3731 | cas [%r23],%g0,%r16 !lock |
| 3732 | brz,a %r16, continue_ibp_80_110 |
| 3733 | mov (~0x80&0xf0), %r16 |
| 3734 | ld [%r23], %r16 |
| 3735 | ibp_wait80_110: |
| 3736 | brnz %r16, ibp_wait80_110 |
| 3737 | ld [%r23], %r16 |
| 3738 | ba ibp_startwait80_110 |
| 3739 | mov 0x80, %r16 |
| 3740 | continue_ibp_80_110: |
| 3741 | sllx %r16, %r8, %r16 !Mask for my core only |
| 3742 | ldxa [0x58]%asi, %r17 !Running_status |
| 3743 | wait_for_stat_80_110: |
| 3744 | ldxa [0x50]%asi, %r13 !Running_rw |
| 3745 | cmp %r13, %r17 |
| 3746 | bne,a %xcc, wait_for_stat_80_110 |
| 3747 | ldxa [0x58]%asi, %r17 !Running_status |
| 3748 | stxa %r16, [0x68]%asi !Park (W1C) |
| 3749 | ldxa [0x50]%asi, %r14 !Running_rw |
| 3750 | wait_for_ibp_80_110: |
| 3751 | ldxa [0x58]%asi, %r17 !Running_status |
| 3752 | cmp %r14, %r17 |
| 3753 | bne,a %xcc, wait_for_ibp_80_110 |
| 3754 | ldxa [0x50]%asi, %r14 !Running_rw |
| 3755 | ibp_doit80_110: |
| 3756 | best_set_reg(0x00000050f3d6c910,%r19, %r20) |
| 3757 | stxa %r20, [%r18]0x42 |
| 3758 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 3759 | st %g0, [%r23] !clear lock |
| 3760 | wr %r0, %r12, %asi !restore %asi |
| 3761 | .word 0x95b50494 ! 157: FCMPLE32 fcmple32 %d20, %d20, %r10 |
| 3762 | .word 0xc32fc000 ! 158: STXFSR_R st-sfr %f1, [%r0, %r31] |
| 3763 | .word 0xe19fd920 ! 159: LDDFA_R ldda [%r31, %r0], %f16 |
| 3764 | .word 0x9f80266e ! 160: SIR sir 0x066e |
| 3765 | splash_hpstate_80_112: |
| 3766 | .word 0x3b400001 ! 1: FBPLE fble,a,pn %fcc0, <label_0x1> |
| 3767 | .word 0x81983d65 ! 161: WRHPR_HPSTATE_I wrhpr %r0, 0x1d65, %hpstate |
| 3768 | .word 0xe327e1bb ! 162: STF_I st %f17, [0x01bb, %r31] |
| 3769 | .word 0x93d020b3 ! 163: Tcc_I tne icc_or_xcc, %r0 + 179 |
| 3770 | mondo_80_113: |
| 3771 | nop |
| 3772 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 3773 | stxa %r5, [%r0+0x3c0] %asi |
| 3774 | .word 0x9d918011 ! 164: WRPR_WSTATE_R wrpr %r6, %r17, %wstate |
| 3775 | br_badelay2_80_114: |
| 3776 | .word 0x20800001 ! 1: BN bn,a <label_0x1> |
| 3777 | allclean |
| 3778 | .word 0x99b48311 ! 165: ALIGNADDRESS alignaddr %r18, %r17, %r12 |
| 3779 | fpinit_80_115: |
| 3780 | nop |
| 3781 | setx fp_data_quads, %r19, %r20 |
| 3782 | ldd [%r20], %f0 |
| 3783 | ldd [%r20+8], %f4 |
| 3784 | ld [%r20+16], %fsr |
| 3785 | ld [%r20+24], %r19 |
| 3786 | wr %r19, %g0, %gsr |
| 3787 | .word 0x8db00484 ! 166: FCMPLE32 fcmple32 %d0, %d4, %r6 |
| 3788 | set 0x277c, %l3 |
| 3789 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT |
| 3790 | .word 0x91b107cd ! 167: PDIST pdistn %d4, %d44, %d8 |
| 3791 | memptr_80_116: |
| 3792 | set 0x60340000, %r31 |
| 3793 | .word 0x8581f5fe ! 168: WRCCR_I wr %r7, 0x15fe, %ccr |
| 3794 | .word 0xd4c7e0c0 ! 169: LDSWA_I ldswa [%r31, + 0x00c0] %asi, %r10 |
| 3795 | setx 0xb70a461af0e49386, %r1, %r28 |
| 3796 | stxa %r28, [%g0] 0x73 |
| 3797 | intvec_80_117: |
| 3798 | .word 0x39400001 ! 170: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 3799 | splash_hpstate_80_118: |
| 3800 | .word 0x81983acf ! 171: WRHPR_HPSTATE_I wrhpr %r0, 0x1acf, %hpstate |
| 3801 | mondo_80_119: |
| 3802 | nop |
| 3803 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 3804 | ta T_CHANGE_PRIV |
| 3805 | stxa %r11, [%r0+0x3d0] %asi |
| 3806 | .word 0x9d910014 ! 172: WRPR_WSTATE_R wrpr %r4, %r20, %wstate |
| 3807 | nop |
| 3808 | ta T_CHANGE_HPRIV |
| 3809 | mov 0x80+1, %r10 |
| 3810 | set sync_thr_counter5, %r23 |
| 3811 | #ifndef SPC |
| 3812 | ldxa [%g0]0x63, %o1 |
| 3813 | and %o1, 0x38, %o1 |
| 3814 | add %o1, %r23, %r23 |
| 3815 | sllx %o1, 5, %o3 !(CID*256) |
| 3816 | #endif |
| 3817 | cas [%r23],%g0,%r10 !lock |
| 3818 | brnz %r10, cwq_80_120 |
| 3819 | rd %asi, %r12 |
| 3820 | wr %g0, 0x40, %asi |
| 3821 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 3822 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 3823 | cmp %l1, 1 |
| 3824 | bne cwq_80_120 |
| 3825 | set CWQ_BASE, %l6 |
| 3826 | #ifndef SPC |
| 3827 | add %l6, %o3, %l6 |
| 3828 | #endif |
| 3829 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 3830 | best_set_reg(0x20610050, %l1, %l2) !# Control Word |
| 3831 | sllx %l2, 32, %l2 |
| 3832 | stx %l2, [%l6 + 0x0] |
| 3833 | membar #Sync |
| 3834 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 3835 | sub %l2, 0x40, %l2 |
| 3836 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 3837 | wr %r12, %g0, %asi |
| 3838 | st %g0, [%r23] |
| 3839 | cwq_80_120: |
| 3840 | ta T_CHANGE_NONHPRIV |
| 3841 | .word 0xa5414000 ! 173: RDPC rd %pc, %r18 |
| 3842 | ibp_80_121: |
| 3843 | nop |
| 3844 | ta T_CHANGE_HPRIV |
| 3845 | mov 8, %r18 |
| 3846 | rd %asi, %r12 |
| 3847 | wr %r0, 0x41, %asi |
| 3848 | set sync_thr_counter4, %r23 |
| 3849 | #ifndef SPC |
| 3850 | ldxa [%g0]0x63, %r8 |
| 3851 | and %r8, 0x38, %r8 ! Core ID |
| 3852 | add %r8, %r23, %r23 |
| 3853 | #else |
| 3854 | mov 0, %r8 |
| 3855 | #endif |
| 3856 | mov 0x80, %r16 |
| 3857 | ibp_startwait80_121: |
| 3858 | cas [%r23],%g0,%r16 !lock |
| 3859 | brz,a %r16, continue_ibp_80_121 |
| 3860 | mov (~0x80&0xf0), %r16 |
| 3861 | ld [%r23], %r16 |
| 3862 | ibp_wait80_121: |
| 3863 | brnz %r16, ibp_wait80_121 |
| 3864 | ld [%r23], %r16 |
| 3865 | ba ibp_startwait80_121 |
| 3866 | mov 0x80, %r16 |
| 3867 | continue_ibp_80_121: |
| 3868 | sllx %r16, %r8, %r16 !Mask for my core only |
| 3869 | ldxa [0x58]%asi, %r17 !Running_status |
| 3870 | wait_for_stat_80_121: |
| 3871 | ldxa [0x50]%asi, %r13 !Running_rw |
| 3872 | cmp %r13, %r17 |
| 3873 | bne,a %xcc, wait_for_stat_80_121 |
| 3874 | ldxa [0x58]%asi, %r17 !Running_status |
| 3875 | stxa %r16, [0x68]%asi !Park (W1C) |
| 3876 | ldxa [0x50]%asi, %r14 !Running_rw |
| 3877 | wait_for_ibp_80_121: |
| 3878 | ldxa [0x58]%asi, %r17 !Running_status |
| 3879 | cmp %r14, %r17 |
| 3880 | bne,a %xcc, wait_for_ibp_80_121 |
| 3881 | ldxa [0x50]%asi, %r14 !Running_rw |
| 3882 | ibp_doit80_121: |
| 3883 | best_set_reg(0x00000040cbc91076,%r19, %r20) |
| 3884 | stxa %r20, [%r18]0x42 |
| 3885 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 3886 | st %g0, [%r23] !clear lock |
| 3887 | wr %r0, %r12, %asi !restore %asi |
| 3888 | ta T_CHANGE_NONHPRIV |
| 3889 | .word 0xe1bfdc00 ! 174: STDFA_R stda %f16, [%r0, %r31] |
| 3890 | .word 0xd48008a0 ! 175: LDUWA_R lduwa [%r0, %r0] 0x45, %r10 |
| 3891 | .word 0x8d802000 ! 176: WRFPRS_I wr %r0, 0x0000, %fprs |
| 3892 | #if (defined SPC || defined CMP1) |
| 3893 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_122) + 40, 16, 16)) -> intp(0,0,4) |
| 3894 | #else |
| 3895 | setx 0xd3609394e530ad71, %r1, %r28 |
| 3896 | stxa %r28, [%g0] 0x73 |
| 3897 | #endif |
| 3898 | intvec_80_122: |
| 3899 | .word 0x39400001 ! 177: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 3900 | setx 0x6b5e651421f81668, %r1, %r28 |
| 3901 | stxa %r28, [%g0] 0x73 |
| 3902 | intvec_80_123: |
| 3903 | .word 0x39400001 ! 178: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 3904 | .word 0x83d02032 ! 179: Tcc_I te icc_or_xcc, %r0 + 50 |
| 3905 | #if (defined SPC || defined CMP1) |
| 3906 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_80_124) + 8, 16, 16)) -> intp(7,0,15) |
| 3907 | #else |
| 3908 | setx 0x0ff1230b12f46daa, %r1, %r28 |
| 3909 | stxa %r28, [%g0] 0x73 |
| 3910 | #endif |
| 3911 | intvec_80_124: |
| 3912 | .word 0x39400001 ! 180: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 3913 | fpinit_80_125: |
| 3914 | nop |
| 3915 | setx fp_data_quads, %r19, %r20 |
| 3916 | ldd [%r20], %f0 |
| 3917 | ldd [%r20+8], %f4 |
| 3918 | ld [%r20+16], %fsr |
| 3919 | ld [%r20+24], %r19 |
| 3920 | wr %r19, %g0, %gsr |
| 3921 | .word 0x87a80a44 ! 181: FCMPd fcmpd %fcc<n>, %f0, %f4 |
| 3922 | splash_tba_80_126: |
| 3923 | nop |
| 3924 | ta T_CHANGE_PRIV |
| 3925 | setx 0x00000000003a0000, %r11, %r12 |
| 3926 | .word 0x8b90000c ! 182: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 3927 | fpinit_80_127: |
| 3928 | nop |
| 3929 | setx fp_data_quads, %r19, %r20 |
| 3930 | ldd [%r20], %f0 |
| 3931 | ldd [%r20+8], %f4 |
| 3932 | ld [%r20+16], %fsr |
| 3933 | ld [%r20+24], %r19 |
| 3934 | wr %r19, %g0, %gsr |
| 3935 | .word 0x87a80a44 ! 183: FCMPd fcmpd %fcc<n>, %f0, %f4 |
| 3936 | .word 0xd4dfe0d0 ! 184: LDXA_I ldxa [%r31, + 0x00d0] %asi, %r10 |
| 3937 | nop |
| 3938 | ta T_CHANGE_HPRIV |
| 3939 | mov 0x80+1, %r10 |
| 3940 | set sync_thr_counter5, %r23 |
| 3941 | #ifndef SPC |
| 3942 | ldxa [%g0]0x63, %o1 |
| 3943 | and %o1, 0x38, %o1 |
| 3944 | add %o1, %r23, %r23 |
| 3945 | sllx %o1, 5, %o3 !(CID*256) |
| 3946 | #endif |
| 3947 | cas [%r23],%g0,%r10 !lock |
| 3948 | brnz %r10, cwq_80_128 |
| 3949 | rd %asi, %r12 |
| 3950 | wr %g0, 0x40, %asi |
| 3951 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 3952 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 3953 | cmp %l1, 1 |
| 3954 | bne cwq_80_128 |
| 3955 | set CWQ_BASE, %l6 |
| 3956 | #ifndef SPC |
| 3957 | add %l6, %o3, %l6 |
| 3958 | #endif |
| 3959 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 3960 | best_set_reg(0x20610040, %l1, %l2) !# Control Word |
| 3961 | sllx %l2, 32, %l2 |
| 3962 | stx %l2, [%l6 + 0x0] |
| 3963 | membar #Sync |
| 3964 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 3965 | sub %l2, 0x40, %l2 |
| 3966 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 3967 | wr %r12, %g0, %asi |
| 3968 | st %g0, [%r23] |
| 3969 | cwq_80_128: |
| 3970 | ta T_CHANGE_NONHPRIV |
| 3971 | .word 0x9b414000 ! 185: RDPC rd %pc, %r13 |
| 3972 | intveclr_80_129: |
| 3973 | nop |
| 3974 | ta T_CHANGE_HPRIV |
| 3975 | setx 0xd8de908149240903, %r1, %r28 |
| 3976 | stxa %r28, [%g0] 0x72 |
| 3977 | ta T_CHANGE_NONHPRIV |
| 3978 | .word 0x25400001 ! 186: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 3979 | memptr_80_130: |
| 3980 | set 0x60340000, %r31 |
| 3981 | .word 0x8581e695 ! 187: WRCCR_I wr %r7, 0x0695, %ccr |
| 3982 | cmp_80_131: |
| 3983 | nop |
| 3984 | ta T_CHANGE_HPRIV |
| 3985 | rd %asi, %r12 |
| 3986 | wr %r0, 0x41, %asi |
| 3987 | set sync_thr_counter4, %r23 |
| 3988 | #ifndef SPC |
| 3989 | ldxa [%g0]0x63, %r8 |
| 3990 | and %r8, 0x38, %r8 ! Core ID |
| 3991 | add %r8, %r23, %r23 |
| 3992 | mov 0xff, %r9 |
| 3993 | xor %r9, 0x80, %r9 |
| 3994 | sllx %r9, %r8, %r9 ! My core mask |
| 3995 | #else |
| 3996 | mov 0, %r8 |
| 3997 | mov 0xff, %r9 |
| 3998 | xor %r9, 0x80, %r9 ! My core mask |
| 3999 | #endif |
| 4000 | mov 0x80, %r10 |
| 4001 | cmp_startwait80_131: |
| 4002 | cas [%r23],%g0,%r10 !lock |
| 4003 | brz,a %r10, continue_cmp_80_131 |
| 4004 | ldxa [0x50]%asi, %r13 !Running_rw |
| 4005 | ld [%r23], %r10 |
| 4006 | cmp_wait80_131: |
| 4007 | brnz,a %r10, cmp_wait80_131 |
| 4008 | ld [%r23], %r10 |
| 4009 | ba cmp_startwait80_131 |
| 4010 | mov 0x80, %r10 |
| 4011 | continue_cmp_80_131: |
| 4012 | ldxa [0x58]%asi, %r14 !Running_status |
| 4013 | xnor %r14, %r13, %r14 !Bits equal |
| 4014 | brz,a %r8, cmp_multi_core_80_131 |
| 4015 | mov 30, %r17 |
| 4016 | best_set_reg(0xd2e75a64dc6ef090, %r16, %r17) |
| 4017 | cmp_multi_core_80_131: |
| 4018 | and %r14, %r17, %r14 !Apply set/clear mask to bits equal |
| 4019 | and %r14, %r9, %r14 !Apply core-mask |
| 4020 | stxa %r14, [0x68]%asi |
| 4021 | st %g0, [%r23] !clear lock |
| 4022 | wr %g0, %r12, %asi |
| 4023 | ta T_CHANGE_NONHPRIV |
| 4024 | .word 0x91928010 ! 188: WRPR_PIL_R wrpr %r10, %r16, %pil |
| 4025 | cmp_80_132: |
| 4026 | nop |
| 4027 | ta T_CHANGE_HPRIV |
| 4028 | rd %asi, %r12 |
| 4029 | wr %r0, 0x41, %asi |
| 4030 | set sync_thr_counter4, %r23 |
| 4031 | #ifndef SPC |
| 4032 | ldxa [%g0]0x63, %r8 |
| 4033 | and %r8, 0x38, %r8 ! Core ID |
| 4034 | add %r8, %r23, %r23 |
| 4035 | mov 0xff, %r9 |
| 4036 | xor %r9, 0x80, %r9 |
| 4037 | sllx %r9, %r8, %r9 ! My core mask |
| 4038 | #else |
| 4039 | mov 0, %r8 |
| 4040 | mov 0xff, %r9 |
| 4041 | xor %r9, 0x80, %r9 ! My core mask |
| 4042 | #endif |
| 4043 | mov 0x80, %r10 |
| 4044 | cmp_startwait80_132: |
| 4045 | cas [%r23],%g0,%r10 !lock |
| 4046 | brz,a %r10, continue_cmp_80_132 |
| 4047 | ldxa [0x50]%asi, %r13 !Running_rw |
| 4048 | ld [%r23], %r10 |
| 4049 | cmp_wait80_132: |
| 4050 | brnz,a %r10, cmp_wait80_132 |
| 4051 | ld [%r23], %r10 |
| 4052 | ba cmp_startwait80_132 |
| 4053 | mov 0x80, %r10 |
| 4054 | continue_cmp_80_132: |
| 4055 | ldxa [0x58]%asi, %r14 !Running_status |
| 4056 | xnor %r14, %r13, %r14 !Bits equal |
| 4057 | brz,a %r8, cmp_multi_core_80_132 |
| 4058 | mov 44, %r17 |
| 4059 | best_set_reg(0xb0595c18d4df921b, %r16, %r17) |
| 4060 | cmp_multi_core_80_132: |
| 4061 | and %r14, %r17, %r14 !Apply set/clear mask to bits equal |
| 4062 | and %r14, %r9, %r14 !Apply core-mask |
| 4063 | stxa %r14, [0x60]%asi |
| 4064 | st %g0, [%r23] !clear lock |
| 4065 | wr %g0, %r12, %asi |
| 4066 | .word 0xa1a00164 ! 189: FABSq dis not found |
| 4067 | |
| 4068 | .word 0xe8800c60 ! 190: LDUWA_R lduwa [%r0, %r0] 0x63, %r20 |
| 4069 | .word 0x81580000 ! 191: FLUSHW flushw |
| 4070 | splash_cmpr_80_133: |
| 4071 | mov 1, %r18 |
| 4072 | sllx %r18, 63, %r18 |
| 4073 | rd %tick, %r17 |
| 4074 | add %r17, 0x50, %r17 |
| 4075 | or %r17, %r18, %r17 |
| 4076 | ta T_CHANGE_PRIV |
| 4077 | .word 0xaf800011 ! 192: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 4078 | .word 0xe877c000 ! 193: STX_R stx %r20, [%r31 + %r0] |
| 4079 | ceter_80_134: |
| 4080 | nop |
| 4081 | ta T_CHANGE_HPRIV |
| 4082 | mov 7, %r17 |
| 4083 | sllx %r17, 60, %r17 |
| 4084 | mov 0x18, %r16 |
| 4085 | stxa %r17, [%r16]0x4c |
| 4086 | ta T_CHANGE_NONHPRIV |
| 4087 | .word 0xa1410000 ! 194: RDTICK rd %tick, %r16 |
| 4088 | .word 0x8d802004 ! 195: WRFPRS_I wr %r0, 0x0004, %fprs |
| 4089 | .word 0x97520000 ! 196: RDPR_PIL rdpr %pil, %r11 |
| 4090 | setx 0x99fc5865527285d4, %r1, %r28 |
| 4091 | stxa %r28, [%g0] 0x73 |
| 4092 | intvec_80_135: |
| 4093 | .word 0x39400001 ! 197: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 4094 | .word 0xd727e1b0 ! 198: STF_I st %f11, [0x01b0, %r31] |
| 4095 | ibp_80_136: |
| 4096 | nop |
| 4097 | ta T_CHANGE_HPRIV |
| 4098 | mov 8, %r18 |
| 4099 | rd %asi, %r12 |
| 4100 | wr %r0, 0x41, %asi |
| 4101 | set sync_thr_counter4, %r23 |
| 4102 | #ifndef SPC |
| 4103 | ldxa [%g0]0x63, %r8 |
| 4104 | and %r8, 0x38, %r8 ! Core ID |
| 4105 | add %r8, %r23, %r23 |
| 4106 | #else |
| 4107 | mov 0, %r8 |
| 4108 | #endif |
| 4109 | mov 0x80, %r16 |
| 4110 | ibp_startwait80_136: |
| 4111 | cas [%r23],%g0,%r16 !lock |
| 4112 | brz,a %r16, continue_ibp_80_136 |
| 4113 | mov (~0x80&0xf0), %r16 |
| 4114 | ld [%r23], %r16 |
| 4115 | ibp_wait80_136: |
| 4116 | brnz %r16, ibp_wait80_136 |
| 4117 | ld [%r23], %r16 |
| 4118 | ba ibp_startwait80_136 |
| 4119 | mov 0x80, %r16 |
| 4120 | continue_ibp_80_136: |
| 4121 | sllx %r16, %r8, %r16 !Mask for my core only |
| 4122 | ldxa [0x58]%asi, %r17 !Running_status |
| 4123 | wait_for_stat_80_136: |
| 4124 | ldxa [0x50]%asi, %r13 !Running_rw |
| 4125 | cmp %r13, %r17 |
| 4126 | bne,a %xcc, wait_for_stat_80_136 |
| 4127 | ldxa [0x58]%asi, %r17 !Running_status |
| 4128 | stxa %r16, [0x68]%asi !Park (W1C) |
| 4129 | ldxa [0x50]%asi, %r14 !Running_rw |
| 4130 | wait_for_ibp_80_136: |
| 4131 | ldxa [0x58]%asi, %r17 !Running_status |
| 4132 | cmp %r14, %r17 |
| 4133 | bne,a %xcc, wait_for_ibp_80_136 |
| 4134 | ldxa [0x50]%asi, %r14 !Running_rw |
| 4135 | ibp_doit80_136: |
| 4136 | best_set_reg(0x000000409cd076fe,%r19, %r20) |
| 4137 | stxa %r20, [%r18]0x42 |
| 4138 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 4139 | st %g0, [%r23] !clear lock |
| 4140 | wr %r0, %r12, %asi !restore %asi |
| 4141 | .word 0xe19fe0a0 ! 199: LDDFA_I ldda [%r31, 0x00a0], %f16 |
| 4142 | ibp_80_137: |
| 4143 | nop |
| 4144 | ta T_CHANGE_HPRIV |
| 4145 | mov 8, %r18 |
| 4146 | rd %asi, %r12 |
| 4147 | wr %r0, 0x41, %asi |
| 4148 | set sync_thr_counter4, %r23 |
| 4149 | #ifndef SPC |
| 4150 | ldxa [%g0]0x63, %r8 |
| 4151 | and %r8, 0x38, %r8 ! Core ID |
| 4152 | add %r8, %r23, %r23 |
| 4153 | #else |
| 4154 | mov 0, %r8 |
| 4155 | #endif |
| 4156 | mov 0x80, %r16 |
| 4157 | ibp_startwait80_137: |
| 4158 | cas [%r23],%g0,%r16 !lock |
| 4159 | brz,a %r16, continue_ibp_80_137 |
| 4160 | mov (~0x80&0xf0), %r16 |
| 4161 | ld [%r23], %r16 |
| 4162 | ibp_wait80_137: |
| 4163 | brnz %r16, ibp_wait80_137 |
| 4164 | ld [%r23], %r16 |
| 4165 | ba ibp_startwait80_137 |
| 4166 | mov 0x80, %r16 |
| 4167 | continue_ibp_80_137: |
| 4168 | sllx %r16, %r8, %r16 !Mask for my core only |
| 4169 | ldxa [0x58]%asi, %r17 !Running_status |
| 4170 | wait_for_stat_80_137: |
| 4171 | ldxa [0x50]%asi, %r13 !Running_rw |
| 4172 | cmp %r13, %r17 |
| 4173 | bne,a %xcc, wait_for_stat_80_137 |
| 4174 | ldxa [0x58]%asi, %r17 !Running_status |
| 4175 | stxa %r16, [0x68]%asi !Park (W1C) |
| 4176 | ldxa [0x50]%asi, %r14 !Running_rw |
| 4177 | wait_for_ibp_80_137: |
| 4178 | ldxa [0x58]%asi, %r17 !Running_status |
| 4179 | cmp %r14, %r17 |
| 4180 | bne,a %xcc, wait_for_ibp_80_137 |
| 4181 | ldxa [0x50]%asi, %r14 !Running_rw |
| 4182 | ibp_doit80_137: |
| 4183 | best_set_reg(0x0000004024f6fecf,%r19, %r20) |
| 4184 | stxa %r20, [%r18]0x42 |
| 4185 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 4186 | st %g0, [%r23] !clear lock |
| 4187 | wr %r0, %r12, %asi !restore %asi |
| 4188 | ta T_CHANGE_NONHPRIV |
| 4189 | .word 0xd69fc032 ! 200: LDDA_R ldda [%r31, %r18] 0x01, %r11 |
| 4190 | splash_tick_80_138: |
| 4191 | nop |
| 4192 | ta T_CHANGE_HPRIV |
| 4193 | best_set_reg(0x4cb51b45869aa791, %r16, %r17) |
| 4194 | .word 0x89800011 ! 201: WRTICK_R wr %r0, %r17, %tick |
| 4195 | cmpenall_80_139: |
| 4196 | nop |
| 4197 | nop |
| 4198 | ta T_CHANGE_HPRIV |
| 4199 | rd %asi, %r12 |
| 4200 | wr %r0, 0x41, %asi |
| 4201 | set sync_thr_counter4, %r23 |
| 4202 | #ifndef SPC |
| 4203 | ldxa [%g0]0x63, %r8 |
| 4204 | and %r8, 0x38, %r8 ! Core ID |
| 4205 | add %r8, %r23, %r23 |
| 4206 | mov 0xff, %r9 |
| 4207 | sllx %r9, %r8, %r9 ! My core mask |
| 4208 | #else |
| 4209 | mov 0xff, %r9 ! My core mask |
| 4210 | #endif |
| 4211 | cmpenall_startwait80_139: |
| 4212 | mov 0x80, %r10 |
| 4213 | cas [%r23],%g0,%r10 !lock |
| 4214 | brz,a %r10, continue_cmpenall_80_139 |
| 4215 | nop |
| 4216 | cmpenall_wait80_139: |
| 4217 | ld [%r23], %r10 |
| 4218 | brnz %r10, cmpenall_wait80_139 |
| 4219 | nop |
| 4220 | ba,a cmpenall_startwait80_139 |
| 4221 | continue_cmpenall_80_139: |
| 4222 | ldxa [0x58]%asi, %r14 !Running_status |
| 4223 | wait_for_cmpstat_80_139: |
| 4224 | ldxa [0x50]%asi, %r13 !Running_rw |
| 4225 | cmp %r13, %r14 |
| 4226 | bne,a %xcc, wait_for_cmpstat_80_139 |
| 4227 | ldxa [0x58]%asi, %r14 !Running_status |
| 4228 | ldxa [0x10]%asi, %r14 !Get enabled threads |
| 4229 | and %r14, %r9, %r14 !My core mask |
| 4230 | stxa %r14, [0x60]%asi !W1S |
| 4231 | ldxa [0x58]%asi, %r16 !Running_status |
| 4232 | wait_for_cmpstat2_80_139: |
| 4233 | and %r16, %r9, %r16 !My core mask |
| 4234 | cmp %r14, %r16 |
| 4235 | bne,a %xcc, wait_for_cmpstat2_80_139 |
| 4236 | ldxa [0x58]%asi, %r16 !Running_status |
| 4237 | st %g0, [%r23] !clear lock |
| 4238 | nop |
| 4239 | nop |
| 4240 | ta T_CHANGE_PRIV |
| 4241 | wrpr %g0, %g0, %gl |
| 4242 | nop |
| 4243 | nop |
| 4244 | setx join_lbl_0_0, %g1, %g2 |
| 4245 | jmp %g2 |
| 4246 | nop |
| 4247 | fork_lbl_0_7: |
| 4248 | ta T_CHANGE_NONHPRIV |
| 4249 | vahole_40_0: |
| 4250 | nop |
| 4251 | ta T_CHANGE_NONHPRIV |
| 4252 | setx vahole_target1, %r18, %r27 |
| 4253 | jmpl %r27+0, %r27 |
| 4254 | cwp_40_1: |
| 4255 | set user_data_start, %o7 |
| 4256 | .word 0x93902005 ! 1: WRPR_CWP_I wrpr %r0, 0x0005, %cwp |
| 4257 | pmu_40_2: |
| 4258 | nop |
| 4259 | ta T_CHANGE_PRIV |
| 4260 | setx 0xfffffdfffffff2ae, %g1, %g7 |
| 4261 | .word 0xa3800007 ! 2: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 4262 | .word 0xd337c000 ! 3: STQF_R - %f9, [%r0, %r31] |
| 4263 | fpinit_40_3: |
| 4264 | nop |
| 4265 | setx fp_data_quads, %r19, %r20 |
| 4266 | ldd [%r20], %f0 |
| 4267 | ldd [%r20+8], %f4 |
| 4268 | ld [%r20+16], %fsr |
| 4269 | ld [%r20+24], %r19 |
| 4270 | wr %r19, %g0, %gsr |
| 4271 | .word 0x87a80a44 ! 4: FCMPd fcmpd %fcc<n>, %f0, %f4 |
| 4272 | .word 0x8d802004 ! 5: WRFPRS_I wr %r0, 0x0004, %fprs |
| 4273 | .word 0x35400001 ! 1: FBPUE fbue,a,pn %fcc0, <label_0x1> |
| 4274 | .word 0x8d903838 ! 6: WRPR_PSTATE_I wrpr %r0, 0x1838, %pstate |
| 4275 | brcommon1_40_5: |
| 4276 | nop |
| 4277 | setx common_target, %r12, %r27 |
| 4278 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 4279 | ba,a .+12 |
| 4280 | .word 0x93a7c9ca ! 1: FDIVd fdivd %f62, %f10, %f40 |
| 4281 | ba,a .+8 |
| 4282 | jmpl %r27+0, %r27 |
| 4283 | .word 0x95b0c7d1 ! 7: PDIST pdistn %d34, %d48, %d10 |
| 4284 | .word 0xe277e088 ! 8: STX_I stx %r17, [%r31 + 0x0088] |
| 4285 | ibp_40_6: |
| 4286 | nop |
| 4287 | .word 0xe3e7e012 ! 9: CASA_R casa [%r31] %asi, %r18, %r17 |
| 4288 | .word 0x95520000 ! 10: RDPR_PIL <illegal instruction> |
| 4289 | .word 0x21400001 ! 1: FBPN fbn,a,pn %fcc0, <label_0x1> |
| 4290 | .word 0x8d9038ad ! 11: WRPR_PSTATE_I wrpr %r0, 0x18ad, %pstate |
| 4291 | .word 0xe537c000 ! 12: STQF_R - %f18, [%r0, %r31] |
| 4292 | .word 0xe48008a0 ! 13: LDUWA_R lduwa [%r0, %r0] 0x45, %r18 |
| 4293 | .word 0xa3520000 ! 14: RDPR_PIL <illegal instruction> |
| 4294 | mondo_40_8: |
| 4295 | nop |
| 4296 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 4297 | ta T_CHANGE_PRIV |
| 4298 | stxa %r17, [%r0+0x3e0] %asi |
| 4299 | .word 0x9d940011 ! 15: WRPR_WSTATE_R wrpr %r16, %r17, %wstate |
| 4300 | jmptr_40_9: |
| 4301 | nop |
| 4302 | best_set_reg(0xe1200000, %r20, %r27) |
| 4303 | .word 0xb7c6c000 ! 16: JMPL_R jmpl %r27 + %r0, %r27 |
| 4304 | #if (defined SPC || defined CMP1) |
| 4305 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_10) + 56, 16, 16)) -> intp(0,0,2) |
| 4306 | #else |
| 4307 | setx 0x40218a2acfdd3f18, %r1, %r28 |
| 4308 | stxa %r28, [%g0] 0x73 |
| 4309 | #endif |
| 4310 | intvec_40_10: |
| 4311 | .word 0x39400001 ! 17: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 4312 | nop |
| 4313 | ta T_CHANGE_HPRIV ! macro |
| 4314 | donret_40_11: |
| 4315 | rd %pc, %r12 |
| 4316 | add %r12, (donretarg_40_11-donret_40_11+4), %r12 |
| 4317 | add %r12, 0x4, %r11 ! seq tnpc |
| 4318 | wrpr %g0, 0x1, %tl |
| 4319 | wrpr %g0, %r12, %tpc |
| 4320 | wrpr %g0, %r11, %tnpc |
| 4321 | set (0x00057c00 | (0x4f << 24)), %r13 |
| 4322 | and %r12, 0xfff, %r14 |
| 4323 | sllx %r14, 30, %r14 |
| 4324 | or %r13, %r14, %r20 |
| 4325 | wrpr %r20, %g0, %tstate |
| 4326 | wrhpr %g0, 0xd1b, %htstate |
| 4327 | ta T_CHANGE_NONPRIV ! rand=0 (40) |
| 4328 | .word 0x3b400001 ! 1: FBPLE fble,a,pn %fcc0, <label_0x1> |
| 4329 | done |
| 4330 | donretarg_40_11: |
| 4331 | .word 0xd8ffe1f2 ! 18: SWAPA_I swapa %r12, [%r31 + 0x01f2] %asi |
| 4332 | splash_hpstate_40_12: |
| 4333 | .word 0x81983b97 ! 19: WRHPR_HPSTATE_I wrhpr %r0, 0x1b97, %hpstate |
| 4334 | .word 0xab818008 ! 20: WR_CLEAR_SOFTINT_R wr %r6, %r8, %clear_softint |
| 4335 | splash_cmpr_40_13: |
| 4336 | mov 1, %r18 |
| 4337 | sllx %r18, 63, %r18 |
| 4338 | rd %tick, %r17 |
| 4339 | add %r17, 0x60, %r17 |
| 4340 | or %r17, %r18, %r17 |
| 4341 | ta T_CHANGE_HPRIV |
| 4342 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 4343 | ta T_CHANGE_PRIV |
| 4344 | .word 0xaf800011 ! 21: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 4345 | trapasi_40_14: |
| 4346 | nop |
| 4347 | mov 0x10, %r1 ! (VA for ASI 0x4c) |
| 4348 | .word 0xd8904980 ! 22: LDUHA_R lduha [%r1, %r0] 0x4c, %r12 |
| 4349 | .word 0xd8c7e0d8 ! 23: LDSWA_I ldswa [%r31, + 0x00d8] %asi, %r12 |
| 4350 | .word 0x8d903808 ! 24: WRPR_PSTATE_I wrpr %r0, 0x1808, %pstate |
| 4351 | nop |
| 4352 | ta T_CHANGE_HPRIV |
| 4353 | mov 0x40, %r10 |
| 4354 | set sync_thr_counter6, %r23 |
| 4355 | #ifndef SPC |
| 4356 | ldxa [%g0]0x63, %o1 |
| 4357 | and %o1, 0x38, %o1 |
| 4358 | add %o1, %r23, %r23 |
| 4359 | #endif |
| 4360 | cas [%r23],%g0,%r10 !lock |
| 4361 | brnz %r10, sma_40_16 |
| 4362 | rd %asi, %r12 |
| 4363 | wr %g0, 0x40, %asi |
| 4364 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 4365 | set 0x00021fff, %g1 |
| 4366 | stxa %g1, [%g0 + 0x80] %asi |
| 4367 | wr %r12, %g0, %asi |
| 4368 | st %g0, [%r23] |
| 4369 | sma_40_16: |
| 4370 | ta T_CHANGE_NONHPRIV |
| 4371 | .word 0xd9e7e00b ! 25: CASA_R casa [%r31] %asi, %r11, %r12 |
| 4372 | brcommon3_40_17: |
| 4373 | nop |
| 4374 | setx common_target, %r12, %r27 |
| 4375 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 4376 | ba,a .+12 |
| 4377 | .word 0xd937c00a ! 1: STQF_R - %f12, [%r10, %r31] |
| 4378 | ba,a .+8 |
| 4379 | jmpl %r27+0, %r27 |
| 4380 | .word 0xd83fe060 ! 26: STD_I std %r12, [%r31 + 0x0060] |
| 4381 | trapasi_40_18: |
| 4382 | nop |
| 4383 | mov 0x0, %r1 ! (VA for ASI 0x73) |
| 4384 | .word 0xd8d84e60 ! 27: LDXA_R ldxa [%r1, %r0] 0x73, %r12 |
| 4385 | ceter_40_19: |
| 4386 | nop |
| 4387 | ta T_CHANGE_HPRIV |
| 4388 | mov 4, %r17 |
| 4389 | sllx %r17, 60, %r17 |
| 4390 | mov 0x18, %r16 |
| 4391 | stxa %r17, [%r16]0x4c |
| 4392 | ta T_CHANGE_NONHPRIV |
| 4393 | .word 0xa3410000 ! 28: RDTICK rd %tick, %r17 |
| 4394 | splash_cmpr_40_20: |
| 4395 | mov 0, %r18 |
| 4396 | sllx %r18, 63, %r18 |
| 4397 | rd %tick, %r17 |
| 4398 | add %r17, 0x100, %r17 |
| 4399 | or %r17, %r18, %r17 |
| 4400 | ta T_CHANGE_HPRIV |
| 4401 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 4402 | ta T_CHANGE_PRIV |
| 4403 | .word 0xb3800011 ! 29: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 4404 | memptr_40_21: |
| 4405 | set user_data_start, %r31 |
| 4406 | .word 0x8584ee0e ! 30: WRCCR_I wr %r19, 0x0e0e, %ccr |
| 4407 | .word 0x94814012 ! 31: ADDcc_R addcc %r5, %r18, %r10 |
| 4408 | .word 0xc1bfe100 ! 32: STDFA_I stda %f0, [0x0100, %r31] |
| 4409 | set 0xa53, %l3 |
| 4410 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT |
| 4411 | .word 0x95b487c8 ! 33: PDIST pdistn %d18, %d8, %d10 |
| 4412 | brcommon3_40_22: |
| 4413 | nop |
| 4414 | setx common_target, %r12, %r27 |
| 4415 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 4416 | ba,a .+12 |
| 4417 | .word 0xdb37e090 ! 1: STQF_I - %f13, [0x0090, %r31] |
| 4418 | ba,a .+8 |
| 4419 | jmpl %r27+0, %r27 |
| 4420 | .word 0xdb3fc011 ! 34: STDF_R std %f13, [%r17, %r31] |
| 4421 | .word 0xdac7e1c0 ! 35: LDSWA_I ldswa [%r31, + 0x01c0] %asi, %r13 |
| 4422 | ibp_40_23: |
| 4423 | nop |
| 4424 | ta T_CHANGE_NONHPRIV |
| 4425 | .word 0xc1bfe0e0 ! 36: STDFA_I stda %f0, [0x00e0, %r31] |
| 4426 | .word 0x8d802000 ! 37: WRFPRS_I wr %r0, 0x0000, %fprs |
| 4427 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 4428 | reduce_priv_lvl_40_24: |
| 4429 | ta T_CHANGE_NONPRIV ! macro |
| 4430 | trapasi_40_25: |
| 4431 | nop |
| 4432 | mov 0x38, %r1 ! (VA for ASI 0x50) |
| 4433 | .word 0xdac04a00 ! 39: LDSWA_R ldswa [%r1, %r0] 0x50, %r13 |
| 4434 | brcommon1_40_26: |
| 4435 | nop |
| 4436 | setx common_target, %r12, %r27 |
| 4437 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 4438 | ba,a .+12 |
| 4439 | .word 0xc32fe100 ! 1: STXFSR_I st-sfr %f1, [0x0100, %r31] |
| 4440 | ba,a .+8 |
| 4441 | jmpl %r27+0, %r27 |
| 4442 | .word 0x9f802fb5 ! 40: SIR sir 0x0fb5 |
| 4443 | ibp_40_27: |
| 4444 | nop |
| 4445 | .word 0xd51fc014 ! 41: LDDF_R ldd [%r31, %r20], %f10 |
| 4446 | .word 0xa9a000d0 ! 42: FNEGd fnegd %f16, %f20 |
| 4447 | nop |
| 4448 | ta T_CHANGE_HPRIV |
| 4449 | mov 0x40+1, %r10 |
| 4450 | set sync_thr_counter5, %r23 |
| 4451 | #ifndef SPC |
| 4452 | ldxa [%g0]0x63, %o1 |
| 4453 | and %o1, 0x38, %o1 |
| 4454 | add %o1, %r23, %r23 |
| 4455 | sllx %o1, 5, %o3 !(CID*256) |
| 4456 | #endif |
| 4457 | cas [%r23],%g0,%r10 !lock |
| 4458 | brnz %r10, cwq_40_28 |
| 4459 | rd %asi, %r12 |
| 4460 | wr %g0, 0x40, %asi |
| 4461 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 4462 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 4463 | cmp %l1, 1 |
| 4464 | bne cwq_40_28 |
| 4465 | set CWQ_BASE, %l6 |
| 4466 | #ifndef SPC |
| 4467 | add %l6, %o3, %l6 |
| 4468 | #endif |
| 4469 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 4470 | best_set_reg(0x20610040, %l1, %l2) !# Control Word |
| 4471 | sllx %l2, 32, %l2 |
| 4472 | stx %l2, [%l6 + 0x0] |
| 4473 | membar #Sync |
| 4474 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 4475 | sub %l2, 0x40, %l2 |
| 4476 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 4477 | wr %r12, %g0, %asi |
| 4478 | st %g0, [%r23] |
| 4479 | cwq_40_28: |
| 4480 | ta T_CHANGE_NONHPRIV |
| 4481 | .word 0xa7414000 ! 43: RDPC rd %pc, %r19 |
| 4482 | splash_htba_40_29: |
| 4483 | nop |
| 4484 | ta T_CHANGE_HPRIV |
| 4485 | setx 0x0000000200280000, %r11, %r12 |
| 4486 | .word 0x8b98000c ! 44: WRHPR_HTBA_R wrhpr %r0, %r12, %htba |
| 4487 | #if (defined SPC || defined CMP1) |
| 4488 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_30) + 24, 16, 16)) -> intp(7,0,31) |
| 4489 | #else |
| 4490 | setx 0x2b150df48f3e7f8d, %r1, %r28 |
| 4491 | stxa %r28, [%g0] 0x73 |
| 4492 | #endif |
| 4493 | intvec_40_30: |
| 4494 | .word 0x39400001 ! 45: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 4495 | .word 0x35400001 ! 1: FBPUE fbue,a,pn %fcc0, <label_0x1> |
| 4496 | .word 0x8d9033c1 ! 46: WRPR_PSTATE_I wrpr %r0, 0x13c1, %pstate |
| 4497 | ibp_40_32: |
| 4498 | nop |
| 4499 | .word 0xe19fe160 ! 47: LDDFA_I ldda [%r31, 0x0160], %f16 |
| 4500 | .word 0xe537c000 ! 48: STQF_R - %f18, [%r0, %r31] |
| 4501 | ibp_40_33: |
| 4502 | nop |
| 4503 | ta T_CHANGE_NONHPRIV |
| 4504 | .word 0xc19fdc00 ! 49: LDDFA_R ldda [%r31, %r0], %f0 |
| 4505 | ibp_40_34: |
| 4506 | nop |
| 4507 | ta T_CHANGE_NONHPRIV |
| 4508 | .word 0xa7a249d2 ! 50: FDIVd fdivd %f40, %f18, %f50 |
| 4509 | .word 0x8d903499 ! 51: WRPR_PSTATE_I wrpr %r0, 0x1499, %pstate |
| 4510 | .word 0xe24fc000 ! 52: LDSB_R ldsb [%r31 + %r0], %r17 |
| 4511 | .word 0xe2c7e1b0 ! 53: LDSWA_I ldswa [%r31, + 0x01b0] %asi, %r17 |
| 4512 | .word 0xe33fe0ec ! 54: STDF_I std %f17, [0x00ec, %r31] |
| 4513 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 4514 | reduce_priv_lvl_40_36: |
| 4515 | ta T_CHANGE_NONHPRIV ! macro |
| 4516 | intveclr_40_37: |
| 4517 | nop |
| 4518 | ta T_CHANGE_HPRIV |
| 4519 | setx 0x993c466124f30190, %r1, %r28 |
| 4520 | stxa %r28, [%g0] 0x72 |
| 4521 | .word 0x25400001 ! 56: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 4522 | ibp_40_38: |
| 4523 | nop |
| 4524 | ta T_CHANGE_NONHPRIV |
| 4525 | .word 0xe31fc013 ! 57: LDDF_R ldd [%r31, %r19], %f17 |
| 4526 | .word 0x97524000 ! 58: RDPR_CWP <illegal instruction> |
| 4527 | ibp_40_39: |
| 4528 | nop |
| 4529 | ta T_CHANGE_NONHPRIV |
| 4530 | .word 0xc1bfe0e0 ! 59: STDFA_I stda %f0, [0x00e0, %r31] |
| 4531 | mondo_40_40: |
| 4532 | nop |
| 4533 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 4534 | stxa %r16, [%r0+0x3c8] %asi |
| 4535 | .word 0x9d940013 ! 60: WRPR_WSTATE_R wrpr %r16, %r19, %wstate |
| 4536 | ibp_40_41: |
| 4537 | nop |
| 4538 | .word 0xe19fe180 ! 61: LDDFA_I ldda [%r31, 0x0180], %f16 |
| 4539 | .word 0xe8dfe150 ! 62: LDXA_I ldxa [%r31, + 0x0150] %asi, %r20 |
| 4540 | .word 0x879a4001 ! 63: WRHPR_HINTP_R wrhpr %r9, %r1, %hintp |
| 4541 | #if (defined SPC || defined CMP1) |
| 4542 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_42) + 16, 16, 16)) -> intp(0,0,20) |
| 4543 | #else |
| 4544 | setx 0xd1a5926505c9e975, %r1, %r28 |
| 4545 | stxa %r28, [%g0] 0x73 |
| 4546 | #endif |
| 4547 | intvec_40_42: |
| 4548 | .word 0x39400001 ! 64: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 4549 | iaw_40_43: |
| 4550 | nop |
| 4551 | ta T_CHANGE_HPRIV |
| 4552 | mov 8, %r18 |
| 4553 | rd %asi, %r12 |
| 4554 | wr %r0, 0x41, %asi |
| 4555 | set sync_thr_counter4, %r23 |
| 4556 | #ifndef SPC |
| 4557 | ldxa [%g0]0x63, %r8 |
| 4558 | and %r8, 0x38, %r8 ! Core ID |
| 4559 | add %r8, %r23, %r23 |
| 4560 | #else |
| 4561 | mov 0, %r8 |
| 4562 | #endif |
| 4563 | mov 0x40, %r16 |
| 4564 | iaw_startwait40_43: |
| 4565 | cas [%r23],%g0,%r16 !lock |
| 4566 | brz,a %r16, continue_iaw_40_43 |
| 4567 | mov (~0x40&0xf0), %r16 |
| 4568 | ld [%r23], %r16 |
| 4569 | iaw_wait40_43: |
| 4570 | brnz %r16, iaw_wait40_43 |
| 4571 | ld [%r23], %r16 |
| 4572 | ba iaw_startwait40_43 |
| 4573 | mov 0x40, %r16 |
| 4574 | continue_iaw_40_43: |
| 4575 | sllx %r16, %r8, %r16 !Mask for my core only |
| 4576 | ldxa [0x58]%asi, %r17 !Running_status |
| 4577 | wait_for_stat_40_43: |
| 4578 | ldxa [0x50]%asi, %r13 !Running_rw |
| 4579 | cmp %r13, %r17 |
| 4580 | bne,a %xcc, wait_for_stat_40_43 |
| 4581 | ldxa [0x58]%asi, %r17 !Running_status |
| 4582 | stxa %r16, [0x68]%asi !Park (W1C) |
| 4583 | ldxa [0x50]%asi, %r14 !Running_rw |
| 4584 | wait_for_iaw_40_43: |
| 4585 | ldxa [0x58]%asi, %r17 !Running_status |
| 4586 | cmp %r14, %r17 |
| 4587 | bne,a %xcc, wait_for_iaw_40_43 |
| 4588 | ldxa [0x50]%asi, %r14 !Running_rw |
| 4589 | iaw_doit40_43: |
| 4590 | mov 0x38, %r18 |
| 4591 | iaw1_40_43: |
| 4592 | best_set_reg(0x00000000e0a00000, %r20, %r19) |
| 4593 | or %r19, 0x1, %r19 |
| 4594 | stxa %r19, [%r18]0x50 |
| 4595 | stxa %r16, [0x60] %asi ! Unpark (W1S) |
| 4596 | st %g0, [%r23] !clear lock |
| 4597 | wr %r0, %r12, %asi ! restore %asi |
| 4598 | ta T_CHANGE_NONHPRIV |
| 4599 | .word 0xc1bfe180 ! 65: STDFA_I stda %f0, [0x0180, %r31] |
| 4600 | ibp_40_44: |
| 4601 | nop |
| 4602 | .word 0xe1bfdb60 ! 66: STDFA_R stda %f16, [%r0, %r31] |
| 4603 | ibp_40_45: |
| 4604 | nop |
| 4605 | .word 0x9f802110 ! 67: SIR sir 0x0110 |
| 4606 | .word 0xe927e1c4 ! 68: STF_I st %f20, [0x01c4, %r31] |
| 4607 | mondo_40_46: |
| 4608 | nop |
| 4609 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 4610 | ta T_CHANGE_PRIV |
| 4611 | stxa %r17, [%r0+0x3e0] %asi |
| 4612 | .word 0x9d95000b ! 69: WRPR_WSTATE_R wrpr %r20, %r11, %wstate |
| 4613 | .word 0xb180c013 ! 70: WR_STICK_REG_R wr %r3, %r19, %- |
| 4614 | br_badelay3_40_47: |
| 4615 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> |
| 4616 | .word 0x20800001 ! 1: BN bn,a <label_0x1> |
| 4617 | .word 0xe9114011 ! 1: LDQF_R - [%r5, %r17], %f20 |
| 4618 | .word 0x99a34831 ! 71: FADDs fadds %f13, %f17, %f12 |
| 4619 | fpinit_40_48: |
| 4620 | nop |
| 4621 | setx fp_data_quads, %r19, %r20 |
| 4622 | ldd [%r20], %f0 |
| 4623 | ldd [%r20+8], %f4 |
| 4624 | ld [%r20+16], %fsr |
| 4625 | ld [%r20+24], %r19 |
| 4626 | wr %r19, %g0, %gsr |
| 4627 | .word 0x8db00484 ! 72: FCMPLE32 fcmple32 %d0, %d4, %r6 |
| 4628 | brcommon2_40_49: |
| 4629 | nop |
| 4630 | setx common_target, %r12, %r27 |
| 4631 | ba,a .+12 |
| 4632 | .word 0x9f802010 ! 1: SIR sir 0x0010 |
| 4633 | ba,a .+8 |
| 4634 | jmpl %r27+0, %r27 |
| 4635 | .word 0xc19fe040 ! 73: LDDFA_I ldda [%r31, 0x0040], %f0 |
| 4636 | #if (defined SPC || defined CMP1) |
| 4637 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_50) + 16, 16, 16)) -> intp(3,0,13) |
| 4638 | #else |
| 4639 | setx 0x68694e631f5cf077, %r1, %r28 |
| 4640 | stxa %r28, [%g0] 0x73 |
| 4641 | #endif |
| 4642 | intvec_40_50: |
| 4643 | .word 0x39400001 ! 74: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 4644 | .word 0xc32fc000 ! 75: STXFSR_R st-sfr %f1, [%r0, %r31] |
| 4645 | intveclr_40_51: |
| 4646 | nop |
| 4647 | ta T_CHANGE_HPRIV |
| 4648 | setx 0x1fb539b6e61b25b0, %r1, %r28 |
| 4649 | stxa %r28, [%g0] 0x72 |
| 4650 | ta T_CHANGE_NONHPRIV |
| 4651 | .word 0x25400001 ! 76: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 4652 | brcommon3_40_52: |
| 4653 | nop |
| 4654 | setx common_target, %r12, %r27 |
| 4655 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 4656 | ba,a .+12 |
| 4657 | .word 0xdb37e180 ! 1: STQF_I - %f13, [0x0180, %r31] |
| 4658 | ba,a .+8 |
| 4659 | jmpl %r27+0, %r27 |
| 4660 | .word 0xda3fe190 ! 77: STD_I std %r13, [%r31 + 0x0190] |
| 4661 | .word 0xa982c010 ! 78: WR_SET_SOFTINT_R wr %r11, %r16, %set_softint |
| 4662 | .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 4663 | .word 0x8d9037fc ! 79: WRPR_PSTATE_I wrpr %r0, 0x17fc, %pstate |
| 4664 | splash_lsu_40_54: |
| 4665 | nop |
| 4666 | ta T_CHANGE_HPRIV |
| 4667 | set 0x84c8b38e, %r2 |
| 4668 | mov 0x2, %r1 |
| 4669 | sllx %r1, 32, %r1 |
| 4670 | or %r1, %r2, %r2 |
| 4671 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 4672 | ta T_CHANGE_NONHPRIV |
| 4673 | .word 0x3d400001 ! 80: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 4674 | splash_lsu_40_55: |
| 4675 | nop |
| 4676 | ta T_CHANGE_HPRIV |
| 4677 | set 0x602894de, %r2 |
| 4678 | mov 0x4, %r1 |
| 4679 | sllx %r1, 32, %r1 |
| 4680 | or %r1, %r2, %r2 |
| 4681 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 4682 | .word 0x3d400001 ! 81: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 4683 | nop |
| 4684 | ta T_CHANGE_HPRIV ! macro |
| 4685 | donret_40_56: |
| 4686 | rd %pc, %r12 |
| 4687 | add %r12, (donretarg_40_56-donret_40_56+4), %r12 |
| 4688 | add %r12, 0x4, %r11 ! seq tnpc |
| 4689 | wrpr %g0, 0x2, %tl |
| 4690 | wrpr %g0, %r12, %tpc |
| 4691 | wrpr %g0, %r11, %tnpc |
| 4692 | set (0x000cc700 | (4 << 24)), %r13 |
| 4693 | and %r12, 0xfff, %r14 |
| 4694 | sllx %r14, 30, %r14 |
| 4695 | or %r13, %r14, %r20 |
| 4696 | wrpr %r20, %g0, %tstate |
| 4697 | wrhpr %g0, 0xc5f, %htstate |
| 4698 | ta T_CHANGE_NONHPRIV ! rand=1 (40) |
| 4699 | retry |
| 4700 | donretarg_40_56: |
| 4701 | .word 0xa1a209ca ! 82: FDIVd fdivd %f8, %f10, %f16 |
| 4702 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 4703 | reduce_priv_lvl_40_57: |
| 4704 | ta T_CHANGE_NONHPRIV ! macro |
| 4705 | dvapa_40_58: |
| 4706 | nop |
| 4707 | ta T_CHANGE_HPRIV |
| 4708 | mov 0x91f, %r20 |
| 4709 | mov 0x15, %r19 |
| 4710 | sllx %r20, 23, %r20 |
| 4711 | or %r19, %r20, %r19 |
| 4712 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 4713 | mov 0x38, %r18 |
| 4714 | stxa %r31, [%r18]0x58 |
| 4715 | ta T_CHANGE_NONHPRIV |
| 4716 | .word 0xc3ea4023 ! 84: PREFETCHA_R prefetcha [%r9, %r3] 0x01, #one_read |
| 4717 | nop |
| 4718 | ta T_CHANGE_HPRIV ! macro |
| 4719 | donret_40_59: |
| 4720 | rd %pc, %r12 |
| 4721 | add %r12, (donretarg_40_59-donret_40_59), %r12 |
| 4722 | add %r12, 0x8, %r11 ! nonseq tnpc |
| 4723 | wrpr %g0, 0x2, %tl |
| 4724 | wrpr %g0, %r12, %tpc |
| 4725 | wrpr %g0, %r11, %tnpc |
| 4726 | set (0x009d3000 | (0x4f << 24)), %r13 |
| 4727 | and %r12, 0xfff, %r14 |
| 4728 | sllx %r14, 30, %r14 |
| 4729 | or %r13, %r14, %r20 |
| 4730 | wrpr %r20, %g0, %tstate |
| 4731 | wrhpr %g0, 0x189f, %htstate |
| 4732 | ta T_CHANGE_NONPRIV ! rand=0 (40) |
| 4733 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> |
| 4734 | done |
| 4735 | donretarg_40_59: |
| 4736 | .word 0xd86fe1ed ! 85: LDSTUB_I ldstub %r12, [%r31 + 0x01ed] |
| 4737 | trapasi_40_60: |
| 4738 | nop |
| 4739 | mov 0x30, %r1 ! (VA for ASI 0x5b) |
| 4740 | .word 0xd8d04b60 ! 86: LDSHA_R ldsha [%r1, %r0] 0x5b, %r12 |
| 4741 | otherw |
| 4742 | mov 0xb5, %r30 |
| 4743 | .word 0x91d0001e ! 87: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 4744 | pmu_40_61: |
| 4745 | nop |
| 4746 | setx 0xfffffbddfffff767, %g1, %g7 |
| 4747 | .word 0xa3800007 ! 88: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 4748 | .word 0x89800011 ! 89: WRTICK_R wr %r0, %r17, %tick |
| 4749 | dvapa_40_63: |
| 4750 | nop |
| 4751 | ta T_CHANGE_HPRIV |
| 4752 | mov 0xb60, %r20 |
| 4753 | mov 0xe, %r19 |
| 4754 | sllx %r20, 23, %r20 |
| 4755 | or %r19, %r20, %r19 |
| 4756 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 4757 | mov 0x38, %r18 |
| 4758 | stxa %r31, [%r18]0x58 |
| 4759 | ta T_CHANGE_NONHPRIV |
| 4760 | .word 0xd89fe190 ! 90: LDDA_I ldda [%r31, + 0x0190] %asi, %r12 |
| 4761 | .word 0xd857e020 ! 91: LDSH_I ldsh [%r31 + 0x0020], %r12 |
| 4762 | .word 0xb1844008 ! 92: WR_STICK_REG_R wr %r17, %r8, %- |
| 4763 | .word 0xd89fdc40 ! 93: LDDA_R ldda [%r31, %r0] 0xe2, %r12 |
| 4764 | splash_hpstate_40_64: |
| 4765 | .word 0x22800001 ! 1: BE be,a <label_0x1> |
| 4766 | .word 0x81982a83 ! 94: WRHPR_HPSTATE_I wrhpr %r0, 0x0a83, %hpstate |
| 4767 | .word 0xc30fc000 ! 95: LDXFSR_R ld-fsr [%r31, %r0], %f1 |
| 4768 | brcommon1_40_65: |
| 4769 | nop |
| 4770 | setx common_target, %r12, %r27 |
| 4771 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 4772 | ba,a .+12 |
| 4773 | .word 0x997020b0 ! 1: POPC_I popc 0x00b0, %r12 |
| 4774 | ba,a .+8 |
| 4775 | jmpl %r27+0, %r27 |
| 4776 | .word 0xa7a2c9c7 ! 96: FDIVd fdivd %f42, %f38, %f50 |
| 4777 | .word 0x9f802124 ! 97: SIR sir 0x0124 |
| 4778 | intveclr_40_66: |
| 4779 | nop |
| 4780 | ta T_CHANGE_HPRIV |
| 4781 | setx 0xf8dafe02273c0ea4, %r1, %r28 |
| 4782 | stxa %r28, [%g0] 0x72 |
| 4783 | ta T_CHANGE_NONHPRIV |
| 4784 | .word 0x25400001 ! 98: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 4785 | .word 0x89800011 ! 99: WRTICK_R wr %r0, %r17, %tick |
| 4786 | splash_tba_40_68: |
| 4787 | nop |
| 4788 | ta T_CHANGE_PRIV |
| 4789 | set 0x120000, %r12 |
| 4790 | .word 0x8b90000c ! 100: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 4791 | brcommon1_40_69: |
| 4792 | nop |
| 4793 | setx common_target, %r12, %r27 |
| 4794 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 4795 | ba,a .+12 |
| 4796 | .word 0xd06fe1a0 ! 1: LDSTUB_I ldstub %r8, [%r31 + 0x01a0] |
| 4797 | ba,a .+8 |
| 4798 | jmpl %r27+0, %r27 |
| 4799 | .word 0x9f80365e ! 101: SIR sir 0x165e |
| 4800 | intveclr_40_70: |
| 4801 | nop |
| 4802 | ta T_CHANGE_HPRIV |
| 4803 | setx 0x704dca06abd2ad68, %r1, %r28 |
| 4804 | stxa %r28, [%g0] 0x72 |
| 4805 | .word 0x25400001 ! 102: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 4806 | setx 0xe5db76574d3cc38b, %r1, %r28 |
| 4807 | stxa %r28, [%g0] 0x73 |
| 4808 | intvec_40_71: |
| 4809 | .word 0x39400001 ! 103: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 4810 | nop |
| 4811 | ta T_CHANGE_HPRIV ! macro |
| 4812 | donret_40_72: |
| 4813 | rd %pc, %r12 |
| 4814 | add %r12, (donretarg_40_72-donret_40_72), %r12 |
| 4815 | add %r12, 0x8, %r11 ! nonseq tnpc |
| 4816 | wrpr %g0, 0x2, %tl |
| 4817 | wrpr %g0, %r12, %tpc |
| 4818 | wrpr %g0, %r11, %tnpc |
| 4819 | set (0x0015dc00 | (0x4f << 24)), %r13 |
| 4820 | and %r12, 0xfff, %r14 |
| 4821 | sllx %r14, 30, %r14 |
| 4822 | or %r13, %r14, %r20 |
| 4823 | wrpr %r20, %g0, %tstate |
| 4824 | wrhpr %g0, 0x1645, %htstate |
| 4825 | ta T_CHANGE_NONHPRIV ! rand=1 (40) |
| 4826 | .word 0x20800001 ! 1: BN bn,a <label_0x1> |
| 4827 | retry |
| 4828 | donretarg_40_72: |
| 4829 | .word 0x22ca4001 ! 104: BRZ brz,a,pt %r9,<label_0xa4001> |
| 4830 | intveclr_40_73: |
| 4831 | nop |
| 4832 | ta T_CHANGE_HPRIV |
| 4833 | setx 0xc45040a223c703c0, %r1, %r28 |
| 4834 | stxa %r28, [%g0] 0x72 |
| 4835 | ta T_CHANGE_NONHPRIV |
| 4836 | .word 0x25400001 ! 105: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 4837 | iaw_40_74: |
| 4838 | nop |
| 4839 | ta T_CHANGE_HPRIV |
| 4840 | mov 8, %r18 |
| 4841 | rd %asi, %r12 |
| 4842 | wr %r0, 0x41, %asi |
| 4843 | set sync_thr_counter4, %r23 |
| 4844 | #ifndef SPC |
| 4845 | ldxa [%g0]0x63, %r8 |
| 4846 | and %r8, 0x38, %r8 ! Core ID |
| 4847 | add %r8, %r23, %r23 |
| 4848 | #else |
| 4849 | mov 0, %r8 |
| 4850 | #endif |
| 4851 | mov 0x40, %r16 |
| 4852 | iaw_startwait40_74: |
| 4853 | cas [%r23],%g0,%r16 !lock |
| 4854 | brz,a %r16, continue_iaw_40_74 |
| 4855 | mov (~0x40&0xf0), %r16 |
| 4856 | ld [%r23], %r16 |
| 4857 | iaw_wait40_74: |
| 4858 | brnz %r16, iaw_wait40_74 |
| 4859 | ld [%r23], %r16 |
| 4860 | ba iaw_startwait40_74 |
| 4861 | mov 0x40, %r16 |
| 4862 | continue_iaw_40_74: |
| 4863 | sllx %r16, %r8, %r16 !Mask for my core only |
| 4864 | ldxa [0x58]%asi, %r17 !Running_status |
| 4865 | wait_for_stat_40_74: |
| 4866 | ldxa [0x50]%asi, %r13 !Running_rw |
| 4867 | cmp %r13, %r17 |
| 4868 | bne,a %xcc, wait_for_stat_40_74 |
| 4869 | ldxa [0x58]%asi, %r17 !Running_status |
| 4870 | stxa %r16, [0x68]%asi !Park (W1C) |
| 4871 | ldxa [0x50]%asi, %r14 !Running_rw |
| 4872 | wait_for_iaw_40_74: |
| 4873 | ldxa [0x58]%asi, %r17 !Running_status |
| 4874 | cmp %r14, %r17 |
| 4875 | bne,a %xcc, wait_for_iaw_40_74 |
| 4876 | ldxa [0x50]%asi, %r14 !Running_rw |
| 4877 | iaw_doit40_74: |
| 4878 | mov 0x38, %r18 |
| 4879 | iaw1_40_74: |
| 4880 | best_set_reg(0x00000000e1a00000, %r20, %r19) |
| 4881 | or %r19, 0x1, %r19 |
| 4882 | stxa %r19, [%r18]0x50 |
| 4883 | stxa %r16, [0x60] %asi ! Unpark (W1S) |
| 4884 | st %g0, [%r23] !clear lock |
| 4885 | wr %r0, %r12, %asi ! restore %asi |
| 4886 | ta T_CHANGE_NONHPRIV |
| 4887 | .word 0xc1bfe1a0 ! 106: STDFA_I stda %f0, [0x01a0, %r31] |
| 4888 | ta T_CHANGE_NONHPRIV |
| 4889 | .word 0x8143e011 ! 107: MEMBAR membar #LoadLoad | #Lookaside |
| 4890 | .word 0xc32fc000 ! 108: STXFSR_R st-sfr %f1, [%r0, %r31] |
| 4891 | fble skip_40_76 |
| 4892 | brnz,a,pt %r5, skip_40_76 |
| 4893 | .align 1024 |
| 4894 | skip_40_76: |
| 4895 | .word 0x39400001 ! 109: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 4896 | .word 0xc1bfe1a0 ! 110: STDFA_I stda %f0, [0x01a0, %r31] |
| 4897 | intveclr_40_77: |
| 4898 | nop |
| 4899 | ta T_CHANGE_HPRIV |
| 4900 | setx 0x891906cc4a6f85c9, %r1, %r28 |
| 4901 | stxa %r28, [%g0] 0x72 |
| 4902 | ta T_CHANGE_NONHPRIV |
| 4903 | .word 0x25400001 ! 111: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 4904 | splash_cmpr_40_78: |
| 4905 | mov 1, %r18 |
| 4906 | sllx %r18, 63, %r18 |
| 4907 | rd %tick, %r17 |
| 4908 | add %r17, 0x80, %r17 |
| 4909 | or %r17, %r18, %r17 |
| 4910 | ta T_CHANGE_HPRIV |
| 4911 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 4912 | ta T_CHANGE_PRIV |
| 4913 | .word 0xb3800011 ! 112: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 4914 | .word 0xc1bfe1e0 ! 113: STDFA_I stda %f0, [0x01e0, %r31] |
| 4915 | unsupttte_40_79: |
| 4916 | nop |
| 4917 | ta T_CHANGE_HPRIV |
| 4918 | mov 1, %r20 |
| 4919 | sllx %r20, 63, %r20 |
| 4920 | or %r20, 2,%r20 |
| 4921 | stxa %r20, [%g0]0x5c ! D unsupported page size .. |
| 4922 | ta T_CHANGE_NONHPRIV |
| 4923 | .word 0xa9b28485 ! 114: FCMPLE32 fcmple32 %d10, %d36, %r20 |
| 4924 | tagged_40_80: |
| 4925 | tsubcctv %r16, 0x1e04, %r20 |
| 4926 | .word 0xd807e1a3 ! 115: LDUW_I lduw [%r31 + 0x01a3], %r12 |
| 4927 | .word 0xa4d04010 ! 116: UMULcc_R umulcc %r1, %r16, %r18 |
| 4928 | setx 0x77b0255033ceb82e, %r1, %r28 |
| 4929 | stxa %r28, [%g0] 0x73 |
| 4930 | intvec_40_81: |
| 4931 | .word 0x39400001 ! 117: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 4932 | trapasi_40_82: |
| 4933 | nop |
| 4934 | mov 0x28, %r1 ! (VA for ASI 0x5a) |
| 4935 | .word 0xd2d84b40 ! 118: LDXA_R ldxa [%r1, %r0] 0x5a, %r9 |
| 4936 | .word 0x2acac001 ! 1: BRNZ brnz,a,pt %r11,<label_0xac001> |
| 4937 | .word 0x8d902679 ! 119: WRPR_PSTATE_I wrpr %r0, 0x0679, %pstate |
| 4938 | ibp_40_84: |
| 4939 | nop |
| 4940 | .word 0x9f802030 ! 120: SIR sir 0x0030 |
| 4941 | nop |
| 4942 | ta T_CHANGE_HPRIV |
| 4943 | mov 0x40, %r10 |
| 4944 | set sync_thr_counter6, %r23 |
| 4945 | #ifndef SPC |
| 4946 | ldxa [%g0]0x63, %o1 |
| 4947 | and %o1, 0x38, %o1 |
| 4948 | add %o1, %r23, %r23 |
| 4949 | #endif |
| 4950 | cas [%r23],%g0,%r10 !lock |
| 4951 | brnz %r10, sma_40_85 |
| 4952 | rd %asi, %r12 |
| 4953 | wr %g0, 0x40, %asi |
| 4954 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 4955 | set 0x000a1fff, %g1 |
| 4956 | stxa %g1, [%g0 + 0x80] %asi |
| 4957 | wr %r12, %g0, %asi |
| 4958 | st %g0, [%r23] |
| 4959 | sma_40_85: |
| 4960 | ta T_CHANGE_NONHPRIV |
| 4961 | .word 0xd3e7e012 ! 121: CASA_R casa [%r31] %asi, %r18, %r9 |
| 4962 | fpinit_40_86: |
| 4963 | nop |
| 4964 | setx fp_data_quads, %r19, %r20 |
| 4965 | ldd [%r20], %f0 |
| 4966 | ldd [%r20+8], %f4 |
| 4967 | ld [%r20+16], %fsr |
| 4968 | ld [%r20+24], %r19 |
| 4969 | wr %r19, %g0, %gsr |
| 4970 | .word 0xc3e82159 ! 122: PREFETCHA_I prefetcha [%r0, + 0x0159] %asi, #one_read |
| 4971 | .word 0x91948013 ! 123: WRPR_PIL_R wrpr %r18, %r19, %pil |
| 4972 | intveclr_40_88: |
| 4973 | nop |
| 4974 | ta T_CHANGE_HPRIV |
| 4975 | setx 0x231fe7cb70561ef7, %r1, %r28 |
| 4976 | stxa %r28, [%g0] 0x72 |
| 4977 | .word 0x25400001 ! 124: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 4978 | mondo_40_89: |
| 4979 | nop |
| 4980 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 4981 | stxa %r5, [%r0+0x3c8] %asi |
| 4982 | .word 0x9d944003 ! 125: WRPR_WSTATE_R wrpr %r17, %r3, %wstate |
| 4983 | nop |
| 4984 | ta T_CHANGE_HPRIV ! macro |
| 4985 | donret_40_90: |
| 4986 | rd %pc, %r12 |
| 4987 | add %r12, (donretarg_40_90-donret_40_90+4), %r12 |
| 4988 | add %r12, 0x4, %r11 ! seq tnpc |
| 4989 | wrpr %g0, 0x2, %tl |
| 4990 | wrpr %g0, %r12, %tpc |
| 4991 | wrpr %g0, %r11, %tnpc |
| 4992 | set (0x007ed700 | (16 << 24)), %r13 |
| 4993 | and %r12, 0xfff, %r14 |
| 4994 | sllx %r14, 30, %r14 |
| 4995 | or %r13, %r14, %r20 |
| 4996 | wrpr %r20, %g0, %tstate |
| 4997 | wrhpr %g0, 0x681, %htstate |
| 4998 | ta T_CHANGE_NONHPRIV ! rand=1 (40) |
| 4999 | retry |
| 5000 | donretarg_40_90: |
| 5001 | .word 0xd26fe18b ! 126: LDSTUB_I ldstub %r9, [%r31 + 0x018b] |
| 5002 | .word 0xd2cfe1a0 ! 127: LDSBA_I ldsba [%r31, + 0x01a0] %asi, %r9 |
| 5003 | .word 0xd23fe00a ! 128: STD_I std %r9, [%r31 + 0x000a] |
| 5004 | .word 0x8d802000 ! 129: WRFPRS_I wr %r0, 0x0000, %fprs |
| 5005 | .word 0x93d020b3 ! 130: Tcc_I tne icc_or_xcc, %r0 + 179 |
| 5006 | .word 0x99520000 ! 131: RDPR_PIL rdpr %pil, %r12 |
| 5007 | mondo_40_91: |
| 5008 | nop |
| 5009 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 5010 | ta T_CHANGE_PRIV |
| 5011 | stxa %r16, [%r0+0x3d8] %asi |
| 5012 | .word 0x9d948014 ! 132: WRPR_WSTATE_R wrpr %r18, %r20, %wstate |
| 5013 | #if (defined SPC || defined CMP1) |
| 5014 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_92) + 16, 16, 16)) -> intp(4,0,15) |
| 5015 | #else |
| 5016 | setx 0xcc45ffa5cd50e1e5, %r1, %r28 |
| 5017 | stxa %r28, [%g0] 0x73 |
| 5018 | #endif |
| 5019 | intvec_40_92: |
| 5020 | .word 0x39400001 ! 133: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 5021 | fpinit_40_93: |
| 5022 | nop |
| 5023 | setx fp_data_quads, %r19, %r20 |
| 5024 | ldd [%r20], %f0 |
| 5025 | ldd [%r20+8], %f4 |
| 5026 | ld [%r20+16], %fsr |
| 5027 | ld [%r20+24], %r19 |
| 5028 | wr %r19, %g0, %gsr |
| 5029 | .word 0x8da009c4 ! 134: FDIVd fdivd %f0, %f4, %f6 |
| 5030 | invalw |
| 5031 | mov 0xb0, %r30 |
| 5032 | .word 0x91d0001e ! 135: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 5033 | .word 0xe28008a0 ! 136: LDUWA_R lduwa [%r0, %r0] 0x45, %r17 |
| 5034 | ibp_40_94: |
| 5035 | nop |
| 5036 | .word 0xe23fe070 ! 137: STD_I std %r17, [%r31 + 0x0070] |
| 5037 | nop |
| 5038 | ta T_CHANGE_HPRIV |
| 5039 | mov 0x40+1, %r10 |
| 5040 | set sync_thr_counter5, %r23 |
| 5041 | #ifndef SPC |
| 5042 | ldxa [%g0]0x63, %o1 |
| 5043 | and %o1, 0x38, %o1 |
| 5044 | add %o1, %r23, %r23 |
| 5045 | sllx %o1, 5, %o3 !(CID*256) |
| 5046 | #endif |
| 5047 | cas [%r23],%g0,%r10 !lock |
| 5048 | brnz %r10, cwq_40_95 |
| 5049 | rd %asi, %r12 |
| 5050 | wr %g0, 0x40, %asi |
| 5051 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 5052 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 5053 | cmp %l1, 1 |
| 5054 | bne cwq_40_95 |
| 5055 | set CWQ_BASE, %l6 |
| 5056 | #ifndef SPC |
| 5057 | add %l6, %o3, %l6 |
| 5058 | #endif |
| 5059 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 5060 | best_set_reg(0x206100c0, %l1, %l2) !# Control Word |
| 5061 | sllx %l2, 32, %l2 |
| 5062 | stx %l2, [%l6 + 0x0] |
| 5063 | membar #Sync |
| 5064 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 5065 | sub %l2, 0x40, %l2 |
| 5066 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 5067 | wr %r12, %g0, %asi |
| 5068 | st %g0, [%r23] |
| 5069 | cwq_40_95: |
| 5070 | ta T_CHANGE_NONHPRIV |
| 5071 | .word 0xa9414000 ! 138: RDPC rd %pc, %r20 |
| 5072 | .word 0x87802014 ! 139: WRASI_I wr %r0, 0x0014, %asi |
| 5073 | #if (defined SPC || defined CMP1) |
| 5074 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_96) + 48, 16, 16)) -> intp(1,0,29) |
| 5075 | #else |
| 5076 | setx 0x14b750d5370ad80c, %r1, %r28 |
| 5077 | stxa %r28, [%g0] 0x73 |
| 5078 | #endif |
| 5079 | intvec_40_96: |
| 5080 | .word 0x39400001 ! 140: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 5081 | iaw_40_97: |
| 5082 | nop |
| 5083 | ta T_CHANGE_HPRIV |
| 5084 | mov 8, %r18 |
| 5085 | rd %asi, %r12 |
| 5086 | wr %r0, 0x41, %asi |
| 5087 | set sync_thr_counter4, %r23 |
| 5088 | #ifndef SPC |
| 5089 | ldxa [%g0]0x63, %r8 |
| 5090 | and %r8, 0x38, %r8 ! Core ID |
| 5091 | add %r8, %r23, %r23 |
| 5092 | #else |
| 5093 | mov 0, %r8 |
| 5094 | #endif |
| 5095 | mov 0x40, %r16 |
| 5096 | iaw_startwait40_97: |
| 5097 | cas [%r23],%g0,%r16 !lock |
| 5098 | brz,a %r16, continue_iaw_40_97 |
| 5099 | mov (~0x40&0xf0), %r16 |
| 5100 | ld [%r23], %r16 |
| 5101 | iaw_wait40_97: |
| 5102 | brnz %r16, iaw_wait40_97 |
| 5103 | ld [%r23], %r16 |
| 5104 | ba iaw_startwait40_97 |
| 5105 | mov 0x40, %r16 |
| 5106 | continue_iaw_40_97: |
| 5107 | sllx %r16, %r8, %r16 !Mask for my core only |
| 5108 | ldxa [0x58]%asi, %r17 !Running_status |
| 5109 | wait_for_stat_40_97: |
| 5110 | ldxa [0x50]%asi, %r13 !Running_rw |
| 5111 | cmp %r13, %r17 |
| 5112 | bne,a %xcc, wait_for_stat_40_97 |
| 5113 | ldxa [0x58]%asi, %r17 !Running_status |
| 5114 | stxa %r16, [0x68]%asi !Park (W1C) |
| 5115 | ldxa [0x50]%asi, %r14 !Running_rw |
| 5116 | wait_for_iaw_40_97: |
| 5117 | ldxa [0x58]%asi, %r17 !Running_status |
| 5118 | cmp %r14, %r17 |
| 5119 | bne,a %xcc, wait_for_iaw_40_97 |
| 5120 | ldxa [0x50]%asi, %r14 !Running_rw |
| 5121 | iaw_doit40_97: |
| 5122 | mov 0x38, %r18 |
| 5123 | iaw1_40_97: |
| 5124 | best_set_reg(0x00000000e0a00000, %r20, %r19) |
| 5125 | or %r19, 0x1, %r19 |
| 5126 | stxa %r19, [%r18]0x50 |
| 5127 | stxa %r16, [0x60] %asi ! Unpark (W1S) |
| 5128 | st %g0, [%r23] !clear lock |
| 5129 | wr %r0, %r12, %asi ! restore %asi |
| 5130 | ta T_CHANGE_NONHPRIV |
| 5131 | .word 0xe11fe150 ! 141: LDDF_I ldd [%r31, 0x0150], %f16 |
| 5132 | dvapa_40_98: |
| 5133 | nop |
| 5134 | ta T_CHANGE_HPRIV |
| 5135 | mov 0xa0c, %r20 |
| 5136 | mov 0x14, %r19 |
| 5137 | sllx %r20, 23, %r20 |
| 5138 | or %r19, %r20, %r19 |
| 5139 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 5140 | mov 0x38, %r18 |
| 5141 | stxa %r31, [%r18]0x58 |
| 5142 | ta T_CHANGE_NONHPRIV |
| 5143 | .word 0xa5b307c3 ! 142: PDIST pdistn %d12, %d34, %d18 |
| 5144 | nop |
| 5145 | ta T_CHANGE_HPRIV ! macro |
| 5146 | donret_40_99: |
| 5147 | rd %pc, %r12 |
| 5148 | add %r12, (donretarg_40_99-donret_40_99+4), %r12 |
| 5149 | add %r12, 0x4, %r11 ! seq tnpc |
| 5150 | wrpr %g0, 0x1, %tl |
| 5151 | wrpr %g0, %r12, %tpc |
| 5152 | wrpr %g0, %r11, %tnpc |
| 5153 | set (0x00c81c00 | (16 << 24)), %r13 |
| 5154 | and %r12, 0xfff, %r14 |
| 5155 | sllx %r14, 30, %r14 |
| 5156 | or %r13, %r14, %r20 |
| 5157 | wrpr %r20, %g0, %tstate |
| 5158 | wrhpr %g0, 0x1d9e, %htstate |
| 5159 | ta T_CHANGE_NONHPRIV ! rand=1 (40) |
| 5160 | .word 0x3b400001 ! 1: FBPLE fble,a,pn %fcc0, <label_0x1> |
| 5161 | done |
| 5162 | donretarg_40_99: |
| 5163 | .word 0x25400001 ! 143: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 5164 | .word 0xe477e168 ! 144: STX_I stx %r18, [%r31 + 0x0168] |
| 5165 | .word 0x8d902420 ! 145: WRPR_PSTATE_I wrpr %r0, 0x0420, %pstate |
| 5166 | .word 0xe48008a0 ! 146: LDUWA_R lduwa [%r0, %r0] 0x45, %r18 |
| 5167 | trapasi_40_101: |
| 5168 | nop |
| 5169 | mov 0x3e0, %r1 ! (VA for ASI 0x25) |
| 5170 | .word 0xe4c844a0 ! 147: LDSBA_R ldsba [%r1, %r0] 0x25, %r18 |
| 5171 | ibp_40_102: |
| 5172 | nop |
| 5173 | .word 0xe4dfc02a ! 148: LDXA_R ldxa [%r31, %r10] 0x01, %r18 |
| 5174 | setx 0xa71a203e8c1963f9, %r1, %r28 |
| 5175 | stxa %r28, [%g0] 0x73 |
| 5176 | intvec_40_103: |
| 5177 | .word 0x39400001 ! 149: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 5178 | mondo_40_104: |
| 5179 | nop |
| 5180 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 5181 | stxa %r20, [%r0+0x3d8] %asi |
| 5182 | .word 0x9d91c005 ! 150: WRPR_WSTATE_R wrpr %r7, %r5, %wstate |
| 5183 | setx 0x365f2bd8da875216, %r1, %r28 |
| 5184 | stxa %r28, [%g0] 0x73 |
| 5185 | intvec_40_105: |
| 5186 | .word 0x39400001 ! 151: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 5187 | ibp_40_106: |
| 5188 | nop |
| 5189 | .word 0x9f802000 ! 152: SIR sir 0x0000 |
| 5190 | trapasi_40_107: |
| 5191 | nop |
| 5192 | mov 0x0, %r1 ! (VA for ASI 0x72) |
| 5193 | .word 0xe4d04e40 ! 153: LDSHA_R ldsha [%r1, %r0] 0x72, %r18 |
| 5194 | .word 0x9f80244a ! 154: SIR sir 0x044a |
| 5195 | splash_cmpr_40_108: |
| 5196 | mov 0, %r18 |
| 5197 | sllx %r18, 63, %r18 |
| 5198 | rd %tick, %r17 |
| 5199 | add %r17, 0x80, %r17 |
| 5200 | or %r17, %r18, %r17 |
| 5201 | .word 0xb3800011 ! 155: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 5202 | intveclr_40_109: |
| 5203 | nop |
| 5204 | ta T_CHANGE_HPRIV |
| 5205 | setx 0xce9732f127ef21b4, %r1, %r28 |
| 5206 | stxa %r28, [%g0] 0x72 |
| 5207 | ta T_CHANGE_NONHPRIV |
| 5208 | .word 0x25400001 ! 156: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 5209 | ibp_40_110: |
| 5210 | nop |
| 5211 | .word 0xa5a449b3 ! 157: FDIVs fdivs %f17, %f19, %f18 |
| 5212 | .word 0xc32fc000 ! 158: STXFSR_R st-sfr %f1, [%r0, %r31] |
| 5213 | iaw_40_111: |
| 5214 | nop |
| 5215 | ta T_CHANGE_HPRIV |
| 5216 | mov 8, %r18 |
| 5217 | rd %asi, %r12 |
| 5218 | wr %r0, 0x41, %asi |
| 5219 | set sync_thr_counter4, %r23 |
| 5220 | #ifndef SPC |
| 5221 | ldxa [%g0]0x63, %r8 |
| 5222 | and %r8, 0x38, %r8 ! Core ID |
| 5223 | add %r8, %r23, %r23 |
| 5224 | #else |
| 5225 | mov 0, %r8 |
| 5226 | #endif |
| 5227 | mov 0x40, %r16 |
| 5228 | iaw_startwait40_111: |
| 5229 | cas [%r23],%g0,%r16 !lock |
| 5230 | brz,a %r16, continue_iaw_40_111 |
| 5231 | mov (~0x40&0xf0), %r16 |
| 5232 | ld [%r23], %r16 |
| 5233 | iaw_wait40_111: |
| 5234 | brnz %r16, iaw_wait40_111 |
| 5235 | ld [%r23], %r16 |
| 5236 | ba iaw_startwait40_111 |
| 5237 | mov 0x40, %r16 |
| 5238 | continue_iaw_40_111: |
| 5239 | sllx %r16, %r8, %r16 !Mask for my core only |
| 5240 | ldxa [0x58]%asi, %r17 !Running_status |
| 5241 | wait_for_stat_40_111: |
| 5242 | ldxa [0x50]%asi, %r13 !Running_rw |
| 5243 | cmp %r13, %r17 |
| 5244 | bne,a %xcc, wait_for_stat_40_111 |
| 5245 | ldxa [0x58]%asi, %r17 !Running_status |
| 5246 | stxa %r16, [0x68]%asi !Park (W1C) |
| 5247 | ldxa [0x50]%asi, %r14 !Running_rw |
| 5248 | wait_for_iaw_40_111: |
| 5249 | ldxa [0x58]%asi, %r17 !Running_status |
| 5250 | cmp %r14, %r17 |
| 5251 | bne,a %xcc, wait_for_iaw_40_111 |
| 5252 | ldxa [0x50]%asi, %r14 !Running_rw |
| 5253 | iaw_doit40_111: |
| 5254 | mov 0x38, %r18 |
| 5255 | iaw4_40_111: |
| 5256 | setx common_target, %r20, %r19 |
| 5257 | or %r19, 0x1, %r19 |
| 5258 | stxa %r19, [%r18]0x50 |
| 5259 | stxa %r16, [0x60] %asi ! Unpark (W1S) |
| 5260 | st %g0, [%r23] !clear lock |
| 5261 | wr %r0, %r12, %asi ! restore %asi |
| 5262 | ta T_CHANGE_NONHPRIV |
| 5263 | .word 0xe19fc3e0 ! 159: LDDFA_R ldda [%r31, %r0], %f16 |
| 5264 | .word 0x9f802442 ! 160: SIR sir 0x0442 |
| 5265 | splash_hpstate_40_112: |
| 5266 | .word 0x2f400001 ! 1: FBPU fbu,a,pn %fcc0, <label_0x1> |
| 5267 | .word 0x81983745 ! 161: WRHPR_HPSTATE_I wrhpr %r0, 0x1745, %hpstate |
| 5268 | .word 0xe327e1a6 ! 162: STF_I st %f17, [0x01a6, %r31] |
| 5269 | .word 0x91d020b2 ! 163: Tcc_I ta icc_or_xcc, %r0 + 178 |
| 5270 | mondo_40_113: |
| 5271 | nop |
| 5272 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 5273 | stxa %r16, [%r0+0x3e8] %asi |
| 5274 | .word 0x9d948011 ! 164: WRPR_WSTATE_R wrpr %r18, %r17, %wstate |
| 5275 | br_badelay2_40_114: |
| 5276 | .word 0x20800001 ! 1: BN bn,a <label_0x1> |
| 5277 | allclean |
| 5278 | .word 0x93b48312 ! 165: ALIGNADDRESS alignaddr %r18, %r18, %r9 |
| 5279 | fpinit_40_115: |
| 5280 | nop |
| 5281 | setx fp_data_quads, %r19, %r20 |
| 5282 | ldd [%r20], %f0 |
| 5283 | ldd [%r20+8], %f4 |
| 5284 | ld [%r20+16], %fsr |
| 5285 | ld [%r20+24], %r19 |
| 5286 | wr %r19, %g0, %gsr |
| 5287 | .word 0xc3e826bd ! 166: PREFETCHA_I prefetcha [%r0, + 0x06bd] %asi, #one_read |
| 5288 | set 0x3d0a, %l3 |
| 5289 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT |
| 5290 | .word 0x99b507d3 ! 167: PDIST pdistn %d20, %d50, %d12 |
| 5291 | memptr_40_116: |
| 5292 | set 0x60740000, %r31 |
| 5293 | .word 0x85847a59 ! 168: WRCCR_I wr %r17, 0x1a59, %ccr |
| 5294 | .word 0xd4c7e1b8 ! 169: LDSWA_I ldswa [%r31, + 0x01b8] %asi, %r10 |
| 5295 | setx 0x183e3ee36b04d092, %r1, %r28 |
| 5296 | stxa %r28, [%g0] 0x73 |
| 5297 | intvec_40_117: |
| 5298 | .word 0x39400001 ! 170: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 5299 | splash_hpstate_40_118: |
| 5300 | .word 0x819824cc ! 171: WRHPR_HPSTATE_I wrhpr %r0, 0x04cc, %hpstate |
| 5301 | mondo_40_119: |
| 5302 | nop |
| 5303 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 5304 | ta T_CHANGE_PRIV |
| 5305 | stxa %r16, [%r0+0x3d8] %asi |
| 5306 | .word 0x9d90c004 ! 172: WRPR_WSTATE_R wrpr %r3, %r4, %wstate |
| 5307 | nop |
| 5308 | ta T_CHANGE_HPRIV |
| 5309 | mov 0x40+1, %r10 |
| 5310 | set sync_thr_counter5, %r23 |
| 5311 | #ifndef SPC |
| 5312 | ldxa [%g0]0x63, %o1 |
| 5313 | and %o1, 0x38, %o1 |
| 5314 | add %o1, %r23, %r23 |
| 5315 | sllx %o1, 5, %o3 !(CID*256) |
| 5316 | #endif |
| 5317 | cas [%r23],%g0,%r10 !lock |
| 5318 | brnz %r10, cwq_40_120 |
| 5319 | rd %asi, %r12 |
| 5320 | wr %g0, 0x40, %asi |
| 5321 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 5322 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 5323 | cmp %l1, 1 |
| 5324 | bne cwq_40_120 |
| 5325 | set CWQ_BASE, %l6 |
| 5326 | #ifndef SPC |
| 5327 | add %l6, %o3, %l6 |
| 5328 | #endif |
| 5329 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 5330 | best_set_reg(0x20610010, %l1, %l2) !# Control Word |
| 5331 | sllx %l2, 32, %l2 |
| 5332 | stx %l2, [%l6 + 0x0] |
| 5333 | membar #Sync |
| 5334 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 5335 | sub %l2, 0x40, %l2 |
| 5336 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 5337 | wr %r12, %g0, %asi |
| 5338 | st %g0, [%r23] |
| 5339 | cwq_40_120: |
| 5340 | ta T_CHANGE_NONHPRIV |
| 5341 | .word 0x9b414000 ! 173: RDPC rd %pc, %r13 |
| 5342 | ibp_40_121: |
| 5343 | nop |
| 5344 | ta T_CHANGE_NONHPRIV |
| 5345 | .word 0xc1bfd920 ! 174: STDFA_R stda %f0, [%r0, %r31] |
| 5346 | .word 0xd4800b80 ! 175: LDUWA_R lduwa [%r0, %r0] 0x5c, %r10 |
| 5347 | .word 0x8d802004 ! 176: WRFPRS_I wr %r0, 0x0004, %fprs |
| 5348 | #if (defined SPC || defined CMP1) |
| 5349 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_122) + 16, 16, 16)) -> intp(6,0,0) |
| 5350 | #else |
| 5351 | setx 0x62c87d869b6e6900, %r1, %r28 |
| 5352 | stxa %r28, [%g0] 0x73 |
| 5353 | #endif |
| 5354 | intvec_40_122: |
| 5355 | .word 0x39400001 ! 177: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 5356 | setx 0xd30aa2f6ecfbe24c, %r1, %r28 |
| 5357 | stxa %r28, [%g0] 0x73 |
| 5358 | intvec_40_123: |
| 5359 | .word 0x39400001 ! 178: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 5360 | .word 0x91d020b2 ! 179: Tcc_I ta icc_or_xcc, %r0 + 178 |
| 5361 | #if (defined SPC || defined CMP1) |
| 5362 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_40_124) + 56, 16, 16)) -> intp(0,0,25) |
| 5363 | #else |
| 5364 | setx 0xa3310c34c11ea95d, %r1, %r28 |
| 5365 | stxa %r28, [%g0] 0x73 |
| 5366 | #endif |
| 5367 | intvec_40_124: |
| 5368 | .word 0x39400001 ! 180: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 5369 | fpinit_40_125: |
| 5370 | nop |
| 5371 | setx fp_data_quads, %r19, %r20 |
| 5372 | ldd [%r20], %f0 |
| 5373 | ldd [%r20+8], %f4 |
| 5374 | ld [%r20+16], %fsr |
| 5375 | ld [%r20+24], %r19 |
| 5376 | wr %r19, %g0, %gsr |
| 5377 | .word 0xc3e83c6d ! 181: PREFETCHA_I prefetcha [%r0, + 0xfffffc6d] %asi, #one_read |
| 5378 | splash_tba_40_126: |
| 5379 | nop |
| 5380 | ta T_CHANGE_PRIV |
| 5381 | setx 0x0000000400380000, %r11, %r12 |
| 5382 | .word 0x8b90000c ! 182: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 5383 | fpinit_40_127: |
| 5384 | nop |
| 5385 | setx fp_data_quads, %r19, %r20 |
| 5386 | ldd [%r20], %f0 |
| 5387 | ldd [%r20+8], %f4 |
| 5388 | ld [%r20+16], %fsr |
| 5389 | ld [%r20+24], %r19 |
| 5390 | wr %r19, %g0, %gsr |
| 5391 | .word 0x87a80a44 ! 183: FCMPd fcmpd %fcc<n>, %f0, %f4 |
| 5392 | .word 0xd4dfe050 ! 184: LDXA_I ldxa [%r31, + 0x0050] %asi, %r10 |
| 5393 | nop |
| 5394 | ta T_CHANGE_HPRIV |
| 5395 | mov 0x40+1, %r10 |
| 5396 | set sync_thr_counter5, %r23 |
| 5397 | #ifndef SPC |
| 5398 | ldxa [%g0]0x63, %o1 |
| 5399 | and %o1, 0x38, %o1 |
| 5400 | add %o1, %r23, %r23 |
| 5401 | sllx %o1, 5, %o3 !(CID*256) |
| 5402 | #endif |
| 5403 | cas [%r23],%g0,%r10 !lock |
| 5404 | brnz %r10, cwq_40_128 |
| 5405 | rd %asi, %r12 |
| 5406 | wr %g0, 0x40, %asi |
| 5407 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 5408 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 5409 | cmp %l1, 1 |
| 5410 | bne cwq_40_128 |
| 5411 | set CWQ_BASE, %l6 |
| 5412 | #ifndef SPC |
| 5413 | add %l6, %o3, %l6 |
| 5414 | #endif |
| 5415 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 5416 | best_set_reg(0x20610030, %l1, %l2) !# Control Word |
| 5417 | sllx %l2, 32, %l2 |
| 5418 | stx %l2, [%l6 + 0x0] |
| 5419 | membar #Sync |
| 5420 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 5421 | sub %l2, 0x40, %l2 |
| 5422 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 5423 | wr %r12, %g0, %asi |
| 5424 | st %g0, [%r23] |
| 5425 | cwq_40_128: |
| 5426 | ta T_CHANGE_NONHPRIV |
| 5427 | .word 0x97414000 ! 185: RDPC rd %pc, %r11 |
| 5428 | intveclr_40_129: |
| 5429 | nop |
| 5430 | ta T_CHANGE_HPRIV |
| 5431 | setx 0xe98035f9fa6dc0c4, %r1, %r28 |
| 5432 | stxa %r28, [%g0] 0x72 |
| 5433 | ta T_CHANGE_NONHPRIV |
| 5434 | .word 0x25400001 ! 186: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 5435 | memptr_40_130: |
| 5436 | set 0x60540000, %r31 |
| 5437 | .word 0x858262d9 ! 187: WRCCR_I wr %r9, 0x02d9, %ccr |
| 5438 | .word 0x91948012 ! 188: WRPR_PIL_R wrpr %r18, %r18, %pil |
| 5439 | .word 0xa5a0016c ! 189: FABSq dis not found |
| 5440 | |
| 5441 | .word 0xe8800ae0 ! 190: LDUWA_R lduwa [%r0, %r0] 0x57, %r20 |
| 5442 | .word 0x81580000 ! 191: FLUSHW flushw |
| 5443 | splash_cmpr_40_133: |
| 5444 | mov 0, %r18 |
| 5445 | sllx %r18, 63, %r18 |
| 5446 | rd %tick, %r17 |
| 5447 | add %r17, 0x80, %r17 |
| 5448 | or %r17, %r18, %r17 |
| 5449 | ta T_CHANGE_PRIV |
| 5450 | .word 0xb3800011 ! 192: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 5451 | .word 0xe877c000 ! 193: STX_R stx %r20, [%r31 + %r0] |
| 5452 | ceter_40_134: |
| 5453 | nop |
| 5454 | ta T_CHANGE_HPRIV |
| 5455 | mov 7, %r17 |
| 5456 | sllx %r17, 60, %r17 |
| 5457 | mov 0x18, %r16 |
| 5458 | stxa %r17, [%r16]0x4c |
| 5459 | ta T_CHANGE_NONHPRIV |
| 5460 | .word 0x93410000 ! 194: RDTICK rd %tick, %r9 |
| 5461 | .word 0x8d802004 ! 195: WRFPRS_I wr %r0, 0x0004, %fprs |
| 5462 | .word 0xa9520000 ! 196: RDPR_PIL rdpr %pil, %r20 |
| 5463 | setx 0x6f8e7ba93dfde0b1, %r1, %r28 |
| 5464 | stxa %r28, [%g0] 0x73 |
| 5465 | intvec_40_135: |
| 5466 | .word 0x39400001 ! 197: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 5467 | .word 0xd727e1f0 ! 198: STF_I st %f11, [0x01f0, %r31] |
| 5468 | ibp_40_136: |
| 5469 | nop |
| 5470 | .word 0xe1bfc2c0 ! 199: STDFA_R stda %f16, [%r0, %r31] |
| 5471 | ibp_40_137: |
| 5472 | nop |
| 5473 | ta T_CHANGE_NONHPRIV |
| 5474 | .word 0xc32fc010 ! 200: STXFSR_R st-sfr %f1, [%r16, %r31] |
| 5475 | .word 0x89800011 ! 201: WRTICK_R wr %r0, %r17, %tick |
| 5476 | nop |
| 5477 | nop |
| 5478 | ta T_CHANGE_PRIV |
| 5479 | wrpr %g0, %g0, %gl |
| 5480 | nop |
| 5481 | nop |
| 5482 | setx join_lbl_0_0, %g1, %g2 |
| 5483 | jmp %g2 |
| 5484 | nop |
| 5485 | fork_lbl_0_6: |
| 5486 | ta T_CHANGE_NONHPRIV |
| 5487 | vahole_20_0: |
| 5488 | nop |
| 5489 | ta T_CHANGE_NONHPRIV |
| 5490 | setx vahole_target1, %r18, %r27 |
| 5491 | jmpl %r27+0, %r27 |
| 5492 | cwp_20_1: |
| 5493 | set user_data_start, %o7 |
| 5494 | .word 0x93902003 ! 1: WRPR_CWP_I wrpr %r0, 0x0003, %cwp |
| 5495 | pmu_20_2: |
| 5496 | nop |
| 5497 | ta T_CHANGE_PRIV |
| 5498 | setx 0xfffffb2efffff9c8, %g1, %g7 |
| 5499 | .word 0xa3800007 ! 2: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 5500 | .word 0xd337c000 ! 3: STQF_R - %f9, [%r0, %r31] |
| 5501 | fpinit_20_3: |
| 5502 | nop |
| 5503 | setx fp_data_quads, %r19, %r20 |
| 5504 | ldd [%r20], %f0 |
| 5505 | ldd [%r20+8], %f4 |
| 5506 | ld [%r20+16], %fsr |
| 5507 | ld [%r20+24], %r19 |
| 5508 | wr %r19, %g0, %gsr |
| 5509 | .word 0x89b00484 ! 4: FCMPLE32 fcmple32 %d0, %d4, %r4 |
| 5510 | .word 0x8d802004 ! 5: WRFPRS_I wr %r0, 0x0004, %fprs |
| 5511 | .word 0x3d400001 ! 1: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 5512 | .word 0x8d903334 ! 6: WRPR_PSTATE_I wrpr %r0, 0x1334, %pstate |
| 5513 | brcommon1_20_5: |
| 5514 | nop |
| 5515 | setx common_target, %r12, %r27 |
| 5516 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 5517 | ba,a .+12 |
| 5518 | .word 0x93a7c9d0 ! 1: FDIVd fdivd %f62, %f16, %f40 |
| 5519 | ba,a .+8 |
| 5520 | jmpl %r27+0, %r27 |
| 5521 | .word 0x9f8033f7 ! 7: SIR sir 0x13f7 |
| 5522 | .word 0xe277e14c ! 8: STX_I stx %r17, [%r31 + 0x014c] |
| 5523 | ibp_20_6: |
| 5524 | nop |
| 5525 | .word 0xe29fc02c ! 9: LDDA_R ldda [%r31, %r12] 0x01, %r17 |
| 5526 | .word 0xa3520000 ! 10: RDPR_PIL <illegal instruction> |
| 5527 | .word 0x2cc98001 ! 1: BRGZ brgz,a,pt %r6,<label_0x98001> |
| 5528 | .word 0x8d903ec5 ! 11: WRPR_PSTATE_I wrpr %r0, 0x1ec5, %pstate |
| 5529 | .word 0xe537c000 ! 12: STQF_R - %f18, [%r0, %r31] |
| 5530 | .word 0xe48008a0 ! 13: LDUWA_R lduwa [%r0, %r0] 0x45, %r18 |
| 5531 | .word 0x93520000 ! 14: RDPR_PIL <illegal instruction> |
| 5532 | mondo_20_8: |
| 5533 | nop |
| 5534 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 5535 | ta T_CHANGE_PRIV |
| 5536 | stxa %r17, [%r0+0x3e8] %asi |
| 5537 | .word 0x9d904002 ! 15: WRPR_WSTATE_R wrpr %r1, %r2, %wstate |
| 5538 | jmptr_20_9: |
| 5539 | nop |
| 5540 | best_set_reg(0xe1a00000, %r20, %r27) |
| 5541 | .word 0xb7c6c000 ! 16: JMPL_R jmpl %r27 + %r0, %r27 |
| 5542 | #if (defined SPC || defined CMP1) |
| 5543 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_10) + 40, 16, 16)) -> intp(6,0,17) |
| 5544 | #else |
| 5545 | setx 0x255112c78ef0d900, %r1, %r28 |
| 5546 | stxa %r28, [%g0] 0x73 |
| 5547 | #endif |
| 5548 | intvec_20_10: |
| 5549 | .word 0x39400001 ! 17: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 5550 | nop |
| 5551 | ta T_CHANGE_HPRIV ! macro |
| 5552 | donret_20_11: |
| 5553 | rd %pc, %r12 |
| 5554 | add %r12, (donretarg_20_11-donret_20_11+4), %r12 |
| 5555 | add %r12, 0x4, %r11 ! seq tnpc |
| 5556 | wrpr %g0, 0x2, %tl |
| 5557 | wrpr %g0, %r12, %tpc |
| 5558 | wrpr %g0, %r11, %tnpc |
| 5559 | set (0x0076ee00 | (0x58 << 24)), %r13 |
| 5560 | and %r12, 0xfff, %r14 |
| 5561 | sllx %r14, 30, %r14 |
| 5562 | or %r13, %r14, %r20 |
| 5563 | wrpr %r20, %g0, %tstate |
| 5564 | wrhpr %g0, 0xe13, %htstate |
| 5565 | ta T_CHANGE_NONPRIV ! rand=0 (20) |
| 5566 | .word 0x29400001 ! 1: FBPL fbl,a,pn %fcc0, <label_0x1> |
| 5567 | done |
| 5568 | donretarg_20_11: |
| 5569 | .word 0xd8ffe1b0 ! 18: SWAPA_I swapa %r12, [%r31 + 0x01b0] %asi |
| 5570 | splash_hpstate_20_12: |
| 5571 | .word 0x81982187 ! 19: WRHPR_HPSTATE_I wrhpr %r0, 0x0187, %hpstate |
| 5572 | .word 0xab84400b ! 20: WR_CLEAR_SOFTINT_R wr %r17, %r11, %clear_softint |
| 5573 | splash_cmpr_20_13: |
| 5574 | mov 0, %r18 |
| 5575 | sllx %r18, 63, %r18 |
| 5576 | rd %tick, %r17 |
| 5577 | add %r17, 0x70, %r17 |
| 5578 | or %r17, %r18, %r17 |
| 5579 | ta T_CHANGE_HPRIV |
| 5580 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 5581 | ta T_CHANGE_PRIV |
| 5582 | .word 0xaf800011 ! 21: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 5583 | trapasi_20_14: |
| 5584 | nop |
| 5585 | mov 0x28, %r1 ! (VA for ASI 0x4c) |
| 5586 | .word 0xd8d84980 ! 22: LDXA_R ldxa [%r1, %r0] 0x4c, %r12 |
| 5587 | .word 0xd8c7e068 ! 23: LDSWA_I ldswa [%r31, + 0x0068] %asi, %r12 |
| 5588 | .word 0x8d90313a ! 24: WRPR_PSTATE_I wrpr %r0, 0x113a, %pstate |
| 5589 | nop |
| 5590 | ta T_CHANGE_HPRIV |
| 5591 | mov 0x20, %r10 |
| 5592 | set sync_thr_counter6, %r23 |
| 5593 | #ifndef SPC |
| 5594 | ldxa [%g0]0x63, %o1 |
| 5595 | and %o1, 0x38, %o1 |
| 5596 | add %o1, %r23, %r23 |
| 5597 | #endif |
| 5598 | cas [%r23],%g0,%r10 !lock |
| 5599 | brnz %r10, sma_20_16 |
| 5600 | rd %asi, %r12 |
| 5601 | wr %g0, 0x40, %asi |
| 5602 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 5603 | set 0x00061fff, %g1 |
| 5604 | stxa %g1, [%g0 + 0x80] %asi |
| 5605 | wr %r12, %g0, %asi |
| 5606 | st %g0, [%r23] |
| 5607 | sma_20_16: |
| 5608 | ta T_CHANGE_NONHPRIV |
| 5609 | .word 0xd9e7e011 ! 25: CASA_R casa [%r31] %asi, %r17, %r12 |
| 5610 | brcommon3_20_17: |
| 5611 | nop |
| 5612 | setx common_target, %r12, %r27 |
| 5613 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 5614 | ba,a .+12 |
| 5615 | .word 0xd937c012 ! 1: STQF_R - %f12, [%r18, %r31] |
| 5616 | ba,a .+8 |
| 5617 | jmpl %r27+0, %r27 |
| 5618 | .word 0xd897c02d ! 26: LDUHA_R lduha [%r31, %r13] 0x01, %r12 |
| 5619 | trapasi_20_18: |
| 5620 | nop |
| 5621 | mov 0x0, %r1 ! (VA for ASI 0x73) |
| 5622 | .word 0xd8d04e60 ! 27: LDSHA_R ldsha [%r1, %r0] 0x73, %r12 |
| 5623 | ceter_20_19: |
| 5624 | nop |
| 5625 | ta T_CHANGE_HPRIV |
| 5626 | mov 7, %r17 |
| 5627 | sllx %r17, 60, %r17 |
| 5628 | mov 0x18, %r16 |
| 5629 | stxa %r17, [%r16]0x4c |
| 5630 | ta T_CHANGE_NONHPRIV |
| 5631 | .word 0x93410000 ! 28: RDTICK rd %tick, %r9 |
| 5632 | splash_cmpr_20_20: |
| 5633 | mov 0, %r18 |
| 5634 | sllx %r18, 63, %r18 |
| 5635 | rd %tick, %r17 |
| 5636 | add %r17, 0x60, %r17 |
| 5637 | or %r17, %r18, %r17 |
| 5638 | ta T_CHANGE_HPRIV |
| 5639 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 5640 | ta T_CHANGE_PRIV |
| 5641 | .word 0xaf800011 ! 29: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 5642 | memptr_20_21: |
| 5643 | set user_data_start, %r31 |
| 5644 | .word 0x858525f7 ! 30: WRCCR_I wr %r20, 0x05f7, %ccr |
| 5645 | .word 0xa0820012 ! 31: ADDcc_R addcc %r8, %r18, %r16 |
| 5646 | .word 0xe1bfe040 ! 32: STDFA_I stda %f16, [0x0040, %r31] |
| 5647 | set 0x11f5, %l3 |
| 5648 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT |
| 5649 | .word 0x93b507c6 ! 33: PDIST pdistn %d20, %d6, %d40 |
| 5650 | brcommon3_20_22: |
| 5651 | nop |
| 5652 | setx common_target, %r12, %r27 |
| 5653 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 5654 | ba,a .+12 |
| 5655 | .word 0xdb37e070 ! 1: STQF_I - %f13, [0x0070, %r31] |
| 5656 | ba,a .+8 |
| 5657 | jmpl %r27+0, %r27 |
| 5658 | .word 0xdabfc02d ! 34: STDA_R stda %r13, [%r31 + %r13] 0x01 |
| 5659 | .word 0xdac7e1b8 ! 35: LDSWA_I ldswa [%r31, + 0x01b8] %asi, %r13 |
| 5660 | ibp_20_23: |
| 5661 | nop |
| 5662 | ta T_CHANGE_NONHPRIV |
| 5663 | .word 0xc1bfdf20 ! 36: STDFA_R stda %f0, [%r0, %r31] |
| 5664 | .word 0x8d802004 ! 37: WRFPRS_I wr %r0, 0x0004, %fprs |
| 5665 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 5666 | reduce_priv_lvl_20_24: |
| 5667 | ta T_CHANGE_NONPRIV ! macro |
| 5668 | trapasi_20_25: |
| 5669 | nop |
| 5670 | mov 0x18, %r1 ! (VA for ASI 0x50) |
| 5671 | .word 0xdad04a00 ! 39: LDSHA_R ldsha [%r1, %r0] 0x50, %r13 |
| 5672 | brcommon1_20_26: |
| 5673 | nop |
| 5674 | setx common_target, %r12, %r27 |
| 5675 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 5676 | ba,a .+12 |
| 5677 | .word 0xc32fe1b0 ! 1: STXFSR_I st-sfr %f1, [0x01b0, %r31] |
| 5678 | ba,a .+8 |
| 5679 | jmpl %r27+0, %r27 |
| 5680 | .word 0x99703e8f ! 40: POPC_I popc 0x1e8f, %r12 |
| 5681 | ibp_20_27: |
| 5682 | nop |
| 5683 | .word 0xd4bfc02a ! 41: STDA_R stda %r10, [%r31 + %r10] 0x01 |
| 5684 | .word 0x95a000cd ! 42: FNEGd fnegd %f44, %f10 |
| 5685 | nop |
| 5686 | ta T_CHANGE_HPRIV |
| 5687 | mov 0x20+1, %r10 |
| 5688 | set sync_thr_counter5, %r23 |
| 5689 | #ifndef SPC |
| 5690 | ldxa [%g0]0x63, %o1 |
| 5691 | and %o1, 0x38, %o1 |
| 5692 | add %o1, %r23, %r23 |
| 5693 | sllx %o1, 5, %o3 !(CID*256) |
| 5694 | #endif |
| 5695 | cas [%r23],%g0,%r10 !lock |
| 5696 | brnz %r10, cwq_20_28 |
| 5697 | rd %asi, %r12 |
| 5698 | wr %g0, 0x40, %asi |
| 5699 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 5700 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 5701 | cmp %l1, 1 |
| 5702 | bne cwq_20_28 |
| 5703 | set CWQ_BASE, %l6 |
| 5704 | #ifndef SPC |
| 5705 | add %l6, %o3, %l6 |
| 5706 | #endif |
| 5707 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 5708 | best_set_reg(0x20610010, %l1, %l2) !# Control Word |
| 5709 | sllx %l2, 32, %l2 |
| 5710 | stx %l2, [%l6 + 0x0] |
| 5711 | membar #Sync |
| 5712 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 5713 | sub %l2, 0x40, %l2 |
| 5714 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 5715 | wr %r12, %g0, %asi |
| 5716 | st %g0, [%r23] |
| 5717 | cwq_20_28: |
| 5718 | ta T_CHANGE_NONHPRIV |
| 5719 | .word 0x93414000 ! 43: RDPC rd %pc, %r9 |
| 5720 | splash_htba_20_29: |
| 5721 | nop |
| 5722 | ta T_CHANGE_HPRIV |
| 5723 | setx 0x00000002002a0000, %r11, %r12 |
| 5724 | .word 0x8b98000c ! 44: WRHPR_HTBA_R wrhpr %r0, %r12, %htba |
| 5725 | #if (defined SPC || defined CMP1) |
| 5726 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_30) + 16, 16, 16)) -> intp(3,0,16) |
| 5727 | #else |
| 5728 | setx 0xcebe73275bf2a154, %r1, %r28 |
| 5729 | stxa %r28, [%g0] 0x73 |
| 5730 | #endif |
| 5731 | intvec_20_30: |
| 5732 | .word 0x39400001 ! 45: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 5733 | .word 0x26ca0001 ! 1: BRLZ brlz,a,pt %r8,<label_0xa0001> |
| 5734 | .word 0x8d902948 ! 46: WRPR_PSTATE_I wrpr %r0, 0x0948, %pstate |
| 5735 | ibp_20_32: |
| 5736 | nop |
| 5737 | .word 0xe19fe180 ! 47: LDDFA_I ldda [%r31, 0x0180], %f16 |
| 5738 | .word 0xe537c000 ! 48: STQF_R - %f18, [%r0, %r31] |
| 5739 | ibp_20_33: |
| 5740 | nop |
| 5741 | ta T_CHANGE_NONHPRIV |
| 5742 | .word 0xc1bfe0a0 ! 49: STDFA_I stda %f0, [0x00a0, %r31] |
| 5743 | ibp_20_34: |
| 5744 | nop |
| 5745 | ta T_CHANGE_NONHPRIV |
| 5746 | .word 0x99b347c9 ! 50: PDIST pdistn %d44, %d40, %d12 |
| 5747 | .word 0x8d903b1e ! 51: WRPR_PSTATE_I wrpr %r0, 0x1b1e, %pstate |
| 5748 | .word 0xe24fc000 ! 52: LDSB_R ldsb [%r31 + %r0], %r17 |
| 5749 | .word 0xe2c7e018 ! 53: LDSWA_I ldswa [%r31, + 0x0018] %asi, %r17 |
| 5750 | .word 0xe33fe1f0 ! 54: STDF_I std %f17, [0x01f0, %r31] |
| 5751 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 5752 | reduce_priv_lvl_20_36: |
| 5753 | ta T_CHANGE_NONHPRIV ! macro |
| 5754 | intveclr_20_37: |
| 5755 | nop |
| 5756 | ta T_CHANGE_HPRIV |
| 5757 | setx 0x09db5d7576106f08, %r1, %r28 |
| 5758 | stxa %r28, [%g0] 0x72 |
| 5759 | .word 0x25400001 ! 56: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 5760 | ibp_20_38: |
| 5761 | nop |
| 5762 | ta T_CHANGE_NONHPRIV |
| 5763 | .word 0xe3e7e00a ! 57: CASA_R casa [%r31] %asi, %r10, %r17 |
| 5764 | .word 0x95524000 ! 58: RDPR_CWP <illegal instruction> |
| 5765 | ibp_20_39: |
| 5766 | nop |
| 5767 | ta T_CHANGE_NONHPRIV |
| 5768 | .word 0xe1bfdb60 ! 59: STDFA_R stda %f16, [%r0, %r31] |
| 5769 | mondo_20_40: |
| 5770 | nop |
| 5771 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 5772 | stxa %r20, [%r0+0x3d0] %asi |
| 5773 | .word 0x9d918013 ! 60: WRPR_WSTATE_R wrpr %r6, %r19, %wstate |
| 5774 | ibp_20_41: |
| 5775 | nop |
| 5776 | .word 0xe1bfe0a0 ! 61: STDFA_I stda %f16, [0x00a0, %r31] |
| 5777 | .word 0xe8dfe1d8 ! 62: LDXA_I ldxa [%r31, + 0x01d8] %asi, %r20 |
| 5778 | .word 0x879c8013 ! 63: WRHPR_HINTP_R wrhpr %r18, %r19, %hintp |
| 5779 | #if (defined SPC || defined CMP1) |
| 5780 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_42) + 32, 16, 16)) -> intp(0,0,24) |
| 5781 | #else |
| 5782 | setx 0xb1ad210c755a83e1, %r1, %r28 |
| 5783 | stxa %r28, [%g0] 0x73 |
| 5784 | #endif |
| 5785 | intvec_20_42: |
| 5786 | .word 0x39400001 ! 64: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 5787 | .word 0xe1bfdc00 ! 65: STDFA_R stda %f16, [%r0, %r31] |
| 5788 | ibp_20_44: |
| 5789 | nop |
| 5790 | .word 0xe1bfe040 ! 66: STDFA_I stda %f16, [0x0040, %r31] |
| 5791 | ibp_20_45: |
| 5792 | nop |
| 5793 | .word 0xe9e7e009 ! 67: CASA_R casa [%r31] %asi, %r9, %r20 |
| 5794 | .word 0xe927e106 ! 68: STF_I st %f20, [0x0106, %r31] |
| 5795 | mondo_20_46: |
| 5796 | nop |
| 5797 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 5798 | ta T_CHANGE_PRIV |
| 5799 | stxa %r5, [%r0+0x3e8] %asi |
| 5800 | .word 0x9d940006 ! 69: WRPR_WSTATE_R wrpr %r16, %r6, %wstate |
| 5801 | .word 0xb1844014 ! 70: WR_STICK_REG_R wr %r17, %r20, %- |
| 5802 | br_badelay3_20_47: |
| 5803 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> |
| 5804 | .word 0x20800001 ! 1: BN bn,a <label_0x1> |
| 5805 | .word 0xd315000b ! 1: LDQF_R - [%r20, %r11], %f9 |
| 5806 | .word 0xa7a44828 ! 71: FADDs fadds %f17, %f8, %f19 |
| 5807 | fpinit_20_48: |
| 5808 | nop |
| 5809 | setx fp_data_quads, %r19, %r20 |
| 5810 | ldd [%r20], %f0 |
| 5811 | ldd [%r20+8], %f4 |
| 5812 | ld [%r20+16], %fsr |
| 5813 | ld [%r20+24], %r19 |
| 5814 | wr %r19, %g0, %gsr |
| 5815 | .word 0x91b00484 ! 72: FCMPLE32 fcmple32 %d0, %d4, %r8 |
| 5816 | brcommon2_20_49: |
| 5817 | nop |
| 5818 | setx common_target, %r12, %r27 |
| 5819 | ba,a .+12 |
| 5820 | .word 0x93a4c9d1 ! 1: FDIVd fdivd %f50, %f48, %f40 |
| 5821 | ba,a .+8 |
| 5822 | jmpl %r27+0, %r27 |
| 5823 | .word 0xc1bfe1c0 ! 73: STDFA_I stda %f0, [0x01c0, %r31] |
| 5824 | #if (defined SPC || defined CMP1) |
| 5825 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_50) + 16, 16, 16)) -> intp(4,0,17) |
| 5826 | #else |
| 5827 | setx 0x856997d7d9b9c9cd, %r1, %r28 |
| 5828 | stxa %r28, [%g0] 0x73 |
| 5829 | #endif |
| 5830 | intvec_20_50: |
| 5831 | .word 0x39400001 ! 74: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 5832 | .word 0xc32fc000 ! 75: STXFSR_R st-sfr %f1, [%r0, %r31] |
| 5833 | intveclr_20_51: |
| 5834 | nop |
| 5835 | ta T_CHANGE_HPRIV |
| 5836 | setx 0x14bff682785ad0e5, %r1, %r28 |
| 5837 | stxa %r28, [%g0] 0x72 |
| 5838 | ta T_CHANGE_NONHPRIV |
| 5839 | .word 0x25400001 ! 76: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 5840 | brcommon3_20_52: |
| 5841 | nop |
| 5842 | setx common_target, %r12, %r27 |
| 5843 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 5844 | ba,a .+12 |
| 5845 | .word 0xdb37e130 ! 1: STQF_I - %f13, [0x0130, %r31] |
| 5846 | ba,a .+8 |
| 5847 | jmpl %r27+0, %r27 |
| 5848 | .word 0xdb1fe020 ! 77: LDDF_I ldd [%r31, 0x0020], %f13 |
| 5849 | .word 0xa984400d ! 78: WR_SET_SOFTINT_R wr %r17, %r13, %set_softint |
| 5850 | .word 0x26cd0001 ! 1: BRLZ brlz,a,pt %r20,<label_0xd0001> |
| 5851 | .word 0x8d903de4 ! 79: WRPR_PSTATE_I wrpr %r0, 0x1de4, %pstate |
| 5852 | splash_lsu_20_54: |
| 5853 | nop |
| 5854 | ta T_CHANGE_HPRIV |
| 5855 | set 0x932a8df5, %r2 |
| 5856 | mov 0x4, %r1 |
| 5857 | sllx %r1, 32, %r1 |
| 5858 | or %r1, %r2, %r2 |
| 5859 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 5860 | ta T_CHANGE_NONHPRIV |
| 5861 | .word 0x3d400001 ! 80: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 5862 | splash_lsu_20_55: |
| 5863 | nop |
| 5864 | ta T_CHANGE_HPRIV |
| 5865 | set 0xb6f93bce, %r2 |
| 5866 | mov 0x3, %r1 |
| 5867 | sllx %r1, 32, %r1 |
| 5868 | or %r1, %r2, %r2 |
| 5869 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 5870 | .word 0x3d400001 ! 81: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 5871 | nop |
| 5872 | ta T_CHANGE_HPRIV ! macro |
| 5873 | donret_20_56: |
| 5874 | rd %pc, %r12 |
| 5875 | add %r12, (donretarg_20_56-donret_20_56+4), %r12 |
| 5876 | add %r12, 0x4, %r11 ! seq tnpc |
| 5877 | wrpr %g0, 0x2, %tl |
| 5878 | wrpr %g0, %r12, %tpc |
| 5879 | wrpr %g0, %r11, %tnpc |
| 5880 | set (0x00aeba00 | (0x83 << 24)), %r13 |
| 5881 | and %r12, 0xfff, %r14 |
| 5882 | sllx %r14, 30, %r14 |
| 5883 | or %r13, %r14, %r20 |
| 5884 | wrpr %r20, %g0, %tstate |
| 5885 | wrhpr %g0, 0x50d, %htstate |
| 5886 | ta T_CHANGE_NONHPRIV ! rand=1 (20) |
| 5887 | retry |
| 5888 | donretarg_20_56: |
| 5889 | .word 0x93a4c9d0 ! 82: FDIVd fdivd %f50, %f16, %f40 |
| 5890 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 5891 | reduce_priv_lvl_20_57: |
| 5892 | ta T_CHANGE_NONHPRIV ! macro |
| 5893 | dvapa_20_58: |
| 5894 | nop |
| 5895 | ta T_CHANGE_HPRIV |
| 5896 | mov 0xb36, %r20 |
| 5897 | mov 0x8, %r19 |
| 5898 | sllx %r20, 23, %r20 |
| 5899 | or %r19, %r20, %r19 |
| 5900 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 5901 | mov 0x38, %r18 |
| 5902 | stxa %r31, [%r18]0x58 |
| 5903 | ta T_CHANGE_NONHPRIV |
| 5904 | .word 0xc3ec0034 ! 84: PREFETCHA_R prefetcha [%r16, %r20] 0x01, #one_read |
| 5905 | nop |
| 5906 | ta T_CHANGE_HPRIV ! macro |
| 5907 | donret_20_59: |
| 5908 | rd %pc, %r12 |
| 5909 | add %r12, (donretarg_20_59-donret_20_59), %r12 |
| 5910 | add %r12, 0x8, %r11 ! nonseq tnpc |
| 5911 | wrpr %g0, 0x1, %tl |
| 5912 | wrpr %g0, %r12, %tpc |
| 5913 | wrpr %g0, %r11, %tnpc |
| 5914 | set (0x007f8c00 | (0x4f << 24)), %r13 |
| 5915 | and %r12, 0xfff, %r14 |
| 5916 | sllx %r14, 30, %r14 |
| 5917 | or %r13, %r14, %r20 |
| 5918 | wrpr %r20, %g0, %tstate |
| 5919 | wrhpr %g0, 0x70f, %htstate |
| 5920 | ta T_CHANGE_NONPRIV ! rand=0 (20) |
| 5921 | .word 0x2b400001 ! 1: FBPUG fbug,a,pn %fcc0, <label_0x1> |
| 5922 | done |
| 5923 | donretarg_20_59: |
| 5924 | .word 0xd86fe0d9 ! 85: LDSTUB_I ldstub %r12, [%r31 + 0x00d9] |
| 5925 | trapasi_20_60: |
| 5926 | nop |
| 5927 | mov 0x28, %r1 ! (VA for ASI 0x5b) |
| 5928 | .word 0xd8d84b60 ! 86: LDXA_R ldxa [%r1, %r0] 0x5b, %r12 |
| 5929 | otherw |
| 5930 | mov 0xb1, %r30 |
| 5931 | .word 0x83d0001e ! 87: Tcc_R te icc_or_xcc, %r0 + %r30 |
| 5932 | pmu_20_61: |
| 5933 | nop |
| 5934 | setx 0xfffff3d1ffffffde, %g1, %g7 |
| 5935 | .word 0xa3800007 ! 88: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 5936 | .word 0x89800011 ! 89: WRTICK_R wr %r0, %r17, %tick |
| 5937 | dvapa_20_63: |
| 5938 | nop |
| 5939 | ta T_CHANGE_HPRIV |
| 5940 | mov 0xa85, %r20 |
| 5941 | mov 0x13, %r19 |
| 5942 | sllx %r20, 23, %r20 |
| 5943 | or %r19, %r20, %r19 |
| 5944 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 5945 | mov 0x38, %r18 |
| 5946 | stxa %r31, [%r18]0x58 |
| 5947 | ta T_CHANGE_NONHPRIV |
| 5948 | .word 0xd93fc014 ! 90: STDF_R std %f12, [%r20, %r31] |
| 5949 | .word 0xd857e090 ! 91: LDSH_I ldsh [%r31 + 0x0090], %r12 |
| 5950 | .word 0xb1844010 ! 92: WR_STICK_REG_R wr %r17, %r16, %- |
| 5951 | .word 0xd89fc380 ! 93: LDDA_R ldda [%r31, %r0] 0x1c, %r12 |
| 5952 | splash_hpstate_20_64: |
| 5953 | .word 0x2c800001 ! 1: BNEG bneg,a <label_0x1> |
| 5954 | .word 0x8198298c ! 94: WRHPR_HPSTATE_I wrhpr %r0, 0x098c, %hpstate |
| 5955 | .word 0xc30fc000 ! 95: LDXFSR_R ld-fsr [%r31, %r0], %f1 |
| 5956 | brcommon1_20_65: |
| 5957 | nop |
| 5958 | setx common_target, %r12, %r27 |
| 5959 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 5960 | ba,a .+12 |
| 5961 | .word 0x997020b0 ! 1: POPC_I popc 0x00b0, %r12 |
| 5962 | ba,a .+8 |
| 5963 | jmpl %r27+0, %r27 |
| 5964 | .word 0xa1a109c3 ! 96: FDIVd fdivd %f4, %f34, %f16 |
| 5965 | .word 0x9f8033b6 ! 97: SIR sir 0x13b6 |
| 5966 | intveclr_20_66: |
| 5967 | nop |
| 5968 | ta T_CHANGE_HPRIV |
| 5969 | setx 0x6031a1e959532a4f, %r1, %r28 |
| 5970 | stxa %r28, [%g0] 0x72 |
| 5971 | ta T_CHANGE_NONHPRIV |
| 5972 | .word 0x25400001 ! 98: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 5973 | .word 0x89800011 ! 99: WRTICK_R wr %r0, %r17, %tick |
| 5974 | splash_tba_20_68: |
| 5975 | nop |
| 5976 | ta T_CHANGE_PRIV |
| 5977 | set 0x120000, %r12 |
| 5978 | .word 0x8b90000c ! 100: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 5979 | brcommon1_20_69: |
| 5980 | nop |
| 5981 | setx common_target, %r12, %r27 |
| 5982 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 5983 | ba,a .+12 |
| 5984 | .word 0xd06fe1b0 ! 1: LDSTUB_I ldstub %r8, [%r31 + 0x01b0] |
| 5985 | ba,a .+8 |
| 5986 | jmpl %r27+0, %r27 |
| 5987 | .word 0x957031c6 ! 101: POPC_I popc 0x11c6, %r10 |
| 5988 | intveclr_20_70: |
| 5989 | nop |
| 5990 | ta T_CHANGE_HPRIV |
| 5991 | setx 0xb0c006e20ed8b0ff, %r1, %r28 |
| 5992 | stxa %r28, [%g0] 0x72 |
| 5993 | .word 0x25400001 ! 102: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 5994 | setx 0x1597eebff5342bae, %r1, %r28 |
| 5995 | stxa %r28, [%g0] 0x73 |
| 5996 | intvec_20_71: |
| 5997 | .word 0x39400001 ! 103: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 5998 | nop |
| 5999 | ta T_CHANGE_HPRIV ! macro |
| 6000 | donret_20_72: |
| 6001 | rd %pc, %r12 |
| 6002 | add %r12, (donretarg_20_72-donret_20_72), %r12 |
| 6003 | add %r12, 0x8, %r11 ! nonseq tnpc |
| 6004 | wrpr %g0, 0x1, %tl |
| 6005 | wrpr %g0, %r12, %tpc |
| 6006 | wrpr %g0, %r11, %tnpc |
| 6007 | set (0x0098e000 | (0x80 << 24)), %r13 |
| 6008 | and %r12, 0xfff, %r14 |
| 6009 | sllx %r14, 30, %r14 |
| 6010 | or %r13, %r14, %r20 |
| 6011 | wrpr %r20, %g0, %tstate |
| 6012 | wrhpr %g0, 0x1685, %htstate |
| 6013 | ta T_CHANGE_NONHPRIV ! rand=1 (20) |
| 6014 | .word 0x27400001 ! 1: FBPUL fbul,a,pn %fcc0, <label_0x1> |
| 6015 | retry |
| 6016 | donretarg_20_72: |
| 6017 | .word 0x29400001 ! 104: FBPL fbl,a,pn %fcc0, <label_0x1> |
| 6018 | intveclr_20_73: |
| 6019 | nop |
| 6020 | ta T_CHANGE_HPRIV |
| 6021 | setx 0xd622ac0b8552e5d3, %r1, %r28 |
| 6022 | stxa %r28, [%g0] 0x72 |
| 6023 | ta T_CHANGE_NONHPRIV |
| 6024 | .word 0x25400001 ! 105: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 6025 | .word 0xc19fe0c0 ! 106: LDDFA_I ldda [%r31, 0x00c0], %f0 |
| 6026 | ta T_CHANGE_NONHPRIV |
| 6027 | .word 0x8143e011 ! 107: MEMBAR membar #LoadLoad | #Lookaside |
| 6028 | .word 0xc32fc000 ! 108: STXFSR_R st-sfr %f1, [%r0, %r31] |
| 6029 | bcs skip_20_76 |
| 6030 | fbe,a,pn %fcc0, skip_20_76 |
| 6031 | .align 1024 |
| 6032 | skip_20_76: |
| 6033 | .word 0xa5b104d3 ! 109: FCMPNE32 fcmpne32 %d4, %d50, %r18 |
| 6034 | .word 0xe1bfe1e0 ! 110: STDFA_I stda %f16, [0x01e0, %r31] |
| 6035 | intveclr_20_77: |
| 6036 | nop |
| 6037 | ta T_CHANGE_HPRIV |
| 6038 | setx 0xc5b048a9ce7d9125, %r1, %r28 |
| 6039 | stxa %r28, [%g0] 0x72 |
| 6040 | ta T_CHANGE_NONHPRIV |
| 6041 | .word 0x25400001 ! 111: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 6042 | splash_cmpr_20_78: |
| 6043 | mov 0, %r18 |
| 6044 | sllx %r18, 63, %r18 |
| 6045 | rd %tick, %r17 |
| 6046 | add %r17, 0x60, %r17 |
| 6047 | or %r17, %r18, %r17 |
| 6048 | ta T_CHANGE_HPRIV |
| 6049 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 6050 | ta T_CHANGE_PRIV |
| 6051 | .word 0xb3800011 ! 112: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 6052 | .word 0xc1bfe0e0 ! 113: STDFA_I stda %f0, [0x00e0, %r31] |
| 6053 | unsupttte_20_79: |
| 6054 | nop |
| 6055 | ta T_CHANGE_HPRIV |
| 6056 | mov 1, %r20 |
| 6057 | sllx %r20, 63, %r20 |
| 6058 | or %r20, 2,%r20 |
| 6059 | stxa %r20, [%g0]0x5c ! D unsupported page size .. |
| 6060 | ta T_CHANGE_NONHPRIV |
| 6061 | .word 0x9ba509cb ! 114: FDIVd fdivd %f20, %f42, %f44 |
| 6062 | tagged_20_80: |
| 6063 | tsubcctv %r10, 0x1d8a, %r5 |
| 6064 | .word 0xd807e080 ! 115: LDUW_I lduw [%r31 + 0x0080], %r12 |
| 6065 | .word 0xa2d20007 ! 116: UMULcc_R umulcc %r8, %r7, %r17 |
| 6066 | setx 0x6ae21ec434165b98, %r1, %r28 |
| 6067 | stxa %r28, [%g0] 0x73 |
| 6068 | intvec_20_81: |
| 6069 | .word 0x39400001 ! 117: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 6070 | trapasi_20_82: |
| 6071 | nop |
| 6072 | mov 0x30, %r1 ! (VA for ASI 0x5a) |
| 6073 | .word 0xd2884b40 ! 118: LDUBA_R lduba [%r1, %r0] 0x5a, %r9 |
| 6074 | .word 0x25400001 ! 1: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 6075 | .word 0x8d903045 ! 119: WRPR_PSTATE_I wrpr %r0, 0x1045, %pstate |
| 6076 | ibp_20_84: |
| 6077 | nop |
| 6078 | .word 0xd297c031 ! 120: LDUHA_R lduha [%r31, %r17] 0x01, %r9 |
| 6079 | nop |
| 6080 | ta T_CHANGE_HPRIV |
| 6081 | mov 0x20, %r10 |
| 6082 | set sync_thr_counter6, %r23 |
| 6083 | #ifndef SPC |
| 6084 | ldxa [%g0]0x63, %o1 |
| 6085 | and %o1, 0x38, %o1 |
| 6086 | add %o1, %r23, %r23 |
| 6087 | #endif |
| 6088 | cas [%r23],%g0,%r10 !lock |
| 6089 | brnz %r10, sma_20_85 |
| 6090 | rd %asi, %r12 |
| 6091 | wr %g0, 0x40, %asi |
| 6092 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 6093 | set 0x001a1fff, %g1 |
| 6094 | stxa %g1, [%g0 + 0x80] %asi |
| 6095 | wr %r12, %g0, %asi |
| 6096 | st %g0, [%r23] |
| 6097 | sma_20_85: |
| 6098 | ta T_CHANGE_NONHPRIV |
| 6099 | .word 0xd3e7e00b ! 121: CASA_R casa [%r31] %asi, %r11, %r9 |
| 6100 | fpinit_20_86: |
| 6101 | nop |
| 6102 | setx fp_data_quads, %r19, %r20 |
| 6103 | ldd [%r20], %f0 |
| 6104 | ldd [%r20+8], %f4 |
| 6105 | ld [%r20+16], %fsr |
| 6106 | ld [%r20+24], %r19 |
| 6107 | wr %r19, %g0, %gsr |
| 6108 | .word 0x91a009c4 ! 122: FDIVd fdivd %f0, %f4, %f8 |
| 6109 | .word 0x91950013 ! 123: WRPR_PIL_R wrpr %r20, %r19, %pil |
| 6110 | intveclr_20_88: |
| 6111 | nop |
| 6112 | ta T_CHANGE_HPRIV |
| 6113 | setx 0x1f1afcd8f0fa9679, %r1, %r28 |
| 6114 | stxa %r28, [%g0] 0x72 |
| 6115 | .word 0x25400001 ! 124: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 6116 | mondo_20_89: |
| 6117 | nop |
| 6118 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 6119 | stxa %r1, [%r0+0x3d0] %asi |
| 6120 | .word 0x9d934008 ! 125: WRPR_WSTATE_R wrpr %r13, %r8, %wstate |
| 6121 | nop |
| 6122 | ta T_CHANGE_HPRIV ! macro |
| 6123 | donret_20_90: |
| 6124 | rd %pc, %r12 |
| 6125 | add %r12, (donretarg_20_90-donret_20_90+4), %r12 |
| 6126 | add %r12, 0x4, %r11 ! seq tnpc |
| 6127 | wrpr %g0, 0x2, %tl |
| 6128 | wrpr %g0, %r12, %tpc |
| 6129 | wrpr %g0, %r11, %tnpc |
| 6130 | set (0x0024e400 | (4 << 24)), %r13 |
| 6131 | and %r12, 0xfff, %r14 |
| 6132 | sllx %r14, 30, %r14 |
| 6133 | or %r13, %r14, %r20 |
| 6134 | wrpr %r20, %g0, %tstate |
| 6135 | wrhpr %g0, 0x17c3, %htstate |
| 6136 | ta T_CHANGE_NONHPRIV ! rand=1 (20) |
| 6137 | retry |
| 6138 | donretarg_20_90: |
| 6139 | .word 0xd26fe18d ! 126: LDSTUB_I ldstub %r9, [%r31 + 0x018d] |
| 6140 | .word 0xd2cfe148 ! 127: LDSBA_I ldsba [%r31, + 0x0148] %asi, %r9 |
| 6141 | .word 0xd23fe03d ! 128: STD_I std %r9, [%r31 + 0x003d] |
| 6142 | .word 0x8d802004 ! 129: WRFPRS_I wr %r0, 0x0004, %fprs |
| 6143 | .word 0x83d020b5 ! 130: Tcc_I te icc_or_xcc, %r0 + 181 |
| 6144 | .word 0x91520000 ! 131: RDPR_PIL rdpr %pil, %r8 |
| 6145 | mondo_20_91: |
| 6146 | nop |
| 6147 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 6148 | ta T_CHANGE_PRIV |
| 6149 | stxa %r18, [%r0+0x3e0] %asi |
| 6150 | .word 0x9d950004 ! 132: WRPR_WSTATE_R wrpr %r20, %r4, %wstate |
| 6151 | #if (defined SPC || defined CMP1) |
| 6152 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_92) + 8, 16, 16)) -> intp(6,0,24) |
| 6153 | #else |
| 6154 | setx 0x7c1cc8d255e30d91, %r1, %r28 |
| 6155 | stxa %r28, [%g0] 0x73 |
| 6156 | #endif |
| 6157 | intvec_20_92: |
| 6158 | .word 0x39400001 ! 133: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 6159 | fpinit_20_93: |
| 6160 | nop |
| 6161 | setx fp_data_quads, %r19, %r20 |
| 6162 | ldd [%r20], %f0 |
| 6163 | ldd [%r20+8], %f4 |
| 6164 | ld [%r20+16], %fsr |
| 6165 | ld [%r20+24], %r19 |
| 6166 | wr %r19, %g0, %gsr |
| 6167 | .word 0x91b00484 ! 134: FCMPLE32 fcmple32 %d0, %d4, %r8 |
| 6168 | invalw |
| 6169 | mov 0x31, %r30 |
| 6170 | .word 0x91d0001e ! 135: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 6171 | .word 0xe28008a0 ! 136: LDUWA_R lduwa [%r0, %r0] 0x45, %r17 |
| 6172 | ibp_20_94: |
| 6173 | nop |
| 6174 | .word 0xe29fc02b ! 137: LDDA_R ldda [%r31, %r11] 0x01, %r17 |
| 6175 | nop |
| 6176 | ta T_CHANGE_HPRIV |
| 6177 | mov 0x20+1, %r10 |
| 6178 | set sync_thr_counter5, %r23 |
| 6179 | #ifndef SPC |
| 6180 | ldxa [%g0]0x63, %o1 |
| 6181 | and %o1, 0x38, %o1 |
| 6182 | add %o1, %r23, %r23 |
| 6183 | sllx %o1, 5, %o3 !(CID*256) |
| 6184 | #endif |
| 6185 | cas [%r23],%g0,%r10 !lock |
| 6186 | brnz %r10, cwq_20_95 |
| 6187 | rd %asi, %r12 |
| 6188 | wr %g0, 0x40, %asi |
| 6189 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 6190 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 6191 | cmp %l1, 1 |
| 6192 | bne cwq_20_95 |
| 6193 | set CWQ_BASE, %l6 |
| 6194 | #ifndef SPC |
| 6195 | add %l6, %o3, %l6 |
| 6196 | #endif |
| 6197 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 6198 | best_set_reg(0x206100b0, %l1, %l2) !# Control Word |
| 6199 | sllx %l2, 32, %l2 |
| 6200 | stx %l2, [%l6 + 0x0] |
| 6201 | membar #Sync |
| 6202 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 6203 | sub %l2, 0x40, %l2 |
| 6204 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 6205 | wr %r12, %g0, %asi |
| 6206 | st %g0, [%r23] |
| 6207 | cwq_20_95: |
| 6208 | ta T_CHANGE_NONHPRIV |
| 6209 | .word 0x99414000 ! 138: RDPC rd %pc, %r12 |
| 6210 | .word 0x8780204f ! 139: WRASI_I wr %r0, 0x004f, %asi |
| 6211 | #if (defined SPC || defined CMP1) |
| 6212 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_96) + 48, 16, 16)) -> intp(0,0,30) |
| 6213 | #else |
| 6214 | setx 0x348e387d3bf33d7c, %r1, %r28 |
| 6215 | stxa %r28, [%g0] 0x73 |
| 6216 | #endif |
| 6217 | intvec_20_96: |
| 6218 | .word 0x39400001 ! 140: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 6219 | .word 0xe11fe190 ! 141: LDDF_I ldd [%r31, 0x0190], %f16 |
| 6220 | dvapa_20_98: |
| 6221 | nop |
| 6222 | ta T_CHANGE_HPRIV |
| 6223 | mov 0xc06, %r20 |
| 6224 | mov 0x15, %r19 |
| 6225 | sllx %r20, 23, %r20 |
| 6226 | or %r19, %r20, %r19 |
| 6227 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 6228 | mov 0x38, %r18 |
| 6229 | stxa %r31, [%r18]0x58 |
| 6230 | ta T_CHANGE_NONHPRIV |
| 6231 | .word 0x9f803ec5 ! 142: SIR sir 0x1ec5 |
| 6232 | nop |
| 6233 | ta T_CHANGE_HPRIV ! macro |
| 6234 | donret_20_99: |
| 6235 | rd %pc, %r12 |
| 6236 | add %r12, (donretarg_20_99-donret_20_99+4), %r12 |
| 6237 | add %r12, 0x4, %r11 ! seq tnpc |
| 6238 | wrpr %g0, 0x1, %tl |
| 6239 | wrpr %g0, %r12, %tpc |
| 6240 | wrpr %g0, %r11, %tnpc |
| 6241 | set (0x00938d00 | (0x4f << 24)), %r13 |
| 6242 | and %r12, 0xfff, %r14 |
| 6243 | sllx %r14, 30, %r14 |
| 6244 | or %r13, %r14, %r20 |
| 6245 | wrpr %r20, %g0, %tstate |
| 6246 | wrhpr %g0, 0x1e57, %htstate |
| 6247 | ta T_CHANGE_NONHPRIV ! rand=1 (20) |
| 6248 | .word 0x29400001 ! 1: FBPL fbl,a,pn %fcc0, <label_0x1> |
| 6249 | done |
| 6250 | donretarg_20_99: |
| 6251 | .word 0x24c8c001 ! 143: BRLEZ brlez,a,pt %r3,<label_0x8c001> |
| 6252 | .word 0xe477e1f4 ! 144: STX_I stx %r18, [%r31 + 0x01f4] |
| 6253 | .word 0x8d903d97 ! 145: WRPR_PSTATE_I wrpr %r0, 0x1d97, %pstate |
| 6254 | .word 0xe4800ac0 ! 146: LDUWA_R lduwa [%r0, %r0] 0x56, %r18 |
| 6255 | trapasi_20_101: |
| 6256 | nop |
| 6257 | mov 0x3e0, %r1 ! (VA for ASI 0x25) |
| 6258 | .word 0xe49044a0 ! 147: LDUHA_R lduha [%r1, %r0] 0x25, %r18 |
| 6259 | ibp_20_102: |
| 6260 | nop |
| 6261 | .word 0xe497c02d ! 148: LDUHA_R lduha [%r31, %r13] 0x01, %r18 |
| 6262 | setx 0x1dd5b93c9bc4467f, %r1, %r28 |
| 6263 | stxa %r28, [%g0] 0x73 |
| 6264 | intvec_20_103: |
| 6265 | .word 0x39400001 ! 149: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 6266 | mondo_20_104: |
| 6267 | nop |
| 6268 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 6269 | stxa %r20, [%r0+0x3d0] %asi |
| 6270 | .word 0x9d94000b ! 150: WRPR_WSTATE_R wrpr %r16, %r11, %wstate |
| 6271 | setx 0x5e012c1c0fa19f4d, %r1, %r28 |
| 6272 | stxa %r28, [%g0] 0x73 |
| 6273 | intvec_20_105: |
| 6274 | .word 0x39400001 ! 151: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 6275 | ibp_20_106: |
| 6276 | nop |
| 6277 | .word 0xe4dfc02d ! 152: LDXA_R ldxa [%r31, %r13] 0x01, %r18 |
| 6278 | trapasi_20_107: |
| 6279 | nop |
| 6280 | mov 0x0, %r1 ! (VA for ASI 0x72) |
| 6281 | .word 0xe4884e40 ! 153: LDUBA_R lduba [%r1, %r0] 0x72, %r18 |
| 6282 | .word 0x9f803ee6 ! 154: SIR sir 0x1ee6 |
| 6283 | splash_cmpr_20_108: |
| 6284 | mov 1, %r18 |
| 6285 | sllx %r18, 63, %r18 |
| 6286 | rd %tick, %r17 |
| 6287 | add %r17, 0x80, %r17 |
| 6288 | or %r17, %r18, %r17 |
| 6289 | .word 0xb3800011 ! 155: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 6290 | intveclr_20_109: |
| 6291 | nop |
| 6292 | ta T_CHANGE_HPRIV |
| 6293 | setx 0xb8f71ac2a41604ef, %r1, %r28 |
| 6294 | stxa %r28, [%g0] 0x72 |
| 6295 | ta T_CHANGE_NONHPRIV |
| 6296 | .word 0x25400001 ! 156: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 6297 | ibp_20_110: |
| 6298 | nop |
| 6299 | .word 0x91a1c9d4 ! 157: FDIVd fdivd %f38, %f20, %f8 |
| 6300 | .word 0xc32fc000 ! 158: STXFSR_R st-sfr %f1, [%r0, %r31] |
| 6301 | .word 0xc1bfe0e0 ! 159: STDFA_I stda %f0, [0x00e0, %r31] |
| 6302 | .word 0x9f8027d8 ! 160: SIR sir 0x07d8 |
| 6303 | splash_hpstate_20_112: |
| 6304 | .word 0x2a800001 ! 1: BCS bcs,a <label_0x1> |
| 6305 | .word 0x819828a5 ! 161: WRHPR_HPSTATE_I wrhpr %r0, 0x08a5, %hpstate |
| 6306 | .word 0xe327e1b5 ! 162: STF_I st %f17, [0x01b5, %r31] |
| 6307 | .word 0x91d02034 ! 163: Tcc_I ta icc_or_xcc, %r0 + 52 |
| 6308 | mondo_20_113: |
| 6309 | nop |
| 6310 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 6311 | stxa %r1, [%r0+0x3d8] %asi |
| 6312 | .word 0x9d95000b ! 164: WRPR_WSTATE_R wrpr %r20, %r11, %wstate |
| 6313 | br_badelay2_20_114: |
| 6314 | .word 0x20800001 ! 1: BN bn,a <label_0x1> |
| 6315 | allclean |
| 6316 | .word 0x99b48313 ! 165: ALIGNADDRESS alignaddr %r18, %r19, %r12 |
| 6317 | fpinit_20_115: |
| 6318 | nop |
| 6319 | setx fp_data_quads, %r19, %r20 |
| 6320 | ldd [%r20], %f0 |
| 6321 | ldd [%r20+8], %f4 |
| 6322 | ld [%r20+16], %fsr |
| 6323 | ld [%r20+24], %r19 |
| 6324 | wr %r19, %g0, %gsr |
| 6325 | .word 0x91a009c4 ! 166: FDIVd fdivd %f0, %f4, %f8 |
| 6326 | set 0x1f3e, %l3 |
| 6327 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT |
| 6328 | .word 0x99b447c4 ! 167: PDIST pdistn %d48, %d4, %d12 |
| 6329 | memptr_20_116: |
| 6330 | set 0x60740000, %r31 |
| 6331 | .word 0x8580fb0e ! 168: WRCCR_I wr %r3, 0x1b0e, %ccr |
| 6332 | .word 0xd4c7e0a8 ! 169: LDSWA_I ldswa [%r31, + 0x00a8] %asi, %r10 |
| 6333 | setx 0x8e0fcc1ba8ceda30, %r1, %r28 |
| 6334 | stxa %r28, [%g0] 0x73 |
| 6335 | intvec_20_117: |
| 6336 | .word 0x39400001 ! 170: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 6337 | splash_hpstate_20_118: |
| 6338 | .word 0x81983701 ! 171: WRHPR_HPSTATE_I wrhpr %r0, 0x1701, %hpstate |
| 6339 | mondo_20_119: |
| 6340 | nop |
| 6341 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 6342 | ta T_CHANGE_PRIV |
| 6343 | stxa %r1, [%r0+0x3d8] %asi |
| 6344 | .word 0x9d94c003 ! 172: WRPR_WSTATE_R wrpr %r19, %r3, %wstate |
| 6345 | nop |
| 6346 | ta T_CHANGE_HPRIV |
| 6347 | mov 0x20+1, %r10 |
| 6348 | set sync_thr_counter5, %r23 |
| 6349 | #ifndef SPC |
| 6350 | ldxa [%g0]0x63, %o1 |
| 6351 | and %o1, 0x38, %o1 |
| 6352 | add %o1, %r23, %r23 |
| 6353 | sllx %o1, 5, %o3 !(CID*256) |
| 6354 | #endif |
| 6355 | cas [%r23],%g0,%r10 !lock |
| 6356 | brnz %r10, cwq_20_120 |
| 6357 | rd %asi, %r12 |
| 6358 | wr %g0, 0x40, %asi |
| 6359 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 6360 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 6361 | cmp %l1, 1 |
| 6362 | bne cwq_20_120 |
| 6363 | set CWQ_BASE, %l6 |
| 6364 | #ifndef SPC |
| 6365 | add %l6, %o3, %l6 |
| 6366 | #endif |
| 6367 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 6368 | best_set_reg(0x20610010, %l1, %l2) !# Control Word |
| 6369 | sllx %l2, 32, %l2 |
| 6370 | stx %l2, [%l6 + 0x0] |
| 6371 | membar #Sync |
| 6372 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 6373 | sub %l2, 0x40, %l2 |
| 6374 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 6375 | wr %r12, %g0, %asi |
| 6376 | st %g0, [%r23] |
| 6377 | cwq_20_120: |
| 6378 | ta T_CHANGE_NONHPRIV |
| 6379 | .word 0x99414000 ! 173: RDPC rd %pc, %r12 |
| 6380 | ibp_20_121: |
| 6381 | nop |
| 6382 | ta T_CHANGE_NONHPRIV |
| 6383 | .word 0xc1bfde00 ! 174: STDFA_R stda %f0, [%r0, %r31] |
| 6384 | .word 0xd48008a0 ! 175: LDUWA_R lduwa [%r0, %r0] 0x45, %r10 |
| 6385 | .word 0x8d802004 ! 176: WRFPRS_I wr %r0, 0x0004, %fprs |
| 6386 | #if (defined SPC || defined CMP1) |
| 6387 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_122) + 8, 16, 16)) -> intp(0,0,31) |
| 6388 | #else |
| 6389 | setx 0xcc2b9df4da9a9a5f, %r1, %r28 |
| 6390 | stxa %r28, [%g0] 0x73 |
| 6391 | #endif |
| 6392 | intvec_20_122: |
| 6393 | .word 0x39400001 ! 177: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 6394 | setx 0xe9b9cd0068d17e8e, %r1, %r28 |
| 6395 | stxa %r28, [%g0] 0x73 |
| 6396 | intvec_20_123: |
| 6397 | .word 0x39400001 ! 178: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 6398 | .word 0x93d02033 ! 179: Tcc_I tne icc_or_xcc, %r0 + 51 |
| 6399 | #if (defined SPC || defined CMP1) |
| 6400 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_20_124) + 56, 16, 16)) -> intp(4,0,9) |
| 6401 | #else |
| 6402 | setx 0x90944947bed27ae5, %r1, %r28 |
| 6403 | stxa %r28, [%g0] 0x73 |
| 6404 | #endif |
| 6405 | intvec_20_124: |
| 6406 | .word 0x39400001 ! 180: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 6407 | fpinit_20_125: |
| 6408 | nop |
| 6409 | setx fp_data_quads, %r19, %r20 |
| 6410 | ldd [%r20], %f0 |
| 6411 | ldd [%r20+8], %f4 |
| 6412 | ld [%r20+16], %fsr |
| 6413 | ld [%r20+24], %r19 |
| 6414 | wr %r19, %g0, %gsr |
| 6415 | .word 0xc3e83c6d ! 181: PREFETCHA_I prefetcha [%r0, + 0xfffffc6d] %asi, #one_read |
| 6416 | splash_tba_20_126: |
| 6417 | nop |
| 6418 | ta T_CHANGE_PRIV |
| 6419 | setx 0x00000004003a0000, %r11, %r12 |
| 6420 | .word 0x8b90000c ! 182: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 6421 | fpinit_20_127: |
| 6422 | nop |
| 6423 | setx fp_data_quads, %r19, %r20 |
| 6424 | ldd [%r20], %f0 |
| 6425 | ldd [%r20+8], %f4 |
| 6426 | ld [%r20+16], %fsr |
| 6427 | ld [%r20+24], %r19 |
| 6428 | wr %r19, %g0, %gsr |
| 6429 | .word 0x87a80a44 ! 183: FCMPd fcmpd %fcc<n>, %f0, %f4 |
| 6430 | .word 0xd4dfe180 ! 184: LDXA_I ldxa [%r31, + 0x0180] %asi, %r10 |
| 6431 | nop |
| 6432 | ta T_CHANGE_HPRIV |
| 6433 | mov 0x20+1, %r10 |
| 6434 | set sync_thr_counter5, %r23 |
| 6435 | #ifndef SPC |
| 6436 | ldxa [%g0]0x63, %o1 |
| 6437 | and %o1, 0x38, %o1 |
| 6438 | add %o1, %r23, %r23 |
| 6439 | sllx %o1, 5, %o3 !(CID*256) |
| 6440 | #endif |
| 6441 | cas [%r23],%g0,%r10 !lock |
| 6442 | brnz %r10, cwq_20_128 |
| 6443 | rd %asi, %r12 |
| 6444 | wr %g0, 0x40, %asi |
| 6445 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 6446 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 6447 | cmp %l1, 1 |
| 6448 | bne cwq_20_128 |
| 6449 | set CWQ_BASE, %l6 |
| 6450 | #ifndef SPC |
| 6451 | add %l6, %o3, %l6 |
| 6452 | #endif |
| 6453 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 6454 | best_set_reg(0x206100e0, %l1, %l2) !# Control Word |
| 6455 | sllx %l2, 32, %l2 |
| 6456 | stx %l2, [%l6 + 0x0] |
| 6457 | membar #Sync |
| 6458 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 6459 | sub %l2, 0x40, %l2 |
| 6460 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 6461 | wr %r12, %g0, %asi |
| 6462 | st %g0, [%r23] |
| 6463 | cwq_20_128: |
| 6464 | ta T_CHANGE_NONHPRIV |
| 6465 | .word 0x9b414000 ! 185: RDPC rd %pc, %r13 |
| 6466 | intveclr_20_129: |
| 6467 | nop |
| 6468 | ta T_CHANGE_HPRIV |
| 6469 | setx 0x55c88e422128aca2, %r1, %r28 |
| 6470 | stxa %r28, [%g0] 0x72 |
| 6471 | ta T_CHANGE_NONHPRIV |
| 6472 | .word 0x25400001 ! 186: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 6473 | memptr_20_130: |
| 6474 | set 0x60740000, %r31 |
| 6475 | .word 0x8584637f ! 187: WRCCR_I wr %r17, 0x037f, %ccr |
| 6476 | .word 0x91914013 ! 188: WRPR_PIL_R wrpr %r5, %r19, %pil |
| 6477 | .word 0x99a00170 ! 189: FABSq dis not found |
| 6478 | |
| 6479 | .word 0xe8800c00 ! 190: LDUWA_R lduwa [%r0, %r0] 0x60, %r20 |
| 6480 | .word 0x81580000 ! 191: FLUSHW flushw |
| 6481 | splash_cmpr_20_133: |
| 6482 | mov 0, %r18 |
| 6483 | sllx %r18, 63, %r18 |
| 6484 | rd %tick, %r17 |
| 6485 | add %r17, 0x50, %r17 |
| 6486 | or %r17, %r18, %r17 |
| 6487 | ta T_CHANGE_PRIV |
| 6488 | .word 0xb3800011 ! 192: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 6489 | .word 0xe877c000 ! 193: STX_R stx %r20, [%r31 + %r0] |
| 6490 | ceter_20_134: |
| 6491 | nop |
| 6492 | ta T_CHANGE_HPRIV |
| 6493 | mov 3, %r17 |
| 6494 | sllx %r17, 60, %r17 |
| 6495 | mov 0x18, %r16 |
| 6496 | stxa %r17, [%r16]0x4c |
| 6497 | ta T_CHANGE_NONHPRIV |
| 6498 | .word 0x97410000 ! 194: RDTICK rd %tick, %r11 |
| 6499 | .word 0x8d802004 ! 195: WRFPRS_I wr %r0, 0x0004, %fprs |
| 6500 | .word 0xa1520000 ! 196: RDPR_PIL <illegal instruction> |
| 6501 | setx 0x41f96718c7e31ca1, %r1, %r28 |
| 6502 | stxa %r28, [%g0] 0x73 |
| 6503 | intvec_20_135: |
| 6504 | .word 0x39400001 ! 197: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 6505 | .word 0xd727e060 ! 198: STF_I st %f11, [0x0060, %r31] |
| 6506 | ibp_20_136: |
| 6507 | nop |
| 6508 | .word 0xe1bfe040 ! 199: STDFA_I stda %f16, [0x0040, %r31] |
| 6509 | ibp_20_137: |
| 6510 | nop |
| 6511 | ta T_CHANGE_NONHPRIV |
| 6512 | .word 0xd697c032 ! 200: LDUHA_R lduha [%r31, %r18] 0x01, %r11 |
| 6513 | .word 0x89800011 ! 201: WRTICK_R wr %r0, %r17, %tick |
| 6514 | nop |
| 6515 | nop |
| 6516 | ta T_CHANGE_PRIV |
| 6517 | wrpr %g0, %g0, %gl |
| 6518 | nop |
| 6519 | nop |
| 6520 | setx join_lbl_0_0, %g1, %g2 |
| 6521 | jmp %g2 |
| 6522 | nop |
| 6523 | fork_lbl_0_5: |
| 6524 | ta T_CHANGE_NONHPRIV |
| 6525 | vahole_10_0: |
| 6526 | nop |
| 6527 | ta T_CHANGE_NONHPRIV |
| 6528 | setx vahole_target1, %r18, %r27 |
| 6529 | jmpl %r27+0, %r27 |
| 6530 | cwp_10_1: |
| 6531 | set user_data_start, %o7 |
| 6532 | .word 0x93902000 ! 1: WRPR_CWP_I wrpr %r0, 0x0000, %cwp |
| 6533 | pmu_10_2: |
| 6534 | nop |
| 6535 | ta T_CHANGE_PRIV |
| 6536 | setx 0xfffff7f3fffff4cc, %g1, %g7 |
| 6537 | .word 0xa3800007 ! 2: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 6538 | .word 0xd337c000 ! 3: STQF_R - %f9, [%r0, %r31] |
| 6539 | fpinit_10_3: |
| 6540 | nop |
| 6541 | setx fp_data_quads, %r19, %r20 |
| 6542 | ldd [%r20], %f0 |
| 6543 | ldd [%r20+8], %f4 |
| 6544 | ld [%r20+16], %fsr |
| 6545 | ld [%r20+24], %r19 |
| 6546 | wr %r19, %g0, %gsr |
| 6547 | .word 0xc3e83a02 ! 4: PREFETCHA_I prefetcha [%r0, + 0xfffffa02] %asi, #one_read |
| 6548 | .word 0x8d802000 ! 5: WRFPRS_I wr %r0, 0x0000, %fprs |
| 6549 | .word 0x24800001 ! 1: BLE ble,a <label_0x1> |
| 6550 | .word 0x8d902ef1 ! 6: WRPR_PSTATE_I wrpr %r0, 0x0ef1, %pstate |
| 6551 | brcommon1_10_5: |
| 6552 | nop |
| 6553 | setx common_target, %r12, %r27 |
| 6554 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 6555 | ba,a .+12 |
| 6556 | .word 0x93a7c9c9 ! 1: FDIVd fdivd %f62, %f40, %f40 |
| 6557 | ba,a .+8 |
| 6558 | jmpl %r27+0, %r27 |
| 6559 | .word 0x91702260 ! 7: POPC_I popc 0x0260, %r8 |
| 6560 | .word 0xe277e118 ! 8: STX_I stx %r17, [%r31 + 0x0118] |
| 6561 | ibp_10_6: |
| 6562 | nop |
| 6563 | .word 0xe23fe190 ! 9: STD_I std %r17, [%r31 + 0x0190] |
| 6564 | .word 0x95520000 ! 10: RDPR_PIL <illegal instruction> |
| 6565 | .word 0x25400001 ! 1: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 6566 | .word 0x8d903dd9 ! 11: WRPR_PSTATE_I wrpr %r0, 0x1dd9, %pstate |
| 6567 | .word 0xe537c000 ! 12: STQF_R - %f18, [%r0, %r31] |
| 6568 | .word 0xe4800b00 ! 13: LDUWA_R lduwa [%r0, %r0] 0x58, %r18 |
| 6569 | .word 0xa1520000 ! 14: RDPR_PIL <illegal instruction> |
| 6570 | mondo_10_8: |
| 6571 | nop |
| 6572 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 6573 | ta T_CHANGE_PRIV |
| 6574 | stxa %r18, [%r0+0x3c0] %asi |
| 6575 | .word 0x9d940001 ! 15: WRPR_WSTATE_R wrpr %r16, %r1, %wstate |
| 6576 | jmptr_10_9: |
| 6577 | nop |
| 6578 | best_set_reg(0xe0200000, %r20, %r27) |
| 6579 | .word 0xb7c6c000 ! 16: JMPL_R jmpl %r27 + %r0, %r27 |
| 6580 | #if (defined SPC || defined CMP1) |
| 6581 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_10) + 8, 16, 16)) -> intp(2,0,10) |
| 6582 | #else |
| 6583 | setx 0x2a5fb60fbb0e26b4, %r1, %r28 |
| 6584 | stxa %r28, [%g0] 0x73 |
| 6585 | #endif |
| 6586 | intvec_10_10: |
| 6587 | .word 0x39400001 ! 17: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 6588 | nop |
| 6589 | ta T_CHANGE_HPRIV ! macro |
| 6590 | donret_10_11: |
| 6591 | rd %pc, %r12 |
| 6592 | add %r12, (donretarg_10_11-donret_10_11+4), %r12 |
| 6593 | add %r12, 0x4, %r11 ! seq tnpc |
| 6594 | wrpr %g0, 0x1, %tl |
| 6595 | wrpr %g0, %r12, %tpc |
| 6596 | wrpr %g0, %r11, %tnpc |
| 6597 | set (0x00c6b900 | (0x58 << 24)), %r13 |
| 6598 | and %r12, 0xfff, %r14 |
| 6599 | sllx %r14, 30, %r14 |
| 6600 | or %r13, %r14, %r20 |
| 6601 | wrpr %r20, %g0, %tstate |
| 6602 | wrhpr %g0, 0x1e06, %htstate |
| 6603 | ta T_CHANGE_NONPRIV ! rand=0 (10) |
| 6604 | .word 0x23400001 ! 1: FBPNE fbne,a,pn %fcc0, <label_0x1> |
| 6605 | done |
| 6606 | donretarg_10_11: |
| 6607 | .word 0xd8ffe174 ! 18: SWAPA_I swapa %r12, [%r31 + 0x0174] %asi |
| 6608 | splash_hpstate_10_12: |
| 6609 | .word 0x81983d0b ! 19: WRHPR_HPSTATE_I wrhpr %r0, 0x1d0b, %hpstate |
| 6610 | .word 0xab834003 ! 20: WR_CLEAR_SOFTINT_R wr %r13, %r3, %clear_softint |
| 6611 | splash_cmpr_10_13: |
| 6612 | mov 0, %r18 |
| 6613 | sllx %r18, 63, %r18 |
| 6614 | rd %tick, %r17 |
| 6615 | add %r17, 0x100, %r17 |
| 6616 | or %r17, %r18, %r17 |
| 6617 | ta T_CHANGE_HPRIV |
| 6618 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 6619 | ta T_CHANGE_PRIV |
| 6620 | .word 0xb3800011 ! 21: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 6621 | trapasi_10_14: |
| 6622 | nop |
| 6623 | mov 0x8, %r1 ! (VA for ASI 0x4c) |
| 6624 | .word 0xd8c84980 ! 22: LDSBA_R ldsba [%r1, %r0] 0x4c, %r12 |
| 6625 | .word 0xd8c7e1c0 ! 23: LDSWA_I ldswa [%r31, + 0x01c0] %asi, %r12 |
| 6626 | .word 0x8d903281 ! 24: WRPR_PSTATE_I wrpr %r0, 0x1281, %pstate |
| 6627 | nop |
| 6628 | ta T_CHANGE_HPRIV |
| 6629 | mov 0x10, %r10 |
| 6630 | set sync_thr_counter6, %r23 |
| 6631 | #ifndef SPC |
| 6632 | ldxa [%g0]0x63, %o1 |
| 6633 | and %o1, 0x38, %o1 |
| 6634 | add %o1, %r23, %r23 |
| 6635 | #endif |
| 6636 | cas [%r23],%g0,%r10 !lock |
| 6637 | brnz %r10, sma_10_16 |
| 6638 | rd %asi, %r12 |
| 6639 | wr %g0, 0x40, %asi |
| 6640 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 6641 | set 0x00121fff, %g1 |
| 6642 | stxa %g1, [%g0 + 0x80] %asi |
| 6643 | wr %r12, %g0, %asi |
| 6644 | st %g0, [%r23] |
| 6645 | sma_10_16: |
| 6646 | ta T_CHANGE_NONHPRIV |
| 6647 | .word 0xd9e7e012 ! 25: CASA_R casa [%r31] %asi, %r18, %r12 |
| 6648 | brcommon3_10_17: |
| 6649 | nop |
| 6650 | setx common_target, %r12, %r27 |
| 6651 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 6652 | ba,a .+12 |
| 6653 | .word 0xd937c008 ! 1: STQF_R - %f12, [%r8, %r31] |
| 6654 | ba,a .+8 |
| 6655 | jmpl %r27+0, %r27 |
| 6656 | .word 0xd9e7e013 ! 26: CASA_R casa [%r31] %asi, %r19, %r12 |
| 6657 | trapasi_10_18: |
| 6658 | nop |
| 6659 | mov 0x0, %r1 ! (VA for ASI 0x73) |
| 6660 | .word 0xd8884e60 ! 27: LDUBA_R lduba [%r1, %r0] 0x73, %r12 |
| 6661 | ceter_10_19: |
| 6662 | nop |
| 6663 | ta T_CHANGE_HPRIV |
| 6664 | mov 7, %r17 |
| 6665 | sllx %r17, 60, %r17 |
| 6666 | mov 0x18, %r16 |
| 6667 | stxa %r17, [%r16]0x4c |
| 6668 | ta T_CHANGE_NONHPRIV |
| 6669 | .word 0xa5410000 ! 28: RDTICK rd %tick, %r18 |
| 6670 | splash_cmpr_10_20: |
| 6671 | mov 1, %r18 |
| 6672 | sllx %r18, 63, %r18 |
| 6673 | rd %tick, %r17 |
| 6674 | add %r17, 0x80, %r17 |
| 6675 | or %r17, %r18, %r17 |
| 6676 | ta T_CHANGE_HPRIV |
| 6677 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 6678 | ta T_CHANGE_PRIV |
| 6679 | .word 0xaf800011 ! 29: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 6680 | memptr_10_21: |
| 6681 | set user_data_start, %r31 |
| 6682 | .word 0x858522ef ! 30: WRCCR_I wr %r20, 0x02ef, %ccr |
| 6683 | .word 0xa2824010 ! 31: ADDcc_R addcc %r9, %r16, %r17 |
| 6684 | .word 0xc1bfe140 ! 32: STDFA_I stda %f0, [0x0140, %r31] |
| 6685 | set 0x174c, %l3 |
| 6686 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT |
| 6687 | .word 0x93b4c7d2 ! 33: PDIST pdistn %d50, %d18, %d40 |
| 6688 | brcommon3_10_22: |
| 6689 | nop |
| 6690 | setx common_target, %r12, %r27 |
| 6691 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 6692 | ba,a .+12 |
| 6693 | .word 0xdb37e000 ! 1: STQF_I - %f13, [0x0000, %r31] |
| 6694 | ba,a .+8 |
| 6695 | jmpl %r27+0, %r27 |
| 6696 | .word 0xdbe7e00b ! 34: CASA_R casa [%r31] %asi, %r11, %r13 |
| 6697 | .word 0xdac7e000 ! 35: LDSWA_I ldswa [%r31, + 0x0000] %asi, %r13 |
| 6698 | ibp_10_23: |
| 6699 | nop |
| 6700 | ta T_CHANGE_NONHPRIV |
| 6701 | .word 0xc1bfe080 ! 36: STDFA_I stda %f0, [0x0080, %r31] |
| 6702 | .word 0x8d802000 ! 37: WRFPRS_I wr %r0, 0x0000, %fprs |
| 6703 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 6704 | reduce_priv_lvl_10_24: |
| 6705 | ta T_CHANGE_NONPRIV ! macro |
| 6706 | trapasi_10_25: |
| 6707 | nop |
| 6708 | mov 0x38, %r1 ! (VA for ASI 0x50) |
| 6709 | .word 0xdac04a00 ! 39: LDSWA_R ldswa [%r1, %r0] 0x50, %r13 |
| 6710 | brcommon1_10_26: |
| 6711 | nop |
| 6712 | setx common_target, %r12, %r27 |
| 6713 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 6714 | ba,a .+12 |
| 6715 | .word 0xc32fe1a0 ! 1: STXFSR_I st-sfr %f1, [0x01a0, %r31] |
| 6716 | ba,a .+8 |
| 6717 | jmpl %r27+0, %r27 |
| 6718 | .word 0x9bb447d2 ! 40: PDIST pdistn %d48, %d18, %d44 |
| 6719 | ibp_10_27: |
| 6720 | nop |
| 6721 | .word 0xd5e7e014 ! 41: CASA_R casa [%r31] %asi, %r20, %r10 |
| 6722 | .word 0x93a000c6 ! 42: FNEGd fnegd %f6, %f40 |
| 6723 | nop |
| 6724 | ta T_CHANGE_HPRIV |
| 6725 | mov 0x10+1, %r10 |
| 6726 | set sync_thr_counter5, %r23 |
| 6727 | #ifndef SPC |
| 6728 | ldxa [%g0]0x63, %o1 |
| 6729 | and %o1, 0x38, %o1 |
| 6730 | add %o1, %r23, %r23 |
| 6731 | sllx %o1, 5, %o3 !(CID*256) |
| 6732 | #endif |
| 6733 | cas [%r23],%g0,%r10 !lock |
| 6734 | brnz %r10, cwq_10_28 |
| 6735 | rd %asi, %r12 |
| 6736 | wr %g0, 0x40, %asi |
| 6737 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 6738 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 6739 | cmp %l1, 1 |
| 6740 | bne cwq_10_28 |
| 6741 | set CWQ_BASE, %l6 |
| 6742 | #ifndef SPC |
| 6743 | add %l6, %o3, %l6 |
| 6744 | #endif |
| 6745 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 6746 | best_set_reg(0x206100a0, %l1, %l2) !# Control Word |
| 6747 | sllx %l2, 32, %l2 |
| 6748 | stx %l2, [%l6 + 0x0] |
| 6749 | membar #Sync |
| 6750 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 6751 | sub %l2, 0x40, %l2 |
| 6752 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 6753 | wr %r12, %g0, %asi |
| 6754 | st %g0, [%r23] |
| 6755 | cwq_10_28: |
| 6756 | ta T_CHANGE_NONHPRIV |
| 6757 | .word 0xa7414000 ! 43: RDPC rd %pc, %r19 |
| 6758 | splash_htba_10_29: |
| 6759 | nop |
| 6760 | ta T_CHANGE_HPRIV |
| 6761 | setx 0x0000000000280000, %r11, %r12 |
| 6762 | .word 0x8b98000c ! 44: WRHPR_HTBA_R wrhpr %r0, %r12, %htba |
| 6763 | #if (defined SPC || defined CMP1) |
| 6764 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_30) + 56, 16, 16)) -> intp(3,0,9) |
| 6765 | #else |
| 6766 | setx 0x87dad7ae7ed4b758, %r1, %r28 |
| 6767 | stxa %r28, [%g0] 0x73 |
| 6768 | #endif |
| 6769 | intvec_10_30: |
| 6770 | .word 0x39400001 ! 45: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 6771 | .word 0x3c800001 ! 1: BPOS bpos,a <label_0x1> |
| 6772 | .word 0x8d902f5d ! 46: WRPR_PSTATE_I wrpr %r0, 0x0f5d, %pstate |
| 6773 | ibp_10_32: |
| 6774 | nop |
| 6775 | .word 0xe1bfde00 ! 47: STDFA_R stda %f16, [%r0, %r31] |
| 6776 | .word 0xe537c000 ! 48: STQF_R - %f18, [%r0, %r31] |
| 6777 | ibp_10_33: |
| 6778 | nop |
| 6779 | ta T_CHANGE_NONHPRIV |
| 6780 | .word 0xc19fdf20 ! 49: LDDFA_R ldda [%r31, %r0], %f0 |
| 6781 | ibp_10_34: |
| 6782 | nop |
| 6783 | ta T_CHANGE_NONHPRIV |
| 6784 | .word 0x97a049b1 ! 50: FDIVs fdivs %f1, %f17, %f11 |
| 6785 | .word 0x8d903b14 ! 51: WRPR_PSTATE_I wrpr %r0, 0x1b14, %pstate |
| 6786 | .word 0xe24fc000 ! 52: LDSB_R ldsb [%r31 + %r0], %r17 |
| 6787 | .word 0xe2c7e0d8 ! 53: LDSWA_I ldswa [%r31, + 0x00d8] %asi, %r17 |
| 6788 | .word 0xe33fe1f2 ! 54: STDF_I std %f17, [0x01f2, %r31] |
| 6789 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 6790 | reduce_priv_lvl_10_36: |
| 6791 | ta T_CHANGE_NONHPRIV ! macro |
| 6792 | intveclr_10_37: |
| 6793 | nop |
| 6794 | ta T_CHANGE_HPRIV |
| 6795 | setx 0xef3ae1cebb327972, %r1, %r28 |
| 6796 | stxa %r28, [%g0] 0x72 |
| 6797 | .word 0x25400001 ! 56: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 6798 | ibp_10_38: |
| 6799 | nop |
| 6800 | ta T_CHANGE_NONHPRIV |
| 6801 | .word 0xe3e7e013 ! 57: CASA_R casa [%r31] %asi, %r19, %r17 |
| 6802 | .word 0x99524000 ! 58: RDPR_CWP <illegal instruction> |
| 6803 | ibp_10_39: |
| 6804 | nop |
| 6805 | ta T_CHANGE_NONHPRIV |
| 6806 | .word 0xe19fdf20 ! 59: LDDFA_R ldda [%r31, %r0], %f16 |
| 6807 | mondo_10_40: |
| 6808 | nop |
| 6809 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 6810 | stxa %r18, [%r0+0x3c0] %asi |
| 6811 | .word 0x9d950010 ! 60: WRPR_WSTATE_R wrpr %r20, %r16, %wstate |
| 6812 | ibp_10_41: |
| 6813 | nop |
| 6814 | .word 0xc1bfdf20 ! 61: STDFA_R stda %f0, [%r0, %r31] |
| 6815 | .word 0xe8dfe038 ! 62: LDXA_I ldxa [%r31, + 0x0038] %asi, %r20 |
| 6816 | .word 0x879ac010 ! 63: WRHPR_HINTP_R wrhpr %r11, %r16, %hintp |
| 6817 | #if (defined SPC || defined CMP1) |
| 6818 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_42) + 8, 16, 16)) -> intp(6,0,21) |
| 6819 | #else |
| 6820 | setx 0x44bd6edea7ef93b4, %r1, %r28 |
| 6821 | stxa %r28, [%g0] 0x73 |
| 6822 | #endif |
| 6823 | intvec_10_42: |
| 6824 | .word 0x39400001 ! 64: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 6825 | .word 0xe1bfd920 ! 65: STDFA_R stda %f16, [%r0, %r31] |
| 6826 | ibp_10_44: |
| 6827 | nop |
| 6828 | .word 0xc1bfe0a0 ! 66: STDFA_I stda %f0, [0x00a0, %r31] |
| 6829 | ibp_10_45: |
| 6830 | nop |
| 6831 | .word 0xe8bfc034 ! 67: STDA_R stda %r20, [%r31 + %r20] 0x01 |
| 6832 | .word 0xe927e147 ! 68: STF_I st %f20, [0x0147, %r31] |
| 6833 | mondo_10_46: |
| 6834 | nop |
| 6835 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 6836 | ta T_CHANGE_PRIV |
| 6837 | stxa %r17, [%r0+0x3e8] %asi |
| 6838 | .word 0x9d91000c ! 69: WRPR_WSTATE_R wrpr %r4, %r12, %wstate |
| 6839 | .word 0xb1840011 ! 70: WR_STICK_REG_R wr %r16, %r17, %- |
| 6840 | br_badelay3_10_47: |
| 6841 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> |
| 6842 | .word 0x20800001 ! 1: BN bn,a <label_0x1> |
| 6843 | .word 0xd3144002 ! 1: LDQF_R - [%r17, %r2], %f9 |
| 6844 | .word 0xa5a2c832 ! 71: FADDs fadds %f11, %f18, %f18 |
| 6845 | fpinit_10_48: |
| 6846 | nop |
| 6847 | setx fp_data_quads, %r19, %r20 |
| 6848 | ldd [%r20], %f0 |
| 6849 | ldd [%r20+8], %f4 |
| 6850 | ld [%r20+16], %fsr |
| 6851 | ld [%r20+24], %r19 |
| 6852 | wr %r19, %g0, %gsr |
| 6853 | .word 0xc3e833aa ! 72: PREFETCHA_I prefetcha [%r0, + 0xfffff3aa] %asi, #one_read |
| 6854 | brcommon2_10_49: |
| 6855 | nop |
| 6856 | setx common_target, %r12, %r27 |
| 6857 | ba,a .+12 |
| 6858 | .word 0x9f802020 ! 1: SIR sir 0x0020 |
| 6859 | ba,a .+8 |
| 6860 | jmpl %r27+0, %r27 |
| 6861 | .word 0xe19fe160 ! 73: LDDFA_I ldda [%r31, 0x0160], %f16 |
| 6862 | #if (defined SPC || defined CMP1) |
| 6863 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_50) + 24, 16, 16)) -> intp(3,0,11) |
| 6864 | #else |
| 6865 | setx 0x472505639a4e89ca, %r1, %r28 |
| 6866 | stxa %r28, [%g0] 0x73 |
| 6867 | #endif |
| 6868 | intvec_10_50: |
| 6869 | .word 0x39400001 ! 74: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 6870 | .word 0xc32fc000 ! 75: STXFSR_R st-sfr %f1, [%r0, %r31] |
| 6871 | intveclr_10_51: |
| 6872 | nop |
| 6873 | ta T_CHANGE_HPRIV |
| 6874 | setx 0xf2ba20af17f37ed7, %r1, %r28 |
| 6875 | stxa %r28, [%g0] 0x72 |
| 6876 | ta T_CHANGE_NONHPRIV |
| 6877 | .word 0x25400001 ! 76: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 6878 | brcommon3_10_52: |
| 6879 | nop |
| 6880 | setx common_target, %r12, %r27 |
| 6881 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 6882 | ba,a .+12 |
| 6883 | .word 0xdb37e1e0 ! 1: STQF_I - %f13, [0x01e0, %r31] |
| 6884 | ba,a .+8 |
| 6885 | jmpl %r27+0, %r27 |
| 6886 | .word 0xdbe7e00d ! 77: CASA_R casa [%r31] %asi, %r13, %r13 |
| 6887 | .word 0xa9840014 ! 78: WR_SET_SOFTINT_R wr %r16, %r20, %set_softint |
| 6888 | .word 0x22ca0001 ! 1: BRZ brz,a,pt %r8,<label_0xa0001> |
| 6889 | .word 0x8d903ddb ! 79: WRPR_PSTATE_I wrpr %r0, 0x1ddb, %pstate |
| 6890 | splash_lsu_10_54: |
| 6891 | nop |
| 6892 | ta T_CHANGE_HPRIV |
| 6893 | set 0x8e6e3753, %r2 |
| 6894 | mov 0x2, %r1 |
| 6895 | sllx %r1, 32, %r1 |
| 6896 | or %r1, %r2, %r2 |
| 6897 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 6898 | ta T_CHANGE_NONHPRIV |
| 6899 | .word 0x3d400001 ! 80: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 6900 | splash_lsu_10_55: |
| 6901 | nop |
| 6902 | ta T_CHANGE_HPRIV |
| 6903 | set 0x879b8aac, %r2 |
| 6904 | mov 0x6, %r1 |
| 6905 | sllx %r1, 32, %r1 |
| 6906 | or %r1, %r2, %r2 |
| 6907 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 6908 | .word 0x3d400001 ! 81: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 6909 | nop |
| 6910 | ta T_CHANGE_HPRIV ! macro |
| 6911 | donret_10_56: |
| 6912 | rd %pc, %r12 |
| 6913 | add %r12, (donretarg_10_56-donret_10_56+4), %r12 |
| 6914 | add %r12, 0x4, %r11 ! seq tnpc |
| 6915 | wrpr %g0, 0x1, %tl |
| 6916 | wrpr %g0, %r12, %tpc |
| 6917 | wrpr %g0, %r11, %tnpc |
| 6918 | set (0x0090d700 | (0x83 << 24)), %r13 |
| 6919 | and %r12, 0xfff, %r14 |
| 6920 | sllx %r14, 30, %r14 |
| 6921 | or %r13, %r14, %r20 |
| 6922 | wrpr %r20, %g0, %tstate |
| 6923 | wrhpr %g0, 0xdcf, %htstate |
| 6924 | ta T_CHANGE_NONHPRIV ! rand=1 (10) |
| 6925 | retry |
| 6926 | donretarg_10_56: |
| 6927 | .word 0x95a189d0 ! 82: FDIVd fdivd %f6, %f16, %f10 |
| 6928 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 6929 | reduce_priv_lvl_10_57: |
| 6930 | ta T_CHANGE_NONHPRIV ! macro |
| 6931 | dvapa_10_58: |
| 6932 | nop |
| 6933 | ta T_CHANGE_HPRIV |
| 6934 | mov 0x833, %r20 |
| 6935 | mov 0xb, %r19 |
| 6936 | sllx %r20, 23, %r20 |
| 6937 | or %r19, %r20, %r19 |
| 6938 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 6939 | mov 0x38, %r18 |
| 6940 | stxa %r31, [%r18]0x58 |
| 6941 | ta T_CHANGE_NONHPRIV |
| 6942 | .word 0x99a449b1 ! 84: FDIVs fdivs %f17, %f17, %f12 |
| 6943 | nop |
| 6944 | ta T_CHANGE_HPRIV ! macro |
| 6945 | donret_10_59: |
| 6946 | rd %pc, %r12 |
| 6947 | add %r12, (donretarg_10_59-donret_10_59), %r12 |
| 6948 | add %r12, 0x8, %r11 ! nonseq tnpc |
| 6949 | wrpr %g0, 0x1, %tl |
| 6950 | wrpr %g0, %r12, %tpc |
| 6951 | wrpr %g0, %r11, %tnpc |
| 6952 | set (0x0013f200 | (32 << 24)), %r13 |
| 6953 | and %r12, 0xfff, %r14 |
| 6954 | sllx %r14, 30, %r14 |
| 6955 | or %r13, %r14, %r20 |
| 6956 | wrpr %r20, %g0, %tstate |
| 6957 | wrhpr %g0, 0x9de, %htstate |
| 6958 | ta T_CHANGE_NONPRIV ! rand=0 (10) |
| 6959 | .word 0x20800001 ! 1: BN bn,a <label_0x1> |
| 6960 | done |
| 6961 | donretarg_10_59: |
| 6962 | .word 0xd86fe199 ! 85: LDSTUB_I ldstub %r12, [%r31 + 0x0199] |
| 6963 | trapasi_10_60: |
| 6964 | nop |
| 6965 | mov 0x30, %r1 ! (VA for ASI 0x5b) |
| 6966 | .word 0xd8c84b60 ! 86: LDSBA_R ldsba [%r1, %r0] 0x5b, %r12 |
| 6967 | otherw |
| 6968 | mov 0x34, %r30 |
| 6969 | .word 0x91d0001e ! 87: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 6970 | pmu_10_61: |
| 6971 | nop |
| 6972 | setx 0xfffffb8dfffff4fa, %g1, %g7 |
| 6973 | .word 0xa3800007 ! 88: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 6974 | .word 0x89800011 ! 89: WRTICK_R wr %r0, %r17, %tick |
| 6975 | dvapa_10_63: |
| 6976 | nop |
| 6977 | ta T_CHANGE_HPRIV |
| 6978 | mov 0xf89, %r20 |
| 6979 | mov 0x4, %r19 |
| 6980 | sllx %r20, 23, %r20 |
| 6981 | or %r19, %r20, %r19 |
| 6982 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 6983 | mov 0x38, %r18 |
| 6984 | stxa %r31, [%r18]0x58 |
| 6985 | ta T_CHANGE_NONHPRIV |
| 6986 | .word 0xc32fc013 ! 90: STXFSR_R st-sfr %f1, [%r19, %r31] |
| 6987 | .word 0xd857e0d0 ! 91: LDSH_I ldsh [%r31 + 0x00d0], %r12 |
| 6988 | .word 0xb1808003 ! 92: WR_STICK_REG_R wr %r2, %r3, %- |
| 6989 | .word 0xd89fd060 ! 93: LDDA_R ldda [%r31, %r0] 0x83, %r12 |
| 6990 | splash_hpstate_10_64: |
| 6991 | .word 0x3b400001 ! 1: FBPLE fble,a,pn %fcc0, <label_0x1> |
| 6992 | .word 0x8198258e ! 94: WRHPR_HPSTATE_I wrhpr %r0, 0x058e, %hpstate |
| 6993 | .word 0xc30fc000 ! 95: LDXFSR_R ld-fsr [%r31, %r0], %f1 |
| 6994 | brcommon1_10_65: |
| 6995 | nop |
| 6996 | setx common_target, %r12, %r27 |
| 6997 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 6998 | ba,a .+12 |
| 6999 | .word 0x99702130 ! 1: POPC_I popc 0x0130, %r12 |
| 7000 | ba,a .+8 |
| 7001 | jmpl %r27+0, %r27 |
| 7002 | .word 0x87ab4a4b ! 96: FCMPd fcmpd %fcc<n>, %f44, %f42 |
| 7003 | .word 0x9f802ecc ! 97: SIR sir 0x0ecc |
| 7004 | intveclr_10_66: |
| 7005 | nop |
| 7006 | ta T_CHANGE_HPRIV |
| 7007 | setx 0x5758405d2147a2d5, %r1, %r28 |
| 7008 | stxa %r28, [%g0] 0x72 |
| 7009 | ta T_CHANGE_NONHPRIV |
| 7010 | .word 0x25400001 ! 98: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 7011 | .word 0x89800011 ! 99: WRTICK_R wr %r0, %r17, %tick |
| 7012 | splash_tba_10_68: |
| 7013 | nop |
| 7014 | ta T_CHANGE_PRIV |
| 7015 | set 0x120000, %r12 |
| 7016 | .word 0x8b90000c ! 100: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 7017 | brcommon1_10_69: |
| 7018 | nop |
| 7019 | setx common_target, %r12, %r27 |
| 7020 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 7021 | ba,a .+12 |
| 7022 | .word 0xd06fe060 ! 1: LDSTUB_I ldstub %r8, [%r31 + 0x0060] |
| 7023 | ba,a .+8 |
| 7024 | jmpl %r27+0, %r27 |
| 7025 | .word 0xa5703353 ! 101: POPC_I popc 0x1353, %r18 |
| 7026 | intveclr_10_70: |
| 7027 | nop |
| 7028 | ta T_CHANGE_HPRIV |
| 7029 | setx 0xde39870377690af4, %r1, %r28 |
| 7030 | stxa %r28, [%g0] 0x72 |
| 7031 | .word 0x25400001 ! 102: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 7032 | setx 0xcb71a27e5f88e3ea, %r1, %r28 |
| 7033 | stxa %r28, [%g0] 0x73 |
| 7034 | intvec_10_71: |
| 7035 | .word 0x39400001 ! 103: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 7036 | nop |
| 7037 | ta T_CHANGE_HPRIV ! macro |
| 7038 | donret_10_72: |
| 7039 | rd %pc, %r12 |
| 7040 | add %r12, (donretarg_10_72-donret_10_72), %r12 |
| 7041 | add %r12, 0x8, %r11 ! nonseq tnpc |
| 7042 | wrpr %g0, 0x1, %tl |
| 7043 | wrpr %g0, %r12, %tpc |
| 7044 | wrpr %g0, %r11, %tnpc |
| 7045 | set (0x00c6d800 | (0x88 << 24)), %r13 |
| 7046 | and %r12, 0xfff, %r14 |
| 7047 | sllx %r14, 30, %r14 |
| 7048 | or %r13, %r14, %r20 |
| 7049 | wrpr %r20, %g0, %tstate |
| 7050 | wrhpr %g0, 0x4ce, %htstate |
| 7051 | ta T_CHANGE_NONHPRIV ! rand=1 (10) |
| 7052 | .word 0x21400001 ! 1: FBPN fbn,a,pn %fcc0, <label_0x1> |
| 7053 | retry |
| 7054 | donretarg_10_72: |
| 7055 | .word 0x2ccc0001 ! 104: BRGZ brgz,a,pt %r16,<label_0xc0001> |
| 7056 | intveclr_10_73: |
| 7057 | nop |
| 7058 | ta T_CHANGE_HPRIV |
| 7059 | setx 0xf75fe73e8ebe6fc0, %r1, %r28 |
| 7060 | stxa %r28, [%g0] 0x72 |
| 7061 | ta T_CHANGE_NONHPRIV |
| 7062 | .word 0x25400001 ! 105: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 7063 | .word 0xc19fdf20 ! 106: LDDFA_R ldda [%r31, %r0], %f0 |
| 7064 | ta T_CHANGE_NONHPRIV |
| 7065 | .word 0x8143e011 ! 107: MEMBAR membar #LoadLoad | #Lookaside |
| 7066 | .word 0xc32fc000 ! 108: STXFSR_R st-sfr %f1, [%r0, %r31] |
| 7067 | fbuge skip_10_76 |
| 7068 | bgu skip_10_76 |
| 7069 | .align 1024 |
| 7070 | skip_10_76: |
| 7071 | .word 0x93b4c4c2 ! 109: FCMPNE32 fcmpne32 %d50, %d2, %r9 |
| 7072 | .word 0xe1bfe0e0 ! 110: STDFA_I stda %f16, [0x00e0, %r31] |
| 7073 | intveclr_10_77: |
| 7074 | nop |
| 7075 | ta T_CHANGE_HPRIV |
| 7076 | setx 0x0c0831bd2607eff3, %r1, %r28 |
| 7077 | stxa %r28, [%g0] 0x72 |
| 7078 | ta T_CHANGE_NONHPRIV |
| 7079 | .word 0x25400001 ! 111: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 7080 | splash_cmpr_10_78: |
| 7081 | mov 0, %r18 |
| 7082 | sllx %r18, 63, %r18 |
| 7083 | rd %tick, %r17 |
| 7084 | add %r17, 0x80, %r17 |
| 7085 | or %r17, %r18, %r17 |
| 7086 | ta T_CHANGE_HPRIV |
| 7087 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 7088 | ta T_CHANGE_PRIV |
| 7089 | .word 0xaf800011 ! 112: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 7090 | .word 0xc1bfe080 ! 113: STDFA_I stda %f0, [0x0080, %r31] |
| 7091 | unsupttte_10_79: |
| 7092 | nop |
| 7093 | ta T_CHANGE_HPRIV |
| 7094 | mov 1, %r20 |
| 7095 | sllx %r20, 63, %r20 |
| 7096 | or %r20, 2,%r20 |
| 7097 | stxa %r20, [%g0]0x5c ! D unsupported page size .. |
| 7098 | ta T_CHANGE_NONHPRIV |
| 7099 | .word 0xa5a309ab ! 114: FDIVs fdivs %f12, %f11, %f18 |
| 7100 | tagged_10_80: |
| 7101 | tsubcctv %r8, 0x1b67, %r20 |
| 7102 | .word 0xd807e1da ! 115: LDUW_I lduw [%r31 + 0x01da], %r12 |
| 7103 | .word 0xa2d4c010 ! 116: UMULcc_R umulcc %r19, %r16, %r17 |
| 7104 | setx 0x01b140c85b4058c8, %r1, %r28 |
| 7105 | stxa %r28, [%g0] 0x73 |
| 7106 | intvec_10_81: |
| 7107 | .word 0x39400001 ! 117: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 7108 | trapasi_10_82: |
| 7109 | nop |
| 7110 | mov 0x0, %r1 ! (VA for ASI 0x5a) |
| 7111 | .word 0xd2904b40 ! 118: LDUHA_R lduha [%r1, %r0] 0x5a, %r9 |
| 7112 | .word 0x2a800001 ! 1: BCS bcs,a <label_0x1> |
| 7113 | .word 0x8d902186 ! 119: WRPR_PSTATE_I wrpr %r0, 0x0186, %pstate |
| 7114 | ibp_10_84: |
| 7115 | nop |
| 7116 | .word 0xd3e7e00b ! 120: CASA_R casa [%r31] %asi, %r11, %r9 |
| 7117 | nop |
| 7118 | ta T_CHANGE_HPRIV |
| 7119 | mov 0x10, %r10 |
| 7120 | set sync_thr_counter6, %r23 |
| 7121 | #ifndef SPC |
| 7122 | ldxa [%g0]0x63, %o1 |
| 7123 | and %o1, 0x38, %o1 |
| 7124 | add %o1, %r23, %r23 |
| 7125 | #endif |
| 7126 | cas [%r23],%g0,%r10 !lock |
| 7127 | brnz %r10, sma_10_85 |
| 7128 | rd %asi, %r12 |
| 7129 | wr %g0, 0x40, %asi |
| 7130 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 7131 | set 0x001a1fff, %g1 |
| 7132 | stxa %g1, [%g0 + 0x80] %asi |
| 7133 | wr %r12, %g0, %asi |
| 7134 | st %g0, [%r23] |
| 7135 | sma_10_85: |
| 7136 | ta T_CHANGE_NONHPRIV |
| 7137 | .word 0xd3e7e008 ! 121: CASA_R casa [%r31] %asi, %r8, %r9 |
| 7138 | fpinit_10_86: |
| 7139 | nop |
| 7140 | setx fp_data_quads, %r19, %r20 |
| 7141 | ldd [%r20], %f0 |
| 7142 | ldd [%r20+8], %f4 |
| 7143 | ld [%r20+16], %fsr |
| 7144 | ld [%r20+24], %r19 |
| 7145 | wr %r19, %g0, %gsr |
| 7146 | .word 0xc3e82159 ! 122: PREFETCHA_I prefetcha [%r0, + 0x0159] %asi, #one_read |
| 7147 | .word 0x9194c00d ! 123: WRPR_PIL_R wrpr %r19, %r13, %pil |
| 7148 | intveclr_10_88: |
| 7149 | nop |
| 7150 | ta T_CHANGE_HPRIV |
| 7151 | setx 0xb350953169e74e60, %r1, %r28 |
| 7152 | stxa %r28, [%g0] 0x72 |
| 7153 | .word 0x25400001 ! 124: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 7154 | mondo_10_89: |
| 7155 | nop |
| 7156 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 7157 | stxa %r18, [%r0+0x3e8] %asi |
| 7158 | .word 0x9d92c013 ! 125: WRPR_WSTATE_R wrpr %r11, %r19, %wstate |
| 7159 | nop |
| 7160 | ta T_CHANGE_HPRIV ! macro |
| 7161 | donret_10_90: |
| 7162 | rd %pc, %r12 |
| 7163 | add %r12, (donretarg_10_90-donret_10_90+4), %r12 |
| 7164 | add %r12, 0x4, %r11 ! seq tnpc |
| 7165 | wrpr %g0, 0x1, %tl |
| 7166 | wrpr %g0, %r12, %tpc |
| 7167 | wrpr %g0, %r11, %tnpc |
| 7168 | set (0x00cc7800 | (22 << 24)), %r13 |
| 7169 | and %r12, 0xfff, %r14 |
| 7170 | sllx %r14, 30, %r14 |
| 7171 | or %r13, %r14, %r20 |
| 7172 | wrpr %r20, %g0, %tstate |
| 7173 | wrhpr %g0, 0x1c1f, %htstate |
| 7174 | ta T_CHANGE_NONHPRIV ! rand=1 (10) |
| 7175 | retry |
| 7176 | donretarg_10_90: |
| 7177 | .word 0xd26fe138 ! 126: LDSTUB_I ldstub %r9, [%r31 + 0x0138] |
| 7178 | .word 0xd2cfe088 ! 127: LDSBA_I ldsba [%r31, + 0x0088] %asi, %r9 |
| 7179 | .word 0xd23fe14b ! 128: STD_I std %r9, [%r31 + 0x014b] |
| 7180 | .word 0x8d802004 ! 129: WRFPRS_I wr %r0, 0x0004, %fprs |
| 7181 | .word 0x91d02034 ! 130: Tcc_I ta icc_or_xcc, %r0 + 52 |
| 7182 | .word 0x99520000 ! 131: RDPR_PIL rdpr %pil, %r12 |
| 7183 | mondo_10_91: |
| 7184 | nop |
| 7185 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 7186 | ta T_CHANGE_PRIV |
| 7187 | stxa %r12, [%r0+0x3e0] %asi |
| 7188 | .word 0x9d940014 ! 132: WRPR_WSTATE_R wrpr %r16, %r20, %wstate |
| 7189 | #if (defined SPC || defined CMP1) |
| 7190 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_92) + 32, 16, 16)) -> intp(0,0,24) |
| 7191 | #else |
| 7192 | setx 0x9ac14beb5bbb0541, %r1, %r28 |
| 7193 | stxa %r28, [%g0] 0x73 |
| 7194 | #endif |
| 7195 | intvec_10_92: |
| 7196 | .word 0x39400001 ! 133: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 7197 | fpinit_10_93: |
| 7198 | nop |
| 7199 | setx fp_data_quads, %r19, %r20 |
| 7200 | ldd [%r20], %f0 |
| 7201 | ldd [%r20+8], %f4 |
| 7202 | ld [%r20+16], %fsr |
| 7203 | ld [%r20+24], %r19 |
| 7204 | wr %r19, %g0, %gsr |
| 7205 | .word 0x87a80a44 ! 134: FCMPd fcmpd %fcc<n>, %f0, %f4 |
| 7206 | invalw |
| 7207 | mov 0xb0, %r30 |
| 7208 | .word 0x91d0001e ! 135: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 7209 | .word 0xe2800ac0 ! 136: LDUWA_R lduwa [%r0, %r0] 0x56, %r17 |
| 7210 | ibp_10_94: |
| 7211 | nop |
| 7212 | .word 0xe2dfc02c ! 137: LDXA_R ldxa [%r31, %r12] 0x01, %r17 |
| 7213 | nop |
| 7214 | ta T_CHANGE_HPRIV |
| 7215 | mov 0x10+1, %r10 |
| 7216 | set sync_thr_counter5, %r23 |
| 7217 | #ifndef SPC |
| 7218 | ldxa [%g0]0x63, %o1 |
| 7219 | and %o1, 0x38, %o1 |
| 7220 | add %o1, %r23, %r23 |
| 7221 | sllx %o1, 5, %o3 !(CID*256) |
| 7222 | #endif |
| 7223 | cas [%r23],%g0,%r10 !lock |
| 7224 | brnz %r10, cwq_10_95 |
| 7225 | rd %asi, %r12 |
| 7226 | wr %g0, 0x40, %asi |
| 7227 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 7228 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 7229 | cmp %l1, 1 |
| 7230 | bne cwq_10_95 |
| 7231 | set CWQ_BASE, %l6 |
| 7232 | #ifndef SPC |
| 7233 | add %l6, %o3, %l6 |
| 7234 | #endif |
| 7235 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 7236 | best_set_reg(0x20610040, %l1, %l2) !# Control Word |
| 7237 | sllx %l2, 32, %l2 |
| 7238 | stx %l2, [%l6 + 0x0] |
| 7239 | membar #Sync |
| 7240 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 7241 | sub %l2, 0x40, %l2 |
| 7242 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 7243 | wr %r12, %g0, %asi |
| 7244 | st %g0, [%r23] |
| 7245 | cwq_10_95: |
| 7246 | ta T_CHANGE_NONHPRIV |
| 7247 | .word 0xa5414000 ! 138: RDPC rd %pc, %r18 |
| 7248 | .word 0x87802058 ! 139: WRASI_I wr %r0, 0x0058, %asi |
| 7249 | #if (defined SPC || defined CMP1) |
| 7250 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_96) + 48, 16, 16)) -> intp(3,0,26) |
| 7251 | #else |
| 7252 | setx 0x6737597ab3198875, %r1, %r28 |
| 7253 | stxa %r28, [%g0] 0x73 |
| 7254 | #endif |
| 7255 | intvec_10_96: |
| 7256 | .word 0x39400001 ! 140: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 7257 | .word 0xe11fe1f0 ! 141: LDDF_I ldd [%r31, 0x01f0], %f16 |
| 7258 | dvapa_10_98: |
| 7259 | nop |
| 7260 | ta T_CHANGE_HPRIV |
| 7261 | mov 0x929, %r20 |
| 7262 | mov 0x7, %r19 |
| 7263 | sllx %r20, 23, %r20 |
| 7264 | or %r19, %r20, %r19 |
| 7265 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 7266 | mov 0x38, %r18 |
| 7267 | stxa %r31, [%r18]0x58 |
| 7268 | ta T_CHANGE_NONHPRIV |
| 7269 | .word 0x93b147d0 ! 142: PDIST pdistn %d36, %d16, %d40 |
| 7270 | nop |
| 7271 | ta T_CHANGE_HPRIV ! macro |
| 7272 | donret_10_99: |
| 7273 | rd %pc, %r12 |
| 7274 | add %r12, (donretarg_10_99-donret_10_99+4), %r12 |
| 7275 | add %r12, 0x4, %r11 ! seq tnpc |
| 7276 | wrpr %g0, 0x2, %tl |
| 7277 | wrpr %g0, %r12, %tpc |
| 7278 | wrpr %g0, %r11, %tnpc |
| 7279 | set (0x00d2ca00 | (32 << 24)), %r13 |
| 7280 | and %r12, 0xfff, %r14 |
| 7281 | sllx %r14, 30, %r14 |
| 7282 | or %r13, %r14, %r20 |
| 7283 | wrpr %r20, %g0, %tstate |
| 7284 | wrhpr %g0, 0x131f, %htstate |
| 7285 | ta T_CHANGE_NONHPRIV ! rand=1 (10) |
| 7286 | .word 0x2ccc4001 ! 1: BRGZ brgz,a,pt %r17,<label_0xc4001> |
| 7287 | done |
| 7288 | donretarg_10_99: |
| 7289 | .word 0x2d400001 ! 143: FBPG fbg,a,pn %fcc0, <label_0x1> |
| 7290 | .word 0xe477e011 ! 144: STX_I stx %r18, [%r31 + 0x0011] |
| 7291 | .word 0x8d902dd9 ! 145: WRPR_PSTATE_I wrpr %r0, 0x0dd9, %pstate |
| 7292 | .word 0xe4800b60 ! 146: LDUWA_R lduwa [%r0, %r0] 0x5b, %r18 |
| 7293 | trapasi_10_101: |
| 7294 | nop |
| 7295 | mov 0x3c8, %r1 ! (VA for ASI 0x25) |
| 7296 | .word 0xe48844a0 ! 147: LDUBA_R lduba [%r1, %r0] 0x25, %r18 |
| 7297 | ibp_10_102: |
| 7298 | nop |
| 7299 | .word 0xe5e7e008 ! 148: CASA_R casa [%r31] %asi, %r8, %r18 |
| 7300 | setx 0x7bc1380908d2bf74, %r1, %r28 |
| 7301 | stxa %r28, [%g0] 0x73 |
| 7302 | intvec_10_103: |
| 7303 | .word 0x39400001 ! 149: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 7304 | mondo_10_104: |
| 7305 | nop |
| 7306 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 7307 | stxa %r19, [%r0+0x3c0] %asi |
| 7308 | .word 0x9d92c014 ! 150: WRPR_WSTATE_R wrpr %r11, %r20, %wstate |
| 7309 | setx 0x75aa7e18c931222b, %r1, %r28 |
| 7310 | stxa %r28, [%g0] 0x73 |
| 7311 | intvec_10_105: |
| 7312 | .word 0x39400001 ! 151: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 7313 | ibp_10_106: |
| 7314 | nop |
| 7315 | .word 0xe4bfc02a ! 152: STDA_R stda %r18, [%r31 + %r10] 0x01 |
| 7316 | trapasi_10_107: |
| 7317 | nop |
| 7318 | mov 0x0, %r1 ! (VA for ASI 0x72) |
| 7319 | .word 0xe4d04e40 ! 153: LDSHA_R ldsha [%r1, %r0] 0x72, %r18 |
| 7320 | .word 0x9f803896 ! 154: SIR sir 0x1896 |
| 7321 | splash_cmpr_10_108: |
| 7322 | mov 1, %r18 |
| 7323 | sllx %r18, 63, %r18 |
| 7324 | rd %tick, %r17 |
| 7325 | add %r17, 0x60, %r17 |
| 7326 | or %r17, %r18, %r17 |
| 7327 | .word 0xaf800011 ! 155: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 7328 | intveclr_10_109: |
| 7329 | nop |
| 7330 | ta T_CHANGE_HPRIV |
| 7331 | setx 0xa02c27ce71f3f02f, %r1, %r28 |
| 7332 | stxa %r28, [%g0] 0x72 |
| 7333 | ta T_CHANGE_NONHPRIV |
| 7334 | .word 0x25400001 ! 156: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 7335 | ibp_10_110: |
| 7336 | nop |
| 7337 | .word 0x9b7034aa ! 157: POPC_I popc 0x14aa, %r13 |
| 7338 | .word 0xc32fc000 ! 158: STXFSR_R st-sfr %f1, [%r0, %r31] |
| 7339 | .word 0xe19fc3e0 ! 159: LDDFA_R ldda [%r31, %r0], %f16 |
| 7340 | .word 0x9f80278f ! 160: SIR sir 0x078f |
| 7341 | splash_hpstate_10_112: |
| 7342 | .word 0x29400001 ! 1: FBPL fbl,a,pn %fcc0, <label_0x1> |
| 7343 | .word 0x81983947 ! 161: WRHPR_HPSTATE_I wrhpr %r0, 0x1947, %hpstate |
| 7344 | .word 0xe327e00a ! 162: STF_I st %f17, [0x000a, %r31] |
| 7345 | .word 0x91d020b4 ! 163: Tcc_I ta icc_or_xcc, %r0 + 180 |
| 7346 | mondo_10_113: |
| 7347 | nop |
| 7348 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 7349 | stxa %r6, [%r0+0x3d0] %asi |
| 7350 | .word 0x9d94c010 ! 164: WRPR_WSTATE_R wrpr %r19, %r16, %wstate |
| 7351 | br_badelay2_10_114: |
| 7352 | .word 0x20800001 ! 1: BN bn,a <label_0x1> |
| 7353 | allclean |
| 7354 | .word 0x93b4c314 ! 165: ALIGNADDRESS alignaddr %r19, %r20, %r9 |
| 7355 | fpinit_10_115: |
| 7356 | nop |
| 7357 | setx fp_data_quads, %r19, %r20 |
| 7358 | ldd [%r20], %f0 |
| 7359 | ldd [%r20+8], %f4 |
| 7360 | ld [%r20+16], %fsr |
| 7361 | ld [%r20+24], %r19 |
| 7362 | wr %r19, %g0, %gsr |
| 7363 | .word 0x8da009c4 ! 166: FDIVd fdivd %f0, %f4, %f6 |
| 7364 | set 0xd23, %l3 |
| 7365 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT |
| 7366 | .word 0x97b407c6 ! 167: PDIST pdistn %d16, %d6, %d42 |
| 7367 | memptr_10_116: |
| 7368 | set 0x60540000, %r31 |
| 7369 | .word 0x85846806 ! 168: WRCCR_I wr %r17, 0x0806, %ccr |
| 7370 | .word 0xd4c7e128 ! 169: LDSWA_I ldswa [%r31, + 0x0128] %asi, %r10 |
| 7371 | setx 0xf7baabc133ece6a4, %r1, %r28 |
| 7372 | stxa %r28, [%g0] 0x73 |
| 7373 | intvec_10_117: |
| 7374 | .word 0x39400001 ! 170: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 7375 | splash_hpstate_10_118: |
| 7376 | .word 0x8198270d ! 171: WRHPR_HPSTATE_I wrhpr %r0, 0x070d, %hpstate |
| 7377 | mondo_10_119: |
| 7378 | nop |
| 7379 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 7380 | ta T_CHANGE_PRIV |
| 7381 | stxa %r20, [%r0+0x3d0] %asi |
| 7382 | .word 0x9d914003 ! 172: WRPR_WSTATE_R wrpr %r5, %r3, %wstate |
| 7383 | nop |
| 7384 | ta T_CHANGE_HPRIV |
| 7385 | mov 0x10+1, %r10 |
| 7386 | set sync_thr_counter5, %r23 |
| 7387 | #ifndef SPC |
| 7388 | ldxa [%g0]0x63, %o1 |
| 7389 | and %o1, 0x38, %o1 |
| 7390 | add %o1, %r23, %r23 |
| 7391 | sllx %o1, 5, %o3 !(CID*256) |
| 7392 | #endif |
| 7393 | cas [%r23],%g0,%r10 !lock |
| 7394 | brnz %r10, cwq_10_120 |
| 7395 | rd %asi, %r12 |
| 7396 | wr %g0, 0x40, %asi |
| 7397 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 7398 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 7399 | cmp %l1, 1 |
| 7400 | bne cwq_10_120 |
| 7401 | set CWQ_BASE, %l6 |
| 7402 | #ifndef SPC |
| 7403 | add %l6, %o3, %l6 |
| 7404 | #endif |
| 7405 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 7406 | best_set_reg(0x20610060, %l1, %l2) !# Control Word |
| 7407 | sllx %l2, 32, %l2 |
| 7408 | stx %l2, [%l6 + 0x0] |
| 7409 | membar #Sync |
| 7410 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 7411 | sub %l2, 0x40, %l2 |
| 7412 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 7413 | wr %r12, %g0, %asi |
| 7414 | st %g0, [%r23] |
| 7415 | cwq_10_120: |
| 7416 | ta T_CHANGE_NONHPRIV |
| 7417 | .word 0xa1414000 ! 173: RDPC rd %pc, %r16 |
| 7418 | ibp_10_121: |
| 7419 | nop |
| 7420 | ta T_CHANGE_NONHPRIV |
| 7421 | .word 0xc1bfe000 ! 174: STDFA_I stda %f0, [0x0000, %r31] |
| 7422 | .word 0xd4800a80 ! 175: LDUWA_R lduwa [%r0, %r0] 0x54, %r10 |
| 7423 | .word 0x8d802004 ! 176: WRFPRS_I wr %r0, 0x0004, %fprs |
| 7424 | #if (defined SPC || defined CMP1) |
| 7425 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_122) + 56, 16, 16)) -> intp(4,0,5) |
| 7426 | #else |
| 7427 | setx 0xcb1252b42983f2a2, %r1, %r28 |
| 7428 | stxa %r28, [%g0] 0x73 |
| 7429 | #endif |
| 7430 | intvec_10_122: |
| 7431 | .word 0x39400001 ! 177: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 7432 | setx 0xa1808db1c95a3a26, %r1, %r28 |
| 7433 | stxa %r28, [%g0] 0x73 |
| 7434 | intvec_10_123: |
| 7435 | .word 0x39400001 ! 178: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 7436 | .word 0x83d02034 ! 179: Tcc_I te icc_or_xcc, %r0 + 52 |
| 7437 | #if (defined SPC || defined CMP1) |
| 7438 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_10_124) + 0, 16, 16)) -> intp(6,0,22) |
| 7439 | #else |
| 7440 | setx 0x3799c17c252f0ac1, %r1, %r28 |
| 7441 | stxa %r28, [%g0] 0x73 |
| 7442 | #endif |
| 7443 | intvec_10_124: |
| 7444 | .word 0x39400001 ! 180: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 7445 | fpinit_10_125: |
| 7446 | nop |
| 7447 | setx fp_data_quads, %r19, %r20 |
| 7448 | ldd [%r20], %f0 |
| 7449 | ldd [%r20+8], %f4 |
| 7450 | ld [%r20+16], %fsr |
| 7451 | ld [%r20+24], %r19 |
| 7452 | wr %r19, %g0, %gsr |
| 7453 | .word 0x89a009c4 ! 181: FDIVd fdivd %f0, %f4, %f4 |
| 7454 | splash_tba_10_126: |
| 7455 | nop |
| 7456 | ta T_CHANGE_PRIV |
| 7457 | setx 0x0000000000380000, %r11, %r12 |
| 7458 | .word 0x8b90000c ! 182: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 7459 | fpinit_10_127: |
| 7460 | nop |
| 7461 | setx fp_data_quads, %r19, %r20 |
| 7462 | ldd [%r20], %f0 |
| 7463 | ldd [%r20+8], %f4 |
| 7464 | ld [%r20+16], %fsr |
| 7465 | ld [%r20+24], %r19 |
| 7466 | wr %r19, %g0, %gsr |
| 7467 | .word 0x89a009a4 ! 183: FDIVs fdivs %f0, %f4, %f4 |
| 7468 | .word 0xd4dfe0a0 ! 184: LDXA_I ldxa [%r31, + 0x00a0] %asi, %r10 |
| 7469 | nop |
| 7470 | ta T_CHANGE_HPRIV |
| 7471 | mov 0x10+1, %r10 |
| 7472 | set sync_thr_counter5, %r23 |
| 7473 | #ifndef SPC |
| 7474 | ldxa [%g0]0x63, %o1 |
| 7475 | and %o1, 0x38, %o1 |
| 7476 | add %o1, %r23, %r23 |
| 7477 | sllx %o1, 5, %o3 !(CID*256) |
| 7478 | #endif |
| 7479 | cas [%r23],%g0,%r10 !lock |
| 7480 | brnz %r10, cwq_10_128 |
| 7481 | rd %asi, %r12 |
| 7482 | wr %g0, 0x40, %asi |
| 7483 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 7484 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 7485 | cmp %l1, 1 |
| 7486 | bne cwq_10_128 |
| 7487 | set CWQ_BASE, %l6 |
| 7488 | #ifndef SPC |
| 7489 | add %l6, %o3, %l6 |
| 7490 | #endif |
| 7491 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 7492 | best_set_reg(0x206100f0, %l1, %l2) !# Control Word |
| 7493 | sllx %l2, 32, %l2 |
| 7494 | stx %l2, [%l6 + 0x0] |
| 7495 | membar #Sync |
| 7496 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 7497 | sub %l2, 0x40, %l2 |
| 7498 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 7499 | wr %r12, %g0, %asi |
| 7500 | st %g0, [%r23] |
| 7501 | cwq_10_128: |
| 7502 | ta T_CHANGE_NONHPRIV |
| 7503 | .word 0x9b414000 ! 185: RDPC rd %pc, %r13 |
| 7504 | intveclr_10_129: |
| 7505 | nop |
| 7506 | ta T_CHANGE_HPRIV |
| 7507 | setx 0x7efe2d2839cbd11c, %r1, %r28 |
| 7508 | stxa %r28, [%g0] 0x72 |
| 7509 | ta T_CHANGE_NONHPRIV |
| 7510 | .word 0x25400001 ! 186: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 7511 | memptr_10_130: |
| 7512 | set 0x60740000, %r31 |
| 7513 | .word 0x85847ab0 ! 187: WRCCR_I wr %r17, 0x1ab0, %ccr |
| 7514 | .word 0x9194400c ! 188: WRPR_PIL_R wrpr %r17, %r12, %pil |
| 7515 | .word 0x91a0016b ! 189: FABSq dis not found |
| 7516 | |
| 7517 | .word 0xe88008a0 ! 190: LDUWA_R lduwa [%r0, %r0] 0x45, %r20 |
| 7518 | .word 0x81580000 ! 191: FLUSHW flushw |
| 7519 | splash_cmpr_10_133: |
| 7520 | mov 0, %r18 |
| 7521 | sllx %r18, 63, %r18 |
| 7522 | rd %tick, %r17 |
| 7523 | add %r17, 0x70, %r17 |
| 7524 | or %r17, %r18, %r17 |
| 7525 | ta T_CHANGE_PRIV |
| 7526 | .word 0xaf800011 ! 192: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 7527 | .word 0xe877c000 ! 193: STX_R stx %r20, [%r31 + %r0] |
| 7528 | ceter_10_134: |
| 7529 | nop |
| 7530 | ta T_CHANGE_HPRIV |
| 7531 | mov 7, %r17 |
| 7532 | sllx %r17, 60, %r17 |
| 7533 | mov 0x18, %r16 |
| 7534 | stxa %r17, [%r16]0x4c |
| 7535 | ta T_CHANGE_NONHPRIV |
| 7536 | .word 0x9b410000 ! 194: RDTICK rd %tick, %r13 |
| 7537 | .word 0x8d802004 ! 195: WRFPRS_I wr %r0, 0x0004, %fprs |
| 7538 | .word 0x97520000 ! 196: RDPR_PIL <illegal instruction> |
| 7539 | setx 0x7792dd9856150562, %r1, %r28 |
| 7540 | stxa %r28, [%g0] 0x73 |
| 7541 | intvec_10_135: |
| 7542 | .word 0x39400001 ! 197: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 7543 | .word 0xd727e185 ! 198: STF_I st %f11, [0x0185, %r31] |
| 7544 | ibp_10_136: |
| 7545 | nop |
| 7546 | .word 0xc19fdf20 ! 199: LDDFA_R ldda [%r31, %r0], %f0 |
| 7547 | ibp_10_137: |
| 7548 | nop |
| 7549 | ta T_CHANGE_NONHPRIV |
| 7550 | .word 0xd69fc029 ! 200: LDDA_R ldda [%r31, %r9] 0x01, %r11 |
| 7551 | .word 0x89800011 ! 201: WRTICK_R wr %r0, %r17, %tick |
| 7552 | nop |
| 7553 | nop |
| 7554 | ta T_CHANGE_PRIV |
| 7555 | wrpr %g0, %g0, %gl |
| 7556 | nop |
| 7557 | nop |
| 7558 | setx join_lbl_0_0, %g1, %g2 |
| 7559 | jmp %g2 |
| 7560 | nop |
| 7561 | fork_lbl_0_4: |
| 7562 | ta T_CHANGE_NONHPRIV |
| 7563 | setx vahole_target1, %r18, %r27 |
| 7564 | cwp_8_1: |
| 7565 | set user_data_start, %o7 |
| 7566 | .word 0x93902005 ! 1: WRPR_CWP_I wrpr %r0, 0x0005, %cwp |
| 7567 | pmu_8_2: |
| 7568 | nop |
| 7569 | ta T_CHANGE_PRIV |
| 7570 | setx 0xfffff998fffff855, %g1, %g7 |
| 7571 | .word 0xa3800007 ! 2: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 7572 | .word 0xd337c000 ! 3: STQF_R - %f9, [%r0, %r31] |
| 7573 | fpinit_8_3: |
| 7574 | nop |
| 7575 | setx fp_data_quads, %r19, %r20 |
| 7576 | ldd [%r20], %f0 |
| 7577 | ldd [%r20+8], %f4 |
| 7578 | ld [%r20+16], %fsr |
| 7579 | ld [%r20+24], %r19 |
| 7580 | wr %r19, %g0, %gsr |
| 7581 | .word 0xc3e83a02 ! 4: PREFETCHA_I prefetcha [%r0, + 0xfffffa02] %asi, #one_read |
| 7582 | .word 0x8d802004 ! 5: WRFPRS_I wr %r0, 0x0004, %fprs |
| 7583 | .word 0x2accc001 ! 1: BRNZ brnz,a,pt %r19,<label_0xcc001> |
| 7584 | .word 0x8d90336b ! 6: WRPR_PSTATE_I wrpr %r0, 0x136b, %pstate |
| 7585 | brcommon1_8_5: |
| 7586 | nop |
| 7587 | setx common_target, %r12, %r27 |
| 7588 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 7589 | ba,a .+12 |
| 7590 | .word 0x93a7c9d2 ! 1: FDIVd fdivd %f62, %f18, %f40 |
| 7591 | ba,a .+8 |
| 7592 | jmpl %r27+0, %r27 |
| 7593 | .word 0xa9702a34 ! 7: POPC_I popc 0x0a34, %r20 |
| 7594 | .word 0xe277e089 ! 8: STX_I stx %r17, [%r31 + 0x0089] |
| 7595 | ibp_8_6: |
| 7596 | nop |
| 7597 | .word 0xe31fc010 ! 9: LDDF_R ldd [%r31, %r16], %f17 |
| 7598 | .word 0xa9520000 ! 10: RDPR_PIL <illegal instruction> |
| 7599 | .word 0x20800001 ! 1: BN bn,a <label_0x1> |
| 7600 | .word 0x8d903100 ! 11: WRPR_PSTATE_I wrpr %r0, 0x1100, %pstate |
| 7601 | .word 0xe537c000 ! 12: STQF_R - %f18, [%r0, %r31] |
| 7602 | .word 0xe48008a0 ! 13: LDUWA_R lduwa [%r0, %r0] 0x45, %r18 |
| 7603 | .word 0xa5520000 ! 14: RDPR_PIL <illegal instruction> |
| 7604 | mondo_8_8: |
| 7605 | nop |
| 7606 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 7607 | ta T_CHANGE_PRIV |
| 7608 | stxa %r16, [%r0+0x3c0] %asi |
| 7609 | .word 0x9d928006 ! 15: WRPR_WSTATE_R wrpr %r10, %r6, %wstate |
| 7610 | jmptr_8_9: |
| 7611 | nop |
| 7612 | best_set_reg(0xe0a00000, %r20, %r27) |
| 7613 | .word 0xb7c6c000 ! 16: JMPL_R jmpl %r27 + %r0, %r27 |
| 7614 | #if (defined SPC || defined CMP1) |
| 7615 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_10) + 8, 16, 16)) -> intp(1,0,9) |
| 7616 | #else |
| 7617 | setx 0xe68b58044cb802e4, %r1, %r28 |
| 7618 | stxa %r28, [%g0] 0x73 |
| 7619 | #endif |
| 7620 | intvec_8_10: |
| 7621 | .word 0x39400001 ! 17: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 7622 | nop |
| 7623 | ta T_CHANGE_HPRIV ! macro |
| 7624 | donret_8_11: |
| 7625 | rd %pc, %r12 |
| 7626 | add %r12, (donretarg_8_11-donret_8_11+4), %r12 |
| 7627 | add %r12, 0x4, %r11 ! seq tnpc |
| 7628 | wrpr %g0, 0x1, %tl |
| 7629 | wrpr %g0, %r12, %tpc |
| 7630 | wrpr %g0, %r11, %tnpc |
| 7631 | set (0x00624300 | (0x80 << 24)), %r13 |
| 7632 | and %r12, 0xfff, %r14 |
| 7633 | sllx %r14, 30, %r14 |
| 7634 | or %r13, %r14, %r20 |
| 7635 | wrpr %r20, %g0, %tstate |
| 7636 | wrhpr %g0, 0x1494, %htstate |
| 7637 | ta T_CHANGE_NONPRIV ! rand=0 (8) |
| 7638 | .word 0x38800001 ! 1: BGU bgu,a <label_0x1> |
| 7639 | done |
| 7640 | donretarg_8_11: |
| 7641 | .word 0xd8ffe1ed ! 18: SWAPA_I swapa %r12, [%r31 + 0x01ed] %asi |
| 7642 | splash_hpstate_8_12: |
| 7643 | .word 0x8198318d ! 19: WRHPR_HPSTATE_I wrhpr %r0, 0x118d, %hpstate |
| 7644 | .word 0xab81c010 ! 20: WR_CLEAR_SOFTINT_R wr %r7, %r16, %clear_softint |
| 7645 | splash_cmpr_8_13: |
| 7646 | mov 0, %r18 |
| 7647 | sllx %r18, 63, %r18 |
| 7648 | rd %tick, %r17 |
| 7649 | add %r17, 0x80, %r17 |
| 7650 | or %r17, %r18, %r17 |
| 7651 | ta T_CHANGE_HPRIV |
| 7652 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 7653 | ta T_CHANGE_PRIV |
| 7654 | .word 0xaf800011 ! 21: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 7655 | trapasi_8_14: |
| 7656 | nop |
| 7657 | mov 0x8, %r1 ! (VA for ASI 0x4c) |
| 7658 | .word 0xd8d84980 ! 22: LDXA_R ldxa [%r1, %r0] 0x4c, %r12 |
| 7659 | .word 0xd8c7e038 ! 23: LDSWA_I ldswa [%r31, + 0x0038] %asi, %r12 |
| 7660 | .word 0x8d902f46 ! 24: WRPR_PSTATE_I wrpr %r0, 0x0f46, %pstate |
| 7661 | nop |
| 7662 | ta T_CHANGE_HPRIV |
| 7663 | mov 0x8, %r10 |
| 7664 | set sync_thr_counter6, %r23 |
| 7665 | #ifndef SPC |
| 7666 | ldxa [%g0]0x63, %o1 |
| 7667 | and %o1, 0x38, %o1 |
| 7668 | add %o1, %r23, %r23 |
| 7669 | #endif |
| 7670 | cas [%r23],%g0,%r10 !lock |
| 7671 | brnz %r10, sma_8_16 |
| 7672 | rd %asi, %r12 |
| 7673 | wr %g0, 0x40, %asi |
| 7674 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 7675 | set 0x000e1fff, %g1 |
| 7676 | stxa %g1, [%g0 + 0x80] %asi |
| 7677 | wr %r12, %g0, %asi |
| 7678 | st %g0, [%r23] |
| 7679 | sma_8_16: |
| 7680 | ta T_CHANGE_NONHPRIV |
| 7681 | .word 0xd9e7e011 ! 25: CASA_R casa [%r31] %asi, %r17, %r12 |
| 7682 | brcommon3_8_17: |
| 7683 | nop |
| 7684 | setx common_target, %r12, %r27 |
| 7685 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 7686 | ba,a .+12 |
| 7687 | .word 0xd937c00c ! 1: STQF_R - %f12, [%r12, %r31] |
| 7688 | ba,a .+8 |
| 7689 | jmpl %r27+0, %r27 |
| 7690 | .word 0xd9e7e00b ! 26: CASA_R casa [%r31] %asi, %r11, %r12 |
| 7691 | trapasi_8_18: |
| 7692 | nop |
| 7693 | mov 0x0, %r1 ! (VA for ASI 0x73) |
| 7694 | .word 0xd8d84e60 ! 27: LDXA_R ldxa [%r1, %r0] 0x73, %r12 |
| 7695 | ceter_8_19: |
| 7696 | nop |
| 7697 | ta T_CHANGE_HPRIV |
| 7698 | mov 5, %r17 |
| 7699 | sllx %r17, 60, %r17 |
| 7700 | mov 0x18, %r16 |
| 7701 | stxa %r17, [%r16]0x4c |
| 7702 | ta T_CHANGE_NONHPRIV |
| 7703 | .word 0xa3410000 ! 28: RDTICK rd %tick, %r17 |
| 7704 | splash_cmpr_8_20: |
| 7705 | mov 0, %r18 |
| 7706 | sllx %r18, 63, %r18 |
| 7707 | rd %tick, %r17 |
| 7708 | add %r17, 0x80, %r17 |
| 7709 | or %r17, %r18, %r17 |
| 7710 | ta T_CHANGE_HPRIV |
| 7711 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 7712 | ta T_CHANGE_PRIV |
| 7713 | .word 0xaf800011 ! 29: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 7714 | memptr_8_21: |
| 7715 | set user_data_start, %r31 |
| 7716 | .word 0x8584ff5a ! 30: WRCCR_I wr %r19, 0x1f5a, %ccr |
| 7717 | .word 0xa8828004 ! 31: ADDcc_R addcc %r10, %r4, %r20 |
| 7718 | .word 0xc1bfe100 ! 32: STDFA_I stda %f0, [0x0100, %r31] |
| 7719 | set 0x2b73, %l3 |
| 7720 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT |
| 7721 | .word 0xa5b507d1 ! 33: PDIST pdistn %d20, %d48, %d18 |
| 7722 | brcommon3_8_22: |
| 7723 | nop |
| 7724 | setx common_target, %r12, %r27 |
| 7725 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 7726 | ba,a .+12 |
| 7727 | .word 0xdb37e070 ! 1: STQF_I - %f13, [0x0070, %r31] |
| 7728 | ba,a .+8 |
| 7729 | jmpl %r27+0, %r27 |
| 7730 | .word 0xdabfc030 ! 34: STDA_R stda %r13, [%r31 + %r16] 0x01 |
| 7731 | .word 0xdac7e068 ! 35: LDSWA_I ldswa [%r31, + 0x0068] %asi, %r13 |
| 7732 | ibp_8_23: |
| 7733 | nop |
| 7734 | ta T_CHANGE_NONHPRIV |
| 7735 | .word 0xe19fc2c0 ! 36: LDDFA_R ldda [%r31, %r0], %f16 |
| 7736 | .word 0x8d802004 ! 37: WRFPRS_I wr %r0, 0x0004, %fprs |
| 7737 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 7738 | reduce_priv_lvl_8_24: |
| 7739 | ta T_CHANGE_NONPRIV ! macro |
| 7740 | trapasi_8_25: |
| 7741 | nop |
| 7742 | mov 0x38, %r1 ! (VA for ASI 0x50) |
| 7743 | .word 0xdad84a00 ! 39: LDXA_R ldxa [%r1, %r0] 0x50, %r13 |
| 7744 | brcommon1_8_26: |
| 7745 | nop |
| 7746 | setx common_target, %r12, %r27 |
| 7747 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 7748 | ba,a .+12 |
| 7749 | .word 0xc32fe090 ! 1: STXFSR_I st-sfr %f1, [0x0090, %r31] |
| 7750 | ba,a .+8 |
| 7751 | jmpl %r27+0, %r27 |
| 7752 | .word 0xc3e94033 ! 40: PREFETCHA_R prefetcha [%r5, %r19] 0x01, #one_read |
| 7753 | ibp_8_27: |
| 7754 | nop |
| 7755 | .word 0xd5e7e013 ! 41: CASA_R casa [%r31] %asi, %r19, %r10 |
| 7756 | .word 0xa5a000cb ! 42: FNEGd fnegd %f42, %f18 |
| 7757 | nop |
| 7758 | ta T_CHANGE_HPRIV |
| 7759 | mov 0x8+1, %r10 |
| 7760 | set sync_thr_counter5, %r23 |
| 7761 | #ifndef SPC |
| 7762 | ldxa [%g0]0x63, %o1 |
| 7763 | and %o1, 0x38, %o1 |
| 7764 | add %o1, %r23, %r23 |
| 7765 | sllx %o1, 5, %o3 !(CID*256) |
| 7766 | #endif |
| 7767 | cas [%r23],%g0,%r10 !lock |
| 7768 | brnz %r10, cwq_8_28 |
| 7769 | rd %asi, %r12 |
| 7770 | wr %g0, 0x40, %asi |
| 7771 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 7772 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 7773 | cmp %l1, 1 |
| 7774 | bne cwq_8_28 |
| 7775 | set CWQ_BASE, %l6 |
| 7776 | #ifndef SPC |
| 7777 | add %l6, %o3, %l6 |
| 7778 | #endif |
| 7779 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 7780 | best_set_reg(0x20610080, %l1, %l2) !# Control Word |
| 7781 | sllx %l2, 32, %l2 |
| 7782 | stx %l2, [%l6 + 0x0] |
| 7783 | membar #Sync |
| 7784 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 7785 | sub %l2, 0x40, %l2 |
| 7786 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 7787 | wr %r12, %g0, %asi |
| 7788 | st %g0, [%r23] |
| 7789 | cwq_8_28: |
| 7790 | ta T_CHANGE_NONHPRIV |
| 7791 | .word 0xa1414000 ! 43: RDPC rd %pc, %r16 |
| 7792 | splash_htba_8_29: |
| 7793 | nop |
| 7794 | ta T_CHANGE_HPRIV |
| 7795 | setx 0x00000000002a0000, %r11, %r12 |
| 7796 | .word 0x8b98000c ! 44: WRHPR_HTBA_R wrhpr %r0, %r12, %htba |
| 7797 | #if (defined SPC || defined CMP1) |
| 7798 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_30) + 56, 16, 16)) -> intp(2,0,25) |
| 7799 | #else |
| 7800 | setx 0xad8f320e299c69f2, %r1, %r28 |
| 7801 | stxa %r28, [%g0] 0x73 |
| 7802 | #endif |
| 7803 | intvec_8_30: |
| 7804 | .word 0x39400001 ! 45: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 7805 | .word 0x26800001 ! 1: BL bl,a <label_0x1> |
| 7806 | .word 0x8d9037cd ! 46: WRPR_PSTATE_I wrpr %r0, 0x17cd, %pstate |
| 7807 | ibp_8_32: |
| 7808 | nop |
| 7809 | .word 0xe1bfda00 ! 47: STDFA_R stda %f16, [%r0, %r31] |
| 7810 | .word 0xe537c000 ! 48: STQF_R - %f18, [%r0, %r31] |
| 7811 | ibp_8_33: |
| 7812 | nop |
| 7813 | ta T_CHANGE_NONHPRIV |
| 7814 | .word 0xe1bfdf20 ! 49: STDFA_R stda %f16, [%r0, %r31] |
| 7815 | ibp_8_34: |
| 7816 | nop |
| 7817 | ta T_CHANGE_NONHPRIV |
| 7818 | .word 0xa3b4048a ! 50: FCMPLE32 fcmple32 %d16, %d10, %r17 |
| 7819 | .word 0x8d90356f ! 51: WRPR_PSTATE_I wrpr %r0, 0x156f, %pstate |
| 7820 | .word 0xe24fc000 ! 52: LDSB_R ldsb [%r31 + %r0], %r17 |
| 7821 | .word 0xe2c7e1d8 ! 53: LDSWA_I ldswa [%r31, + 0x01d8] %asi, %r17 |
| 7822 | .word 0xe33fe0b8 ! 54: STDF_I std %f17, [0x00b8, %r31] |
| 7823 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 7824 | reduce_priv_lvl_8_36: |
| 7825 | ta T_CHANGE_NONHPRIV ! macro |
| 7826 | intveclr_8_37: |
| 7827 | nop |
| 7828 | ta T_CHANGE_HPRIV |
| 7829 | setx 0xc844647bc7035871, %r1, %r28 |
| 7830 | stxa %r28, [%g0] 0x72 |
| 7831 | .word 0x25400001 ! 56: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 7832 | ibp_8_38: |
| 7833 | nop |
| 7834 | ta T_CHANGE_NONHPRIV |
| 7835 | .word 0xe2bfc031 ! 57: STDA_R stda %r17, [%r31 + %r17] 0x01 |
| 7836 | .word 0x9b524000 ! 58: RDPR_CWP <illegal instruction> |
| 7837 | ibp_8_39: |
| 7838 | nop |
| 7839 | ta T_CHANGE_NONHPRIV |
| 7840 | .word 0xc19fc3e0 ! 59: LDDFA_R ldda [%r31, %r0], %f0 |
| 7841 | mondo_8_40: |
| 7842 | nop |
| 7843 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 7844 | stxa %r10, [%r0+0x3d8] %asi |
| 7845 | .word 0x9d94800b ! 60: WRPR_WSTATE_R wrpr %r18, %r11, %wstate |
| 7846 | ibp_8_41: |
| 7847 | nop |
| 7848 | .word 0xe1bfc3e0 ! 61: STDFA_R stda %f16, [%r0, %r31] |
| 7849 | .word 0xe8dfe0a8 ! 62: LDXA_I ldxa [%r31, + 0x00a8] %asi, %r20 |
| 7850 | .word 0x879c0013 ! 63: WRHPR_HINTP_R wrhpr %r16, %r19, %hintp |
| 7851 | #if (defined SPC || defined CMP1) |
| 7852 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_42) + 56, 16, 16)) -> intp(6,0,15) |
| 7853 | #else |
| 7854 | setx 0xd61778e2d2b3196b, %r1, %r28 |
| 7855 | stxa %r28, [%g0] 0x73 |
| 7856 | #endif |
| 7857 | intvec_8_42: |
| 7858 | .word 0x39400001 ! 64: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 7859 | iaw_8_43: |
| 7860 | nop |
| 7861 | ta T_CHANGE_HPRIV |
| 7862 | mov 8, %r18 |
| 7863 | rd %asi, %r12 |
| 7864 | wr %r0, 0x41, %asi |
| 7865 | set sync_thr_counter4, %r23 |
| 7866 | #ifndef SPC |
| 7867 | ldxa [%g0]0x63, %r8 |
| 7868 | and %r8, 0x38, %r8 ! Core ID |
| 7869 | add %r8, %r23, %r23 |
| 7870 | #else |
| 7871 | mov 0, %r8 |
| 7872 | #endif |
| 7873 | mov 0x8, %r16 |
| 7874 | iaw_startwait8_43: |
| 7875 | cas [%r23],%g0,%r16 !lock |
| 7876 | brz,a %r16, continue_iaw_8_43 |
| 7877 | mov (~0x8&0xf), %r16 |
| 7878 | ld [%r23], %r16 |
| 7879 | iaw_wait8_43: |
| 7880 | brnz %r16, iaw_wait8_43 |
| 7881 | ld [%r23], %r16 |
| 7882 | ba iaw_startwait8_43 |
| 7883 | mov 0x8, %r16 |
| 7884 | continue_iaw_8_43: |
| 7885 | sllx %r16, %r8, %r16 !Mask for my core only |
| 7886 | ldxa [0x58]%asi, %r17 !Running_status |
| 7887 | wait_for_stat_8_43: |
| 7888 | ldxa [0x50]%asi, %r13 !Running_rw |
| 7889 | cmp %r13, %r17 |
| 7890 | bne,a %xcc, wait_for_stat_8_43 |
| 7891 | ldxa [0x58]%asi, %r17 !Running_status |
| 7892 | stxa %r16, [0x68]%asi !Park (W1C) |
| 7893 | ldxa [0x50]%asi, %r14 !Running_rw |
| 7894 | wait_for_iaw_8_43: |
| 7895 | ldxa [0x58]%asi, %r17 !Running_status |
| 7896 | cmp %r14, %r17 |
| 7897 | bne,a %xcc, wait_for_iaw_8_43 |
| 7898 | ldxa [0x50]%asi, %r14 !Running_rw |
| 7899 | iaw_doit8_43: |
| 7900 | mov 0x38, %r18 |
| 7901 | iaw1_8_43: |
| 7902 | best_set_reg(0x00000000e1200000, %r20, %r19) |
| 7903 | or %r19, 0x1, %r19 |
| 7904 | stxa %r19, [%r18]0x50 |
| 7905 | stxa %r16, [0x60] %asi ! Unpark (W1S) |
| 7906 | st %g0, [%r23] !clear lock |
| 7907 | wr %r0, %r12, %asi ! restore %asi |
| 7908 | ta T_CHANGE_NONHPRIV |
| 7909 | .word 0xc1bfd960 ! 65: STDFA_R stda %f0, [%r0, %r31] |
| 7910 | ibp_8_44: |
| 7911 | nop |
| 7912 | .word 0xe19fe080 ! 66: LDDFA_I ldda [%r31, 0x0080], %f16 |
| 7913 | ibp_8_45: |
| 7914 | nop |
| 7915 | .word 0xe9e7e012 ! 67: CASA_R casa [%r31] %asi, %r18, %r20 |
| 7916 | .word 0xe927e128 ! 68: STF_I st %f20, [0x0128, %r31] |
| 7917 | mondo_8_46: |
| 7918 | nop |
| 7919 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 7920 | ta T_CHANGE_PRIV |
| 7921 | stxa %r11, [%r0+0x3c8] %asi |
| 7922 | .word 0x9d95000b ! 69: WRPR_WSTATE_R wrpr %r20, %r11, %wstate |
| 7923 | .word 0xb1814011 ! 70: WR_STICK_REG_R wr %r5, %r17, %- |
| 7924 | br_badelay3_8_47: |
| 7925 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> |
| 7926 | .word 0x20800001 ! 1: BN bn,a <label_0x1> |
| 7927 | .word 0xdb148006 ! 1: LDQF_R - [%r18, %r6], %f13 |
| 7928 | .word 0xa1a40828 ! 71: FADDs fadds %f16, %f8, %f16 |
| 7929 | fpinit_8_48: |
| 7930 | nop |
| 7931 | setx fp_data_quads, %r19, %r20 |
| 7932 | ldd [%r20], %f0 |
| 7933 | ldd [%r20+8], %f4 |
| 7934 | ld [%r20+16], %fsr |
| 7935 | ld [%r20+24], %r19 |
| 7936 | wr %r19, %g0, %gsr |
| 7937 | .word 0x8da009a4 ! 72: FDIVs fdivs %f0, %f4, %f6 |
| 7938 | brcommon2_8_49: |
| 7939 | nop |
| 7940 | setx common_target, %r12, %r27 |
| 7941 | ba,a .+12 |
| 7942 | .word 0xa7a509c5 ! 1: FDIVd fdivd %f20, %f36, %f50 |
| 7943 | ba,a .+8 |
| 7944 | jmpl %r27+0, %r27 |
| 7945 | .word 0xc19fde00 ! 73: LDDFA_R ldda [%r31, %r0], %f0 |
| 7946 | #if (defined SPC || defined CMP1) |
| 7947 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_50) + 48, 16, 16)) -> intp(5,0,11) |
| 7948 | #else |
| 7949 | setx 0xdb1977429d9c040e, %r1, %r28 |
| 7950 | stxa %r28, [%g0] 0x73 |
| 7951 | #endif |
| 7952 | intvec_8_50: |
| 7953 | .word 0x39400001 ! 74: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 7954 | .word 0xc32fc000 ! 75: STXFSR_R st-sfr %f1, [%r0, %r31] |
| 7955 | intveclr_8_51: |
| 7956 | nop |
| 7957 | ta T_CHANGE_HPRIV |
| 7958 | setx 0xe8fd09096d2b1549, %r1, %r28 |
| 7959 | stxa %r28, [%g0] 0x72 |
| 7960 | ta T_CHANGE_NONHPRIV |
| 7961 | .word 0x25400001 ! 76: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 7962 | brcommon3_8_52: |
| 7963 | nop |
| 7964 | setx common_target, %r12, %r27 |
| 7965 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 7966 | ba,a .+12 |
| 7967 | .word 0xdb37e180 ! 1: STQF_I - %f13, [0x0180, %r31] |
| 7968 | ba,a .+8 |
| 7969 | jmpl %r27+0, %r27 |
| 7970 | .word 0xdbe7e00c ! 77: CASA_R casa [%r31] %asi, %r12, %r13 |
| 7971 | .word 0xa9850014 ! 78: WR_SET_SOFTINT_R wr %r20, %r20, %set_softint |
| 7972 | .word 0x23400001 ! 1: FBPNE fbne,a,pn %fcc0, <label_0x1> |
| 7973 | .word 0x8d9035bd ! 79: WRPR_PSTATE_I wrpr %r0, 0x15bd, %pstate |
| 7974 | splash_lsu_8_54: |
| 7975 | nop |
| 7976 | ta T_CHANGE_HPRIV |
| 7977 | set 0x92715487, %r2 |
| 7978 | mov 0x7, %r1 |
| 7979 | sllx %r1, 32, %r1 |
| 7980 | or %r1, %r2, %r2 |
| 7981 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 7982 | ta T_CHANGE_NONHPRIV |
| 7983 | .word 0x3d400001 ! 80: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 7984 | splash_lsu_8_55: |
| 7985 | nop |
| 7986 | ta T_CHANGE_HPRIV |
| 7987 | set 0x62286079, %r2 |
| 7988 | mov 0x2, %r1 |
| 7989 | sllx %r1, 32, %r1 |
| 7990 | or %r1, %r2, %r2 |
| 7991 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 7992 | .word 0x3d400001 ! 81: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 7993 | nop |
| 7994 | ta T_CHANGE_HPRIV ! macro |
| 7995 | donret_8_56: |
| 7996 | rd %pc, %r12 |
| 7997 | add %r12, (donretarg_8_56-donret_8_56+4), %r12 |
| 7998 | add %r12, 0x4, %r11 ! seq tnpc |
| 7999 | wrpr %g0, 0x2, %tl |
| 8000 | wrpr %g0, %r12, %tpc |
| 8001 | wrpr %g0, %r11, %tnpc |
| 8002 | set (0x0047b300 | (0x4f << 24)), %r13 |
| 8003 | and %r12, 0xfff, %r14 |
| 8004 | sllx %r14, 30, %r14 |
| 8005 | or %r13, %r14, %r20 |
| 8006 | wrpr %r20, %g0, %tstate |
| 8007 | wrhpr %g0, 0x697, %htstate |
| 8008 | ta T_CHANGE_NONHPRIV ! rand=1 (8) |
| 8009 | retry |
| 8010 | donretarg_8_56: |
| 8011 | .word 0x95a209c1 ! 82: FDIVd fdivd %f8, %f32, %f10 |
| 8012 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 8013 | reduce_priv_lvl_8_57: |
| 8014 | ta T_CHANGE_NONHPRIV ! macro |
| 8015 | dvapa_8_58: |
| 8016 | nop |
| 8017 | ta T_CHANGE_HPRIV |
| 8018 | mov 0x97f, %r20 |
| 8019 | mov 0x9, %r19 |
| 8020 | sllx %r20, 23, %r20 |
| 8021 | or %r19, %r20, %r19 |
| 8022 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 8023 | mov 0x38, %r18 |
| 8024 | stxa %r31, [%r18]0x58 |
| 8025 | ta T_CHANGE_NONHPRIV |
| 8026 | .word 0x93a2c9a6 ! 84: FDIVs fdivs %f11, %f6, %f9 |
| 8027 | nop |
| 8028 | ta T_CHANGE_HPRIV ! macro |
| 8029 | donret_8_59: |
| 8030 | rd %pc, %r12 |
| 8031 | add %r12, (donretarg_8_59-donret_8_59), %r12 |
| 8032 | add %r12, 0x8, %r11 ! nonseq tnpc |
| 8033 | wrpr %g0, 0x1, %tl |
| 8034 | wrpr %g0, %r12, %tpc |
| 8035 | wrpr %g0, %r11, %tnpc |
| 8036 | set (0x00725e00 | (0x4f << 24)), %r13 |
| 8037 | and %r12, 0xfff, %r14 |
| 8038 | sllx %r14, 30, %r14 |
| 8039 | or %r13, %r14, %r20 |
| 8040 | wrpr %r20, %g0, %tstate |
| 8041 | wrhpr %g0, 0x1f8d, %htstate |
| 8042 | ta T_CHANGE_NONPRIV ! rand=0 (8) |
| 8043 | .word 0x2c800001 ! 1: BNEG bneg,a <label_0x1> |
| 8044 | done |
| 8045 | donretarg_8_59: |
| 8046 | .word 0xd86fe03f ! 85: LDSTUB_I ldstub %r12, [%r31 + 0x003f] |
| 8047 | trapasi_8_60: |
| 8048 | nop |
| 8049 | mov 0x38, %r1 ! (VA for ASI 0x5b) |
| 8050 | .word 0xd8884b60 ! 86: LDUBA_R lduba [%r1, %r0] 0x5b, %r12 |
| 8051 | otherw |
| 8052 | mov 0xb3, %r30 |
| 8053 | .word 0x91d0001e ! 87: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 8054 | pmu_8_61: |
| 8055 | nop |
| 8056 | setx 0xfffff0e7fffffc1e, %g1, %g7 |
| 8057 | .word 0xa3800007 ! 88: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 8058 | .word 0x89800011 ! 89: WRTICK_R wr %r0, %r17, %tick |
| 8059 | dvapa_8_63: |
| 8060 | nop |
| 8061 | ta T_CHANGE_HPRIV |
| 8062 | mov 0xd8a, %r20 |
| 8063 | mov 0x1b, %r19 |
| 8064 | sllx %r20, 23, %r20 |
| 8065 | or %r19, %r20, %r19 |
| 8066 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 8067 | mov 0x38, %r18 |
| 8068 | stxa %r31, [%r18]0x58 |
| 8069 | ta T_CHANGE_NONHPRIV |
| 8070 | .word 0xd8dfc030 ! 90: LDXA_R ldxa [%r31, %r16] 0x01, %r12 |
| 8071 | .word 0xd857e0f0 ! 91: LDSH_I ldsh [%r31 + 0x00f0], %r12 |
| 8072 | .word 0xb184800c ! 92: WR_STICK_REG_R wr %r18, %r12, %- |
| 8073 | .word 0xd89fdc40 ! 93: LDDA_R ldda [%r31, %r0] 0xe2, %r12 |
| 8074 | splash_hpstate_8_64: |
| 8075 | .word 0x2aca0001 ! 1: BRNZ brnz,a,pt %r8,<label_0xa0001> |
| 8076 | .word 0x81983ddb ! 94: WRHPR_HPSTATE_I wrhpr %r0, 0x1ddb, %hpstate |
| 8077 | .word 0xc30fc000 ! 95: LDXFSR_R ld-fsr [%r31, %r0], %f1 |
| 8078 | brcommon1_8_65: |
| 8079 | nop |
| 8080 | setx common_target, %r12, %r27 |
| 8081 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 8082 | ba,a .+12 |
| 8083 | .word 0x99702120 ! 1: POPC_I popc 0x0120, %r12 |
| 8084 | ba,a .+8 |
| 8085 | jmpl %r27+0, %r27 |
| 8086 | .word 0xa9b087d2 ! 96: PDIST pdistn %d2, %d18, %d20 |
| 8087 | .word 0x9f803d8e ! 97: SIR sir 0x1d8e |
| 8088 | intveclr_8_66: |
| 8089 | nop |
| 8090 | ta T_CHANGE_HPRIV |
| 8091 | setx 0x51b342ee2ac69d1a, %r1, %r28 |
| 8092 | stxa %r28, [%g0] 0x72 |
| 8093 | ta T_CHANGE_NONHPRIV |
| 8094 | .word 0x25400001 ! 98: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 8095 | .word 0x89800011 ! 99: WRTICK_R wr %r0, %r17, %tick |
| 8096 | splash_tba_8_68: |
| 8097 | nop |
| 8098 | ta T_CHANGE_PRIV |
| 8099 | set 0x120000, %r12 |
| 8100 | .word 0x8b90000c ! 100: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 8101 | brcommon1_8_69: |
| 8102 | nop |
| 8103 | setx common_target, %r12, %r27 |
| 8104 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 8105 | ba,a .+12 |
| 8106 | .word 0xd06fe090 ! 1: LDSTUB_I ldstub %r8, [%r31 + 0x0090] |
| 8107 | ba,a .+8 |
| 8108 | jmpl %r27+0, %r27 |
| 8109 | .word 0xa1b1c494 ! 101: FCMPLE32 fcmple32 %d38, %d20, %r16 |
| 8110 | intveclr_8_70: |
| 8111 | nop |
| 8112 | ta T_CHANGE_HPRIV |
| 8113 | setx 0x1fc277191e9e8aae, %r1, %r28 |
| 8114 | stxa %r28, [%g0] 0x72 |
| 8115 | .word 0x25400001 ! 102: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 8116 | setx 0xc5c54343af92ad92, %r1, %r28 |
| 8117 | stxa %r28, [%g0] 0x73 |
| 8118 | intvec_8_71: |
| 8119 | .word 0x39400001 ! 103: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 8120 | nop |
| 8121 | ta T_CHANGE_HPRIV ! macro |
| 8122 | donret_8_72: |
| 8123 | rd %pc, %r12 |
| 8124 | add %r12, (donretarg_8_72-donret_8_72), %r12 |
| 8125 | add %r12, 0x8, %r11 ! nonseq tnpc |
| 8126 | wrpr %g0, 0x2, %tl |
| 8127 | wrpr %g0, %r12, %tpc |
| 8128 | wrpr %g0, %r11, %tnpc |
| 8129 | set (0x00edae00 | (16 << 24)), %r13 |
| 8130 | and %r12, 0xfff, %r14 |
| 8131 | sllx %r14, 30, %r14 |
| 8132 | or %r13, %r14, %r20 |
| 8133 | wrpr %r20, %g0, %tstate |
| 8134 | wrhpr %g0, 0x1e01, %htstate |
| 8135 | ta T_CHANGE_NONHPRIV ! rand=1 (8) |
| 8136 | .word 0x3b400001 ! 1: FBPLE fble,a,pn %fcc0, <label_0x1> |
| 8137 | retry |
| 8138 | donretarg_8_72: |
| 8139 | .word 0x2b400001 ! 104: FBPUG fbug,a,pn %fcc0, <label_0x1> |
| 8140 | intveclr_8_73: |
| 8141 | nop |
| 8142 | ta T_CHANGE_HPRIV |
| 8143 | setx 0xbcdfe28e86da9abf, %r1, %r28 |
| 8144 | stxa %r28, [%g0] 0x72 |
| 8145 | ta T_CHANGE_NONHPRIV |
| 8146 | .word 0x25400001 ! 105: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 8147 | iaw_8_74: |
| 8148 | nop |
| 8149 | ta T_CHANGE_HPRIV |
| 8150 | mov 8, %r18 |
| 8151 | rd %asi, %r12 |
| 8152 | wr %r0, 0x41, %asi |
| 8153 | set sync_thr_counter4, %r23 |
| 8154 | #ifndef SPC |
| 8155 | ldxa [%g0]0x63, %r8 |
| 8156 | and %r8, 0x38, %r8 ! Core ID |
| 8157 | add %r8, %r23, %r23 |
| 8158 | #else |
| 8159 | mov 0, %r8 |
| 8160 | #endif |
| 8161 | mov 0x8, %r16 |
| 8162 | iaw_startwait8_74: |
| 8163 | cas [%r23],%g0,%r16 !lock |
| 8164 | brz,a %r16, continue_iaw_8_74 |
| 8165 | mov (~0x8&0xf), %r16 |
| 8166 | ld [%r23], %r16 |
| 8167 | iaw_wait8_74: |
| 8168 | brnz %r16, iaw_wait8_74 |
| 8169 | ld [%r23], %r16 |
| 8170 | ba iaw_startwait8_74 |
| 8171 | mov 0x8, %r16 |
| 8172 | continue_iaw_8_74: |
| 8173 | sllx %r16, %r8, %r16 !Mask for my core only |
| 8174 | ldxa [0x58]%asi, %r17 !Running_status |
| 8175 | wait_for_stat_8_74: |
| 8176 | ldxa [0x50]%asi, %r13 !Running_rw |
| 8177 | cmp %r13, %r17 |
| 8178 | bne,a %xcc, wait_for_stat_8_74 |
| 8179 | ldxa [0x58]%asi, %r17 !Running_status |
| 8180 | stxa %r16, [0x68]%asi !Park (W1C) |
| 8181 | ldxa [0x50]%asi, %r14 !Running_rw |
| 8182 | wait_for_iaw_8_74: |
| 8183 | ldxa [0x58]%asi, %r17 !Running_status |
| 8184 | cmp %r14, %r17 |
| 8185 | bne,a %xcc, wait_for_iaw_8_74 |
| 8186 | ldxa [0x50]%asi, %r14 !Running_rw |
| 8187 | iaw_doit8_74: |
| 8188 | mov 0x38, %r18 |
| 8189 | iaw1_8_74: |
| 8190 | best_set_reg(0x00000000e0200000, %r20, %r19) |
| 8191 | or %r19, 0x1, %r19 |
| 8192 | stxa %r19, [%r18]0x50 |
| 8193 | stxa %r16, [0x60] %asi ! Unpark (W1S) |
| 8194 | st %g0, [%r23] !clear lock |
| 8195 | wr %r0, %r12, %asi ! restore %asi |
| 8196 | ta T_CHANGE_NONHPRIV |
| 8197 | .word 0xe19fe060 ! 106: LDDFA_I ldda [%r31, 0x0060], %f16 |
| 8198 | ta T_CHANGE_NONHPRIV |
| 8199 | .word 0x8143e011 ! 107: MEMBAR membar #LoadLoad | #Lookaside |
| 8200 | .word 0xc32fc000 ! 108: STXFSR_R st-sfr %f1, [%r0, %r31] |
| 8201 | .word 0x24cc4001 ! 109: BRLEZ brlez,a,pt %r17,<label_0xc4001> |
| 8202 | .word 0xc1bfe120 ! 110: STDFA_I stda %f0, [0x0120, %r31] |
| 8203 | intveclr_8_77: |
| 8204 | nop |
| 8205 | ta T_CHANGE_HPRIV |
| 8206 | setx 0x09b6afa8a88883ea, %r1, %r28 |
| 8207 | stxa %r28, [%g0] 0x72 |
| 8208 | ta T_CHANGE_NONHPRIV |
| 8209 | .word 0x25400001 ! 111: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 8210 | splash_cmpr_8_78: |
| 8211 | mov 0, %r18 |
| 8212 | sllx %r18, 63, %r18 |
| 8213 | rd %tick, %r17 |
| 8214 | add %r17, 0x80, %r17 |
| 8215 | or %r17, %r18, %r17 |
| 8216 | ta T_CHANGE_HPRIV |
| 8217 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 8218 | ta T_CHANGE_PRIV |
| 8219 | .word 0xaf800011 ! 112: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 8220 | .word 0xe1bfe160 ! 113: STDFA_I stda %f16, [0x0160, %r31] |
| 8221 | .word 0x87ad0a43 ! 114: FCMPd fcmpd %fcc<n>, %f20, %f34 |
| 8222 | tagged_8_80: |
| 8223 | tsubcctv %r20, 0x1d0f, %r11 |
| 8224 | .word 0xd807e0ea ! 115: LDUW_I lduw [%r31 + 0x00ea], %r12 |
| 8225 | .word 0xa2d1c013 ! 116: UMULcc_R umulcc %r7, %r19, %r17 |
| 8226 | setx 0x5d00f114aa8e28ba, %r1, %r28 |
| 8227 | stxa %r28, [%g0] 0x73 |
| 8228 | intvec_8_81: |
| 8229 | .word 0x39400001 ! 117: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 8230 | trapasi_8_82: |
| 8231 | nop |
| 8232 | mov 0x28, %r1 ! (VA for ASI 0x5a) |
| 8233 | .word 0xd2d84b40 ! 118: LDXA_R ldxa [%r1, %r0] 0x5a, %r9 |
| 8234 | .word 0x28800001 ! 1: BLEU bleu,a <label_0x1> |
| 8235 | .word 0x8d902f6f ! 119: WRPR_PSTATE_I wrpr %r0, 0x0f6f, %pstate |
| 8236 | ibp_8_84: |
| 8237 | nop |
| 8238 | .word 0xd33fc00b ! 120: STDF_R std %f9, [%r11, %r31] |
| 8239 | nop |
| 8240 | ta T_CHANGE_HPRIV |
| 8241 | mov 0x8, %r10 |
| 8242 | set sync_thr_counter6, %r23 |
| 8243 | #ifndef SPC |
| 8244 | ldxa [%g0]0x63, %o1 |
| 8245 | and %o1, 0x38, %o1 |
| 8246 | add %o1, %r23, %r23 |
| 8247 | #endif |
| 8248 | cas [%r23],%g0,%r10 !lock |
| 8249 | brnz %r10, sma_8_85 |
| 8250 | rd %asi, %r12 |
| 8251 | wr %g0, 0x40, %asi |
| 8252 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 8253 | set 0x00061fff, %g1 |
| 8254 | stxa %g1, [%g0 + 0x80] %asi |
| 8255 | wr %r12, %g0, %asi |
| 8256 | st %g0, [%r23] |
| 8257 | sma_8_85: |
| 8258 | ta T_CHANGE_NONHPRIV |
| 8259 | .word 0xd3e7e012 ! 121: CASA_R casa [%r31] %asi, %r18, %r9 |
| 8260 | fpinit_8_86: |
| 8261 | nop |
| 8262 | setx fp_data_quads, %r19, %r20 |
| 8263 | ldd [%r20], %f0 |
| 8264 | ldd [%r20+8], %f4 |
| 8265 | ld [%r20+16], %fsr |
| 8266 | ld [%r20+24], %r19 |
| 8267 | wr %r19, %g0, %gsr |
| 8268 | .word 0x91b00484 ! 122: FCMPLE32 fcmple32 %d0, %d4, %r8 |
| 8269 | .word 0x9191400b ! 123: WRPR_PIL_R wrpr %r5, %r11, %pil |
| 8270 | intveclr_8_88: |
| 8271 | nop |
| 8272 | ta T_CHANGE_HPRIV |
| 8273 | setx 0x711f48949be4fe64, %r1, %r28 |
| 8274 | stxa %r28, [%g0] 0x72 |
| 8275 | .word 0x25400001 ! 124: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 8276 | mondo_8_89: |
| 8277 | nop |
| 8278 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 8279 | stxa %r18, [%r0+0x3e8] %asi |
| 8280 | .word 0x9d94c010 ! 125: WRPR_WSTATE_R wrpr %r19, %r16, %wstate |
| 8281 | nop |
| 8282 | ta T_CHANGE_HPRIV ! macro |
| 8283 | donret_8_90: |
| 8284 | rd %pc, %r12 |
| 8285 | add %r12, (donretarg_8_90-donret_8_90+4), %r12 |
| 8286 | add %r12, 0x4, %r11 ! seq tnpc |
| 8287 | wrpr %g0, 0x2, %tl |
| 8288 | wrpr %g0, %r12, %tpc |
| 8289 | wrpr %g0, %r11, %tnpc |
| 8290 | set (0x00ff1100 | (16 << 24)), %r13 |
| 8291 | and %r12, 0xfff, %r14 |
| 8292 | sllx %r14, 30, %r14 |
| 8293 | or %r13, %r14, %r20 |
| 8294 | wrpr %r20, %g0, %tstate |
| 8295 | wrhpr %g0, 0x6cf, %htstate |
| 8296 | ta T_CHANGE_NONHPRIV ! rand=1 (8) |
| 8297 | retry |
| 8298 | donretarg_8_90: |
| 8299 | .word 0xd26fe030 ! 126: LDSTUB_I ldstub %r9, [%r31 + 0x0030] |
| 8300 | .word 0xd2cfe1b0 ! 127: LDSBA_I ldsba [%r31, + 0x01b0] %asi, %r9 |
| 8301 | .word 0xd23fe14f ! 128: STD_I std %r9, [%r31 + 0x014f] |
| 8302 | .word 0x8d802000 ! 129: WRFPRS_I wr %r0, 0x0000, %fprs |
| 8303 | .word 0x93d02035 ! 130: Tcc_I tne icc_or_xcc, %r0 + 53 |
| 8304 | .word 0xa7520000 ! 131: RDPR_PIL rdpr %pil, %r19 |
| 8305 | mondo_8_91: |
| 8306 | nop |
| 8307 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 8308 | ta T_CHANGE_PRIV |
| 8309 | stxa %r2, [%r0+0x3c8] %asi |
| 8310 | .word 0x9d94c009 ! 132: WRPR_WSTATE_R wrpr %r19, %r9, %wstate |
| 8311 | #if (defined SPC || defined CMP1) |
| 8312 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_92) + 16, 16, 16)) -> intp(4,0,7) |
| 8313 | #else |
| 8314 | setx 0x0d72a8df886c445f, %r1, %r28 |
| 8315 | stxa %r28, [%g0] 0x73 |
| 8316 | #endif |
| 8317 | intvec_8_92: |
| 8318 | .word 0x39400001 ! 133: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 8319 | fpinit_8_93: |
| 8320 | nop |
| 8321 | setx fp_data_quads, %r19, %r20 |
| 8322 | ldd [%r20], %f0 |
| 8323 | ldd [%r20+8], %f4 |
| 8324 | ld [%r20+16], %fsr |
| 8325 | ld [%r20+24], %r19 |
| 8326 | wr %r19, %g0, %gsr |
| 8327 | .word 0xc3e82159 ! 134: PREFETCHA_I prefetcha [%r0, + 0x0159] %asi, #one_read |
| 8328 | invalw |
| 8329 | mov 0xb1, %r30 |
| 8330 | .word 0x91d0001e ! 135: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 8331 | .word 0xe28008a0 ! 136: LDUWA_R lduwa [%r0, %r0] 0x45, %r17 |
| 8332 | ibp_8_94: |
| 8333 | nop |
| 8334 | .word 0xe2dfc02d ! 137: LDXA_R ldxa [%r31, %r13] 0x01, %r17 |
| 8335 | nop |
| 8336 | ta T_CHANGE_HPRIV |
| 8337 | mov 0x8+1, %r10 |
| 8338 | set sync_thr_counter5, %r23 |
| 8339 | #ifndef SPC |
| 8340 | ldxa [%g0]0x63, %o1 |
| 8341 | and %o1, 0x38, %o1 |
| 8342 | add %o1, %r23, %r23 |
| 8343 | sllx %o1, 5, %o3 !(CID*256) |
| 8344 | #endif |
| 8345 | cas [%r23],%g0,%r10 !lock |
| 8346 | brnz %r10, cwq_8_95 |
| 8347 | rd %asi, %r12 |
| 8348 | wr %g0, 0x40, %asi |
| 8349 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 8350 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 8351 | cmp %l1, 1 |
| 8352 | bne cwq_8_95 |
| 8353 | set CWQ_BASE, %l6 |
| 8354 | #ifndef SPC |
| 8355 | add %l6, %o3, %l6 |
| 8356 | #endif |
| 8357 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 8358 | best_set_reg(0x20610080, %l1, %l2) !# Control Word |
| 8359 | sllx %l2, 32, %l2 |
| 8360 | stx %l2, [%l6 + 0x0] |
| 8361 | membar #Sync |
| 8362 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 8363 | sub %l2, 0x40, %l2 |
| 8364 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 8365 | wr %r12, %g0, %asi |
| 8366 | st %g0, [%r23] |
| 8367 | cwq_8_95: |
| 8368 | ta T_CHANGE_NONHPRIV |
| 8369 | .word 0x91414000 ! 138: RDPC rd %pc, %r8 |
| 8370 | .word 0x87802020 ! 139: WRASI_I wr %r0, 0x0020, %asi |
| 8371 | #if (defined SPC || defined CMP1) |
| 8372 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_96) + 0, 16, 16)) -> intp(2,0,8) |
| 8373 | #else |
| 8374 | setx 0x9ed3dddd874756a8, %r1, %r28 |
| 8375 | stxa %r28, [%g0] 0x73 |
| 8376 | #endif |
| 8377 | intvec_8_96: |
| 8378 | .word 0x39400001 ! 140: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 8379 | iaw_8_97: |
| 8380 | nop |
| 8381 | ta T_CHANGE_HPRIV |
| 8382 | mov 8, %r18 |
| 8383 | rd %asi, %r12 |
| 8384 | wr %r0, 0x41, %asi |
| 8385 | set sync_thr_counter4, %r23 |
| 8386 | #ifndef SPC |
| 8387 | ldxa [%g0]0x63, %r8 |
| 8388 | and %r8, 0x38, %r8 ! Core ID |
| 8389 | add %r8, %r23, %r23 |
| 8390 | #else |
| 8391 | mov 0, %r8 |
| 8392 | #endif |
| 8393 | mov 0x8, %r16 |
| 8394 | iaw_startwait8_97: |
| 8395 | cas [%r23],%g0,%r16 !lock |
| 8396 | brz,a %r16, continue_iaw_8_97 |
| 8397 | mov (~0x8&0xf), %r16 |
| 8398 | ld [%r23], %r16 |
| 8399 | iaw_wait8_97: |
| 8400 | brnz %r16, iaw_wait8_97 |
| 8401 | ld [%r23], %r16 |
| 8402 | ba iaw_startwait8_97 |
| 8403 | mov 0x8, %r16 |
| 8404 | continue_iaw_8_97: |
| 8405 | sllx %r16, %r8, %r16 !Mask for my core only |
| 8406 | ldxa [0x58]%asi, %r17 !Running_status |
| 8407 | wait_for_stat_8_97: |
| 8408 | ldxa [0x50]%asi, %r13 !Running_rw |
| 8409 | cmp %r13, %r17 |
| 8410 | bne,a %xcc, wait_for_stat_8_97 |
| 8411 | ldxa [0x58]%asi, %r17 !Running_status |
| 8412 | stxa %r16, [0x68]%asi !Park (W1C) |
| 8413 | ldxa [0x50]%asi, %r14 !Running_rw |
| 8414 | wait_for_iaw_8_97: |
| 8415 | ldxa [0x58]%asi, %r17 !Running_status |
| 8416 | cmp %r14, %r17 |
| 8417 | bne,a %xcc, wait_for_iaw_8_97 |
| 8418 | ldxa [0x50]%asi, %r14 !Running_rw |
| 8419 | iaw_doit8_97: |
| 8420 | mov 0x38, %r18 |
| 8421 | iaw1_8_97: |
| 8422 | best_set_reg(0x00000000e1200000, %r20, %r19) |
| 8423 | or %r19, 0x1, %r19 |
| 8424 | stxa %r19, [%r18]0x50 |
| 8425 | stxa %r16, [0x60] %asi ! Unpark (W1S) |
| 8426 | st %g0, [%r23] !clear lock |
| 8427 | wr %r0, %r12, %asi ! restore %asi |
| 8428 | ta T_CHANGE_NONHPRIV |
| 8429 | .word 0xe1e7e00d ! 141: CASA_R casa [%r31] %asi, %r13, %r16 |
| 8430 | dvapa_8_98: |
| 8431 | nop |
| 8432 | ta T_CHANGE_HPRIV |
| 8433 | mov 0xd10, %r20 |
| 8434 | mov 0x13, %r19 |
| 8435 | sllx %r20, 23, %r20 |
| 8436 | or %r19, %r20, %r19 |
| 8437 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 8438 | mov 0x38, %r18 |
| 8439 | stxa %r31, [%r18]0x58 |
| 8440 | ta T_CHANGE_NONHPRIV |
| 8441 | .word 0x99a409b0 ! 142: FDIVs fdivs %f16, %f16, %f12 |
| 8442 | nop |
| 8443 | ta T_CHANGE_HPRIV ! macro |
| 8444 | donret_8_99: |
| 8445 | rd %pc, %r12 |
| 8446 | add %r12, (donretarg_8_99-donret_8_99+4), %r12 |
| 8447 | add %r12, 0x4, %r11 ! seq tnpc |
| 8448 | wrpr %g0, 0x1, %tl |
| 8449 | wrpr %g0, %r12, %tpc |
| 8450 | wrpr %g0, %r11, %tnpc |
| 8451 | set (0x00724500 | (0x82 << 24)), %r13 |
| 8452 | and %r12, 0xfff, %r14 |
| 8453 | sllx %r14, 30, %r14 |
| 8454 | or %r13, %r14, %r20 |
| 8455 | wrpr %r20, %g0, %tstate |
| 8456 | wrhpr %g0, 0x7db, %htstate |
| 8457 | ta T_CHANGE_NONHPRIV ! rand=1 (8) |
| 8458 | .word 0x27400001 ! 1: FBPUL fbul,a,pn %fcc0, <label_0x1> |
| 8459 | done |
| 8460 | donretarg_8_99: |
| 8461 | .word 0x20800001 ! 143: BN bn,a <label_0x1> |
| 8462 | .word 0xe477e1cc ! 144: STX_I stx %r18, [%r31 + 0x01cc] |
| 8463 | .word 0x8d9037f5 ! 145: WRPR_PSTATE_I wrpr %r0, 0x17f5, %pstate |
| 8464 | .word 0xe48008a0 ! 146: LDUWA_R lduwa [%r0, %r0] 0x45, %r18 |
| 8465 | trapasi_8_101: |
| 8466 | nop |
| 8467 | mov 0x3d8, %r1 ! (VA for ASI 0x25) |
| 8468 | .word 0xe4d044a0 ! 147: LDSHA_R ldsha [%r1, %r0] 0x25, %r18 |
| 8469 | ibp_8_102: |
| 8470 | nop |
| 8471 | .word 0xc32fc014 ! 148: STXFSR_R st-sfr %f1, [%r20, %r31] |
| 8472 | setx 0x9e90e39d8034a655, %r1, %r28 |
| 8473 | stxa %r28, [%g0] 0x73 |
| 8474 | intvec_8_103: |
| 8475 | .word 0x39400001 ! 149: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 8476 | mondo_8_104: |
| 8477 | nop |
| 8478 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 8479 | stxa %r20, [%r0+0x3c8] %asi |
| 8480 | .word 0x9d934006 ! 150: WRPR_WSTATE_R wrpr %r13, %r6, %wstate |
| 8481 | setx 0x315de544b671dca7, %r1, %r28 |
| 8482 | stxa %r28, [%g0] 0x73 |
| 8483 | intvec_8_105: |
| 8484 | .word 0x39400001 ! 151: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 8485 | ibp_8_106: |
| 8486 | nop |
| 8487 | .word 0xe4dfc032 ! 152: LDXA_R ldxa [%r31, %r18] 0x01, %r18 |
| 8488 | trapasi_8_107: |
| 8489 | nop |
| 8490 | mov 0x0, %r1 ! (VA for ASI 0x72) |
| 8491 | .word 0xe4c04e40 ! 153: LDSWA_R ldswa [%r1, %r0] 0x72, %r18 |
| 8492 | .word 0x9f803aab ! 154: SIR sir 0x1aab |
| 8493 | splash_cmpr_8_108: |
| 8494 | mov 0, %r18 |
| 8495 | sllx %r18, 63, %r18 |
| 8496 | rd %tick, %r17 |
| 8497 | add %r17, 0x50, %r17 |
| 8498 | or %r17, %r18, %r17 |
| 8499 | .word 0xb3800011 ! 155: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 8500 | intveclr_8_109: |
| 8501 | nop |
| 8502 | ta T_CHANGE_HPRIV |
| 8503 | setx 0xe532cc4a8db55574, %r1, %r28 |
| 8504 | stxa %r28, [%g0] 0x72 |
| 8505 | ta T_CHANGE_NONHPRIV |
| 8506 | .word 0x25400001 ! 156: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 8507 | ibp_8_110: |
| 8508 | nop |
| 8509 | .word 0xa9b2c7d2 ! 157: PDIST pdistn %d42, %d18, %d20 |
| 8510 | .word 0xc32fc000 ! 158: STXFSR_R st-sfr %f1, [%r0, %r31] |
| 8511 | iaw_8_111: |
| 8512 | nop |
| 8513 | ta T_CHANGE_HPRIV |
| 8514 | mov 8, %r18 |
| 8515 | rd %asi, %r12 |
| 8516 | wr %r0, 0x41, %asi |
| 8517 | set sync_thr_counter4, %r23 |
| 8518 | #ifndef SPC |
| 8519 | ldxa [%g0]0x63, %r8 |
| 8520 | and %r8, 0x38, %r8 ! Core ID |
| 8521 | add %r8, %r23, %r23 |
| 8522 | #else |
| 8523 | mov 0, %r8 |
| 8524 | #endif |
| 8525 | mov 0x8, %r16 |
| 8526 | iaw_startwait8_111: |
| 8527 | cas [%r23],%g0,%r16 !lock |
| 8528 | brz,a %r16, continue_iaw_8_111 |
| 8529 | mov (~0x8&0xf), %r16 |
| 8530 | ld [%r23], %r16 |
| 8531 | iaw_wait8_111: |
| 8532 | brnz %r16, iaw_wait8_111 |
| 8533 | ld [%r23], %r16 |
| 8534 | ba iaw_startwait8_111 |
| 8535 | mov 0x8, %r16 |
| 8536 | continue_iaw_8_111: |
| 8537 | sllx %r16, %r8, %r16 !Mask for my core only |
| 8538 | ldxa [0x58]%asi, %r17 !Running_status |
| 8539 | wait_for_stat_8_111: |
| 8540 | ldxa [0x50]%asi, %r13 !Running_rw |
| 8541 | cmp %r13, %r17 |
| 8542 | bne,a %xcc, wait_for_stat_8_111 |
| 8543 | ldxa [0x58]%asi, %r17 !Running_status |
| 8544 | stxa %r16, [0x68]%asi !Park (W1C) |
| 8545 | ldxa [0x50]%asi, %r14 !Running_rw |
| 8546 | wait_for_iaw_8_111: |
| 8547 | ldxa [0x58]%asi, %r17 !Running_status |
| 8548 | cmp %r14, %r17 |
| 8549 | bne,a %xcc, wait_for_iaw_8_111 |
| 8550 | ldxa [0x50]%asi, %r14 !Running_rw |
| 8551 | iaw_doit8_111: |
| 8552 | mov 0x38, %r18 |
| 8553 | iaw4_8_111: |
| 8554 | setx common_target, %r20, %r19 |
| 8555 | or %r19, 0x1, %r19 |
| 8556 | stxa %r19, [%r18]0x50 |
| 8557 | stxa %r16, [0x60] %asi ! Unpark (W1S) |
| 8558 | st %g0, [%r23] !clear lock |
| 8559 | wr %r0, %r12, %asi ! restore %asi |
| 8560 | ta T_CHANGE_NONHPRIV |
| 8561 | .word 0xe1bfe160 ! 159: STDFA_I stda %f16, [0x0160, %r31] |
| 8562 | .word 0x9f803795 ! 160: SIR sir 0x1795 |
| 8563 | splash_hpstate_8_112: |
| 8564 | .word 0x2d400001 ! 1: FBPG fbg,a,pn %fcc0, <label_0x1> |
| 8565 | .word 0x81983ed9 ! 161: WRHPR_HPSTATE_I wrhpr %r0, 0x1ed9, %hpstate |
| 8566 | .word 0xe327e181 ! 162: STF_I st %f17, [0x0181, %r31] |
| 8567 | .word 0x91d020b5 ! 163: Tcc_I ta icc_or_xcc, %r0 + 181 |
| 8568 | mondo_8_113: |
| 8569 | nop |
| 8570 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 8571 | stxa %r1, [%r0+0x3e8] %asi |
| 8572 | .word 0x9d918006 ! 164: WRPR_WSTATE_R wrpr %r6, %r6, %wstate |
| 8573 | br_badelay2_8_114: |
| 8574 | .word 0x20800001 ! 1: BN bn,a <label_0x1> |
| 8575 | allclean |
| 8576 | .word 0xa3b04303 ! 165: ALIGNADDRESS alignaddr %r1, %r3, %r17 |
| 8577 | fpinit_8_115: |
| 8578 | nop |
| 8579 | setx fp_data_quads, %r19, %r20 |
| 8580 | ldd [%r20], %f0 |
| 8581 | ldd [%r20+8], %f4 |
| 8582 | ld [%r20+16], %fsr |
| 8583 | ld [%r20+24], %r19 |
| 8584 | wr %r19, %g0, %gsr |
| 8585 | .word 0xc3e826bd ! 166: PREFETCHA_I prefetcha [%r0, + 0x06bd] %asi, #one_read |
| 8586 | set 0x277f, %l3 |
| 8587 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT |
| 8588 | .word 0xa9b487c5 ! 167: PDIST pdistn %d18, %d36, %d20 |
| 8589 | memptr_8_116: |
| 8590 | set 0x60340000, %r31 |
| 8591 | .word 0x8581e1f9 ! 168: WRCCR_I wr %r7, 0x01f9, %ccr |
| 8592 | .word 0xd4c7e0a0 ! 169: LDSWA_I ldswa [%r31, + 0x00a0] %asi, %r10 |
| 8593 | setx 0x1f4e3c778acb51d5, %r1, %r28 |
| 8594 | stxa %r28, [%g0] 0x73 |
| 8595 | intvec_8_117: |
| 8596 | .word 0x39400001 ! 170: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 8597 | splash_hpstate_8_118: |
| 8598 | .word 0x8198365f ! 171: WRHPR_HPSTATE_I wrhpr %r0, 0x165f, %hpstate |
| 8599 | mondo_8_119: |
| 8600 | nop |
| 8601 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 8602 | ta T_CHANGE_PRIV |
| 8603 | stxa %r20, [%r0+0x3d0] %asi |
| 8604 | .word 0x9d920005 ! 172: WRPR_WSTATE_R wrpr %r8, %r5, %wstate |
| 8605 | nop |
| 8606 | ta T_CHANGE_HPRIV |
| 8607 | mov 0x8+1, %r10 |
| 8608 | set sync_thr_counter5, %r23 |
| 8609 | #ifndef SPC |
| 8610 | ldxa [%g0]0x63, %o1 |
| 8611 | and %o1, 0x38, %o1 |
| 8612 | add %o1, %r23, %r23 |
| 8613 | sllx %o1, 5, %o3 !(CID*256) |
| 8614 | #endif |
| 8615 | cas [%r23],%g0,%r10 !lock |
| 8616 | brnz %r10, cwq_8_120 |
| 8617 | rd %asi, %r12 |
| 8618 | wr %g0, 0x40, %asi |
| 8619 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 8620 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 8621 | cmp %l1, 1 |
| 8622 | bne cwq_8_120 |
| 8623 | set CWQ_BASE, %l6 |
| 8624 | #ifndef SPC |
| 8625 | add %l6, %o3, %l6 |
| 8626 | #endif |
| 8627 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 8628 | best_set_reg(0x20610000, %l1, %l2) !# Control Word |
| 8629 | sllx %l2, 32, %l2 |
| 8630 | stx %l2, [%l6 + 0x0] |
| 8631 | membar #Sync |
| 8632 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 8633 | sub %l2, 0x40, %l2 |
| 8634 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 8635 | wr %r12, %g0, %asi |
| 8636 | st %g0, [%r23] |
| 8637 | cwq_8_120: |
| 8638 | ta T_CHANGE_NONHPRIV |
| 8639 | .word 0x99414000 ! 173: RDPC rd %pc, %r12 |
| 8640 | ibp_8_121: |
| 8641 | nop |
| 8642 | ta T_CHANGE_NONHPRIV |
| 8643 | .word 0xc19fdf20 ! 174: LDDFA_R ldda [%r31, %r0], %f0 |
| 8644 | .word 0xd4800b20 ! 175: LDUWA_R lduwa [%r0, %r0] 0x59, %r10 |
| 8645 | .word 0x8d802004 ! 176: WRFPRS_I wr %r0, 0x0004, %fprs |
| 8646 | #if (defined SPC || defined CMP1) |
| 8647 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_122) + 56, 16, 16)) -> intp(3,0,27) |
| 8648 | #else |
| 8649 | setx 0x63baca1c321e9247, %r1, %r28 |
| 8650 | stxa %r28, [%g0] 0x73 |
| 8651 | #endif |
| 8652 | intvec_8_122: |
| 8653 | .word 0x39400001 ! 177: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 8654 | setx 0xe71a2c4cdc495d22, %r1, %r28 |
| 8655 | stxa %r28, [%g0] 0x73 |
| 8656 | intvec_8_123: |
| 8657 | .word 0x39400001 ! 178: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 8658 | .word 0x91d02035 ! 179: Tcc_I ta icc_or_xcc, %r0 + 53 |
| 8659 | #if (defined SPC || defined CMP1) |
| 8660 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_8_124) + 48, 16, 16)) -> intp(5,0,6) |
| 8661 | #else |
| 8662 | setx 0x3178a3fc5fabad44, %r1, %r28 |
| 8663 | stxa %r28, [%g0] 0x73 |
| 8664 | #endif |
| 8665 | intvec_8_124: |
| 8666 | .word 0x39400001 ! 180: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 8667 | fpinit_8_125: |
| 8668 | nop |
| 8669 | setx fp_data_quads, %r19, %r20 |
| 8670 | ldd [%r20], %f0 |
| 8671 | ldd [%r20+8], %f4 |
| 8672 | ld [%r20+16], %fsr |
| 8673 | ld [%r20+24], %r19 |
| 8674 | wr %r19, %g0, %gsr |
| 8675 | .word 0x87a80a44 ! 181: FCMPd fcmpd %fcc<n>, %f0, %f4 |
| 8676 | splash_tba_8_126: |
| 8677 | nop |
| 8678 | ta T_CHANGE_PRIV |
| 8679 | setx 0x00000000003a0000, %r11, %r12 |
| 8680 | .word 0x8b90000c ! 182: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 8681 | fpinit_8_127: |
| 8682 | nop |
| 8683 | setx fp_data_quads, %r19, %r20 |
| 8684 | ldd [%r20], %f0 |
| 8685 | ldd [%r20+8], %f4 |
| 8686 | ld [%r20+16], %fsr |
| 8687 | ld [%r20+24], %r19 |
| 8688 | wr %r19, %g0, %gsr |
| 8689 | .word 0xc3e83c6d ! 183: PREFETCHA_I prefetcha [%r0, + 0xfffffc6d] %asi, #one_read |
| 8690 | .word 0xd4dfe130 ! 184: LDXA_I ldxa [%r31, + 0x0130] %asi, %r10 |
| 8691 | nop |
| 8692 | ta T_CHANGE_HPRIV |
| 8693 | mov 0x8+1, %r10 |
| 8694 | set sync_thr_counter5, %r23 |
| 8695 | #ifndef SPC |
| 8696 | ldxa [%g0]0x63, %o1 |
| 8697 | and %o1, 0x38, %o1 |
| 8698 | add %o1, %r23, %r23 |
| 8699 | sllx %o1, 5, %o3 !(CID*256) |
| 8700 | #endif |
| 8701 | cas [%r23],%g0,%r10 !lock |
| 8702 | brnz %r10, cwq_8_128 |
| 8703 | rd %asi, %r12 |
| 8704 | wr %g0, 0x40, %asi |
| 8705 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 8706 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 8707 | cmp %l1, 1 |
| 8708 | bne cwq_8_128 |
| 8709 | set CWQ_BASE, %l6 |
| 8710 | #ifndef SPC |
| 8711 | add %l6, %o3, %l6 |
| 8712 | #endif |
| 8713 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 8714 | best_set_reg(0x206100d0, %l1, %l2) !# Control Word |
| 8715 | sllx %l2, 32, %l2 |
| 8716 | stx %l2, [%l6 + 0x0] |
| 8717 | membar #Sync |
| 8718 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 8719 | sub %l2, 0x40, %l2 |
| 8720 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 8721 | wr %r12, %g0, %asi |
| 8722 | st %g0, [%r23] |
| 8723 | cwq_8_128: |
| 8724 | ta T_CHANGE_NONHPRIV |
| 8725 | .word 0x91414000 ! 185: RDPC rd %pc, %r8 |
| 8726 | intveclr_8_129: |
| 8727 | nop |
| 8728 | ta T_CHANGE_HPRIV |
| 8729 | setx 0x8a1728efc87d17ae, %r1, %r28 |
| 8730 | stxa %r28, [%g0] 0x72 |
| 8731 | ta T_CHANGE_NONHPRIV |
| 8732 | .word 0x25400001 ! 186: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 8733 | memptr_8_130: |
| 8734 | set 0x60140000, %r31 |
| 8735 | .word 0x8582be7a ! 187: WRCCR_I wr %r10, 0x1e7a, %ccr |
| 8736 | .word 0x9192000b ! 188: WRPR_PIL_R wrpr %r8, %r11, %pil |
| 8737 | .word 0xa9a00174 ! 189: FABSq dis not found |
| 8738 | |
| 8739 | .word 0xe88008a0 ! 190: LDUWA_R lduwa [%r0, %r0] 0x45, %r20 |
| 8740 | .word 0x81580000 ! 191: FLUSHW flushw |
| 8741 | splash_cmpr_8_133: |
| 8742 | mov 0, %r18 |
| 8743 | sllx %r18, 63, %r18 |
| 8744 | rd %tick, %r17 |
| 8745 | add %r17, 0x80, %r17 |
| 8746 | or %r17, %r18, %r17 |
| 8747 | ta T_CHANGE_PRIV |
| 8748 | .word 0xb3800011 ! 192: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 8749 | .word 0xe877c000 ! 193: STX_R stx %r20, [%r31 + %r0] |
| 8750 | ceter_8_134: |
| 8751 | nop |
| 8752 | ta T_CHANGE_HPRIV |
| 8753 | mov 7, %r17 |
| 8754 | sllx %r17, 60, %r17 |
| 8755 | mov 0x18, %r16 |
| 8756 | stxa %r17, [%r16]0x4c |
| 8757 | ta T_CHANGE_NONHPRIV |
| 8758 | .word 0x95410000 ! 194: RDTICK rd %tick, %r10 |
| 8759 | .word 0x8d802004 ! 195: WRFPRS_I wr %r0, 0x0004, %fprs |
| 8760 | .word 0xa1520000 ! 196: RDPR_PIL <illegal instruction> |
| 8761 | setx 0xc96008c420a5937a, %r1, %r28 |
| 8762 | stxa %r28, [%g0] 0x73 |
| 8763 | intvec_8_135: |
| 8764 | .word 0x39400001 ! 197: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 8765 | .word 0xd727e1c0 ! 198: STF_I st %f11, [0x01c0, %r31] |
| 8766 | ibp_8_136: |
| 8767 | nop |
| 8768 | .word 0xe19fc3e0 ! 199: LDDFA_R ldda [%r31, %r0], %f16 |
| 8769 | ibp_8_137: |
| 8770 | nop |
| 8771 | ta T_CHANGE_NONHPRIV |
| 8772 | .word 0xd69fc02b ! 200: LDDA_R ldda [%r31, %r11] 0x01, %r11 |
| 8773 | .word 0x89800011 ! 201: WRTICK_R wr %r0, %r17, %tick |
| 8774 | nop |
| 8775 | nop |
| 8776 | ta T_CHANGE_PRIV |
| 8777 | wrpr %g0, %g0, %gl |
| 8778 | nop |
| 8779 | nop |
| 8780 | setx join_lbl_0_0, %g1, %g2 |
| 8781 | jmp %g2 |
| 8782 | nop |
| 8783 | fork_lbl_0_3: |
| 8784 | ta T_CHANGE_NONHPRIV |
| 8785 | vahole_4_0: |
| 8786 | nop |
| 8787 | ta T_CHANGE_NONHPRIV |
| 8788 | setx vahole_target1, %r18, %r27 |
| 8789 | jmpl %r27+0, %r27 |
| 8790 | cwp_4_1: |
| 8791 | set user_data_start, %o7 |
| 8792 | .word 0x93902000 ! 1: WRPR_CWP_I wrpr %r0, 0x0000, %cwp |
| 8793 | pmu_4_2: |
| 8794 | nop |
| 8795 | ta T_CHANGE_PRIV |
| 8796 | setx 0xfffff208fffff6e5, %g1, %g7 |
| 8797 | .word 0xa3800007 ! 2: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 8798 | .word 0xd337c000 ! 3: STQF_R - %f9, [%r0, %r31] |
| 8799 | fpinit_4_3: |
| 8800 | nop |
| 8801 | setx fp_data_quads, %r19, %r20 |
| 8802 | ldd [%r20], %f0 |
| 8803 | ldd [%r20+8], %f4 |
| 8804 | ld [%r20+16], %fsr |
| 8805 | ld [%r20+24], %r19 |
| 8806 | wr %r19, %g0, %gsr |
| 8807 | .word 0x89b00484 ! 4: FCMPLE32 fcmple32 %d0, %d4, %r4 |
| 8808 | .word 0x8d802000 ! 5: WRFPRS_I wr %r0, 0x0000, %fprs |
| 8809 | .word 0x33400001 ! 1: FBPE fbe,a,pn %fcc0, <label_0x1> |
| 8810 | .word 0x8d9035a6 ! 6: WRPR_PSTATE_I wrpr %r0, 0x15a6, %pstate |
| 8811 | brcommon1_4_5: |
| 8812 | nop |
| 8813 | setx common_target, %r12, %r27 |
| 8814 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 8815 | ba,a .+12 |
| 8816 | .word 0x93a7c9d0 ! 1: FDIVd fdivd %f62, %f16, %f40 |
| 8817 | ba,a .+8 |
| 8818 | jmpl %r27+0, %r27 |
| 8819 | .word 0xa5b44490 ! 7: FCMPLE32 fcmple32 %d48, %d16, %r18 |
| 8820 | .word 0xe277e138 ! 8: STX_I stx %r17, [%r31 + 0x0138] |
| 8821 | ibp_4_6: |
| 8822 | nop |
| 8823 | ta T_CHANGE_HPRIV |
| 8824 | mov 8, %r18 |
| 8825 | rd %asi, %r12 |
| 8826 | wr %r0, 0x41, %asi |
| 8827 | set sync_thr_counter4, %r23 |
| 8828 | #ifndef SPC |
| 8829 | ldxa [%g0]0x63, %r8 |
| 8830 | and %r8, 0x38, %r8 ! Core ID |
| 8831 | add %r8, %r23, %r23 |
| 8832 | #else |
| 8833 | mov 0, %r8 |
| 8834 | #endif |
| 8835 | mov 0x4, %r16 |
| 8836 | ibp_startwait4_6: |
| 8837 | cas [%r23],%g0,%r16 !lock |
| 8838 | brz,a %r16, continue_ibp_4_6 |
| 8839 | mov (~0x4&0xf), %r16 |
| 8840 | ld [%r23], %r16 |
| 8841 | ibp_wait4_6: |
| 8842 | brnz %r16, ibp_wait4_6 |
| 8843 | ld [%r23], %r16 |
| 8844 | ba ibp_startwait4_6 |
| 8845 | mov 0x4, %r16 |
| 8846 | continue_ibp_4_6: |
| 8847 | sllx %r16, %r8, %r16 !Mask for my core only |
| 8848 | ldxa [0x58]%asi, %r17 !Running_status |
| 8849 | wait_for_stat_4_6: |
| 8850 | ldxa [0x50]%asi, %r13 !Running_rw |
| 8851 | cmp %r13, %r17 |
| 8852 | bne,a %xcc, wait_for_stat_4_6 |
| 8853 | ldxa [0x58]%asi, %r17 !Running_status |
| 8854 | stxa %r16, [0x68]%asi !Park (W1C) |
| 8855 | ldxa [0x50]%asi, %r14 !Running_rw |
| 8856 | wait_for_ibp_4_6: |
| 8857 | ldxa [0x58]%asi, %r17 !Running_status |
| 8858 | cmp %r14, %r17 |
| 8859 | bne,a %xcc, wait_for_ibp_4_6 |
| 8860 | ldxa [0x50]%asi, %r14 !Running_rw |
| 8861 | ibp_doit4_6: |
| 8862 | best_set_reg(0x00000040e6c00ff8,%r19, %r20) |
| 8863 | stxa %r20, [%r18]0x42 |
| 8864 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 8865 | st %g0, [%r23] !clear lock |
| 8866 | wr %r0, %r12, %asi !restore %asi |
| 8867 | .word 0xe33fc008 ! 9: STDF_R std %f17, [%r8, %r31] |
| 8868 | .word 0x97520000 ! 10: RDPR_PIL <illegal instruction> |
| 8869 | .word 0x2ecc4001 ! 1: BRGEZ brgez,a,pt %r17,<label_0xc4001> |
| 8870 | .word 0x8d9030db ! 11: WRPR_PSTATE_I wrpr %r0, 0x10db, %pstate |
| 8871 | .word 0xe537c000 ! 12: STQF_R - %f18, [%r0, %r31] |
| 8872 | .word 0xe48008a0 ! 13: LDUWA_R lduwa [%r0, %r0] 0x45, %r18 |
| 8873 | .word 0xa5520000 ! 14: RDPR_PIL <illegal instruction> |
| 8874 | mondo_4_8: |
| 8875 | nop |
| 8876 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 8877 | ta T_CHANGE_PRIV |
| 8878 | stxa %r4, [%r0+0x3d8] %asi |
| 8879 | .word 0x9d910007 ! 15: WRPR_WSTATE_R wrpr %r4, %r7, %wstate |
| 8880 | jmptr_4_9: |
| 8881 | nop |
| 8882 | best_set_reg(0xe1200000, %r20, %r27) |
| 8883 | .word 0xb7c6c000 ! 16: JMPL_R jmpl %r27 + %r0, %r27 |
| 8884 | #if (defined SPC || defined CMP1) |
| 8885 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_10) + 32, 16, 16)) -> intp(0,0,29) |
| 8886 | #else |
| 8887 | setx 0x67a353b02778c353, %r1, %r28 |
| 8888 | stxa %r28, [%g0] 0x73 |
| 8889 | #endif |
| 8890 | intvec_4_10: |
| 8891 | .word 0x39400001 ! 17: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 8892 | nop |
| 8893 | ta T_CHANGE_HPRIV ! macro |
| 8894 | donret_4_11: |
| 8895 | rd %pc, %r12 |
| 8896 | add %r12, (donretarg_4_11-donret_4_11+4), %r12 |
| 8897 | add %r12, 0x4, %r11 ! seq tnpc |
| 8898 | wrpr %g0, 0x1, %tl |
| 8899 | wrpr %g0, %r12, %tpc |
| 8900 | wrpr %g0, %r11, %tnpc |
| 8901 | set (0x0097ba00 | (32 << 24)), %r13 |
| 8902 | and %r12, 0xfff, %r14 |
| 8903 | sllx %r14, 30, %r14 |
| 8904 | or %r13, %r14, %r20 |
| 8905 | wrpr %r20, %g0, %tstate |
| 8906 | wrhpr %g0, 0x2f5, %htstate |
| 8907 | ta T_CHANGE_NONPRIV ! rand=0 (4) |
| 8908 | .word 0x2ecc4001 ! 1: BRGEZ brgez,a,pt %r17,<label_0xc4001> |
| 8909 | done |
| 8910 | donretarg_4_11: |
| 8911 | .word 0xd8ffe1c6 ! 18: SWAPA_I swapa %r12, [%r31 + 0x01c6] %asi |
| 8912 | splash_hpstate_4_12: |
| 8913 | .word 0x819835e7 ! 19: WRHPR_HPSTATE_I wrhpr %r0, 0x15e7, %hpstate |
| 8914 | .word 0xab834003 ! 20: WR_CLEAR_SOFTINT_R wr %r13, %r3, %clear_softint |
| 8915 | splash_cmpr_4_13: |
| 8916 | mov 0, %r18 |
| 8917 | sllx %r18, 63, %r18 |
| 8918 | rd %tick, %r17 |
| 8919 | add %r17, 0x50, %r17 |
| 8920 | or %r17, %r18, %r17 |
| 8921 | ta T_CHANGE_HPRIV |
| 8922 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 8923 | ta T_CHANGE_PRIV |
| 8924 | .word 0xaf800011 ! 21: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 8925 | trapasi_4_14: |
| 8926 | nop |
| 8927 | mov 0x18, %r1 ! (VA for ASI 0x4c) |
| 8928 | .word 0xd8c84980 ! 22: LDSBA_R ldsba [%r1, %r0] 0x4c, %r12 |
| 8929 | .word 0xd8c7e008 ! 23: LDSWA_I ldswa [%r31, + 0x0008] %asi, %r12 |
| 8930 | .word 0x8d902873 ! 24: WRPR_PSTATE_I wrpr %r0, 0x0873, %pstate |
| 8931 | nop |
| 8932 | ta T_CHANGE_HPRIV |
| 8933 | mov 0x4, %r10 |
| 8934 | set sync_thr_counter6, %r23 |
| 8935 | #ifndef SPC |
| 8936 | ldxa [%g0]0x63, %o1 |
| 8937 | and %o1, 0x38, %o1 |
| 8938 | add %o1, %r23, %r23 |
| 8939 | #endif |
| 8940 | cas [%r23],%g0,%r10 !lock |
| 8941 | brnz %r10, sma_4_16 |
| 8942 | rd %asi, %r12 |
| 8943 | wr %g0, 0x40, %asi |
| 8944 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 8945 | set 0x00161fff, %g1 |
| 8946 | stxa %g1, [%g0 + 0x80] %asi |
| 8947 | wr %r12, %g0, %asi |
| 8948 | st %g0, [%r23] |
| 8949 | sma_4_16: |
| 8950 | ta T_CHANGE_NONHPRIV |
| 8951 | .word 0xd9e7e011 ! 25: CASA_R casa [%r31] %asi, %r17, %r12 |
| 8952 | brcommon3_4_17: |
| 8953 | nop |
| 8954 | setx common_target, %r12, %r27 |
| 8955 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 8956 | ba,a .+12 |
| 8957 | .word 0xd937c009 ! 1: STQF_R - %f12, [%r9, %r31] |
| 8958 | ba,a .+8 |
| 8959 | jmpl %r27+0, %r27 |
| 8960 | .word 0xd8bfc033 ! 26: STDA_R stda %r12, [%r31 + %r19] 0x01 |
| 8961 | trapasi_4_18: |
| 8962 | nop |
| 8963 | mov 0x0, %r1 ! (VA for ASI 0x73) |
| 8964 | .word 0xd8d04e60 ! 27: LDSHA_R ldsha [%r1, %r0] 0x73, %r12 |
| 8965 | ceter_4_19: |
| 8966 | nop |
| 8967 | ta T_CHANGE_HPRIV |
| 8968 | mov 7, %r17 |
| 8969 | sllx %r17, 60, %r17 |
| 8970 | mov 0x18, %r16 |
| 8971 | stxa %r17, [%r16]0x4c |
| 8972 | ta T_CHANGE_NONHPRIV |
| 8973 | .word 0xa3410000 ! 28: RDTICK rd %tick, %r17 |
| 8974 | splash_cmpr_4_20: |
| 8975 | mov 0, %r18 |
| 8976 | sllx %r18, 63, %r18 |
| 8977 | rd %tick, %r17 |
| 8978 | add %r17, 0x70, %r17 |
| 8979 | or %r17, %r18, %r17 |
| 8980 | ta T_CHANGE_HPRIV |
| 8981 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 8982 | ta T_CHANGE_PRIV |
| 8983 | .word 0xaf800011 ! 29: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 8984 | memptr_4_21: |
| 8985 | set user_data_start, %r31 |
| 8986 | .word 0x85827a5e ! 30: WRCCR_I wr %r9, 0x1a5e, %ccr |
| 8987 | .word 0x96830013 ! 31: ADDcc_R addcc %r12, %r19, %r11 |
| 8988 | .word 0xc1bfe100 ! 32: STDFA_I stda %f0, [0x0100, %r31] |
| 8989 | set 0x3b59, %l3 |
| 8990 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT |
| 8991 | .word 0x9bb507ca ! 33: PDIST pdistn %d20, %d10, %d44 |
| 8992 | brcommon3_4_22: |
| 8993 | nop |
| 8994 | setx common_target, %r12, %r27 |
| 8995 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 8996 | ba,a .+12 |
| 8997 | .word 0xdb37e180 ! 1: STQF_I - %f13, [0x0180, %r31] |
| 8998 | ba,a .+8 |
| 8999 | jmpl %r27+0, %r27 |
| 9000 | .word 0xda3fe0c0 ! 34: STD_I std %r13, [%r31 + 0x00c0] |
| 9001 | .word 0xdac7e1b0 ! 35: LDSWA_I ldswa [%r31, + 0x01b0] %asi, %r13 |
| 9002 | ibp_4_23: |
| 9003 | nop |
| 9004 | ta T_CHANGE_HPRIV |
| 9005 | mov 8, %r18 |
| 9006 | rd %asi, %r12 |
| 9007 | wr %r0, 0x41, %asi |
| 9008 | set sync_thr_counter4, %r23 |
| 9009 | #ifndef SPC |
| 9010 | ldxa [%g0]0x63, %r8 |
| 9011 | and %r8, 0x38, %r8 ! Core ID |
| 9012 | add %r8, %r23, %r23 |
| 9013 | #else |
| 9014 | mov 0, %r8 |
| 9015 | #endif |
| 9016 | mov 0x4, %r16 |
| 9017 | ibp_startwait4_23: |
| 9018 | cas [%r23],%g0,%r16 !lock |
| 9019 | brz,a %r16, continue_ibp_4_23 |
| 9020 | mov (~0x4&0xf), %r16 |
| 9021 | ld [%r23], %r16 |
| 9022 | ibp_wait4_23: |
| 9023 | brnz %r16, ibp_wait4_23 |
| 9024 | ld [%r23], %r16 |
| 9025 | ba ibp_startwait4_23 |
| 9026 | mov 0x4, %r16 |
| 9027 | continue_ibp_4_23: |
| 9028 | sllx %r16, %r8, %r16 !Mask for my core only |
| 9029 | ldxa [0x58]%asi, %r17 !Running_status |
| 9030 | wait_for_stat_4_23: |
| 9031 | ldxa [0x50]%asi, %r13 !Running_rw |
| 9032 | cmp %r13, %r17 |
| 9033 | bne,a %xcc, wait_for_stat_4_23 |
| 9034 | ldxa [0x58]%asi, %r17 !Running_status |
| 9035 | stxa %r16, [0x68]%asi !Park (W1C) |
| 9036 | ldxa [0x50]%asi, %r14 !Running_rw |
| 9037 | wait_for_ibp_4_23: |
| 9038 | ldxa [0x58]%asi, %r17 !Running_status |
| 9039 | cmp %r14, %r17 |
| 9040 | bne,a %xcc, wait_for_ibp_4_23 |
| 9041 | ldxa [0x50]%asi, %r14 !Running_rw |
| 9042 | ibp_doit4_23: |
| 9043 | best_set_reg(0x00000050e3cff8cb,%r19, %r20) |
| 9044 | stxa %r20, [%r18]0x42 |
| 9045 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 9046 | st %g0, [%r23] !clear lock |
| 9047 | wr %r0, %r12, %asi !restore %asi |
| 9048 | ta T_CHANGE_NONHPRIV |
| 9049 | .word 0xe19fe1a0 ! 36: LDDFA_I ldda [%r31, 0x01a0], %f16 |
| 9050 | .word 0x8d802004 ! 37: WRFPRS_I wr %r0, 0x0004, %fprs |
| 9051 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 9052 | reduce_priv_lvl_4_24: |
| 9053 | ta T_CHANGE_NONPRIV ! macro |
| 9054 | trapasi_4_25: |
| 9055 | nop |
| 9056 | mov 0x18, %r1 ! (VA for ASI 0x50) |
| 9057 | .word 0xda904a00 ! 39: LDUHA_R lduha [%r1, %r0] 0x50, %r13 |
| 9058 | brcommon1_4_26: |
| 9059 | nop |
| 9060 | setx common_target, %r12, %r27 |
| 9061 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 9062 | ba,a .+12 |
| 9063 | .word 0xc32fe030 ! 1: STXFSR_I st-sfr %f1, [0x0030, %r31] |
| 9064 | ba,a .+8 |
| 9065 | jmpl %r27+0, %r27 |
| 9066 | .word 0x95b40493 ! 40: FCMPLE32 fcmple32 %d16, %d50, %r10 |
| 9067 | ibp_4_27: |
| 9068 | nop |
| 9069 | ta T_CHANGE_HPRIV |
| 9070 | mov 8, %r18 |
| 9071 | rd %asi, %r12 |
| 9072 | wr %r0, 0x41, %asi |
| 9073 | set sync_thr_counter4, %r23 |
| 9074 | #ifndef SPC |
| 9075 | ldxa [%g0]0x63, %r8 |
| 9076 | and %r8, 0x38, %r8 ! Core ID |
| 9077 | add %r8, %r23, %r23 |
| 9078 | #else |
| 9079 | mov 0, %r8 |
| 9080 | #endif |
| 9081 | mov 0x4, %r16 |
| 9082 | ibp_startwait4_27: |
| 9083 | cas [%r23],%g0,%r16 !lock |
| 9084 | brz,a %r16, continue_ibp_4_27 |
| 9085 | mov (~0x4&0xf), %r16 |
| 9086 | ld [%r23], %r16 |
| 9087 | ibp_wait4_27: |
| 9088 | brnz %r16, ibp_wait4_27 |
| 9089 | ld [%r23], %r16 |
| 9090 | ba ibp_startwait4_27 |
| 9091 | mov 0x4, %r16 |
| 9092 | continue_ibp_4_27: |
| 9093 | sllx %r16, %r8, %r16 !Mask for my core only |
| 9094 | ldxa [0x58]%asi, %r17 !Running_status |
| 9095 | wait_for_stat_4_27: |
| 9096 | ldxa [0x50]%asi, %r13 !Running_rw |
| 9097 | cmp %r13, %r17 |
| 9098 | bne,a %xcc, wait_for_stat_4_27 |
| 9099 | ldxa [0x58]%asi, %r17 !Running_status |
| 9100 | stxa %r16, [0x68]%asi !Park (W1C) |
| 9101 | ldxa [0x50]%asi, %r14 !Running_rw |
| 9102 | wait_for_ibp_4_27: |
| 9103 | ldxa [0x58]%asi, %r17 !Running_status |
| 9104 | cmp %r14, %r17 |
| 9105 | bne,a %xcc, wait_for_ibp_4_27 |
| 9106 | ldxa [0x50]%asi, %r14 !Running_rw |
| 9107 | ibp_doit4_27: |
| 9108 | best_set_reg(0x00000040ebf8cb0f,%r19, %r20) |
| 9109 | stxa %r20, [%r18]0x42 |
| 9110 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 9111 | st %g0, [%r23] !clear lock |
| 9112 | wr %r0, %r12, %asi !restore %asi |
| 9113 | .word 0xd51fe020 ! 41: LDDF_I ldd [%r31, 0x0020], %f10 |
| 9114 | .word 0xa1a000cd ! 42: FNEGd fnegd %f44, %f16 |
| 9115 | nop |
| 9116 | ta T_CHANGE_HPRIV |
| 9117 | mov 0x4+1, %r10 |
| 9118 | set sync_thr_counter5, %r23 |
| 9119 | #ifndef SPC |
| 9120 | ldxa [%g0]0x63, %o1 |
| 9121 | and %o1, 0x38, %o1 |
| 9122 | add %o1, %r23, %r23 |
| 9123 | sllx %o1, 5, %o3 !(CID*256) |
| 9124 | #endif |
| 9125 | cas [%r23],%g0,%r10 !lock |
| 9126 | brnz %r10, cwq_4_28 |
| 9127 | rd %asi, %r12 |
| 9128 | wr %g0, 0x40, %asi |
| 9129 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 9130 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 9131 | cmp %l1, 1 |
| 9132 | bne cwq_4_28 |
| 9133 | set CWQ_BASE, %l6 |
| 9134 | #ifndef SPC |
| 9135 | add %l6, %o3, %l6 |
| 9136 | #endif |
| 9137 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 9138 | best_set_reg(0x206100b0, %l1, %l2) !# Control Word |
| 9139 | sllx %l2, 32, %l2 |
| 9140 | stx %l2, [%l6 + 0x0] |
| 9141 | membar #Sync |
| 9142 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 9143 | sub %l2, 0x40, %l2 |
| 9144 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 9145 | wr %r12, %g0, %asi |
| 9146 | st %g0, [%r23] |
| 9147 | cwq_4_28: |
| 9148 | ta T_CHANGE_NONHPRIV |
| 9149 | .word 0x9b414000 ! 43: RDPC rd %pc, %r13 |
| 9150 | splash_htba_4_29: |
| 9151 | nop |
| 9152 | ta T_CHANGE_HPRIV |
| 9153 | setx 0x0000000200280000, %r11, %r12 |
| 9154 | .word 0x8b98000c ! 44: WRHPR_HTBA_R wrhpr %r0, %r12, %htba |
| 9155 | #if (defined SPC || defined CMP1) |
| 9156 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_30) + 48, 16, 16)) -> intp(5,0,28) |
| 9157 | #else |
| 9158 | setx 0xed7506f6e94017e3, %r1, %r28 |
| 9159 | stxa %r28, [%g0] 0x73 |
| 9160 | #endif |
| 9161 | intvec_4_30: |
| 9162 | .word 0x39400001 ! 45: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 9163 | .word 0x2ac90001 ! 1: BRNZ brnz,a,pt %r4,<label_0x90001> |
| 9164 | .word 0x8d902893 ! 46: WRPR_PSTATE_I wrpr %r0, 0x0893, %pstate |
| 9165 | ibp_4_32: |
| 9166 | nop |
| 9167 | ta T_CHANGE_HPRIV |
| 9168 | mov 8, %r18 |
| 9169 | rd %asi, %r12 |
| 9170 | wr %r0, 0x41, %asi |
| 9171 | set sync_thr_counter4, %r23 |
| 9172 | #ifndef SPC |
| 9173 | ldxa [%g0]0x63, %r8 |
| 9174 | and %r8, 0x38, %r8 ! Core ID |
| 9175 | add %r8, %r23, %r23 |
| 9176 | #else |
| 9177 | mov 0, %r8 |
| 9178 | #endif |
| 9179 | mov 0x4, %r16 |
| 9180 | ibp_startwait4_32: |
| 9181 | cas [%r23],%g0,%r16 !lock |
| 9182 | brz,a %r16, continue_ibp_4_32 |
| 9183 | mov (~0x4&0xf), %r16 |
| 9184 | ld [%r23], %r16 |
| 9185 | ibp_wait4_32: |
| 9186 | brnz %r16, ibp_wait4_32 |
| 9187 | ld [%r23], %r16 |
| 9188 | ba ibp_startwait4_32 |
| 9189 | mov 0x4, %r16 |
| 9190 | continue_ibp_4_32: |
| 9191 | sllx %r16, %r8, %r16 !Mask for my core only |
| 9192 | ldxa [0x58]%asi, %r17 !Running_status |
| 9193 | wait_for_stat_4_32: |
| 9194 | ldxa [0x50]%asi, %r13 !Running_rw |
| 9195 | cmp %r13, %r17 |
| 9196 | bne,a %xcc, wait_for_stat_4_32 |
| 9197 | ldxa [0x58]%asi, %r17 !Running_status |
| 9198 | stxa %r16, [0x68]%asi !Park (W1C) |
| 9199 | ldxa [0x50]%asi, %r14 !Running_rw |
| 9200 | wait_for_ibp_4_32: |
| 9201 | ldxa [0x58]%asi, %r17 !Running_status |
| 9202 | cmp %r14, %r17 |
| 9203 | bne,a %xcc, wait_for_ibp_4_32 |
| 9204 | ldxa [0x50]%asi, %r14 !Running_rw |
| 9205 | ibp_doit4_32: |
| 9206 | best_set_reg(0x00000040b9cb0f5d,%r19, %r20) |
| 9207 | stxa %r20, [%r18]0x42 |
| 9208 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 9209 | st %g0, [%r23] !clear lock |
| 9210 | wr %r0, %r12, %asi !restore %asi |
| 9211 | .word 0xe1bfe100 ! 47: STDFA_I stda %f16, [0x0100, %r31] |
| 9212 | .word 0xe537c000 ! 48: STQF_R - %f18, [%r0, %r31] |
| 9213 | ibp_4_33: |
| 9214 | nop |
| 9215 | ta T_CHANGE_HPRIV |
| 9216 | mov 8, %r18 |
| 9217 | rd %asi, %r12 |
| 9218 | wr %r0, 0x41, %asi |
| 9219 | set sync_thr_counter4, %r23 |
| 9220 | #ifndef SPC |
| 9221 | ldxa [%g0]0x63, %r8 |
| 9222 | and %r8, 0x38, %r8 ! Core ID |
| 9223 | add %r8, %r23, %r23 |
| 9224 | #else |
| 9225 | mov 0, %r8 |
| 9226 | #endif |
| 9227 | mov 0x4, %r16 |
| 9228 | ibp_startwait4_33: |
| 9229 | cas [%r23],%g0,%r16 !lock |
| 9230 | brz,a %r16, continue_ibp_4_33 |
| 9231 | mov (~0x4&0xf), %r16 |
| 9232 | ld [%r23], %r16 |
| 9233 | ibp_wait4_33: |
| 9234 | brnz %r16, ibp_wait4_33 |
| 9235 | ld [%r23], %r16 |
| 9236 | ba ibp_startwait4_33 |
| 9237 | mov 0x4, %r16 |
| 9238 | continue_ibp_4_33: |
| 9239 | sllx %r16, %r8, %r16 !Mask for my core only |
| 9240 | ldxa [0x58]%asi, %r17 !Running_status |
| 9241 | wait_for_stat_4_33: |
| 9242 | ldxa [0x50]%asi, %r13 !Running_rw |
| 9243 | cmp %r13, %r17 |
| 9244 | bne,a %xcc, wait_for_stat_4_33 |
| 9245 | ldxa [0x58]%asi, %r17 !Running_status |
| 9246 | stxa %r16, [0x68]%asi !Park (W1C) |
| 9247 | ldxa [0x50]%asi, %r14 !Running_rw |
| 9248 | wait_for_ibp_4_33: |
| 9249 | ldxa [0x58]%asi, %r17 !Running_status |
| 9250 | cmp %r14, %r17 |
| 9251 | bne,a %xcc, wait_for_ibp_4_33 |
| 9252 | ldxa [0x50]%asi, %r14 !Running_rw |
| 9253 | ibp_doit4_33: |
| 9254 | best_set_reg(0x0000004037cf5d18,%r19, %r20) |
| 9255 | stxa %r20, [%r18]0x42 |
| 9256 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 9257 | st %g0, [%r23] !clear lock |
| 9258 | wr %r0, %r12, %asi !restore %asi |
| 9259 | ta T_CHANGE_NONHPRIV |
| 9260 | .word 0xe1bfc3e0 ! 49: STDFA_R stda %f16, [%r0, %r31] |
| 9261 | ibp_4_34: |
| 9262 | nop |
| 9263 | ta T_CHANGE_HPRIV |
| 9264 | mov 8, %r18 |
| 9265 | rd %asi, %r12 |
| 9266 | wr %r0, 0x41, %asi |
| 9267 | set sync_thr_counter4, %r23 |
| 9268 | #ifndef SPC |
| 9269 | ldxa [%g0]0x63, %r8 |
| 9270 | and %r8, 0x38, %r8 ! Core ID |
| 9271 | add %r8, %r23, %r23 |
| 9272 | #else |
| 9273 | mov 0, %r8 |
| 9274 | #endif |
| 9275 | mov 0x4, %r16 |
| 9276 | ibp_startwait4_34: |
| 9277 | cas [%r23],%g0,%r16 !lock |
| 9278 | brz,a %r16, continue_ibp_4_34 |
| 9279 | mov (~0x4&0xf), %r16 |
| 9280 | ld [%r23], %r16 |
| 9281 | ibp_wait4_34: |
| 9282 | brnz %r16, ibp_wait4_34 |
| 9283 | ld [%r23], %r16 |
| 9284 | ba ibp_startwait4_34 |
| 9285 | mov 0x4, %r16 |
| 9286 | continue_ibp_4_34: |
| 9287 | sllx %r16, %r8, %r16 !Mask for my core only |
| 9288 | ldxa [0x58]%asi, %r17 !Running_status |
| 9289 | wait_for_stat_4_34: |
| 9290 | ldxa [0x50]%asi, %r13 !Running_rw |
| 9291 | cmp %r13, %r17 |
| 9292 | bne,a %xcc, wait_for_stat_4_34 |
| 9293 | ldxa [0x58]%asi, %r17 !Running_status |
| 9294 | stxa %r16, [0x68]%asi !Park (W1C) |
| 9295 | ldxa [0x50]%asi, %r14 !Running_rw |
| 9296 | wait_for_ibp_4_34: |
| 9297 | ldxa [0x58]%asi, %r17 !Running_status |
| 9298 | cmp %r14, %r17 |
| 9299 | bne,a %xcc, wait_for_ibp_4_34 |
| 9300 | ldxa [0x50]%asi, %r14 !Running_rw |
| 9301 | ibp_doit4_34: |
| 9302 | best_set_reg(0x000000409cdd186b,%r19, %r20) |
| 9303 | stxa %r20, [%r18]0x42 |
| 9304 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 9305 | st %g0, [%r23] !clear lock |
| 9306 | wr %r0, %r12, %asi !restore %asi |
| 9307 | ta T_CHANGE_NONHPRIV |
| 9308 | .word 0xa3a4c9aa ! 50: FDIVs fdivs %f19, %f10, %f17 |
| 9309 | .word 0x8d90388d ! 51: WRPR_PSTATE_I wrpr %r0, 0x188d, %pstate |
| 9310 | .word 0xe24fc000 ! 52: LDSB_R ldsb [%r31 + %r0], %r17 |
| 9311 | .word 0xe2c7e0f8 ! 53: LDSWA_I ldswa [%r31, + 0x00f8] %asi, %r17 |
| 9312 | .word 0xe33fe19f ! 54: STDF_I std %f17, [0x019f, %r31] |
| 9313 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 9314 | reduce_priv_lvl_4_36: |
| 9315 | ta T_CHANGE_NONHPRIV ! macro |
| 9316 | intveclr_4_37: |
| 9317 | nop |
| 9318 | ta T_CHANGE_HPRIV |
| 9319 | setx 0xb2b32d701ba35ad7, %r1, %r28 |
| 9320 | stxa %r28, [%g0] 0x72 |
| 9321 | .word 0x25400001 ! 56: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 9322 | ibp_4_38: |
| 9323 | nop |
| 9324 | ta T_CHANGE_HPRIV |
| 9325 | mov 8, %r18 |
| 9326 | rd %asi, %r12 |
| 9327 | wr %r0, 0x41, %asi |
| 9328 | set sync_thr_counter4, %r23 |
| 9329 | #ifndef SPC |
| 9330 | ldxa [%g0]0x63, %r8 |
| 9331 | and %r8, 0x38, %r8 ! Core ID |
| 9332 | add %r8, %r23, %r23 |
| 9333 | #else |
| 9334 | mov 0, %r8 |
| 9335 | #endif |
| 9336 | mov 0x4, %r16 |
| 9337 | ibp_startwait4_38: |
| 9338 | cas [%r23],%g0,%r16 !lock |
| 9339 | brz,a %r16, continue_ibp_4_38 |
| 9340 | mov (~0x4&0xf), %r16 |
| 9341 | ld [%r23], %r16 |
| 9342 | ibp_wait4_38: |
| 9343 | brnz %r16, ibp_wait4_38 |
| 9344 | ld [%r23], %r16 |
| 9345 | ba ibp_startwait4_38 |
| 9346 | mov 0x4, %r16 |
| 9347 | continue_ibp_4_38: |
| 9348 | sllx %r16, %r8, %r16 !Mask for my core only |
| 9349 | ldxa [0x58]%asi, %r17 !Running_status |
| 9350 | wait_for_stat_4_38: |
| 9351 | ldxa [0x50]%asi, %r13 !Running_rw |
| 9352 | cmp %r13, %r17 |
| 9353 | bne,a %xcc, wait_for_stat_4_38 |
| 9354 | ldxa [0x58]%asi, %r17 !Running_status |
| 9355 | stxa %r16, [0x68]%asi !Park (W1C) |
| 9356 | ldxa [0x50]%asi, %r14 !Running_rw |
| 9357 | wait_for_ibp_4_38: |
| 9358 | ldxa [0x58]%asi, %r17 !Running_status |
| 9359 | cmp %r14, %r17 |
| 9360 | bne,a %xcc, wait_for_ibp_4_38 |
| 9361 | ldxa [0x50]%asi, %r14 !Running_rw |
| 9362 | ibp_doit4_38: |
| 9363 | best_set_reg(0x00000040fcd86b63,%r19, %r20) |
| 9364 | stxa %r20, [%r18]0x42 |
| 9365 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 9366 | st %g0, [%r23] !clear lock |
| 9367 | wr %r0, %r12, %asi !restore %asi |
| 9368 | ta T_CHANGE_NONHPRIV |
| 9369 | .word 0xe297c034 ! 57: LDUHA_R lduha [%r31, %r20] 0x01, %r17 |
| 9370 | .word 0xa1524000 ! 58: RDPR_CWP <illegal instruction> |
| 9371 | ibp_4_39: |
| 9372 | nop |
| 9373 | ta T_CHANGE_HPRIV |
| 9374 | mov 8, %r18 |
| 9375 | rd %asi, %r12 |
| 9376 | wr %r0, 0x41, %asi |
| 9377 | set sync_thr_counter4, %r23 |
| 9378 | #ifndef SPC |
| 9379 | ldxa [%g0]0x63, %r8 |
| 9380 | and %r8, 0x38, %r8 ! Core ID |
| 9381 | add %r8, %r23, %r23 |
| 9382 | #else |
| 9383 | mov 0, %r8 |
| 9384 | #endif |
| 9385 | mov 0x4, %r16 |
| 9386 | ibp_startwait4_39: |
| 9387 | cas [%r23],%g0,%r16 !lock |
| 9388 | brz,a %r16, continue_ibp_4_39 |
| 9389 | mov (~0x4&0xf), %r16 |
| 9390 | ld [%r23], %r16 |
| 9391 | ibp_wait4_39: |
| 9392 | brnz %r16, ibp_wait4_39 |
| 9393 | ld [%r23], %r16 |
| 9394 | ba ibp_startwait4_39 |
| 9395 | mov 0x4, %r16 |
| 9396 | continue_ibp_4_39: |
| 9397 | sllx %r16, %r8, %r16 !Mask for my core only |
| 9398 | ldxa [0x58]%asi, %r17 !Running_status |
| 9399 | wait_for_stat_4_39: |
| 9400 | ldxa [0x50]%asi, %r13 !Running_rw |
| 9401 | cmp %r13, %r17 |
| 9402 | bne,a %xcc, wait_for_stat_4_39 |
| 9403 | ldxa [0x58]%asi, %r17 !Running_status |
| 9404 | stxa %r16, [0x68]%asi !Park (W1C) |
| 9405 | ldxa [0x50]%asi, %r14 !Running_rw |
| 9406 | wait_for_ibp_4_39: |
| 9407 | ldxa [0x58]%asi, %r17 !Running_status |
| 9408 | cmp %r14, %r17 |
| 9409 | bne,a %xcc, wait_for_ibp_4_39 |
| 9410 | ldxa [0x50]%asi, %r14 !Running_rw |
| 9411 | ibp_doit4_39: |
| 9412 | best_set_reg(0x00000050e5eb636f,%r19, %r20) |
| 9413 | stxa %r20, [%r18]0x42 |
| 9414 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 9415 | st %g0, [%r23] !clear lock |
| 9416 | wr %r0, %r12, %asi !restore %asi |
| 9417 | ta T_CHANGE_NONHPRIV |
| 9418 | .word 0xe1bfdb60 ! 59: STDFA_R stda %f16, [%r0, %r31] |
| 9419 | mondo_4_40: |
| 9420 | nop |
| 9421 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 9422 | stxa %r19, [%r0+0x3e8] %asi |
| 9423 | .word 0x9d950008 ! 60: WRPR_WSTATE_R wrpr %r20, %r8, %wstate |
| 9424 | ibp_4_41: |
| 9425 | nop |
| 9426 | ta T_CHANGE_HPRIV |
| 9427 | mov 8, %r18 |
| 9428 | rd %asi, %r12 |
| 9429 | wr %r0, 0x41, %asi |
| 9430 | set sync_thr_counter4, %r23 |
| 9431 | #ifndef SPC |
| 9432 | ldxa [%g0]0x63, %r8 |
| 9433 | and %r8, 0x38, %r8 ! Core ID |
| 9434 | add %r8, %r23, %r23 |
| 9435 | #else |
| 9436 | mov 0, %r8 |
| 9437 | #endif |
| 9438 | mov 0x4, %r16 |
| 9439 | ibp_startwait4_41: |
| 9440 | cas [%r23],%g0,%r16 !lock |
| 9441 | brz,a %r16, continue_ibp_4_41 |
| 9442 | mov (~0x4&0xf), %r16 |
| 9443 | ld [%r23], %r16 |
| 9444 | ibp_wait4_41: |
| 9445 | brnz %r16, ibp_wait4_41 |
| 9446 | ld [%r23], %r16 |
| 9447 | ba ibp_startwait4_41 |
| 9448 | mov 0x4, %r16 |
| 9449 | continue_ibp_4_41: |
| 9450 | sllx %r16, %r8, %r16 !Mask for my core only |
| 9451 | ldxa [0x58]%asi, %r17 !Running_status |
| 9452 | wait_for_stat_4_41: |
| 9453 | ldxa [0x50]%asi, %r13 !Running_rw |
| 9454 | cmp %r13, %r17 |
| 9455 | bne,a %xcc, wait_for_stat_4_41 |
| 9456 | ldxa [0x58]%asi, %r17 !Running_status |
| 9457 | stxa %r16, [0x68]%asi !Park (W1C) |
| 9458 | ldxa [0x50]%asi, %r14 !Running_rw |
| 9459 | wait_for_ibp_4_41: |
| 9460 | ldxa [0x58]%asi, %r17 !Running_status |
| 9461 | cmp %r14, %r17 |
| 9462 | bne,a %xcc, wait_for_ibp_4_41 |
| 9463 | ldxa [0x50]%asi, %r14 !Running_rw |
| 9464 | ibp_doit4_41: |
| 9465 | best_set_reg(0x00000040bee36f8c,%r19, %r20) |
| 9466 | stxa %r20, [%r18]0x42 |
| 9467 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 9468 | st %g0, [%r23] !clear lock |
| 9469 | wr %r0, %r12, %asi !restore %asi |
| 9470 | .word 0xe1bfe120 ! 61: STDFA_I stda %f16, [0x0120, %r31] |
| 9471 | .word 0xe8dfe160 ! 62: LDXA_I ldxa [%r31, + 0x0160] %asi, %r20 |
| 9472 | .word 0x879c4002 ! 63: WRHPR_HINTP_R wrhpr %r17, %r2, %hintp |
| 9473 | #if (defined SPC || defined CMP1) |
| 9474 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_42) + 24, 16, 16)) -> intp(2,0,21) |
| 9475 | #else |
| 9476 | setx 0xd0a978ab3e3e8752, %r1, %r28 |
| 9477 | stxa %r28, [%g0] 0x73 |
| 9478 | #endif |
| 9479 | intvec_4_42: |
| 9480 | .word 0x39400001 ! 64: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 9481 | .word 0xc19fe020 ! 65: LDDFA_I ldda [%r31, 0x0020], %f0 |
| 9482 | ibp_4_44: |
| 9483 | nop |
| 9484 | ta T_CHANGE_HPRIV |
| 9485 | mov 8, %r18 |
| 9486 | rd %asi, %r12 |
| 9487 | wr %r0, 0x41, %asi |
| 9488 | set sync_thr_counter4, %r23 |
| 9489 | #ifndef SPC |
| 9490 | ldxa [%g0]0x63, %r8 |
| 9491 | and %r8, 0x38, %r8 ! Core ID |
| 9492 | add %r8, %r23, %r23 |
| 9493 | #else |
| 9494 | mov 0, %r8 |
| 9495 | #endif |
| 9496 | mov 0x4, %r16 |
| 9497 | ibp_startwait4_44: |
| 9498 | cas [%r23],%g0,%r16 !lock |
| 9499 | brz,a %r16, continue_ibp_4_44 |
| 9500 | mov (~0x4&0xf), %r16 |
| 9501 | ld [%r23], %r16 |
| 9502 | ibp_wait4_44: |
| 9503 | brnz %r16, ibp_wait4_44 |
| 9504 | ld [%r23], %r16 |
| 9505 | ba ibp_startwait4_44 |
| 9506 | mov 0x4, %r16 |
| 9507 | continue_ibp_4_44: |
| 9508 | sllx %r16, %r8, %r16 !Mask for my core only |
| 9509 | ldxa [0x58]%asi, %r17 !Running_status |
| 9510 | wait_for_stat_4_44: |
| 9511 | ldxa [0x50]%asi, %r13 !Running_rw |
| 9512 | cmp %r13, %r17 |
| 9513 | bne,a %xcc, wait_for_stat_4_44 |
| 9514 | ldxa [0x58]%asi, %r17 !Running_status |
| 9515 | stxa %r16, [0x68]%asi !Park (W1C) |
| 9516 | ldxa [0x50]%asi, %r14 !Running_rw |
| 9517 | wait_for_ibp_4_44: |
| 9518 | ldxa [0x58]%asi, %r17 !Running_status |
| 9519 | cmp %r14, %r17 |
| 9520 | bne,a %xcc, wait_for_ibp_4_44 |
| 9521 | ldxa [0x50]%asi, %r14 !Running_rw |
| 9522 | ibp_doit4_44: |
| 9523 | best_set_reg(0x0000004019ef8cf9,%r19, %r20) |
| 9524 | stxa %r20, [%r18]0x42 |
| 9525 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 9526 | st %g0, [%r23] !clear lock |
| 9527 | wr %r0, %r12, %asi !restore %asi |
| 9528 | .word 0xe1bfe080 ! 66: STDFA_I stda %f16, [0x0080, %r31] |
| 9529 | ibp_4_45: |
| 9530 | nop |
| 9531 | ta T_CHANGE_HPRIV |
| 9532 | mov 8, %r18 |
| 9533 | rd %asi, %r12 |
| 9534 | wr %r0, 0x41, %asi |
| 9535 | set sync_thr_counter4, %r23 |
| 9536 | #ifndef SPC |
| 9537 | ldxa [%g0]0x63, %r8 |
| 9538 | and %r8, 0x38, %r8 ! Core ID |
| 9539 | add %r8, %r23, %r23 |
| 9540 | #else |
| 9541 | mov 0, %r8 |
| 9542 | #endif |
| 9543 | mov 0x4, %r16 |
| 9544 | ibp_startwait4_45: |
| 9545 | cas [%r23],%g0,%r16 !lock |
| 9546 | brz,a %r16, continue_ibp_4_45 |
| 9547 | mov (~0x4&0xf), %r16 |
| 9548 | ld [%r23], %r16 |
| 9549 | ibp_wait4_45: |
| 9550 | brnz %r16, ibp_wait4_45 |
| 9551 | ld [%r23], %r16 |
| 9552 | ba ibp_startwait4_45 |
| 9553 | mov 0x4, %r16 |
| 9554 | continue_ibp_4_45: |
| 9555 | sllx %r16, %r8, %r16 !Mask for my core only |
| 9556 | ldxa [0x58]%asi, %r17 !Running_status |
| 9557 | wait_for_stat_4_45: |
| 9558 | ldxa [0x50]%asi, %r13 !Running_rw |
| 9559 | cmp %r13, %r17 |
| 9560 | bne,a %xcc, wait_for_stat_4_45 |
| 9561 | ldxa [0x58]%asi, %r17 !Running_status |
| 9562 | stxa %r16, [0x68]%asi !Park (W1C) |
| 9563 | ldxa [0x50]%asi, %r14 !Running_rw |
| 9564 | wait_for_ibp_4_45: |
| 9565 | ldxa [0x58]%asi, %r17 !Running_status |
| 9566 | cmp %r14, %r17 |
| 9567 | bne,a %xcc, wait_for_ibp_4_45 |
| 9568 | ldxa [0x50]%asi, %r14 !Running_rw |
| 9569 | ibp_doit4_45: |
| 9570 | best_set_reg(0x000000501cccf95d,%r19, %r20) |
| 9571 | stxa %r20, [%r18]0x42 |
| 9572 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 9573 | st %g0, [%r23] !clear lock |
| 9574 | wr %r0, %r12, %asi !restore %asi |
| 9575 | .word 0xe91fc013 ! 67: LDDF_R ldd [%r31, %r19], %f20 |
| 9576 | .word 0xe927e0a1 ! 68: STF_I st %f20, [0x00a1, %r31] |
| 9577 | mondo_4_46: |
| 9578 | nop |
| 9579 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 9580 | ta T_CHANGE_PRIV |
| 9581 | stxa %r9, [%r0+0x3e0] %asi |
| 9582 | .word 0x9d924014 ! 69: WRPR_WSTATE_R wrpr %r9, %r20, %wstate |
| 9583 | .word 0xb180400c ! 70: WR_STICK_REG_R wr %r1, %r12, %- |
| 9584 | br_badelay3_4_47: |
| 9585 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> |
| 9586 | .word 0x20800001 ! 1: BN bn,a <label_0x1> |
| 9587 | .word 0xd5144009 ! 1: LDQF_R - [%r17, %r9], %f10 |
| 9588 | .word 0xa5a48834 ! 71: FADDs fadds %f18, %f20, %f18 |
| 9589 | fpinit_4_48: |
| 9590 | nop |
| 9591 | setx fp_data_quads, %r19, %r20 |
| 9592 | ldd [%r20], %f0 |
| 9593 | ldd [%r20+8], %f4 |
| 9594 | ld [%r20+16], %fsr |
| 9595 | ld [%r20+24], %r19 |
| 9596 | wr %r19, %g0, %gsr |
| 9597 | .word 0x8da009c4 ! 72: FDIVd fdivd %f0, %f4, %f6 |
| 9598 | brcommon2_4_49: |
| 9599 | nop |
| 9600 | setx common_target, %r12, %r27 |
| 9601 | ba,a .+12 |
| 9602 | .word 0x9f802160 ! 1: SIR sir 0x0160 |
| 9603 | ba,a .+8 |
| 9604 | jmpl %r27+0, %r27 |
| 9605 | .word 0xe1bfe0a0 ! 73: STDFA_I stda %f16, [0x00a0, %r31] |
| 9606 | #if (defined SPC || defined CMP1) |
| 9607 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_50) + 48, 16, 16)) -> intp(6,0,13) |
| 9608 | #else |
| 9609 | setx 0xbba76acc00d7777c, %r1, %r28 |
| 9610 | stxa %r28, [%g0] 0x73 |
| 9611 | #endif |
| 9612 | intvec_4_50: |
| 9613 | .word 0x39400001 ! 74: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 9614 | .word 0xc32fc000 ! 75: STXFSR_R st-sfr %f1, [%r0, %r31] |
| 9615 | intveclr_4_51: |
| 9616 | nop |
| 9617 | ta T_CHANGE_HPRIV |
| 9618 | setx 0x91b4cd2eb60eedb2, %r1, %r28 |
| 9619 | stxa %r28, [%g0] 0x72 |
| 9620 | ta T_CHANGE_NONHPRIV |
| 9621 | .word 0x25400001 ! 76: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 9622 | brcommon3_4_52: |
| 9623 | nop |
| 9624 | setx common_target, %r12, %r27 |
| 9625 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 9626 | ba,a .+12 |
| 9627 | .word 0xdb37e180 ! 1: STQF_I - %f13, [0x0180, %r31] |
| 9628 | ba,a .+8 |
| 9629 | jmpl %r27+0, %r27 |
| 9630 | .word 0xdb1fc008 ! 77: LDDF_R ldd [%r31, %r8], %f13 |
| 9631 | .word 0xa9844004 ! 78: WR_SET_SOFTINT_R wr %r17, %r4, %set_softint |
| 9632 | .word 0x33400001 ! 1: FBPE fbe,a,pn %fcc0, <label_0x1> |
| 9633 | .word 0x8d903aff ! 79: WRPR_PSTATE_I wrpr %r0, 0x1aff, %pstate |
| 9634 | splash_lsu_4_54: |
| 9635 | nop |
| 9636 | ta T_CHANGE_HPRIV |
| 9637 | set 0x9bbbe18c, %r2 |
| 9638 | mov 0x5, %r1 |
| 9639 | sllx %r1, 32, %r1 |
| 9640 | or %r1, %r2, %r2 |
| 9641 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 9642 | ta T_CHANGE_NONHPRIV |
| 9643 | .word 0x3d400001 ! 80: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 9644 | splash_lsu_4_55: |
| 9645 | nop |
| 9646 | ta T_CHANGE_HPRIV |
| 9647 | set 0x5a7ae6fb, %r2 |
| 9648 | mov 0x1, %r1 |
| 9649 | sllx %r1, 32, %r1 |
| 9650 | or %r1, %r2, %r2 |
| 9651 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 9652 | .word 0x3d400001 ! 81: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 9653 | nop |
| 9654 | ta T_CHANGE_HPRIV ! macro |
| 9655 | donret_4_56: |
| 9656 | rd %pc, %r12 |
| 9657 | add %r12, (donretarg_4_56-donret_4_56+4), %r12 |
| 9658 | add %r12, 0x4, %r11 ! seq tnpc |
| 9659 | wrpr %g0, 0x1, %tl |
| 9660 | wrpr %g0, %r12, %tpc |
| 9661 | wrpr %g0, %r11, %tnpc |
| 9662 | set (0x00774700 | (0x8a << 24)), %r13 |
| 9663 | and %r12, 0xfff, %r14 |
| 9664 | sllx %r14, 30, %r14 |
| 9665 | or %r13, %r14, %r20 |
| 9666 | wrpr %r20, %g0, %tstate |
| 9667 | wrhpr %g0, 0xfdf, %htstate |
| 9668 | ta T_CHANGE_NONHPRIV ! rand=1 (4) |
| 9669 | retry |
| 9670 | donretarg_4_56: |
| 9671 | .word 0xa9a049ca ! 82: FDIVd fdivd %f32, %f10, %f20 |
| 9672 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 9673 | reduce_priv_lvl_4_57: |
| 9674 | ta T_CHANGE_NONHPRIV ! macro |
| 9675 | dvapa_4_58: |
| 9676 | nop |
| 9677 | ta T_CHANGE_HPRIV |
| 9678 | mov 0x835, %r20 |
| 9679 | mov 0x1, %r19 |
| 9680 | sllx %r20, 23, %r20 |
| 9681 | or %r19, %r20, %r19 |
| 9682 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 9683 | mov 0x38, %r18 |
| 9684 | stxa %r31, [%r18]0x58 |
| 9685 | ta T_CHANGE_NONHPRIV |
| 9686 | .word 0xa7702340 ! 84: POPC_I popc 0x0340, %r19 |
| 9687 | nop |
| 9688 | ta T_CHANGE_HPRIV ! macro |
| 9689 | donret_4_59: |
| 9690 | rd %pc, %r12 |
| 9691 | add %r12, (donretarg_4_59-donret_4_59), %r12 |
| 9692 | add %r12, 0x8, %r11 ! nonseq tnpc |
| 9693 | wrpr %g0, 0x2, %tl |
| 9694 | wrpr %g0, %r12, %tpc |
| 9695 | wrpr %g0, %r11, %tnpc |
| 9696 | set (0x00c51600 | (0x80 << 24)), %r13 |
| 9697 | and %r12, 0xfff, %r14 |
| 9698 | sllx %r14, 30, %r14 |
| 9699 | or %r13, %r14, %r20 |
| 9700 | wrpr %r20, %g0, %tstate |
| 9701 | wrhpr %g0, 0x1f5e, %htstate |
| 9702 | ta T_CHANGE_NONPRIV ! rand=0 (4) |
| 9703 | .word 0x39400001 ! 1: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 9704 | done |
| 9705 | donretarg_4_59: |
| 9706 | .word 0xd86fe0a0 ! 85: LDSTUB_I ldstub %r12, [%r31 + 0x00a0] |
| 9707 | trapasi_4_60: |
| 9708 | nop |
| 9709 | mov 0x8, %r1 ! (VA for ASI 0x5b) |
| 9710 | .word 0xd8d04b60 ! 86: LDSHA_R ldsha [%r1, %r0] 0x5b, %r12 |
| 9711 | otherw |
| 9712 | mov 0x34, %r30 |
| 9713 | .word 0x91d0001e ! 87: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 9714 | pmu_4_61: |
| 9715 | nop |
| 9716 | setx 0xfffff90dfffffd07, %g1, %g7 |
| 9717 | .word 0xa3800007 ! 88: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 9718 | .word 0x89800011 ! 89: WRTICK_R wr %r0, %r17, %tick |
| 9719 | dvapa_4_63: |
| 9720 | nop |
| 9721 | ta T_CHANGE_HPRIV |
| 9722 | mov 0xbe6, %r20 |
| 9723 | mov 0x3, %r19 |
| 9724 | sllx %r20, 23, %r20 |
| 9725 | or %r19, %r20, %r19 |
| 9726 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 9727 | mov 0x38, %r18 |
| 9728 | stxa %r31, [%r18]0x58 |
| 9729 | ta T_CHANGE_NONHPRIV |
| 9730 | .word 0xd8bfc030 ! 90: STDA_R stda %r12, [%r31 + %r16] 0x01 |
| 9731 | .word 0xd857e1e0 ! 91: LDSH_I ldsh [%r31 + 0x01e0], %r12 |
| 9732 | .word 0xb185000a ! 92: WR_STICK_REG_R wr %r20, %r10, %- |
| 9733 | .word 0xd89fc2e0 ! 93: LDDA_R ldda [%r31, %r0] 0x17, %r12 |
| 9734 | splash_hpstate_4_64: |
| 9735 | .word 0x2a800001 ! 1: BCS bcs,a <label_0x1> |
| 9736 | .word 0x8198390f ! 94: WRHPR_HPSTATE_I wrhpr %r0, 0x190f, %hpstate |
| 9737 | .word 0xc30fc000 ! 95: LDXFSR_R ld-fsr [%r31, %r0], %f1 |
| 9738 | brcommon1_4_65: |
| 9739 | nop |
| 9740 | setx common_target, %r12, %r27 |
| 9741 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 9742 | ba,a .+12 |
| 9743 | .word 0x99702180 ! 1: POPC_I popc 0x0180, %r12 |
| 9744 | ba,a .+8 |
| 9745 | jmpl %r27+0, %r27 |
| 9746 | .word 0x87aa8a54 ! 96: FCMPd fcmpd %fcc<n>, %f10, %f20 |
| 9747 | .word 0xc36fe050 ! 1: PREFETCH_I prefetch [%r31 + 0x0050], #one_read |
| 9748 | .word 0x9f802ef6 ! 97: SIR sir 0x0ef6 |
| 9749 | intveclr_4_66: |
| 9750 | nop |
| 9751 | ta T_CHANGE_HPRIV |
| 9752 | setx 0xe68b803b3d8d19c3, %r1, %r28 |
| 9753 | stxa %r28, [%g0] 0x72 |
| 9754 | ta T_CHANGE_NONHPRIV |
| 9755 | .word 0x25400001 ! 98: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 9756 | .word 0x89800011 ! 99: WRTICK_R wr %r0, %r17, %tick |
| 9757 | splash_tba_4_68: |
| 9758 | nop |
| 9759 | ta T_CHANGE_PRIV |
| 9760 | set 0x120000, %r12 |
| 9761 | .word 0x8b90000c ! 100: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 9762 | brcommon1_4_69: |
| 9763 | nop |
| 9764 | setx common_target, %r12, %r27 |
| 9765 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 9766 | ba,a .+12 |
| 9767 | .word 0xd06fe130 ! 1: LDSTUB_I ldstub %r8, [%r31 + 0x0130] |
| 9768 | ba,a .+8 |
| 9769 | jmpl %r27+0, %r27 |
| 9770 | .word 0x99a509d3 ! 101: FDIVd fdivd %f20, %f50, %f12 |
| 9771 | intveclr_4_70: |
| 9772 | nop |
| 9773 | ta T_CHANGE_HPRIV |
| 9774 | setx 0xe71b4f3ce12cab86, %r1, %r28 |
| 9775 | stxa %r28, [%g0] 0x72 |
| 9776 | .word 0x25400001 ! 102: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 9777 | setx 0x92d694d4d7feef02, %r1, %r28 |
| 9778 | stxa %r28, [%g0] 0x73 |
| 9779 | intvec_4_71: |
| 9780 | .word 0x39400001 ! 103: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 9781 | nop |
| 9782 | ta T_CHANGE_HPRIV ! macro |
| 9783 | donret_4_72: |
| 9784 | rd %pc, %r12 |
| 9785 | add %r12, (donretarg_4_72-donret_4_72), %r12 |
| 9786 | add %r12, 0x8, %r11 ! nonseq tnpc |
| 9787 | wrpr %g0, 0x1, %tl |
| 9788 | wrpr %g0, %r12, %tpc |
| 9789 | wrpr %g0, %r11, %tnpc |
| 9790 | set (0x00668000 | (28 << 24)), %r13 |
| 9791 | and %r12, 0xfff, %r14 |
| 9792 | sllx %r14, 30, %r14 |
| 9793 | or %r13, %r14, %r20 |
| 9794 | wrpr %r20, %g0, %tstate |
| 9795 | wrhpr %g0, 0x1dd3, %htstate |
| 9796 | ta T_CHANGE_NONHPRIV ! rand=1 (4) |
| 9797 | .word 0x2f400001 ! 1: FBPU fbu,a,pn %fcc0, <label_0x1> |
| 9798 | retry |
| 9799 | donretarg_4_72: |
| 9800 | .word 0x2aca8001 ! 104: BRNZ brnz,a,pt %r10,<label_0xa8001> |
| 9801 | intveclr_4_73: |
| 9802 | nop |
| 9803 | ta T_CHANGE_HPRIV |
| 9804 | setx 0xb67e438c78a33ae4, %r1, %r28 |
| 9805 | stxa %r28, [%g0] 0x72 |
| 9806 | ta T_CHANGE_NONHPRIV |
| 9807 | .word 0x25400001 ! 105: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 9808 | .word 0xc1bfe160 ! 106: STDFA_I stda %f0, [0x0160, %r31] |
| 9809 | ta T_CHANGE_NONHPRIV |
| 9810 | .word 0x8143e011 ! 107: MEMBAR membar #LoadLoad | #Lookaside |
| 9811 | .word 0xc32fc000 ! 108: STXFSR_R st-sfr %f1, [%r0, %r31] |
| 9812 | bn skip_4_76 |
| 9813 | fbo,a,pn %fcc0, skip_4_76 |
| 9814 | .align 1024 |
| 9815 | skip_4_76: |
| 9816 | .word 0xc36c2159 ! 109: PREFETCH_I prefetch [%r16 + 0x0159], #one_read |
| 9817 | .word 0xc1bfe1e0 ! 110: STDFA_I stda %f0, [0x01e0, %r31] |
| 9818 | intveclr_4_77: |
| 9819 | nop |
| 9820 | ta T_CHANGE_HPRIV |
| 9821 | setx 0xcffc79ee40569801, %r1, %r28 |
| 9822 | stxa %r28, [%g0] 0x72 |
| 9823 | ta T_CHANGE_NONHPRIV |
| 9824 | .word 0x25400001 ! 111: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 9825 | splash_cmpr_4_78: |
| 9826 | mov 0, %r18 |
| 9827 | sllx %r18, 63, %r18 |
| 9828 | rd %tick, %r17 |
| 9829 | add %r17, 0x70, %r17 |
| 9830 | or %r17, %r18, %r17 |
| 9831 | ta T_CHANGE_HPRIV |
| 9832 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 9833 | ta T_CHANGE_PRIV |
| 9834 | .word 0xb3800011 ! 112: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 9835 | .word 0xc1bfe0c0 ! 113: STDFA_I stda %f0, [0x00c0, %r31] |
| 9836 | unsupttte_4_79: |
| 9837 | nop |
| 9838 | ta T_CHANGE_HPRIV |
| 9839 | mov 1, %r20 |
| 9840 | sllx %r20, 63, %r20 |
| 9841 | or %r20, 2,%r20 |
| 9842 | stxa %r20, [%g0]0x5c ! D unsupported page size .. |
| 9843 | ta T_CHANGE_NONHPRIV |
| 9844 | .word 0xa3b5048d ! 114: FCMPLE32 fcmple32 %d20, %d44, %r17 |
| 9845 | tagged_4_80: |
| 9846 | tsubcctv %r4, 0x149a, %r13 |
| 9847 | .word 0xd807e0bd ! 115: LDUW_I lduw [%r31 + 0x00bd], %r12 |
| 9848 | .word 0x98d48005 ! 116: UMULcc_R umulcc %r18, %r5, %r12 |
| 9849 | setx 0x8c9fd033300b51db, %r1, %r28 |
| 9850 | stxa %r28, [%g0] 0x73 |
| 9851 | intvec_4_81: |
| 9852 | .word 0x39400001 ! 117: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 9853 | trapasi_4_82: |
| 9854 | nop |
| 9855 | mov 0x8, %r1 ! (VA for ASI 0x5a) |
| 9856 | .word 0xd2c84b40 ! 118: LDSBA_R ldsba [%r1, %r0] 0x5a, %r9 |
| 9857 | .word 0x2cc94001 ! 1: BRGZ brgz,a,pt %r5,<label_0x94001> |
| 9858 | .word 0x8d903beb ! 119: WRPR_PSTATE_I wrpr %r0, 0x1beb, %pstate |
| 9859 | ibp_4_84: |
| 9860 | nop |
| 9861 | ta T_CHANGE_HPRIV |
| 9862 | mov 8, %r18 |
| 9863 | rd %asi, %r12 |
| 9864 | wr %r0, 0x41, %asi |
| 9865 | set sync_thr_counter4, %r23 |
| 9866 | #ifndef SPC |
| 9867 | ldxa [%g0]0x63, %r8 |
| 9868 | and %r8, 0x38, %r8 ! Core ID |
| 9869 | add %r8, %r23, %r23 |
| 9870 | #else |
| 9871 | mov 0, %r8 |
| 9872 | #endif |
| 9873 | mov 0x4, %r16 |
| 9874 | ibp_startwait4_84: |
| 9875 | cas [%r23],%g0,%r16 !lock |
| 9876 | brz,a %r16, continue_ibp_4_84 |
| 9877 | mov (~0x4&0xf), %r16 |
| 9878 | ld [%r23], %r16 |
| 9879 | ibp_wait4_84: |
| 9880 | brnz %r16, ibp_wait4_84 |
| 9881 | ld [%r23], %r16 |
| 9882 | ba ibp_startwait4_84 |
| 9883 | mov 0x4, %r16 |
| 9884 | continue_ibp_4_84: |
| 9885 | sllx %r16, %r8, %r16 !Mask for my core only |
| 9886 | ldxa [0x58]%asi, %r17 !Running_status |
| 9887 | wait_for_stat_4_84: |
| 9888 | ldxa [0x50]%asi, %r13 !Running_rw |
| 9889 | cmp %r13, %r17 |
| 9890 | bne,a %xcc, wait_for_stat_4_84 |
| 9891 | ldxa [0x58]%asi, %r17 !Running_status |
| 9892 | stxa %r16, [0x68]%asi !Park (W1C) |
| 9893 | ldxa [0x50]%asi, %r14 !Running_rw |
| 9894 | wait_for_ibp_4_84: |
| 9895 | ldxa [0x58]%asi, %r17 !Running_status |
| 9896 | cmp %r14, %r17 |
| 9897 | bne,a %xcc, wait_for_ibp_4_84 |
| 9898 | ldxa [0x50]%asi, %r14 !Running_rw |
| 9899 | ibp_doit4_84: |
| 9900 | best_set_reg(0x00000040aaf95d17,%r19, %r20) |
| 9901 | stxa %r20, [%r18]0x42 |
| 9902 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 9903 | st %g0, [%r23] !clear lock |
| 9904 | wr %r0, %r12, %asi !restore %asi |
| 9905 | .word 0xd2bfc02c ! 120: STDA_R stda %r9, [%r31 + %r12] 0x01 |
| 9906 | nop |
| 9907 | ta T_CHANGE_HPRIV |
| 9908 | mov 0x4, %r10 |
| 9909 | set sync_thr_counter6, %r23 |
| 9910 | #ifndef SPC |
| 9911 | ldxa [%g0]0x63, %o1 |
| 9912 | and %o1, 0x38, %o1 |
| 9913 | add %o1, %r23, %r23 |
| 9914 | #endif |
| 9915 | cas [%r23],%g0,%r10 !lock |
| 9916 | brnz %r10, sma_4_85 |
| 9917 | rd %asi, %r12 |
| 9918 | wr %g0, 0x40, %asi |
| 9919 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 9920 | set 0x00121fff, %g1 |
| 9921 | stxa %g1, [%g0 + 0x80] %asi |
| 9922 | wr %r12, %g0, %asi |
| 9923 | st %g0, [%r23] |
| 9924 | sma_4_85: |
| 9925 | ta T_CHANGE_NONHPRIV |
| 9926 | .word 0xd3e7e014 ! 121: CASA_R casa [%r31] %asi, %r20, %r9 |
| 9927 | fpinit_4_86: |
| 9928 | nop |
| 9929 | setx fp_data_quads, %r19, %r20 |
| 9930 | ldd [%r20], %f0 |
| 9931 | ldd [%r20+8], %f4 |
| 9932 | ld [%r20+16], %fsr |
| 9933 | ld [%r20+24], %r19 |
| 9934 | wr %r19, %g0, %gsr |
| 9935 | .word 0x8db00484 ! 122: FCMPLE32 fcmple32 %d0, %d4, %r6 |
| 9936 | .word 0x9194000b ! 123: WRPR_PIL_R wrpr %r16, %r11, %pil |
| 9937 | intveclr_4_88: |
| 9938 | nop |
| 9939 | ta T_CHANGE_HPRIV |
| 9940 | setx 0x590159928e63c775, %r1, %r28 |
| 9941 | stxa %r28, [%g0] 0x72 |
| 9942 | .word 0x25400001 ! 124: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 9943 | mondo_4_89: |
| 9944 | nop |
| 9945 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 9946 | stxa %r19, [%r0+0x3e8] %asi |
| 9947 | .word 0x9d944009 ! 125: WRPR_WSTATE_R wrpr %r17, %r9, %wstate |
| 9948 | nop |
| 9949 | ta T_CHANGE_HPRIV ! macro |
| 9950 | donret_4_90: |
| 9951 | rd %pc, %r12 |
| 9952 | add %r12, (donretarg_4_90-donret_4_90+4), %r12 |
| 9953 | add %r12, 0x4, %r11 ! seq tnpc |
| 9954 | wrpr %g0, 0x2, %tl |
| 9955 | wrpr %g0, %r12, %tpc |
| 9956 | wrpr %g0, %r11, %tnpc |
| 9957 | set (0x00d5e800 | (22 << 24)), %r13 |
| 9958 | and %r12, 0xfff, %r14 |
| 9959 | sllx %r14, 30, %r14 |
| 9960 | or %r13, %r14, %r20 |
| 9961 | wrpr %r20, %g0, %tstate |
| 9962 | wrhpr %g0, 0x1699, %htstate |
| 9963 | ta T_CHANGE_NONHPRIV ! rand=1 (4) |
| 9964 | retry |
| 9965 | donretarg_4_90: |
| 9966 | .word 0xd26fe099 ! 126: LDSTUB_I ldstub %r9, [%r31 + 0x0099] |
| 9967 | .word 0xd2cfe1a0 ! 127: LDSBA_I ldsba [%r31, + 0x01a0] %asi, %r9 |
| 9968 | .word 0xd23fe02b ! 128: STD_I std %r9, [%r31 + 0x002b] |
| 9969 | .word 0x8d802004 ! 129: WRFPRS_I wr %r0, 0x0004, %fprs |
| 9970 | .word 0x91d02032 ! 130: Tcc_I ta icc_or_xcc, %r0 + 50 |
| 9971 | .word 0xa5520000 ! 131: RDPR_PIL <illegal instruction> |
| 9972 | mondo_4_91: |
| 9973 | nop |
| 9974 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 9975 | ta T_CHANGE_PRIV |
| 9976 | stxa %r19, [%r0+0x3d8] %asi |
| 9977 | .word 0x9d94c007 ! 132: WRPR_WSTATE_R wrpr %r19, %r7, %wstate |
| 9978 | #if (defined SPC || defined CMP1) |
| 9979 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_92) + 56, 16, 16)) -> intp(0,0,20) |
| 9980 | #else |
| 9981 | setx 0xc5176cc6758ad3b5, %r1, %r28 |
| 9982 | stxa %r28, [%g0] 0x73 |
| 9983 | #endif |
| 9984 | intvec_4_92: |
| 9985 | .word 0x39400001 ! 133: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 9986 | fpinit_4_93: |
| 9987 | nop |
| 9988 | setx fp_data_quads, %r19, %r20 |
| 9989 | ldd [%r20], %f0 |
| 9990 | ldd [%r20+8], %f4 |
| 9991 | ld [%r20+16], %fsr |
| 9992 | ld [%r20+24], %r19 |
| 9993 | wr %r19, %g0, %gsr |
| 9994 | .word 0x8da009c4 ! 134: FDIVd fdivd %f0, %f4, %f6 |
| 9995 | invalw |
| 9996 | mov 0xb3, %r30 |
| 9997 | .word 0x91d0001e ! 135: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 9998 | .word 0xe28008a0 ! 136: LDUWA_R lduwa [%r0, %r0] 0x45, %r17 |
| 9999 | ibp_4_94: |
| 10000 | nop |
| 10001 | ta T_CHANGE_HPRIV |
| 10002 | mov 8, %r18 |
| 10003 | rd %asi, %r12 |
| 10004 | wr %r0, 0x41, %asi |
| 10005 | set sync_thr_counter4, %r23 |
| 10006 | #ifndef SPC |
| 10007 | ldxa [%g0]0x63, %r8 |
| 10008 | and %r8, 0x38, %r8 ! Core ID |
| 10009 | add %r8, %r23, %r23 |
| 10010 | #else |
| 10011 | mov 0, %r8 |
| 10012 | #endif |
| 10013 | mov 0x4, %r16 |
| 10014 | ibp_startwait4_94: |
| 10015 | cas [%r23],%g0,%r16 !lock |
| 10016 | brz,a %r16, continue_ibp_4_94 |
| 10017 | mov (~0x4&0xf), %r16 |
| 10018 | ld [%r23], %r16 |
| 10019 | ibp_wait4_94: |
| 10020 | brnz %r16, ibp_wait4_94 |
| 10021 | ld [%r23], %r16 |
| 10022 | ba ibp_startwait4_94 |
| 10023 | mov 0x4, %r16 |
| 10024 | continue_ibp_4_94: |
| 10025 | sllx %r16, %r8, %r16 !Mask for my core only |
| 10026 | ldxa [0x58]%asi, %r17 !Running_status |
| 10027 | wait_for_stat_4_94: |
| 10028 | ldxa [0x50]%asi, %r13 !Running_rw |
| 10029 | cmp %r13, %r17 |
| 10030 | bne,a %xcc, wait_for_stat_4_94 |
| 10031 | ldxa [0x58]%asi, %r17 !Running_status |
| 10032 | stxa %r16, [0x68]%asi !Park (W1C) |
| 10033 | ldxa [0x50]%asi, %r14 !Running_rw |
| 10034 | wait_for_ibp_4_94: |
| 10035 | ldxa [0x58]%asi, %r17 !Running_status |
| 10036 | cmp %r14, %r17 |
| 10037 | bne,a %xcc, wait_for_ibp_4_94 |
| 10038 | ldxa [0x50]%asi, %r14 !Running_rw |
| 10039 | ibp_doit4_94: |
| 10040 | best_set_reg(0x000000403ddd1771,%r19, %r20) |
| 10041 | stxa %r20, [%r18]0x42 |
| 10042 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 10043 | st %g0, [%r23] !clear lock |
| 10044 | wr %r0, %r12, %asi !restore %asi |
| 10045 | .word 0x9f8021e0 ! 137: SIR sir 0x01e0 |
| 10046 | nop |
| 10047 | ta T_CHANGE_HPRIV |
| 10048 | mov 0x4+1, %r10 |
| 10049 | set sync_thr_counter5, %r23 |
| 10050 | #ifndef SPC |
| 10051 | ldxa [%g0]0x63, %o1 |
| 10052 | and %o1, 0x38, %o1 |
| 10053 | add %o1, %r23, %r23 |
| 10054 | sllx %o1, 5, %o3 !(CID*256) |
| 10055 | #endif |
| 10056 | cas [%r23],%g0,%r10 !lock |
| 10057 | brnz %r10, cwq_4_95 |
| 10058 | rd %asi, %r12 |
| 10059 | wr %g0, 0x40, %asi |
| 10060 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 10061 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 10062 | cmp %l1, 1 |
| 10063 | bne cwq_4_95 |
| 10064 | set CWQ_BASE, %l6 |
| 10065 | #ifndef SPC |
| 10066 | add %l6, %o3, %l6 |
| 10067 | #endif |
| 10068 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 10069 | best_set_reg(0x20610060, %l1, %l2) !# Control Word |
| 10070 | sllx %l2, 32, %l2 |
| 10071 | stx %l2, [%l6 + 0x0] |
| 10072 | membar #Sync |
| 10073 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 10074 | sub %l2, 0x40, %l2 |
| 10075 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 10076 | wr %r12, %g0, %asi |
| 10077 | st %g0, [%r23] |
| 10078 | cwq_4_95: |
| 10079 | ta T_CHANGE_NONHPRIV |
| 10080 | .word 0x97414000 ! 138: RDPC rd %pc, %r11 |
| 10081 | .word 0x87802004 ! 139: WRASI_I wr %r0, 0x0004, %asi |
| 10082 | #if (defined SPC || defined CMP1) |
| 10083 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_96) + 32, 16, 16)) -> intp(3,0,20) |
| 10084 | #else |
| 10085 | setx 0x47e0e0f119c5747b, %r1, %r28 |
| 10086 | stxa %r28, [%g0] 0x73 |
| 10087 | #endif |
| 10088 | intvec_4_96: |
| 10089 | .word 0x39400001 ! 140: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 10090 | .word 0xe11fc014 ! 141: LDDF_R ldd [%r31, %r20], %f16 |
| 10091 | dvapa_4_98: |
| 10092 | nop |
| 10093 | ta T_CHANGE_HPRIV |
| 10094 | mov 0xf04, %r20 |
| 10095 | mov 0x13, %r19 |
| 10096 | sllx %r20, 23, %r20 |
| 10097 | or %r19, %r20, %r19 |
| 10098 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 10099 | mov 0x38, %r18 |
| 10100 | stxa %r31, [%r18]0x58 |
| 10101 | ta T_CHANGE_NONHPRIV |
| 10102 | .word 0x95a409d2 ! 142: FDIVd fdivd %f16, %f18, %f10 |
| 10103 | nop |
| 10104 | ta T_CHANGE_HPRIV ! macro |
| 10105 | donret_4_99: |
| 10106 | rd %pc, %r12 |
| 10107 | add %r12, (donretarg_4_99-donret_4_99+4), %r12 |
| 10108 | add %r12, 0x4, %r11 ! seq tnpc |
| 10109 | wrpr %g0, 0x1, %tl |
| 10110 | wrpr %g0, %r12, %tpc |
| 10111 | wrpr %g0, %r11, %tnpc |
| 10112 | set (0x00534100 | (20 << 24)), %r13 |
| 10113 | and %r12, 0xfff, %r14 |
| 10114 | sllx %r14, 30, %r14 |
| 10115 | or %r13, %r14, %r20 |
| 10116 | wrpr %r20, %g0, %tstate |
| 10117 | wrhpr %g0, 0x455, %htstate |
| 10118 | ta T_CHANGE_NONHPRIV ! rand=1 (4) |
| 10119 | .word 0x2d400001 ! 1: FBPG fbg,a,pn %fcc0, <label_0x1> |
| 10120 | done |
| 10121 | donretarg_4_99: |
| 10122 | .word 0x39400001 ! 143: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 10123 | .word 0xe477e189 ! 144: STX_I stx %r18, [%r31 + 0x0189] |
| 10124 | .word 0x8d902ecd ! 145: WRPR_PSTATE_I wrpr %r0, 0x0ecd, %pstate |
| 10125 | .word 0xe48008a0 ! 146: LDUWA_R lduwa [%r0, %r0] 0x45, %r18 |
| 10126 | trapasi_4_101: |
| 10127 | nop |
| 10128 | mov 0x3f8, %r1 ! (VA for ASI 0x25) |
| 10129 | .word 0xe4c044a0 ! 147: LDSWA_R ldswa [%r1, %r0] 0x25, %r18 |
| 10130 | ibp_4_102: |
| 10131 | nop |
| 10132 | ta T_CHANGE_HPRIV |
| 10133 | mov 8, %r18 |
| 10134 | rd %asi, %r12 |
| 10135 | wr %r0, 0x41, %asi |
| 10136 | set sync_thr_counter4, %r23 |
| 10137 | #ifndef SPC |
| 10138 | ldxa [%g0]0x63, %r8 |
| 10139 | and %r8, 0x38, %r8 ! Core ID |
| 10140 | add %r8, %r23, %r23 |
| 10141 | #else |
| 10142 | mov 0, %r8 |
| 10143 | #endif |
| 10144 | mov 0x4, %r16 |
| 10145 | ibp_startwait4_102: |
| 10146 | cas [%r23],%g0,%r16 !lock |
| 10147 | brz,a %r16, continue_ibp_4_102 |
| 10148 | mov (~0x4&0xf), %r16 |
| 10149 | ld [%r23], %r16 |
| 10150 | ibp_wait4_102: |
| 10151 | brnz %r16, ibp_wait4_102 |
| 10152 | ld [%r23], %r16 |
| 10153 | ba ibp_startwait4_102 |
| 10154 | mov 0x4, %r16 |
| 10155 | continue_ibp_4_102: |
| 10156 | sllx %r16, %r8, %r16 !Mask for my core only |
| 10157 | ldxa [0x58]%asi, %r17 !Running_status |
| 10158 | wait_for_stat_4_102: |
| 10159 | ldxa [0x50]%asi, %r13 !Running_rw |
| 10160 | cmp %r13, %r17 |
| 10161 | bne,a %xcc, wait_for_stat_4_102 |
| 10162 | ldxa [0x58]%asi, %r17 !Running_status |
| 10163 | stxa %r16, [0x68]%asi !Park (W1C) |
| 10164 | ldxa [0x50]%asi, %r14 !Running_rw |
| 10165 | wait_for_ibp_4_102: |
| 10166 | ldxa [0x58]%asi, %r17 !Running_status |
| 10167 | cmp %r14, %r17 |
| 10168 | bne,a %xcc, wait_for_ibp_4_102 |
| 10169 | ldxa [0x50]%asi, %r14 !Running_rw |
| 10170 | ibp_doit4_102: |
| 10171 | best_set_reg(0x0000004096d7716c,%r19, %r20) |
| 10172 | stxa %r20, [%r18]0x42 |
| 10173 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 10174 | st %g0, [%r23] !clear lock |
| 10175 | wr %r0, %r12, %asi !restore %asi |
| 10176 | .word 0xe53fc012 ! 148: STDF_R std %f18, [%r18, %r31] |
| 10177 | setx 0x0de0e0928b047e0e, %r1, %r28 |
| 10178 | stxa %r28, [%g0] 0x73 |
| 10179 | intvec_4_103: |
| 10180 | .word 0x39400001 ! 149: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 10181 | mondo_4_104: |
| 10182 | nop |
| 10183 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 10184 | stxa %r18, [%r0+0x3d0] %asi |
| 10185 | .word 0x9d92c00c ! 150: WRPR_WSTATE_R wrpr %r11, %r12, %wstate |
| 10186 | setx 0x1ca7f817b2317c90, %r1, %r28 |
| 10187 | stxa %r28, [%g0] 0x73 |
| 10188 | intvec_4_105: |
| 10189 | .word 0x39400001 ! 151: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 10190 | ibp_4_106: |
| 10191 | nop |
| 10192 | ta T_CHANGE_HPRIV |
| 10193 | mov 8, %r18 |
| 10194 | rd %asi, %r12 |
| 10195 | wr %r0, 0x41, %asi |
| 10196 | set sync_thr_counter4, %r23 |
| 10197 | #ifndef SPC |
| 10198 | ldxa [%g0]0x63, %r8 |
| 10199 | and %r8, 0x38, %r8 ! Core ID |
| 10200 | add %r8, %r23, %r23 |
| 10201 | #else |
| 10202 | mov 0, %r8 |
| 10203 | #endif |
| 10204 | mov 0x4, %r16 |
| 10205 | ibp_startwait4_106: |
| 10206 | cas [%r23],%g0,%r16 !lock |
| 10207 | brz,a %r16, continue_ibp_4_106 |
| 10208 | mov (~0x4&0xf), %r16 |
| 10209 | ld [%r23], %r16 |
| 10210 | ibp_wait4_106: |
| 10211 | brnz %r16, ibp_wait4_106 |
| 10212 | ld [%r23], %r16 |
| 10213 | ba ibp_startwait4_106 |
| 10214 | mov 0x4, %r16 |
| 10215 | continue_ibp_4_106: |
| 10216 | sllx %r16, %r8, %r16 !Mask for my core only |
| 10217 | ldxa [0x58]%asi, %r17 !Running_status |
| 10218 | wait_for_stat_4_106: |
| 10219 | ldxa [0x50]%asi, %r13 !Running_rw |
| 10220 | cmp %r13, %r17 |
| 10221 | bne,a %xcc, wait_for_stat_4_106 |
| 10222 | ldxa [0x58]%asi, %r17 !Running_status |
| 10223 | stxa %r16, [0x68]%asi !Park (W1C) |
| 10224 | ldxa [0x50]%asi, %r14 !Running_rw |
| 10225 | wait_for_ibp_4_106: |
| 10226 | ldxa [0x58]%asi, %r17 !Running_status |
| 10227 | cmp %r14, %r17 |
| 10228 | bne,a %xcc, wait_for_ibp_4_106 |
| 10229 | ldxa [0x50]%asi, %r14 !Running_rw |
| 10230 | ibp_doit4_106: |
| 10231 | best_set_reg(0x00000040cff16c91,%r19, %r20) |
| 10232 | stxa %r20, [%r18]0x42 |
| 10233 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 10234 | st %g0, [%r23] !clear lock |
| 10235 | wr %r0, %r12, %asi !restore %asi |
| 10236 | .word 0x9f802000 ! 152: SIR sir 0x0000 |
| 10237 | trapasi_4_107: |
| 10238 | nop |
| 10239 | mov 0x0, %r1 ! (VA for ASI 0x72) |
| 10240 | .word 0xe4c84e40 ! 153: LDSBA_R ldsba [%r1, %r0] 0x72, %r18 |
| 10241 | .word 0xe43fc010 ! 1: STD_R std %r18, [%r31 + %r16] |
| 10242 | .word 0x9f802240 ! 154: SIR sir 0x0240 |
| 10243 | splash_cmpr_4_108: |
| 10244 | mov 1, %r18 |
| 10245 | sllx %r18, 63, %r18 |
| 10246 | rd %tick, %r17 |
| 10247 | add %r17, 0x50, %r17 |
| 10248 | or %r17, %r18, %r17 |
| 10249 | .word 0xb3800011 ! 155: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 10250 | intveclr_4_109: |
| 10251 | nop |
| 10252 | ta T_CHANGE_HPRIV |
| 10253 | setx 0xc59d562d5c48342f, %r1, %r28 |
| 10254 | stxa %r28, [%g0] 0x72 |
| 10255 | ta T_CHANGE_NONHPRIV |
| 10256 | .word 0x25400001 ! 156: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 10257 | ibp_4_110: |
| 10258 | nop |
| 10259 | ta T_CHANGE_HPRIV |
| 10260 | mov 8, %r18 |
| 10261 | rd %asi, %r12 |
| 10262 | wr %r0, 0x41, %asi |
| 10263 | set sync_thr_counter4, %r23 |
| 10264 | #ifndef SPC |
| 10265 | ldxa [%g0]0x63, %r8 |
| 10266 | and %r8, 0x38, %r8 ! Core ID |
| 10267 | add %r8, %r23, %r23 |
| 10268 | #else |
| 10269 | mov 0, %r8 |
| 10270 | #endif |
| 10271 | mov 0x4, %r16 |
| 10272 | ibp_startwait4_110: |
| 10273 | cas [%r23],%g0,%r16 !lock |
| 10274 | brz,a %r16, continue_ibp_4_110 |
| 10275 | mov (~0x4&0xf), %r16 |
| 10276 | ld [%r23], %r16 |
| 10277 | ibp_wait4_110: |
| 10278 | brnz %r16, ibp_wait4_110 |
| 10279 | ld [%r23], %r16 |
| 10280 | ba ibp_startwait4_110 |
| 10281 | mov 0x4, %r16 |
| 10282 | continue_ibp_4_110: |
| 10283 | sllx %r16, %r8, %r16 !Mask for my core only |
| 10284 | ldxa [0x58]%asi, %r17 !Running_status |
| 10285 | wait_for_stat_4_110: |
| 10286 | ldxa [0x50]%asi, %r13 !Running_rw |
| 10287 | cmp %r13, %r17 |
| 10288 | bne,a %xcc, wait_for_stat_4_110 |
| 10289 | ldxa [0x58]%asi, %r17 !Running_status |
| 10290 | stxa %r16, [0x68]%asi !Park (W1C) |
| 10291 | ldxa [0x50]%asi, %r14 !Running_rw |
| 10292 | wait_for_ibp_4_110: |
| 10293 | ldxa [0x58]%asi, %r17 !Running_status |
| 10294 | cmp %r14, %r17 |
| 10295 | bne,a %xcc, wait_for_ibp_4_110 |
| 10296 | ldxa [0x50]%asi, %r14 !Running_rw |
| 10297 | ibp_doit4_110: |
| 10298 | best_set_reg(0x00000040e5ec9107,%r19, %r20) |
| 10299 | stxa %r20, [%r18]0x42 |
| 10300 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 10301 | st %g0, [%r23] !clear lock |
| 10302 | wr %r0, %r12, %asi !restore %asi |
| 10303 | .word 0xa9a4c9a2 ! 157: FDIVs fdivs %f19, %f2, %f20 |
| 10304 | .word 0xc32fc000 ! 158: STXFSR_R st-sfr %f1, [%r0, %r31] |
| 10305 | .word 0xc19fe140 ! 159: LDDFA_I ldda [%r31, 0x0140], %f0 |
| 10306 | .word 0xa3702140 ! 1: POPC_I popc 0x0140, %r17 |
| 10307 | .word 0x9f802d6e ! 160: SIR sir 0x0d6e |
| 10308 | splash_hpstate_4_112: |
| 10309 | .word 0x37400001 ! 1: FBPGE fbge,a,pn %fcc0, <label_0x1> |
| 10310 | .word 0x819829d1 ! 161: WRHPR_HPSTATE_I wrhpr %r0, 0x09d1, %hpstate |
| 10311 | .word 0xe327e18c ! 162: STF_I st %f17, [0x018c, %r31] |
| 10312 | .word 0x93d02033 ! 163: Tcc_I tne icc_or_xcc, %r0 + 51 |
| 10313 | mondo_4_113: |
| 10314 | nop |
| 10315 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 10316 | stxa %r7, [%r0+0x3d8] %asi |
| 10317 | .word 0x9d924004 ! 164: WRPR_WSTATE_R wrpr %r9, %r4, %wstate |
| 10318 | br_badelay2_4_114: |
| 10319 | .word 0x20800001 ! 1: BN bn,a <label_0x1> |
| 10320 | allclean |
| 10321 | .word 0x93b14310 ! 165: ALIGNADDRESS alignaddr %r5, %r16, %r9 |
| 10322 | fpinit_4_115: |
| 10323 | nop |
| 10324 | setx fp_data_quads, %r19, %r20 |
| 10325 | ldd [%r20], %f0 |
| 10326 | ldd [%r20+8], %f4 |
| 10327 | ld [%r20+16], %fsr |
| 10328 | ld [%r20+24], %r19 |
| 10329 | wr %r19, %g0, %gsr |
| 10330 | .word 0xc3e826bd ! 166: PREFETCHA_I prefetcha [%r0, + 0x06bd] %asi, #one_read |
| 10331 | set 0x2973, %l3 |
| 10332 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT |
| 10333 | .word 0xa1b407cd ! 167: PDIST pdistn %d16, %d44, %d16 |
| 10334 | memptr_4_116: |
| 10335 | set 0x60740000, %r31 |
| 10336 | .word 0x8584b6ed ! 168: WRCCR_I wr %r18, 0x16ed, %ccr |
| 10337 | .word 0xd4c7e1a8 ! 169: LDSWA_I ldswa [%r31, + 0x01a8] %asi, %r10 |
| 10338 | setx 0x5b5e86ca903bd7bd, %r1, %r28 |
| 10339 | stxa %r28, [%g0] 0x73 |
| 10340 | intvec_4_117: |
| 10341 | .word 0x39400001 ! 170: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 10342 | splash_hpstate_4_118: |
| 10343 | .word 0x81982a1a ! 171: WRHPR_HPSTATE_I wrhpr %r0, 0x0a1a, %hpstate |
| 10344 | mondo_4_119: |
| 10345 | nop |
| 10346 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 10347 | ta T_CHANGE_PRIV |
| 10348 | stxa %r17, [%r0+0x3e0] %asi |
| 10349 | .word 0x9d950012 ! 172: WRPR_WSTATE_R wrpr %r20, %r18, %wstate |
| 10350 | nop |
| 10351 | ta T_CHANGE_HPRIV |
| 10352 | mov 0x4+1, %r10 |
| 10353 | set sync_thr_counter5, %r23 |
| 10354 | #ifndef SPC |
| 10355 | ldxa [%g0]0x63, %o1 |
| 10356 | and %o1, 0x38, %o1 |
| 10357 | add %o1, %r23, %r23 |
| 10358 | sllx %o1, 5, %o3 !(CID*256) |
| 10359 | #endif |
| 10360 | cas [%r23],%g0,%r10 !lock |
| 10361 | brnz %r10, cwq_4_120 |
| 10362 | rd %asi, %r12 |
| 10363 | wr %g0, 0x40, %asi |
| 10364 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 10365 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 10366 | cmp %l1, 1 |
| 10367 | bne cwq_4_120 |
| 10368 | set CWQ_BASE, %l6 |
| 10369 | #ifndef SPC |
| 10370 | add %l6, %o3, %l6 |
| 10371 | #endif |
| 10372 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 10373 | best_set_reg(0x20610070, %l1, %l2) !# Control Word |
| 10374 | sllx %l2, 32, %l2 |
| 10375 | stx %l2, [%l6 + 0x0] |
| 10376 | membar #Sync |
| 10377 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 10378 | sub %l2, 0x40, %l2 |
| 10379 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 10380 | wr %r12, %g0, %asi |
| 10381 | st %g0, [%r23] |
| 10382 | cwq_4_120: |
| 10383 | ta T_CHANGE_NONHPRIV |
| 10384 | .word 0x93414000 ! 173: RDPC rd %pc, %r9 |
| 10385 | ibp_4_121: |
| 10386 | nop |
| 10387 | ta T_CHANGE_HPRIV |
| 10388 | mov 8, %r18 |
| 10389 | rd %asi, %r12 |
| 10390 | wr %r0, 0x41, %asi |
| 10391 | set sync_thr_counter4, %r23 |
| 10392 | #ifndef SPC |
| 10393 | ldxa [%g0]0x63, %r8 |
| 10394 | and %r8, 0x38, %r8 ! Core ID |
| 10395 | add %r8, %r23, %r23 |
| 10396 | #else |
| 10397 | mov 0, %r8 |
| 10398 | #endif |
| 10399 | mov 0x4, %r16 |
| 10400 | ibp_startwait4_121: |
| 10401 | cas [%r23],%g0,%r16 !lock |
| 10402 | brz,a %r16, continue_ibp_4_121 |
| 10403 | mov (~0x4&0xf), %r16 |
| 10404 | ld [%r23], %r16 |
| 10405 | ibp_wait4_121: |
| 10406 | brnz %r16, ibp_wait4_121 |
| 10407 | ld [%r23], %r16 |
| 10408 | ba ibp_startwait4_121 |
| 10409 | mov 0x4, %r16 |
| 10410 | continue_ibp_4_121: |
| 10411 | sllx %r16, %r8, %r16 !Mask for my core only |
| 10412 | ldxa [0x58]%asi, %r17 !Running_status |
| 10413 | wait_for_stat_4_121: |
| 10414 | ldxa [0x50]%asi, %r13 !Running_rw |
| 10415 | cmp %r13, %r17 |
| 10416 | bne,a %xcc, wait_for_stat_4_121 |
| 10417 | ldxa [0x58]%asi, %r17 !Running_status |
| 10418 | stxa %r16, [0x68]%asi !Park (W1C) |
| 10419 | ldxa [0x50]%asi, %r14 !Running_rw |
| 10420 | wait_for_ibp_4_121: |
| 10421 | ldxa [0x58]%asi, %r17 !Running_status |
| 10422 | cmp %r14, %r17 |
| 10423 | bne,a %xcc, wait_for_ibp_4_121 |
| 10424 | ldxa [0x50]%asi, %r14 !Running_rw |
| 10425 | ibp_doit4_121: |
| 10426 | best_set_reg(0x00000050ebd1076f,%r19, %r20) |
| 10427 | stxa %r20, [%r18]0x42 |
| 10428 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 10429 | st %g0, [%r23] !clear lock |
| 10430 | wr %r0, %r12, %asi !restore %asi |
| 10431 | ta T_CHANGE_NONHPRIV |
| 10432 | .word 0xe1bfdf20 ! 174: STDFA_R stda %f16, [%r0, %r31] |
| 10433 | .word 0xd48008a0 ! 175: LDUWA_R lduwa [%r0, %r0] 0x45, %r10 |
| 10434 | .word 0x8d802000 ! 176: WRFPRS_I wr %r0, 0x0000, %fprs |
| 10435 | #if (defined SPC || defined CMP1) |
| 10436 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_122) + 24, 16, 16)) -> intp(6,0,21) |
| 10437 | #else |
| 10438 | setx 0x6df48179af66c99c, %r1, %r28 |
| 10439 | stxa %r28, [%g0] 0x73 |
| 10440 | #endif |
| 10441 | intvec_4_122: |
| 10442 | .word 0x39400001 ! 177: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 10443 | setx 0x3cd433deb98b3ae9, %r1, %r28 |
| 10444 | stxa %r28, [%g0] 0x73 |
| 10445 | intvec_4_123: |
| 10446 | .word 0x39400001 ! 178: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 10447 | .word 0x83d02033 ! 179: Tcc_I te icc_or_xcc, %r0 + 51 |
| 10448 | #if (defined SPC || defined CMP1) |
| 10449 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_4_124) + 16, 16, 16)) -> intp(1,0,25) |
| 10450 | #else |
| 10451 | setx 0x5da70636cfb0813a, %r1, %r28 |
| 10452 | stxa %r28, [%g0] 0x73 |
| 10453 | #endif |
| 10454 | intvec_4_124: |
| 10455 | .word 0x39400001 ! 180: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 10456 | fpinit_4_125: |
| 10457 | nop |
| 10458 | setx fp_data_quads, %r19, %r20 |
| 10459 | ldd [%r20], %f0 |
| 10460 | ldd [%r20+8], %f4 |
| 10461 | ld [%r20+16], %fsr |
| 10462 | ld [%r20+24], %r19 |
| 10463 | wr %r19, %g0, %gsr |
| 10464 | .word 0x87a80a44 ! 181: FCMPd fcmpd %fcc<n>, %f0, %f4 |
| 10465 | splash_tba_4_126: |
| 10466 | nop |
| 10467 | ta T_CHANGE_PRIV |
| 10468 | setx 0x0000000400380000, %r11, %r12 |
| 10469 | .word 0x8b90000c ! 182: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 10470 | fpinit_4_127: |
| 10471 | nop |
| 10472 | setx fp_data_quads, %r19, %r20 |
| 10473 | ldd [%r20], %f0 |
| 10474 | ldd [%r20+8], %f4 |
| 10475 | ld [%r20+16], %fsr |
| 10476 | ld [%r20+24], %r19 |
| 10477 | wr %r19, %g0, %gsr |
| 10478 | .word 0x91a009c4 ! 183: FDIVd fdivd %f0, %f4, %f8 |
| 10479 | .word 0xd4dfe150 ! 184: LDXA_I ldxa [%r31, + 0x0150] %asi, %r10 |
| 10480 | nop |
| 10481 | ta T_CHANGE_HPRIV |
| 10482 | mov 0x4+1, %r10 |
| 10483 | set sync_thr_counter5, %r23 |
| 10484 | #ifndef SPC |
| 10485 | ldxa [%g0]0x63, %o1 |
| 10486 | and %o1, 0x38, %o1 |
| 10487 | add %o1, %r23, %r23 |
| 10488 | sllx %o1, 5, %o3 !(CID*256) |
| 10489 | #endif |
| 10490 | cas [%r23],%g0,%r10 !lock |
| 10491 | brnz %r10, cwq_4_128 |
| 10492 | rd %asi, %r12 |
| 10493 | wr %g0, 0x40, %asi |
| 10494 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 10495 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 10496 | cmp %l1, 1 |
| 10497 | bne cwq_4_128 |
| 10498 | set CWQ_BASE, %l6 |
| 10499 | #ifndef SPC |
| 10500 | add %l6, %o3, %l6 |
| 10501 | #endif |
| 10502 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 10503 | best_set_reg(0x206100d0, %l1, %l2) !# Control Word |
| 10504 | sllx %l2, 32, %l2 |
| 10505 | stx %l2, [%l6 + 0x0] |
| 10506 | membar #Sync |
| 10507 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 10508 | sub %l2, 0x40, %l2 |
| 10509 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 10510 | wr %r12, %g0, %asi |
| 10511 | st %g0, [%r23] |
| 10512 | cwq_4_128: |
| 10513 | ta T_CHANGE_NONHPRIV |
| 10514 | .word 0x99414000 ! 185: RDPC rd %pc, %r12 |
| 10515 | intveclr_4_129: |
| 10516 | nop |
| 10517 | ta T_CHANGE_HPRIV |
| 10518 | setx 0x990f801b5f6c9196, %r1, %r28 |
| 10519 | stxa %r28, [%g0] 0x72 |
| 10520 | ta T_CHANGE_NONHPRIV |
| 10521 | .word 0x25400001 ! 186: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 10522 | memptr_4_130: |
| 10523 | set 0x60740000, %r31 |
| 10524 | .word 0x8582397e ! 187: WRCCR_I wr %r8, 0x197e, %ccr |
| 10525 | .word 0x9194000c ! 188: WRPR_PIL_R wrpr %r16, %r12, %pil |
| 10526 | .word 0x99a00170 ! 189: FABSq dis not found |
| 10527 | |
| 10528 | .word 0xe8800b60 ! 190: LDUWA_R lduwa [%r0, %r0] 0x5b, %r20 |
| 10529 | .word 0x81580000 ! 191: FLUSHW flushw |
| 10530 | splash_cmpr_4_133: |
| 10531 | mov 0, %r18 |
| 10532 | sllx %r18, 63, %r18 |
| 10533 | rd %tick, %r17 |
| 10534 | add %r17, 0x60, %r17 |
| 10535 | or %r17, %r18, %r17 |
| 10536 | ta T_CHANGE_PRIV |
| 10537 | .word 0xb3800011 ! 192: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 10538 | .word 0xe877c000 ! 193: STX_R stx %r20, [%r31 + %r0] |
| 10539 | ceter_4_134: |
| 10540 | nop |
| 10541 | ta T_CHANGE_HPRIV |
| 10542 | mov 7, %r17 |
| 10543 | sllx %r17, 60, %r17 |
| 10544 | mov 0x18, %r16 |
| 10545 | stxa %r17, [%r16]0x4c |
| 10546 | ta T_CHANGE_NONHPRIV |
| 10547 | .word 0xa5410000 ! 194: RDTICK rd %tick, %r18 |
| 10548 | .word 0x8d802000 ! 195: WRFPRS_I wr %r0, 0x0000, %fprs |
| 10549 | .word 0x93520000 ! 196: RDPR_PIL <illegal instruction> |
| 10550 | setx 0x31734a548f0a9534, %r1, %r28 |
| 10551 | stxa %r28, [%g0] 0x73 |
| 10552 | intvec_4_135: |
| 10553 | .word 0x39400001 ! 197: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 10554 | .word 0xd727e1e8 ! 198: STF_I st %f11, [0x01e8, %r31] |
| 10555 | ibp_4_136: |
| 10556 | nop |
| 10557 | ta T_CHANGE_HPRIV |
| 10558 | mov 8, %r18 |
| 10559 | rd %asi, %r12 |
| 10560 | wr %r0, 0x41, %asi |
| 10561 | set sync_thr_counter4, %r23 |
| 10562 | #ifndef SPC |
| 10563 | ldxa [%g0]0x63, %r8 |
| 10564 | and %r8, 0x38, %r8 ! Core ID |
| 10565 | add %r8, %r23, %r23 |
| 10566 | #else |
| 10567 | mov 0, %r8 |
| 10568 | #endif |
| 10569 | mov 0x4, %r16 |
| 10570 | ibp_startwait4_136: |
| 10571 | cas [%r23],%g0,%r16 !lock |
| 10572 | brz,a %r16, continue_ibp_4_136 |
| 10573 | mov (~0x4&0xf), %r16 |
| 10574 | ld [%r23], %r16 |
| 10575 | ibp_wait4_136: |
| 10576 | brnz %r16, ibp_wait4_136 |
| 10577 | ld [%r23], %r16 |
| 10578 | ba ibp_startwait4_136 |
| 10579 | mov 0x4, %r16 |
| 10580 | continue_ibp_4_136: |
| 10581 | sllx %r16, %r8, %r16 !Mask for my core only |
| 10582 | ldxa [0x58]%asi, %r17 !Running_status |
| 10583 | wait_for_stat_4_136: |
| 10584 | ldxa [0x50]%asi, %r13 !Running_rw |
| 10585 | cmp %r13, %r17 |
| 10586 | bne,a %xcc, wait_for_stat_4_136 |
| 10587 | ldxa [0x58]%asi, %r17 !Running_status |
| 10588 | stxa %r16, [0x68]%asi !Park (W1C) |
| 10589 | ldxa [0x50]%asi, %r14 !Running_rw |
| 10590 | wait_for_ibp_4_136: |
| 10591 | ldxa [0x58]%asi, %r17 !Running_status |
| 10592 | cmp %r14, %r17 |
| 10593 | bne,a %xcc, wait_for_ibp_4_136 |
| 10594 | ldxa [0x50]%asi, %r14 !Running_rw |
| 10595 | ibp_doit4_136: |
| 10596 | best_set_reg(0x00000040e1c76fec,%r19, %r20) |
| 10597 | stxa %r20, [%r18]0x42 |
| 10598 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 10599 | st %g0, [%r23] !clear lock |
| 10600 | wr %r0, %r12, %asi !restore %asi |
| 10601 | .word 0xc19fdb60 ! 199: LDDFA_R ldda [%r31, %r0], %f0 |
| 10602 | ibp_4_137: |
| 10603 | nop |
| 10604 | ta T_CHANGE_HPRIV |
| 10605 | mov 8, %r18 |
| 10606 | rd %asi, %r12 |
| 10607 | wr %r0, 0x41, %asi |
| 10608 | set sync_thr_counter4, %r23 |
| 10609 | #ifndef SPC |
| 10610 | ldxa [%g0]0x63, %r8 |
| 10611 | and %r8, 0x38, %r8 ! Core ID |
| 10612 | add %r8, %r23, %r23 |
| 10613 | #else |
| 10614 | mov 0, %r8 |
| 10615 | #endif |
| 10616 | mov 0x4, %r16 |
| 10617 | ibp_startwait4_137: |
| 10618 | cas [%r23],%g0,%r16 !lock |
| 10619 | brz,a %r16, continue_ibp_4_137 |
| 10620 | mov (~0x4&0xf), %r16 |
| 10621 | ld [%r23], %r16 |
| 10622 | ibp_wait4_137: |
| 10623 | brnz %r16, ibp_wait4_137 |
| 10624 | ld [%r23], %r16 |
| 10625 | ba ibp_startwait4_137 |
| 10626 | mov 0x4, %r16 |
| 10627 | continue_ibp_4_137: |
| 10628 | sllx %r16, %r8, %r16 !Mask for my core only |
| 10629 | ldxa [0x58]%asi, %r17 !Running_status |
| 10630 | wait_for_stat_4_137: |
| 10631 | ldxa [0x50]%asi, %r13 !Running_rw |
| 10632 | cmp %r13, %r17 |
| 10633 | bne,a %xcc, wait_for_stat_4_137 |
| 10634 | ldxa [0x58]%asi, %r17 !Running_status |
| 10635 | stxa %r16, [0x68]%asi !Park (W1C) |
| 10636 | ldxa [0x50]%asi, %r14 !Running_rw |
| 10637 | wait_for_ibp_4_137: |
| 10638 | ldxa [0x58]%asi, %r17 !Running_status |
| 10639 | cmp %r14, %r17 |
| 10640 | bne,a %xcc, wait_for_ibp_4_137 |
| 10641 | ldxa [0x50]%asi, %r14 !Running_rw |
| 10642 | ibp_doit4_137: |
| 10643 | best_set_reg(0x0000004088efecf4,%r19, %r20) |
| 10644 | stxa %r20, [%r18]0x42 |
| 10645 | stxa %r16, [0x60] %asi !Unpark (W1S) |
| 10646 | st %g0, [%r23] !clear lock |
| 10647 | wr %r0, %r12, %asi !restore %asi |
| 10648 | ta T_CHANGE_NONHPRIV |
| 10649 | .word 0xd6bfc032 ! 200: STDA_R stda %r11, [%r31 + %r18] 0x01 |
| 10650 | .word 0x89800011 ! 201: WRTICK_R wr %r0, %r17, %tick |
| 10651 | nop |
| 10652 | nop |
| 10653 | ta T_CHANGE_PRIV |
| 10654 | wrpr %g0, %g0, %gl |
| 10655 | nop |
| 10656 | nop |
| 10657 | setx join_lbl_0_0, %g1, %g2 |
| 10658 | jmp %g2 |
| 10659 | nop |
| 10660 | fork_lbl_0_2: |
| 10661 | ta T_CHANGE_NONHPRIV |
| 10662 | vahole_2_0: |
| 10663 | nop |
| 10664 | ta T_CHANGE_NONHPRIV |
| 10665 | setx vahole_target1, %r18, %r27 |
| 10666 | jmpl %r27+0, %r27 |
| 10667 | cwp_2_1: |
| 10668 | set user_data_start, %o7 |
| 10669 | .word 0x93902003 ! 1: WRPR_CWP_I wrpr %r0, 0x0003, %cwp |
| 10670 | pmu_2_2: |
| 10671 | nop |
| 10672 | ta T_CHANGE_PRIV |
| 10673 | setx 0xfffff0c4fffff39c, %g1, %g7 |
| 10674 | .word 0xa3800007 ! 2: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 10675 | .word 0xd337c000 ! 3: STQF_R - %f9, [%r0, %r31] |
| 10676 | fpinit_2_3: |
| 10677 | nop |
| 10678 | setx fp_data_quads, %r19, %r20 |
| 10679 | ldd [%r20], %f0 |
| 10680 | ldd [%r20+8], %f4 |
| 10681 | ld [%r20+16], %fsr |
| 10682 | ld [%r20+24], %r19 |
| 10683 | wr %r19, %g0, %gsr |
| 10684 | .word 0x8da009a4 ! 4: FDIVs fdivs %f0, %f4, %f6 |
| 10685 | .word 0x8d802004 ! 5: WRFPRS_I wr %r0, 0x0004, %fprs |
| 10686 | .word 0x30800001 ! 1: BA ba,a <label_0x1> |
| 10687 | .word 0x8d9023f9 ! 6: WRPR_PSTATE_I wrpr %r0, 0x03f9, %pstate |
| 10688 | brcommon1_2_5: |
| 10689 | nop |
| 10690 | setx common_target, %r12, %r27 |
| 10691 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 10692 | ba,a .+12 |
| 10693 | .word 0x93a7c9c9 ! 1: FDIVd fdivd %f62, %f40, %f40 |
| 10694 | ba,a .+8 |
| 10695 | jmpl %r27+0, %r27 |
| 10696 | .word 0xa3b4c7c1 ! 7: PDIST pdistn %d50, %d32, %d48 |
| 10697 | .word 0xe277e0b2 ! 8: STX_I stx %r17, [%r31 + 0x00b2] |
| 10698 | ibp_2_6: |
| 10699 | nop |
| 10700 | .word 0xe33fc00d ! 9: STDF_R std %f17, [%r13, %r31] |
| 10701 | .word 0xa3520000 ! 10: RDPR_PIL <illegal instruction> |
| 10702 | .word 0x26cc8001 ! 1: BRLZ brlz,a,pt %r18,<label_0xc8001> |
| 10703 | .word 0x8d903047 ! 11: WRPR_PSTATE_I wrpr %r0, 0x1047, %pstate |
| 10704 | .word 0xe537c000 ! 12: STQF_R - %f18, [%r0, %r31] |
| 10705 | .word 0xe48008a0 ! 13: LDUWA_R lduwa [%r0, %r0] 0x45, %r18 |
| 10706 | .word 0xa5520000 ! 14: RDPR_PIL <illegal instruction> |
| 10707 | mondo_2_8: |
| 10708 | nop |
| 10709 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 10710 | ta T_CHANGE_PRIV |
| 10711 | stxa %r18, [%r0+0x3c8] %asi |
| 10712 | .word 0x9d91c013 ! 15: WRPR_WSTATE_R wrpr %r7, %r19, %wstate |
| 10713 | jmptr_2_9: |
| 10714 | nop |
| 10715 | best_set_reg(0xe1a00000, %r20, %r27) |
| 10716 | .word 0xb7c6c000 ! 16: JMPL_R jmpl %r27 + %r0, %r27 |
| 10717 | #if (defined SPC || defined CMP1) |
| 10718 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_10) + 48, 16, 16)) -> intp(7,0,7) |
| 10719 | #else |
| 10720 | setx 0x55012eb10ac6e415, %r1, %r28 |
| 10721 | stxa %r28, [%g0] 0x73 |
| 10722 | #endif |
| 10723 | intvec_2_10: |
| 10724 | .word 0x39400001 ! 17: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 10725 | nop |
| 10726 | ta T_CHANGE_HPRIV ! macro |
| 10727 | donret_2_11: |
| 10728 | rd %pc, %r12 |
| 10729 | add %r12, (donretarg_2_11-donret_2_11+4), %r12 |
| 10730 | add %r12, 0x4, %r11 ! seq tnpc |
| 10731 | wrpr %g0, 0x1, %tl |
| 10732 | wrpr %g0, %r12, %tpc |
| 10733 | wrpr %g0, %r11, %tnpc |
| 10734 | set (0x00507300 | (32 << 24)), %r13 |
| 10735 | and %r12, 0xfff, %r14 |
| 10736 | sllx %r14, 30, %r14 |
| 10737 | or %r13, %r14, %r20 |
| 10738 | wrpr %r20, %g0, %tstate |
| 10739 | wrhpr %g0, 0x148e, %htstate |
| 10740 | ta T_CHANGE_NONPRIV ! rand=0 (2) |
| 10741 | .word 0x22cb0001 ! 1: BRZ brz,a,pt %r12,<label_0xb0001> |
| 10742 | done |
| 10743 | donretarg_2_11: |
| 10744 | .word 0xd8ffe1f7 ! 18: SWAPA_I swapa %r12, [%r31 + 0x01f7] %asi |
| 10745 | splash_hpstate_2_12: |
| 10746 | .word 0x819827d5 ! 19: WRHPR_HPSTATE_I wrhpr %r0, 0x07d5, %hpstate |
| 10747 | .word 0xab85000a ! 20: WR_CLEAR_SOFTINT_R wr %r20, %r10, %clear_softint |
| 10748 | splash_cmpr_2_13: |
| 10749 | mov 0, %r18 |
| 10750 | sllx %r18, 63, %r18 |
| 10751 | rd %tick, %r17 |
| 10752 | add %r17, 0x70, %r17 |
| 10753 | or %r17, %r18, %r17 |
| 10754 | ta T_CHANGE_HPRIV |
| 10755 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 10756 | ta T_CHANGE_PRIV |
| 10757 | .word 0xaf800011 ! 21: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 10758 | trapasi_2_14: |
| 10759 | nop |
| 10760 | mov 0x28, %r1 ! (VA for ASI 0x4c) |
| 10761 | .word 0xd8c04980 ! 22: LDSWA_R ldswa [%r1, %r0] 0x4c, %r12 |
| 10762 | .word 0xd8c7e1c8 ! 23: LDSWA_I ldswa [%r31, + 0x01c8] %asi, %r12 |
| 10763 | .word 0x8d90295f ! 24: WRPR_PSTATE_I wrpr %r0, 0x095f, %pstate |
| 10764 | nop |
| 10765 | ta T_CHANGE_HPRIV |
| 10766 | mov 0x2, %r10 |
| 10767 | set sync_thr_counter6, %r23 |
| 10768 | #ifndef SPC |
| 10769 | ldxa [%g0]0x63, %o1 |
| 10770 | and %o1, 0x38, %o1 |
| 10771 | add %o1, %r23, %r23 |
| 10772 | #endif |
| 10773 | cas [%r23],%g0,%r10 !lock |
| 10774 | brnz %r10, sma_2_16 |
| 10775 | rd %asi, %r12 |
| 10776 | wr %g0, 0x40, %asi |
| 10777 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 10778 | set 0x001a1fff, %g1 |
| 10779 | stxa %g1, [%g0 + 0x80] %asi |
| 10780 | wr %r12, %g0, %asi |
| 10781 | st %g0, [%r23] |
| 10782 | sma_2_16: |
| 10783 | ta T_CHANGE_NONHPRIV |
| 10784 | .word 0xd9e7e009 ! 25: CASA_R casa [%r31] %asi, %r9, %r12 |
| 10785 | brcommon3_2_17: |
| 10786 | nop |
| 10787 | setx common_target, %r12, %r27 |
| 10788 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 10789 | ba,a .+12 |
| 10790 | .word 0xd937c011 ! 1: STQF_R - %f12, [%r17, %r31] |
| 10791 | ba,a .+8 |
| 10792 | jmpl %r27+0, %r27 |
| 10793 | .word 0xd9e7e008 ! 26: CASA_R casa [%r31] %asi, %r8, %r12 |
| 10794 | trapasi_2_18: |
| 10795 | nop |
| 10796 | mov 0x0, %r1 ! (VA for ASI 0x73) |
| 10797 | .word 0xd8c04e60 ! 27: LDSWA_R ldswa [%r1, %r0] 0x73, %r12 |
| 10798 | ceter_2_19: |
| 10799 | nop |
| 10800 | ta T_CHANGE_HPRIV |
| 10801 | mov 7, %r17 |
| 10802 | sllx %r17, 60, %r17 |
| 10803 | mov 0x18, %r16 |
| 10804 | stxa %r17, [%r16]0x4c |
| 10805 | ta T_CHANGE_NONHPRIV |
| 10806 | .word 0x99410000 ! 28: RDTICK rd %tick, %r12 |
| 10807 | splash_cmpr_2_20: |
| 10808 | mov 1, %r18 |
| 10809 | sllx %r18, 63, %r18 |
| 10810 | rd %tick, %r17 |
| 10811 | add %r17, 0x70, %r17 |
| 10812 | or %r17, %r18, %r17 |
| 10813 | ta T_CHANGE_HPRIV |
| 10814 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 10815 | ta T_CHANGE_PRIV |
| 10816 | .word 0xb3800011 ! 29: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 10817 | memptr_2_21: |
| 10818 | set user_data_start, %r31 |
| 10819 | .word 0x8584a881 ! 30: WRCCR_I wr %r18, 0x0881, %ccr |
| 10820 | .word 0xa8840013 ! 31: ADDcc_R addcc %r16, %r19, %r20 |
| 10821 | .word 0xc1bfe0c0 ! 32: STDFA_I stda %f0, [0x00c0, %r31] |
| 10822 | set 0x35ea, %l3 |
| 10823 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT |
| 10824 | .word 0xa9b4c7d2 ! 33: PDIST pdistn %d50, %d18, %d20 |
| 10825 | brcommon3_2_22: |
| 10826 | nop |
| 10827 | setx common_target, %r12, %r27 |
| 10828 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 10829 | ba,a .+12 |
| 10830 | .word 0xdb37e000 ! 1: STQF_I - %f13, [0x0000, %r31] |
| 10831 | ba,a .+8 |
| 10832 | jmpl %r27+0, %r27 |
| 10833 | .word 0xdabfc030 ! 34: STDA_R stda %r13, [%r31 + %r16] 0x01 |
| 10834 | .word 0xdac7e058 ! 35: LDSWA_I ldswa [%r31, + 0x0058] %asi, %r13 |
| 10835 | ibp_2_23: |
| 10836 | nop |
| 10837 | ta T_CHANGE_NONHPRIV |
| 10838 | .word 0xe19fdb60 ! 36: LDDFA_R ldda [%r31, %r0], %f16 |
| 10839 | .word 0x8d802000 ! 37: WRFPRS_I wr %r0, 0x0000, %fprs |
| 10840 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 10841 | reduce_priv_lvl_2_24: |
| 10842 | ta T_CHANGE_NONPRIV ! macro |
| 10843 | trapasi_2_25: |
| 10844 | nop |
| 10845 | mov 0x18, %r1 ! (VA for ASI 0x50) |
| 10846 | .word 0xda904a00 ! 39: LDUHA_R lduha [%r1, %r0] 0x50, %r13 |
| 10847 | brcommon1_2_26: |
| 10848 | nop |
| 10849 | setx common_target, %r12, %r27 |
| 10850 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 10851 | ba,a .+12 |
| 10852 | .word 0xc32fe050 ! 1: STXFSR_I st-sfr %f1, [0x0050, %r31] |
| 10853 | ba,a .+8 |
| 10854 | jmpl %r27+0, %r27 |
| 10855 | .word 0x9f803fe7 ! 40: SIR sir 0x1fe7 |
| 10856 | ibp_2_27: |
| 10857 | nop |
| 10858 | .word 0xd4bfc031 ! 41: STDA_R stda %r10, [%r31 + %r17] 0x01 |
| 10859 | .word 0xa3a000c5 ! 42: FNEGd fnegd %f36, %f48 |
| 10860 | nop |
| 10861 | ta T_CHANGE_HPRIV |
| 10862 | mov 0x2+1, %r10 |
| 10863 | set sync_thr_counter5, %r23 |
| 10864 | #ifndef SPC |
| 10865 | ldxa [%g0]0x63, %o1 |
| 10866 | and %o1, 0x38, %o1 |
| 10867 | add %o1, %r23, %r23 |
| 10868 | sllx %o1, 5, %o3 !(CID*256) |
| 10869 | #endif |
| 10870 | cas [%r23],%g0,%r10 !lock |
| 10871 | brnz %r10, cwq_2_28 |
| 10872 | rd %asi, %r12 |
| 10873 | wr %g0, 0x40, %asi |
| 10874 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 10875 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 10876 | cmp %l1, 1 |
| 10877 | bne cwq_2_28 |
| 10878 | set CWQ_BASE, %l6 |
| 10879 | #ifndef SPC |
| 10880 | add %l6, %o3, %l6 |
| 10881 | #endif |
| 10882 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 10883 | best_set_reg(0x206100d0, %l1, %l2) !# Control Word |
| 10884 | sllx %l2, 32, %l2 |
| 10885 | stx %l2, [%l6 + 0x0] |
| 10886 | membar #Sync |
| 10887 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 10888 | sub %l2, 0x40, %l2 |
| 10889 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 10890 | wr %r12, %g0, %asi |
| 10891 | st %g0, [%r23] |
| 10892 | cwq_2_28: |
| 10893 | ta T_CHANGE_NONHPRIV |
| 10894 | .word 0xa7414000 ! 43: RDPC rd %pc, %r19 |
| 10895 | splash_htba_2_29: |
| 10896 | nop |
| 10897 | ta T_CHANGE_HPRIV |
| 10898 | setx 0x00000002002a0000, %r11, %r12 |
| 10899 | .word 0x8b98000c ! 44: WRHPR_HTBA_R wrhpr %r0, %r12, %htba |
| 10900 | #if (defined SPC || defined CMP1) |
| 10901 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_30) + 56, 16, 16)) -> intp(3,0,3) |
| 10902 | #else |
| 10903 | setx 0x6559ae0f558bd8ba, %r1, %r28 |
| 10904 | stxa %r28, [%g0] 0x73 |
| 10905 | #endif |
| 10906 | intvec_2_30: |
| 10907 | .word 0x39400001 ! 45: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 10908 | .word 0x25400001 ! 1: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 10909 | .word 0x8d9033da ! 46: WRPR_PSTATE_I wrpr %r0, 0x13da, %pstate |
| 10910 | ibp_2_32: |
| 10911 | nop |
| 10912 | .word 0xc1bfe180 ! 47: STDFA_I stda %f0, [0x0180, %r31] |
| 10913 | .word 0xe537c000 ! 48: STQF_R - %f18, [%r0, %r31] |
| 10914 | ibp_2_33: |
| 10915 | nop |
| 10916 | ta T_CHANGE_NONHPRIV |
| 10917 | .word 0xc19fe040 ! 49: LDDFA_I ldda [%r31, 0x0040], %f0 |
| 10918 | ibp_2_34: |
| 10919 | nop |
| 10920 | ta T_CHANGE_NONHPRIV |
| 10921 | .word 0xc3ec0027 ! 50: PREFETCHA_R prefetcha [%r16, %r7] 0x01, #one_read |
| 10922 | .word 0x8d902233 ! 51: WRPR_PSTATE_I wrpr %r0, 0x0233, %pstate |
| 10923 | .word 0xe24fc000 ! 52: LDSB_R ldsb [%r31 + %r0], %r17 |
| 10924 | .word 0xe2c7e158 ! 53: LDSWA_I ldswa [%r31, + 0x0158] %asi, %r17 |
| 10925 | .word 0xe33fe040 ! 54: STDF_I std %f17, [0x0040, %r31] |
| 10926 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 10927 | reduce_priv_lvl_2_36: |
| 10928 | ta T_CHANGE_NONHPRIV ! macro |
| 10929 | intveclr_2_37: |
| 10930 | nop |
| 10931 | ta T_CHANGE_HPRIV |
| 10932 | setx 0x3595489620399264, %r1, %r28 |
| 10933 | stxa %r28, [%g0] 0x72 |
| 10934 | .word 0x25400001 ! 56: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 10935 | ibp_2_38: |
| 10936 | nop |
| 10937 | ta T_CHANGE_NONHPRIV |
| 10938 | .word 0xe2bfc034 ! 57: STDA_R stda %r17, [%r31 + %r20] 0x01 |
| 10939 | .word 0xa7524000 ! 58: RDPR_CWP <illegal instruction> |
| 10940 | ibp_2_39: |
| 10941 | nop |
| 10942 | ta T_CHANGE_NONHPRIV |
| 10943 | .word 0xc19fc3e0 ! 59: LDDFA_R ldda [%r31, %r0], %f0 |
| 10944 | mondo_2_40: |
| 10945 | nop |
| 10946 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 10947 | stxa %r19, [%r0+0x3d0] %asi |
| 10948 | .word 0x9d94800d ! 60: WRPR_WSTATE_R wrpr %r18, %r13, %wstate |
| 10949 | ibp_2_41: |
| 10950 | nop |
| 10951 | .word 0xe1bfc3e0 ! 61: STDFA_R stda %f16, [%r0, %r31] |
| 10952 | .word 0xe8dfe098 ! 62: LDXA_I ldxa [%r31, + 0x0098] %asi, %r20 |
| 10953 | .word 0x879c000b ! 63: WRHPR_HINTP_R wrhpr %r16, %r11, %hintp |
| 10954 | #if (defined SPC || defined CMP1) |
| 10955 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_42) + 0, 16, 16)) -> intp(6,0,25) |
| 10956 | #else |
| 10957 | setx 0x4a57496b1aaeacdd, %r1, %r28 |
| 10958 | stxa %r28, [%g0] 0x73 |
| 10959 | #endif |
| 10960 | intvec_2_42: |
| 10961 | .word 0x39400001 ! 64: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 10962 | .word 0xe19fdc00 ! 65: LDDFA_R ldda [%r31, %r0], %f16 |
| 10963 | ibp_2_44: |
| 10964 | nop |
| 10965 | .word 0xc19fc3e0 ! 66: LDDFA_R ldda [%r31, %r0], %f0 |
| 10966 | ibp_2_45: |
| 10967 | nop |
| 10968 | .word 0x9f802000 ! 67: SIR sir 0x0000 |
| 10969 | .word 0xe927e168 ! 68: STF_I st %f20, [0x0168, %r31] |
| 10970 | mondo_2_46: |
| 10971 | nop |
| 10972 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 10973 | ta T_CHANGE_PRIV |
| 10974 | stxa %r3, [%r0+0x3e8] %asi |
| 10975 | .word 0x9d944006 ! 69: WRPR_WSTATE_R wrpr %r17, %r6, %wstate |
| 10976 | .word 0xb1848012 ! 70: WR_STICK_REG_R wr %r18, %r18, %- |
| 10977 | br_badelay3_2_47: |
| 10978 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> |
| 10979 | .word 0x20800001 ! 1: BN bn,a <label_0x1> |
| 10980 | .word 0xe9130005 ! 1: LDQF_R - [%r12, %r5], %f20 |
| 10981 | .word 0xa5a1c829 ! 71: FADDs fadds %f7, %f9, %f18 |
| 10982 | fpinit_2_48: |
| 10983 | nop |
| 10984 | setx fp_data_quads, %r19, %r20 |
| 10985 | ldd [%r20], %f0 |
| 10986 | ldd [%r20+8], %f4 |
| 10987 | ld [%r20+16], %fsr |
| 10988 | ld [%r20+24], %r19 |
| 10989 | wr %r19, %g0, %gsr |
| 10990 | .word 0x91a009c4 ! 72: FDIVd fdivd %f0, %f4, %f8 |
| 10991 | brcommon2_2_49: |
| 10992 | nop |
| 10993 | setx common_target, %r12, %r27 |
| 10994 | ba,a .+12 |
| 10995 | .word 0x9ba209d4 ! 1: FDIVd fdivd %f8, %f20, %f44 |
| 10996 | ba,a .+8 |
| 10997 | jmpl %r27+0, %r27 |
| 10998 | .word 0xc19fe020 ! 73: LDDFA_I ldda [%r31, 0x0020], %f0 |
| 10999 | #if (defined SPC || defined CMP1) |
| 11000 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_50) + 40, 16, 16)) -> intp(5,0,19) |
| 11001 | #else |
| 11002 | setx 0x5bcdfcbe4e205238, %r1, %r28 |
| 11003 | stxa %r28, [%g0] 0x73 |
| 11004 | #endif |
| 11005 | intvec_2_50: |
| 11006 | .word 0x39400001 ! 74: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 11007 | .word 0xc32fc000 ! 75: STXFSR_R st-sfr %f1, [%r0, %r31] |
| 11008 | intveclr_2_51: |
| 11009 | nop |
| 11010 | ta T_CHANGE_HPRIV |
| 11011 | setx 0x6337573ca204b294, %r1, %r28 |
| 11012 | stxa %r28, [%g0] 0x72 |
| 11013 | ta T_CHANGE_NONHPRIV |
| 11014 | .word 0x25400001 ! 76: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 11015 | brcommon3_2_52: |
| 11016 | nop |
| 11017 | setx common_target, %r12, %r27 |
| 11018 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 11019 | ba,a .+12 |
| 11020 | .word 0xdb37e120 ! 1: STQF_I - %f13, [0x0120, %r31] |
| 11021 | ba,a .+8 |
| 11022 | jmpl %r27+0, %r27 |
| 11023 | .word 0xdb3fc012 ! 77: STDF_R std %f13, [%r18, %r31] |
| 11024 | .word 0xa9848009 ! 78: WR_SET_SOFTINT_R wr %r18, %r9, %set_softint |
| 11025 | .word 0x3b400001 ! 1: FBPLE fble,a,pn %fcc0, <label_0x1> |
| 11026 | .word 0x8d903685 ! 79: WRPR_PSTATE_I wrpr %r0, 0x1685, %pstate |
| 11027 | splash_lsu_2_54: |
| 11028 | nop |
| 11029 | ta T_CHANGE_HPRIV |
| 11030 | set 0x76130692, %r2 |
| 11031 | mov 0x1, %r1 |
| 11032 | sllx %r1, 32, %r1 |
| 11033 | or %r1, %r2, %r2 |
| 11034 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 11035 | ta T_CHANGE_NONHPRIV |
| 11036 | .word 0x3d400001 ! 80: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 11037 | splash_lsu_2_55: |
| 11038 | nop |
| 11039 | ta T_CHANGE_HPRIV |
| 11040 | set 0x935f10e9, %r2 |
| 11041 | mov 0x5, %r1 |
| 11042 | sllx %r1, 32, %r1 |
| 11043 | or %r1, %r2, %r2 |
| 11044 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 11045 | .word 0x3d400001 ! 81: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 11046 | nop |
| 11047 | ta T_CHANGE_HPRIV ! macro |
| 11048 | donret_2_56: |
| 11049 | rd %pc, %r12 |
| 11050 | add %r12, (donretarg_2_56-donret_2_56+4), %r12 |
| 11051 | add %r12, 0x4, %r11 ! seq tnpc |
| 11052 | wrpr %g0, 0x2, %tl |
| 11053 | wrpr %g0, %r12, %tpc |
| 11054 | wrpr %g0, %r11, %tnpc |
| 11055 | set (0x005e8000 | (0x8a << 24)), %r13 |
| 11056 | and %r12, 0xfff, %r14 |
| 11057 | sllx %r14, 30, %r14 |
| 11058 | or %r13, %r14, %r20 |
| 11059 | wrpr %r20, %g0, %tstate |
| 11060 | wrhpr %g0, 0x141d, %htstate |
| 11061 | ta T_CHANGE_NONHPRIV ! rand=1 (2) |
| 11062 | retry |
| 11063 | donretarg_2_56: |
| 11064 | .word 0xa7a409d0 ! 82: FDIVd fdivd %f16, %f16, %f50 |
| 11065 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 11066 | reduce_priv_lvl_2_57: |
| 11067 | ta T_CHANGE_NONHPRIV ! macro |
| 11068 | dvapa_2_58: |
| 11069 | nop |
| 11070 | ta T_CHANGE_HPRIV |
| 11071 | mov 0x9b8, %r20 |
| 11072 | mov 0xd, %r19 |
| 11073 | sllx %r20, 23, %r20 |
| 11074 | or %r19, %r20, %r19 |
| 11075 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 11076 | mov 0x38, %r18 |
| 11077 | stxa %r31, [%r18]0x58 |
| 11078 | ta T_CHANGE_NONHPRIV |
| 11079 | .word 0xc3ed0025 ! 84: PREFETCHA_R prefetcha [%r20, %r5] 0x01, #one_read |
| 11080 | nop |
| 11081 | ta T_CHANGE_HPRIV ! macro |
| 11082 | donret_2_59: |
| 11083 | rd %pc, %r12 |
| 11084 | add %r12, (donretarg_2_59-donret_2_59), %r12 |
| 11085 | add %r12, 0x8, %r11 ! nonseq tnpc |
| 11086 | wrpr %g0, 0x2, %tl |
| 11087 | wrpr %g0, %r12, %tpc |
| 11088 | wrpr %g0, %r11, %tnpc |
| 11089 | set (0x00844200 | (0x80 << 24)), %r13 |
| 11090 | and %r12, 0xfff, %r14 |
| 11091 | sllx %r14, 30, %r14 |
| 11092 | or %r13, %r14, %r20 |
| 11093 | wrpr %r20, %g0, %tstate |
| 11094 | wrhpr %g0, 0xe96, %htstate |
| 11095 | ta T_CHANGE_NONPRIV ! rand=0 (2) |
| 11096 | .word 0x2c800001 ! 1: BNEG bneg,a <label_0x1> |
| 11097 | done |
| 11098 | donretarg_2_59: |
| 11099 | .word 0xd86fe0df ! 85: LDSTUB_I ldstub %r12, [%r31 + 0x00df] |
| 11100 | trapasi_2_60: |
| 11101 | nop |
| 11102 | mov 0x28, %r1 ! (VA for ASI 0x5b) |
| 11103 | .word 0xd8904b60 ! 86: LDUHA_R lduha [%r1, %r0] 0x5b, %r12 |
| 11104 | otherw |
| 11105 | mov 0xb1, %r30 |
| 11106 | .word 0x83d0001e ! 87: Tcc_R te icc_or_xcc, %r0 + %r30 |
| 11107 | pmu_2_61: |
| 11108 | nop |
| 11109 | setx 0xfffff1a9fffff687, %g1, %g7 |
| 11110 | .word 0xa3800007 ! 88: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 11111 | .word 0x89800011 ! 89: WRTICK_R wr %r0, %r17, %tick |
| 11112 | dvapa_2_63: |
| 11113 | nop |
| 11114 | ta T_CHANGE_HPRIV |
| 11115 | mov 0x887, %r20 |
| 11116 | mov 0x1e, %r19 |
| 11117 | sllx %r20, 23, %r20 |
| 11118 | or %r19, %r20, %r19 |
| 11119 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 11120 | mov 0x38, %r18 |
| 11121 | stxa %r31, [%r18]0x58 |
| 11122 | ta T_CHANGE_NONHPRIV |
| 11123 | .word 0xd8bfc031 ! 90: STDA_R stda %r12, [%r31 + %r17] 0x01 |
| 11124 | .word 0xd857e110 ! 91: LDSH_I ldsh [%r31 + 0x0110], %r12 |
| 11125 | .word 0xb1840010 ! 92: WR_STICK_REG_R wr %r16, %r16, %- |
| 11126 | .word 0xd89fc2e0 ! 93: LDDA_R ldda [%r31, %r0] 0x17, %r12 |
| 11127 | splash_hpstate_2_64: |
| 11128 | .word 0x37400001 ! 1: FBPGE fbge,a,pn %fcc0, <label_0x1> |
| 11129 | .word 0x81982dc7 ! 94: WRHPR_HPSTATE_I wrhpr %r0, 0x0dc7, %hpstate |
| 11130 | .word 0xc30fc000 ! 95: LDXFSR_R ld-fsr [%r31, %r0], %f1 |
| 11131 | brcommon1_2_65: |
| 11132 | nop |
| 11133 | setx common_target, %r12, %r27 |
| 11134 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 11135 | ba,a .+12 |
| 11136 | .word 0x99702030 ! 1: POPC_I popc 0x0030, %r12 |
| 11137 | ba,a .+8 |
| 11138 | jmpl %r27+0, %r27 |
| 11139 | .word 0x91a309d3 ! 96: FDIVd fdivd %f12, %f50, %f8 |
| 11140 | .word 0xc32fc011 ! 1: STXFSR_R st-sfr %f1, [%r17, %r31] |
| 11141 | .word 0x9f803bb8 ! 97: SIR sir 0x1bb8 |
| 11142 | intveclr_2_66: |
| 11143 | nop |
| 11144 | ta T_CHANGE_HPRIV |
| 11145 | setx 0xd010af0839c90982, %r1, %r28 |
| 11146 | stxa %r28, [%g0] 0x72 |
| 11147 | ta T_CHANGE_NONHPRIV |
| 11148 | .word 0x25400001 ! 98: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 11149 | .word 0x89800011 ! 99: WRTICK_R wr %r0, %r17, %tick |
| 11150 | splash_tba_2_68: |
| 11151 | nop |
| 11152 | ta T_CHANGE_PRIV |
| 11153 | set 0x120000, %r12 |
| 11154 | .word 0x8b90000c ! 100: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 11155 | brcommon1_2_69: |
| 11156 | nop |
| 11157 | setx common_target, %r12, %r27 |
| 11158 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 11159 | ba,a .+12 |
| 11160 | .word 0xd06fe0b0 ! 1: LDSTUB_I ldstub %r8, [%r31 + 0x00b0] |
| 11161 | ba,a .+8 |
| 11162 | jmpl %r27+0, %r27 |
| 11163 | .word 0x9ba2c9d1 ! 101: FDIVd fdivd %f42, %f48, %f44 |
| 11164 | intveclr_2_70: |
| 11165 | nop |
| 11166 | ta T_CHANGE_HPRIV |
| 11167 | setx 0x0c1e4d1859ebde8f, %r1, %r28 |
| 11168 | stxa %r28, [%g0] 0x72 |
| 11169 | .word 0x25400001 ! 102: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 11170 | setx 0x39e957db24ef05f6, %r1, %r28 |
| 11171 | stxa %r28, [%g0] 0x73 |
| 11172 | intvec_2_71: |
| 11173 | .word 0x39400001 ! 103: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 11174 | nop |
| 11175 | ta T_CHANGE_HPRIV ! macro |
| 11176 | donret_2_72: |
| 11177 | rd %pc, %r12 |
| 11178 | add %r12, (donretarg_2_72-donret_2_72), %r12 |
| 11179 | add %r12, 0x8, %r11 ! nonseq tnpc |
| 11180 | wrpr %g0, 0x1, %tl |
| 11181 | wrpr %g0, %r12, %tpc |
| 11182 | wrpr %g0, %r11, %tnpc |
| 11183 | set (0x0008d300 | (0x4f << 24)), %r13 |
| 11184 | and %r12, 0xfff, %r14 |
| 11185 | sllx %r14, 30, %r14 |
| 11186 | or %r13, %r14, %r20 |
| 11187 | wrpr %r20, %g0, %tstate |
| 11188 | wrhpr %g0, 0x1d5f, %htstate |
| 11189 | ta T_CHANGE_NONHPRIV ! rand=1 (2) |
| 11190 | .word 0x26cc4001 ! 1: BRLZ brlz,a,pt %r17,<label_0xc4001> |
| 11191 | retry |
| 11192 | donretarg_2_72: |
| 11193 | .word 0x2ecb4001 ! 104: BRGEZ brgez,a,pt %r13,<label_0xb4001> |
| 11194 | intveclr_2_73: |
| 11195 | nop |
| 11196 | ta T_CHANGE_HPRIV |
| 11197 | setx 0xe97fce01f7cce4a1, %r1, %r28 |
| 11198 | stxa %r28, [%g0] 0x72 |
| 11199 | ta T_CHANGE_NONHPRIV |
| 11200 | .word 0x25400001 ! 105: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 11201 | .word 0xe19fe1a0 ! 106: LDDFA_I ldda [%r31, 0x01a0], %f16 |
| 11202 | ta T_CHANGE_NONHPRIV |
| 11203 | .word 0x8143e011 ! 107: MEMBAR membar #LoadLoad | #Lookaside |
| 11204 | .word 0xc32fc000 ! 108: STXFSR_R st-sfr %f1, [%r0, %r31] |
| 11205 | fblg,a,pn %fcc0, skip_2_76 |
| 11206 | fbul,a,pn %fcc0, skip_2_76 |
| 11207 | .align 1024 |
| 11208 | skip_2_76: |
| 11209 | .word 0x87aa0a44 ! 109: FCMPd fcmpd %fcc<n>, %f8, %f4 |
| 11210 | .word 0xc1bfe1c0 ! 110: STDFA_I stda %f0, [0x01c0, %r31] |
| 11211 | intveclr_2_77: |
| 11212 | nop |
| 11213 | ta T_CHANGE_HPRIV |
| 11214 | setx 0xc8f8240a0d1d7aa6, %r1, %r28 |
| 11215 | stxa %r28, [%g0] 0x72 |
| 11216 | ta T_CHANGE_NONHPRIV |
| 11217 | .word 0x25400001 ! 111: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 11218 | splash_cmpr_2_78: |
| 11219 | mov 0, %r18 |
| 11220 | sllx %r18, 63, %r18 |
| 11221 | rd %tick, %r17 |
| 11222 | add %r17, 0x100, %r17 |
| 11223 | or %r17, %r18, %r17 |
| 11224 | ta T_CHANGE_HPRIV |
| 11225 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 11226 | ta T_CHANGE_PRIV |
| 11227 | .word 0xb3800011 ! 112: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 11228 | .word 0xe1bfe140 ! 113: STDFA_I stda %f16, [0x0140, %r31] |
| 11229 | unsupttte_2_79: |
| 11230 | nop |
| 11231 | ta T_CHANGE_HPRIV |
| 11232 | mov 1, %r20 |
| 11233 | sllx %r20, 63, %r20 |
| 11234 | or %r20, 2,%r20 |
| 11235 | stxa %r20, [%g0]0x5c ! D unsupported page size .. |
| 11236 | ta T_CHANGE_NONHPRIV |
| 11237 | .word 0xa9a1c9c5 ! 114: FDIVd fdivd %f38, %f36, %f20 |
| 11238 | tagged_2_80: |
| 11239 | tsubcctv %r8, 0x1831, %r16 |
| 11240 | .word 0xd807e1f8 ! 115: LDUW_I lduw [%r31 + 0x01f8], %r12 |
| 11241 | .word 0xa2d28006 ! 116: UMULcc_R umulcc %r10, %r6, %r17 |
| 11242 | setx 0x464e9835dcc0a3f7, %r1, %r28 |
| 11243 | stxa %r28, [%g0] 0x73 |
| 11244 | intvec_2_81: |
| 11245 | .word 0x39400001 ! 117: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 11246 | trapasi_2_82: |
| 11247 | nop |
| 11248 | mov 0x28, %r1 ! (VA for ASI 0x5a) |
| 11249 | .word 0xd2884b40 ! 118: LDUBA_R lduba [%r1, %r0] 0x5a, %r9 |
| 11250 | .word 0x2ecb0001 ! 1: BRGEZ brgez,a,pt %r12,<label_0xb0001> |
| 11251 | .word 0x8d903dfd ! 119: WRPR_PSTATE_I wrpr %r0, 0x1dfd, %pstate |
| 11252 | ibp_2_84: |
| 11253 | nop |
| 11254 | .word 0xd31fe110 ! 120: LDDF_I ldd [%r31, 0x0110], %f9 |
| 11255 | nop |
| 11256 | ta T_CHANGE_HPRIV |
| 11257 | mov 0x2, %r10 |
| 11258 | set sync_thr_counter6, %r23 |
| 11259 | #ifndef SPC |
| 11260 | ldxa [%g0]0x63, %o1 |
| 11261 | and %o1, 0x38, %o1 |
| 11262 | add %o1, %r23, %r23 |
| 11263 | #endif |
| 11264 | cas [%r23],%g0,%r10 !lock |
| 11265 | brnz %r10, sma_2_85 |
| 11266 | rd %asi, %r12 |
| 11267 | wr %g0, 0x40, %asi |
| 11268 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 11269 | set 0x00061fff, %g1 |
| 11270 | stxa %g1, [%g0 + 0x80] %asi |
| 11271 | wr %r12, %g0, %asi |
| 11272 | st %g0, [%r23] |
| 11273 | sma_2_85: |
| 11274 | ta T_CHANGE_NONHPRIV |
| 11275 | .word 0xd3e7e014 ! 121: CASA_R casa [%r31] %asi, %r20, %r9 |
| 11276 | fpinit_2_86: |
| 11277 | nop |
| 11278 | setx fp_data_quads, %r19, %r20 |
| 11279 | ldd [%r20], %f0 |
| 11280 | ldd [%r20+8], %f4 |
| 11281 | ld [%r20+16], %fsr |
| 11282 | ld [%r20+24], %r19 |
| 11283 | wr %r19, %g0, %gsr |
| 11284 | .word 0x89b00484 ! 122: FCMPLE32 fcmple32 %d0, %d4, %r4 |
| 11285 | .word 0x91944011 ! 123: WRPR_PIL_R wrpr %r17, %r17, %pil |
| 11286 | intveclr_2_88: |
| 11287 | nop |
| 11288 | ta T_CHANGE_HPRIV |
| 11289 | setx 0x68d80f1b7b7ee90e, %r1, %r28 |
| 11290 | stxa %r28, [%g0] 0x72 |
| 11291 | .word 0x25400001 ! 124: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 11292 | mondo_2_89: |
| 11293 | nop |
| 11294 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 11295 | stxa %r16, [%r0+0x3d8] %asi |
| 11296 | .word 0x9d910011 ! 125: WRPR_WSTATE_R wrpr %r4, %r17, %wstate |
| 11297 | nop |
| 11298 | ta T_CHANGE_HPRIV ! macro |
| 11299 | donret_2_90: |
| 11300 | rd %pc, %r12 |
| 11301 | add %r12, (donretarg_2_90-donret_2_90+4), %r12 |
| 11302 | add %r12, 0x4, %r11 ! seq tnpc |
| 11303 | wrpr %g0, 0x1, %tl |
| 11304 | wrpr %g0, %r12, %tpc |
| 11305 | wrpr %g0, %r11, %tnpc |
| 11306 | set (0x00fc9900 | (20 << 24)), %r13 |
| 11307 | and %r12, 0xfff, %r14 |
| 11308 | sllx %r14, 30, %r14 |
| 11309 | or %r13, %r14, %r20 |
| 11310 | wrpr %r20, %g0, %tstate |
| 11311 | wrhpr %g0, 0x70f, %htstate |
| 11312 | ta T_CHANGE_NONHPRIV ! rand=1 (2) |
| 11313 | retry |
| 11314 | donretarg_2_90: |
| 11315 | .word 0xd26fe0de ! 126: LDSTUB_I ldstub %r9, [%r31 + 0x00de] |
| 11316 | .word 0xd2cfe0c8 ! 127: LDSBA_I ldsba [%r31, + 0x00c8] %asi, %r9 |
| 11317 | .word 0xd23fe048 ! 128: STD_I std %r9, [%r31 + 0x0048] |
| 11318 | .word 0x8d802004 ! 129: WRFPRS_I wr %r0, 0x0004, %fprs |
| 11319 | .word 0x93d020b5 ! 130: Tcc_I tne icc_or_xcc, %r0 + 181 |
| 11320 | .word 0xa1520000 ! 131: RDPR_PIL <illegal instruction> |
| 11321 | mondo_2_91: |
| 11322 | nop |
| 11323 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 11324 | ta T_CHANGE_PRIV |
| 11325 | stxa %r9, [%r0+0x3e8] %asi |
| 11326 | .word 0x9d94c012 ! 132: WRPR_WSTATE_R wrpr %r19, %r18, %wstate |
| 11327 | #if (defined SPC || defined CMP1) |
| 11328 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_92) + 24, 16, 16)) -> intp(5,0,27) |
| 11329 | #else |
| 11330 | setx 0x67a85c78d094c757, %r1, %r28 |
| 11331 | stxa %r28, [%g0] 0x73 |
| 11332 | #endif |
| 11333 | intvec_2_92: |
| 11334 | .word 0x39400001 ! 133: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 11335 | fpinit_2_93: |
| 11336 | nop |
| 11337 | setx fp_data_quads, %r19, %r20 |
| 11338 | ldd [%r20], %f0 |
| 11339 | ldd [%r20+8], %f4 |
| 11340 | ld [%r20+16], %fsr |
| 11341 | ld [%r20+24], %r19 |
| 11342 | wr %r19, %g0, %gsr |
| 11343 | .word 0xc3e82159 ! 134: PREFETCHA_I prefetcha [%r0, + 0x0159] %asi, #one_read |
| 11344 | invalw |
| 11345 | mov 0x31, %r30 |
| 11346 | .word 0x83d0001e ! 135: Tcc_R te icc_or_xcc, %r0 + %r30 |
| 11347 | .word 0xe2800b20 ! 136: LDUWA_R lduwa [%r0, %r0] 0x59, %r17 |
| 11348 | ibp_2_94: |
| 11349 | nop |
| 11350 | .word 0xe29fc02d ! 137: LDDA_R ldda [%r31, %r13] 0x01, %r17 |
| 11351 | nop |
| 11352 | ta T_CHANGE_HPRIV |
| 11353 | mov 0x2+1, %r10 |
| 11354 | set sync_thr_counter5, %r23 |
| 11355 | #ifndef SPC |
| 11356 | ldxa [%g0]0x63, %o1 |
| 11357 | and %o1, 0x38, %o1 |
| 11358 | add %o1, %r23, %r23 |
| 11359 | sllx %o1, 5, %o3 !(CID*256) |
| 11360 | #endif |
| 11361 | cas [%r23],%g0,%r10 !lock |
| 11362 | brnz %r10, cwq_2_95 |
| 11363 | rd %asi, %r12 |
| 11364 | wr %g0, 0x40, %asi |
| 11365 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 11366 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 11367 | cmp %l1, 1 |
| 11368 | bne cwq_2_95 |
| 11369 | set CWQ_BASE, %l6 |
| 11370 | #ifndef SPC |
| 11371 | add %l6, %o3, %l6 |
| 11372 | #endif |
| 11373 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 11374 | best_set_reg(0x206100f0, %l1, %l2) !# Control Word |
| 11375 | sllx %l2, 32, %l2 |
| 11376 | stx %l2, [%l6 + 0x0] |
| 11377 | membar #Sync |
| 11378 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 11379 | sub %l2, 0x40, %l2 |
| 11380 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 11381 | wr %r12, %g0, %asi |
| 11382 | st %g0, [%r23] |
| 11383 | cwq_2_95: |
| 11384 | ta T_CHANGE_NONHPRIV |
| 11385 | .word 0xa1414000 ! 138: RDPC rd %pc, %r16 |
| 11386 | .word 0x87802089 ! 139: WRASI_I wr %r0, 0x0089, %asi |
| 11387 | #if (defined SPC || defined CMP1) |
| 11388 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_96) + 24, 16, 16)) -> intp(3,0,30) |
| 11389 | #else |
| 11390 | setx 0x19f94b4b72d3e23f, %r1, %r28 |
| 11391 | stxa %r28, [%g0] 0x73 |
| 11392 | #endif |
| 11393 | intvec_2_96: |
| 11394 | .word 0x39400001 ! 140: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 11395 | .word 0xc32fc00a ! 141: STXFSR_R st-sfr %f1, [%r10, %r31] |
| 11396 | dvapa_2_98: |
| 11397 | nop |
| 11398 | ta T_CHANGE_HPRIV |
| 11399 | mov 0xecd, %r20 |
| 11400 | mov 0x15, %r19 |
| 11401 | sllx %r20, 23, %r20 |
| 11402 | or %r19, %r20, %r19 |
| 11403 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 11404 | mov 0x38, %r18 |
| 11405 | stxa %r31, [%r18]0x58 |
| 11406 | ta T_CHANGE_NONHPRIV |
| 11407 | .word 0xa3b4c7c2 ! 142: PDIST pdistn %d50, %d2, %d48 |
| 11408 | nop |
| 11409 | ta T_CHANGE_HPRIV ! macro |
| 11410 | donret_2_99: |
| 11411 | rd %pc, %r12 |
| 11412 | add %r12, (donretarg_2_99-donret_2_99+4), %r12 |
| 11413 | add %r12, 0x4, %r11 ! seq tnpc |
| 11414 | wrpr %g0, 0x1, %tl |
| 11415 | wrpr %g0, %r12, %tpc |
| 11416 | wrpr %g0, %r11, %tnpc |
| 11417 | set (0x00b33800 | (32 << 24)), %r13 |
| 11418 | and %r12, 0xfff, %r14 |
| 11419 | sllx %r14, 30, %r14 |
| 11420 | or %r13, %r14, %r20 |
| 11421 | wrpr %r20, %g0, %tstate |
| 11422 | wrhpr %g0, 0x585, %htstate |
| 11423 | ta T_CHANGE_NONHPRIV ! rand=1 (2) |
| 11424 | .word 0x2b400001 ! 1: FBPUG fbug,a,pn %fcc0, <label_0x1> |
| 11425 | done |
| 11426 | donretarg_2_99: |
| 11427 | .word 0x3c800001 ! 143: BPOS bpos,a <label_0x1> |
| 11428 | .word 0xe477e078 ! 144: STX_I stx %r18, [%r31 + 0x0078] |
| 11429 | .word 0x8d9032f3 ! 145: WRPR_PSTATE_I wrpr %r0, 0x12f3, %pstate |
| 11430 | .word 0xe4800ac0 ! 146: LDUWA_R lduwa [%r0, %r0] 0x56, %r18 |
| 11431 | trapasi_2_101: |
| 11432 | nop |
| 11433 | mov 0x3f8, %r1 ! (VA for ASI 0x25) |
| 11434 | .word 0xe49044a0 ! 147: LDUHA_R lduha [%r1, %r0] 0x25, %r18 |
| 11435 | ibp_2_102: |
| 11436 | nop |
| 11437 | .word 0xe5e7e012 ! 148: CASA_R casa [%r31] %asi, %r18, %r18 |
| 11438 | setx 0x5cda1bbd3b57ad14, %r1, %r28 |
| 11439 | stxa %r28, [%g0] 0x73 |
| 11440 | intvec_2_103: |
| 11441 | .word 0x39400001 ! 149: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 11442 | mondo_2_104: |
| 11443 | nop |
| 11444 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 11445 | stxa %r17, [%r0+0x3e8] %asi |
| 11446 | .word 0x9d944005 ! 150: WRPR_WSTATE_R wrpr %r17, %r5, %wstate |
| 11447 | setx 0xd777e236db34a7ce, %r1, %r28 |
| 11448 | stxa %r28, [%g0] 0x73 |
| 11449 | intvec_2_105: |
| 11450 | .word 0x39400001 ! 151: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 11451 | ibp_2_106: |
| 11452 | nop |
| 11453 | .word 0xe43fe140 ! 152: STD_I std %r18, [%r31 + 0x0140] |
| 11454 | trapasi_2_107: |
| 11455 | nop |
| 11456 | mov 0x0, %r1 ! (VA for ASI 0x72) |
| 11457 | .word 0xe4d84e40 ! 153: LDXA_R ldxa [%r1, %r0] 0x72, %r18 |
| 11458 | .word 0xe43fc008 ! 1: STD_R std %r18, [%r31 + %r8] |
| 11459 | .word 0x9f802529 ! 154: SIR sir 0x0529 |
| 11460 | splash_cmpr_2_108: |
| 11461 | mov 0, %r18 |
| 11462 | sllx %r18, 63, %r18 |
| 11463 | rd %tick, %r17 |
| 11464 | add %r17, 0x100, %r17 |
| 11465 | or %r17, %r18, %r17 |
| 11466 | .word 0xaf800011 ! 155: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 11467 | intveclr_2_109: |
| 11468 | nop |
| 11469 | ta T_CHANGE_HPRIV |
| 11470 | setx 0xf18a55ba689c2868, %r1, %r28 |
| 11471 | stxa %r28, [%g0] 0x72 |
| 11472 | ta T_CHANGE_NONHPRIV |
| 11473 | .word 0x25400001 ! 156: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 11474 | ibp_2_110: |
| 11475 | nop |
| 11476 | .word 0xa770370b ! 157: POPC_I popc 0x170b, %r19 |
| 11477 | .word 0xc32fc000 ! 158: STXFSR_R st-sfr %f1, [%r0, %r31] |
| 11478 | .word 0xc1bfe160 ! 159: STDFA_I stda %f0, [0x0160, %r31] |
| 11479 | .word 0xa3a7c9cc ! 1: FDIVd fdivd %f62, %f12, %f48 |
| 11480 | .word 0x9f8029ad ! 160: SIR sir 0x09ad |
| 11481 | splash_hpstate_2_112: |
| 11482 | .word 0x3d400001 ! 1: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 11483 | .word 0x81983e5c ! 161: WRHPR_HPSTATE_I wrhpr %r0, 0x1e5c, %hpstate |
| 11484 | .word 0xe327e038 ! 162: STF_I st %f17, [0x0038, %r31] |
| 11485 | .word 0x83d020b3 ! 163: Tcc_I te icc_or_xcc, %r0 + 179 |
| 11486 | mondo_2_113: |
| 11487 | nop |
| 11488 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 11489 | stxa %r12, [%r0+0x3e8] %asi |
| 11490 | .word 0x9d91000a ! 164: WRPR_WSTATE_R wrpr %r4, %r10, %wstate |
| 11491 | br_badelay2_2_114: |
| 11492 | .word 0x20800001 ! 1: BN bn,a <label_0x1> |
| 11493 | allclean |
| 11494 | .word 0x93b28313 ! 165: ALIGNADDRESS alignaddr %r10, %r19, %r9 |
| 11495 | fpinit_2_115: |
| 11496 | nop |
| 11497 | setx fp_data_quads, %r19, %r20 |
| 11498 | ldd [%r20], %f0 |
| 11499 | ldd [%r20+8], %f4 |
| 11500 | ld [%r20+16], %fsr |
| 11501 | ld [%r20+24], %r19 |
| 11502 | wr %r19, %g0, %gsr |
| 11503 | .word 0x89a009a4 ! 166: FDIVs fdivs %f0, %f4, %f4 |
| 11504 | set 0x3065, %l3 |
| 11505 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT |
| 11506 | .word 0xa1b407d1 ! 167: PDIST pdistn %d16, %d48, %d16 |
| 11507 | memptr_2_116: |
| 11508 | set 0x60140000, %r31 |
| 11509 | .word 0x8584a487 ! 168: WRCCR_I wr %r18, 0x0487, %ccr |
| 11510 | .word 0xd4c7e088 ! 169: LDSWA_I ldswa [%r31, + 0x0088] %asi, %r10 |
| 11511 | setx 0x5b0f20d5337fcfc0, %r1, %r28 |
| 11512 | stxa %r28, [%g0] 0x73 |
| 11513 | intvec_2_117: |
| 11514 | .word 0x39400001 ! 170: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 11515 | splash_hpstate_2_118: |
| 11516 | .word 0x81983f97 ! 171: WRHPR_HPSTATE_I wrhpr %r0, 0x1f97, %hpstate |
| 11517 | mondo_2_119: |
| 11518 | nop |
| 11519 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 11520 | ta T_CHANGE_PRIV |
| 11521 | stxa %r10, [%r0+0x3c0] %asi |
| 11522 | .word 0x9d948004 ! 172: WRPR_WSTATE_R wrpr %r18, %r4, %wstate |
| 11523 | nop |
| 11524 | ta T_CHANGE_HPRIV |
| 11525 | mov 0x2+1, %r10 |
| 11526 | set sync_thr_counter5, %r23 |
| 11527 | #ifndef SPC |
| 11528 | ldxa [%g0]0x63, %o1 |
| 11529 | and %o1, 0x38, %o1 |
| 11530 | add %o1, %r23, %r23 |
| 11531 | sllx %o1, 5, %o3 !(CID*256) |
| 11532 | #endif |
| 11533 | cas [%r23],%g0,%r10 !lock |
| 11534 | brnz %r10, cwq_2_120 |
| 11535 | rd %asi, %r12 |
| 11536 | wr %g0, 0x40, %asi |
| 11537 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 11538 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 11539 | cmp %l1, 1 |
| 11540 | bne cwq_2_120 |
| 11541 | set CWQ_BASE, %l6 |
| 11542 | #ifndef SPC |
| 11543 | add %l6, %o3, %l6 |
| 11544 | #endif |
| 11545 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 11546 | best_set_reg(0x206100b0, %l1, %l2) !# Control Word |
| 11547 | sllx %l2, 32, %l2 |
| 11548 | stx %l2, [%l6 + 0x0] |
| 11549 | membar #Sync |
| 11550 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 11551 | sub %l2, 0x40, %l2 |
| 11552 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 11553 | wr %r12, %g0, %asi |
| 11554 | st %g0, [%r23] |
| 11555 | cwq_2_120: |
| 11556 | ta T_CHANGE_NONHPRIV |
| 11557 | .word 0xa7414000 ! 173: RDPC rd %pc, %r19 |
| 11558 | ibp_2_121: |
| 11559 | nop |
| 11560 | ta T_CHANGE_NONHPRIV |
| 11561 | .word 0xc19fe0c0 ! 174: LDDFA_I ldda [%r31, 0x00c0], %f0 |
| 11562 | .word 0xd48008a0 ! 175: LDUWA_R lduwa [%r0, %r0] 0x45, %r10 |
| 11563 | .word 0x8d802004 ! 176: WRFPRS_I wr %r0, 0x0004, %fprs |
| 11564 | #if (defined SPC || defined CMP1) |
| 11565 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_122) + 56, 16, 16)) -> intp(1,0,30) |
| 11566 | #else |
| 11567 | setx 0x2290d8918b4afa58, %r1, %r28 |
| 11568 | stxa %r28, [%g0] 0x73 |
| 11569 | #endif |
| 11570 | intvec_2_122: |
| 11571 | .word 0x39400001 ! 177: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 11572 | setx 0x8e31e241c694c150, %r1, %r28 |
| 11573 | stxa %r28, [%g0] 0x73 |
| 11574 | intvec_2_123: |
| 11575 | .word 0x39400001 ! 178: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 11576 | .word 0x93d02035 ! 179: Tcc_I tne icc_or_xcc, %r0 + 53 |
| 11577 | #if (defined SPC || defined CMP1) |
| 11578 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_2_124) + 24, 16, 16)) -> intp(2,0,3) |
| 11579 | #else |
| 11580 | setx 0x73c2e62c9e9da718, %r1, %r28 |
| 11581 | stxa %r28, [%g0] 0x73 |
| 11582 | #endif |
| 11583 | intvec_2_124: |
| 11584 | .word 0x39400001 ! 180: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 11585 | fpinit_2_125: |
| 11586 | nop |
| 11587 | setx fp_data_quads, %r19, %r20 |
| 11588 | ldd [%r20], %f0 |
| 11589 | ldd [%r20+8], %f4 |
| 11590 | ld [%r20+16], %fsr |
| 11591 | ld [%r20+24], %r19 |
| 11592 | wr %r19, %g0, %gsr |
| 11593 | .word 0x91a009a4 ! 181: FDIVs fdivs %f0, %f4, %f8 |
| 11594 | splash_tba_2_126: |
| 11595 | nop |
| 11596 | ta T_CHANGE_PRIV |
| 11597 | setx 0x00000004003a0000, %r11, %r12 |
| 11598 | .word 0x8b90000c ! 182: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 11599 | fpinit_2_127: |
| 11600 | nop |
| 11601 | setx fp_data_quads, %r19, %r20 |
| 11602 | ldd [%r20], %f0 |
| 11603 | ldd [%r20+8], %f4 |
| 11604 | ld [%r20+16], %fsr |
| 11605 | ld [%r20+24], %r19 |
| 11606 | wr %r19, %g0, %gsr |
| 11607 | .word 0x89a009c4 ! 183: FDIVd fdivd %f0, %f4, %f4 |
| 11608 | .word 0xd4dfe020 ! 184: LDXA_I ldxa [%r31, + 0x0020] %asi, %r10 |
| 11609 | nop |
| 11610 | ta T_CHANGE_HPRIV |
| 11611 | mov 0x2+1, %r10 |
| 11612 | set sync_thr_counter5, %r23 |
| 11613 | #ifndef SPC |
| 11614 | ldxa [%g0]0x63, %o1 |
| 11615 | and %o1, 0x38, %o1 |
| 11616 | add %o1, %r23, %r23 |
| 11617 | sllx %o1, 5, %o3 !(CID*256) |
| 11618 | #endif |
| 11619 | cas [%r23],%g0,%r10 !lock |
| 11620 | brnz %r10, cwq_2_128 |
| 11621 | rd %asi, %r12 |
| 11622 | wr %g0, 0x40, %asi |
| 11623 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 11624 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 11625 | cmp %l1, 1 |
| 11626 | bne cwq_2_128 |
| 11627 | set CWQ_BASE, %l6 |
| 11628 | #ifndef SPC |
| 11629 | add %l6, %o3, %l6 |
| 11630 | #endif |
| 11631 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 11632 | best_set_reg(0x20610040, %l1, %l2) !# Control Word |
| 11633 | sllx %l2, 32, %l2 |
| 11634 | stx %l2, [%l6 + 0x0] |
| 11635 | membar #Sync |
| 11636 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 11637 | sub %l2, 0x40, %l2 |
| 11638 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 11639 | wr %r12, %g0, %asi |
| 11640 | st %g0, [%r23] |
| 11641 | cwq_2_128: |
| 11642 | ta T_CHANGE_NONHPRIV |
| 11643 | .word 0x9b414000 ! 185: RDPC rd %pc, %r13 |
| 11644 | intveclr_2_129: |
| 11645 | nop |
| 11646 | ta T_CHANGE_HPRIV |
| 11647 | setx 0x51c20524236f8f1a, %r1, %r28 |
| 11648 | stxa %r28, [%g0] 0x72 |
| 11649 | ta T_CHANGE_NONHPRIV |
| 11650 | .word 0x25400001 ! 186: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 11651 | memptr_2_130: |
| 11652 | set 0x60340000, %r31 |
| 11653 | .word 0x85852d44 ! 187: WRCCR_I wr %r20, 0x0d44, %ccr |
| 11654 | .word 0x9194400c ! 188: WRPR_PIL_R wrpr %r17, %r12, %pil |
| 11655 | .word 0x91a0016b ! 189: FABSq dis not found |
| 11656 | |
| 11657 | .word 0xe88008a0 ! 190: LDUWA_R lduwa [%r0, %r0] 0x45, %r20 |
| 11658 | .word 0x81580000 ! 191: FLUSHW flushw |
| 11659 | splash_cmpr_2_133: |
| 11660 | mov 1, %r18 |
| 11661 | sllx %r18, 63, %r18 |
| 11662 | rd %tick, %r17 |
| 11663 | add %r17, 0x50, %r17 |
| 11664 | or %r17, %r18, %r17 |
| 11665 | ta T_CHANGE_PRIV |
| 11666 | .word 0xaf800011 ! 192: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 11667 | .word 0xe877c000 ! 193: STX_R stx %r20, [%r31 + %r0] |
| 11668 | ceter_2_134: |
| 11669 | nop |
| 11670 | ta T_CHANGE_HPRIV |
| 11671 | mov 7, %r17 |
| 11672 | sllx %r17, 60, %r17 |
| 11673 | mov 0x18, %r16 |
| 11674 | stxa %r17, [%r16]0x4c |
| 11675 | ta T_CHANGE_NONHPRIV |
| 11676 | .word 0x95410000 ! 194: RDTICK rd %tick, %r10 |
| 11677 | .word 0x8d802004 ! 195: WRFPRS_I wr %r0, 0x0004, %fprs |
| 11678 | .word 0x91520000 ! 196: RDPR_PIL <illegal instruction> |
| 11679 | setx 0xb8e58423fb7b6af3, %r1, %r28 |
| 11680 | stxa %r28, [%g0] 0x73 |
| 11681 | intvec_2_135: |
| 11682 | .word 0x39400001 ! 197: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 11683 | .word 0xd727e1b4 ! 198: STF_I st %f11, [0x01b4, %r31] |
| 11684 | ibp_2_136: |
| 11685 | nop |
| 11686 | .word 0xe1bfdc00 ! 199: STDFA_R stda %f16, [%r0, %r31] |
| 11687 | ibp_2_137: |
| 11688 | nop |
| 11689 | ta T_CHANGE_NONHPRIV |
| 11690 | .word 0xd73fc00c ! 200: STDF_R std %f11, [%r12, %r31] |
| 11691 | .word 0x89800011 ! 201: WRTICK_R wr %r0, %r17, %tick |
| 11692 | nop |
| 11693 | nop |
| 11694 | ta T_CHANGE_PRIV |
| 11695 | wrpr %g0, %g0, %gl |
| 11696 | nop |
| 11697 | nop |
| 11698 | setx join_lbl_0_0, %g1, %g2 |
| 11699 | jmp %g2 |
| 11700 | nop |
| 11701 | fork_lbl_0_1: |
| 11702 | ta T_CHANGE_NONHPRIV |
| 11703 | setx vahole_target1, %r18, %r27 |
| 11704 | cwp_1_1: |
| 11705 | set user_data_start, %o7 |
| 11706 | .word 0x93902000 ! 1: WRPR_CWP_I wrpr %r0, 0x0000, %cwp |
| 11707 | pmu_1_2: |
| 11708 | nop |
| 11709 | ta T_CHANGE_PRIV |
| 11710 | setx 0xfffffb20fffff5f5, %g1, %g7 |
| 11711 | .word 0xa3800007 ! 2: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 11712 | .word 0xd337c000 ! 3: STQF_R - %f9, [%r0, %r31] |
| 11713 | fpinit_1_3: |
| 11714 | nop |
| 11715 | setx fp_data_quads, %r19, %r20 |
| 11716 | ldd [%r20], %f0 |
| 11717 | ldd [%r20+8], %f4 |
| 11718 | ld [%r20+16], %fsr |
| 11719 | ld [%r20+24], %r19 |
| 11720 | wr %r19, %g0, %gsr |
| 11721 | .word 0x8db00484 ! 4: FCMPLE32 fcmple32 %d0, %d4, %r6 |
| 11722 | .word 0x8d802004 ! 5: WRFPRS_I wr %r0, 0x0004, %fprs |
| 11723 | .word 0x3e800001 ! 1: BVC bvc,a <label_0x1> |
| 11724 | .word 0x8d903b51 ! 6: WRPR_PSTATE_I wrpr %r0, 0x1b51, %pstate |
| 11725 | brcommon1_1_5: |
| 11726 | nop |
| 11727 | setx common_target, %r12, %r27 |
| 11728 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 11729 | ba,a .+12 |
| 11730 | .word 0x93a7c9d2 ! 1: FDIVd fdivd %f62, %f18, %f40 |
| 11731 | ba,a .+8 |
| 11732 | jmpl %r27+0, %r27 |
| 11733 | .word 0xc3ec0022 ! 7: PREFETCHA_R prefetcha [%r16, %r2] 0x01, #one_read |
| 11734 | .word 0xe277e0b2 ! 8: STX_I stx %r17, [%r31 + 0x00b2] |
| 11735 | ibp_1_6: |
| 11736 | nop |
| 11737 | .word 0xe2dfc02a ! 9: LDXA_R ldxa [%r31, %r10] 0x01, %r17 |
| 11738 | .word 0xa5520000 ! 10: RDPR_PIL <illegal instruction> |
| 11739 | .word 0x38800001 ! 1: BGU bgu,a <label_0x1> |
| 11740 | .word 0x8d902eeb ! 11: WRPR_PSTATE_I wrpr %r0, 0x0eeb, %pstate |
| 11741 | .word 0xe537c000 ! 12: STQF_R - %f18, [%r0, %r31] |
| 11742 | .word 0xe48008a0 ! 13: LDUWA_R lduwa [%r0, %r0] 0x45, %r18 |
| 11743 | .word 0x99520000 ! 14: RDPR_PIL <illegal instruction> |
| 11744 | mondo_1_8: |
| 11745 | nop |
| 11746 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 11747 | ta T_CHANGE_PRIV |
| 11748 | stxa %r2, [%r0+0x3e8] %asi |
| 11749 | .word 0x9d91000d ! 15: WRPR_WSTATE_R wrpr %r4, %r13, %wstate |
| 11750 | jmptr_1_9: |
| 11751 | nop |
| 11752 | best_set_reg(0xe0200000, %r20, %r27) |
| 11753 | .word 0xb7c6c000 ! 16: JMPL_R jmpl %r27 + %r0, %r27 |
| 11754 | #if (defined SPC || defined CMP1) |
| 11755 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_10) + 24, 16, 16)) -> intp(5,0,28) |
| 11756 | #else |
| 11757 | setx 0x6c068b38f1aa8590, %r1, %r28 |
| 11758 | stxa %r28, [%g0] 0x73 |
| 11759 | #endif |
| 11760 | intvec_1_10: |
| 11761 | .word 0x39400001 ! 17: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 11762 | nop |
| 11763 | ta T_CHANGE_HPRIV ! macro |
| 11764 | donret_1_11: |
| 11765 | rd %pc, %r12 |
| 11766 | add %r12, (donretarg_1_11-donret_1_11+4), %r12 |
| 11767 | add %r12, 0x4, %r11 ! seq tnpc |
| 11768 | wrpr %g0, 0x2, %tl |
| 11769 | wrpr %g0, %r12, %tpc |
| 11770 | wrpr %g0, %r11, %tnpc |
| 11771 | set (0x001f7300 | (0x55 << 24)), %r13 |
| 11772 | and %r12, 0xfff, %r14 |
| 11773 | sllx %r14, 30, %r14 |
| 11774 | or %r13, %r14, %r20 |
| 11775 | wrpr %r20, %g0, %tstate |
| 11776 | wrhpr %g0, 0x10cd, %htstate |
| 11777 | ta T_CHANGE_NONPRIV ! rand=0 (1) |
| 11778 | .word 0x22800001 ! 1: BE be,a <label_0x1> |
| 11779 | done |
| 11780 | donretarg_1_11: |
| 11781 | .word 0xd8ffe138 ! 18: SWAPA_I swapa %r12, [%r31 + 0x0138] %asi |
| 11782 | splash_hpstate_1_12: |
| 11783 | .word 0x81983c4d ! 19: WRHPR_HPSTATE_I wrhpr %r0, 0x1c4d, %hpstate |
| 11784 | .word 0xab804014 ! 20: WR_CLEAR_SOFTINT_R wr %r1, %r20, %clear_softint |
| 11785 | splash_cmpr_1_13: |
| 11786 | mov 0, %r18 |
| 11787 | sllx %r18, 63, %r18 |
| 11788 | rd %tick, %r17 |
| 11789 | add %r17, 0x70, %r17 |
| 11790 | or %r17, %r18, %r17 |
| 11791 | ta T_CHANGE_HPRIV |
| 11792 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 11793 | ta T_CHANGE_PRIV |
| 11794 | .word 0xb3800011 ! 21: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 11795 | trapasi_1_14: |
| 11796 | nop |
| 11797 | mov 0x10, %r1 ! (VA for ASI 0x4c) |
| 11798 | .word 0xd8d84980 ! 22: LDXA_R ldxa [%r1, %r0] 0x4c, %r12 |
| 11799 | .word 0xd8c7e0b8 ! 23: LDSWA_I ldswa [%r31, + 0x00b8] %asi, %r12 |
| 11800 | .word 0x8d9033d1 ! 24: WRPR_PSTATE_I wrpr %r0, 0x13d1, %pstate |
| 11801 | nop |
| 11802 | ta T_CHANGE_HPRIV |
| 11803 | mov 0x1, %r10 |
| 11804 | set sync_thr_counter6, %r23 |
| 11805 | #ifndef SPC |
| 11806 | ldxa [%g0]0x63, %o1 |
| 11807 | and %o1, 0x38, %o1 |
| 11808 | add %o1, %r23, %r23 |
| 11809 | #endif |
| 11810 | cas [%r23],%g0,%r10 !lock |
| 11811 | brnz %r10, sma_1_16 |
| 11812 | rd %asi, %r12 |
| 11813 | wr %g0, 0x40, %asi |
| 11814 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 11815 | set 0x001a1fff, %g1 |
| 11816 | stxa %g1, [%g0 + 0x80] %asi |
| 11817 | wr %r12, %g0, %asi |
| 11818 | st %g0, [%r23] |
| 11819 | sma_1_16: |
| 11820 | ta T_CHANGE_NONHPRIV |
| 11821 | .word 0xd9e7e00d ! 25: CASA_R casa [%r31] %asi, %r13, %r12 |
| 11822 | brcommon3_1_17: |
| 11823 | nop |
| 11824 | setx common_target, %r12, %r27 |
| 11825 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 11826 | ba,a .+12 |
| 11827 | .word 0xd937c00c ! 1: STQF_R - %f12, [%r12, %r31] |
| 11828 | ba,a .+8 |
| 11829 | jmpl %r27+0, %r27 |
| 11830 | .word 0xc32fc009 ! 26: STXFSR_R st-sfr %f1, [%r9, %r31] |
| 11831 | trapasi_1_18: |
| 11832 | nop |
| 11833 | mov 0x0, %r1 ! (VA for ASI 0x73) |
| 11834 | .word 0xd8c04e60 ! 27: LDSWA_R ldswa [%r1, %r0] 0x73, %r12 |
| 11835 | ceter_1_19: |
| 11836 | nop |
| 11837 | ta T_CHANGE_HPRIV |
| 11838 | mov 7, %r17 |
| 11839 | sllx %r17, 60, %r17 |
| 11840 | mov 0x18, %r16 |
| 11841 | stxa %r17, [%r16]0x4c |
| 11842 | ta T_CHANGE_NONHPRIV |
| 11843 | .word 0xa5410000 ! 28: RDTICK rd %tick, %r18 |
| 11844 | splash_cmpr_1_20: |
| 11845 | mov 0, %r18 |
| 11846 | sllx %r18, 63, %r18 |
| 11847 | rd %tick, %r17 |
| 11848 | add %r17, 0x60, %r17 |
| 11849 | or %r17, %r18, %r17 |
| 11850 | ta T_CHANGE_HPRIV |
| 11851 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 11852 | ta T_CHANGE_PRIV |
| 11853 | .word 0xaf800011 ! 29: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 11854 | memptr_1_21: |
| 11855 | set user_data_start, %r31 |
| 11856 | .word 0x85827d27 ! 30: WRCCR_I wr %r9, 0x1d27, %ccr |
| 11857 | .word 0x9284c014 ! 31: ADDcc_R addcc %r19, %r20, %r9 |
| 11858 | .word 0xe1bfe0c0 ! 32: STDFA_I stda %f16, [0x00c0, %r31] |
| 11859 | set 0x2201, %l3 |
| 11860 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT |
| 11861 | .word 0x9bb447d0 ! 33: PDIST pdistn %d48, %d16, %d44 |
| 11862 | brcommon3_1_22: |
| 11863 | nop |
| 11864 | setx common_target, %r12, %r27 |
| 11865 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 11866 | ba,a .+12 |
| 11867 | .word 0xdb37e090 ! 1: STQF_I - %f13, [0x0090, %r31] |
| 11868 | ba,a .+8 |
| 11869 | jmpl %r27+0, %r27 |
| 11870 | .word 0xdadfc032 ! 34: LDXA_R ldxa [%r31, %r18] 0x01, %r13 |
| 11871 | .word 0xdac7e180 ! 35: LDSWA_I ldswa [%r31, + 0x0180] %asi, %r13 |
| 11872 | ibp_1_23: |
| 11873 | nop |
| 11874 | ta T_CHANGE_NONHPRIV |
| 11875 | .word 0xc1bfc2c0 ! 36: STDFA_R stda %f0, [%r0, %r31] |
| 11876 | .word 0x8d802000 ! 37: WRFPRS_I wr %r0, 0x0000, %fprs |
| 11877 | .word 0x8f902000 ! 1: WRPR_TL_I wrpr %r0, 0x0000, %tl |
| 11878 | reduce_priv_lvl_1_24: |
| 11879 | ta T_CHANGE_NONPRIV ! macro |
| 11880 | trapasi_1_25: |
| 11881 | nop |
| 11882 | mov 0x38, %r1 ! (VA for ASI 0x50) |
| 11883 | .word 0xda884a00 ! 39: LDUBA_R lduba [%r1, %r0] 0x50, %r13 |
| 11884 | brcommon1_1_26: |
| 11885 | nop |
| 11886 | setx common_target, %r12, %r27 |
| 11887 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 11888 | ba,a .+12 |
| 11889 | .word 0xc32fe140 ! 1: STXFSR_I st-sfr %f1, [0x0140, %r31] |
| 11890 | ba,a .+8 |
| 11891 | jmpl %r27+0, %r27 |
| 11892 | .word 0x95a489a4 ! 40: FDIVs fdivs %f18, %f4, %f10 |
| 11893 | ibp_1_27: |
| 11894 | nop |
| 11895 | .word 0x9f802030 ! 41: SIR sir 0x0030 |
| 11896 | .word 0xa5a000cb ! 42: FNEGd fnegd %f42, %f18 |
| 11897 | nop |
| 11898 | ta T_CHANGE_HPRIV |
| 11899 | mov 0x1+1, %r10 |
| 11900 | set sync_thr_counter5, %r23 |
| 11901 | #ifndef SPC |
| 11902 | ldxa [%g0]0x63, %o1 |
| 11903 | and %o1, 0x38, %o1 |
| 11904 | add %o1, %r23, %r23 |
| 11905 | sllx %o1, 5, %o3 !(CID*256) |
| 11906 | #endif |
| 11907 | cas [%r23],%g0,%r10 !lock |
| 11908 | brnz %r10, cwq_1_28 |
| 11909 | rd %asi, %r12 |
| 11910 | wr %g0, 0x40, %asi |
| 11911 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 11912 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 11913 | cmp %l1, 1 |
| 11914 | bne cwq_1_28 |
| 11915 | set CWQ_BASE, %l6 |
| 11916 | #ifndef SPC |
| 11917 | add %l6, %o3, %l6 |
| 11918 | #endif |
| 11919 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 11920 | best_set_reg(0x206100b0, %l1, %l2) !# Control Word |
| 11921 | sllx %l2, 32, %l2 |
| 11922 | stx %l2, [%l6 + 0x0] |
| 11923 | membar #Sync |
| 11924 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 11925 | sub %l2, 0x40, %l2 |
| 11926 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 11927 | wr %r12, %g0, %asi |
| 11928 | st %g0, [%r23] |
| 11929 | cwq_1_28: |
| 11930 | ta T_CHANGE_NONHPRIV |
| 11931 | .word 0xa5414000 ! 43: RDPC rd %pc, %r18 |
| 11932 | splash_htba_1_29: |
| 11933 | nop |
| 11934 | ta T_CHANGE_HPRIV |
| 11935 | setx 0x0000000000280000, %r11, %r12 |
| 11936 | .word 0x8b98000c ! 44: WRHPR_HTBA_R wrhpr %r0, %r12, %htba |
| 11937 | #if (defined SPC || defined CMP1) |
| 11938 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_30) + 0, 16, 16)) -> intp(6,0,9) |
| 11939 | #else |
| 11940 | setx 0xdd63da56aecfd94f, %r1, %r28 |
| 11941 | stxa %r28, [%g0] 0x73 |
| 11942 | #endif |
| 11943 | intvec_1_30: |
| 11944 | .word 0x39400001 ! 45: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 11945 | .word 0x2ecc0001 ! 1: BRGEZ brgez,a,pt %r16,<label_0xc0001> |
| 11946 | .word 0x8d903a51 ! 46: WRPR_PSTATE_I wrpr %r0, 0x1a51, %pstate |
| 11947 | ibp_1_32: |
| 11948 | nop |
| 11949 | .word 0xe1bfe000 ! 47: STDFA_I stda %f16, [0x0000, %r31] |
| 11950 | .word 0xe537c000 ! 48: STQF_R - %f18, [%r0, %r31] |
| 11951 | ibp_1_33: |
| 11952 | nop |
| 11953 | ta T_CHANGE_NONHPRIV |
| 11954 | .word 0xc19fc2c0 ! 49: LDDFA_R ldda [%r31, %r0], %f0 |
| 11955 | ibp_1_34: |
| 11956 | nop |
| 11957 | ta T_CHANGE_NONHPRIV |
| 11958 | .word 0x87aaca44 ! 50: FCMPd fcmpd %fcc<n>, %f42, %f4 |
| 11959 | .word 0x8d903309 ! 51: WRPR_PSTATE_I wrpr %r0, 0x1309, %pstate |
| 11960 | .word 0xe24fc000 ! 52: LDSB_R ldsb [%r31 + %r0], %r17 |
| 11961 | .word 0xe2c7e148 ! 53: LDSWA_I ldswa [%r31, + 0x0148] %asi, %r17 |
| 11962 | .word 0xe33fe130 ! 54: STDF_I std %f17, [0x0130, %r31] |
| 11963 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 11964 | reduce_priv_lvl_1_36: |
| 11965 | ta T_CHANGE_NONHPRIV ! macro |
| 11966 | intveclr_1_37: |
| 11967 | nop |
| 11968 | ta T_CHANGE_HPRIV |
| 11969 | setx 0x0f381914ed8e5087, %r1, %r28 |
| 11970 | stxa %r28, [%g0] 0x72 |
| 11971 | .word 0x25400001 ! 56: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 11972 | ibp_1_38: |
| 11973 | nop |
| 11974 | ta T_CHANGE_NONHPRIV |
| 11975 | .word 0xe2bfc02d ! 57: STDA_R stda %r17, [%r31 + %r13] 0x01 |
| 11976 | .word 0xa9524000 ! 58: RDPR_CWP <illegal instruction> |
| 11977 | ibp_1_39: |
| 11978 | nop |
| 11979 | ta T_CHANGE_NONHPRIV |
| 11980 | .word 0xc19fdf20 ! 59: LDDFA_R ldda [%r31, %r0], %f0 |
| 11981 | mondo_1_40: |
| 11982 | nop |
| 11983 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 11984 | stxa %r18, [%r0+0x3e0] %asi |
| 11985 | .word 0x9d94000c ! 60: WRPR_WSTATE_R wrpr %r16, %r12, %wstate |
| 11986 | ibp_1_41: |
| 11987 | nop |
| 11988 | .word 0xe1bfe0c0 ! 61: STDFA_I stda %f16, [0x00c0, %r31] |
| 11989 | .word 0xe8dfe140 ! 62: LDXA_I ldxa [%r31, + 0x0140] %asi, %r20 |
| 11990 | .word 0x879b4011 ! 63: WRHPR_HINTP_R wrhpr %r13, %r17, %hintp |
| 11991 | #if (defined SPC || defined CMP1) |
| 11992 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_42) + 8, 16, 16)) -> intp(5,0,7) |
| 11993 | #else |
| 11994 | setx 0x08faf5479792fcb0, %r1, %r28 |
| 11995 | stxa %r28, [%g0] 0x73 |
| 11996 | #endif |
| 11997 | intvec_1_42: |
| 11998 | .word 0x39400001 ! 64: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 11999 | .word 0xc19fdc00 ! 65: LDDFA_R ldda [%r31, %r0], %f0 |
| 12000 | ibp_1_44: |
| 12001 | nop |
| 12002 | .word 0xe19fe1a0 ! 66: LDDFA_I ldda [%r31, 0x01a0], %f16 |
| 12003 | ibp_1_45: |
| 12004 | nop |
| 12005 | .word 0xe8bfc034 ! 67: STDA_R stda %r20, [%r31 + %r20] 0x01 |
| 12006 | .word 0xe927e09d ! 68: STF_I st %f20, [0x009d, %r31] |
| 12007 | mondo_1_46: |
| 12008 | nop |
| 12009 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 12010 | ta T_CHANGE_PRIV |
| 12011 | stxa %r4, [%r0+0x3c8] %asi |
| 12012 | .word 0x9d940011 ! 69: WRPR_WSTATE_R wrpr %r16, %r17, %wstate |
| 12013 | .word 0xb1828014 ! 70: WR_STICK_REG_R wr %r10, %r20, %- |
| 12014 | br_badelay3_1_47: |
| 12015 | .word 0x32800001 ! 1: BNE bne,a <label_0x1> |
| 12016 | .word 0x20800001 ! 1: BN bn,a <label_0x1> |
| 12017 | .word 0xe5150004 ! 1: LDQF_R - [%r20, %r4], %f18 |
| 12018 | .word 0xa5a4c826 ! 71: FADDs fadds %f19, %f6, %f18 |
| 12019 | fpinit_1_48: |
| 12020 | nop |
| 12021 | setx fp_data_quads, %r19, %r20 |
| 12022 | ldd [%r20], %f0 |
| 12023 | ldd [%r20+8], %f4 |
| 12024 | ld [%r20+16], %fsr |
| 12025 | ld [%r20+24], %r19 |
| 12026 | wr %r19, %g0, %gsr |
| 12027 | .word 0x89b00484 ! 72: FCMPLE32 fcmple32 %d0, %d4, %r4 |
| 12028 | brcommon2_1_49: |
| 12029 | nop |
| 12030 | setx common_target, %r12, %r27 |
| 12031 | ba,a .+12 |
| 12032 | .word 0x9f8020d0 ! 1: SIR sir 0x00d0 |
| 12033 | ba,a .+8 |
| 12034 | jmpl %r27+0, %r27 |
| 12035 | .word 0xe19fe180 ! 73: LDDFA_I ldda [%r31, 0x0180], %f16 |
| 12036 | #if (defined SPC || defined CMP1) |
| 12037 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_50) + 8, 16, 16)) -> intp(0,0,30) |
| 12038 | #else |
| 12039 | setx 0x02877ccd6f903ca2, %r1, %r28 |
| 12040 | stxa %r28, [%g0] 0x73 |
| 12041 | #endif |
| 12042 | intvec_1_50: |
| 12043 | .word 0x39400001 ! 74: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 12044 | .word 0xc32fc000 ! 75: STXFSR_R st-sfr %f1, [%r0, %r31] |
| 12045 | intveclr_1_51: |
| 12046 | nop |
| 12047 | ta T_CHANGE_HPRIV |
| 12048 | setx 0xd2ed19b2ec5607eb, %r1, %r28 |
| 12049 | stxa %r28, [%g0] 0x72 |
| 12050 | ta T_CHANGE_NONHPRIV |
| 12051 | .word 0x25400001 ! 76: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 12052 | brcommon3_1_52: |
| 12053 | nop |
| 12054 | setx common_target, %r12, %r27 |
| 12055 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 12056 | ba,a .+12 |
| 12057 | .word 0xdb37e1e0 ! 1: STQF_I - %f13, [0x01e0, %r31] |
| 12058 | ba,a .+8 |
| 12059 | jmpl %r27+0, %r27 |
| 12060 | .word 0xdb1fe1d0 ! 77: LDDF_I ldd [%r31, 0x01d0], %f13 |
| 12061 | .word 0xa984c012 ! 78: WR_SET_SOFTINT_R wr %r19, %r18, %set_softint |
| 12062 | .word 0x30800001 ! 1: BA ba,a <label_0x1> |
| 12063 | .word 0x8d903c58 ! 79: WRPR_PSTATE_I wrpr %r0, 0x1c58, %pstate |
| 12064 | splash_lsu_1_54: |
| 12065 | nop |
| 12066 | ta T_CHANGE_HPRIV |
| 12067 | set 0x2c1d02d2, %r2 |
| 12068 | mov 0x4, %r1 |
| 12069 | sllx %r1, 32, %r1 |
| 12070 | or %r1, %r2, %r2 |
| 12071 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 12072 | ta T_CHANGE_NONHPRIV |
| 12073 | .word 0x3d400001 ! 80: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 12074 | splash_lsu_1_55: |
| 12075 | nop |
| 12076 | ta T_CHANGE_HPRIV |
| 12077 | set 0x785525e4, %r2 |
| 12078 | mov 0x4, %r1 |
| 12079 | sllx %r1, 32, %r1 |
| 12080 | or %r1, %r2, %r2 |
| 12081 | stxa %r2, [%r0] ASI_LSU_CONTROL |
| 12082 | .word 0x3d400001 ! 81: FBPULE fbule,a,pn %fcc0, <label_0x1> |
| 12083 | nop |
| 12084 | ta T_CHANGE_HPRIV ! macro |
| 12085 | donret_1_56: |
| 12086 | rd %pc, %r12 |
| 12087 | add %r12, (donretarg_1_56-donret_1_56+4), %r12 |
| 12088 | add %r12, 0x4, %r11 ! seq tnpc |
| 12089 | wrpr %g0, 0x1, %tl |
| 12090 | wrpr %g0, %r12, %tpc |
| 12091 | wrpr %g0, %r11, %tnpc |
| 12092 | set (0x008a1600 | (0x88 << 24)), %r13 |
| 12093 | and %r12, 0xfff, %r14 |
| 12094 | sllx %r14, 30, %r14 |
| 12095 | or %r13, %r14, %r20 |
| 12096 | wrpr %r20, %g0, %tstate |
| 12097 | wrhpr %g0, 0x1c85, %htstate |
| 12098 | ta T_CHANGE_NONHPRIV ! rand=1 (1) |
| 12099 | retry |
| 12100 | donretarg_1_56: |
| 12101 | .word 0x97a109d4 ! 82: FDIVd fdivd %f4, %f20, %f42 |
| 12102 | .word 0x8f902001 ! 1: WRPR_TL_I wrpr %r0, 0x0001, %tl |
| 12103 | reduce_priv_lvl_1_57: |
| 12104 | ta T_CHANGE_NONHPRIV ! macro |
| 12105 | dvapa_1_58: |
| 12106 | nop |
| 12107 | ta T_CHANGE_HPRIV |
| 12108 | mov 0xd82, %r20 |
| 12109 | mov 0x19, %r19 |
| 12110 | sllx %r20, 23, %r20 |
| 12111 | or %r19, %r20, %r19 |
| 12112 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 12113 | mov 0x38, %r18 |
| 12114 | stxa %r31, [%r18]0x58 |
| 12115 | ta T_CHANGE_NONHPRIV |
| 12116 | .word 0x99703b3e ! 84: POPC_I popc 0x1b3e, %r12 |
| 12117 | nop |
| 12118 | ta T_CHANGE_HPRIV ! macro |
| 12119 | donret_1_59: |
| 12120 | rd %pc, %r12 |
| 12121 | add %r12, (donretarg_1_59-donret_1_59), %r12 |
| 12122 | add %r12, 0x8, %r11 ! nonseq tnpc |
| 12123 | wrpr %g0, 0x2, %tl |
| 12124 | wrpr %g0, %r12, %tpc |
| 12125 | wrpr %g0, %r11, %tnpc |
| 12126 | set (0x00ca6800 | (4 << 24)), %r13 |
| 12127 | and %r12, 0xfff, %r14 |
| 12128 | sllx %r14, 30, %r14 |
| 12129 | or %r13, %r14, %r20 |
| 12130 | wrpr %r20, %g0, %tstate |
| 12131 | wrhpr %g0, 0xe1b, %htstate |
| 12132 | ta T_CHANGE_NONPRIV ! rand=0 (1) |
| 12133 | .word 0x3c800001 ! 1: BPOS bpos,a <label_0x1> |
| 12134 | done |
| 12135 | donretarg_1_59: |
| 12136 | .word 0xd86fe17b ! 85: LDSTUB_I ldstub %r12, [%r31 + 0x017b] |
| 12137 | trapasi_1_60: |
| 12138 | nop |
| 12139 | mov 0x30, %r1 ! (VA for ASI 0x5b) |
| 12140 | .word 0xd8d04b60 ! 86: LDSHA_R ldsha [%r1, %r0] 0x5b, %r12 |
| 12141 | otherw |
| 12142 | mov 0xb2, %r30 |
| 12143 | .word 0x91d0001e ! 87: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 12144 | pmu_1_61: |
| 12145 | nop |
| 12146 | setx 0xfffffb00fffffe64, %g1, %g7 |
| 12147 | .word 0xa3800007 ! 88: WR_PERF_COUNTER_R wr %r0, %r7, %- |
| 12148 | .word 0x89800011 ! 89: WRTICK_R wr %r0, %r17, %tick |
| 12149 | dvapa_1_63: |
| 12150 | nop |
| 12151 | ta T_CHANGE_HPRIV |
| 12152 | mov 0xbf8, %r20 |
| 12153 | mov 0x0, %r19 |
| 12154 | sllx %r20, 23, %r20 |
| 12155 | or %r19, %r20, %r19 |
| 12156 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 12157 | mov 0x38, %r18 |
| 12158 | stxa %r31, [%r18]0x58 |
| 12159 | ta T_CHANGE_NONHPRIV |
| 12160 | .word 0xd91fc012 ! 90: LDDF_R ldd [%r31, %r18], %f12 |
| 12161 | .word 0xd857e150 ! 91: LDSH_I ldsh [%r31 + 0x0150], %r12 |
| 12162 | .word 0xb1844013 ! 92: WR_STICK_REG_R wr %r17, %r19, %- |
| 12163 | .word 0xd89fd160 ! 93: LDDA_R ldda [%r31, %r0] 0x8b, %r12 |
| 12164 | splash_hpstate_1_64: |
| 12165 | .word 0x26800001 ! 1: BL bl,a <label_0x1> |
| 12166 | .word 0x81982785 ! 94: WRHPR_HPSTATE_I wrhpr %r0, 0x0785, %hpstate |
| 12167 | .word 0xc30fc000 ! 95: LDXFSR_R ld-fsr [%r31, %r0], %f1 |
| 12168 | brcommon1_1_65: |
| 12169 | nop |
| 12170 | setx common_target, %r12, %r27 |
| 12171 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 12172 | ba,a .+12 |
| 12173 | .word 0x99702020 ! 1: POPC_I popc 0x0020, %r12 |
| 12174 | ba,a .+8 |
| 12175 | jmpl %r27+0, %r27 |
| 12176 | .word 0x87ac0a50 ! 96: FCMPd fcmpd %fcc<n>, %f16, %f16 |
| 12177 | .word 0xd03fc014 ! 1: STD_R std %r8, [%r31 + %r20] |
| 12178 | .word 0x9f803cb7 ! 97: SIR sir 0x1cb7 |
| 12179 | intveclr_1_66: |
| 12180 | nop |
| 12181 | ta T_CHANGE_HPRIV |
| 12182 | setx 0x5ee4649da053eaa2, %r1, %r28 |
| 12183 | stxa %r28, [%g0] 0x72 |
| 12184 | ta T_CHANGE_NONHPRIV |
| 12185 | .word 0x25400001 ! 98: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 12186 | .word 0x89800011 ! 99: WRTICK_R wr %r0, %r17, %tick |
| 12187 | splash_tba_1_68: |
| 12188 | nop |
| 12189 | ta T_CHANGE_PRIV |
| 12190 | set 0x120000, %r12 |
| 12191 | .word 0x8b90000c ! 100: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 12192 | brcommon1_1_69: |
| 12193 | nop |
| 12194 | setx common_target, %r12, %r27 |
| 12195 | lduw [%r27], %r12 ! Load common dest into dcache .. |
| 12196 | ba,a .+12 |
| 12197 | .word 0xd06fe080 ! 1: LDSTUB_I ldstub %r8, [%r31 + 0x0080] |
| 12198 | ba,a .+8 |
| 12199 | jmpl %r27+0, %r27 |
| 12200 | .word 0x87ab4a53 ! 101: FCMPd fcmpd %fcc<n>, %f44, %f50 |
| 12201 | intveclr_1_70: |
| 12202 | nop |
| 12203 | ta T_CHANGE_HPRIV |
| 12204 | setx 0xeabf6b0e182504cf, %r1, %r28 |
| 12205 | stxa %r28, [%g0] 0x72 |
| 12206 | .word 0x25400001 ! 102: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 12207 | setx 0x01c0b4e792c3aee6, %r1, %r28 |
| 12208 | stxa %r28, [%g0] 0x73 |
| 12209 | intvec_1_71: |
| 12210 | .word 0x39400001 ! 103: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 12211 | nop |
| 12212 | ta T_CHANGE_HPRIV ! macro |
| 12213 | donret_1_72: |
| 12214 | rd %pc, %r12 |
| 12215 | add %r12, (donretarg_1_72-donret_1_72), %r12 |
| 12216 | add %r12, 0x8, %r11 ! nonseq tnpc |
| 12217 | wrpr %g0, 0x1, %tl |
| 12218 | wrpr %g0, %r12, %tpc |
| 12219 | wrpr %g0, %r11, %tnpc |
| 12220 | set (0x00881a00 | (20 << 24)), %r13 |
| 12221 | and %r12, 0xfff, %r14 |
| 12222 | sllx %r14, 30, %r14 |
| 12223 | or %r13, %r14, %r20 |
| 12224 | wrpr %r20, %g0, %tstate |
| 12225 | wrhpr %g0, 0x145d, %htstate |
| 12226 | ta T_CHANGE_NONHPRIV ! rand=1 (1) |
| 12227 | .word 0x3a800001 ! 1: BCC bcc,a <label_0x1> |
| 12228 | retry |
| 12229 | donretarg_1_72: |
| 12230 | .word 0x2d400001 ! 104: FBPG fbg,a,pn %fcc0, <label_0x1> |
| 12231 | intveclr_1_73: |
| 12232 | nop |
| 12233 | ta T_CHANGE_HPRIV |
| 12234 | setx 0xcf2a361a2d0f729c, %r1, %r28 |
| 12235 | stxa %r28, [%g0] 0x72 |
| 12236 | ta T_CHANGE_NONHPRIV |
| 12237 | .word 0x25400001 ! 105: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 12238 | .word 0xe19fe060 ! 106: LDDFA_I ldda [%r31, 0x0060], %f16 |
| 12239 | ta T_CHANGE_NONHPRIV |
| 12240 | .word 0x8143e011 ! 107: MEMBAR membar #LoadLoad | #Lookaside |
| 12241 | .word 0xc32fc000 ! 108: STXFSR_R st-sfr %f1, [%r0, %r31] |
| 12242 | .word 0x99a409cb ! 109: FDIVd fdivd %f16, %f42, %f12 |
| 12243 | .word 0xe1bfe140 ! 110: STDFA_I stda %f16, [0x0140, %r31] |
| 12244 | intveclr_1_77: |
| 12245 | nop |
| 12246 | ta T_CHANGE_HPRIV |
| 12247 | setx 0x4dff3640c623b393, %r1, %r28 |
| 12248 | stxa %r28, [%g0] 0x72 |
| 12249 | ta T_CHANGE_NONHPRIV |
| 12250 | .word 0x25400001 ! 111: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 12251 | splash_cmpr_1_78: |
| 12252 | mov 0, %r18 |
| 12253 | sllx %r18, 63, %r18 |
| 12254 | rd %tick, %r17 |
| 12255 | add %r17, 0x70, %r17 |
| 12256 | or %r17, %r18, %r17 |
| 12257 | ta T_CHANGE_HPRIV |
| 12258 | wrhpr %r17, %g0, %hsys_tick_cmpr |
| 12259 | ta T_CHANGE_PRIV |
| 12260 | .word 0xaf800011 ! 112: WR_TICK_CMPR_REG_R wr %r0, %r17, %- |
| 12261 | .word 0xe1bfe0c0 ! 113: STDFA_I stda %f16, [0x00c0, %r31] |
| 12262 | .word 0x99a2c9c8 ! 114: FDIVd fdivd %f42, %f8, %f12 |
| 12263 | tagged_1_80: |
| 12264 | tsubcctv %r9, 0x1ccb, %r6 |
| 12265 | .word 0xd807e060 ! 115: LDUW_I lduw [%r31 + 0x0060], %r12 |
| 12266 | .word 0x92d40010 ! 116: UMULcc_R umulcc %r16, %r16, %r9 |
| 12267 | setx 0x3a5d0b3fddad622d, %r1, %r28 |
| 12268 | stxa %r28, [%g0] 0x73 |
| 12269 | intvec_1_81: |
| 12270 | .word 0x39400001 ! 117: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 12271 | trapasi_1_82: |
| 12272 | nop |
| 12273 | mov 0x20, %r1 ! (VA for ASI 0x5a) |
| 12274 | .word 0xd2c84b40 ! 118: LDSBA_R ldsba [%r1, %r0] 0x5a, %r9 |
| 12275 | .word 0x33400001 ! 1: FBPE fbe,a,pn %fcc0, <label_0x1> |
| 12276 | .word 0x8d902050 ! 119: WRPR_PSTATE_I wrpr %r0, 0x0050, %pstate |
| 12277 | ibp_1_84: |
| 12278 | nop |
| 12279 | .word 0xd3e7e008 ! 120: CASA_R casa [%r31] %asi, %r8, %r9 |
| 12280 | nop |
| 12281 | ta T_CHANGE_HPRIV |
| 12282 | mov 0x1, %r10 |
| 12283 | set sync_thr_counter6, %r23 |
| 12284 | #ifndef SPC |
| 12285 | ldxa [%g0]0x63, %o1 |
| 12286 | and %o1, 0x38, %o1 |
| 12287 | add %o1, %r23, %r23 |
| 12288 | #endif |
| 12289 | cas [%r23],%g0,%r10 !lock |
| 12290 | brnz %r10, sma_1_85 |
| 12291 | rd %asi, %r12 |
| 12292 | wr %g0, 0x40, %asi |
| 12293 | ldxa [%g0 + ASI_SPU_MA_SYNC] %asi, %g0 |
| 12294 | set 0x001a1fff, %g1 |
| 12295 | stxa %g1, [%g0 + 0x80] %asi |
| 12296 | wr %r12, %g0, %asi |
| 12297 | st %g0, [%r23] |
| 12298 | sma_1_85: |
| 12299 | ta T_CHANGE_NONHPRIV |
| 12300 | .word 0xd3e7e011 ! 121: CASA_R casa [%r31] %asi, %r17, %r9 |
| 12301 | fpinit_1_86: |
| 12302 | nop |
| 12303 | setx fp_data_quads, %r19, %r20 |
| 12304 | ldd [%r20], %f0 |
| 12305 | ldd [%r20+8], %f4 |
| 12306 | ld [%r20+16], %fsr |
| 12307 | ld [%r20+24], %r19 |
| 12308 | wr %r19, %g0, %gsr |
| 12309 | .word 0x89a009c4 ! 122: FDIVd fdivd %f0, %f4, %f4 |
| 12310 | .word 0x91950005 ! 123: WRPR_PIL_R wrpr %r20, %r5, %pil |
| 12311 | intveclr_1_88: |
| 12312 | nop |
| 12313 | ta T_CHANGE_HPRIV |
| 12314 | setx 0x32efb51d6c5dbe5d, %r1, %r28 |
| 12315 | stxa %r28, [%g0] 0x72 |
| 12316 | .word 0x25400001 ! 124: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 12317 | mondo_1_89: |
| 12318 | nop |
| 12319 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 12320 | stxa %r16, [%r0+0x3d8] %asi |
| 12321 | .word 0x9d92400d ! 125: WRPR_WSTATE_R wrpr %r9, %r13, %wstate |
| 12322 | nop |
| 12323 | ta T_CHANGE_HPRIV ! macro |
| 12324 | donret_1_90: |
| 12325 | rd %pc, %r12 |
| 12326 | add %r12, (donretarg_1_90-donret_1_90+4), %r12 |
| 12327 | add %r12, 0x4, %r11 ! seq tnpc |
| 12328 | wrpr %g0, 0x1, %tl |
| 12329 | wrpr %g0, %r12, %tpc |
| 12330 | wrpr %g0, %r11, %tnpc |
| 12331 | set (0x00bc7800 | (0x89 << 24)), %r13 |
| 12332 | and %r12, 0xfff, %r14 |
| 12333 | sllx %r14, 30, %r14 |
| 12334 | or %r13, %r14, %r20 |
| 12335 | wrpr %r20, %g0, %tstate |
| 12336 | wrhpr %g0, 0xaf5, %htstate |
| 12337 | ta T_CHANGE_NONHPRIV ! rand=1 (1) |
| 12338 | retry |
| 12339 | donretarg_1_90: |
| 12340 | .word 0xd26fe0ed ! 126: LDSTUB_I ldstub %r9, [%r31 + 0x00ed] |
| 12341 | .word 0xd2cfe0d0 ! 127: LDSBA_I ldsba [%r31, + 0x00d0] %asi, %r9 |
| 12342 | .word 0xd23fe0f4 ! 128: STD_I std %r9, [%r31 + 0x00f4] |
| 12343 | .word 0x8d802000 ! 129: WRFPRS_I wr %r0, 0x0000, %fprs |
| 12344 | .word 0x91d02034 ! 130: Tcc_I ta icc_or_xcc, %r0 + 52 |
| 12345 | .word 0xa3520000 ! 131: RDPR_PIL <illegal instruction> |
| 12346 | mondo_1_91: |
| 12347 | nop |
| 12348 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 12349 | ta T_CHANGE_PRIV |
| 12350 | stxa %r4, [%r0+0x3c8] %asi |
| 12351 | .word 0x9d91c00d ! 132: WRPR_WSTATE_R wrpr %r7, %r13, %wstate |
| 12352 | #if (defined SPC || defined CMP1) |
| 12353 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_92) + 0, 16, 16)) -> intp(0,0,22) |
| 12354 | #else |
| 12355 | setx 0xf0023ceb31bed5e6, %r1, %r28 |
| 12356 | stxa %r28, [%g0] 0x73 |
| 12357 | #endif |
| 12358 | intvec_1_92: |
| 12359 | .word 0x39400001 ! 133: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 12360 | fpinit_1_93: |
| 12361 | nop |
| 12362 | setx fp_data_quads, %r19, %r20 |
| 12363 | ldd [%r20], %f0 |
| 12364 | ldd [%r20+8], %f4 |
| 12365 | ld [%r20+16], %fsr |
| 12366 | ld [%r20+24], %r19 |
| 12367 | wr %r19, %g0, %gsr |
| 12368 | .word 0xc3e82159 ! 134: PREFETCHA_I prefetcha [%r0, + 0x0159] %asi, #one_read |
| 12369 | invalw |
| 12370 | mov 0xb2, %r30 |
| 12371 | .word 0x91d0001e ! 135: Tcc_R ta icc_or_xcc, %r0 + %r30 |
| 12372 | .word 0xe28008a0 ! 136: LDUWA_R lduwa [%r0, %r0] 0x45, %r17 |
| 12373 | ibp_1_94: |
| 12374 | nop |
| 12375 | .word 0xc32fc00c ! 137: STXFSR_R st-sfr %f1, [%r12, %r31] |
| 12376 | nop |
| 12377 | ta T_CHANGE_HPRIV |
| 12378 | mov 0x1+1, %r10 |
| 12379 | set sync_thr_counter5, %r23 |
| 12380 | #ifndef SPC |
| 12381 | ldxa [%g0]0x63, %o1 |
| 12382 | and %o1, 0x38, %o1 |
| 12383 | add %o1, %r23, %r23 |
| 12384 | sllx %o1, 5, %o3 !(CID*256) |
| 12385 | #endif |
| 12386 | cas [%r23],%g0,%r10 !lock |
| 12387 | brnz %r10, cwq_1_95 |
| 12388 | rd %asi, %r12 |
| 12389 | wr %g0, 0x40, %asi |
| 12390 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 12391 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 12392 | cmp %l1, 1 |
| 12393 | bne cwq_1_95 |
| 12394 | set CWQ_BASE, %l6 |
| 12395 | #ifndef SPC |
| 12396 | add %l6, %o3, %l6 |
| 12397 | #endif |
| 12398 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 12399 | best_set_reg(0x206100a0, %l1, %l2) !# Control Word |
| 12400 | sllx %l2, 32, %l2 |
| 12401 | stx %l2, [%l6 + 0x0] |
| 12402 | membar #Sync |
| 12403 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 12404 | sub %l2, 0x40, %l2 |
| 12405 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 12406 | wr %r12, %g0, %asi |
| 12407 | st %g0, [%r23] |
| 12408 | cwq_1_95: |
| 12409 | ta T_CHANGE_NONHPRIV |
| 12410 | .word 0xa1414000 ! 138: RDPC rd %pc, %r16 |
| 12411 | .word 0x8780208b ! 139: WRASI_I wr %r0, 0x008b, %asi |
| 12412 | #if (defined SPC || defined CMP1) |
| 12413 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_96) + 16, 16, 16)) -> intp(6,0,24) |
| 12414 | #else |
| 12415 | setx 0xf114e007b9d8b3b9, %r1, %r28 |
| 12416 | stxa %r28, [%g0] 0x73 |
| 12417 | #endif |
| 12418 | intvec_1_96: |
| 12419 | .word 0x39400001 ! 140: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 12420 | .word 0xe0dfc030 ! 141: LDXA_R ldxa [%r31, %r16] 0x01, %r16 |
| 12421 | dvapa_1_98: |
| 12422 | nop |
| 12423 | ta T_CHANGE_HPRIV |
| 12424 | mov 0xba3, %r20 |
| 12425 | mov 0x8, %r19 |
| 12426 | sllx %r20, 23, %r20 |
| 12427 | or %r19, %r20, %r19 |
| 12428 | stxa %r19, [%g0] ASI_LSU_CONTROL |
| 12429 | mov 0x38, %r18 |
| 12430 | stxa %r31, [%r18]0x58 |
| 12431 | ta T_CHANGE_NONHPRIV |
| 12432 | .word 0xa57039ab ! 142: POPC_I popc 0x19ab, %r18 |
| 12433 | nop |
| 12434 | ta T_CHANGE_HPRIV ! macro |
| 12435 | donret_1_99: |
| 12436 | rd %pc, %r12 |
| 12437 | add %r12, (donretarg_1_99-donret_1_99+4), %r12 |
| 12438 | add %r12, 0x4, %r11 ! seq tnpc |
| 12439 | wrpr %g0, 0x2, %tl |
| 12440 | wrpr %g0, %r12, %tpc |
| 12441 | wrpr %g0, %r11, %tnpc |
| 12442 | set (0x00ff9f00 | (4 << 24)), %r13 |
| 12443 | and %r12, 0xfff, %r14 |
| 12444 | sllx %r14, 30, %r14 |
| 12445 | or %r13, %r14, %r20 |
| 12446 | wrpr %r20, %g0, %tstate |
| 12447 | wrhpr %g0, 0x15db, %htstate |
| 12448 | ta T_CHANGE_NONHPRIV ! rand=1 (1) |
| 12449 | .word 0x2d400001 ! 1: FBPG fbg,a,pn %fcc0, <label_0x1> |
| 12450 | done |
| 12451 | donretarg_1_99: |
| 12452 | .word 0x2ccc4001 ! 143: BRGZ brgz,a,pt %r17,<label_0xc4001> |
| 12453 | .word 0xe477e064 ! 144: STX_I stx %r18, [%r31 + 0x0064] |
| 12454 | .word 0x8d902404 ! 145: WRPR_PSTATE_I wrpr %r0, 0x0404, %pstate |
| 12455 | .word 0xe4800b60 ! 146: LDUWA_R lduwa [%r0, %r0] 0x5b, %r18 |
| 12456 | trapasi_1_101: |
| 12457 | nop |
| 12458 | mov 0x3f0, %r1 ! (VA for ASI 0x25) |
| 12459 | .word 0xe49044a0 ! 147: LDUHA_R lduha [%r1, %r0] 0x25, %r18 |
| 12460 | ibp_1_102: |
| 12461 | nop |
| 12462 | .word 0xe51fe190 ! 148: LDDF_I ldd [%r31, 0x0190], %f18 |
| 12463 | setx 0x0f2b43c8a42726b2, %r1, %r28 |
| 12464 | stxa %r28, [%g0] 0x73 |
| 12465 | intvec_1_103: |
| 12466 | .word 0x39400001 ! 149: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 12467 | mondo_1_104: |
| 12468 | nop |
| 12469 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 12470 | stxa %r20, [%r0+0x3c0] %asi |
| 12471 | .word 0x9d94c009 ! 150: WRPR_WSTATE_R wrpr %r19, %r9, %wstate |
| 12472 | setx 0x859640719192b054, %r1, %r28 |
| 12473 | stxa %r28, [%g0] 0x73 |
| 12474 | intvec_1_105: |
| 12475 | .word 0x39400001 ! 151: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 12476 | ibp_1_106: |
| 12477 | nop |
| 12478 | .word 0xe4bfc02b ! 152: STDA_R stda %r18, [%r31 + %r11] 0x01 |
| 12479 | trapasi_1_107: |
| 12480 | nop |
| 12481 | mov 0x0, %r1 ! (VA for ASI 0x72) |
| 12482 | .word 0xe4c84e40 ! 153: LDSBA_R ldsba [%r1, %r0] 0x72, %r18 |
| 12483 | .word 0xe5e7c028 ! 1: CASA_I casa [%r31] 0x 1, %r8, %r18 |
| 12484 | .word 0x9f802385 ! 154: SIR sir 0x0385 |
| 12485 | splash_cmpr_1_108: |
| 12486 | mov 0, %r18 |
| 12487 | sllx %r18, 63, %r18 |
| 12488 | rd %tick, %r17 |
| 12489 | add %r17, 0x70, %r17 |
| 12490 | or %r17, %r18, %r17 |
| 12491 | .word 0xb3800011 ! 155: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 12492 | intveclr_1_109: |
| 12493 | nop |
| 12494 | ta T_CHANGE_HPRIV |
| 12495 | setx 0xc42712258bb746c9, %r1, %r28 |
| 12496 | stxa %r28, [%g0] 0x72 |
| 12497 | ta T_CHANGE_NONHPRIV |
| 12498 | .word 0x25400001 ! 156: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 12499 | ibp_1_110: |
| 12500 | nop |
| 12501 | .word 0xa3b407c3 ! 157: PDIST pdistn %d16, %d34, %d48 |
| 12502 | .word 0xc32fc000 ! 158: STXFSR_R st-sfr %f1, [%r0, %r31] |
| 12503 | .word 0xe1bfe120 ! 159: STDFA_I stda %f16, [0x0120, %r31] |
| 12504 | .word 0xa3b7c492 ! 1: FCMPLE32 fcmple32 %d62, %d18, %r17 |
| 12505 | .word 0x9f8026bd ! 160: SIR sir 0x06bd |
| 12506 | splash_hpstate_1_112: |
| 12507 | .word 0x35400001 ! 1: FBPUE fbue,a,pn %fcc0, <label_0x1> |
| 12508 | .word 0x819830ce ! 161: WRHPR_HPSTATE_I wrhpr %r0, 0x10ce, %hpstate |
| 12509 | .word 0xe327e0ee ! 162: STF_I st %f17, [0x00ee, %r31] |
| 12510 | .word 0x91d02032 ! 163: Tcc_I ta icc_or_xcc, %r0 + 50 |
| 12511 | mondo_1_113: |
| 12512 | nop |
| 12513 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 12514 | stxa %r8, [%r0+0x3d0] %asi |
| 12515 | .word 0x9d944014 ! 164: WRPR_WSTATE_R wrpr %r17, %r20, %wstate |
| 12516 | br_badelay2_1_114: |
| 12517 | .word 0x20800001 ! 1: BN bn,a <label_0x1> |
| 12518 | allclean |
| 12519 | .word 0x91b2030a ! 165: ALIGNADDRESS alignaddr %r8, %r10, %r8 |
| 12520 | fpinit_1_115: |
| 12521 | nop |
| 12522 | setx fp_data_quads, %r19, %r20 |
| 12523 | ldd [%r20], %f0 |
| 12524 | ldd [%r20+8], %f4 |
| 12525 | ld [%r20+16], %fsr |
| 12526 | ld [%r20+24], %r19 |
| 12527 | wr %r19, %g0, %gsr |
| 12528 | .word 0x87a80a44 ! 166: FCMPd fcmpd %fcc<n>, %f0, %f4 |
| 12529 | set 0x2e1e, %l3 |
| 12530 | stxa %l3, [%g0] ASI_SPARC_PWR_MGMT |
| 12531 | .word 0x95b507cd ! 167: PDIST pdistn %d20, %d44, %d10 |
| 12532 | memptr_1_116: |
| 12533 | set 0x60340000, %r31 |
| 12534 | .word 0x85843c6d ! 168: WRCCR_I wr %r16, 0x1c6d, %ccr |
| 12535 | .word 0xd4c7e000 ! 169: LDSWA_I ldswa [%r31, + 0x0000] %asi, %r10 |
| 12536 | setx 0x5c9ad2268ce79bb8, %r1, %r28 |
| 12537 | stxa %r28, [%g0] 0x73 |
| 12538 | intvec_1_117: |
| 12539 | .word 0x39400001 ! 170: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 12540 | splash_hpstate_1_118: |
| 12541 | .word 0x8198378d ! 171: WRHPR_HPSTATE_I wrhpr %r0, 0x178d, %hpstate |
| 12542 | mondo_1_119: |
| 12543 | nop |
| 12544 | .word 0x87802025 ! 1: WRASI_I wr %r0, 0x0025, %asi |
| 12545 | ta T_CHANGE_PRIV |
| 12546 | stxa %r5, [%r0+0x3c8] %asi |
| 12547 | .word 0x9d92400a ! 172: WRPR_WSTATE_R wrpr %r9, %r10, %wstate |
| 12548 | nop |
| 12549 | ta T_CHANGE_HPRIV |
| 12550 | mov 0x1+1, %r10 |
| 12551 | set sync_thr_counter5, %r23 |
| 12552 | #ifndef SPC |
| 12553 | ldxa [%g0]0x63, %o1 |
| 12554 | and %o1, 0x38, %o1 |
| 12555 | add %o1, %r23, %r23 |
| 12556 | sllx %o1, 5, %o3 !(CID*256) |
| 12557 | #endif |
| 12558 | cas [%r23],%g0,%r10 !lock |
| 12559 | brnz %r10, cwq_1_120 |
| 12560 | rd %asi, %r12 |
| 12561 | wr %g0, 0x40, %asi |
| 12562 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 12563 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 12564 | cmp %l1, 1 |
| 12565 | bne cwq_1_120 |
| 12566 | set CWQ_BASE, %l6 |
| 12567 | #ifndef SPC |
| 12568 | add %l6, %o3, %l6 |
| 12569 | #endif |
| 12570 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 12571 | best_set_reg(0x20610070, %l1, %l2) !# Control Word |
| 12572 | sllx %l2, 32, %l2 |
| 12573 | stx %l2, [%l6 + 0x0] |
| 12574 | membar #Sync |
| 12575 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 12576 | sub %l2, 0x40, %l2 |
| 12577 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 12578 | wr %r12, %g0, %asi |
| 12579 | st %g0, [%r23] |
| 12580 | cwq_1_120: |
| 12581 | ta T_CHANGE_NONHPRIV |
| 12582 | .word 0x95414000 ! 173: RDPC rd %pc, %r10 |
| 12583 | ibp_1_121: |
| 12584 | nop |
| 12585 | ta T_CHANGE_NONHPRIV |
| 12586 | .word 0xe1bfe060 ! 174: STDFA_I stda %f16, [0x0060, %r31] |
| 12587 | .word 0xd4800bc0 ! 175: LDUWA_R lduwa [%r0, %r0] 0x5e, %r10 |
| 12588 | .word 0x8d802000 ! 176: WRFPRS_I wr %r0, 0x0000, %fprs |
| 12589 | #if (defined SPC || defined CMP1) |
| 12590 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_122) + 0, 16, 16)) -> intp(6,0,14) |
| 12591 | #else |
| 12592 | setx 0xf84b0f844990d997, %r1, %r28 |
| 12593 | stxa %r28, [%g0] 0x73 |
| 12594 | #endif |
| 12595 | intvec_1_122: |
| 12596 | .word 0x39400001 ! 177: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 12597 | setx 0x1078ac84adc27690, %r1, %r28 |
| 12598 | stxa %r28, [%g0] 0x73 |
| 12599 | intvec_1_123: |
| 12600 | .word 0x39400001 ! 178: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 12601 | .word 0x91d02034 ! 179: Tcc_I ta icc_or_xcc, %r0 + 52 |
| 12602 | #if (defined SPC || defined CMP1) |
| 12603 | !$EV trig_pc_d(1, expr(@VA(.MAIN.intvec_1_124) + 48, 16, 16)) -> intp(0,0,5) |
| 12604 | #else |
| 12605 | setx 0x7d6f010b53f781f8, %r1, %r28 |
| 12606 | stxa %r28, [%g0] 0x73 |
| 12607 | #endif |
| 12608 | intvec_1_124: |
| 12609 | .word 0x39400001 ! 180: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 12610 | fpinit_1_125: |
| 12611 | nop |
| 12612 | setx fp_data_quads, %r19, %r20 |
| 12613 | ldd [%r20], %f0 |
| 12614 | ldd [%r20+8], %f4 |
| 12615 | ld [%r20+16], %fsr |
| 12616 | ld [%r20+24], %r19 |
| 12617 | wr %r19, %g0, %gsr |
| 12618 | .word 0xc3e83c6d ! 181: PREFETCHA_I prefetcha [%r0, + 0xfffffc6d] %asi, #one_read |
| 12619 | splash_tba_1_126: |
| 12620 | nop |
| 12621 | ta T_CHANGE_PRIV |
| 12622 | setx 0x0000000000380000, %r11, %r12 |
| 12623 | .word 0x8b90000c ! 182: WRPR_TBA_R wrpr %r0, %r12, %tba |
| 12624 | fpinit_1_127: |
| 12625 | nop |
| 12626 | setx fp_data_quads, %r19, %r20 |
| 12627 | ldd [%r20], %f0 |
| 12628 | ldd [%r20+8], %f4 |
| 12629 | ld [%r20+16], %fsr |
| 12630 | ld [%r20+24], %r19 |
| 12631 | wr %r19, %g0, %gsr |
| 12632 | .word 0x87a80a44 ! 183: FCMPd fcmpd %fcc<n>, %f0, %f4 |
| 12633 | .word 0xd4dfe058 ! 184: LDXA_I ldxa [%r31, + 0x0058] %asi, %r10 |
| 12634 | nop |
| 12635 | ta T_CHANGE_HPRIV |
| 12636 | mov 0x1+1, %r10 |
| 12637 | set sync_thr_counter5, %r23 |
| 12638 | #ifndef SPC |
| 12639 | ldxa [%g0]0x63, %o1 |
| 12640 | and %o1, 0x38, %o1 |
| 12641 | add %o1, %r23, %r23 |
| 12642 | sllx %o1, 5, %o3 !(CID*256) |
| 12643 | #endif |
| 12644 | cas [%r23],%g0,%r10 !lock |
| 12645 | brnz %r10, cwq_1_128 |
| 12646 | rd %asi, %r12 |
| 12647 | wr %g0, 0x40, %asi |
| 12648 | ldxa [%g0 + ASI_SPU_CWQ_SYNC] %asi, %l1 |
| 12649 | and %l1, 0x3, %l1 ! Check if busy/enabled .. |
| 12650 | cmp %l1, 1 |
| 12651 | bne cwq_1_128 |
| 12652 | set CWQ_BASE, %l6 |
| 12653 | #ifndef SPC |
| 12654 | add %l6, %o3, %l6 |
| 12655 | #endif |
| 12656 | stxa %l1, [%g0 + ASI_SPU_CWQ_CSR] %asi |
| 12657 | best_set_reg(0x20610080, %l1, %l2) !# Control Word |
| 12658 | sllx %l2, 32, %l2 |
| 12659 | stx %l2, [%l6 + 0x0] |
| 12660 | membar #Sync |
| 12661 | ldxa [%g0 + ASI_SPU_CWQ_HEAD] %asi, %l2 |
| 12662 | sub %l2, 0x40, %l2 |
| 12663 | stxa %l2, [%g0 + ASI_SPU_CWQ_HEAD] %asi |
| 12664 | wr %r12, %g0, %asi |
| 12665 | st %g0, [%r23] |
| 12666 | cwq_1_128: |
| 12667 | ta T_CHANGE_NONHPRIV |
| 12668 | .word 0xa5414000 ! 185: RDPC rd %pc, %r18 |
| 12669 | intveclr_1_129: |
| 12670 | nop |
| 12671 | ta T_CHANGE_HPRIV |
| 12672 | setx 0xae432c965ed94d70, %r1, %r28 |
| 12673 | stxa %r28, [%g0] 0x72 |
| 12674 | ta T_CHANGE_NONHPRIV |
| 12675 | .word 0x25400001 ! 186: FBPLG fblg,a,pn %fcc0, <label_0x1> |
| 12676 | memptr_1_130: |
| 12677 | set 0x60340000, %r31 |
| 12678 | .word 0x8582f61d ! 187: WRCCR_I wr %r11, 0x161d, %ccr |
| 12679 | .word 0x9192c013 ! 188: WRPR_PIL_R wrpr %r11, %r19, %pil |
| 12680 | .word 0xa9a00166 ! 189: FABSq dis not found |
| 12681 | |
| 12682 | .word 0xe88008a0 ! 190: LDUWA_R lduwa [%r0, %r0] 0x45, %r20 |
| 12683 | .word 0x81580000 ! 191: FLUSHW flushw |
| 12684 | splash_cmpr_1_133: |
| 12685 | mov 1, %r18 |
| 12686 | sllx %r18, 63, %r18 |
| 12687 | rd %tick, %r17 |
| 12688 | add %r17, 0x70, %r17 |
| 12689 | or %r17, %r18, %r17 |
| 12690 | ta T_CHANGE_PRIV |
| 12691 | .word 0xb3800011 ! 192: WR_STICK_CMPR_REG_R wr %r0, %r17, %- |
| 12692 | .word 0xe877c000 ! 193: STX_R stx %r20, [%r31 + %r0] |
| 12693 | ceter_1_134: |
| 12694 | nop |
| 12695 | ta T_CHANGE_HPRIV |
| 12696 | mov 7, %r17 |
| 12697 | sllx %r17, 60, %r17 |
| 12698 | mov 0x18, %r16 |
| 12699 | stxa %r17, [%r16]0x4c |
| 12700 | ta T_CHANGE_NONHPRIV |
| 12701 | .word 0x9b410000 ! 194: RDTICK rd %tick, %r13 |
| 12702 | .word 0x8d802000 ! 195: WRFPRS_I wr %r0, 0x0000, %fprs |
| 12703 | .word 0x97520000 ! 196: RDPR_PIL <illegal instruction> |
| 12704 | setx 0xdacb87ab1efbdb9c, %r1, %r28 |
| 12705 | stxa %r28, [%g0] 0x73 |
| 12706 | intvec_1_135: |
| 12707 | .word 0x39400001 ! 197: FBPUGE fbuge,a,pn %fcc0, <label_0x1> |
| 12708 | .word 0xd727e130 ! 198: STF_I st %f11, [0x0130, %r31] |
| 12709 | ibp_1_136: |
| 12710 | nop |
| 12711 | .word 0xe1bfe040 ! 199: STDFA_I stda %f16, [0x0040, %r31] |
| 12712 | ibp_1_137: |
| 12713 | nop |
| 12714 | ta T_CHANGE_NONHPRIV |
| 12715 | .word 0xd73fc009 ! 200: STDF_R std %f11, [%r9, %r31] |
| 12716 | .word 0x89800011 ! 201: WRTICK_R wr %r0, %r17, %tick |
| 12717 | nop |
| 12718 | nop |
| 12719 | ta T_CHANGE_PRIV |
| 12720 | wrpr %g0, %g0, %gl |
| 12721 | nop |
| 12722 | nop |
| 12723 | |
| 12724 | join_lbl_0_0: |
| 12725 | SECTION .MAIN |
| 12726 | .text |
| 12727 | diag_finish: |
| 12728 | nop |
| 12729 | nop |
| 12730 | nop |
| 12731 | ta T_CHANGE_HPRIV |
| 12732 | best_set_reg(HV_TRAP_BASE_PA, %r1, %r2) |
| 12733 | wrhpr %g2, %g0, %htba |
| 12734 | ta T_GOOD_TRAP |
| 12735 | nop |
| 12736 | nop |
| 12737 | nop |
| 12738 | .data |
| 12739 | .xword 0x0 |
| 12740 | ! fp data rs1, rs2, fsr, gsr quads .. |
| 12741 | .global fp_data_quads |
| 12742 | fp_data_quads: |
| 12743 | .xword 0x0044000000000000 |
| 12744 | .xword 0x4028000000000000 |
| 12745 | .xword 0x0fc0400400000000 |
| 12746 | .xword 0x0000000000000000 |
| 12747 | .xword 0x0041000000000000 |
| 12748 | .xword 0x4022000000000000 |
| 12749 | .xword 0x0600800000000000 |
| 12750 | .xword 0x0000000000000000 |
| 12751 | .xword 0x0220000000000000 |
| 12752 | .xword 0x4140000000000000 |
| 12753 | .xword 0x4fc0400400000000 |
| 12754 | .xword 0x0000000000000000 |
| 12755 | .xword 0x4090000000000000 |
| 12756 | .xword 0x0090000000000000 |
| 12757 | .xword 0x0f80400800000000 |
| 12758 | .xword 0x0a00000000000000 |
| 12759 | .align 128 |
| 12760 | .global user_data_start |
| 12761 | .data |
| 12762 | user_data_start: |
| 12763 | |
| 12764 | .xword 0x21f8566b2af8bb91 |
| 12765 | .xword 0x94c8b76aa71d9e6e |
| 12766 | .xword 0xe47e0306fcbf67de |
| 12767 | .xword 0x1d60598a85b18d3a |
| 12768 | .xword 0x86305c78e667ddee |
| 12769 | .xword 0xe43a8e3cbb424b57 |
| 12770 | .xword 0x81db959b279c43f4 |
| 12771 | .xword 0x04e0729f3f4c92a3 |
| 12772 | .xword 0xbb981d4db6f46e76 |
| 12773 | .xword 0x0b4e9dcef163e604 |
| 12774 | .xword 0x9e0966036e870301 |
| 12775 | .xword 0x2c9ef194a2bd385c |
| 12776 | .xword 0x56b9d04e322dfb0f |
| 12777 | .xword 0x3c43719584e30989 |
| 12778 | .xword 0xd9e6a77f2368d0c2 |
| 12779 | .xword 0x6eea1acb2cced97c |
| 12780 | .xword 0x9a619ce8861a7c22 |
| 12781 | .xword 0x07e660e0df9ace42 |
| 12782 | .xword 0xe8330ac89c1d4635 |
| 12783 | .xword 0x39952aa20753c59e |
| 12784 | .xword 0xe97899b67c1f869f |
| 12785 | .xword 0x97920d26ce975b3a |
| 12786 | .xword 0x0ad58eec79fac0eb |
| 12787 | .xword 0xc2e0b38f86f6ca33 |
| 12788 | .xword 0x0ca809ee3c4bebbf |
| 12789 | .xword 0x4f228a4a7028aad9 |
| 12790 | .xword 0x39d3b2784f3c5c8f |
| 12791 | .xword 0x478668f017017943 |
| 12792 | .xword 0xc5aacfd831065ff8 |
| 12793 | .xword 0xfa1e8b1263997f8d |
| 12794 | .xword 0x52a8b17d9695a5e3 |
| 12795 | .xword 0xad8c80ed62414b0e |
| 12796 | .xword 0x0959089ae08d2e18 |
| 12797 | .xword 0x43a6ffa0bea832e4 |
| 12798 | .xword 0xf956e5d4bfddf9a8 |
| 12799 | .xword 0x1c97f0ec9b635409 |
| 12800 | .xword 0x858c406c5f620dfa |
| 12801 | .xword 0x15eafe12696d31b0 |
| 12802 | .xword 0x10d341c291d8f769 |
| 12803 | .xword 0x5f0a648a53f33f6f |
| 12804 | .xword 0x98150a2fb0e85798 |
| 12805 | .xword 0xae3b5794a74b5018 |
| 12806 | .xword 0xc3613abfb30ae307 |
| 12807 | .xword 0x4997b7dea78346ec |
| 12808 | .xword 0x41f35bd0e9bd37d2 |
| 12809 | .xword 0xf1de0e5e9584864f |
| 12810 | .xword 0x62c55775cd8a1058 |
| 12811 | .xword 0x23ead671de4413f8 |
| 12812 | .xword 0x880b33da6a6b0250 |
| 12813 | .xword 0x3dbca1295f41058c |
| 12814 | .xword 0x09ea17ec12ca3333 |
| 12815 | .xword 0x45e8489d0720485f |
| 12816 | .xword 0x5c7c0b680797c2a2 |
| 12817 | .xword 0x65ba5022508cc192 |
| 12818 | .xword 0x6f0cd87938a04b99 |
| 12819 | .xword 0x29b0f574a089e7e7 |
| 12820 | .xword 0x1d9c304972c58563 |
| 12821 | .xword 0x5f92189c53a61b3d |
| 12822 | .xword 0x0cb5a2a46706c46d |
| 12823 | .xword 0x382f8f2a86fdb887 |
| 12824 | .xword 0x24e5859bbb2ce00d |
| 12825 | .xword 0x6cd2f49d8321a741 |
| 12826 | .xword 0x484c3c907140ca0d |
| 12827 | .xword 0xd160047fdcf93250 |
| 12828 | .xword 0x5bd8db7a774e0e0e |
| 12829 | .xword 0x4dd735668ffff9e5 |
| 12830 | .xword 0x3a3a05de452abcb4 |
| 12831 | .xword 0x784c7912cc2385d0 |
| 12832 | .xword 0xb3406bba1cb338d9 |
| 12833 | .xword 0xde0f21801010b404 |
| 12834 | .xword 0xd8d7a9a13bc01350 |
| 12835 | .xword 0xb5df4de55cd6a784 |
| 12836 | .xword 0x4e370139df4eddc8 |
| 12837 | .xword 0x289bdcb5e72cb106 |
| 12838 | .xword 0x3aa6a1b47d301f2a |
| 12839 | .xword 0x714bfd6983b611a9 |
| 12840 | .xword 0xf54cc345e176bf85 |
| 12841 | .xword 0x19dd33b58b4b7cd5 |
| 12842 | .xword 0x9ac7849e46fd07fe |
| 12843 | .xword 0x3b2d523c23c8ac49 |
| 12844 | .xword 0x4f79688d32438c07 |
| 12845 | .xword 0x2302d6962d057bea |
| 12846 | .xword 0x7133e327943efbdc |
| 12847 | .xword 0x4bec7ce31739678b |
| 12848 | .xword 0x95446d1805c1d765 |
| 12849 | .xword 0x7295b069c725c285 |
| 12850 | .xword 0x030b398f2e5d6689 |
| 12851 | .xword 0x2e357b627dc65231 |
| 12852 | .xword 0x39d8828ab49ef246 |
| 12853 | .xword 0xeb11315a09020f71 |
| 12854 | .xword 0x293e1d6df601e3d9 |
| 12855 | .xword 0x06f3394b7f50f0ba |
| 12856 | .xword 0xcd5a36ee5fae5f28 |
| 12857 | .xword 0x6c6ea67e8811864c |
| 12858 | .xword 0x4c8283303ee29eba |
| 12859 | .xword 0x23213362db73a521 |
| 12860 | .xword 0x5093c3772e291d17 |
| 12861 | .xword 0x9d6b7683e502b628 |
| 12862 | .xword 0x7837a8a5759d44bf |
| 12863 | .xword 0xefd4f6cd56c8d22c |
| 12864 | .xword 0xd283749daf7aaed1 |
| 12865 | .xword 0xe96fd346174d25da |
| 12866 | .xword 0x17a19400db327e60 |
| 12867 | .xword 0xc4e86e722055fcb4 |
| 12868 | .xword 0x597caebfff3b7ad9 |
| 12869 | .xword 0x9ae7fb00b997ec0e |
| 12870 | .xword 0x264c4ce7efdf1f5f |
| 12871 | .xword 0x1c70533b59776c29 |
| 12872 | .xword 0x525ce864fed9d594 |
| 12873 | .xword 0x914c298152fd83e8 |
| 12874 | .xword 0x34d41bcb79d53863 |
| 12875 | .xword 0xd17888ae36b73cf1 |
| 12876 | .xword 0x20347e7ef552f86f |
| 12877 | .xword 0xb023b34af682d1f6 |
| 12878 | .xword 0xd2a3c9d7b946fddf |
| 12879 | .xword 0x6901ea2f4cd5c1f0 |
| 12880 | .xword 0xdacb12d106c2c92b |
| 12881 | .xword 0x42875a5028ef5a96 |
| 12882 | .xword 0x87b58a47892b8968 |
| 12883 | .xword 0x3d93c8f4e8786607 |
| 12884 | .xword 0x113aef102e182461 |
| 12885 | .xword 0x8e340a3f6dd5f567 |
| 12886 | .xword 0xe723817ca7a8d089 |
| 12887 | .xword 0x62a72a020b32ef78 |
| 12888 | .xword 0x08455021507b2ec4 |
| 12889 | .xword 0x5e6f8d26c44941da |
| 12890 | .xword 0x006a52e7bb15d99e |
| 12891 | .xword 0x592f68270f977841 |
| 12892 | .xword 0x8b99d8b562c14c8c |
| 12893 | .xword 0x47e11a15d3987339 |
| 12894 | .xword 0x384f8b5fd443dc91 |
| 12895 | .xword 0x4c923344aa936670 |
| 12896 | .xword 0xbfbdff967f78e761 |
| 12897 | .xword 0xbb852fd50243b3bd |
| 12898 | .xword 0x8c73616ce77c8281 |
| 12899 | .xword 0xfbb6508c9db86b88 |
| 12900 | .xword 0x9a9fda5fdebf7c8e |
| 12901 | .xword 0xdf16a29507e1fe77 |
| 12902 | .xword 0xb6ba203efb9c0e8c |
| 12903 | .xword 0xd76e120e6ac0ba9f |
| 12904 | .xword 0xa440af4e5b0739c4 |
| 12905 | .xword 0x2556b1da62a421f3 |
| 12906 | .xword 0x1f60a57b2e2fad2b |
| 12907 | .xword 0xfd5fe1846fb58f99 |
| 12908 | .xword 0x5d52c69954434875 |
| 12909 | .xword 0x4dc6e4e4fe03957d |
| 12910 | .xword 0x45ee8e16e5737fdb |
| 12911 | .xword 0x80a01013fd4c961d |
| 12912 | .xword 0x8161b12c1e07641b |
| 12913 | .xword 0xa3c9ab4410e41445 |
| 12914 | .xword 0x6578828397fc17ae |
| 12915 | .xword 0xdcf475fd0f22f4f3 |
| 12916 | .xword 0xf902fff8f09241a3 |
| 12917 | .xword 0x9e771f2a8e819b5b |
| 12918 | .xword 0x88aeff09fc7a97fd |
| 12919 | .xword 0x5b7881c4c8d90e1b |
| 12920 | .xword 0x5aff434801c62d95 |
| 12921 | .xword 0xf1ce4dc4c752845d |
| 12922 | .xword 0xcb9016ba1c86bcef |
| 12923 | .xword 0x107c4711e28213f3 |
| 12924 | .xword 0xb096d81ef8c1898c |
| 12925 | .xword 0x9de78705158d0c08 |
| 12926 | .xword 0x5385babe24bba41c |
| 12927 | .xword 0xc45eab087c3bada1 |
| 12928 | .xword 0x8cbe9351afcf6a86 |
| 12929 | .xword 0x3b77690da8363b1e |
| 12930 | .xword 0x2dfa992691e64cec |
| 12931 | .xword 0xe2b0556b386f274b |
| 12932 | .xword 0xbdb542d346eff502 |
| 12933 | .xword 0xaaefefb91f2f0e9f |
| 12934 | .xword 0x413b006084faf3c3 |
| 12935 | .xword 0x07ad4f3b2e2a0813 |
| 12936 | .xword 0x3b9e4c47fe6206d3 |
| 12937 | .xword 0x1fb4525a3bf6dcfc |
| 12938 | .xword 0xaed2cafa6f00a7bf |
| 12939 | .xword 0x9f4d1080045d9c65 |
| 12940 | .xword 0x980e0d555c4ea2cf |
| 12941 | .xword 0x940fe7ac0ce74f57 |
| 12942 | .xword 0xae28ca6d3d506fc1 |
| 12943 | .xword 0x31363d27148a2ac5 |
| 12944 | .xword 0x9b3ada4ca6eb65c8 |
| 12945 | .xword 0x2a6d6e578f00dad3 |
| 12946 | .xword 0x712e5ea20232e484 |
| 12947 | .xword 0x94cdd8242abd1426 |
| 12948 | .xword 0x94dcfe4290bf28c5 |
| 12949 | .xword 0xc7190e427478ff8b |
| 12950 | .xword 0x46221a47ad75d28b |
| 12951 | .xword 0x9070a28c2f33997f |
| 12952 | .xword 0x80d8410e3542b941 |
| 12953 | .xword 0x046b7dd31f9fb843 |
| 12954 | .xword 0x589e7eff6ba255ad |
| 12955 | .xword 0xafee310004a8e420 |
| 12956 | .xword 0x011118df8647f044 |
| 12957 | .xword 0x65f7c3417f7a438d |
| 12958 | .xword 0x583e9162b82221f9 |
| 12959 | .xword 0xa2c8b904056a1907 |
| 12960 | .xword 0xbd5d2f3c1850fbdb |
| 12961 | .xword 0x9ce29defe953d99f |
| 12962 | .xword 0x4d502eb02d5dc69d |
| 12963 | .xword 0x516714160d6daece |
| 12964 | .xword 0x1f6e52a0eea2ec4b |
| 12965 | .xword 0x84df4d01c5fc3636 |
| 12966 | .xword 0xc837d6ae1ec81e06 |
| 12967 | .xword 0x9317053be57a7bda |
| 12968 | .xword 0x2928ec2ecf975615 |
| 12969 | .xword 0x669eb9a284f5abc3 |
| 12970 | .xword 0xe3108e93af8fcf9c |
| 12971 | .xword 0xf127d94e16b9d8be |
| 12972 | .xword 0x0e2b180258bac317 |
| 12973 | .xword 0x6fc53b48cf0b35f4 |
| 12974 | .xword 0xab02f4efe06ddee6 |
| 12975 | .xword 0x229852a247c650bb |
| 12976 | .xword 0xa861aec2bc5230f0 |
| 12977 | .xword 0x98267fcc7a37865f |
| 12978 | .xword 0x3c1c3ea5400c215c |
| 12979 | .xword 0x4d48a1c54a662437 |
| 12980 | .xword 0x42929bcd2ca1e139 |
| 12981 | .xword 0x12a2c5dc5aaa0355 |
| 12982 | .xword 0x4dde1187249e0657 |
| 12983 | .xword 0xa38f282e5bda499c |
| 12984 | .xword 0x1acb145c5183d2aa |
| 12985 | .xword 0x35d43f90f891bb3e |
| 12986 | .xword 0x72f93235e1e91320 |
| 12987 | .xword 0xa3cad95b99567f95 |
| 12988 | .xword 0x7aa93ae254d51552 |
| 12989 | .xword 0x90a221863450117a |
| 12990 | .xword 0xe6aef7e307ebe875 |
| 12991 | .xword 0x7becce2ccbdec588 |
| 12992 | .xword 0x7903cb0b85ae0311 |
| 12993 | .xword 0xd8aaea179e0317f2 |
| 12994 | .xword 0x1718c72f834db915 |
| 12995 | .xword 0xc8f6cf1e046f082f |
| 12996 | .xword 0x38e50d8233c6a34f |
| 12997 | .xword 0x6902e060c10044bb |
| 12998 | .xword 0xff9d26c06f8ecc98 |
| 12999 | .xword 0x5cef57a0a5f9b022 |
| 13000 | .xword 0x42fec29fcc09a3dc |
| 13001 | .xword 0xef9e2cb0f04b028e |
| 13002 | .xword 0x26907535ffcadb6f |
| 13003 | .xword 0x387670fdb6270de1 |
| 13004 | .xword 0xa1421bb1cc758d59 |
| 13005 | .xword 0xa5beb2120912f110 |
| 13006 | .xword 0x4065a663879ab163 |
| 13007 | .xword 0xdbf567cc9e0d7f91 |
| 13008 | .xword 0x3c9cee0f576ebf7c |
| 13009 | .xword 0x0ef3c7dd780075c0 |
| 13010 | .xword 0x6b7bc46c9cdcbd98 |
| 13011 | .xword 0x2835d89db5d82997 |
| 13012 | .xword 0x27ebb0a9540d711c |
| 13013 | .xword 0xe226f3a4c3a5cee3 |
| 13014 | .xword 0xe3816774cb145e2f |
| 13015 | .xword 0xd5988bdb4982bcf9 |
| 13016 | .xword 0xa5288241aab06a2e |
| 13017 | .xword 0xa84c7e6a4c7d24c6 |
| 13018 | .xword 0xf051019ce4de90e8 |
| 13019 | .xword 0x6db01efffad72ec4 |
| 13020 | |
| 13021 | SECTION .HTRAPS |
| 13022 | .text |
| 13023 | .global restore_range_regs |
| 13024 | restore_range_regs: |
| 13025 | wr %g0, ASI_MMU_REAL_RANGE, %asi |
| 13026 | mov 1, %g1 |
| 13027 | sllx %g1, 63, %g1 |
| 13028 | ldxa [ASI_MMU_REAL_RANGE_0] %asi, %g2 |
| 13029 | or %g2 ,%g1, %g2 |
| 13030 | stxa %g2, [ASI_MMU_REAL_RANGE_0] %asi |
| 13031 | ldxa [ASI_MMU_REAL_RANGE_1] %asi, %g2 |
| 13032 | or %g2 ,%g1, %g2 |
| 13033 | stxa %g2, [ASI_MMU_REAL_RANGE_1] %asi |
| 13034 | ldxa [ASI_MMU_REAL_RANGE_2] %asi, %g2 |
| 13035 | or %g2 ,%g1, %g2 |
| 13036 | stxa %g2, [ASI_MMU_REAL_RANGE_2] %asi |
| 13037 | ldxa [ASI_MMU_REAL_RANGE_3] %asi, %g2 |
| 13038 | or %g2 ,%g1, %g2 |
| 13039 | stxa %g2, [ASI_MMU_REAL_RANGE_3] %asi |
| 13040 | retry |
| 13041 | |
| 13042 | .global wdog_2_ext |
| 13043 | # 10 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_extensions.s" |
| 13044 | SECTION .HTRAPS |
| 13045 | .global wdog_2_ext |
| 13046 | .global retry_with_base_tba |
| 13047 | .global resolve_bad_tte |
| 13048 | |
| 13049 | .text |
| 13050 | resolve_bad_tte: |
| 13051 | !if pc[13:5]==0, then assume not a relocated handler |
| 13052 | rdpr %tpc, %r4 |
| 13053 | andn %r4, 0xf, %r4 |
| 13054 | sllx %r4, 49, %r5 |
| 13055 | brnz,a %r5, retry_with_base_tba |
| 13056 | !assume %r27 is where we came from .. |
| 13057 | fdivd %f0, %f4, %f12 |
| 13058 | jmpl %r27+8, %r0 |
| 13059 | fdivs %f0, %f4, %f12 |
| 13060 | retry_with_base_tba: |
| 13061 | best_set_reg(TRAP_BASE_VA, %r3, %r5) |
| 13062 | cmp %r4, %r5 |
| 13063 | bz htrap_5_ext_done |
| 13064 | set 0x7fff, %r3 |
| 13065 | and %r4, %r3, %r4 |
| 13066 | or %r5, %r4, %r4 |
| 13067 | wrpr %r4, %tpc |
| 13068 | rdpr %tnpc, %r4 |
| 13069 | and %r4, %r3, %r4 |
| 13070 | or %r5, %r4, %r4 |
| 13071 | wrpr %r4, %tnpc |
| 13072 | retry |
| 13073 | |
| 13074 | htrap_5_ext: |
| 13075 | rd %pc, %l2 |
| 13076 | inc %l3 |
| 13077 | add %l2, htrap_5_ext_done-htrap_5_ext, %l2 |
| 13078 | rdpr %tl, %l3 |
| 13079 | rdpr %tstate, %l4 |
| 13080 | rdhpr %htstate, %l5 |
| 13081 | or %l5, 0x4, %l5 |
| 13082 | inc %l3 |
| 13083 | wrpr %l3, %tl |
| 13084 | wrpr %l2, %tpc |
| 13085 | add %l2, 4, %l2 |
| 13086 | wrpr %l2, %tnpc |
| 13087 | wrpr %l4, %tstate |
| 13088 | wrhpr %l5, %htstate |
| 13089 | retry |
| 13090 | htrap_5_ext_done: |
| 13091 | done |
| 13092 | |
| 13093 | wdog_2_ext: |
| 13094 | mov 0x1f, %l1 |
| 13095 | stxa %l1, [%g0] ASI_LSU_CTL_REG |
| 13096 | ! If TT != 2, then goto trap handler |
| 13097 | rdpr %tt, %l1 |
| 13098 | cmp %l1, 0x2 |
| 13099 | bne wdog_2_goto_handler |
| 13100 | nop |
| 13101 | ! else done |
| 13102 | done |
| 13103 | wdog_2_goto_handler: |
| 13104 | rdhpr %htstate, %l3 |
| 13105 | and %l3, 0x4, %l3 ! If previously in hpriv mode, go to hpriv |
| 13106 | brnz,a %l3, wdog_2_goto_handler_1 |
| 13107 | rdhpr %htba, %l3 |
| 13108 | srlx %l1, 7, %l3 ! Send priv sw traps to priv mode .. |
| 13109 | cmp %l3, 0x2 ! 0x2 = priv sw trap, 0x3=hpriv sw trap .. |
| 13110 | be,a wdog_2_goto_handler_1 |
| 13111 | rdpr %tba, %l3 |
| 13112 | rdhpr %htba, %l3 |
| 13113 | wdog_2_goto_handler_1: |
| 13114 | sllx %l1, 5, %l1 |
| 13115 | add %l1, %l3, %l3 |
| 13116 | jmp %l3 |
| 13117 | nop |
| 13118 | # 86 "/import/n2-aus-localdir1/somePerson/n2cdmspp/verif/diag/assembly/include/tlu_custom_trap_extensions.s" |
| 13119 | ! Red mode other reset handler |
| 13120 | ! Get htba, and tt and make trap address |
| 13121 | ! Jump to trap handler .. |
| 13122 | |
| 13123 | SECTION .RED_SEC |
| 13124 | .global red_other_ext |
| 13125 | .global wdog_red_ext |
| 13126 | .text |
| 13127 | red_other_ext: |
| 13128 | ! IF TL=6, shift stack by one .. |
| 13129 | rdpr %tl, %l1 |
| 13130 | cmp %l1, 6 |
| 13131 | be start_tsa_shift |
| 13132 | nop |
| 13133 | |
| 13134 | continue_red_other: |
| 13135 | mov 0x1f, %l1 |
| 13136 | stxa %l1, [%g0] ASI_LSU_CTL_REG |
| 13137 | |
| 13138 | rdpr %tt, %l1 |
| 13139 | |
| 13140 | rdhpr %htstate, %l2 |
| 13141 | and %l2, 0x4, %l2 ! If previously in hpriv mode, go to hpriv |
| 13142 | brnz,a %l2, red_goto_handler |
| 13143 | rdhpr %htba, %l2 |
| 13144 | srlx %l1, 7, %l2 ! Send priv sw traps to priv mode .. |
| 13145 | cmp %l2, 0x2 ! 0x2 = priv sw trap, 0x3=hpriv sw trap .. |
| 13146 | be,a red_goto_handler |
| 13147 | rdpr %tba, %l2 |
| 13148 | rdhpr %htba, %l2 |
| 13149 | red_goto_handler: |
| 13150 | |
| 13151 | sllx %l1, 5, %l1 |
| 13152 | add %l1, %l2, %l2 |
| 13153 | rdhpr %hpstate, %l1 |
| 13154 | jmp %l2 |
| 13155 | wrhpr %l1, 0x20, %hpstate |
| 13156 | nop |
| 13157 | |
| 13158 | wdog_red_ext: |
| 13159 | ! Shift stack down by 1 ... |
| 13160 | rdpr %tl, %l1 |
| 13161 | cmp %l1, 6 |
| 13162 | bl wdog_end |
| 13163 | start_tsa_shift: |
| 13164 | mov 0x2, %l2 |
| 13165 | |
| 13166 | tsa_shift: |
| 13167 | wrpr %l2, %tl |
| 13168 | rdpr %tt, %l3 |
| 13169 | rdpr %tpc, %l4 |
| 13170 | rdpr %tnpc, %l5 |
| 13171 | rdpr %tstate, %l6 |
| 13172 | rdhpr %htstate, %l7 |
| 13173 | dec %l2 |
| 13174 | wrpr %l2, %tl |
| 13175 | wrpr %l3, %tt |
| 13176 | wrpr %l4, %tpc |
| 13177 | wrpr %l5, %tnpc |
| 13178 | wrpr %l6, %tstate |
| 13179 | wrhpr %l7, %htstate |
| 13180 | add %l2, 2, %l2 |
| 13181 | cmp %l2, %l1 |
| 13182 | ble tsa_shift |
| 13183 | nop |
| 13184 | tsa_shift_done: |
| 13185 | dec %l1 |
| 13186 | wrpr %l1, %tl |
| 13187 | |
| 13188 | wdog_end: |
| 13189 | ! If TT != 2, then goto trap handler |
| 13190 | rdpr %tt, %l1 |
| 13191 | |
| 13192 | cmp %l1, 0x2 |
| 13193 | bne continue_red_other |
| 13194 | nop |
| 13195 | ! else done |
| 13196 | mov 0x1f, %l1 |
| 13197 | stxa %l1, [%g0] ASI_LSU_CTL_REG |
| 13198 | done |
| 13199 | # 973 "diag.j" |
| 13200 | |
| 13201 | SECTION .CWQ_DATA DATA_VA =0x4000 |
| 13202 | attr_data { |
| 13203 | Name = .CWQ_DATA |
| 13204 | hypervisor |
| 13205 | } |
| 13206 | |
| 13207 | .data |
| 13208 | .align 16 |
| 13209 | .global msg |
| 13210 | msg: |
| 13211 | .xword 0xad32fa52374cc6ba |
| 13212 | .xword 0x4cbf52280549003a |
| 13213 | |
| 13214 | .align 16 |
| 13215 | .global results |
| 13216 | results: |
| 13217 | .xword 0xDEADBEEFDEADBEEF |
| 13218 | .xword 0xDEADBEEFDEADBEEF |
| 13219 | !# CWQ data area |
| 13220 | !# CWQ_BASE for core N is CWQ_BASE+(N*256) |
| 13221 | !# CWQ_LAST for core N is CWQ_LAST+(N*256) |
| 13222 | .align 64 |
| 13223 | .global CWQ_BASE |
| 13224 | CWQ_BASE: |
| 13225 | .xword 0xAAAAAAAAAAAAAAA |
| 13226 | .xword 0xAAAAAAAAAAAAAAA |
| 13227 | .xword 0xAAAAAAAAAAAAAAA |
| 13228 | .xword 0xAAAAAAAAAAAAAAA |
| 13229 | .xword 0xAAAAAAAAAAAAAAA |
| 13230 | .xword 0xAAAAAAAAAAAAAAA |
| 13231 | .xword 0xAAAAAAAAAAAAAAA |
| 13232 | .xword 0xAAAAAAAAAAAAAAA |
| 13233 | .xword 0xAAAAAAAAAAAAAAA |
| 13234 | .xword 0xAAAAAAAAAAAAAAA |
| 13235 | .xword 0xAAAAAAAAAAAAAAA |
| 13236 | .xword 0xAAAAAAAAAAAAAAA |
| 13237 | .xword 0xAAAAAAAAAAAAAAA |
| 13238 | .xword 0xAAAAAAAAAAAAAAA |
| 13239 | .xword 0xAAAAAAAAAAAAAAA |
| 13240 | .xword 0xAAAAAAAAAAAAAAA |
| 13241 | .xword 0xAAAAAAAAAAAAAAA |
| 13242 | .xword 0xAAAAAAAAAAAAAAA |
| 13243 | .xword 0xAAAAAAAAAAAAAAA |
| 13244 | .xword 0xAAAAAAAAAAAAAAA |
| 13245 | .xword 0xAAAAAAAAAAAAAAA |
| 13246 | .xword 0xAAAAAAAAAAAAAAA |
| 13247 | .xword 0xAAAAAAAAAAAAAAA |
| 13248 | .xword 0xAAAAAAAAAAAAAAA |
| 13249 | .global CWQ_LAST |
| 13250 | .align 64 |
| 13251 | CWQ_LAST: |
| 13252 | .word 0x0 |
| 13253 | .align 64 |
| 13254 | cwq_base1: |
| 13255 | .xword 0xAAAAAAAAAAAAAAA |
| 13256 | .xword 0xAAAAAAAAAAAAAAA |
| 13257 | .xword 0xAAAAAAAAAAAAAAA |
| 13258 | .xword 0xAAAAAAAAAAAAAAA |
| 13259 | .xword 0xAAAAAAAAAAAAAAA |
| 13260 | .xword 0xAAAAAAAAAAAAAAA |
| 13261 | .xword 0xAAAAAAAAAAAAAAA |
| 13262 | .xword 0xAAAAAAAAAAAAAAA |
| 13263 | .xword 0xAAAAAAAAAAAAAAA |
| 13264 | .xword 0xAAAAAAAAAAAAAAA |
| 13265 | .xword 0xAAAAAAAAAAAAAAA |
| 13266 | .xword 0xAAAAAAAAAAAAAAA |
| 13267 | .xword 0xAAAAAAAAAAAAAAA |
| 13268 | .xword 0xAAAAAAAAAAAAAAA |
| 13269 | .xword 0xAAAAAAAAAAAAAAA |
| 13270 | .xword 0xAAAAAAAAAAAAAAA |
| 13271 | .xword 0xAAAAAAAAAAAAAAA |
| 13272 | .xword 0xAAAAAAAAAAAAAAA |
| 13273 | .xword 0xAAAAAAAAAAAAAAA |
| 13274 | .xword 0xAAAAAAAAAAAAAAA |
| 13275 | .xword 0xAAAAAAAAAAAAAAA |
| 13276 | .xword 0xAAAAAAAAAAAAAAA |
| 13277 | .xword 0xAAAAAAAAAAAAAAA |
| 13278 | .xword 0xAAAAAAAAAAAAAAA |
| 13279 | .align 64 |
| 13280 | cwq_last1: |
| 13281 | .word 0x0 |
| 13282 | .align 64 |
| 13283 | .xword 0xAAAAAAAAAAAAAAA |
| 13284 | .xword 0xAAAAAAAAAAAAAAA |
| 13285 | .xword 0xAAAAAAAAAAAAAAA |
| 13286 | .xword 0xAAAAAAAAAAAAAAA |
| 13287 | .xword 0xAAAAAAAAAAAAAAA |
| 13288 | .xword 0xAAAAAAAAAAAAAAA |
| 13289 | .xword 0xAAAAAAAAAAAAAAA |
| 13290 | .xword 0xAAAAAAAAAAAAAAA |
| 13291 | .xword 0xAAAAAAAAAAAAAAA |
| 13292 | .xword 0xAAAAAAAAAAAAAAA |
| 13293 | .xword 0xAAAAAAAAAAAAAAA |
| 13294 | .xword 0xAAAAAAAAAAAAAAA |
| 13295 | .xword 0xAAAAAAAAAAAAAAA |
| 13296 | .xword 0xAAAAAAAAAAAAAAA |
| 13297 | .xword 0xAAAAAAAAAAAAAAA |
| 13298 | .xword 0xAAAAAAAAAAAAAAA |
| 13299 | .xword 0xAAAAAAAAAAAAAAA |
| 13300 | .xword 0xAAAAAAAAAAAAAAA |
| 13301 | .xword 0xAAAAAAAAAAAAAAA |
| 13302 | .xword 0xAAAAAAAAAAAAAAA |
| 13303 | .xword 0xAAAAAAAAAAAAAAA |
| 13304 | .xword 0xAAAAAAAAAAAAAAA |
| 13305 | .xword 0xAAAAAAAAAAAAAAA |
| 13306 | .xword 0xAAAAAAAAAAAAAAA |
| 13307 | .align 64 |
| 13308 | .word 0x0 |
| 13309 | .align 64 |
| 13310 | .xword 0xAAAAAAAAAAAAAAA |
| 13311 | .xword 0xAAAAAAAAAAAAAAA |
| 13312 | .xword 0xAAAAAAAAAAAAAAA |
| 13313 | .xword 0xAAAAAAAAAAAAAAA |
| 13314 | .xword 0xAAAAAAAAAAAAAAA |
| 13315 | .xword 0xAAAAAAAAAAAAAAA |
| 13316 | .xword 0xAAAAAAAAAAAAAAA |
| 13317 | .xword 0xAAAAAAAAAAAAAAA |
| 13318 | .xword 0xAAAAAAAAAAAAAAA |
| 13319 | .xword 0xAAAAAAAAAAAAAAA |
| 13320 | .xword 0xAAAAAAAAAAAAAAA |
| 13321 | .xword 0xAAAAAAAAAAAAAAA |
| 13322 | .xword 0xAAAAAAAAAAAAAAA |
| 13323 | .xword 0xAAAAAAAAAAAAAAA |
| 13324 | .xword 0xAAAAAAAAAAAAAAA |
| 13325 | .xword 0xAAAAAAAAAAAAAAA |
| 13326 | .xword 0xAAAAAAAAAAAAAAA |
| 13327 | .xword 0xAAAAAAAAAAAAAAA |
| 13328 | .xword 0xAAAAAAAAAAAAAAA |
| 13329 | .xword 0xAAAAAAAAAAAAAAA |
| 13330 | .xword 0xAAAAAAAAAAAAAAA |
| 13331 | .xword 0xAAAAAAAAAAAAAAA |
| 13332 | .xword 0xAAAAAAAAAAAAAAA |
| 13333 | .xword 0xAAAAAAAAAAAAAAA |
| 13334 | .align 64 |
| 13335 | .word 0x0 |
| 13336 | .align 64 |
| 13337 | .xword 0xAAAAAAAAAAAAAAA |
| 13338 | .xword 0xAAAAAAAAAAAAAAA |
| 13339 | .xword 0xAAAAAAAAAAAAAAA |
| 13340 | .xword 0xAAAAAAAAAAAAAAA |
| 13341 | .xword 0xAAAAAAAAAAAAAAA |
| 13342 | .xword 0xAAAAAAAAAAAAAAA |
| 13343 | .xword 0xAAAAAAAAAAAAAAA |
| 13344 | .xword 0xAAAAAAAAAAAAAAA |
| 13345 | .xword 0xAAAAAAAAAAAAAAA |
| 13346 | .xword 0xAAAAAAAAAAAAAAA |
| 13347 | .xword 0xAAAAAAAAAAAAAAA |
| 13348 | .xword 0xAAAAAAAAAAAAAAA |
| 13349 | .xword 0xAAAAAAAAAAAAAAA |
| 13350 | .xword 0xAAAAAAAAAAAAAAA |
| 13351 | .xword 0xAAAAAAAAAAAAAAA |
| 13352 | .xword 0xAAAAAAAAAAAAAAA |
| 13353 | .xword 0xAAAAAAAAAAAAAAA |
| 13354 | .xword 0xAAAAAAAAAAAAAAA |
| 13355 | .xword 0xAAAAAAAAAAAAAAA |
| 13356 | .xword 0xAAAAAAAAAAAAAAA |
| 13357 | .xword 0xAAAAAAAAAAAAAAA |
| 13358 | .xword 0xAAAAAAAAAAAAAAA |
| 13359 | .xword 0xAAAAAAAAAAAAAAA |
| 13360 | .xword 0xAAAAAAAAAAAAAAA |
| 13361 | .align 64 |
| 13362 | .word 0x0 |
| 13363 | .align 64 |
| 13364 | .xword 0xAAAAAAAAAAAAAAA |
| 13365 | .xword 0xAAAAAAAAAAAAAAA |
| 13366 | .xword 0xAAAAAAAAAAAAAAA |
| 13367 | .xword 0xAAAAAAAAAAAAAAA |
| 13368 | .xword 0xAAAAAAAAAAAAAAA |
| 13369 | .xword 0xAAAAAAAAAAAAAAA |
| 13370 | .xword 0xAAAAAAAAAAAAAAA |
| 13371 | .xword 0xAAAAAAAAAAAAAAA |
| 13372 | .xword 0xAAAAAAAAAAAAAAA |
| 13373 | .xword 0xAAAAAAAAAAAAAAA |
| 13374 | .xword 0xAAAAAAAAAAAAAAA |
| 13375 | .xword 0xAAAAAAAAAAAAAAA |
| 13376 | .xword 0xAAAAAAAAAAAAAAA |
| 13377 | .xword 0xAAAAAAAAAAAAAAA |
| 13378 | .xword 0xAAAAAAAAAAAAAAA |
| 13379 | .xword 0xAAAAAAAAAAAAAAA |
| 13380 | .xword 0xAAAAAAAAAAAAAAA |
| 13381 | .xword 0xAAAAAAAAAAAAAAA |
| 13382 | .xword 0xAAAAAAAAAAAAAAA |
| 13383 | .xword 0xAAAAAAAAAAAAAAA |
| 13384 | .xword 0xAAAAAAAAAAAAAAA |
| 13385 | .xword 0xAAAAAAAAAAAAAAA |
| 13386 | .xword 0xAAAAAAAAAAAAAAA |
| 13387 | .xword 0xAAAAAAAAAAAAAAA |
| 13388 | .align 64 |
| 13389 | .word 0x0 |
| 13390 | .align 64 |
| 13391 | .xword 0xAAAAAAAAAAAAAAA |
| 13392 | .xword 0xAAAAAAAAAAAAAAA |
| 13393 | .xword 0xAAAAAAAAAAAAAAA |
| 13394 | .xword 0xAAAAAAAAAAAAAAA |
| 13395 | .xword 0xAAAAAAAAAAAAAAA |
| 13396 | .xword 0xAAAAAAAAAAAAAAA |
| 13397 | .xword 0xAAAAAAAAAAAAAAA |
| 13398 | .xword 0xAAAAAAAAAAAAAAA |
| 13399 | .xword 0xAAAAAAAAAAAAAAA |
| 13400 | .xword 0xAAAAAAAAAAAAAAA |
| 13401 | .xword 0xAAAAAAAAAAAAAAA |
| 13402 | .xword 0xAAAAAAAAAAAAAAA |
| 13403 | .xword 0xAAAAAAAAAAAAAAA |
| 13404 | .xword 0xAAAAAAAAAAAAAAA |
| 13405 | .xword 0xAAAAAAAAAAAAAAA |
| 13406 | .xword 0xAAAAAAAAAAAAAAA |
| 13407 | .xword 0xAAAAAAAAAAAAAAA |
| 13408 | .xword 0xAAAAAAAAAAAAAAA |
| 13409 | .xword 0xAAAAAAAAAAAAAAA |
| 13410 | .xword 0xAAAAAAAAAAAAAAA |
| 13411 | .xword 0xAAAAAAAAAAAAAAA |
| 13412 | .xword 0xAAAAAAAAAAAAAAA |
| 13413 | .xword 0xAAAAAAAAAAAAAAA |
| 13414 | .xword 0xAAAAAAAAAAAAAAA |
| 13415 | .align 64 |
| 13416 | .word 0x0 |
| 13417 | .align 64 |
| 13418 | .xword 0xAAAAAAAAAAAAAAA |
| 13419 | .xword 0xAAAAAAAAAAAAAAA |
| 13420 | .xword 0xAAAAAAAAAAAAAAA |
| 13421 | .xword 0xAAAAAAAAAAAAAAA |
| 13422 | .xword 0xAAAAAAAAAAAAAAA |
| 13423 | .xword 0xAAAAAAAAAAAAAAA |
| 13424 | .xword 0xAAAAAAAAAAAAAAA |
| 13425 | .xword 0xAAAAAAAAAAAAAAA |
| 13426 | .xword 0xAAAAAAAAAAAAAAA |
| 13427 | .xword 0xAAAAAAAAAAAAAAA |
| 13428 | .xword 0xAAAAAAAAAAAAAAA |
| 13429 | .xword 0xAAAAAAAAAAAAAAA |
| 13430 | .xword 0xAAAAAAAAAAAAAAA |
| 13431 | .xword 0xAAAAAAAAAAAAAAA |
| 13432 | .xword 0xAAAAAAAAAAAAAAA |
| 13433 | .xword 0xAAAAAAAAAAAAAAA |
| 13434 | .xword 0xAAAAAAAAAAAAAAA |
| 13435 | .xword 0xAAAAAAAAAAAAAAA |
| 13436 | .xword 0xAAAAAAAAAAAAAAA |
| 13437 | .xword 0xAAAAAAAAAAAAAAA |
| 13438 | .xword 0xAAAAAAAAAAAAAAA |
| 13439 | .xword 0xAAAAAAAAAAAAAAA |
| 13440 | .xword 0xAAAAAAAAAAAAAAA |
| 13441 | .xword 0xAAAAAAAAAAAAAAA |
| 13442 | .align 64 |
| 13443 | .word 0x0 |
| 13444 | |
| 13445 | |
| 13446 | |
| 13447 | SECTION .MyHTRAPS_0 TEXT_VA = 0x0000000000280000, DATA_VA = 0x00000000002c0000 |
| 13448 | attr_text { |
| 13449 | Name = .MyHTRAPS_0, |
| 13450 | RA = 0x0000000000280000, |
| 13451 | PA = ra2pa(0x0000000000280000,0), |
| 13452 | part_0_ctx_zero_tsb_config_3, |
| 13453 | part_0_ctx_nonzero_tsb_config_3, |
| 13454 | TTE_G = 1, |
| 13455 | TTE_Context = 0, |
| 13456 | TTE_V = 1, |
| 13457 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 13458 | TTE_NFO = 0, |
| 13459 | TTE_IE = 0, |
| 13460 | TTE_Soft2 = 0, |
| 13461 | TTE_Diag = 0, |
| 13462 | TTE_Soft = 0, |
| 13463 | TTE_L = 0, |
| 13464 | TTE_CP = 1, |
| 13465 | TTE_CV = 1, |
| 13466 | TTE_E = 0, |
| 13467 | TTE_P = 1, |
| 13468 | TTE_W = 0, |
| 13469 | TTE_X = 0 |
| 13470 | } |
| 13471 | |
| 13472 | |
| 13473 | attr_data { |
| 13474 | Name = .MyHTRAPS_0, |
| 13475 | RA = 0x00000000002c0000, |
| 13476 | PA = ra2pa(0x00000000002c0000,0), |
| 13477 | part_0_ctx_zero_tsb_config_3, |
| 13478 | part_0_ctx_nonzero_tsb_config_3, |
| 13479 | TTE_G = 1, |
| 13480 | TTE_Context = 0, |
| 13481 | TTE_V = 1, |
| 13482 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 13483 | TTE_NFO = 0, |
| 13484 | TTE_IE = 0, |
| 13485 | TTE_Soft2 = 0, |
| 13486 | TTE_Diag = 0, |
| 13487 | TTE_Soft = 0, |
| 13488 | TTE_L = 0, |
| 13489 | TTE_CP = 1, |
| 13490 | TTE_CV = 0, |
| 13491 | TTE_E = 0, |
| 13492 | TTE_P = 1, |
| 13493 | TTE_W = 0 |
| 13494 | } |
| 13495 | |
| 13496 | .text |
| 13497 | #include "htraps.s" |
| 13498 | #include "tlu_htraps_ext.s" |
| 13499 | |
| 13500 | |
| 13501 | |
| 13502 | SECTION .MyHTRAPS_1 TEXT_VA = 0x00000000002a0000, DATA_VA = 0x00000000002e0000 |
| 13503 | attr_text { |
| 13504 | Name = .MyHTRAPS_1, |
| 13505 | RA = 0x00000000002a0000, |
| 13506 | PA = ra2pa(0x00000000002a0000,0), |
| 13507 | part_0_ctx_zero_tsb_config_3, |
| 13508 | part_0_ctx_nonzero_tsb_config_3, |
| 13509 | TTE_G = 1, |
| 13510 | TTE_Context = 0, |
| 13511 | TTE_V = 1, |
| 13512 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 13513 | TTE_NFO = 0, |
| 13514 | TTE_IE = 0, |
| 13515 | TTE_Soft2 = 0, |
| 13516 | TTE_Diag = 0, |
| 13517 | TTE_Soft = 0, |
| 13518 | TTE_L = 0, |
| 13519 | TTE_CP = 1, |
| 13520 | TTE_CV = 0, |
| 13521 | TTE_E = 0, |
| 13522 | TTE_P = 1, |
| 13523 | TTE_W = 0, |
| 13524 | TTE_X = 0 |
| 13525 | } |
| 13526 | |
| 13527 | |
| 13528 | attr_data { |
| 13529 | Name = .MyHTRAPS_1, |
| 13530 | RA = 0x00000000002e0000, |
| 13531 | PA = ra2pa(0x00000000002e0000,0), |
| 13532 | part_0_ctx_zero_tsb_config_3, |
| 13533 | part_0_ctx_nonzero_tsb_config_3, |
| 13534 | TTE_G = 1, |
| 13535 | TTE_Context = 0, |
| 13536 | TTE_V = 1, |
| 13537 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 13538 | TTE_NFO = 0, |
| 13539 | TTE_IE = 0, |
| 13540 | TTE_Soft2 = 0, |
| 13541 | TTE_Diag = 0, |
| 13542 | TTE_Soft = 0, |
| 13543 | TTE_L = 0, |
| 13544 | TTE_CP = 0, |
| 13545 | TTE_CV = 0, |
| 13546 | TTE_E = 0, |
| 13547 | TTE_P = 1, |
| 13548 | TTE_W = 0 |
| 13549 | } |
| 13550 | |
| 13551 | .text |
| 13552 | #include "htraps.s" |
| 13553 | #include "tlu_htraps_ext.s" |
| 13554 | |
| 13555 | |
| 13556 | |
| 13557 | SECTION .MyHTRAPS_2 TEXT_VA = 0x0000000200280000, DATA_VA = 0x00000002002c0000 |
| 13558 | attr_text { |
| 13559 | Name = .MyHTRAPS_2, |
| 13560 | RA = 0x0000000200280000, |
| 13561 | PA = ra2pa(0x0000000200280000,0), |
| 13562 | part_0_ctx_zero_tsb_config_3, |
| 13563 | part_0_ctx_nonzero_tsb_config_3, |
| 13564 | TTE_G = 1, |
| 13565 | TTE_Context = 0, |
| 13566 | TTE_V = 1, |
| 13567 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 13568 | TTE_NFO = 0, |
| 13569 | TTE_IE = 0, |
| 13570 | TTE_Soft2 = 0, |
| 13571 | TTE_Diag = 0, |
| 13572 | TTE_Soft = 0, |
| 13573 | TTE_L = 0, |
| 13574 | TTE_CP = 1, |
| 13575 | TTE_CV = 1, |
| 13576 | TTE_E = 0, |
| 13577 | TTE_P = 1, |
| 13578 | TTE_W = 0, |
| 13579 | TTE_X = 0 |
| 13580 | } |
| 13581 | |
| 13582 | |
| 13583 | attr_data { |
| 13584 | Name = .MyHTRAPS_2, |
| 13585 | RA = 0x00000002002c0000, |
| 13586 | PA = ra2pa(0x00000002002c0000,0), |
| 13587 | part_0_ctx_zero_tsb_config_3, |
| 13588 | part_0_ctx_nonzero_tsb_config_3, |
| 13589 | TTE_G = 1, |
| 13590 | TTE_Context = 0, |
| 13591 | TTE_V = 1, |
| 13592 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 13593 | TTE_NFO = 0, |
| 13594 | TTE_IE = 0, |
| 13595 | TTE_Soft2 = 0, |
| 13596 | TTE_Diag = 0, |
| 13597 | TTE_Soft = 0, |
| 13598 | TTE_L = 0, |
| 13599 | TTE_CP = 1, |
| 13600 | TTE_CV = 1, |
| 13601 | TTE_E = 0, |
| 13602 | TTE_P = 1, |
| 13603 | TTE_W = 0 |
| 13604 | } |
| 13605 | |
| 13606 | .text |
| 13607 | #include "htraps.s" |
| 13608 | #include "tlu_htraps_ext.s" |
| 13609 | |
| 13610 | |
| 13611 | |
| 13612 | SECTION .MyHTRAPS_3 TEXT_VA = 0x00000002002a0000, DATA_VA = 0x00000002002e0000 |
| 13613 | attr_text { |
| 13614 | Name = .MyHTRAPS_3, |
| 13615 | RA = 0x00000002002a0000, |
| 13616 | PA = ra2pa(0x00000002002a0000,0), |
| 13617 | part_0_ctx_zero_tsb_config_3, |
| 13618 | part_0_ctx_nonzero_tsb_config_3, |
| 13619 | TTE_G = 1, |
| 13620 | TTE_Context = 0, |
| 13621 | TTE_V = 1, |
| 13622 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 13623 | TTE_NFO = 0, |
| 13624 | TTE_IE = 0, |
| 13625 | TTE_Soft2 = 0, |
| 13626 | TTE_Diag = 0, |
| 13627 | TTE_Soft = 0, |
| 13628 | TTE_L = 0, |
| 13629 | TTE_CP = 0, |
| 13630 | TTE_CV = 1, |
| 13631 | TTE_E = 1, |
| 13632 | TTE_P = 1, |
| 13633 | TTE_W = 0, |
| 13634 | TTE_X = 0 |
| 13635 | } |
| 13636 | |
| 13637 | |
| 13638 | attr_data { |
| 13639 | Name = .MyHTRAPS_3, |
| 13640 | RA = 0x00000002002e0000, |
| 13641 | PA = ra2pa(0x00000002002e0000,0), |
| 13642 | part_0_ctx_zero_tsb_config_3, |
| 13643 | part_0_ctx_nonzero_tsb_config_3, |
| 13644 | TTE_G = 1, |
| 13645 | TTE_Context = 0, |
| 13646 | TTE_V = 1, |
| 13647 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 13648 | TTE_NFO = 0, |
| 13649 | TTE_IE = 0, |
| 13650 | TTE_Soft2 = 0, |
| 13651 | TTE_Diag = 0, |
| 13652 | TTE_Soft = 0, |
| 13653 | TTE_L = 0, |
| 13654 | TTE_CP = 1, |
| 13655 | TTE_CV = 1, |
| 13656 | TTE_E = 0, |
| 13657 | TTE_P = 1, |
| 13658 | TTE_W = 0 |
| 13659 | } |
| 13660 | |
| 13661 | .text |
| 13662 | #include "htraps.s" |
| 13663 | #include "tlu_htraps_ext.s" |
| 13664 | |
| 13665 | |
| 13666 | |
| 13667 | |
| 13668 | |
| 13669 | SECTION .MyTRAPS_0 TEXT_VA = 0x0000000000380000, DATA_VA = 0x00000000003c0000 |
| 13670 | attr_text { |
| 13671 | Name = .MyTRAPS_0, |
| 13672 | RA = 0x0000000000380000, |
| 13673 | PA = ra2pa(0x0000000000380000,0), |
| 13674 | part_0_ctx_zero_tsb_config_3, |
| 13675 | part_0_ctx_nonzero_tsb_config_3, |
| 13676 | TTE_G = 1, |
| 13677 | TTE_Context = 0, |
| 13678 | TTE_V = 1, |
| 13679 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 13680 | TTE_NFO = 1, |
| 13681 | TTE_IE = 0, |
| 13682 | TTE_Soft2 = 0, |
| 13683 | TTE_Diag = 0, |
| 13684 | TTE_Soft = 0, |
| 13685 | TTE_L = 0, |
| 13686 | TTE_CP = 0, |
| 13687 | TTE_CV = 0, |
| 13688 | TTE_E = 1, |
| 13689 | TTE_P = 1, |
| 13690 | TTE_W = 1, |
| 13691 | TTE_X = 1 |
| 13692 | } |
| 13693 | |
| 13694 | |
| 13695 | attr_data { |
| 13696 | Name = .MyTRAPS_0, |
| 13697 | RA = 0x00000000003c0000, |
| 13698 | PA = ra2pa(0x00000000003c0000,0), |
| 13699 | part_0_ctx_zero_tsb_config_3, |
| 13700 | part_0_ctx_nonzero_tsb_config_3, |
| 13701 | TTE_G = 1, |
| 13702 | TTE_Context = 0, |
| 13703 | TTE_V = 1, |
| 13704 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 13705 | TTE_NFO = 0, |
| 13706 | TTE_IE = 0, |
| 13707 | TTE_Soft2 = 0, |
| 13708 | TTE_Diag = 0, |
| 13709 | TTE_Soft = 0, |
| 13710 | TTE_L = 0, |
| 13711 | TTE_CP = 1, |
| 13712 | TTE_CV = 1, |
| 13713 | TTE_E = 0, |
| 13714 | TTE_P = 1, |
| 13715 | TTE_W = 0 |
| 13716 | } |
| 13717 | |
| 13718 | #include "traps.s" |
| 13719 | |
| 13720 | |
| 13721 | |
| 13722 | SECTION .MyTRAPS_1 TEXT_VA = 0x00000000003a0000, DATA_VA = 0x00000000003e0000 |
| 13723 | attr_text { |
| 13724 | Name = .MyTRAPS_1, |
| 13725 | RA = 0x00000000003a0000, |
| 13726 | PA = ra2pa(0x00000000003a0000,0), |
| 13727 | part_0_ctx_zero_tsb_config_3, |
| 13728 | part_0_ctx_nonzero_tsb_config_3, |
| 13729 | TTE_G = 1, |
| 13730 | TTE_Context = 0, |
| 13731 | TTE_V = 1, |
| 13732 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 13733 | TTE_NFO = 0, |
| 13734 | TTE_IE = 0, |
| 13735 | TTE_Soft2 = 0, |
| 13736 | TTE_Diag = 0, |
| 13737 | TTE_Soft = 0, |
| 13738 | TTE_L = 0, |
| 13739 | TTE_CP = 1, |
| 13740 | TTE_CV = 0, |
| 13741 | TTE_E = 0, |
| 13742 | TTE_P = 0, |
| 13743 | TTE_W = 1, |
| 13744 | TTE_X = 0 |
| 13745 | } |
| 13746 | |
| 13747 | |
| 13748 | attr_data { |
| 13749 | Name = .MyTRAPS_1, |
| 13750 | RA = 0x00000000003e0000, |
| 13751 | PA = ra2pa(0x00000000003e0000,0), |
| 13752 | part_0_ctx_zero_tsb_config_3, |
| 13753 | part_0_ctx_nonzero_tsb_config_3, |
| 13754 | TTE_G = 1, |
| 13755 | TTE_Context = 0, |
| 13756 | TTE_V = 1, |
| 13757 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 13758 | TTE_NFO = 0, |
| 13759 | TTE_IE = 0, |
| 13760 | TTE_Soft2 = 0, |
| 13761 | TTE_Diag = 0, |
| 13762 | TTE_Soft = 0, |
| 13763 | TTE_L = 0, |
| 13764 | TTE_CP = 0, |
| 13765 | TTE_CV = 1, |
| 13766 | TTE_E = 0, |
| 13767 | TTE_P = 1, |
| 13768 | TTE_W = 1 |
| 13769 | } |
| 13770 | |
| 13771 | #include "traps.s" |
| 13772 | |
| 13773 | |
| 13774 | |
| 13775 | SECTION .MyTRAPS_2 TEXT_VA = 0x0000000400380000, DATA_VA = 0x00000004003c0000 |
| 13776 | attr_text { |
| 13777 | Name = .MyTRAPS_2, |
| 13778 | RA = 0x0000000400380000, |
| 13779 | PA = ra2pa(0x0000000400380000,0), |
| 13780 | part_0_ctx_zero_tsb_config_3, |
| 13781 | part_0_ctx_nonzero_tsb_config_3, |
| 13782 | TTE_G = 1, |
| 13783 | TTE_Context = 0, |
| 13784 | TTE_V = 1, |
| 13785 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 13786 | TTE_NFO = 1, |
| 13787 | TTE_IE = 0, |
| 13788 | TTE_Soft2 = 0, |
| 13789 | TTE_Diag = 0, |
| 13790 | TTE_Soft = 0, |
| 13791 | TTE_L = 0, |
| 13792 | TTE_CP = 0, |
| 13793 | TTE_CV = 1, |
| 13794 | TTE_E = 1, |
| 13795 | TTE_P = 1, |
| 13796 | TTE_W = 1, |
| 13797 | TTE_X = 0 |
| 13798 | } |
| 13799 | |
| 13800 | |
| 13801 | attr_data { |
| 13802 | Name = .MyTRAPS_2, |
| 13803 | RA = 0x00000004003c0000, |
| 13804 | PA = ra2pa(0x00000004003c0000,0), |
| 13805 | part_0_ctx_zero_tsb_config_3, |
| 13806 | part_0_ctx_nonzero_tsb_config_3, |
| 13807 | TTE_G = 1, |
| 13808 | TTE_Context = 0, |
| 13809 | TTE_V = 1, |
| 13810 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 13811 | TTE_NFO = 0, |
| 13812 | TTE_IE = 0, |
| 13813 | TTE_Soft2 = 0, |
| 13814 | TTE_Diag = 0, |
| 13815 | TTE_Soft = 0, |
| 13816 | TTE_L = 0, |
| 13817 | TTE_CP = 1, |
| 13818 | TTE_CV = 0, |
| 13819 | TTE_E = 0, |
| 13820 | TTE_P = 1, |
| 13821 | TTE_W = 0 |
| 13822 | } |
| 13823 | |
| 13824 | #include "traps.s" |
| 13825 | |
| 13826 | |
| 13827 | |
| 13828 | SECTION .MyTRAPS_3 TEXT_VA = 0x00000004003a0000, DATA_VA = 0x00000004003e0000 |
| 13829 | attr_text { |
| 13830 | Name = .MyTRAPS_3, |
| 13831 | RA = 0x00000004003a0000, |
| 13832 | PA = ra2pa(0x00000004003a0000,0), |
| 13833 | part_0_ctx_zero_tsb_config_3, |
| 13834 | part_0_ctx_nonzero_tsb_config_3, |
| 13835 | TTE_G = 1, |
| 13836 | TTE_Context = 0, |
| 13837 | TTE_V = 1, |
| 13838 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 13839 | TTE_NFO = 0, |
| 13840 | TTE_IE = 0, |
| 13841 | TTE_Soft2 = 0, |
| 13842 | TTE_Diag = 0, |
| 13843 | TTE_Soft = 0, |
| 13844 | TTE_L = 0, |
| 13845 | TTE_CP = 0, |
| 13846 | TTE_CV = 1, |
| 13847 | TTE_E = 0, |
| 13848 | TTE_P = 1, |
| 13849 | TTE_W = 1, |
| 13850 | TTE_X = 0 |
| 13851 | } |
| 13852 | |
| 13853 | |
| 13854 | attr_data { |
| 13855 | Name = .MyTRAPS_3, |
| 13856 | RA = 0x00000004003e0000, |
| 13857 | PA = ra2pa(0x00000004003e0000,0), |
| 13858 | part_0_ctx_zero_tsb_config_3, |
| 13859 | part_0_ctx_nonzero_tsb_config_3, |
| 13860 | TTE_G = 1, |
| 13861 | TTE_Context = 0, |
| 13862 | TTE_V = 1, |
| 13863 | TTE_Size = PART0_Z_PAGE_SIZE_3, |
| 13864 | TTE_NFO = 1, |
| 13865 | TTE_IE = 0, |
| 13866 | TTE_Soft2 = 0, |
| 13867 | TTE_Diag = 0, |
| 13868 | TTE_Soft = 0, |
| 13869 | TTE_L = 0, |
| 13870 | TTE_CP = 1, |
| 13871 | TTE_CV = 1, |
| 13872 | TTE_E = 0, |
| 13873 | TTE_P = 1, |
| 13874 | TTE_W = 0 |
| 13875 | } |
| 13876 | |
| 13877 | #include "traps.s" |
| 13878 | |
| 13879 | |
| 13880 | |
| 13881 | |
| 13882 | |
| 13883 | SECTION .MyDATA_0 TEXT_VA = 0x00000000e0140000, DATA_VA = 0x0000000060140000 |
| 13884 | attr_data { |
| 13885 | Name = .MyDATA_0, |
| 13886 | RA = 0x0000000170100000, |
| 13887 | PA = ra2pa(0x0000000170100000,0), |
| 13888 | part_0_ctx_zero_tsb_config_0, |
| 13889 | part_0_ctx_nonzero_tsb_config_0, |
| 13890 | TTE_G = 1, |
| 13891 | TTE_Context = PCONTEXT, |
| 13892 | TTE_V = 1, |
| 13893 | TTE_Size = 3, |
| 13894 | TTE_NFO = 1, |
| 13895 | TTE_IE = 1, |
| 13896 | TTE_Soft2 = 0, |
| 13897 | TTE_Diag = 0, |
| 13898 | TTE_Soft = 0, |
| 13899 | TTE_L = 0, |
| 13900 | TTE_CP = 1, |
| 13901 | TTE_CV = 0, |
| 13902 | TTE_E = 0, |
| 13903 | TTE_P = 0, |
| 13904 | TTE_W = 1 |
| 13905 | } |
| 13906 | |
| 13907 | |
| 13908 | attr_data { |
| 13909 | Name = .MyDATA_0, |
| 13910 | RA = 0x0000000170100000, |
| 13911 | PA = ra2pa(0x0000000170100000,0), |
| 13912 | part_0_ctx_zero_tsb_config_1, |
| 13913 | part_0_ctx_nonzero_tsb_config_1, |
| 13914 | TTE_G = 1, |
| 13915 | TTE_Context = SCONTEXT, |
| 13916 | TTE_V = 1, |
| 13917 | TTE_Size = 1, |
| 13918 | TTE_NFO = 1, |
| 13919 | TTE_IE = 1, |
| 13920 | TTE_Soft2 = 0, |
| 13921 | TTE_Diag = 0, |
| 13922 | TTE_Soft = 0, |
| 13923 | TTE_L = 0, |
| 13924 | TTE_CP = 0, |
| 13925 | TTE_CV = 1, |
| 13926 | TTE_E = 0, |
| 13927 | TTE_P = 1, |
| 13928 | TTE_W = 1, |
| 13929 | tsbonly |
| 13930 | } |
| 13931 | |
| 13932 | |
| 13933 | attr_data { |
| 13934 | Name = .MyDATA_0, |
| 13935 | hypervisor |
| 13936 | } |
| 13937 | |
| 13938 | |
| 13939 | attr_text { |
| 13940 | Name = .MyDATA_0, |
| 13941 | hypervisor |
| 13942 | } |
| 13943 | |
| 13944 | .data |
| 13945 | .xword 0x61b33db28d33341f |
| 13946 | .xword 0xbd22eb45d4327bd3 |
| 13947 | .xword 0x1511920ad34a4525 |
| 13948 | .xword 0xaaf3dbe49f0f0f46 |
| 13949 | .xword 0x5ae1cf89dd3ec862 |
| 13950 | .xword 0x48f3df721b1260cf |
| 13951 | .xword 0x3da247fb523431f2 |
| 13952 | .xword 0xf2f0592ab42092d6 |
| 13953 | .xword 0x559a925074f836d3 |
| 13954 | .xword 0x0feadc2d5204e730 |
| 13955 | .xword 0xc9a763f6487702eb |
| 13956 | .xword 0xe8c02c135d301a58 |
| 13957 | .xword 0x77c569d934e657ee |
| 13958 | .xword 0xa9522012fda55ff3 |
| 13959 | .xword 0xbd1fc9f255d1c37e |
| 13960 | .xword 0xc07fa7afb4a2b251 |
| 13961 | .xword 0xadcbeb62fa27d607 |
| 13962 | .xword 0xc7dc6ebeee9c22f9 |
| 13963 | .xword 0x988d8c0e43ddd4c0 |
| 13964 | .xword 0xbe02ec558d466c1a |
| 13965 | .xword 0x1749e4a60061e722 |
| 13966 | .xword 0x12f70e2c72e0df8f |
| 13967 | .xword 0x5b5eeb1b631254bd |
| 13968 | .xword 0xf0e3a88ae7c4ae16 |
| 13969 | .xword 0x4295f2705740907c |
| 13970 | .xword 0x75fa40c22e8d3951 |
| 13971 | .xword 0xde0b6a1f82ee7b26 |
| 13972 | .xword 0xe7f9f3602aa74886 |
| 13973 | .xword 0xd921396ea8c29e52 |
| 13974 | .xword 0x20cd2074f79e1914 |
| 13975 | .xword 0xba5ab1297e212f0b |
| 13976 | .xword 0xed6458dcd879ce83 |
| 13977 | |
| 13978 | |
| 13979 | |
| 13980 | SECTION .MyDATA_1 TEXT_VA = 0x00000000e0340000, DATA_VA = 0x0000000060340000 |
| 13981 | attr_data { |
| 13982 | Name = .MyDATA_1, |
| 13983 | RA = 0x0000000170300000, |
| 13984 | PA = ra2pa(0x0000000170300000,0), |
| 13985 | part_0_ctx_zero_tsb_config_0, |
| 13986 | part_0_ctx_nonzero_tsb_config_0, |
| 13987 | TTE_G = 1, |
| 13988 | TTE_Context = PCONTEXT, |
| 13989 | TTE_V = 1, |
| 13990 | TTE_Size = 3, |
| 13991 | TTE_NFO = 1, |
| 13992 | TTE_IE = 1, |
| 13993 | TTE_Soft2 = 0, |
| 13994 | TTE_Diag = 0, |
| 13995 | TTE_Soft = 0, |
| 13996 | TTE_L = 0, |
| 13997 | TTE_CP = 0, |
| 13998 | TTE_CV = 0, |
| 13999 | TTE_E = 1, |
| 14000 | TTE_P = 1, |
| 14001 | TTE_W = 1 |
| 14002 | } |
| 14003 | |
| 14004 | |
| 14005 | attr_data { |
| 14006 | Name = .MyDATA_1, |
| 14007 | RA = 0x0000000170300000, |
| 14008 | PA = ra2pa(0x0000000170300000,0), |
| 14009 | part_0_ctx_zero_tsb_config_1, |
| 14010 | part_0_ctx_nonzero_tsb_config_1, |
| 14011 | TTE_G = 1, |
| 14012 | TTE_Context = SCONTEXT, |
| 14013 | TTE_V = 1, |
| 14014 | TTE_Size = 3, |
| 14015 | TTE_NFO = 1, |
| 14016 | TTE_IE = 0, |
| 14017 | TTE_Soft2 = 0, |
| 14018 | TTE_Diag = 0, |
| 14019 | TTE_Soft = 0, |
| 14020 | TTE_L = 0, |
| 14021 | TTE_CP = 0, |
| 14022 | TTE_CV = 0, |
| 14023 | TTE_E = 0, |
| 14024 | TTE_P = 1, |
| 14025 | TTE_W = 0, |
| 14026 | tsbonly |
| 14027 | } |
| 14028 | |
| 14029 | |
| 14030 | attr_data { |
| 14031 | Name = .MyDATA_1, |
| 14032 | hypervisor |
| 14033 | } |
| 14034 | |
| 14035 | |
| 14036 | attr_text { |
| 14037 | Name = .MyDATA_1, |
| 14038 | hypervisor |
| 14039 | } |
| 14040 | |
| 14041 | .data |
| 14042 | .xword 0x6e643fc2ec132885 |
| 14043 | .xword 0x9d8ec8a15266c305 |
| 14044 | .xword 0xc2cfc08507a4d95c |
| 14045 | .xword 0x408567d645c40caf |
| 14046 | .xword 0xcb6fd35473ecda3d |
| 14047 | .xword 0xf170e21610a2e133 |
| 14048 | .xword 0x94ed11fcfcacef89 |
| 14049 | .xword 0xb37d9a57254e0aef |
| 14050 | .xword 0x019fac13dad53cf8 |
| 14051 | .xword 0x7cb7e5a2a82583ef |
| 14052 | .xword 0x96ad64814de3209b |
| 14053 | .xword 0x9e4e28e8a3c4afdb |
| 14054 | .xword 0x178a891b9a562796 |
| 14055 | .xword 0x54b6d192627c1eec |
| 14056 | .xword 0xc4b4eb00baf7f0b3 |
| 14057 | .xword 0x92549a90116f00cd |
| 14058 | .xword 0x3dc68dad091982cf |
| 14059 | .xword 0x8cf7111d512fc756 |
| 14060 | .xword 0x40954eec289f2226 |
| 14061 | .xword 0x9c03a7522c0a0472 |
| 14062 | .xword 0x3a6b4d4f103be92f |
| 14063 | .xword 0xdf117afbaee45a84 |
| 14064 | .xword 0x1eaad4edbc3b3264 |
| 14065 | .xword 0x61d38dc88de543e8 |
| 14066 | .xword 0x0823a6f2bce1490a |
| 14067 | .xword 0xaa21f7aa6ea2eda0 |
| 14068 | .xword 0xb6b6bf453b9e0c2b |
| 14069 | .xword 0xf634140733fc9497 |
| 14070 | .xword 0x05ba05fc33df8240 |
| 14071 | .xword 0x3ff485a811713f1a |
| 14072 | .xword 0xd8f4128f5de3058d |
| 14073 | .xword 0x052770d5ca67c636 |
| 14074 | |
| 14075 | |
| 14076 | |
| 14077 | SECTION .MyDATA_2 TEXT_VA = 0x00000000e0540000, DATA_VA = 0x0000000060540000 |
| 14078 | attr_data { |
| 14079 | Name = .MyDATA_2, |
| 14080 | RA = 0x0000000170500000, |
| 14081 | PA = ra2pa(0x0000000170500000,0), |
| 14082 | part_0_ctx_zero_tsb_config_0, |
| 14083 | part_0_ctx_nonzero_tsb_config_0, |
| 14084 | TTE_G = 1, |
| 14085 | TTE_Context = PCONTEXT, |
| 14086 | TTE_V = 1, |
| 14087 | TTE_Size = 3, |
| 14088 | TTE_NFO = 1, |
| 14089 | TTE_IE = 0, |
| 14090 | TTE_Soft2 = 0, |
| 14091 | TTE_Diag = 0, |
| 14092 | TTE_Soft = 0, |
| 14093 | TTE_L = 0, |
| 14094 | TTE_CP = 0, |
| 14095 | TTE_CV = 1, |
| 14096 | TTE_E = 1, |
| 14097 | TTE_P = 0, |
| 14098 | TTE_W = 0 |
| 14099 | } |
| 14100 | |
| 14101 | |
| 14102 | attr_data { |
| 14103 | Name = .MyDATA_2, |
| 14104 | RA = 0x0000000170500000, |
| 14105 | PA = ra2pa(0x0000000170500000,0), |
| 14106 | part_0_ctx_zero_tsb_config_1, |
| 14107 | part_0_ctx_nonzero_tsb_config_1, |
| 14108 | TTE_G = 1, |
| 14109 | TTE_Context = SCONTEXT, |
| 14110 | TTE_V = 1, |
| 14111 | TTE_Size = 1, |
| 14112 | TTE_NFO = 1, |
| 14113 | TTE_IE = 0, |
| 14114 | TTE_Soft2 = 0, |
| 14115 | TTE_Diag = 0, |
| 14116 | TTE_Soft = 0, |
| 14117 | TTE_L = 0, |
| 14118 | TTE_CP = 1, |
| 14119 | TTE_CV = 0, |
| 14120 | TTE_E = 1, |
| 14121 | TTE_P = 0, |
| 14122 | TTE_W = 1, |
| 14123 | tsbonly |
| 14124 | } |
| 14125 | |
| 14126 | |
| 14127 | attr_data { |
| 14128 | Name = .MyDATA_2, |
| 14129 | hypervisor |
| 14130 | } |
| 14131 | |
| 14132 | |
| 14133 | attr_text { |
| 14134 | Name = .MyDATA_2, |
| 14135 | hypervisor |
| 14136 | } |
| 14137 | |
| 14138 | .data |
| 14139 | .xword 0xf640e668bcead998 |
| 14140 | .xword 0x5af078cb42012b40 |
| 14141 | .xword 0x69221fe77044475e |
| 14142 | .xword 0xdf7e9da1af32f842 |
| 14143 | .xword 0x848d8b2fa0c517d7 |
| 14144 | .xword 0x548b2dd2f4f4f1aa |
| 14145 | .xword 0x40f1d54bb1aadb6f |
| 14146 | .xword 0x85e99a950970c74b |
| 14147 | .xword 0xbad5a00781c0ea92 |
| 14148 | .xword 0xe78aef3fade7aade |
| 14149 | .xword 0x52e539e99b70f4b7 |
| 14150 | .xword 0xb3978cc8c5b8b430 |
| 14151 | .xword 0x6b2dfcf625cf68f1 |
| 14152 | .xword 0xefa7765f4830e943 |
| 14153 | .xword 0x0d76e6174a0e5a41 |
| 14154 | .xword 0x37297909793318fc |
| 14155 | .xword 0x31fea06a046f8cfe |
| 14156 | .xword 0xd726c837a9851e06 |
| 14157 | .xword 0x65c1e1635515fa04 |
| 14158 | .xword 0x0c5d4b54087d8372 |
| 14159 | .xword 0x8312caf1c2fbfc9a |
| 14160 | .xword 0xff8d3bcadfcc16ca |
| 14161 | .xword 0x5f02a43d08ae1775 |
| 14162 | .xword 0x408b5a4e7d4c41d9 |
| 14163 | .xword 0x9f11c0fa88ec28b8 |
| 14164 | .xword 0x5a0015c0126fb119 |
| 14165 | .xword 0xbbf04fed21d1a150 |
| 14166 | .xword 0xa5267cba3d7a9800 |
| 14167 | .xword 0x7a65317fd0427645 |
| 14168 | .xword 0x01142743be2b02ca |
| 14169 | .xword 0x3919196acf4e48a3 |
| 14170 | .xword 0xaa4f0aa369dd5b0f |
| 14171 | |
| 14172 | |
| 14173 | |
| 14174 | SECTION .MyDATA_3 TEXT_VA = 0x00000000e0740000, DATA_VA = 0x0000000060740000 |
| 14175 | attr_data { |
| 14176 | Name = .MyDATA_3, |
| 14177 | RA = 0x0000000170700000, |
| 14178 | PA = ra2pa(0x0000000170700000,0), |
| 14179 | part_0_ctx_zero_tsb_config_0, |
| 14180 | part_0_ctx_nonzero_tsb_config_0, |
| 14181 | TTE_G = 1, |
| 14182 | TTE_Context = PCONTEXT, |
| 14183 | TTE_V = 1, |
| 14184 | TTE_Size = 1, |
| 14185 | TTE_NFO = 0, |
| 14186 | TTE_IE = 1, |
| 14187 | TTE_Soft2 = 0, |
| 14188 | TTE_Diag = 0, |
| 14189 | TTE_Soft = 0, |
| 14190 | TTE_L = 0, |
| 14191 | TTE_CP = 0, |
| 14192 | TTE_CV = 0, |
| 14193 | TTE_E = 0, |
| 14194 | TTE_P = 0, |
| 14195 | TTE_W = 1 |
| 14196 | } |
| 14197 | |
| 14198 | |
| 14199 | attr_data { |
| 14200 | Name = .MyDATA_3, |
| 14201 | RA = 0x0000000170700000, |
| 14202 | PA = ra2pa(0x0000000170700000,0), |
| 14203 | part_0_ctx_zero_tsb_config_1, |
| 14204 | part_0_ctx_nonzero_tsb_config_1, |
| 14205 | TTE_G = 1, |
| 14206 | TTE_Context = SCONTEXT, |
| 14207 | TTE_V = 1, |
| 14208 | TTE_Size = 0, |
| 14209 | TTE_NFO = 0, |
| 14210 | TTE_IE = 1, |
| 14211 | TTE_Soft2 = 0, |
| 14212 | TTE_Diag = 0, |
| 14213 | TTE_Soft = 0, |
| 14214 | TTE_L = 0, |
| 14215 | TTE_CP = 1, |
| 14216 | TTE_CV = 0, |
| 14217 | TTE_E = 1, |
| 14218 | TTE_P = 0, |
| 14219 | TTE_W = 1, |
| 14220 | tsbonly |
| 14221 | } |
| 14222 | |
| 14223 | |
| 14224 | attr_data { |
| 14225 | Name = .MyDATA_3, |
| 14226 | hypervisor |
| 14227 | } |
| 14228 | |
| 14229 | |
| 14230 | attr_text { |
| 14231 | Name = .MyDATA_3, |
| 14232 | hypervisor |
| 14233 | } |
| 14234 | |
| 14235 | .data |
| 14236 | .xword 0xb00d22daee6bfe72 |
| 14237 | .xword 0x9b2c5adad0d7acb1 |
| 14238 | .xword 0x43577e1d4859a811 |
| 14239 | .xword 0x7f72df2b0d1e31f7 |
| 14240 | .xword 0x510341b77e8ea5b1 |
| 14241 | .xword 0x193e68d3c92d8c60 |
| 14242 | .xword 0x51e0fdc76baa6428 |
| 14243 | .xword 0xa97df7298207d5e9 |
| 14244 | .xword 0x7090f1b77a6ebc35 |
| 14245 | .xword 0x4d2df2b3490e1584 |
| 14246 | .xword 0x1dd376a1d3bdc64a |
| 14247 | .xword 0x47f757cd13d50048 |
| 14248 | .xword 0x6da1a8093c9feb5f |
| 14249 | .xword 0xb276cc3b7667359a |
| 14250 | .xword 0xb8147e1972831900 |
| 14251 | .xword 0x59840372f51cdd24 |
| 14252 | .xword 0x16ec2b56b0e0664f |
| 14253 | .xword 0xebdc83334833f068 |
| 14254 | .xword 0xc0f50e7046af1f0c |
| 14255 | .xword 0x545e8afb2e7fb64f |
| 14256 | .xword 0x95ba1f5e0a8fa641 |
| 14257 | .xword 0xefc1f0a43bff11d0 |
| 14258 | .xword 0xf03e660aa4a4fbb6 |
| 14259 | .xword 0xd2e96187a901c3a9 |
| 14260 | .xword 0x059652b1333a839f |
| 14261 | .xword 0xb65afde841974d2b |
| 14262 | .xword 0xe051795cc0812f9d |
| 14263 | .xword 0xccb8962610dba69f |
| 14264 | .xword 0xfaf426c71a155be0 |
| 14265 | .xword 0x1bfe4625f69ff58f |
| 14266 | .xword 0x73c448df81ba1d24 |
| 14267 | .xword 0x8ad088d9cc6bcb8a |
| 14268 | |
| 14269 | |
| 14270 | |
| 14271 | |
| 14272 | |
| 14273 | SECTION .MyTEXT_0 TEXT_VA = 0x00000000e0200000 |
| 14274 | attr_text { |
| 14275 | Name = .MyTEXT_0, |
| 14276 | RA = 0x00000000e0200000, |
| 14277 | PA = ra2pa(0x00000000e0200000,0), |
| 14278 | part_0_ctx_zero_tsb_config_1, |
| 14279 | part_0_ctx_nonzero_tsb_config_1, |
| 14280 | TTE_G = 1, |
| 14281 | TTE_Context = PCONTEXT, |
| 14282 | TTE_V = 1, |
| 14283 | TTE_Size = 1, |
| 14284 | TTE_NFO = 0, |
| 14285 | TTE_IE = 0, |
| 14286 | TTE_Soft2 = 0, |
| 14287 | TTE_Diag = 0, |
| 14288 | TTE_Soft = 0, |
| 14289 | TTE_L = 0, |
| 14290 | TTE_CP = 1, |
| 14291 | TTE_CV = 0, |
| 14292 | TTE_E = 0, |
| 14293 | TTE_P = 0, |
| 14294 | TTE_W = 1 |
| 14295 | } |
| 14296 | |
| 14297 | .text |
| 14298 | nuff_said_0: |
| 14299 | fdivd %f0, %f4, %f8 |
| 14300 | jmpl %r27+8, %r0 |
| 14301 | fdivs %f0, %f4, %f8 |
| 14302 | |
| 14303 | |
| 14304 | |
| 14305 | SECTION .MyTEXT_1 TEXT_VA = 0x00000000e0a00000 |
| 14306 | attr_text { |
| 14307 | Name = .MyTEXT_1, |
| 14308 | RA = 0x00000000e0a00000, |
| 14309 | PA = ra2pa(0x00000000e0a00000,0), |
| 14310 | part_0_ctx_zero_tsb_config_1, |
| 14311 | part_0_ctx_nonzero_tsb_config_1, |
| 14312 | TTE_G = 1, |
| 14313 | TTE_Context = PCONTEXT, |
| 14314 | TTE_V = 1, |
| 14315 | TTE_Size = 5, |
| 14316 | TTE_NFO = 0, |
| 14317 | TTE_IE = 1, |
| 14318 | TTE_Soft2 = 0, |
| 14319 | TTE_Diag = 0, |
| 14320 | TTE_Soft = 0, |
| 14321 | TTE_L = 0, |
| 14322 | TTE_CP = 0, |
| 14323 | TTE_CV = 1, |
| 14324 | TTE_E = 1, |
| 14325 | TTE_P = 0, |
| 14326 | TTE_W = 1 |
| 14327 | } |
| 14328 | |
| 14329 | .text |
| 14330 | nuff_said_1: |
| 14331 | fdivs %f0, %f4, %f4 |
| 14332 | jmpl %r27+8, %r0 |
| 14333 | fdivd %f0, %f4, %f8 |
| 14334 | |
| 14335 | |
| 14336 | |
| 14337 | SECTION .MyTEXT_2 TEXT_VA = 0x00000000e1200000 |
| 14338 | attr_text { |
| 14339 | Name = .MyTEXT_2, |
| 14340 | RA = 0x00000000e1200000, |
| 14341 | PA = ra2pa(0x00000000e1200000,0), |
| 14342 | part_0_ctx_zero_tsb_config_1, |
| 14343 | part_0_ctx_nonzero_tsb_config_1, |
| 14344 | TTE_G = 1, |
| 14345 | TTE_Context = PCONTEXT, |
| 14346 | TTE_V = 1, |
| 14347 | TTE_Size = 5, |
| 14348 | TTE_NFO = 0, |
| 14349 | TTE_IE = 1, |
| 14350 | TTE_Soft2 = 0, |
| 14351 | TTE_Diag = 0, |
| 14352 | TTE_Soft = 0, |
| 14353 | TTE_L = 0, |
| 14354 | TTE_CP = 1, |
| 14355 | TTE_CV = 0, |
| 14356 | TTE_E = 0, |
| 14357 | TTE_P = 0, |
| 14358 | TTE_W = 0 |
| 14359 | } |
| 14360 | |
| 14361 | .text |
| 14362 | nuff_said_2: |
| 14363 | fdivd %f0, %f4, %f8 |
| 14364 | jmpl %r27+8, %r0 |
| 14365 | fdivs %f0, %f4, %f4 |
| 14366 | |
| 14367 | |
| 14368 | |
| 14369 | SECTION .MyTEXT_3 TEXT_VA = 0x00000000e1a00000 |
| 14370 | attr_text { |
| 14371 | Name = .MyTEXT_3, |
| 14372 | RA = 0x00000000e1a00000, |
| 14373 | PA = ra2pa(0x00000000e1a00000,0), |
| 14374 | part_0_ctx_zero_tsb_config_1, |
| 14375 | part_0_ctx_nonzero_tsb_config_1, |
| 14376 | TTE_G = 1, |
| 14377 | TTE_Context = PCONTEXT, |
| 14378 | TTE_V = 1, |
| 14379 | TTE_Size = 1, |
| 14380 | TTE_NFO = 0, |
| 14381 | TTE_IE = 0, |
| 14382 | TTE_Soft2 = 0, |
| 14383 | TTE_Diag = 0, |
| 14384 | TTE_Soft = 0, |
| 14385 | TTE_L = 0, |
| 14386 | TTE_CP = 0, |
| 14387 | TTE_CV = 1, |
| 14388 | TTE_E = 1, |
| 14389 | TTE_P = 0, |
| 14390 | TTE_W = 1 |
| 14391 | } |
| 14392 | |
| 14393 | .text |
| 14394 | nuff_said_3: |
| 14395 | fdivs %f0, %f4, %f8 |
| 14396 | jmpl %r27+8, %r0 |
| 14397 | fdivd %f0, %f4, %f6 |
| 14398 | |
| 14399 | |
| 14400 | |
| 14401 | |
| 14402 | |
| 14403 | SECTION .VaHOLE_0 TEXT_VA = 0x00007fffffffe000 |
| 14404 | attr_text { |
| 14405 | Name = .VaHOLE_0, |
| 14406 | RA = 0x00000000ffffe000, |
| 14407 | PA = ra2pa(0x00000000ffffe000,0), |
| 14408 | part_0_ctx_zero_tsb_config_1, |
| 14409 | part_0_ctx_nonzero_tsb_config_1, |
| 14410 | TTE_G = 1, |
| 14411 | TTE_Context = PCONTEXT, |
| 14412 | TTE_V = 1, |
| 14413 | TTE_Size = 0, |
| 14414 | TTE_NFO = 0, |
| 14415 | TTE_IE = 0, |
| 14416 | TTE_Soft2 = 0, |
| 14417 | TTE_Diag = 0, |
| 14418 | TTE_Soft = 0, |
| 14419 | TTE_L = 0, |
| 14420 | TTE_CP = 0, |
| 14421 | TTE_CV = 0, |
| 14422 | TTE_E = 0, |
| 14423 | TTE_P = 0, |
| 14424 | TTE_W = 0, |
| 14425 | TTE_X = 1 |
| 14426 | } |
| 14427 | |
| 14428 | .text |
| 14429 | .global vahole_target0 |
| 14430 | .text |
| 14431 | .global vahole_target1 |
| 14432 | .text |
| 14433 | .global vahole_target2 |
| 14434 | .text |
| 14435 | .global vahole_target3 |
| 14436 | nop |
| 14437 | .align 4096 |
| 14438 | nop |
| 14439 | .align 2048 |
| 14440 | nop |
| 14441 | .align 1024 |
| 14442 | nop |
| 14443 | .align 512 |
| 14444 | nop |
| 14445 | .align 256 |
| 14446 | nop |
| 14447 | .align 128 |
| 14448 | nop |
| 14449 | .align 64 |
| 14450 | nop |
| 14451 | nop |
| 14452 | .align 16 |
| 14453 | nop;nop;nop |
| 14454 | vahole_target0: nop;nop |
| 14455 | vahole_target1: nop |
| 14456 | vahole_target2: nop;nop;nop |
| 14457 | vahole_target3: nop;nop;nop |
| 14458 | |
| 14459 | |
| 14460 | |
| 14461 | |
| 14462 | |
| 14463 | SECTION .VaHOLEL_0 TEXT_VA = 0x00000000ffffe000 |
| 14464 | attr_text { |
| 14465 | Name = .VaHOLEL_0, |
| 14466 | RA = 0x00000000ffffe000, |
| 14467 | PA = ra2pa(0x00000000ffffe000,0), |
| 14468 | part_0_ctx_zero_tsb_config_0, |
| 14469 | part_0_ctx_nonzero_tsb_config_0, |
| 14470 | TTE_G = 1, |
| 14471 | TTE_Context = PCONTEXT, |
| 14472 | TTE_V = 1, |
| 14473 | TTE_Size = 3, |
| 14474 | TTE_NFO = 0, |
| 14475 | TTE_IE = 1, |
| 14476 | TTE_Soft2 = 0, |
| 14477 | TTE_Diag = 0, |
| 14478 | TTE_Soft = 0, |
| 14479 | TTE_L = 0, |
| 14480 | TTE_CP = 1, |
| 14481 | TTE_CV = 1, |
| 14482 | TTE_E = 0, |
| 14483 | TTE_P = 0, |
| 14484 | TTE_W = 0, |
| 14485 | TTE_X = 1, |
| 14486 | tsbonly |
| 14487 | } |
| 14488 | |
| 14489 | .text |
| 14490 | nop |
| 14491 | |
| 14492 | |
| 14493 | |
| 14494 | |
| 14495 | |
| 14496 | SECTION .ZERO_0 TEXT_VA = 0x0000000000000000 |
| 14497 | attr_text { |
| 14498 | Name = .ZERO_0, |
| 14499 | RA = 0x0000000000000000, |
| 14500 | PA = ra2pa(0x0000000000000000,0), |
| 14501 | part_0_ctx_zero_tsb_config_1, |
| 14502 | part_0_ctx_nonzero_tsb_config_1, |
| 14503 | TTE_G = 1, |
| 14504 | TTE_Context = 0x44, |
| 14505 | TTE_V = 1, |
| 14506 | TTE_Size = 0, |
| 14507 | TTE_NFO = 0, |
| 14508 | TTE_IE = 1, |
| 14509 | TTE_Soft2 = 0, |
| 14510 | TTE_Diag = 0, |
| 14511 | TTE_Soft = 0, |
| 14512 | TTE_L = 0, |
| 14513 | TTE_CP = 0, |
| 14514 | TTE_CV = 0, |
| 14515 | TTE_E = 0, |
| 14516 | TTE_P = 0, |
| 14517 | TTE_W = 1, |
| 14518 | TTE_X = 1 |
| 14519 | } |
| 14520 | |
| 14521 | |
| 14522 | .text |
| 14523 | nop |
| 14524 | nop |
| 14525 | jmpl %r27+8, %r0 |
| 14526 | nop |
| 14527 | nop |
| 14528 | nop |
| 14529 | nop |
| 14530 | nop |
| 14531 | |
| 14532 | Power_On_Reset: |
| 14533 | setx HRedmode_Reset_Handler, %g1, %g2 |
| 14534 | jmp %g2 |
| 14535 | nop |
| 14536 | .align 32 |
| 14537 | |
| 14538 | Watchdog_Reset: |
| 14539 | setx wdog_red_ext, %g1, %g2 |
| 14540 | jmp %g2 |
| 14541 | nop |
| 14542 | .align 32 |
| 14543 | |
| 14544 | External_Reset: |
| 14545 | My_External_Reset |
| 14546 | |
| 14547 | .align 32 |
| 14548 | |
| 14549 | Software_Initiated_Reset: |
| 14550 | setx Software_Reset_Handler, %g1, %g2 |
| 14551 | jmp %g2 |
| 14552 | nop |
| 14553 | |
| 14554 | .align 32 |
| 14555 | |
| 14556 | |
| 14557 | RED_Mode_Other_Reset: |
| 14558 | ! IF TL=6, shift stack by one .. |
| 14559 | rdpr %tl, %l1 |
| 14560 | cmp %l1, 6 |
| 14561 | be start_tsa_shift |
| 14562 | nop |
| 14563 | |
| 14564 | continue_red_other: |
| 14565 | mov 0x1f, %l1 |
| 14566 | stxa %l1, [%g0] ASI_LSU_CTL_REG |
| 14567 | |
| 14568 | rdpr %tt, %l1 |
| 14569 | |
| 14570 | rdhpr %htstate, %l2 |
| 14571 | and %l2, 0x4, %l2 ! If previously in hpriv mode, go to hpriv |
| 14572 | brnz,a %l2, red_goto_handler |
| 14573 | rdhpr %htba, %l2 |
| 14574 | srlx %l1, 7, %l2 ! Send priv sw traps to priv mode .. |
| 14575 | cmp %l2, 0x2 ! 0x2 = priv sw trap, 0x3=hpriv sw trap .. |
| 14576 | be,a red_goto_handler |
| 14577 | rdpr %tba, %l2 |
| 14578 | rdhpr %htba, %l2 |
| 14579 | red_goto_handler: |
| 14580 | |
| 14581 | sllx %l1, 5, %l1 |
| 14582 | add %l1, %l2, %l2 |
| 14583 | rdhpr %hpstate, %l1 |
| 14584 | jmp %l2 |
| 14585 | wrhpr %l1, 0x20, %hpstate |
| 14586 | nop |
| 14587 | |
| 14588 | wdog_red_ext: |
| 14589 | ! Shift stack down by 1 ... |
| 14590 | rdpr %tl, %l1 |
| 14591 | cmp %l1, 6 |
| 14592 | bl wdog_end |
| 14593 | start_tsa_shift: |
| 14594 | mov 0x2, %l2 |
| 14595 | |
| 14596 | tsa_shift: |
| 14597 | wrpr %l2, %tl |
| 14598 | rdpr %tt, %l3 |
| 14599 | rdpr %tpc, %l4 |
| 14600 | rdpr %tnpc, %l5 |
| 14601 | rdpr %tstate, %l6 |
| 14602 | rdhpr %htstate, %l7 |
| 14603 | dec %l2 |
| 14604 | wrpr %l2, %tl |
| 14605 | wrpr %l3, %tt |
| 14606 | wrpr %l4, %tpc |
| 14607 | wrpr %l5, %tnpc |
| 14608 | wrpr %l6, %tstate |
| 14609 | wrhpr %l7, %htstate |
| 14610 | add %l2, 2, %l2 |
| 14611 | cmp %l2, %l1 |
| 14612 | ble tsa_shift |
| 14613 | nop |
| 14614 | tsa_shift_done: |
| 14615 | dec %l1 |
| 14616 | wrpr %l1, %tl |
| 14617 | |
| 14618 | wdog_end: |
| 14619 | ! If TT != 2, then goto trap handler |
| 14620 | rdpr %tt, %l1 |
| 14621 | |
| 14622 | cmp %l1, 0x2 |
| 14623 | bne continue_red_other |
| 14624 | nop |
| 14625 | ! else done |
| 14626 | mov 0x1f, %l1 |
| 14627 | stxa %l1, [%g0] ASI_LSU_CTL_REG |
| 14628 | done |
| 14629 | |
| 14630 | |
| 14631 | |
| 14632 | |
| 14633 | |
| 14634 | SECTION .VaHOLE_PA_0 TEXT_VA = 0x000000ffffffe000 |
| 14635 | attr_text { |
| 14636 | Name = .VAHOLE_PA_0, |
| 14637 | hypervisor |
| 14638 | } |
| 14639 | |
| 14640 | nop |
| 14641 | .align 4096 |
| 14642 | nop |
| 14643 | .align 2048 |
| 14644 | nop |
| 14645 | .align 1024 |
| 14646 | nop |
| 14647 | .align 512 |
| 14648 | nop |
| 14649 | .align 256 |
| 14650 | nop |
| 14651 | .align 128 |
| 14652 | nop |
| 14653 | .align 64 |
| 14654 | nop |
| 14655 | nop |
| 14656 | .align 16 |
| 14657 | nop;nop;nop |
| 14658 | nop |
| 14659 | nop |
| 14660 | jmpl %r27+8, %r0 |
| 14661 | nop |
| 14662 | nop |
| 14663 | nop |
| 14664 | jmpl %r27+8, %r0 |
| 14665 | nop |
| 14666 | |
| 14667 | |
| 14668 | |
| 14669 | #if 0 |
| 14670 | #endif |