| 1 | /* |
| 2 | * ========== Copyright Header Begin ========================================== |
| 3 | * |
| 4 | * OpenSPARC T2 Processor File: FcNiuPeuRdRand_2.s |
| 5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved |
| 6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. |
| 7 | * |
| 8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License as published by |
| 12 | * the Free Software Foundation; version 2 of the License. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 22 | * |
| 23 | * For the avoidance of doubt, and except that if any non-GPL license |
| 24 | * choice is available it will apply instead, Sun elects to use only |
| 25 | * the General Public License version 2 (GPLv2) at this time for any |
| 26 | * software where a choice of GPL license versions is made |
| 27 | * available with the language indicating that GPLv2 or any later version |
| 28 | * may be used, or where a choice of which version of the GPL is applied is |
| 29 | * otherwise unspecified. |
| 30 | * |
| 31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
| 32 | * CA 95054 USA or visit www.sun.com if you need additional information or |
| 33 | * have any questions. |
| 34 | * |
| 35 | * |
| 36 | * ========== Copyright Header End ============================================ |
| 37 | */ |
| 38 | #define MAIN_PAGE_HV_ALSO |
| 39 | #define RCRSTAT_A_Addr mpeval(DMC_ADDRESS_RANGE+0x00050) |
| 40 | #define RBR_STAT_Addr mpeval(DMC_ADDRESS_RANGE+0x00028) |
| 41 | #define ENABLE_PCIE_LINK_TRAINING |
| 42 | #define ENABLE_PCIE_MPS_512 |
| 43 | #define MAIN_PAGE_HV_ALSO |
| 44 | |
| 45 | #define MEM32_RD_ADDR mpeval(N2_PCIE_BASE_ADDR + MEM32_OFFSET_BASE_REG_DATA) |
| 46 | #define DMA_DATA_ADDR 0x0000000050000000 |
| 47 | |
| 48 | #define PEU_DEVICE_CNTRL_REG_ADDR FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CTL_ADDR |
| 49 | #define PEU_DEVICE_CNTRL__MPS_128 0 |
| 50 | #define PEU_DEVICE_CNTRL__MPS_256 0x20 |
| 51 | #define PEU_DEVICE_CNTRL__MPS_512 0x40 |
| 52 | |
| 53 | #include "hboot.s" |
| 54 | #include "niu_defines.h" |
| 55 | #include "peu_defines.h" |
| 56 | .text |
| 57 | .global main |
| 58 | main: |
| 59 | ta T_CHANGE_HPRIV |
| 60 | nop |
| 61 | ! enable bypass in IOMMU |
| 62 | setx FIRE_DLC_MMU_CSR_A_CTL_ADDR, %g1, %g2 |
| 63 | setx FIRE_DLC_MMU_CSR_A_CTL__BYPASS_EN, %g1, %g3 |
| 64 | stx %g3, [%g2] |
| 65 | ldx [%g2], %g3 |
| 66 | |
| 67 | ! branch to main by comparing thread id. |
| 68 | |
| 69 | ta T_RD_THID |
| 70 | mov 0x1, %g2 |
| 71 | |
| 72 | setx 0x0000000000000001, %o0, %g3 ! thread-group bits for the template |
| 73 | cmp %g2, %o1 |
| 74 | be _FcN1_main |
| 75 | nop |
| 76 | |
| 77 | setx 0x0000000000000010, %o0, %g3 ! thread-group bits for the template |
| 78 | brz %o1, _FcN0_main |
| 79 | mov 0x2, %g2 |
| 80 | cmp %g2, %o1 |
| 81 | be _FcN2_main |
| 82 | nop |
| 83 | # 87 "diag.j.pp" |
| 84 | ! |
| 85 | ! Thread 0 Start |
| 86 | ! |
| 87 | ! |
| 88 | _FcN0_main: |
| 89 | |
| 90 | Init_flow: |
| 91 | nop ! $EV trig_pc_d(1, @VA(.MAIN.Init_flow)) -> pktGenConfig(MAC_ID, FRAME_TYPE, FRAME_CLASS, 5dc) |
| 92 | |
| 93 | P_TxDMAActivate: |
| 94 | setx MAC_ID, %g1, %o0 |
| 95 | setx 0x8000, %g1, %o1 |
| 96 | call SetTxDMAActive |
| 97 | nop ! $EV trig_pc_d(1, @VA(.MAIN.P_TxDMAActivate)) -> NIU_TxDMAActivate (MAC_ID, 8000) |
| 98 | setx XMAC0_MAX_addr, %g7, %g2 |
| 99 | |
| 100 | |
| 101 | P_AddTxChannels: |
| 102 | nop ! $EV trig_pc_d(1, @VA(.MAIN.P_AddTxChannels)) -> NIU_AddTxChannels(MAC_ID, f) |
| 103 | ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 |
| 104 | nop |
| 105 | |
| 106 | P_SetTxMaxBurst: |
| 107 | setx 0xf, %g1, %o0 |
| 108 | setx SetTxMaxBurst_Data, %g1, %o1 |
| 109 | call SetTxMaxBurst |
| 110 | nop ! $EV trig_pc_d(1, @VA(.MAIN.P_SetTxMaxBurst)) -> NIU_SetTxMaxBurst (MAC_ID, f, TxMaxBurst_Data) |
| 111 | ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 |
| 112 | nop |
| 113 | |
| 114 | P_InitTxDma: |
| 115 | setx 0xf, %g1, %o0 |
| 116 | nop ! $EV trig_pc_d(1, @VA(.MAIN.P_InitTxDma)) -> NIU_InitTxDma (MAC_ID, f, NIU_Xlate_On) |
| 117 | call InitTxDma |
| 118 | nop |
| 119 | ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 |
| 120 | nop |
| 121 | |
| 122 | Gen_Packet: |
| 123 | nop ! $EV trig_pc_d(1, @VA(.MAIN.Gen_Packet)) -> TxPktGen(MAC_ID, f, 0xc6,0,0) |
| 124 | nop |
| 125 | |
| 126 | setx 0x5, %g1, %g4 |
| 127 | delay_loop_tmp: |
| 128 | ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 |
| 129 | nop |
| 130 | nop |
| 131 | nop |
| 132 | nop |
| 133 | dec %g4 |
| 134 | brnz %g4, delay_loop_tmp |
| 135 | nop |
| 136 | |
| 137 | SetTxRingKick: |
| 138 | setx NIU_PKTGEN_CSR_EV2A_TX_RNG_KICK, %g1, %g2 ! $EV trig_pc_d(1, @VA(.MAIN.SetTxRingKick)) -> NIU_SetTxRingKick(MAC_ID, f) |
| 139 | setx 0xf, %g1, %o0 |
| 140 | ldx [%g2], %g3 |
| 141 | nop |
| 142 | mulx %o0, 0x200, %g5 |
| 143 | setx TX_RING_KICK_Addr, %g1, %g2 |
| 144 | add %g2, %g5, %g2 |
| 145 | stxa %g3, [%g2]ASI_PRIMARY_LITTLE |
| 146 | nop |
| 147 | |
| 148 | SetTxCs: |
| 149 | setx 0xf, %g1, %o0 |
| 150 | setx TX_CS_Data, %g1, %g3 |
| 151 | mulx %o0, 0x200, %g5 |
| 152 | setx TX_CS_Addr, %g1, %g2 |
| 153 | add %g2, %g5, %g2 |
| 154 | stxa %g3, [%g2]ASI_PRIMARY_LITTLE |
| 155 | nop |
| 156 | |
| 157 | #ifdef JUMBO_FRAME_EN |
| 158 | setx loop_count, %g1, %g4 |
| 159 | delay_loop: |
| 160 | ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 |
| 161 | nop |
| 162 | nop |
| 163 | nop |
| 164 | nop |
| 165 | dec %g4 |
| 166 | brnz %g4, delay_loop |
| 167 | nop |
| 168 | #endif |
| 169 | |
| 170 | |
| 171 | NIUTx_Pkt_Cnt_Chk: |
| 172 | setx MAC_ID, %g1, %o0 |
| 173 | setx 0xc6, %g1, %o1 |
| 174 | call NiuTx_check_pkt_cnt |
| 175 | nop |
| 176 | |
| 177 | setx loop_count, %g1, %g4 |
| 178 | delay_loop_end: |
| 179 | ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 |
| 180 | nop |
| 181 | nop |
| 182 | nop |
| 183 | nop |
| 184 | dec %g4 |
| 185 | brnz %g4, delay_loop_end |
| 186 | nop |
| 187 | |
| 188 | test_passed_tx: |
| 189 | nop ! $EV trig_pc_d(1, @VA(.MAIN.test_passed_tx)) -> NIU_EXIT_chk(MAC_ID) |
| 190 | EXIT_GOOD |
| 191 | |
| 192 | |
| 193 | _FcN1_main: |
| 194 | |
| 195 | P_NIU_RxInitDma: |
| 196 | nop ! $EV trig_pc_d(1, @VA(.MAIN.P_NIU_RxInitDma)) -> NIU_InitRxDma(1, RX_DESC_RING_LENGTH, RX_COMPL_RING_LEN, RBR_CONFIG_B_DATA, RX_INITIAL_KICK, NIU_Xlate_On) |
| 197 | setx NIU_PKTGEN_CSR_EV2A_RBR_KICK, %g7, %g2 |
| 198 | delay_loop_Rx: |
| 199 | ldx [%g2], %g5 |
| 200 | cmp %g5, RX_INITIAL_KICK |
| 201 | bne delay_loop_Rx |
| 202 | nop |
| 203 | |
| 204 | setx 0x1, %g1, %o0 |
| 205 | setx RX_DESC_RING_LENGTH, %g1, %o1 |
| 206 | setx RX_COMPL_RING_LEN, %g1, %o2 |
| 207 | setx RBR_CONFIG_B_DATA, %g1, %o3 |
| 208 | setx RX_INITIAL_KICK, %g1, %o4 |
| 209 | call NiuInitRxDma |
| 210 | nop |
| 211 | P_NIU_RxPkt_Conf: |
| 212 | nop ! $EV trig_pc_d(1, @VA(.MAIN.P_NIU_RxPkt_Conf)) -> NIU_RxPktConf(RXMAC_PKTCNT) |
| 213 | ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 |
| 214 | nop |
| 215 | setx RXMAC_PKTCNT, %g1, %g6 |
| 216 | mulx %o0, 0x200, %g5 |
| 217 | setx RBR_STAT_Addr, %g7, %g2 |
| 218 | add %g2, %g5, %g2 |
| 219 | P_NIU_Rx_GenPkt: |
| 220 | ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 |
| 221 | brz %g5, P_NIU_Rx_GenPkt |
| 222 | nop |
| 223 | cmp %g5, %o4 |
| 224 | be P_NIU_Rx_GenPkt |
| 225 | nop |
| 226 | |
| 227 | Rx_pktcnt_loop: |
| 228 | nop ! $EV trig_pc_d(1, @VA(.MAIN.Rx_pktcnt_loop)) -> NIU_RxGenPkt(MAC_ID, 1, RXMAC_PKTCNT, 0x5dc, 0x0, RX_NIU_MULTI_DMA, 1) |
| 229 | ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 |
| 230 | nop |
| 231 | |
| 232 | mulx %o0, 0x200, %g5 |
| 233 | setx RCRSTAT_A_Addr, %g7, %g2 |
| 234 | add %g2, %g5, %g2 |
| 235 | delay_loop: |
| 236 | ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 |
| 237 | cmp %g5, RXMAC_PKTCNT - RXMAC_PKTCNT%8 |
| 238 | bne delay_loop |
| 239 | nop |
| 240 | |
| 241 | |
| 242 | test_passed: |
| 243 | nop |
| 244 | EXIT_GOOD |
| 245 | # 276 "diag.j.pp" |
| 246 | |
| 247 | _FcN2_main: |
| 248 | setx RX_INITIAL_KICK, %g1, %o4 |
| 249 | setx 0x1, %g1, %o0 |
| 250 | mulx %o0, 0x200, %g5 |
| 251 | setx RBR_STAT_Addr, %g7, %g2 |
| 252 | add %g2, %g5, %g2 |
| 253 | wt_for_niu: |
| 254 | ldxa [%g2]ASI_PRIMARY_LITTLE, %g5 |
| 255 | brz %g5, wt_for_niu |
| 256 | nop |
| 257 | cmp %g5, %o4 |
| 258 | be wt_for_niu |
| 259 | nop |
| 260 | |
| 261 | _DMARd_t_ldst_0: nop |
| 262 | ! start |
| 263 | |
| 264 | _DMARd_t_DMA_read_0: nop |
| 265 | |
| 266 | ! $EV trig_pc_d(1, @VA(.MAIN._DMARd_t_DMA_read_0)) -> EnablePCIeIgCmd("DMARD", fffc000056789000,fffc000056789000, 9d3, 1) |
| 267 | |
| 268 | _DMARd_t_DMA_read_1: nop |
| 269 | |
| 270 | ! $EV trig_pc_d(1, @VA(.MAIN._DMARd_t_DMA_read_1)) -> EnablePCIeIgCmd("DMARD", fffc000056789000,fffc000056789000, 86a, 1) |
| 271 | |
| 272 | _DMARd_t_ldst_1: nop |
| 273 | ! start |
| 274 | .word 0xfe4d2100 ! 4: LDSB_I ldsb [%r20 + 0x0100], %r31 |
| 275 | |
| 276 | _DMARd_t_DMA_read_3: nop |
| 277 | |
| 278 | ! $EV trig_pc_d(1, @VA(.MAIN._DMARd_t_DMA_read_3)) -> EnablePCIeIgCmd("DMARD", fffc000056789000,fffc000056789000, c19, 1) |
| 279 | |
| 280 | _DMARd_t_ldst_2: nop |
| 281 | ! start |
| 282 | .word 0xf80d0019 ! 8: LDUB_R ldub [%r20 + %r25], %r28 |
| 283 | |
| 284 | _DMARd_t_DMA_read_4: nop |
| 285 | |
| 286 | ! $EV trig_pc_d(1, @VA(.MAIN._DMARd_t_DMA_read_4)) -> EnablePCIeIgCmd("DMARD", fffc000056789000,fffc000056789000, 813, 1) |
| 287 | |
| 288 | _DMARd_t_DMA_read_5: nop |
| 289 | |
| 290 | ! $EV trig_pc_d(1, @VA(.MAIN._DMARd_t_DMA_read_5)) -> EnablePCIeIgCmd("DMARD", fffc000056789000,fffc000056789000, 721, 1) |
| 291 | |
| 292 | _DMARd_t_ldst_3: nop |
| 293 | ! start |
| 294 | .word 0xfc750018 ! 12: STX_R stx %r30, [%r20 + %r24] |
| 295 | |
| 296 | _DMARd_t_ldst_4: nop |
| 297 | ! start |
| 298 | .word 0xf80dc019 ! 15: LDUB_R ldub [%r23 + %r25], %r28 |
| 299 | |
| 300 | _DMARd_t_ldst_5: nop |
| 301 | ! start |
| 302 | .word 0xf8758018 ! 17: STX_R stx %r28, [%r22 + %r24] |
| 303 | |
| 304 | _DMARd_t_ldst_6: nop |
| 305 | ! start |
| 306 | .word 0xfe0d001a ! 19: LDUB_R ldub [%r20 + %r26], %r31 |
| 307 | |
| 308 | _DMARd_t_DMA_read_7: nop |
| 309 | |
| 310 | ! $EV trig_pc_d(1, @VA(.MAIN._DMARd_t_DMA_read_7)) -> EnablePCIeIgCmd("DMARD", fffc000056789000,fffc000056789000, 5fa, 1) |
| 311 | |
| 312 | _DMARd_t_ldst_7: nop |
| 313 | ! start |
| 314 | .word 0xf80dc01a ! 22: LDUB_R ldub [%r23 + %r26], %r28 |
| 315 | |
| 316 | _DMARd_t_DMA_read_8: nop |
| 317 | |
| 318 | ! $EV trig_pc_d(1, @VA(.MAIN._DMARd_t_DMA_read_8)) -> EnablePCIeIgCmd("DMARD", fffc000056789000,fffc000056789000, c80, 1) |
| 319 | |
| 320 | _DMARd_t_ldst_8: nop |
| 321 | ! start |
| 322 | .word 0xfa4da130 ! 26: LDSB_I ldsb [%r22 + 0x0130], %r29 |
| 323 | |
| 324 | _DMARd_t_ldst_9: nop |
| 325 | ! start |
| 326 | .word 0xfa75c018 ! 28: STX_R stx %r29, [%r23 + %r24] |
| 327 | |
| 328 | _DMARd_t_DMA_read_10: nop |
| 329 | |
| 330 | ! $EV trig_pc_d(1, @VA(.MAIN._DMARd_t_DMA_read_10)) -> EnablePCIeIgCmd("DMARD", fffc000056789000,fffc000056789000, bd6, 1) |
| 331 | |
| 332 | _DMARd_t_ldst_10: nop |
| 333 | ! start |
| 334 | .word 0xfa0d8018 ! 31: LDUB_R ldub [%r22 + %r24], %r29 |
| 335 | |
| 336 | _DMARd_t_DMA_read_11: nop |
| 337 | |
| 338 | ! $EV trig_pc_d(1, @VA(.MAIN._DMARd_t_DMA_read_11)) -> EnablePCIeIgCmd("DMARD", fffc000056789000,fffc000056789000, 661, 1) |
| 339 | |
| 340 | _DMARd_t_ldst_11: nop |
| 341 | ! start |
| 342 | .word 0xfc0dc01a ! 34: LDUB_R ldub [%r23 + %r26], %r30 |
| 343 | |
| 344 | _DMARd_t_DMA_read_12: nop |
| 345 | |
| 346 | ! $EV trig_pc_d(1, @VA(.MAIN._DMARd_t_DMA_read_12)) -> EnablePCIeIgCmd("DMARD", fffc000056789000,fffc000056789000, f4c, 1) |
| 347 | |
| 348 | _DMARd_t_ldst_12: nop |
| 349 | ! start |
| 350 | .word 0xfe0d0019 ! 37: LDUB_R ldub [%r20 + %r25], %r31 |
| 351 | |
| 352 | _DMARd_t_DMA_read_14: nop |
| 353 | |
| 354 | ! $EV trig_pc_d(1, @VA(.MAIN._DMARd_t_DMA_read_14)) -> EnablePCIeIgCmd("DMARD", fffc000056789000,fffc000056789000, 823, 1) |
| 355 | |
| 356 | _DMARd_t_DMA_read_15: nop |
| 357 | |
| 358 | ! $EV trig_pc_d(1, @VA(.MAIN._DMARd_t_DMA_read_15)) -> EnablePCIeIgCmd("DMARD", fffc000056789000,fffc000056789000, 70c, 1) |
| 359 | |
| 360 | _DMARd_t_ldst_13: nop |
| 361 | ! start |
| 362 | .word 0xfe356110 ! 42: STH_I sth %r31, [%r21 + 0x0110] |
| 363 | |
| 364 | _DMARd_t_DMA_read_16: nop |
| 365 | |
| 366 | ! $EV trig_pc_d(1, @VA(.MAIN._DMARd_t_DMA_read_16)) -> EnablePCIeIgCmd("DMARD", fffc000056789000,fffc000056789000, 1d6, 1) |
| 367 | |
| 368 | _DMARd_t_ldst_14: nop |
| 369 | ! start |
| 370 | .word 0xf875401b ! 45: STX_R stx %r28, [%r21 + %r27] |
| 371 | |
| 372 | _DMARd_t_ldst_15: nop |
| 373 | ! start |
| 374 | .word 0xfe750018 ! 47: STX_R stx %r31, [%r20 + %r24] |
| 375 | |
| 376 | _DMARd_t_ldst_16: nop |
| 377 | ! start |
| 378 | .word 0xfe0d001a ! 50: LDUB_R ldub [%r20 + %r26], %r31 |
| 379 | |
| 380 | _DMARd_t_DMA_read_18: nop |
| 381 | |
| 382 | ! $EV trig_pc_d(1, @VA(.MAIN._DMARd_t_DMA_read_18)) -> EnablePCIeIgCmd("DMARD", fffc000056789000,fffc000056789000, d91, 1) |
| 383 | |
| 384 | _DMARd_t_ldst_17: nop |
| 385 | ! start |
| 386 | .word 0xfe754019 ! 53: STX_R stx %r31, [%r21 + %r25] |
| 387 | |
| 388 | _DMARd_t_DMA_read_19: nop |
| 389 | |
| 390 | ! $EV trig_pc_d(1, @VA(.MAIN._DMARd_t_DMA_read_19)) -> EnablePCIeIgCmd("DMARD", fffc000056789000,fffc000056789000, ccf, 1) |
| 391 | |
| 392 | _DMARd_t_ldst_18: nop |
| 393 | ! start |
| 394 | .word 0xfc35a120 ! 56: STH_I sth %r30, [%r22 + 0x0120] |
| 395 | |
| 396 | _DMARd_t_ldst_19: nop |
| 397 | ! start |
| 398 | .word 0xfc4d2120 ! 58: LDSB_I ldsb [%r20 + 0x0120], %r30 |
| 399 | |
| 400 | _DMARd_t_DMA_read_20: nop |
| 401 | |
| 402 | ! $EV trig_pc_d(1, @VA(.MAIN._DMARd_t_DMA_read_20)) -> EnablePCIeIgCmd("DMARD", fffc000056789000,fffc000056789000, d40, 1) |
| 403 | |
| 404 | _DMARd_t_DMA_read_21: nop |
| 405 | |
| 406 | ! $EV trig_pc_d(1, @VA(.MAIN._DMARd_t_DMA_read_21)) -> EnablePCIeIgCmd("DMARD", fffc000056789000,fffc000056789000, 54d, 1) |
| 407 | |
| 408 | _DMARd_t_DMA_read_22: nop |
| 409 | |
| 410 | ! $EV trig_pc_d(1, @VA(.MAIN._DMARd_t_DMA_read_22)) -> EnablePCIeIgCmd("DMARD", fffc000056789000,fffc000056789000, 96f, 1) |
| 411 | |
| 412 | _DMARd_t_ldst_20: nop |
| 413 | ! start |
| 414 | .word 0xfc356110 ! 63: STH_I sth %r30, [%r21 + 0x0110] |
| 415 | |
| 416 | _DMARd_t_DMA_read_23: nop |
| 417 | |
| 418 | ! $EV trig_pc_d(1, @VA(.MAIN._DMARd_t_DMA_read_23)) -> EnablePCIeIgCmd("DMARD", fffc000056789000,fffc000056789000, 148, 1) |
| 419 | |
| 420 | _DMARd_t_ldst_21: nop |
| 421 | ! start |
| 422 | .word 0xfa0d8018 ! 66: LDUB_R ldub [%r22 + %r24], %r29 |
| 423 | |
| 424 | _DMARd_t_ldst_22: nop |
| 425 | ! start |
| 426 | .word 0xfc75c01b ! 68: STX_R stx %r30, [%r23 + %r27] |
| 427 | |
| 428 | _DMARd_t_DMA_read_24: nop |
| 429 | |
| 430 | ! $EV trig_pc_d(1, @VA(.MAIN._DMARd_t_DMA_read_24)) -> EnablePCIeIgCmd("DMARD", fffc000056789000,fffc000056789000, a3d, 1) |
| 431 | |
| 432 | _DMARd_t_ldst_23: nop |
| 433 | ! start |
| 434 | .word 0xf835a110 ! 71: STH_I sth %r28, [%r22 + 0x0110] |
| 435 | |
| 436 | _DMARd_t_ldst_24: nop |
| 437 | ! start |
| 438 | .word 0xfc4d6130 ! 73: LDSB_I ldsb [%r21 + 0x0130], %r30 |
| 439 | |
| 440 | _DMARd_t_DMA_read_25: nop |
| 441 | |
| 442 | ! $EV trig_pc_d(1, @VA(.MAIN._DMARd_t_DMA_read_25)) -> EnablePCIeIgCmd("DMARD", fffc000056789000,fffc000056789000, 5c9, 1) |
| 443 | |
| 444 | _DMARd_t_DMA_read_26: nop |
| 445 | |
| 446 | ! $EV trig_pc_d(1, @VA(.MAIN._DMARd_t_DMA_read_26)) -> EnablePCIeIgCmd("DMARD", fffc000056789000,fffc000056789000, bc0, 1) |
| 447 | |
| 448 | _DMARd_t_DMA_read_27: nop |
| 449 | |
| 450 | ! $EV trig_pc_d(1, @VA(.MAIN._DMARd_t_DMA_read_27)) -> EnablePCIeIgCmd("DMARD", fffc000056789000,fffc000056789000, 7cb, 1) |
| 451 | |
| 452 | _DMARd_t_DMA_read_28: nop |
| 453 | |
| 454 | ! $EV trig_pc_d(1, @VA(.MAIN._DMARd_t_DMA_read_28)) -> EnablePCIeIgCmd("DMARD", fffc000056789000,fffc000056789000, 26b, 1) |
| 455 | |
| 456 | _DMARd_t_DMA_read_29: nop |
| 457 | |
| 458 | ! $EV trig_pc_d(1, @VA(.MAIN._DMARd_t_DMA_read_29)) -> EnablePCIeIgCmd("DMARD", fffc000056789000,fffc000056789000, 6b4, 1) |
| 459 | |
| 460 | _DMARd_t_DMA_read_30: nop |
| 461 | |
| 462 | ! $EV trig_pc_d(1, @VA(.MAIN._DMARd_t_DMA_read_30)) -> EnablePCIeIgCmd("DMARD", fffc000056789000,fffc000056789000, 5cb, 1) |
| 463 | |
| 464 | _DMARd_t_ldst_25: nop |
| 465 | ! start |
| 466 | .word 0xf835a100 ! 81: STH_I sth %r28, [%r22 + 0x0100] |
| 467 | nop |
| 468 | nop |
| 469 | |
| 470 | ! select a MEM32 address in PCI address range and transmit the command to NCU |
| 471 | |
| 472 | setx MEM32_RD_ADDR, %g1, %g2 |
| 473 | setx 0x080, %g1, %g4 ! loop 128 times |
| 474 | |
| 475 | delay_loop_pcie: |
| 476 | stx %g2, [%g2] ! MEM32 PIO Write |
| 477 | ldx [%g2], %l0 ! MEM32 PIO READ |
| 478 | add %g2, 8, %g2 ! increment PIO address |
| 479 | |
| 480 | dec %g4 ! decrement counter |
| 481 | brnz %g4, delay_loop_pcie ! loop if not zero |
| 482 | nop |
| 483 | |
| 484 | |
| 485 | pcie_test_passed: |
| 486 | EXIT_GOOD |
| 487 | |
| 488 | pcie_test_failed: |
| 489 | EXIT_BAD |
| 490 | |
| 491 | SECTION descriptor data_va=DMA_DATA_ADDR |
| 492 | attr_data { |
| 493 | Name = descriptor, |
| 494 | hypervisor, |
| 495 | compressimage |
| 496 | } |
| 497 | |
| 498 | .data |
| 499 | .global PCIAddr9 |
| 500 | |
| 501 | .xword 0x1011121314151617 |
| 502 | .xword 0x18191a1b1c1d1e1f |
| 503 | .xword 0x2021222324252627 |
| 504 | .xword 0x28292a2b2c2d2e2f |
| 505 | .xword 0x3031323334353637 |
| 506 | .xword 0x38393a3b3c3d3e3f |
| 507 | .xword 0x4041424344454647 |
| 508 | .xword 0x48494a4b4c4d4e4f |
| 509 | .xword 0xffffffffffffffff |
| 510 | .xword 0xffffffffffffffff |
| 511 | .xword 0x1011121314151617 |
| 512 | .xword 0x18191a1b1c1d1e1f |
| 513 | .xword 0x2021222324252627 |
| 514 | .xword 0x28292a2b2c2d2e2f |
| 515 | .xword 0x3031323334353637 |
| 516 | .xword 0x38393a3b3c3d3e3f |
| 517 | .xword 0x4041424344454647 |
| 518 | .xword 0x48494a4b4c4d4e4f |
| 519 | .xword 0xffffffffffffffff |
| 520 | .xword 0xffffffffffffffff |
| 521 | .xword 0x1011121314151617 |
| 522 | .xword 0x18191a1b1c1d1e1f |
| 523 | .xword 0x2021222324252627 |
| 524 | .xword 0x28292a2b2c2d2e2f |
| 525 | .xword 0x3031323334353637 |
| 526 | .xword 0x38393a3b3c3d3e3f |
| 527 | .xword 0x4041424344454647 |
| 528 | .xword 0x48494a4b4c4d4e4f |
| 529 | .xword 0xffffffffffffffff |
| 530 | .xword 0xffffffffffffffff |
| 531 | .xword 0x1011121314151617 |
| 532 | .xword 0x18191a1b1c1d1e1f |
| 533 | .xword 0x2021222324252627 |
| 534 | .xword 0x28292a2b2c2d2e2f |
| 535 | .xword 0x3031323334353637 |
| 536 | .xword 0x38393a3b3c3d3e3f |
| 537 | .xword 0x4041424344454647 |
| 538 | .xword 0x48494a4b4c4d4e4f |
| 539 | .xword 0xffffffffffffffff |
| 540 | .xword 0xffffffffffffffff |
| 541 | .xword 0x1011121314151617 |
| 542 | .xword 0x18191a1b1c1d1e1f |
| 543 | .xword 0x2021222324252627 |
| 544 | .xword 0x28292a2b2c2d2e2f |
| 545 | .xword 0x3031323334353637 |
| 546 | .xword 0x38393a3b3c3d3e3f |
| 547 | .xword 0x4041424344454647 |
| 548 | .xword 0x48494a4b4c4d4e4f |
| 549 | .xword 0xffffffffffffffff |
| 550 | .xword 0xffffffffffffffff |
| 551 | .xword 0x1011121314151617 |
| 552 | .xword 0x18191a1b1c1d1e1f |
| 553 | .xword 0x2021222324252627 |
| 554 | .xword 0x28292a2b2c2d2e2f |
| 555 | .xword 0x3031323334353637 |
| 556 | .xword 0x38393a3b3c3d3e3f |
| 557 | .xword 0x4041424344454647 |
| 558 | .xword 0x48494a4b4c4d4e4f |
| 559 | .xword 0xffffffffffffffff |
| 560 | .xword 0xffffffffffffffff |
| 561 | .xword 0x1011121314151617 |
| 562 | .xword 0x18191a1b1c1d1e1f |
| 563 | .xword 0x2021222324252627 |
| 564 | .xword 0x28292a2b2c2d2e2f |
| 565 | .xword 0x3031323334353637 |
| 566 | .xword 0x38393a3b3c3d3e3f |
| 567 | .xword 0x4041424344454647 |
| 568 | .xword 0x48494a4b4c4d4e4f |
| 569 | .xword 0xffffffffffffffff |
| 570 | .xword 0xffffffffffffffff |
| 571 | .xword 0x1011121314151617 |
| 572 | .xword 0x18191a1b1c1d1e1f |
| 573 | .xword 0x2021222324252627 |
| 574 | .xword 0x28292a2b2c2d2e2f |
| 575 | .xword 0x3031323334353637 |
| 576 | .xword 0x38393a3b3c3d3e3f |
| 577 | .xword 0x4041424344454647 |
| 578 | .xword 0x48494a4b4c4d4e4f |
| 579 | .xword 0xffffffffffffffff |
| 580 | .xword 0xffffffffffffffff |
| 581 | .xword 0x1011121314151617 |
| 582 | .xword 0x18191a1b1c1d1e1f |
| 583 | .xword 0x2021222324252627 |
| 584 | .xword 0x28292a2b2c2d2e2f |
| 585 | .xword 0x3031323334353637 |
| 586 | .xword 0x38393a3b3c3d3e3f |
| 587 | .xword 0x4041424344454647 |
| 588 | .xword 0x48494a4b4c4d4e4f |
| 589 | .xword 0xffffffffffffffff |
| 590 | .xword 0xffffffffffffffff |
| 591 | |
| 592 | |
| 593 | #if 0 |
| 594 | #endif |
| 595 | |