| 1 | // ========== Copyright Header Begin ========================================== |
| 2 | // |
| 3 | // OpenSPARC T2 Processor File: denali_root_monitor_PCIEXactorTransaction.vr |
| 4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved |
| 5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. |
| 6 | // |
| 7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 8 | // |
| 9 | // This program is free software; you can redistribute it and/or modify |
| 10 | // it under the terms of the GNU General Public License as published by |
| 11 | // the Free Software Foundation; version 2 of the License. |
| 12 | // |
| 13 | // This program is distributed in the hope that it will be useful, |
| 14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | // GNU General Public License for more details. |
| 17 | // |
| 18 | // You should have received a copy of the GNU General Public License |
| 19 | // along with this program; if not, write to the Free Software |
| 20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 21 | // |
| 22 | // For the avoidance of doubt, and except that if any non-GPL license |
| 23 | // choice is available it will apply instead, Sun elects to use only |
| 24 | // the General Public License version 2 (GPLv2) at this time for any |
| 25 | // software where a choice of GPL license versions is made |
| 26 | // available with the language indicating that GPLv2 or any later version |
| 27 | // may be used, or where a choice of which version of the GPL is applied is |
| 28 | // otherwise unspecified. |
| 29 | // |
| 30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
| 31 | // CA 95054 USA or visit www.sun.com if you need additional information or |
| 32 | // have any questions. |
| 33 | // |
| 34 | // ========== Copyright Header End ============================================ |
| 35 | #include <vera_defines.vrh> |
| 36 | #include "XactorUtilities.vrh" |
| 37 | #include "XactorBaseTransaction.vrh" |
| 38 | #include "XactorBaseBuilder.vrh" |
| 39 | #include "XactorClk.port.vri" |
| 40 | |
| 41 | #include "FNXPCIEXactor.vrh" |
| 42 | |
| 43 | class denali_root_monitor_PCIEXactorTransaction extends XactorBaseTransaction { |
| 44 | |
| 45 | // inherited members |
| 46 | // string XactorName |
| 47 | // XactorBasePacket Packet |
| 48 | // XactorBaseManager Manager |
| 49 | // XactorBaseSignalInterface SignalInterface |
| 50 | // ReportClass MyReport |
| 51 | |
| 52 | // Base Class and Method Names For QR Macros |
| 53 | local string ClassName = "denali_root_monitor_PCIEXactorTransaction"; |
| 54 | local string MethodName = null; |
| 55 | |
| 56 | FNXPCIEXactorPacket MyPacket; |
| 57 | |
| 58 | // protected FNXPCIEXactorSignalInterface MySignalInterface; |
| 59 | protected FNXPCIEXactorManager MyManager; |
| 60 | protected FNXPCIEXactorUtilities Util; |
| 61 | protected FNXPCIEXactorFCEngine FCEngine; |
| 62 | protected XactorClk clock; |
| 63 | |
| 64 | protected denali_root_monitor_PCIEXactorSignalInterface MySignalInterface; |
| 65 | |
| 66 | // SelfExpect members |
| 67 | bit SelfExpectEnable = 1'b0; |
| 68 | integer MinSelfExpectDly = 0; |
| 69 | integer MaxSelfExpectDly = 50; |
| 70 | |
| 71 | // constructor |
| 72 | // task new( FNXPCIEXactorBuilder Builder ); |
| 73 | task new( denali_root_monitor_PCIEXactorBuilder Builder ); |
| 74 | |
| 75 | virtual task SetID( CTTransactionID XactionID ); |
| 76 | virtual function CTTransactionID GetID(); |
| 77 | virtual task SetPacket( string FieldType, bit [ XACT_FIELD_WIDTH-1:0 ] FieldValue ); |
| 78 | virtual task EnableExpects(); |
| 79 | virtual task DisableExpects(); |
| 80 | virtual task EnableTlpDiscard(); |
| 81 | virtual task DisableTlpDiscard(); |
| 82 | virtual task EnableReplayMonitor(); |
| 83 | virtual task DisableReplayMonitor(); |
| 84 | virtual function bit [ XACT_FIELD_WIDTH-1:0 ] GetPacket( string FieldType ); |
| 85 | virtual task ResetPacket(); |
| 86 | virtual task ZeroPacket(); |
| 87 | virtual task CopyPacket( denali_root_monitor_PCIEXactorTransaction PktTrans ); |
| 88 | virtual task Display( string msg = "" ); |
| 89 | virtual function string Name(); |
| 90 | virtual task DumpExpectList(); |
| 91 | virtual function bit IsExpectPending(); |
| 92 | virtual function integer ExpectCount(); |
| 93 | virtual function integer TlpExpectCount(); |
| 94 | virtual function integer DllpExpectCount(); |
| 95 | virtual function bit ExpectExpire( integer Window ); |
| 96 | virtual function bit Expect( integer Window ); |
| 97 | virtual task Sample( XactorBasePacket Pkt, integer Window = 50000 ); |
| 98 | virtual task SampleTlp( XactorBasePacket Pkt, integer Window = 50000 ); |
| 99 | virtual task SampleDllp( XactorBasePacket Pkt, integer Window = 50000 ); |
| 100 | virtual function bit Remove(); |
| 101 | virtual task Drive( integer D = 0 ); |
| 102 | virtual task Enable(); |
| 103 | virtual task Disable(); |
| 104 | virtual task Reset(); |
| 105 | virtual task WriteDenaliReg( integer iDenReg, bit [FNX_PCIE_XTR_REG_DEN_WIDTH-1:0] data ); |
| 106 | virtual function bit [FNX_PCIE_XTR_REG_DEN_WIDTH-1:0] ReadDenaliReg( integer iDenReg ); |
| 107 | virtual task SuppressDenaliErr( denaliPcieErrorTypeT denErr ); |
| 108 | virtual task tempSuppressDenaliErr( denaliPcieErrorTypeT denErr ); |
| 109 | virtual task unSuppressDenaliErr( denaliPcieErrorTypeT denErr ); |
| 110 | virtual task SetPyld( bit [7:0] pyld[ * ] ); |
| 111 | virtual task GetPyld( var bit [7:0] pyld[ * ] ); |
| 112 | virtual task SetupBAR32( integer denReg, |
| 113 | integer addrWidth, |
| 114 | bit [FNX_PCIE_XTR_PCI_BAR_WIDTH-1:0] baseAddr ); |
| 115 | virtual task SetupBAR64( integer denRegLower, |
| 116 | integer denRegUpper, |
| 117 | integer addrWidth, |
| 118 | bit [FNX_PCIE_XTR_PCI_BAR_WIDTH*2-1:0] baseAddr ); |
| 119 | virtual task SetReqID( bit [FNX_PCIE_XTR_REQ_BUS_NUM_WIDTH-1:0] busNum, |
| 120 | bit [FNX_PCIE_XTR_REQ_DEVICE_NUM_WIDTH-1:0] devNum, |
| 121 | bit [FNX_PCIE_XTR_REQ_FUNC_NUM_WIDTH-1:0] funcNum, |
| 122 | integer regOffset = 0 ); |
| 123 | virtual task SetFCUpdateFreq( denaliPcieFcTypeT denFcType, |
| 124 | integer fcTimerVal ); |
| 125 | virtual function integer GetFCUpdateFreq( denaliPcieFcTypeT denFcType ); |
| 126 | virtual task SetFCData( denaliPcieFcTypeT denFcType, |
| 127 | denaliPcieFcIdT denFcId, |
| 128 | bit [FNX_PCIE_XTR_REG_DEN_FC_CTRL_DATA_VAL_WIDTH-1:0] fcData ); |
| 129 | virtual function bit[FNX_PCIE_XTR_REG_DEN_FC_CTRL_DATA_VAL_WIDTH-1:0] GetFCData( denaliPcieFcTypeT denFcType, |
| 130 | denaliPcieFcIdT denFcId ); |
| 131 | virtual task SetAckNakUpdateFreq( integer ackNakTimerVal ); |
| 132 | virtual function integer GetAckNakUpdateFreq(); |
| 133 | virtual task SetReplayTimer( integer replayTimerVal ); |
| 134 | virtual function integer GetReplayTimer(); |
| 135 | virtual task SetFCCredit( denaliPcieFcTypeT denFcType, |
| 136 | integer fcCredit ); |
| 137 | virtual task SetFCUpdateRange( denaliPcieFcTypeT denFcType, |
| 138 | integer fcUpdateMin, |
| 139 | integer fcUpdateMax ); |
| 140 | virtual task WaitLinkUp(); |
| 141 | virtual task WaitDLLActive(); |
| 142 | virtual task SyncDriveStart(); |
| 143 | virtual task SyncDriveEnd(); |
| 144 | |
| 145 | // Added to allow Vera 6.1 to compile |
| 146 | task SetSignalInterface(string FieldType, bit [XACT_FIELD_WIDTH-1:0] FieldValue) {} |
| 147 | function bit [XACT_FIELD_WIDTH-1:0] GetSignalInterface(string FieldType) {} |
| 148 | |
| 149 | // 3/4/04 |
| 150 | // virtual task SetRcvDetMode( bit _rcvDetMode ); |
| 151 | // virtual task SetRcvDetLanes( bit[FNX_PCIE_XTR_RCV_DET_LANES_WIDTH-1:0] _rcvDetLanes ); |
| 152 | virtual task SetDenaliReset( bit _denaliReset ); |
| 153 | virtual task ResetReplayMonitor(); |
| 154 | virtual task EnableSampleIngressDllp(); |
| 155 | virtual task DisableSampleIngressDllp(); |
| 156 | virtual task SampleIngressDllp( XactorBasePacket Pkt, integer Window = 50000 ); |
| 157 | virtual task EnableAckDiscard(); |
| 158 | virtual task DisableAckDiscard(); |
| 159 | |
| 160 | } |
| 161 | |
| 162 | task denali_root_monitor_PCIEXactorTransaction::new( denali_root_monitor_PCIEXactorBuilder Builder ) |
| 163 | { |
| 164 | Util = Builder.Util; |
| 165 | XactorName = Builder.CreateName(); |
| 166 | MyReport = Builder.CreateReport(); |
| 167 | SelfExpectEnable = Builder.SelfExpectEnable; |
| 168 | MinSelfExpectDly = Builder.MinSelfExpectDly; |
| 169 | MaxSelfExpectDly = Builder.MaxSelfExpectDly; |
| 170 | cast_assign( MyPacket, Builder.CreatePacket() ); |
| 171 | cast_assign( MyManager, Builder.CreateManager() ); |
| 172 | cast_assign( MySignalInterface, Builder.CreateSignalInterface() ); |
| 173 | FCEngine = Builder.FCEngine; |
| 174 | clock = Builder.CreateClock(); |
| 175 | } |
| 176 | |
| 177 | task denali_root_monitor_PCIEXactorTransaction::SetID( CTTransactionID XactionID ) |
| 178 | { |
| 179 | MyPacket.SetID( XactionID ); |
| 180 | } |
| 181 | |
| 182 | function CTTransactionID denali_root_monitor_PCIEXactorTransaction::GetID() |
| 183 | { |
| 184 | GetID = MyPacket.GetID(); |
| 185 | } |
| 186 | |
| 187 | task denali_root_monitor_PCIEXactorTransaction::SetPacket( string FieldType, |
| 188 | bit [ XACT_FIELD_WIDTH-1:0 ] FieldValue ) |
| 189 | { |
| 190 | MyPacket.Set( FieldType, FieldValue ); |
| 191 | } |
| 192 | |
| 193 | function bit [ XACT_FIELD_WIDTH-1:0 ] denali_root_monitor_PCIEXactorTransaction::GetPacket( string FieldType ) |
| 194 | { |
| 195 | GetPacket = MyPacket.Get( FieldType ); |
| 196 | } |
| 197 | |
| 198 | task denali_root_monitor_PCIEXactorTransaction::ResetPacket() |
| 199 | { |
| 200 | MyPacket.PktReset(); |
| 201 | } |
| 202 | |
| 203 | task denali_root_monitor_PCIEXactorTransaction::ZeroPacket() |
| 204 | { |
| 205 | MyPacket.PktZero(); |
| 206 | } |
| 207 | |
| 208 | task denali_root_monitor_PCIEXactorTransaction::CopyPacket( denali_root_monitor_PCIEXactorTransaction PktTrans ) |
| 209 | { |
| 210 | MyPacket.PktCopy( PktTrans.MyPacket ); |
| 211 | } |
| 212 | |
| 213 | task denali_root_monitor_PCIEXactorTransaction::Display( string msg = "" ) |
| 214 | { |
| 215 | MyPacket.PktDisplay( RTYP_FNX_PCIE_XTR_INFO, msg ); |
| 216 | } |
| 217 | |
| 218 | function string denali_root_monitor_PCIEXactorTransaction::Name() |
| 219 | { |
| 220 | Name = XactorName; |
| 221 | } |
| 222 | |
| 223 | task denali_root_monitor_PCIEXactorTransaction::DumpExpectList() |
| 224 | { |
| 225 | string MethodName = "DumpExpectList"; |
| 226 | |
| 227 | PCIEX_QR_D1( "%s -> Dumping Expects", XactorName ); |
| 228 | MyManager.DumpExpects(); |
| 229 | } |
| 230 | |
| 231 | function bit denali_root_monitor_PCIEXactorTransaction::IsExpectPending() |
| 232 | { |
| 233 | IsExpectPending = MyManager.ExpectPending( MyPacket ); |
| 234 | } |
| 235 | |
| 236 | function integer denali_root_monitor_PCIEXactorTransaction::ExpectCount() |
| 237 | { |
| 238 | ExpectCount = MyManager.NumExpects(); |
| 239 | } |
| 240 | |
| 241 | function integer denali_root_monitor_PCIEXactorTransaction::TlpExpectCount() |
| 242 | { |
| 243 | TlpExpectCount = MyManager.NumTlpExpects(); |
| 244 | } |
| 245 | |
| 246 | function integer denali_root_monitor_PCIEXactorTransaction::DllpExpectCount() |
| 247 | { |
| 248 | DllpExpectCount = MyManager.NumDllpExpects(); |
| 249 | } |
| 250 | |
| 251 | function bit denali_root_monitor_PCIEXactorTransaction::ExpectExpire( integer Window ) |
| 252 | { |
| 253 | // Status[1] = 1'b0 Expect not removed |
| 254 | // Status[1] = 1'b1 Expect removed |
| 255 | // Status[0] = 1'b0 Expect removed by transactor |
| 256 | // Status[0] = 1'b1 Expect removed by user |
| 257 | bit [1:0] TransactionRemovedStatus = 2'b00; |
| 258 | bit success; |
| 259 | string MethodName = "ExpectExpire"; |
| 260 | |
| 261 | if (!SelfExpectEnable) { |
| 262 | MyPacket.PktDisplay( RTYP_FNX_PCIE_XTR_DEBUG_1, psprintf("%s %s -> Launching Expect Expire", PCIEX_QR_PREFIX, XactorName ) ); |
| 263 | MyManager.ExpectPkt( MyPacket, Window, TransactionRemovedStatus ); |
| 264 | |
| 265 | if( TransactionRemovedStatus === 2'b10 ) { |
| 266 | // Expect Expire removed by transactor |
| 267 | success = 1'b1; |
| 268 | MyPacket.PktDisplay( RTYP_FNX_PCIE_XTR_INFO, psprintf("%s %s -> Expect Expire Satisfied", PCIEX_QR_PREFIX, XactorName ) ); |
| 269 | } |
| 270 | else { |
| 271 | if( TransactionRemovedStatus === 2'b11 ) { |
| 272 | // Expect Expire removed by user |
| 273 | success = 1'b0; |
| 274 | MyPacket.PktDisplay( RTYP_XACTOR_FMWORK_EXPECT_REMOVED_BY_USER, |
| 275 | psprintf("%s %s -> Expect Expire Removed by User", PCIEX_QR_PREFIX, XactorName ) ); |
| 276 | } |
| 277 | else { |
| 278 | // Expect Expire expired |
| 279 | success = 1'b0; |
| 280 | MyPacket.PktDisplay( RTYP_XACTOR_FMWORK_EXPECT_TIMEOUT_ERR, |
| 281 | psprintf("%s %s -> Expect Expire Expired", PCIEX_QR_PREFIX, XactorName ) ); |
| 282 | } |
| 283 | } |
| 284 | } else { |
| 285 | MyPacket.PktDisplay( RTYP_FNX_PCIE_XTR_INFO, psprintf("%s %s -> Launching SelfExpectExpire", PCIEX_QR_PREFIX, XactorName ) ); |
| 286 | repeat((urandom() % (MaxSelfExpectDly-MinSelfExpectDly+1)) + MinSelfExpectDly) @(posedge clock.$XClk); |
| 287 | MyPacket.PktDisplay(RTYP_FNX_PCIE_XTR_INFO, "SelfExpectExpire satisfied"); |
| 288 | success = 1'b1; |
| 289 | } |
| 290 | |
| 291 | ExpectExpire = success; |
| 292 | } |
| 293 | |
| 294 | function bit denali_root_monitor_PCIEXactorTransaction::Expect( integer Window ) |
| 295 | { |
| 296 | bit [1:0] TransactionRemovedStatus; |
| 297 | bit success; |
| 298 | string MethodName = "Expect"; |
| 299 | |
| 300 | if (!SelfExpectEnable) { |
| 301 | MyPacket.PktDisplay( RTYP_FNX_PCIE_XTR_INFO, psprintf("%s %s -> Launching Expect", PCIEX_QR_PREFIX, XactorName ) ); |
| 302 | MyManager.ExpectPkt( MyPacket, Window, TransactionRemovedStatus ); |
| 303 | if( TransactionRemovedStatus === 2'b10 ) { |
| 304 | // Expect removed by transactor |
| 305 | success = 1'b1; |
| 306 | MyPacket.PktDisplay( RTYP_FNX_PCIE_XTR_INFO, psprintf("%s %s -> Expect Satisfied", PCIEX_QR_PREFIX, XactorName ) ); |
| 307 | } |
| 308 | else { |
| 309 | if( TransactionRemovedStatus === 2'b11 ) { |
| 310 | // Expect removed by user |
| 311 | success = 1'b0; |
| 312 | MyPacket.PktDisplay( RTYP_XACTOR_FMWORK_EXPECT_REMOVED_BY_USER, |
| 313 | psprintf("%s %s -> Expect Removed by User", PCIEX_QR_PREFIX, XactorName ) ); |
| 314 | } |
| 315 | else { |
| 316 | // Expect timeout |
| 317 | success = 1'b0; |
| 318 | MyPacket.PktDisplay( RTYP_XACTOR_FMWORK_EXPECT_TIMEOUT_ERR, |
| 319 | psprintf("%s %s -> Expect Expired", PCIEX_QR_PREFIX, XactorName ) ); |
| 320 | } |
| 321 | } |
| 322 | } else { |
| 323 | MyPacket.PktDisplay( RTYP_FNX_PCIE_XTR_INFO, psprintf("%s %s -> Launching SelfExpect", PCIEX_QR_PREFIX, XactorName ) ); |
| 324 | repeat((urandom() % (MaxSelfExpectDly-MinSelfExpectDly+1)) + MinSelfExpectDly) @(posedge clock.$XClk); |
| 325 | MyPacket.PktDisplay(RTYP_FNX_PCIE_XTR_INFO, "SelfExpect satisfied"); |
| 326 | success = 1'b1; |
| 327 | } |
| 328 | |
| 329 | Expect = success; |
| 330 | } |
| 331 | |
| 332 | task denali_root_monitor_PCIEXactorTransaction::Sample( XactorBasePacket Pkt, integer Window = 50000 ) |
| 333 | { |
| 334 | string MethodName = "Sample"; |
| 335 | PCIEX_QR_I( "%s-> Waiting to Receive Next Packet", XactorName ); |
| 336 | MyManager.SamplePkt( Pkt, Window ); |
| 337 | } |
| 338 | |
| 339 | task denali_root_monitor_PCIEXactorTransaction::SampleTlp( XactorBasePacket Pkt, integer Window = 50000 ) |
| 340 | { |
| 341 | string MethodName = "SampleTlp"; |
| 342 | PCIEX_QR_I( "%s-> Waiting to Receive Next TLP Packet", XactorName ); |
| 343 | MyManager.SampleTlpPkt( Pkt, Window ); |
| 344 | } |
| 345 | |
| 346 | task denali_root_monitor_PCIEXactorTransaction::SampleDllp( XactorBasePacket Pkt, integer Window = 50000 ) |
| 347 | { |
| 348 | string MethodName = "SampleDllp"; |
| 349 | PCIEX_QR_I( "%s-> Waiting to Receive Next DLLP Packet", XactorName ); |
| 350 | MyManager.SampleDllpPkt( Pkt, Window ); |
| 351 | } |
| 352 | |
| 353 | function bit denali_root_monitor_PCIEXactorTransaction::Remove() |
| 354 | { |
| 355 | string MethodName = "Remove"; |
| 356 | |
| 357 | Remove = MyManager.Remove( MyPacket ); |
| 358 | if ( Remove ) |
| 359 | MyPacket.PktDisplay( RTYP_FNX_PCIE_XTR_INFO, psprintf("%s %s -> Packet Successfully Removed", PCIEX_QR_PREFIX, XactorName ) ); |
| 360 | else |
| 361 | MyPacket.PktDisplay( RTYP_FNX_PCIE_XTR_INFO, psprintf("%s %s -> Failed to Remove Packet", PCIEX_QR_PREFIX, XactorName ) ); |
| 362 | } |
| 363 | |
| 364 | task denali_root_monitor_PCIEXactorTransaction::Drive( integer D = 0 ) |
| 365 | { |
| 366 | if (!SelfExpectEnable) { |
| 367 | MyManager.DrivePkt( MyPacket.FormDriven(), D ); |
| 368 | } else { |
| 369 | MyPacket.PktDisplay(RTYP_FNX_PCIE_XTR_INFO, "SelfDrive issued"); |
| 370 | repeat(D) @(posedge clock.$XClk); |
| 371 | MyPacket.PktDisplay(RTYP_FNX_PCIE_XTR_INFO, "SelfDrive completed"); |
| 372 | } |
| 373 | } |
| 374 | |
| 375 | task denali_root_monitor_PCIEXactorTransaction::Enable() |
| 376 | { |
| 377 | string MethodName = "Enable"; |
| 378 | |
| 379 | MyManager.EnableManager(); |
| 380 | PCIEX_QR_I( "%s -> Manager Enabled", XactorName ); |
| 381 | } |
| 382 | |
| 383 | task denali_root_monitor_PCIEXactorTransaction::Disable() |
| 384 | { |
| 385 | string MethodName = "Disable"; |
| 386 | |
| 387 | MyManager.DisableManager(); |
| 388 | PCIEX_QR_I( "%s -> Manager Disabled", XactorName ); |
| 389 | } |
| 390 | |
| 391 | task denali_root_monitor_PCIEXactorTransaction::Reset() |
| 392 | { |
| 393 | string MethodName = "Reset"; |
| 394 | |
| 395 | PCIEX_QR_I( "%s -> Resetting Manager", XactorName ); |
| 396 | MyPacket.PktReset(); |
| 397 | MyManager.ResetManager(); |
| 398 | } |
| 399 | |
| 400 | task denali_root_monitor_PCIEXactorTransaction::SetPyld( bit [7:0] pyld[ * ] ) |
| 401 | { |
| 402 | MyPacket.SetPyld( pyld ); |
| 403 | } |
| 404 | |
| 405 | task denali_root_monitor_PCIEXactorTransaction::GetPyld( var bit [7:0] pyld[ * ] ) |
| 406 | { |
| 407 | MyPacket.GetPyld( pyld ); |
| 408 | } |
| 409 | |
| 410 | task denali_root_monitor_PCIEXactorTransaction::EnableExpects() |
| 411 | { |
| 412 | string MethodName = "EnableExpects"; |
| 413 | |
| 414 | MyManager.ExpectsOn = 1; |
| 415 | PCIEX_QR_I( "%s -> Expects Enabled.", XactorName ); |
| 416 | } |
| 417 | |
| 418 | task denali_root_monitor_PCIEXactorTransaction::DisableExpects() |
| 419 | { |
| 420 | string MethodName = "DisableExpects"; |
| 421 | |
| 422 | MyManager.ExpectsOn = 0; |
| 423 | PCIEX_QR_I( "%s -> Expects Disabled. Sampling Only", XactorName ); |
| 424 | } |
| 425 | |
| 426 | task denali_root_monitor_PCIEXactorTransaction::EnableTlpDiscard() |
| 427 | { |
| 428 | string MethodName = "EnableTlpDiscard"; |
| 429 | |
| 430 | MySignalInterface.TlpDiscardOn = 1; |
| 431 | PCIEX_QR_I( psprintf("%s -> TLP Discard Enabled. TLPs Generated By Denali Memory Model Will NOT Be Transmitted.", XactorName) ); |
| 432 | } |
| 433 | |
| 434 | task denali_root_monitor_PCIEXactorTransaction::DisableTlpDiscard() |
| 435 | { |
| 436 | string MethodName = "DisableTlpDiscard"; |
| 437 | |
| 438 | MySignalInterface.TlpDiscardOn = 0; |
| 439 | PCIEX_QR_I( psprintf("%s -> TLP Discard Disabled. TLPs Generated By Denali Memory Model Will Be Transmitted.", XactorName) ); |
| 440 | } |
| 441 | |
| 442 | task denali_root_monitor_PCIEXactorTransaction::EnableReplayMonitor() |
| 443 | { |
| 444 | string MethodName = "EnableReplayMonitor"; |
| 445 | |
| 446 | MySignalInterface.ReplayMonitorOn = 1; |
| 447 | PCIEX_QR_I( psprintf("%s -> Replayed TLP Checking Enabled.", XactorName) ); |
| 448 | } |
| 449 | |
| 450 | task denali_root_monitor_PCIEXactorTransaction::DisableReplayMonitor() |
| 451 | { |
| 452 | string MethodName = "DisableReplayMonitor"; |
| 453 | |
| 454 | MySignalInterface.ReplayMonitorOn = 0; |
| 455 | PCIEX_QR_I( psprintf("%s -> Replayed TLP Checking Disabled.", XactorName) ); |
| 456 | } |
| 457 | |
| 458 | task denali_root_monitor_PCIEXactorTransaction::WriteDenaliReg( integer iDenReg, bit [FNX_PCIE_XTR_REG_DEN_WIDTH-1:0] data ) |
| 459 | { |
| 460 | MySignalInterface.WriteDenaliReg( iDenReg, data ); |
| 461 | } |
| 462 | |
| 463 | function bit [FNX_PCIE_XTR_REG_DEN_WIDTH-1:0] denali_root_monitor_PCIEXactorTransaction::ReadDenaliReg( integer iDenReg ) |
| 464 | { |
| 465 | ReadDenaliReg = MySignalInterface.ReadDenaliReg( iDenReg ); |
| 466 | } |
| 467 | |
| 468 | task denali_root_monitor_PCIEXactorTransaction::SuppressDenaliErr( denaliPcieErrorTypeT denErr ) |
| 469 | { |
| 470 | MySignalInterface.SuppressDenaliErr( denErr ); |
| 471 | } |
| 472 | |
| 473 | task denali_root_monitor_PCIEXactorTransaction::tempSuppressDenaliErr( denaliPcieErrorTypeT denErr ) |
| 474 | { |
| 475 | MySignalInterface.SuppressDenaliErr( denErr ); |
| 476 | } |
| 477 | |
| 478 | task denali_root_monitor_PCIEXactorTransaction::unSuppressDenaliErr( denaliPcieErrorTypeT denErr ) |
| 479 | { |
| 480 | MySignalInterface.SuppressDenaliErr( denErr ); |
| 481 | } |
| 482 | |
| 483 | task denali_root_monitor_PCIEXactorTransaction::SetupBAR32( integer denReg, |
| 484 | integer addrWidth, |
| 485 | bit [FNX_PCIE_XTR_PCI_BAR_WIDTH-1:0] baseAddr ) |
| 486 | { |
| 487 | MySignalInterface.SetupBAR32( denReg, addrWidth, baseAddr ); |
| 488 | } |
| 489 | |
| 490 | task denali_root_monitor_PCIEXactorTransaction::SetupBAR64( integer denRegLower, |
| 491 | integer denRegUpper, |
| 492 | integer addrWidth, |
| 493 | bit [FNX_PCIE_XTR_PCI_BAR_WIDTH*2-1:0] baseAddr ) |
| 494 | { |
| 495 | MySignalInterface.SetupBAR64( denRegLower, denRegUpper, addrWidth, baseAddr ); |
| 496 | } |
| 497 | |
| 498 | task denali_root_monitor_PCIEXactorTransaction::SetReqID( bit [FNX_PCIE_XTR_REQ_BUS_NUM_WIDTH-1:0] busNum, |
| 499 | bit [FNX_PCIE_XTR_REQ_DEVICE_NUM_WIDTH-1:0] devNum, |
| 500 | bit [FNX_PCIE_XTR_REQ_FUNC_NUM_WIDTH-1:0] funcNum, |
| 501 | integer regOffset = 0 ) |
| 502 | { |
| 503 | MySignalInterface.SetReqID( busNum, devNum, funcNum, regOffset ); |
| 504 | } |
| 505 | |
| 506 | task denali_root_monitor_PCIEXactorTransaction::SetFCUpdateFreq( denaliPcieFcTypeT denFcType, |
| 507 | integer fcTimerVal ) |
| 508 | { |
| 509 | bit [FNX_PCIE_XTR_REG_DEN_WIDTH-1:0] fcRegVal; |
| 510 | integer idenFcType, iFcOp, iVc; |
| 511 | |
| 512 | // Disable Generation of Denali FC Updates For This Credit Type |
| 513 | SetFCCredit( denFcType, 0 ); |
| 514 | |
| 515 | // Set Denali FC Update Timer |
| 516 | idenFcType = denFcType; |
| 517 | iFcOp = PCIE_FCCTRL_set_timer; |
| 518 | iVc = PCIE_VCID_VC0; // FNX Only Implements VC 0 |
| 519 | fcRegVal = 0; |
| 520 | fcRegVal[FNX_PCIE_XTR_REG_DEN_FC_CTRL_TIMER_VAL_SLC] = fcTimerVal; |
| 521 | fcRegVal[FNX_PCIE_XTR_REG_DEN_FC_CTRL_FC_TYPE_SLC] = idenFcType; |
| 522 | fcRegVal[FNX_PCIE_XTR_REG_DEN_FC_CTRL_VC_SLC] = iVc; |
| 523 | fcRegVal[FNX_PCIE_XTR_REG_DEN_FC_CTRL_FC_CMD_SLC] = iFcOp; |
| 524 | WriteDenaliReg( PCIE_REG_DEN_FC_CTRL, fcRegVal ); |
| 525 | |
| 526 | // Enable FC Timer Updates in FC Engine |
| 527 | FCEngine.EnableFCTimer( denFcType ); |
| 528 | FCEngine.SetFCTimerMax( denFcType, fcTimerVal ); |
| 529 | } |
| 530 | |
| 531 | function integer denali_root_monitor_PCIEXactorTransaction::GetFCUpdateFreq( denaliPcieFcTypeT denFcType ) |
| 532 | { |
| 533 | bit [FNX_PCIE_XTR_REG_DEN_WIDTH-1:0] fcRegVal; |
| 534 | integer idenFcType, iFcOp, iVc; |
| 535 | |
| 536 | idenFcType = denFcType; |
| 537 | iFcOp = PCIE_FCCTRL_get_timer_limit; |
| 538 | iVc = PCIE_VCID_VC0; // FNX Only Implements VC 0 |
| 539 | fcRegVal = 0; |
| 540 | fcRegVal[FNX_PCIE_XTR_REG_DEN_FC_CTRL_FC_TYPE_SLC] = idenFcType; |
| 541 | fcRegVal[FNX_PCIE_XTR_REG_DEN_FC_CTRL_VC_SLC] = iVc; |
| 542 | fcRegVal[FNX_PCIE_XTR_REG_DEN_FC_CTRL_FC_CMD_SLC] = iFcOp; |
| 543 | WriteDenaliReg( PCIE_REG_DEN_FC_CTRL, fcRegVal ); |
| 544 | |
| 545 | fcRegVal = ReadDenaliReg( PCIE_REG_DEN_FC_CTRL ); |
| 546 | GetFCUpdateFreq = fcRegVal[FNX_PCIE_XTR_REG_DEN_FC_CTRL_TIMER_VAL_SLC]; |
| 547 | } |
| 548 | |
| 549 | task denali_root_monitor_PCIEXactorTransaction::SetFCUpdateRange( denaliPcieFcTypeT denFcType, |
| 550 | integer fcUpdateMin, |
| 551 | integer fcUpdateMax ) { |
| 552 | FCEngine.SetFCUpdateRange( denFcType, fcUpdateMin, fcUpdateMax ); |
| 553 | } |
| 554 | |
| 555 | task denali_root_monitor_PCIEXactorTransaction::SetFCData( denaliPcieFcTypeT denFcType, |
| 556 | denaliPcieFcIdT denFcId, |
| 557 | bit [FNX_PCIE_XTR_REG_DEN_FC_CTRL_DATA_VAL_WIDTH-1:0] fcData ) |
| 558 | { |
| 559 | FCEngine.SetFCData( denFcType, denFcId, fcData ); |
| 560 | } |
| 561 | |
| 562 | function bit[FNX_PCIE_XTR_REG_DEN_FC_CTRL_DATA_VAL_WIDTH-1:0] denali_root_monitor_PCIEXactorTransaction::GetFCData( denaliPcieFcTypeT denFcType, |
| 563 | denaliPcieFcIdT denFcId ) |
| 564 | { |
| 565 | GetFCData = FCEngine.GetFCData( denFcType, denFcId ); |
| 566 | } |
| 567 | |
| 568 | task denali_root_monitor_PCIEXactorTransaction::SetAckNakUpdateFreq( integer ackNakTimerVal ) |
| 569 | { |
| 570 | WriteDenaliReg( PCIE_REG_DEN_ACK_NAK_FREQ_TIMER, ackNakTimerVal ); |
| 571 | } |
| 572 | |
| 573 | function integer denali_root_monitor_PCIEXactorTransaction::GetAckNakUpdateFreq() |
| 574 | { |
| 575 | GetAckNakUpdateFreq = ReadDenaliReg( PCIE_REG_DEN_ACK_NAK_FREQ_TIMER ); |
| 576 | } |
| 577 | |
| 578 | task denali_root_monitor_PCIEXactorTransaction::SetReplayTimer( integer replayTimerVal ) |
| 579 | { |
| 580 | WriteDenaliReg( PCIE_REG_DEN_REPLAY_TIMER, replayTimerVal ); |
| 581 | } |
| 582 | |
| 583 | function integer denali_root_monitor_PCIEXactorTransaction::GetReplayTimer() |
| 584 | { |
| 585 | GetReplayTimer = ReadDenaliReg( PCIE_REG_DEN_REPLAY_TIMER ); |
| 586 | } |
| 587 | |
| 588 | task denali_root_monitor_PCIEXactorTransaction::SetFCCredit( denaliPcieFcTypeT denFcType, |
| 589 | integer fcCredit ) |
| 590 | { |
| 591 | bit [FNX_PCIE_XTR_REG_DEN_WIDTH-1:0] fcRegVal; |
| 592 | |
| 593 | // Negative fcCredit Interpreted as Infinite, Postive as Actual Value |
| 594 | if (fcCredit < 0) |
| 595 | fcRegVal = { FNX_PCIE_XTR_REG_DEN_WIDTH {1'b1} }; // Denali Defines Infinite as 32'hfffffff |
| 596 | else |
| 597 | fcRegVal = fcCredit; |
| 598 | |
| 599 | case (denFcType) { |
| 600 | PCIE_FCTYPE_PH : WriteDenaliReg( PCIE_REG_DEN_FC0_PH, fcRegVal ); |
| 601 | PCIE_FCTYPE_PD : WriteDenaliReg( PCIE_REG_DEN_FC0_PD, fcRegVal ); |
| 602 | PCIE_FCTYPE_NPH : WriteDenaliReg( PCIE_REG_DEN_FC0_NPH, fcRegVal ); |
| 603 | PCIE_FCTYPE_NPD : WriteDenaliReg( PCIE_REG_DEN_FC0_NPD, fcRegVal ); |
| 604 | PCIE_FCTYPE_CPLH : WriteDenaliReg( PCIE_REG_DEN_FC0_CPLH, fcRegVal ); |
| 605 | PCIE_FCTYPE_CPLD : WriteDenaliReg( PCIE_REG_DEN_FC0_CPLD, fcRegVal ); |
| 606 | PCIE_FCTYPE_TOTAL : { |
| 607 | WriteDenaliReg( PCIE_REG_DEN_FC0_PH, fcRegVal ); |
| 608 | WriteDenaliReg( PCIE_REG_DEN_FC0_PD, fcRegVal ); |
| 609 | WriteDenaliReg( PCIE_REG_DEN_FC0_NPH, fcRegVal ); |
| 610 | WriteDenaliReg( PCIE_REG_DEN_FC0_NPD, fcRegVal ); |
| 611 | WriteDenaliReg( PCIE_REG_DEN_FC0_CPLH, fcRegVal ); |
| 612 | WriteDenaliReg( PCIE_REG_DEN_FC0_CPLD, fcRegVal ); |
| 613 | } |
| 614 | default : PCIEX_QR_ERR( "%s-> Hit Default Case Element denFcType=%0d", |
| 615 | XactorName, denFcType ); |
| 616 | } |
| 617 | } |
| 618 | |
| 619 | task denali_root_monitor_PCIEXactorTransaction::WaitLinkUp() |
| 620 | { |
| 621 | MySignalInterface.WaitLinkUp(); |
| 622 | } |
| 623 | |
| 624 | task denali_root_monitor_PCIEXactorTransaction::WaitDLLActive() |
| 625 | { |
| 626 | MySignalInterface.WaitDLLActive(); |
| 627 | } |
| 628 | |
| 629 | task denali_root_monitor_PCIEXactorTransaction::SyncDriveStart() |
| 630 | { |
| 631 | MyPacket.SyncDriveStart(); |
| 632 | } |
| 633 | |
| 634 | task denali_root_monitor_PCIEXactorTransaction::SyncDriveEnd() |
| 635 | { |
| 636 | MyPacket.SyncDriveEnd(); |
| 637 | } |
| 638 | |
| 639 | // task denali_root_monitor_PCIEXactorTransaction::SetRcvDetMode( bit _rcvDetMode ) |
| 640 | // { |
| 641 | // string MethodName = "SetRcvDetMode"; |
| 642 | // |
| 643 | // MySignalInterface.SetRcvDetMode( _rcvDetMode ); |
| 644 | // PCIEX_QR_I( psprintf("%s -> Drive rcvDetMode = %b : 0=fast receive detect 1=slow receive detect", XactorName,_rcvDetMode) ); |
| 645 | // } |
| 646 | // |
| 647 | // task denali_root_monitor_PCIEXactorTransaction::SetRcvDetLanes( bit[FNX_PCIE_XTR_RCV_DET_LANES_WIDTH-1:0] _rcvDetLanes ) |
| 648 | // { |
| 649 | // string MethodName = "SetRcvDetLanes"; |
| 650 | // |
| 651 | // MySignalInterface.SetRcvDetLanes( _rcvDetLanes ); |
| 652 | // PCIEX_QR_I( psprintf("%s -> Drive rcvDetLanes = %b ", XactorName,_rcvDetLanes) ); |
| 653 | // } |
| 654 | |
| 655 | task denali_root_monitor_PCIEXactorTransaction::SetDenaliReset( bit _denaliReset ) |
| 656 | { |
| 657 | string MethodName = "SetDenaliReset"; |
| 658 | |
| 659 | MySignalInterface.SetDenaliReset( _denaliReset ); |
| 660 | PCIEX_QR_I( psprintf("%s -> Drive denaliReset = %b ", XactorName,_denaliReset) ); |
| 661 | } |
| 662 | |
| 663 | task denali_root_monitor_PCIEXactorTransaction::ResetReplayMonitor() |
| 664 | { |
| 665 | string MethodName = "ResetReplayMonitor"; |
| 666 | |
| 667 | MySignalInterface.ResetReplayMonitor(); |
| 668 | PCIEX_QR_I( psprintf("%s -> Reset FNXPCIEXtr Replay Monitor ", XactorName) ); |
| 669 | } |
| 670 | |
| 671 | |
| 672 | task denali_root_monitor_PCIEXactorTransaction::EnableSampleIngressDllp() |
| 673 | { |
| 674 | string MethodName = "EnableSampleIngressDllp"; |
| 675 | |
| 676 | MySignalInterface.EnableSampleDllpToLink(); |
| 677 | PCIEX_QR_I( psprintf("%s -> EnableSampleIngressDllp allows Ingress(xtr to dut) DLLPs to be passed to the testbench.", XactorName) ); |
| 678 | } |
| 679 | |
| 680 | task denali_root_monitor_PCIEXactorTransaction::DisableSampleIngressDllp() |
| 681 | { |
| 682 | string MethodName = "DisableSampleIngressDllp"; |
| 683 | |
| 684 | MySignalInterface.DisableSampleDllpToLink(); |
| 685 | PCIEX_QR_I( psprintf("%s -> DisableSampleIngressDllp will NOT pass Ingress(xtr to dut) DLLPs to the testbench.", XactorName) ); |
| 686 | } |
| 687 | |
| 688 | task denali_root_monitor_PCIEXactorTransaction::SampleIngressDllp( XactorBasePacket Pkt, integer Window = 50000 ) |
| 689 | { |
| 690 | string MethodName = "SampleIngressDllp"; |
| 691 | PCIEX_QR_D3( "%s-> Waiting to Receive Next Ingress DLLP Packet", XactorName ); |
| 692 | MySignalInterface.SampleDllpPktToLink( Pkt, Window ); |
| 693 | } |
| 694 | |
| 695 | task denali_root_monitor_PCIEXactorTransaction::EnableAckDiscard() |
| 696 | { |
| 697 | string MethodName = "EnableAckDiscard"; |
| 698 | |
| 699 | MySignalInterface.AckDiscardOn = 1; |
| 700 | PCIEX_QR_I( psprintf("%s -> ACK Discard Enabled. DLLP ACKs Generated By Denali Model Will NOT Be Transmitted.", XactorName) ); |
| 701 | } |
| 702 | |
| 703 | task denali_root_monitor_PCIEXactorTransaction::DisableAckDiscard() |
| 704 | { |
| 705 | string MethodName = "DisableAckDiscard"; |
| 706 | |
| 707 | MySignalInterface.AckDiscardOn = 0; |
| 708 | PCIEX_QR_I( psprintf("%s -> ACK Discard Disabled. DLLP ACKs Generated By Denali Model Will Be Transmitted.", XactorName) ); |
| 709 | } |
| 710 | |