| 1 | // ========== Copyright Header Begin ========================================== |
| 2 | // |
| 3 | // OpenSPARC T2 Processor File: CSRCollection.vr |
| 4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved |
| 5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. |
| 6 | // |
| 7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 8 | // |
| 9 | // This program is free software; you can redistribute it and/or modify |
| 10 | // it under the terms of the GNU General Public License as published by |
| 11 | // the Free Software Foundation; version 2 of the License. |
| 12 | // |
| 13 | // This program is distributed in the hope that it will be useful, |
| 14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | // GNU General Public License for more details. |
| 17 | // |
| 18 | // You should have received a copy of the GNU General Public License |
| 19 | // along with this program; if not, write to the Free Software |
| 20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 21 | // |
| 22 | // For the avoidance of doubt, and except that if any non-GPL license |
| 23 | // choice is available it will apply instead, Sun elects to use only |
| 24 | // the General Public License version 2 (GPLv2) at this time for any |
| 25 | // software where a choice of GPL license versions is made |
| 26 | // available with the language indicating that GPLv2 or any later version |
| 27 | // may be used, or where a choice of which version of the GPL is applied is |
| 28 | // otherwise unspecified. |
| 29 | // |
| 30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
| 31 | // CA 95054 USA or visit www.sun.com if you need additional information or |
| 32 | // have any questions. |
| 33 | // |
| 34 | // ========== Copyright Header End ============================================ |
| 35 | #include "cib_a.csr_define.vri" |
| 36 | #include "tlr_a.csr_define.vri" |
| 37 | #include "general_csr_defines.vri" |
| 38 | #include "CSRFmwork.vrh" |
| 39 | #include "base_access_define.vri" |
| 40 | #include "FIRE_local_access_define.vri" |
| 41 | |
| 42 | class CSRCollection { |
| 43 | |
| 44 | local string csr_collection_name; |
| 45 | local integer offset; |
| 46 | CSRState fire_plc_tlu_ctb_tlr_csr_a_lnk_bit_err_cnt_2_state; |
| 47 | CSRState fire_plc_tlu_ctb_tlr_csr_a_tlu_ici_state; |
| 48 | CSRState fire_plc_tlu_ctb_tlr_csr_a_replay_tim_thresh_state; |
| 49 | CSRState fire_plc_tlu_ctb_tlr_csr_a_slt_cap_state; |
| 50 | CSRState fire_plc_tlu_ctb_tlr_csr_a_link_cfg_state; |
| 51 | CSRState fire_plc_tlu_ctb_tlr_csr_a_serdes_xmitter_lane_ctl_state[FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_DEPTH]; |
| 52 | CSRState fire_plc_tlu_ctb_tlr_csr_a_tlu_icr_state; |
| 53 | CSRState fire_plc_tlu_ctb_tlr_csr_a_force_ltssm_state; |
| 54 | CSRState fire_dlc_ilu_cib_csr_a_ilu_int_en_state; |
| 55 | CSRState fire_plc_tlu_ctb_tlr_csr_a_oe_log_state; |
| 56 | CSRState fire_plc_tlu_ctb_tlr_csr_a_event_err_int_en_state; |
| 57 | CSRState fire_plc_tlu_ctb_tlr_csr_a_lnk_sts_state; |
| 58 | CSRState fire_dlc_ilu_cib_csr_a_ilu_log_en_state; |
| 59 | CSRState fire_dlc_ilu_cib_csr_a_ilu_en_err_state; |
| 60 | CSRState fire_plc_tlu_ctb_tlr_csr_a_event_err_log_en_state; |
| 61 | CSRState fire_plc_tlu_ctb_tlr_csr_a_oe_int_en_state; |
| 62 | CSRState fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1c_alias_state; |
| 63 | CSRState fire_plc_tlu_ctb_tlr_csr_a_oe_en_err_state; |
| 64 | CSRState fire_plc_tlu_ctb_tlr_csr_a_symbol_num_state; |
| 65 | CSRState fire_plc_tlu_ctb_tlr_csr_a_replay_timer_state; |
| 66 | CSRState fire_plc_tlu_ctb_tlr_csr_a_rue_hdr1_state; |
| 67 | CSRState fire_plc_tlu_ctb_tlr_csr_a_rue_hdr2_state; |
| 68 | CSRState fire_plc_tlu_ctb_tlr_csr_a_tlu_prf0_state; |
| 69 | CSRState fire_plc_tlu_ctb_tlr_csr_a_tlu_prf1_state; |
| 70 | CSRState fire_plc_tlu_ctb_tlr_csr_a_tlu_prf2_state; |
| 71 | CSRState fire_plc_tlu_ctb_tlr_csr_a_tlu_sts_state; |
| 72 | CSRState fire_plc_tlu_ctb_tlr_csr_a_ce_int_en_state; |
| 73 | CSRState fire_plc_tlu_ctb_tlr_csr_a_serdes_receiver_lane_status_state[FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_STATUS_DEPTH]; |
| 74 | CSRState fire_plc_tlu_ctb_tlr_csr_a_ce_en_err_state; |
| 75 | CSRState fire_plc_tlu_ctb_tlr_csr_a_tue_hdr1_state; |
| 76 | CSRState fire_plc_tlu_ctb_tlr_csr_a_tue_hdr2_state; |
| 77 | CSRState fire_plc_tlu_ctb_tlr_csr_a_dev_sts_state; |
| 78 | CSRState fire_plc_tlu_ctb_tlr_csr_a_trn_off_state; |
| 79 | CSRState fire_dlc_ilu_cib_csr_a_ilu_diagnos_state; |
| 80 | CSRState fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias_state; |
| 81 | CSRState fire_plc_tlu_ctb_tlr_csr_a_roe_hdr1_state; |
| 82 | CSRState fire_plc_tlu_ctb_tlr_csr_a_roe_hdr2_state; |
| 83 | CSRState fire_plc_tlu_ctb_tlr_csr_a_tlu_prfc_state; |
| 84 | CSRState fire_plc_tlu_ctb_tlr_csr_a_ce_log_state; |
| 85 | CSRState fire_plc_tlu_ctb_tlr_csr_a_event_err_int_sts_state; |
| 86 | CSRState fire_plc_tlu_ctb_tlr_csr_a_peu_dlpl_serdes_rev_state; |
| 87 | CSRState fire_plc_tlu_ctb_tlr_csr_a_toe_hdr1_state; |
| 88 | CSRState fire_plc_tlu_ctb_tlr_csr_a_toe_hdr2_state; |
| 89 | CSRState fire_plc_tlu_ctb_tlr_csr_a_acknak_thresh_state; |
| 90 | CSRState fire_plc_tlu_ctb_tlr_csr_a_ven_dllp_msg_state; |
| 91 | CSRState fire_plc_tlu_ctb_tlr_csr_a_lane_skew_state; |
| 92 | CSRState fire_plc_tlu_ctb_tlr_csr_a_ue_int_en_state; |
| 93 | CSRState fire_plc_tlu_ctb_tlr_csr_a_core_status_state; |
| 94 | CSRState fire_plc_tlu_ctb_tlr_csr_a_lnk_cap_state; |
| 95 | CSRState fire_plc_tlu_ctb_tlr_csr_a_ue_en_err_state; |
| 96 | CSRState fire_plc_tlu_ctb_tlr_csr_a_lnk_ctl_state; |
| 97 | CSRState fire_plc_tlu_ctb_tlr_csr_a_serdes_pll_state; |
| 98 | CSRState fire_plc_tlu_ctb_tlr_csr_a_acknak_timer_state; |
| 99 | CSRState fire_dlc_ilu_cib_csr_a_pec_int_en_state; |
| 100 | CSRState fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1c_alias_state; |
| 101 | CSRState fire_dlc_ilu_cib_csr_a_pec_en_err_state; |
| 102 | CSRState fire_plc_tlu_ctb_tlr_csr_a_tlu_diag_state; |
| 103 | CSRState fire_plc_tlu_ctb_tlr_csr_a_symbol_timer_state; |
| 104 | CSRState fire_plc_tlu_ctb_tlr_csr_a_link_ctl_state; |
| 105 | CSRState fire_plc_tlu_ctb_tlr_csr_a_ce_err_rw1c_alias_state; |
| 106 | CSRState fire_plc_tlu_ctb_tlr_csr_a_tlu_erb_state; |
| 107 | CSRState fire_plc_tlu_ctb_tlr_csr_a_serdes_xmitter_lane_status_state[FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_STATUS_DEPTH]; |
| 108 | CSRState fire_plc_tlu_ctb_tlr_csr_a_tlu_ecc_state; |
| 109 | CSRState fire_plc_tlu_ctb_tlr_csr_a_ue_log_state; |
| 110 | CSRState fire_plc_tlu_ctb_tlr_csr_a_serdes_macro_test_cfg_state[FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_DEPTH]; |
| 111 | CSRState fire_plc_tlu_ctb_tlr_csr_a_tlu_ctl_state; |
| 112 | CSRState fire_plc_tlu_ctb_tlr_csr_a_serdes_receiver_lane_ctl_state[FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_DEPTH]; |
| 113 | CSRState fire_dlc_ilu_cib_csr_a_ilu_log_err_rw1c_alias_state; |
| 114 | CSRState fire_plc_tlu_ctb_tlr_csr_a_tlu_ecl_state; |
| 115 | CSRState fire_plc_tlu_ctb_tlr_csr_a_tlu_ica_state; |
| 116 | CSRState fire_plc_tlu_ctb_tlr_csr_a_dev_cap_state; |
| 117 | CSRState fire_plc_tlu_ctb_tlr_csr_a_tlu_dbg_sel_a_state; |
| 118 | CSRState fire_plc_tlu_ctb_tlr_csr_a_tlu_dbg_sel_b_state; |
| 119 | CSRState fire_plc_tlu_ctb_tlr_csr_a_lnk_bit_err_cnt_1_state; |
| 120 | CSRState fire_plc_tlu_ctb_tlr_csr_a_dev_ctl_state; |
| 121 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_lnk_bit_err_cnt_2; |
| 122 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_tlu_ici; |
| 123 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_replay_tim_thresh; |
| 124 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_slt_cap; |
| 125 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_link_cfg; |
| 126 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_serdes_xmitter_lane_ctl[FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_DEPTH]; |
| 127 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_tlu_icr; |
| 128 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_force_ltssm; |
| 129 | CSRAccessor fire_dlc_ilu_cib_csr_a_ilu_int_en; |
| 130 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_oe_log; |
| 131 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_event_err_int_en; |
| 132 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1s_alias; |
| 133 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_lnk_sts; |
| 134 | CSRAccessor fire_dlc_ilu_cib_csr_a_ilu_log_en; |
| 135 | CSRAccessor fire_dlc_ilu_cib_csr_a_ilu_en_err; |
| 136 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_event_err_log_en; |
| 137 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_oe_int_en; |
| 138 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1c_alias; |
| 139 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_oe_en_err; |
| 140 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_symbol_num; |
| 141 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_replay_timer; |
| 142 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_rue_hdr1; |
| 143 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_rue_hdr2; |
| 144 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_tlu_prf0; |
| 145 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_tlu_prf1; |
| 146 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias; |
| 147 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_tlu_prf2; |
| 148 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_tlu_sts; |
| 149 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_ce_int_en; |
| 150 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_serdes_receiver_lane_status[FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_STATUS_DEPTH]; |
| 151 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_ce_en_err; |
| 152 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_tue_hdr1; |
| 153 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_tue_hdr2; |
| 154 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_dev_sts; |
| 155 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_trn_off; |
| 156 | CSRAccessor fire_dlc_ilu_cib_csr_a_ilu_diagnos; |
| 157 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias; |
| 158 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_roe_hdr1; |
| 159 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_roe_hdr2; |
| 160 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_tlu_prfc; |
| 161 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_ce_log; |
| 162 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_event_err_int_sts; |
| 163 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_peu_dlpl_serdes_rev; |
| 164 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_toe_hdr1; |
| 165 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_toe_hdr2; |
| 166 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_acknak_thresh; |
| 167 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_ven_dllp_msg; |
| 168 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_lane_skew; |
| 169 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_ue_int_en; |
| 170 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_core_status; |
| 171 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_lnk_cap; |
| 172 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_ue_en_err; |
| 173 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1s_alias; |
| 174 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_lnk_ctl; |
| 175 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_ce_err_rw1s_alias; |
| 176 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_serdes_pll; |
| 177 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_acknak_timer; |
| 178 | CSRAccessor fire_dlc_ilu_cib_csr_a_pec_int_en; |
| 179 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1c_alias; |
| 180 | CSRAccessor fire_dlc_ilu_cib_csr_a_pec_en_err; |
| 181 | CSRAccessor fire_dlc_ilu_cib_csr_a_ilu_log_err_rw1s_alias; |
| 182 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_tlu_diag; |
| 183 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_symbol_timer; |
| 184 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_link_ctl; |
| 185 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_ce_err_rw1c_alias; |
| 186 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_tlu_erb; |
| 187 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_serdes_xmitter_lane_status[FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_STATUS_DEPTH]; |
| 188 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_tlu_ecc; |
| 189 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_ue_log; |
| 190 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_serdes_macro_test_cfg[FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_DEPTH]; |
| 191 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_tlu_ctl; |
| 192 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_serdes_receiver_lane_ctl[FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_DEPTH]; |
| 193 | CSRAccessor fire_dlc_ilu_cib_csr_a_ilu_log_err_rw1c_alias; |
| 194 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_tlu_ecl; |
| 195 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_tlu_ica; |
| 196 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_dev_cap; |
| 197 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_tlu_dbg_sel_a; |
| 198 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_tlu_dbg_sel_b; |
| 199 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_lnk_bit_err_cnt_1; |
| 200 | CSRAccessor fire_plc_tlu_ctb_tlr_csr_a_dev_ctl; |
| 201 | |
| 202 | |
| 203 | task new ( CSRAccessMethod input_access_methods[]) { |
| 204 | integer access_level[]; |
| 205 | string access_name[]; |
| 206 | string input_name; |
| 207 | string base_csr_name; |
| 208 | fire_plc_tlu_ctb_tlr_csr_a_lnk_bit_err_cnt_2_state = new; |
| 209 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ici_state = new; |
| 210 | fire_plc_tlu_ctb_tlr_csr_a_replay_tim_thresh_state = new; |
| 211 | fire_plc_tlu_ctb_tlr_csr_a_slt_cap_state = new; |
| 212 | fire_plc_tlu_ctb_tlr_csr_a_link_cfg_state = new; |
| 213 | for (offset = 0; offset < FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_DEPTH; ++offset) |
| 214 | fire_plc_tlu_ctb_tlr_csr_a_serdes_xmitter_lane_ctl_state[offset] = new; |
| 215 | fire_plc_tlu_ctb_tlr_csr_a_tlu_icr_state = new; |
| 216 | fire_plc_tlu_ctb_tlr_csr_a_force_ltssm_state = new; |
| 217 | fire_dlc_ilu_cib_csr_a_ilu_int_en_state = new; |
| 218 | fire_plc_tlu_ctb_tlr_csr_a_oe_log_state = new; |
| 219 | fire_plc_tlu_ctb_tlr_csr_a_event_err_int_en_state = new; |
| 220 | fire_plc_tlu_ctb_tlr_csr_a_lnk_sts_state = new; |
| 221 | fire_dlc_ilu_cib_csr_a_ilu_log_en_state = new; |
| 222 | fire_dlc_ilu_cib_csr_a_ilu_en_err_state = new; |
| 223 | fire_plc_tlu_ctb_tlr_csr_a_event_err_log_en_state = new; |
| 224 | fire_plc_tlu_ctb_tlr_csr_a_oe_int_en_state = new; |
| 225 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1c_alias_state = new; |
| 226 | fire_plc_tlu_ctb_tlr_csr_a_oe_en_err_state = new; |
| 227 | fire_plc_tlu_ctb_tlr_csr_a_symbol_num_state = new; |
| 228 | fire_plc_tlu_ctb_tlr_csr_a_replay_timer_state = new; |
| 229 | fire_plc_tlu_ctb_tlr_csr_a_rue_hdr1_state = new; |
| 230 | fire_plc_tlu_ctb_tlr_csr_a_rue_hdr2_state = new; |
| 231 | fire_plc_tlu_ctb_tlr_csr_a_tlu_prf0_state = new; |
| 232 | fire_plc_tlu_ctb_tlr_csr_a_tlu_prf1_state = new; |
| 233 | fire_plc_tlu_ctb_tlr_csr_a_tlu_prf2_state = new; |
| 234 | fire_plc_tlu_ctb_tlr_csr_a_tlu_sts_state = new; |
| 235 | fire_plc_tlu_ctb_tlr_csr_a_ce_int_en_state = new; |
| 236 | for (offset = 0; offset < FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_STATUS_DEPTH; ++offset) |
| 237 | fire_plc_tlu_ctb_tlr_csr_a_serdes_receiver_lane_status_state[offset] = new; |
| 238 | fire_plc_tlu_ctb_tlr_csr_a_ce_en_err_state = new; |
| 239 | fire_plc_tlu_ctb_tlr_csr_a_tue_hdr1_state = new; |
| 240 | fire_plc_tlu_ctb_tlr_csr_a_tue_hdr2_state = new; |
| 241 | fire_plc_tlu_ctb_tlr_csr_a_dev_sts_state = new; |
| 242 | fire_plc_tlu_ctb_tlr_csr_a_trn_off_state = new; |
| 243 | fire_dlc_ilu_cib_csr_a_ilu_diagnos_state = new; |
| 244 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias_state = new; |
| 245 | fire_plc_tlu_ctb_tlr_csr_a_roe_hdr1_state = new; |
| 246 | fire_plc_tlu_ctb_tlr_csr_a_roe_hdr2_state = new; |
| 247 | fire_plc_tlu_ctb_tlr_csr_a_tlu_prfc_state = new; |
| 248 | fire_plc_tlu_ctb_tlr_csr_a_ce_log_state = new; |
| 249 | fire_plc_tlu_ctb_tlr_csr_a_event_err_int_sts_state = new; |
| 250 | fire_plc_tlu_ctb_tlr_csr_a_peu_dlpl_serdes_rev_state = new; |
| 251 | fire_plc_tlu_ctb_tlr_csr_a_toe_hdr1_state = new; |
| 252 | fire_plc_tlu_ctb_tlr_csr_a_toe_hdr2_state = new; |
| 253 | fire_plc_tlu_ctb_tlr_csr_a_acknak_thresh_state = new; |
| 254 | fire_plc_tlu_ctb_tlr_csr_a_ven_dllp_msg_state = new; |
| 255 | fire_plc_tlu_ctb_tlr_csr_a_lane_skew_state = new; |
| 256 | fire_plc_tlu_ctb_tlr_csr_a_ue_int_en_state = new; |
| 257 | fire_plc_tlu_ctb_tlr_csr_a_core_status_state = new; |
| 258 | fire_plc_tlu_ctb_tlr_csr_a_lnk_cap_state = new; |
| 259 | fire_plc_tlu_ctb_tlr_csr_a_ue_en_err_state = new; |
| 260 | fire_plc_tlu_ctb_tlr_csr_a_lnk_ctl_state = new; |
| 261 | fire_plc_tlu_ctb_tlr_csr_a_serdes_pll_state = new; |
| 262 | fire_plc_tlu_ctb_tlr_csr_a_acknak_timer_state = new; |
| 263 | fire_dlc_ilu_cib_csr_a_pec_int_en_state = new; |
| 264 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1c_alias_state = new; |
| 265 | fire_dlc_ilu_cib_csr_a_pec_en_err_state = new; |
| 266 | fire_plc_tlu_ctb_tlr_csr_a_tlu_diag_state = new; |
| 267 | fire_plc_tlu_ctb_tlr_csr_a_symbol_timer_state = new; |
| 268 | fire_plc_tlu_ctb_tlr_csr_a_link_ctl_state = new; |
| 269 | fire_plc_tlu_ctb_tlr_csr_a_ce_err_rw1c_alias_state = new; |
| 270 | fire_plc_tlu_ctb_tlr_csr_a_tlu_erb_state = new; |
| 271 | for (offset = 0; offset < FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_STATUS_DEPTH; ++offset) |
| 272 | fire_plc_tlu_ctb_tlr_csr_a_serdes_xmitter_lane_status_state[offset] = new; |
| 273 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ecc_state = new; |
| 274 | fire_plc_tlu_ctb_tlr_csr_a_ue_log_state = new; |
| 275 | for (offset = 0; offset < FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_DEPTH; ++offset) |
| 276 | fire_plc_tlu_ctb_tlr_csr_a_serdes_macro_test_cfg_state[offset] = new; |
| 277 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ctl_state = new; |
| 278 | for (offset = 0; offset < FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_DEPTH; ++offset) |
| 279 | fire_plc_tlu_ctb_tlr_csr_a_serdes_receiver_lane_ctl_state[offset] = new; |
| 280 | fire_dlc_ilu_cib_csr_a_ilu_log_err_rw1c_alias_state = new; |
| 281 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ecl_state = new; |
| 282 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ica_state = new; |
| 283 | fire_plc_tlu_ctb_tlr_csr_a_dev_cap_state = new; |
| 284 | fire_plc_tlu_ctb_tlr_csr_a_tlu_dbg_sel_a_state = new; |
| 285 | fire_plc_tlu_ctb_tlr_csr_a_tlu_dbg_sel_b_state = new; |
| 286 | fire_plc_tlu_ctb_tlr_csr_a_lnk_bit_err_cnt_1_state = new; |
| 287 | fire_plc_tlu_ctb_tlr_csr_a_dev_ctl_state = new; |
| 288 | |
| 289 | //////////////////////// Single-Entry CSRs ////////////////////////////// |
| 290 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_NAME); |
| 291 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 292 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 293 | access_level[CSRT_OMNI] = CSRT_READ_ACCESS; |
| 294 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 295 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 296 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 297 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 298 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 299 | access_name[CSRT_OMNI] = "OMNI"; |
| 300 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 301 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 302 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 303 | access_name[FIRE_JTAG] = "JTAG"; |
| 304 | |
| 305 | fire_plc_tlu_ctb_tlr_csr_a_lnk_bit_err_cnt_2 = new( |
| 306 | fire_plc_tlu_ctb_tlr_csr_a_lnk_bit_err_cnt_2_state, |
| 307 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_HW_ADDR, |
| 308 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_POR_VALUE, |
| 309 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_RMASK, |
| 310 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_READ_ONLY_MASK, |
| 311 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_WRITE_MASK, |
| 312 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_CLEAR_MASK, |
| 313 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_SET_MASK, |
| 314 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_TOGGLE_MASK, |
| 315 | input_name, |
| 316 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_NUM_FIELDS, |
| 317 | input_access_methods, |
| 318 | access_level, |
| 319 | access_name, |
| 320 | CSRT_DAEMON |
| 321 | ); |
| 322 | fire_plc_tlu_ctb_tlr_csr_a_lnk_bit_err_cnt_2.init_field_info ( |
| 323 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_0_FID, |
| 324 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_0_FMASK, |
| 325 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_0_POSITION, |
| 326 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_0_FIELD_NAME |
| 327 | ); |
| 328 | fire_plc_tlu_ctb_tlr_csr_a_lnk_bit_err_cnt_2.init_field_info ( |
| 329 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_1_FID, |
| 330 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_1_FMASK, |
| 331 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_1_POSITION, |
| 332 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_1_FIELD_NAME |
| 333 | ); |
| 334 | fire_plc_tlu_ctb_tlr_csr_a_lnk_bit_err_cnt_2.init_field_info ( |
| 335 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_2_FID, |
| 336 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_2_FMASK, |
| 337 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_2_POSITION, |
| 338 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_2_FIELD_NAME |
| 339 | ); |
| 340 | fire_plc_tlu_ctb_tlr_csr_a_lnk_bit_err_cnt_2.init_field_info ( |
| 341 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_3_FID, |
| 342 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_3_FMASK, |
| 343 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_3_POSITION, |
| 344 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_3_FIELD_NAME |
| 345 | ); |
| 346 | fire_plc_tlu_ctb_tlr_csr_a_lnk_bit_err_cnt_2.init_field_info ( |
| 347 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_4_FID, |
| 348 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_4_FMASK, |
| 349 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_4_POSITION, |
| 350 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_4_FIELD_NAME |
| 351 | ); |
| 352 | fire_plc_tlu_ctb_tlr_csr_a_lnk_bit_err_cnt_2.init_field_info ( |
| 353 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_5_FID, |
| 354 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_5_FMASK, |
| 355 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_5_POSITION, |
| 356 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_5_FIELD_NAME |
| 357 | ); |
| 358 | fire_plc_tlu_ctb_tlr_csr_a_lnk_bit_err_cnt_2.init_field_info ( |
| 359 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_6_FID, |
| 360 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_6_FMASK, |
| 361 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_6_POSITION, |
| 362 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_6_FIELD_NAME |
| 363 | ); |
| 364 | fire_plc_tlu_ctb_tlr_csr_a_lnk_bit_err_cnt_2.init_field_info ( |
| 365 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_7_FID, |
| 366 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_7_FMASK, |
| 367 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_7_POSITION, |
| 368 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_7_FIELD_NAME |
| 369 | ); |
| 370 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICI_NAME); |
| 371 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 372 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 373 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 374 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 375 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 376 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 377 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 378 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 379 | access_name[CSRT_OMNI] = "OMNI"; |
| 380 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 381 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 382 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 383 | access_name[FIRE_JTAG] = "JTAG"; |
| 384 | |
| 385 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ici = new( |
| 386 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ici_state, |
| 387 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICI_HW_ADDR, |
| 388 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICI_POR_VALUE, |
| 389 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICI_RMASK, |
| 390 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICI_READ_ONLY_MASK, |
| 391 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICI_WRITE_MASK, |
| 392 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICI_CLEAR_MASK, |
| 393 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICI_SET_MASK, |
| 394 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICI_TOGGLE_MASK, |
| 395 | input_name, |
| 396 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICI_NUM_FIELDS, |
| 397 | input_access_methods, |
| 398 | access_level, |
| 399 | access_name, |
| 400 | CSRT_OMNI |
| 401 | ); |
| 402 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ici.init_field_info ( |
| 403 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICI_PDC_FID, |
| 404 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICI_PDC_FMASK, |
| 405 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICI_PDC_POSITION, |
| 406 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICI_PDC_FIELD_NAME |
| 407 | ); |
| 408 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ici.init_field_info ( |
| 409 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICI_PHC_FID, |
| 410 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICI_PHC_FMASK, |
| 411 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICI_PHC_POSITION, |
| 412 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICI_PHC_FIELD_NAME |
| 413 | ); |
| 414 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ici.init_field_info ( |
| 415 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICI_CDC_FID, |
| 416 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICI_CDC_FMASK, |
| 417 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICI_CDC_POSITION, |
| 418 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICI_CDC_FIELD_NAME |
| 419 | ); |
| 420 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ici.init_field_info ( |
| 421 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICI_CHC_FID, |
| 422 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICI_CHC_FMASK, |
| 423 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICI_CHC_POSITION, |
| 424 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICI_CHC_FIELD_NAME |
| 425 | ); |
| 426 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ici.init_field_info ( |
| 427 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICI_NDC_FID, |
| 428 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICI_NDC_FMASK, |
| 429 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICI_NDC_POSITION, |
| 430 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICI_NDC_FIELD_NAME |
| 431 | ); |
| 432 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ici.init_field_info ( |
| 433 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICI_NHC_FID, |
| 434 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICI_NHC_FMASK, |
| 435 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICI_NHC_POSITION, |
| 436 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICI_NHC_FIELD_NAME |
| 437 | ); |
| 438 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_REPLAY_TIM_THRESH_NAME); |
| 439 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 440 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 441 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 442 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 443 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 444 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 445 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 446 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 447 | access_name[CSRT_OMNI] = "OMNI"; |
| 448 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 449 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 450 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 451 | access_name[FIRE_JTAG] = "JTAG"; |
| 452 | |
| 453 | fire_plc_tlu_ctb_tlr_csr_a_replay_tim_thresh = new( |
| 454 | fire_plc_tlu_ctb_tlr_csr_a_replay_tim_thresh_state, |
| 455 | FIRE_PLC_TLU_CTB_TLR_CSR_A_REPLAY_TIM_THRESH_HW_ADDR, |
| 456 | FIRE_PLC_TLU_CTB_TLR_CSR_A_REPLAY_TIM_THRESH_POR_VALUE, |
| 457 | FIRE_PLC_TLU_CTB_TLR_CSR_A_REPLAY_TIM_THRESH_RMASK, |
| 458 | FIRE_PLC_TLU_CTB_TLR_CSR_A_REPLAY_TIM_THRESH_READ_ONLY_MASK, |
| 459 | FIRE_PLC_TLU_CTB_TLR_CSR_A_REPLAY_TIM_THRESH_WRITE_MASK, |
| 460 | FIRE_PLC_TLU_CTB_TLR_CSR_A_REPLAY_TIM_THRESH_CLEAR_MASK, |
| 461 | FIRE_PLC_TLU_CTB_TLR_CSR_A_REPLAY_TIM_THRESH_SET_MASK, |
| 462 | FIRE_PLC_TLU_CTB_TLR_CSR_A_REPLAY_TIM_THRESH_TOGGLE_MASK, |
| 463 | input_name, |
| 464 | FIRE_PLC_TLU_CTB_TLR_CSR_A_REPLAY_TIM_THRESH_NUM_FIELDS, |
| 465 | input_access_methods, |
| 466 | access_level, |
| 467 | access_name, |
| 468 | CSRT_OMNI |
| 469 | ); |
| 470 | fire_plc_tlu_ctb_tlr_csr_a_replay_tim_thresh.init_field_info ( |
| 471 | FIRE_PLC_TLU_CTB_TLR_CSR_A_REPLAY_TIM_THRESH_RPLAY_TMR_THR_FID, |
| 472 | FIRE_PLC_TLU_CTB_TLR_CSR_A_REPLAY_TIM_THRESH_RPLAY_TMR_THR_FMASK, |
| 473 | FIRE_PLC_TLU_CTB_TLR_CSR_A_REPLAY_TIM_THRESH_RPLAY_TMR_THR_POSITION, |
| 474 | FIRE_PLC_TLU_CTB_TLR_CSR_A_REPLAY_TIM_THRESH_RPLAY_TMR_THR_FIELD_NAME |
| 475 | ); |
| 476 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_SLT_CAP_NAME); |
| 477 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 478 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 479 | access_level[CSRT_OMNI] = CSRT_READ_ACCESS; |
| 480 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 481 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 482 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 483 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 484 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 485 | access_name[CSRT_OMNI] = "OMNI"; |
| 486 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 487 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 488 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 489 | access_name[FIRE_JTAG] = "JTAG"; |
| 490 | |
| 491 | fire_plc_tlu_ctb_tlr_csr_a_slt_cap = new( |
| 492 | fire_plc_tlu_ctb_tlr_csr_a_slt_cap_state, |
| 493 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SLT_CAP_HW_ADDR, |
| 494 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SLT_CAP_POR_VALUE, |
| 495 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SLT_CAP_RMASK, |
| 496 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SLT_CAP_READ_ONLY_MASK, |
| 497 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SLT_CAP_WRITE_MASK, |
| 498 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SLT_CAP_CLEAR_MASK, |
| 499 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SLT_CAP_SET_MASK, |
| 500 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SLT_CAP_TOGGLE_MASK, |
| 501 | input_name, |
| 502 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SLT_CAP_NUM_FIELDS, |
| 503 | input_access_methods, |
| 504 | access_level, |
| 505 | access_name, |
| 506 | CSRT_DAEMON |
| 507 | ); |
| 508 | fire_plc_tlu_ctb_tlr_csr_a_slt_cap.init_field_info ( |
| 509 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SLT_CAP_SPLS_FID, |
| 510 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SLT_CAP_SPLS_FMASK, |
| 511 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SLT_CAP_SPLS_POSITION, |
| 512 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SLT_CAP_SPLS_FIELD_NAME |
| 513 | ); |
| 514 | fire_plc_tlu_ctb_tlr_csr_a_slt_cap.init_field_info ( |
| 515 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SLT_CAP_SPLV_FID, |
| 516 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SLT_CAP_SPLV_FMASK, |
| 517 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SLT_CAP_SPLV_POSITION, |
| 518 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SLT_CAP_SPLV_FIELD_NAME |
| 519 | ); |
| 520 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CFG_NAME); |
| 521 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 522 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 523 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 524 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 525 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 526 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 527 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 528 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 529 | access_name[CSRT_OMNI] = "OMNI"; |
| 530 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 531 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 532 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 533 | access_name[FIRE_JTAG] = "JTAG"; |
| 534 | |
| 535 | fire_plc_tlu_ctb_tlr_csr_a_link_cfg = new( |
| 536 | fire_plc_tlu_ctb_tlr_csr_a_link_cfg_state, |
| 537 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CFG_HW_ADDR, |
| 538 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CFG_POR_VALUE, |
| 539 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CFG_RMASK, |
| 540 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CFG_READ_ONLY_MASK, |
| 541 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CFG_WRITE_MASK, |
| 542 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CFG_CLEAR_MASK, |
| 543 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CFG_SET_MASK, |
| 544 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CFG_TOGGLE_MASK, |
| 545 | input_name, |
| 546 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CFG_NUM_FIELDS, |
| 547 | input_access_methods, |
| 548 | access_level, |
| 549 | access_name, |
| 550 | CSRT_OMNI |
| 551 | ); |
| 552 | fire_plc_tlu_ctb_tlr_csr_a_link_cfg.init_field_info ( |
| 553 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CFG_OTHER_MESSAGE_REQUEST_FID, |
| 554 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CFG_OTHER_MESSAGE_REQUEST_FMASK, |
| 555 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CFG_OTHER_MESSAGE_REQUEST_POSITION, |
| 556 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CFG_OTHER_MESSAGE_REQUEST_FIELD_NAME |
| 557 | ); |
| 558 | fire_plc_tlu_ctb_tlr_csr_a_link_cfg.init_field_info ( |
| 559 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CFG_DATA_LINK_ENABLE_FID, |
| 560 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CFG_DATA_LINK_ENABLE_FMASK, |
| 561 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CFG_DATA_LINK_ENABLE_POSITION, |
| 562 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CFG_DATA_LINK_ENABLE_FIELD_NAME |
| 563 | ); |
| 564 | fire_plc_tlu_ctb_tlr_csr_a_link_cfg.init_field_info ( |
| 565 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CFG_ACK_NAK_DISABLE_FID, |
| 566 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CFG_ACK_NAK_DISABLE_FMASK, |
| 567 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CFG_ACK_NAK_DISABLE_POSITION, |
| 568 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CFG_ACK_NAK_DISABLE_FIELD_NAME |
| 569 | ); |
| 570 | fire_plc_tlu_ctb_tlr_csr_a_link_cfg.init_field_info ( |
| 571 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CFG_ACK_FREQ_FID, |
| 572 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CFG_ACK_FREQ_FMASK, |
| 573 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CFG_ACK_FREQ_POSITION, |
| 574 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CFG_ACK_FREQ_FIELD_NAME |
| 575 | ); |
| 576 | fire_plc_tlu_ctb_tlr_csr_a_link_cfg.init_field_info ( |
| 577 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CFG_SPARE_FID, |
| 578 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CFG_SPARE_FMASK, |
| 579 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CFG_SPARE_POSITION, |
| 580 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CFG_SPARE_FIELD_NAME |
| 581 | ); |
| 582 | fire_plc_tlu_ctb_tlr_csr_a_link_cfg.init_field_info ( |
| 583 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CFG_FLOW_CONTROL_DISABLE_FID, |
| 584 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CFG_FLOW_CONTROL_DISABLE_FMASK, |
| 585 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CFG_FLOW_CONTROL_DISABLE_POSITION, |
| 586 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CFG_FLOW_CONTROL_DISABLE_FIELD_NAME |
| 587 | ); |
| 588 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICR_NAME); |
| 589 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 590 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 591 | access_level[CSRT_OMNI] = CSRT_READ_ACCESS; |
| 592 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 593 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 594 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 595 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 596 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 597 | access_name[CSRT_OMNI] = "OMNI"; |
| 598 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 599 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 600 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 601 | access_name[FIRE_JTAG] = "JTAG"; |
| 602 | |
| 603 | fire_plc_tlu_ctb_tlr_csr_a_tlu_icr = new( |
| 604 | fire_plc_tlu_ctb_tlr_csr_a_tlu_icr_state, |
| 605 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICR_HW_ADDR, |
| 606 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICR_POR_VALUE, |
| 607 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICR_RMASK, |
| 608 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICR_READ_ONLY_MASK, |
| 609 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICR_WRITE_MASK, |
| 610 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICR_CLEAR_MASK, |
| 611 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICR_SET_MASK, |
| 612 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICR_TOGGLE_MASK, |
| 613 | input_name, |
| 614 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICR_NUM_FIELDS, |
| 615 | input_access_methods, |
| 616 | access_level, |
| 617 | access_name, |
| 618 | CSRT_DAEMON |
| 619 | ); |
| 620 | fire_plc_tlu_ctb_tlr_csr_a_tlu_icr.init_field_info ( |
| 621 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICR_PDC_FID, |
| 622 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICR_PDC_FMASK, |
| 623 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICR_PDC_POSITION, |
| 624 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICR_PDC_FIELD_NAME |
| 625 | ); |
| 626 | fire_plc_tlu_ctb_tlr_csr_a_tlu_icr.init_field_info ( |
| 627 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICR_PHC_FID, |
| 628 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICR_PHC_FMASK, |
| 629 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICR_PHC_POSITION, |
| 630 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICR_PHC_FIELD_NAME |
| 631 | ); |
| 632 | fire_plc_tlu_ctb_tlr_csr_a_tlu_icr.init_field_info ( |
| 633 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICR_CDC_FID, |
| 634 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICR_CDC_FMASK, |
| 635 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICR_CDC_POSITION, |
| 636 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICR_CDC_FIELD_NAME |
| 637 | ); |
| 638 | fire_plc_tlu_ctb_tlr_csr_a_tlu_icr.init_field_info ( |
| 639 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICR_CHC_FID, |
| 640 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICR_CHC_FMASK, |
| 641 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICR_CHC_POSITION, |
| 642 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICR_CHC_FIELD_NAME |
| 643 | ); |
| 644 | fire_plc_tlu_ctb_tlr_csr_a_tlu_icr.init_field_info ( |
| 645 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICR_NDC_FID, |
| 646 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICR_NDC_FMASK, |
| 647 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICR_NDC_POSITION, |
| 648 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICR_NDC_FIELD_NAME |
| 649 | ); |
| 650 | fire_plc_tlu_ctb_tlr_csr_a_tlu_icr.init_field_info ( |
| 651 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICR_NHC_FID, |
| 652 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICR_NHC_FMASK, |
| 653 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICR_NHC_POSITION, |
| 654 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICR_NHC_FIELD_NAME |
| 655 | ); |
| 656 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_FORCE_LTSSM_NAME); |
| 657 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 658 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 659 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 660 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 661 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 662 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 663 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 664 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 665 | access_name[CSRT_OMNI] = "OMNI"; |
| 666 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 667 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 668 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 669 | access_name[FIRE_JTAG] = "JTAG"; |
| 670 | |
| 671 | fire_plc_tlu_ctb_tlr_csr_a_force_ltssm = new( |
| 672 | fire_plc_tlu_ctb_tlr_csr_a_force_ltssm_state, |
| 673 | FIRE_PLC_TLU_CTB_TLR_CSR_A_FORCE_LTSSM_HW_ADDR, |
| 674 | FIRE_PLC_TLU_CTB_TLR_CSR_A_FORCE_LTSSM_POR_VALUE, |
| 675 | FIRE_PLC_TLU_CTB_TLR_CSR_A_FORCE_LTSSM_RMASK, |
| 676 | FIRE_PLC_TLU_CTB_TLR_CSR_A_FORCE_LTSSM_READ_ONLY_MASK, |
| 677 | FIRE_PLC_TLU_CTB_TLR_CSR_A_FORCE_LTSSM_WRITE_MASK, |
| 678 | FIRE_PLC_TLU_CTB_TLR_CSR_A_FORCE_LTSSM_CLEAR_MASK, |
| 679 | FIRE_PLC_TLU_CTB_TLR_CSR_A_FORCE_LTSSM_SET_MASK, |
| 680 | FIRE_PLC_TLU_CTB_TLR_CSR_A_FORCE_LTSSM_TOGGLE_MASK, |
| 681 | input_name, |
| 682 | FIRE_PLC_TLU_CTB_TLR_CSR_A_FORCE_LTSSM_NUM_FIELDS, |
| 683 | input_access_methods, |
| 684 | access_level, |
| 685 | access_name, |
| 686 | CSRT_OMNI |
| 687 | ); |
| 688 | fire_plc_tlu_ctb_tlr_csr_a_force_ltssm.init_field_info ( |
| 689 | FIRE_PLC_TLU_CTB_TLR_CSR_A_FORCE_LTSSM_FORCE_EN_FID, |
| 690 | FIRE_PLC_TLU_CTB_TLR_CSR_A_FORCE_LTSSM_FORCE_EN_FMASK, |
| 691 | FIRE_PLC_TLU_CTB_TLR_CSR_A_FORCE_LTSSM_FORCE_EN_POSITION, |
| 692 | FIRE_PLC_TLU_CTB_TLR_CSR_A_FORCE_LTSSM_FORCE_EN_FIELD_NAME |
| 693 | ); |
| 694 | fire_plc_tlu_ctb_tlr_csr_a_force_ltssm.init_field_info ( |
| 695 | FIRE_PLC_TLU_CTB_TLR_CSR_A_FORCE_LTSSM_FORCED_LTSSM_FID, |
| 696 | FIRE_PLC_TLU_CTB_TLR_CSR_A_FORCE_LTSSM_FORCED_LTSSM_FMASK, |
| 697 | FIRE_PLC_TLU_CTB_TLR_CSR_A_FORCE_LTSSM_FORCED_LTSSM_POSITION, |
| 698 | FIRE_PLC_TLU_CTB_TLR_CSR_A_FORCE_LTSSM_FORCED_LTSSM_FIELD_NAME |
| 699 | ); |
| 700 | sprintf(base_csr_name,"%s", FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_NAME); |
| 701 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 702 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 703 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 704 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 705 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 706 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 707 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 708 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 709 | access_name[CSRT_OMNI] = "OMNI"; |
| 710 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 711 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 712 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 713 | access_name[FIRE_JTAG] = "JTAG"; |
| 714 | |
| 715 | fire_dlc_ilu_cib_csr_a_ilu_int_en = new( |
| 716 | fire_dlc_ilu_cib_csr_a_ilu_int_en_state, |
| 717 | FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_HW_ADDR, |
| 718 | FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_POR_VALUE, |
| 719 | FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_RMASK, |
| 720 | FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_READ_ONLY_MASK, |
| 721 | FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_WRITE_MASK, |
| 722 | FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_CLEAR_MASK, |
| 723 | FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_SET_MASK, |
| 724 | FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_TOGGLE_MASK, |
| 725 | input_name, |
| 726 | FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_NUM_FIELDS, |
| 727 | input_access_methods, |
| 728 | access_level, |
| 729 | access_name, |
| 730 | CSRT_OMNI |
| 731 | ); |
| 732 | fire_dlc_ilu_cib_csr_a_ilu_int_en.init_field_info ( |
| 733 | FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_SPARE3_S_FID, |
| 734 | FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_SPARE3_S_FMASK, |
| 735 | FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_SPARE3_S_POSITION, |
| 736 | FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_SPARE3_S_FIELD_NAME |
| 737 | ); |
| 738 | fire_dlc_ilu_cib_csr_a_ilu_int_en.init_field_info ( |
| 739 | FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_SPARE2_P_FID, |
| 740 | FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_SPARE2_P_FMASK, |
| 741 | FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_SPARE2_P_POSITION, |
| 742 | FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_SPARE2_P_FIELD_NAME |
| 743 | ); |
| 744 | fire_dlc_ilu_cib_csr_a_ilu_int_en.init_field_info ( |
| 745 | FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_IHB_PE_S_FID, |
| 746 | FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_IHB_PE_S_FMASK, |
| 747 | FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_IHB_PE_S_POSITION, |
| 748 | FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_IHB_PE_S_FIELD_NAME |
| 749 | ); |
| 750 | fire_dlc_ilu_cib_csr_a_ilu_int_en.init_field_info ( |
| 751 | FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_SPARE1_S_FID, |
| 752 | FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_SPARE1_S_FMASK, |
| 753 | FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_SPARE1_S_POSITION, |
| 754 | FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_SPARE1_S_FIELD_NAME |
| 755 | ); |
| 756 | fire_dlc_ilu_cib_csr_a_ilu_int_en.init_field_info ( |
| 757 | FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_SPARE3_P_FID, |
| 758 | FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_SPARE3_P_FMASK, |
| 759 | FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_SPARE3_P_POSITION, |
| 760 | FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_SPARE3_P_FIELD_NAME |
| 761 | ); |
| 762 | fire_dlc_ilu_cib_csr_a_ilu_int_en.init_field_info ( |
| 763 | FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_SPARE2_S_FID, |
| 764 | FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_SPARE2_S_FMASK, |
| 765 | FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_SPARE2_S_POSITION, |
| 766 | FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_SPARE2_S_FIELD_NAME |
| 767 | ); |
| 768 | fire_dlc_ilu_cib_csr_a_ilu_int_en.init_field_info ( |
| 769 | FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_IHB_PE_P_FID, |
| 770 | FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_IHB_PE_P_FMASK, |
| 771 | FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_IHB_PE_P_POSITION, |
| 772 | FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_IHB_PE_P_FIELD_NAME |
| 773 | ); |
| 774 | fire_dlc_ilu_cib_csr_a_ilu_int_en.init_field_info ( |
| 775 | FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_SPARE1_P_FID, |
| 776 | FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_SPARE1_P_FMASK, |
| 777 | FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_SPARE1_P_POSITION, |
| 778 | FIRE_DLC_ILU_CIB_CSR_A_ILU_INT_EN_SPARE1_P_FIELD_NAME |
| 779 | ); |
| 780 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_LOG_NAME); |
| 781 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 782 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 783 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 784 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 785 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 786 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 787 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 788 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 789 | access_name[CSRT_OMNI] = "OMNI"; |
| 790 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 791 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 792 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 793 | access_name[FIRE_JTAG] = "JTAG"; |
| 794 | |
| 795 | fire_plc_tlu_ctb_tlr_csr_a_oe_log = new( |
| 796 | fire_plc_tlu_ctb_tlr_csr_a_oe_log_state, |
| 797 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_LOG_HW_ADDR, |
| 798 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_LOG_POR_VALUE, |
| 799 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_LOG_RMASK, |
| 800 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_LOG_READ_ONLY_MASK, |
| 801 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_LOG_WRITE_MASK, |
| 802 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_LOG_CLEAR_MASK, |
| 803 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_LOG_SET_MASK, |
| 804 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_LOG_TOGGLE_MASK, |
| 805 | input_name, |
| 806 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_LOG_NUM_FIELDS, |
| 807 | input_access_methods, |
| 808 | access_level, |
| 809 | access_name, |
| 810 | CSRT_OMNI |
| 811 | ); |
| 812 | fire_plc_tlu_ctb_tlr_csr_a_oe_log.init_field_info ( |
| 813 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_LOG_EN_FID, |
| 814 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_LOG_EN_FMASK, |
| 815 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_LOG_EN_POSITION, |
| 816 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_LOG_EN_FIELD_NAME |
| 817 | ); |
| 818 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_EN_NAME); |
| 819 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 820 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 821 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 822 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 823 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 824 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 825 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 826 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 827 | access_name[CSRT_OMNI] = "OMNI"; |
| 828 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 829 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 830 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 831 | access_name[FIRE_JTAG] = "JTAG"; |
| 832 | |
| 833 | fire_plc_tlu_ctb_tlr_csr_a_event_err_int_en = new( |
| 834 | fire_plc_tlu_ctb_tlr_csr_a_event_err_int_en_state, |
| 835 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_EN_HW_ADDR, |
| 836 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_EN_POR_VALUE, |
| 837 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_EN_RMASK, |
| 838 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_EN_READ_ONLY_MASK, |
| 839 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_EN_WRITE_MASK, |
| 840 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_EN_CLEAR_MASK, |
| 841 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_EN_SET_MASK, |
| 842 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_EN_TOGGLE_MASK, |
| 843 | input_name, |
| 844 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_EN_NUM_FIELDS, |
| 845 | input_access_methods, |
| 846 | access_level, |
| 847 | access_name, |
| 848 | CSRT_OMNI |
| 849 | ); |
| 850 | fire_plc_tlu_ctb_tlr_csr_a_event_err_int_en.init_field_info ( |
| 851 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_EN_EN_ERROR_FID, |
| 852 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_EN_EN_ERROR_FMASK, |
| 853 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_EN_EN_ERROR_POSITION, |
| 854 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_EN_EN_ERROR_FIELD_NAME |
| 855 | ); |
| 856 | fire_plc_tlu_ctb_tlr_csr_a_event_err_int_en.init_field_info ( |
| 857 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_EN_EN_EVENT_FID, |
| 858 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_EN_EN_EVENT_FMASK, |
| 859 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_EN_EN_EVENT_POSITION, |
| 860 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_EN_EN_EVENT_FIELD_NAME |
| 861 | ); |
| 862 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_NAME); |
| 863 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 864 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 865 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 866 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 867 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 868 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 869 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 870 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 871 | access_name[CSRT_OMNI] = "OMNI"; |
| 872 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 873 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 874 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 875 | access_name[FIRE_JTAG] = "JTAG"; |
| 876 | |
| 877 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1s_alias = new( |
| 878 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1c_alias_state, |
| 879 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_HW_ADDR, |
| 880 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_POR_VALUE, |
| 881 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_RMASK, |
| 882 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_READ_ONLY_MASK, |
| 883 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_WRITE_MASK, |
| 884 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_CLEAR_MASK, |
| 885 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_SET_MASK, |
| 886 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_TOGGLE_MASK, |
| 887 | input_name, |
| 888 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_NUM_FIELDS, |
| 889 | input_access_methods, |
| 890 | access_level, |
| 891 | access_name, |
| 892 | CSRT_OMNI |
| 893 | ); |
| 894 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1s_alias.init_field_info ( |
| 895 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_SPARE_P_FID, |
| 896 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_SPARE_P_FMASK, |
| 897 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_SPARE_P_POSITION, |
| 898 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_SPARE_P_FIELD_NAME |
| 899 | ); |
| 900 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1s_alias.init_field_info ( |
| 901 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_ROF_P_FID, |
| 902 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_ROF_P_FMASK, |
| 903 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_ROF_P_POSITION, |
| 904 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_ROF_P_FIELD_NAME |
| 905 | ); |
| 906 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1s_alias.init_field_info ( |
| 907 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_UR_P_FID, |
| 908 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_UR_P_FMASK, |
| 909 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_UR_P_POSITION, |
| 910 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_UR_P_FIELD_NAME |
| 911 | ); |
| 912 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1s_alias.init_field_info ( |
| 913 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_MFP_P_FID, |
| 914 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_MFP_P_FMASK, |
| 915 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_MFP_P_POSITION, |
| 916 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_MFP_P_FIELD_NAME |
| 917 | ); |
| 918 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1s_alias.init_field_info ( |
| 919 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_SPARE_S_FID, |
| 920 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_SPARE_S_FMASK, |
| 921 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_SPARE_S_POSITION, |
| 922 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_SPARE_S_FIELD_NAME |
| 923 | ); |
| 924 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1s_alias.init_field_info ( |
| 925 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_SPARE1_FID, |
| 926 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_SPARE1_FMASK, |
| 927 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_SPARE1_POSITION, |
| 928 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_SPARE1_FIELD_NAME |
| 929 | ); |
| 930 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1s_alias.init_field_info ( |
| 931 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_SPARE2_FID, |
| 932 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_SPARE2_FMASK, |
| 933 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_SPARE2_POSITION, |
| 934 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_SPARE2_FIELD_NAME |
| 935 | ); |
| 936 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1s_alias.init_field_info ( |
| 937 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_ROF_S_FID, |
| 938 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_ROF_S_FMASK, |
| 939 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_ROF_S_POSITION, |
| 940 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_ROF_S_FIELD_NAME |
| 941 | ); |
| 942 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1s_alias.init_field_info ( |
| 943 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_UR_S_FID, |
| 944 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_UR_S_FMASK, |
| 945 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_UR_S_POSITION, |
| 946 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_UR_S_FIELD_NAME |
| 947 | ); |
| 948 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1s_alias.init_field_info ( |
| 949 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_CTO_P_FID, |
| 950 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_CTO_P_FMASK, |
| 951 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_CTO_P_POSITION, |
| 952 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_CTO_P_FIELD_NAME |
| 953 | ); |
| 954 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1s_alias.init_field_info ( |
| 955 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_MFP_S_FID, |
| 956 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_MFP_S_FMASK, |
| 957 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_MFP_S_POSITION, |
| 958 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_MFP_S_FIELD_NAME |
| 959 | ); |
| 960 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1s_alias.init_field_info ( |
| 961 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_PP_P_FID, |
| 962 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_PP_P_FMASK, |
| 963 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_PP_P_POSITION, |
| 964 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_PP_P_FIELD_NAME |
| 965 | ); |
| 966 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1s_alias.init_field_info ( |
| 967 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_CTO_S_FID, |
| 968 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_CTO_S_FMASK, |
| 969 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_CTO_S_POSITION, |
| 970 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_CTO_S_FIELD_NAME |
| 971 | ); |
| 972 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1s_alias.init_field_info ( |
| 973 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_PP_S_FID, |
| 974 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_PP_S_FMASK, |
| 975 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_PP_S_POSITION, |
| 976 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_PP_S_FIELD_NAME |
| 977 | ); |
| 978 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1s_alias.init_field_info ( |
| 979 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_DLP_P_FID, |
| 980 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_DLP_P_FMASK, |
| 981 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_DLP_P_POSITION, |
| 982 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_DLP_P_FIELD_NAME |
| 983 | ); |
| 984 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1s_alias.init_field_info ( |
| 985 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_DLP_S_FID, |
| 986 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_DLP_S_FMASK, |
| 987 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_DLP_S_POSITION, |
| 988 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_DLP_S_FIELD_NAME |
| 989 | ); |
| 990 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1s_alias.init_field_info ( |
| 991 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_FCP_P_FID, |
| 992 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_FCP_P_FMASK, |
| 993 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_FCP_P_POSITION, |
| 994 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_FCP_P_FIELD_NAME |
| 995 | ); |
| 996 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1s_alias.init_field_info ( |
| 997 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_UC_P_FID, |
| 998 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_UC_P_FMASK, |
| 999 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_UC_P_POSITION, |
| 1000 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_UC_P_FIELD_NAME |
| 1001 | ); |
| 1002 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1s_alias.init_field_info ( |
| 1003 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_FCP_S_FID, |
| 1004 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_FCP_S_FMASK, |
| 1005 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_FCP_S_POSITION, |
| 1006 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_FCP_S_FIELD_NAME |
| 1007 | ); |
| 1008 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1s_alias.init_field_info ( |
| 1009 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_UC_S_FID, |
| 1010 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_UC_S_FMASK, |
| 1011 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_UC_S_POSITION, |
| 1012 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1S_ALIAS_UC_S_FIELD_NAME |
| 1013 | ); |
| 1014 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_STS_NAME); |
| 1015 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 1016 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 1017 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 1018 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 1019 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 1020 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 1021 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 1022 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 1023 | access_name[CSRT_OMNI] = "OMNI"; |
| 1024 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 1025 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 1026 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 1027 | access_name[FIRE_JTAG] = "JTAG"; |
| 1028 | |
| 1029 | fire_plc_tlu_ctb_tlr_csr_a_lnk_sts = new( |
| 1030 | fire_plc_tlu_ctb_tlr_csr_a_lnk_sts_state, |
| 1031 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_STS_HW_ADDR, |
| 1032 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_STS_POR_VALUE, |
| 1033 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_STS_RMASK, |
| 1034 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_STS_READ_ONLY_MASK, |
| 1035 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_STS_WRITE_MASK, |
| 1036 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_STS_CLEAR_MASK, |
| 1037 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_STS_SET_MASK, |
| 1038 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_STS_TOGGLE_MASK, |
| 1039 | input_name, |
| 1040 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_STS_NUM_FIELDS, |
| 1041 | input_access_methods, |
| 1042 | access_level, |
| 1043 | access_name, |
| 1044 | CSRT_OMNI |
| 1045 | ); |
| 1046 | fire_plc_tlu_ctb_tlr_csr_a_lnk_sts.init_field_info ( |
| 1047 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_STS_CLOCK_FID, |
| 1048 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_STS_CLOCK_FMASK, |
| 1049 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_STS_CLOCK_POSITION, |
| 1050 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_STS_CLOCK_FIELD_NAME |
| 1051 | ); |
| 1052 | fire_plc_tlu_ctb_tlr_csr_a_lnk_sts.init_field_info ( |
| 1053 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_STS_TRAIN_FID, |
| 1054 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_STS_TRAIN_FMASK, |
| 1055 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_STS_TRAIN_POSITION, |
| 1056 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_STS_TRAIN_FIELD_NAME |
| 1057 | ); |
| 1058 | fire_plc_tlu_ctb_tlr_csr_a_lnk_sts.init_field_info ( |
| 1059 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_STS_SPARE_FID, |
| 1060 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_STS_SPARE_FMASK, |
| 1061 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_STS_SPARE_POSITION, |
| 1062 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_STS_SPARE_FIELD_NAME |
| 1063 | ); |
| 1064 | fire_plc_tlu_ctb_tlr_csr_a_lnk_sts.init_field_info ( |
| 1065 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_STS_SPEED_FID, |
| 1066 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_STS_SPEED_FMASK, |
| 1067 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_STS_SPEED_POSITION, |
| 1068 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_STS_SPEED_FIELD_NAME |
| 1069 | ); |
| 1070 | fire_plc_tlu_ctb_tlr_csr_a_lnk_sts.init_field_info ( |
| 1071 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_STS_WIDTH_FID, |
| 1072 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_STS_WIDTH_FMASK, |
| 1073 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_STS_WIDTH_POSITION, |
| 1074 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_STS_WIDTH_FIELD_NAME |
| 1075 | ); |
| 1076 | sprintf(base_csr_name,"%s", FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_EN_NAME); |
| 1077 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 1078 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 1079 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 1080 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 1081 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 1082 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 1083 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 1084 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 1085 | access_name[CSRT_OMNI] = "OMNI"; |
| 1086 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 1087 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 1088 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 1089 | access_name[FIRE_JTAG] = "JTAG"; |
| 1090 | |
| 1091 | fire_dlc_ilu_cib_csr_a_ilu_log_en = new( |
| 1092 | fire_dlc_ilu_cib_csr_a_ilu_log_en_state, |
| 1093 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_EN_HW_ADDR, |
| 1094 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_EN_POR_VALUE, |
| 1095 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_EN_RMASK, |
| 1096 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_EN_READ_ONLY_MASK, |
| 1097 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_EN_WRITE_MASK, |
| 1098 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_EN_CLEAR_MASK, |
| 1099 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_EN_SET_MASK, |
| 1100 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_EN_TOGGLE_MASK, |
| 1101 | input_name, |
| 1102 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_EN_NUM_FIELDS, |
| 1103 | input_access_methods, |
| 1104 | access_level, |
| 1105 | access_name, |
| 1106 | CSRT_OMNI |
| 1107 | ); |
| 1108 | fire_dlc_ilu_cib_csr_a_ilu_log_en.init_field_info ( |
| 1109 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_EN_SPARE1_FID, |
| 1110 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_EN_SPARE1_FMASK, |
| 1111 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_EN_SPARE1_POSITION, |
| 1112 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_EN_SPARE1_FIELD_NAME |
| 1113 | ); |
| 1114 | fire_dlc_ilu_cib_csr_a_ilu_log_en.init_field_info ( |
| 1115 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_EN_SPARE2_FID, |
| 1116 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_EN_SPARE2_FMASK, |
| 1117 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_EN_SPARE2_POSITION, |
| 1118 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_EN_SPARE2_FIELD_NAME |
| 1119 | ); |
| 1120 | fire_dlc_ilu_cib_csr_a_ilu_log_en.init_field_info ( |
| 1121 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_EN_IHB_PE_FID, |
| 1122 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_EN_IHB_PE_FMASK, |
| 1123 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_EN_IHB_PE_POSITION, |
| 1124 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_EN_IHB_PE_FIELD_NAME |
| 1125 | ); |
| 1126 | fire_dlc_ilu_cib_csr_a_ilu_log_en.init_field_info ( |
| 1127 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_EN_SPARE3_FID, |
| 1128 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_EN_SPARE3_FMASK, |
| 1129 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_EN_SPARE3_POSITION, |
| 1130 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_EN_SPARE3_FIELD_NAME |
| 1131 | ); |
| 1132 | sprintf(base_csr_name,"%s", FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_NAME); |
| 1133 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 1134 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 1135 | access_level[CSRT_OMNI] = CSRT_READ_ACCESS; |
| 1136 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 1137 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 1138 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 1139 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 1140 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 1141 | access_name[CSRT_OMNI] = "OMNI"; |
| 1142 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 1143 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 1144 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 1145 | access_name[FIRE_JTAG] = "JTAG"; |
| 1146 | |
| 1147 | fire_dlc_ilu_cib_csr_a_ilu_en_err = new( |
| 1148 | fire_dlc_ilu_cib_csr_a_ilu_en_err_state, |
| 1149 | FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_HW_ADDR, |
| 1150 | FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_POR_VALUE, |
| 1151 | FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_RMASK, |
| 1152 | FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_READ_ONLY_MASK, |
| 1153 | FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_WRITE_MASK, |
| 1154 | FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_CLEAR_MASK, |
| 1155 | FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_SET_MASK, |
| 1156 | FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_TOGGLE_MASK, |
| 1157 | input_name, |
| 1158 | FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_NUM_FIELDS, |
| 1159 | input_access_methods, |
| 1160 | access_level, |
| 1161 | access_name, |
| 1162 | CSRT_DAEMON |
| 1163 | ); |
| 1164 | fire_dlc_ilu_cib_csr_a_ilu_en_err.init_field_info ( |
| 1165 | FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_SPARE3_S_FID, |
| 1166 | FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_SPARE3_S_FMASK, |
| 1167 | FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_SPARE3_S_POSITION, |
| 1168 | FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_SPARE3_S_FIELD_NAME |
| 1169 | ); |
| 1170 | fire_dlc_ilu_cib_csr_a_ilu_en_err.init_field_info ( |
| 1171 | FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_SPARE2_P_FID, |
| 1172 | FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_SPARE2_P_FMASK, |
| 1173 | FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_SPARE2_P_POSITION, |
| 1174 | FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_SPARE2_P_FIELD_NAME |
| 1175 | ); |
| 1176 | fire_dlc_ilu_cib_csr_a_ilu_en_err.init_field_info ( |
| 1177 | FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_IHB_PE_S_FID, |
| 1178 | FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_IHB_PE_S_FMASK, |
| 1179 | FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_IHB_PE_S_POSITION, |
| 1180 | FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_IHB_PE_S_FIELD_NAME |
| 1181 | ); |
| 1182 | fire_dlc_ilu_cib_csr_a_ilu_en_err.init_field_info ( |
| 1183 | FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_SPARE1_S_FID, |
| 1184 | FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_SPARE1_S_FMASK, |
| 1185 | FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_SPARE1_S_POSITION, |
| 1186 | FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_SPARE1_S_FIELD_NAME |
| 1187 | ); |
| 1188 | fire_dlc_ilu_cib_csr_a_ilu_en_err.init_field_info ( |
| 1189 | FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_SPARE3_P_FID, |
| 1190 | FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_SPARE3_P_FMASK, |
| 1191 | FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_SPARE3_P_POSITION, |
| 1192 | FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_SPARE3_P_FIELD_NAME |
| 1193 | ); |
| 1194 | fire_dlc_ilu_cib_csr_a_ilu_en_err.init_field_info ( |
| 1195 | FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_SPARE2_S_FID, |
| 1196 | FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_SPARE2_S_FMASK, |
| 1197 | FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_SPARE2_S_POSITION, |
| 1198 | FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_SPARE2_S_FIELD_NAME |
| 1199 | ); |
| 1200 | fire_dlc_ilu_cib_csr_a_ilu_en_err.init_field_info ( |
| 1201 | FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_IHB_PE_P_FID, |
| 1202 | FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_IHB_PE_P_FMASK, |
| 1203 | FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_IHB_PE_P_POSITION, |
| 1204 | FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_IHB_PE_P_FIELD_NAME |
| 1205 | ); |
| 1206 | fire_dlc_ilu_cib_csr_a_ilu_en_err.init_field_info ( |
| 1207 | FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_SPARE1_P_FID, |
| 1208 | FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_SPARE1_P_FMASK, |
| 1209 | FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_SPARE1_P_POSITION, |
| 1210 | FIRE_DLC_ILU_CIB_CSR_A_ILU_EN_ERR_SPARE1_P_FIELD_NAME |
| 1211 | ); |
| 1212 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_LOG_EN_NAME); |
| 1213 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 1214 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 1215 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 1216 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 1217 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 1218 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 1219 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 1220 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 1221 | access_name[CSRT_OMNI] = "OMNI"; |
| 1222 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 1223 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 1224 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 1225 | access_name[FIRE_JTAG] = "JTAG"; |
| 1226 | |
| 1227 | fire_plc_tlu_ctb_tlr_csr_a_event_err_log_en = new( |
| 1228 | fire_plc_tlu_ctb_tlr_csr_a_event_err_log_en_state, |
| 1229 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_LOG_EN_HW_ADDR, |
| 1230 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_LOG_EN_POR_VALUE, |
| 1231 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_LOG_EN_RMASK, |
| 1232 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_LOG_EN_READ_ONLY_MASK, |
| 1233 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_LOG_EN_WRITE_MASK, |
| 1234 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_LOG_EN_CLEAR_MASK, |
| 1235 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_LOG_EN_SET_MASK, |
| 1236 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_LOG_EN_TOGGLE_MASK, |
| 1237 | input_name, |
| 1238 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_LOG_EN_NUM_FIELDS, |
| 1239 | input_access_methods, |
| 1240 | access_level, |
| 1241 | access_name, |
| 1242 | CSRT_OMNI |
| 1243 | ); |
| 1244 | fire_plc_tlu_ctb_tlr_csr_a_event_err_log_en.init_field_info ( |
| 1245 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_LOG_EN_EN_ERROR_FID, |
| 1246 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_LOG_EN_EN_ERROR_FMASK, |
| 1247 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_LOG_EN_EN_ERROR_POSITION, |
| 1248 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_LOG_EN_EN_ERROR_FIELD_NAME |
| 1249 | ); |
| 1250 | fire_plc_tlu_ctb_tlr_csr_a_event_err_log_en.init_field_info ( |
| 1251 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_LOG_EN_EN_EVENT_FID, |
| 1252 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_LOG_EN_EN_EVENT_FMASK, |
| 1253 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_LOG_EN_EN_EVENT_POSITION, |
| 1254 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_LOG_EN_EN_EVENT_FIELD_NAME |
| 1255 | ); |
| 1256 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_INT_EN_NAME); |
| 1257 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 1258 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 1259 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 1260 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 1261 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 1262 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 1263 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 1264 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 1265 | access_name[CSRT_OMNI] = "OMNI"; |
| 1266 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 1267 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 1268 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 1269 | access_name[FIRE_JTAG] = "JTAG"; |
| 1270 | |
| 1271 | fire_plc_tlu_ctb_tlr_csr_a_oe_int_en = new( |
| 1272 | fire_plc_tlu_ctb_tlr_csr_a_oe_int_en_state, |
| 1273 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_INT_EN_HW_ADDR, |
| 1274 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_INT_EN_POR_VALUE, |
| 1275 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_INT_EN_RMASK, |
| 1276 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_INT_EN_READ_ONLY_MASK, |
| 1277 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_INT_EN_WRITE_MASK, |
| 1278 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_INT_EN_CLEAR_MASK, |
| 1279 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_INT_EN_SET_MASK, |
| 1280 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_INT_EN_TOGGLE_MASK, |
| 1281 | input_name, |
| 1282 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_INT_EN_NUM_FIELDS, |
| 1283 | input_access_methods, |
| 1284 | access_level, |
| 1285 | access_name, |
| 1286 | CSRT_OMNI |
| 1287 | ); |
| 1288 | fire_plc_tlu_ctb_tlr_csr_a_oe_int_en.init_field_info ( |
| 1289 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_INT_EN_EN_S_FID, |
| 1290 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_INT_EN_EN_S_FMASK, |
| 1291 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_INT_EN_EN_S_POSITION, |
| 1292 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_INT_EN_EN_S_FIELD_NAME |
| 1293 | ); |
| 1294 | fire_plc_tlu_ctb_tlr_csr_a_oe_int_en.init_field_info ( |
| 1295 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_INT_EN_EN_P_FID, |
| 1296 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_INT_EN_EN_P_FMASK, |
| 1297 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_INT_EN_EN_P_POSITION, |
| 1298 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_INT_EN_EN_P_FIELD_NAME |
| 1299 | ); |
| 1300 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_NAME); |
| 1301 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 1302 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 1303 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 1304 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 1305 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 1306 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 1307 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 1308 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 1309 | access_name[CSRT_OMNI] = "OMNI"; |
| 1310 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 1311 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 1312 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 1313 | access_name[FIRE_JTAG] = "JTAG"; |
| 1314 | |
| 1315 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1c_alias = new( |
| 1316 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1c_alias_state, |
| 1317 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_HW_ADDR, |
| 1318 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_POR_VALUE, |
| 1319 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_RMASK, |
| 1320 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_READ_ONLY_MASK, |
| 1321 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_WRITE_MASK, |
| 1322 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_CLEAR_MASK, |
| 1323 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_SET_MASK, |
| 1324 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_TOGGLE_MASK, |
| 1325 | input_name, |
| 1326 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_NUM_FIELDS, |
| 1327 | input_access_methods, |
| 1328 | access_level, |
| 1329 | access_name, |
| 1330 | CSRT_OMNI |
| 1331 | ); |
| 1332 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1c_alias.init_field_info ( |
| 1333 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_SPARE_P_FID, |
| 1334 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_SPARE_P_FMASK, |
| 1335 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_SPARE_P_POSITION, |
| 1336 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_SPARE_P_FIELD_NAME |
| 1337 | ); |
| 1338 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1c_alias.init_field_info ( |
| 1339 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_ROF_P_FID, |
| 1340 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_ROF_P_FMASK, |
| 1341 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_ROF_P_POSITION, |
| 1342 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_ROF_P_FIELD_NAME |
| 1343 | ); |
| 1344 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1c_alias.init_field_info ( |
| 1345 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_UR_P_FID, |
| 1346 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_UR_P_FMASK, |
| 1347 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_UR_P_POSITION, |
| 1348 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_UR_P_FIELD_NAME |
| 1349 | ); |
| 1350 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1c_alias.init_field_info ( |
| 1351 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_MFP_P_FID, |
| 1352 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_MFP_P_FMASK, |
| 1353 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_MFP_P_POSITION, |
| 1354 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_MFP_P_FIELD_NAME |
| 1355 | ); |
| 1356 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1c_alias.init_field_info ( |
| 1357 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_SPARE_S_FID, |
| 1358 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_SPARE_S_FMASK, |
| 1359 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_SPARE_S_POSITION, |
| 1360 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_SPARE_S_FIELD_NAME |
| 1361 | ); |
| 1362 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1c_alias.init_field_info ( |
| 1363 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_SPARE1_FID, |
| 1364 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_SPARE1_FMASK, |
| 1365 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_SPARE1_POSITION, |
| 1366 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_SPARE1_FIELD_NAME |
| 1367 | ); |
| 1368 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1c_alias.init_field_info ( |
| 1369 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_SPARE2_FID, |
| 1370 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_SPARE2_FMASK, |
| 1371 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_SPARE2_POSITION, |
| 1372 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_SPARE2_FIELD_NAME |
| 1373 | ); |
| 1374 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1c_alias.init_field_info ( |
| 1375 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_ROF_S_FID, |
| 1376 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_ROF_S_FMASK, |
| 1377 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_ROF_S_POSITION, |
| 1378 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_ROF_S_FIELD_NAME |
| 1379 | ); |
| 1380 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1c_alias.init_field_info ( |
| 1381 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_UR_S_FID, |
| 1382 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_UR_S_FMASK, |
| 1383 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_UR_S_POSITION, |
| 1384 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_UR_S_FIELD_NAME |
| 1385 | ); |
| 1386 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1c_alias.init_field_info ( |
| 1387 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_CTO_P_FID, |
| 1388 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_CTO_P_FMASK, |
| 1389 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_CTO_P_POSITION, |
| 1390 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_CTO_P_FIELD_NAME |
| 1391 | ); |
| 1392 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1c_alias.init_field_info ( |
| 1393 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_MFP_S_FID, |
| 1394 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_MFP_S_FMASK, |
| 1395 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_MFP_S_POSITION, |
| 1396 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_MFP_S_FIELD_NAME |
| 1397 | ); |
| 1398 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1c_alias.init_field_info ( |
| 1399 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_PP_P_FID, |
| 1400 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_PP_P_FMASK, |
| 1401 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_PP_P_POSITION, |
| 1402 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_PP_P_FIELD_NAME |
| 1403 | ); |
| 1404 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1c_alias.init_field_info ( |
| 1405 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_CTO_S_FID, |
| 1406 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_CTO_S_FMASK, |
| 1407 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_CTO_S_POSITION, |
| 1408 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_CTO_S_FIELD_NAME |
| 1409 | ); |
| 1410 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1c_alias.init_field_info ( |
| 1411 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_PP_S_FID, |
| 1412 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_PP_S_FMASK, |
| 1413 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_PP_S_POSITION, |
| 1414 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_PP_S_FIELD_NAME |
| 1415 | ); |
| 1416 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1c_alias.init_field_info ( |
| 1417 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_DLP_P_FID, |
| 1418 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_DLP_P_FMASK, |
| 1419 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_DLP_P_POSITION, |
| 1420 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_DLP_P_FIELD_NAME |
| 1421 | ); |
| 1422 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1c_alias.init_field_info ( |
| 1423 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_DLP_S_FID, |
| 1424 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_DLP_S_FMASK, |
| 1425 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_DLP_S_POSITION, |
| 1426 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_DLP_S_FIELD_NAME |
| 1427 | ); |
| 1428 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1c_alias.init_field_info ( |
| 1429 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_FCP_P_FID, |
| 1430 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_FCP_P_FMASK, |
| 1431 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_FCP_P_POSITION, |
| 1432 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_FCP_P_FIELD_NAME |
| 1433 | ); |
| 1434 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1c_alias.init_field_info ( |
| 1435 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_UC_P_FID, |
| 1436 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_UC_P_FMASK, |
| 1437 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_UC_P_POSITION, |
| 1438 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_UC_P_FIELD_NAME |
| 1439 | ); |
| 1440 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1c_alias.init_field_info ( |
| 1441 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_FCP_S_FID, |
| 1442 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_FCP_S_FMASK, |
| 1443 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_FCP_S_POSITION, |
| 1444 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_FCP_S_FIELD_NAME |
| 1445 | ); |
| 1446 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1c_alias.init_field_info ( |
| 1447 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_UC_S_FID, |
| 1448 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_UC_S_FMASK, |
| 1449 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_UC_S_POSITION, |
| 1450 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_ERR_RW1C_ALIAS_UC_S_FIELD_NAME |
| 1451 | ); |
| 1452 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_EN_ERR_NAME); |
| 1453 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 1454 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 1455 | access_level[CSRT_OMNI] = CSRT_READ_ACCESS; |
| 1456 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 1457 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 1458 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 1459 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 1460 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 1461 | access_name[CSRT_OMNI] = "OMNI"; |
| 1462 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 1463 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 1464 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 1465 | access_name[FIRE_JTAG] = "JTAG"; |
| 1466 | |
| 1467 | fire_plc_tlu_ctb_tlr_csr_a_oe_en_err = new( |
| 1468 | fire_plc_tlu_ctb_tlr_csr_a_oe_en_err_state, |
| 1469 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_EN_ERR_HW_ADDR, |
| 1470 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_EN_ERR_POR_VALUE, |
| 1471 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_EN_ERR_RMASK, |
| 1472 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_EN_ERR_READ_ONLY_MASK, |
| 1473 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_EN_ERR_WRITE_MASK, |
| 1474 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_EN_ERR_CLEAR_MASK, |
| 1475 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_EN_ERR_SET_MASK, |
| 1476 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_EN_ERR_TOGGLE_MASK, |
| 1477 | input_name, |
| 1478 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_EN_ERR_NUM_FIELDS, |
| 1479 | input_access_methods, |
| 1480 | access_level, |
| 1481 | access_name, |
| 1482 | CSRT_DAEMON |
| 1483 | ); |
| 1484 | fire_plc_tlu_ctb_tlr_csr_a_oe_en_err.init_field_info ( |
| 1485 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_EN_ERR_ERR_P_FID, |
| 1486 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_EN_ERR_ERR_P_FMASK, |
| 1487 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_EN_ERR_ERR_P_POSITION, |
| 1488 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_EN_ERR_ERR_P_FIELD_NAME |
| 1489 | ); |
| 1490 | fire_plc_tlu_ctb_tlr_csr_a_oe_en_err.init_field_info ( |
| 1491 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_EN_ERR_ERR_S_FID, |
| 1492 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_EN_ERR_ERR_S_FMASK, |
| 1493 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_EN_ERR_ERR_S_POSITION, |
| 1494 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_EN_ERR_ERR_S_FIELD_NAME |
| 1495 | ); |
| 1496 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_NUM_NAME); |
| 1497 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 1498 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 1499 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 1500 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 1501 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 1502 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 1503 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 1504 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 1505 | access_name[CSRT_OMNI] = "OMNI"; |
| 1506 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 1507 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 1508 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 1509 | access_name[FIRE_JTAG] = "JTAG"; |
| 1510 | |
| 1511 | fire_plc_tlu_ctb_tlr_csr_a_symbol_num = new( |
| 1512 | fire_plc_tlu_ctb_tlr_csr_a_symbol_num_state, |
| 1513 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_NUM_HW_ADDR, |
| 1514 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_NUM_POR_VALUE, |
| 1515 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_NUM_RMASK, |
| 1516 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_NUM_READ_ONLY_MASK, |
| 1517 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_NUM_WRITE_MASK, |
| 1518 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_NUM_CLEAR_MASK, |
| 1519 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_NUM_SET_MASK, |
| 1520 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_NUM_TOGGLE_MASK, |
| 1521 | input_name, |
| 1522 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_NUM_NUM_FIELDS, |
| 1523 | input_access_methods, |
| 1524 | access_level, |
| 1525 | access_name, |
| 1526 | CSRT_OMNI |
| 1527 | ); |
| 1528 | fire_plc_tlu_ctb_tlr_csr_a_symbol_num.init_field_info ( |
| 1529 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_NUM_SKIP_SYMBOLS_FID, |
| 1530 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_NUM_SKIP_SYMBOLS_FMASK, |
| 1531 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_NUM_SKIP_SYMBOLS_POSITION, |
| 1532 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_NUM_SKIP_SYMBOLS_FIELD_NAME |
| 1533 | ); |
| 1534 | fire_plc_tlu_ctb_tlr_csr_a_symbol_num.init_field_info ( |
| 1535 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_NUM_TS1_SYMBOLS_FID, |
| 1536 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_NUM_TS1_SYMBOLS_FMASK, |
| 1537 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_NUM_TS1_SYMBOLS_POSITION, |
| 1538 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_NUM_TS1_SYMBOLS_FIELD_NAME |
| 1539 | ); |
| 1540 | fire_plc_tlu_ctb_tlr_csr_a_symbol_num.init_field_info ( |
| 1541 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_NUM_SPARE2_FID, |
| 1542 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_NUM_SPARE2_FMASK, |
| 1543 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_NUM_SPARE2_POSITION, |
| 1544 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_NUM_SPARE2_FIELD_NAME |
| 1545 | ); |
| 1546 | fire_plc_tlu_ctb_tlr_csr_a_symbol_num.init_field_info ( |
| 1547 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_NUM_SPARE_FID, |
| 1548 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_NUM_SPARE_FMASK, |
| 1549 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_NUM_SPARE_POSITION, |
| 1550 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_NUM_SPARE_FIELD_NAME |
| 1551 | ); |
| 1552 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_REPLAY_TIMER_NAME); |
| 1553 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 1554 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 1555 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 1556 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 1557 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 1558 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 1559 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 1560 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 1561 | access_name[CSRT_OMNI] = "OMNI"; |
| 1562 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 1563 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 1564 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 1565 | access_name[FIRE_JTAG] = "JTAG"; |
| 1566 | |
| 1567 | fire_plc_tlu_ctb_tlr_csr_a_replay_timer = new( |
| 1568 | fire_plc_tlu_ctb_tlr_csr_a_replay_timer_state, |
| 1569 | FIRE_PLC_TLU_CTB_TLR_CSR_A_REPLAY_TIMER_HW_ADDR, |
| 1570 | FIRE_PLC_TLU_CTB_TLR_CSR_A_REPLAY_TIMER_POR_VALUE, |
| 1571 | FIRE_PLC_TLU_CTB_TLR_CSR_A_REPLAY_TIMER_RMASK, |
| 1572 | FIRE_PLC_TLU_CTB_TLR_CSR_A_REPLAY_TIMER_READ_ONLY_MASK, |
| 1573 | FIRE_PLC_TLU_CTB_TLR_CSR_A_REPLAY_TIMER_WRITE_MASK, |
| 1574 | FIRE_PLC_TLU_CTB_TLR_CSR_A_REPLAY_TIMER_CLEAR_MASK, |
| 1575 | FIRE_PLC_TLU_CTB_TLR_CSR_A_REPLAY_TIMER_SET_MASK, |
| 1576 | FIRE_PLC_TLU_CTB_TLR_CSR_A_REPLAY_TIMER_TOGGLE_MASK, |
| 1577 | input_name, |
| 1578 | FIRE_PLC_TLU_CTB_TLR_CSR_A_REPLAY_TIMER_NUM_FIELDS, |
| 1579 | input_access_methods, |
| 1580 | access_level, |
| 1581 | access_name, |
| 1582 | CSRT_OMNI |
| 1583 | ); |
| 1584 | fire_plc_tlu_ctb_tlr_csr_a_replay_timer.init_field_info ( |
| 1585 | FIRE_PLC_TLU_CTB_TLR_CSR_A_REPLAY_TIMER_RPLAY_TMR_FID, |
| 1586 | FIRE_PLC_TLU_CTB_TLR_CSR_A_REPLAY_TIMER_RPLAY_TMR_FMASK, |
| 1587 | FIRE_PLC_TLU_CTB_TLR_CSR_A_REPLAY_TIMER_RPLAY_TMR_POSITION, |
| 1588 | FIRE_PLC_TLU_CTB_TLR_CSR_A_REPLAY_TIMER_RPLAY_TMR_FIELD_NAME |
| 1589 | ); |
| 1590 | fire_plc_tlu_ctb_tlr_csr_a_replay_timer.init_field_info ( |
| 1591 | FIRE_PLC_TLU_CTB_TLR_CSR_A_REPLAY_TIMER_REPLAY_NUM_FID, |
| 1592 | FIRE_PLC_TLU_CTB_TLR_CSR_A_REPLAY_TIMER_REPLAY_NUM_FMASK, |
| 1593 | FIRE_PLC_TLU_CTB_TLR_CSR_A_REPLAY_TIMER_REPLAY_NUM_POSITION, |
| 1594 | FIRE_PLC_TLU_CTB_TLR_CSR_A_REPLAY_TIMER_REPLAY_NUM_FIELD_NAME |
| 1595 | ); |
| 1596 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_RUE_HDR1_NAME); |
| 1597 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 1598 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 1599 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 1600 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 1601 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 1602 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 1603 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 1604 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 1605 | access_name[CSRT_OMNI] = "OMNI"; |
| 1606 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 1607 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 1608 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 1609 | access_name[FIRE_JTAG] = "JTAG"; |
| 1610 | |
| 1611 | fire_plc_tlu_ctb_tlr_csr_a_rue_hdr1 = new( |
| 1612 | fire_plc_tlu_ctb_tlr_csr_a_rue_hdr1_state, |
| 1613 | FIRE_PLC_TLU_CTB_TLR_CSR_A_RUE_HDR1_HW_ADDR, |
| 1614 | FIRE_PLC_TLU_CTB_TLR_CSR_A_RUE_HDR1_POR_VALUE, |
| 1615 | FIRE_PLC_TLU_CTB_TLR_CSR_A_RUE_HDR1_RMASK, |
| 1616 | FIRE_PLC_TLU_CTB_TLR_CSR_A_RUE_HDR1_READ_ONLY_MASK, |
| 1617 | FIRE_PLC_TLU_CTB_TLR_CSR_A_RUE_HDR1_WRITE_MASK, |
| 1618 | FIRE_PLC_TLU_CTB_TLR_CSR_A_RUE_HDR1_CLEAR_MASK, |
| 1619 | FIRE_PLC_TLU_CTB_TLR_CSR_A_RUE_HDR1_SET_MASK, |
| 1620 | FIRE_PLC_TLU_CTB_TLR_CSR_A_RUE_HDR1_TOGGLE_MASK, |
| 1621 | input_name, |
| 1622 | FIRE_PLC_TLU_CTB_TLR_CSR_A_RUE_HDR1_NUM_FIELDS, |
| 1623 | input_access_methods, |
| 1624 | access_level, |
| 1625 | access_name, |
| 1626 | CSRT_OMNI |
| 1627 | ); |
| 1628 | fire_plc_tlu_ctb_tlr_csr_a_rue_hdr1.init_field_info ( |
| 1629 | FIRE_PLC_TLU_CTB_TLR_CSR_A_RUE_HDR1_HDR_FID, |
| 1630 | FIRE_PLC_TLU_CTB_TLR_CSR_A_RUE_HDR1_HDR_FMASK, |
| 1631 | FIRE_PLC_TLU_CTB_TLR_CSR_A_RUE_HDR1_HDR_POSITION, |
| 1632 | FIRE_PLC_TLU_CTB_TLR_CSR_A_RUE_HDR1_HDR_FIELD_NAME |
| 1633 | ); |
| 1634 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_RUE_HDR2_NAME); |
| 1635 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 1636 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 1637 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 1638 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 1639 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 1640 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 1641 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 1642 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 1643 | access_name[CSRT_OMNI] = "OMNI"; |
| 1644 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 1645 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 1646 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 1647 | access_name[FIRE_JTAG] = "JTAG"; |
| 1648 | |
| 1649 | fire_plc_tlu_ctb_tlr_csr_a_rue_hdr2 = new( |
| 1650 | fire_plc_tlu_ctb_tlr_csr_a_rue_hdr2_state, |
| 1651 | FIRE_PLC_TLU_CTB_TLR_CSR_A_RUE_HDR2_HW_ADDR, |
| 1652 | FIRE_PLC_TLU_CTB_TLR_CSR_A_RUE_HDR2_POR_VALUE, |
| 1653 | FIRE_PLC_TLU_CTB_TLR_CSR_A_RUE_HDR2_RMASK, |
| 1654 | FIRE_PLC_TLU_CTB_TLR_CSR_A_RUE_HDR2_READ_ONLY_MASK, |
| 1655 | FIRE_PLC_TLU_CTB_TLR_CSR_A_RUE_HDR2_WRITE_MASK, |
| 1656 | FIRE_PLC_TLU_CTB_TLR_CSR_A_RUE_HDR2_CLEAR_MASK, |
| 1657 | FIRE_PLC_TLU_CTB_TLR_CSR_A_RUE_HDR2_SET_MASK, |
| 1658 | FIRE_PLC_TLU_CTB_TLR_CSR_A_RUE_HDR2_TOGGLE_MASK, |
| 1659 | input_name, |
| 1660 | FIRE_PLC_TLU_CTB_TLR_CSR_A_RUE_HDR2_NUM_FIELDS, |
| 1661 | input_access_methods, |
| 1662 | access_level, |
| 1663 | access_name, |
| 1664 | CSRT_OMNI |
| 1665 | ); |
| 1666 | fire_plc_tlu_ctb_tlr_csr_a_rue_hdr2.init_field_info ( |
| 1667 | FIRE_PLC_TLU_CTB_TLR_CSR_A_RUE_HDR2_HDR_FID, |
| 1668 | FIRE_PLC_TLU_CTB_TLR_CSR_A_RUE_HDR2_HDR_FMASK, |
| 1669 | FIRE_PLC_TLU_CTB_TLR_CSR_A_RUE_HDR2_HDR_POSITION, |
| 1670 | FIRE_PLC_TLU_CTB_TLR_CSR_A_RUE_HDR2_HDR_FIELD_NAME |
| 1671 | ); |
| 1672 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF0_NAME); |
| 1673 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 1674 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 1675 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 1676 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 1677 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 1678 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 1679 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 1680 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 1681 | access_name[CSRT_OMNI] = "OMNI"; |
| 1682 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 1683 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 1684 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 1685 | access_name[FIRE_JTAG] = "JTAG"; |
| 1686 | |
| 1687 | fire_plc_tlu_ctb_tlr_csr_a_tlu_prf0 = new( |
| 1688 | fire_plc_tlu_ctb_tlr_csr_a_tlu_prf0_state, |
| 1689 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF0_HW_ADDR, |
| 1690 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF0_POR_VALUE, |
| 1691 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF0_RMASK, |
| 1692 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF0_READ_ONLY_MASK, |
| 1693 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF0_WRITE_MASK, |
| 1694 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF0_CLEAR_MASK, |
| 1695 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF0_SET_MASK, |
| 1696 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF0_TOGGLE_MASK, |
| 1697 | input_name, |
| 1698 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF0_NUM_FIELDS, |
| 1699 | input_access_methods, |
| 1700 | access_level, |
| 1701 | access_name, |
| 1702 | CSRT_OMNI |
| 1703 | ); |
| 1704 | fire_plc_tlu_ctb_tlr_csr_a_tlu_prf0.init_field_info ( |
| 1705 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF0_CNT_FID, |
| 1706 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF0_CNT_FMASK, |
| 1707 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF0_CNT_POSITION, |
| 1708 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF0_CNT_FIELD_NAME |
| 1709 | ); |
| 1710 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF1_NAME); |
| 1711 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 1712 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 1713 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 1714 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 1715 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 1716 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 1717 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 1718 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 1719 | access_name[CSRT_OMNI] = "OMNI"; |
| 1720 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 1721 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 1722 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 1723 | access_name[FIRE_JTAG] = "JTAG"; |
| 1724 | |
| 1725 | fire_plc_tlu_ctb_tlr_csr_a_tlu_prf1 = new( |
| 1726 | fire_plc_tlu_ctb_tlr_csr_a_tlu_prf1_state, |
| 1727 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF1_HW_ADDR, |
| 1728 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF1_POR_VALUE, |
| 1729 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF1_RMASK, |
| 1730 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF1_READ_ONLY_MASK, |
| 1731 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF1_WRITE_MASK, |
| 1732 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF1_CLEAR_MASK, |
| 1733 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF1_SET_MASK, |
| 1734 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF1_TOGGLE_MASK, |
| 1735 | input_name, |
| 1736 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF1_NUM_FIELDS, |
| 1737 | input_access_methods, |
| 1738 | access_level, |
| 1739 | access_name, |
| 1740 | CSRT_OMNI |
| 1741 | ); |
| 1742 | fire_plc_tlu_ctb_tlr_csr_a_tlu_prf1.init_field_info ( |
| 1743 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF1_CNT_FID, |
| 1744 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF1_CNT_FMASK, |
| 1745 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF1_CNT_POSITION, |
| 1746 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF1_CNT_FIELD_NAME |
| 1747 | ); |
| 1748 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_NAME); |
| 1749 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 1750 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 1751 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 1752 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 1753 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 1754 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 1755 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 1756 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 1757 | access_name[CSRT_OMNI] = "OMNI"; |
| 1758 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 1759 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 1760 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 1761 | access_name[FIRE_JTAG] = "JTAG"; |
| 1762 | |
| 1763 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias = new( |
| 1764 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias_state, |
| 1765 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_HW_ADDR, |
| 1766 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_POR_VALUE, |
| 1767 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_RMASK, |
| 1768 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_READ_ONLY_MASK, |
| 1769 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_WRITE_MASK, |
| 1770 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_CLEAR_MASK, |
| 1771 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_SET_MASK, |
| 1772 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_TOGGLE_MASK, |
| 1773 | input_name, |
| 1774 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_NUM_FIELDS, |
| 1775 | input_access_methods, |
| 1776 | access_level, |
| 1777 | access_name, |
| 1778 | CSRT_OMNI |
| 1779 | ); |
| 1780 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 1781 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_SPARE_P_FID, |
| 1782 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_SPARE_P_FMASK, |
| 1783 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_SPARE_P_POSITION, |
| 1784 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_SPARE_P_FIELD_NAME |
| 1785 | ); |
| 1786 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 1787 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_EPE_P_FID, |
| 1788 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_EPE_P_FMASK, |
| 1789 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_EPE_P_POSITION, |
| 1790 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_EPE_P_FIELD_NAME |
| 1791 | ); |
| 1792 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 1793 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_SPARE_S_FID, |
| 1794 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_SPARE_S_FMASK, |
| 1795 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_SPARE_S_POSITION, |
| 1796 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_SPARE_S_FIELD_NAME |
| 1797 | ); |
| 1798 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 1799 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LIN_P_FID, |
| 1800 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LIN_P_FMASK, |
| 1801 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LIN_P_POSITION, |
| 1802 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LIN_P_FIELD_NAME |
| 1803 | ); |
| 1804 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 1805 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_EPE_S_FID, |
| 1806 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_EPE_S_FMASK, |
| 1807 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_EPE_S_POSITION, |
| 1808 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_EPE_S_FIELD_NAME |
| 1809 | ); |
| 1810 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 1811 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LIN_S_FID, |
| 1812 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LIN_S_FMASK, |
| 1813 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LIN_S_POSITION, |
| 1814 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LIN_S_FIELD_NAME |
| 1815 | ); |
| 1816 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 1817 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_NFP_P_FID, |
| 1818 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_NFP_P_FMASK, |
| 1819 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_NFP_P_POSITION, |
| 1820 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_NFP_P_FIELD_NAME |
| 1821 | ); |
| 1822 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 1823 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_ERP_P_FID, |
| 1824 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_ERP_P_FMASK, |
| 1825 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_ERP_P_POSITION, |
| 1826 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_ERP_P_FIELD_NAME |
| 1827 | ); |
| 1828 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 1829 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_NFP_S_FID, |
| 1830 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_NFP_S_FMASK, |
| 1831 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_NFP_S_POSITION, |
| 1832 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_NFP_S_FIELD_NAME |
| 1833 | ); |
| 1834 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 1835 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_ERP_S_FID, |
| 1836 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_ERP_S_FMASK, |
| 1837 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_ERP_S_POSITION, |
| 1838 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_ERP_S_FIELD_NAME |
| 1839 | ); |
| 1840 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 1841 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_RUC_P_FID, |
| 1842 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_RUC_P_FMASK, |
| 1843 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_RUC_P_POSITION, |
| 1844 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_RUC_P_FIELD_NAME |
| 1845 | ); |
| 1846 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 1847 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_EDP_P_FID, |
| 1848 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_EDP_P_FMASK, |
| 1849 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_EDP_P_POSITION, |
| 1850 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_EDP_P_FIELD_NAME |
| 1851 | ); |
| 1852 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 1853 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_RUC_S_FID, |
| 1854 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_RUC_S_FMASK, |
| 1855 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_RUC_S_POSITION, |
| 1856 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_RUC_S_FIELD_NAME |
| 1857 | ); |
| 1858 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 1859 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LPU_P_FID, |
| 1860 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LPU_P_FMASK, |
| 1861 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LPU_P_POSITION, |
| 1862 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LPU_P_FIELD_NAME |
| 1863 | ); |
| 1864 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 1865 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_EDP_S_FID, |
| 1866 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_EDP_S_FMASK, |
| 1867 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_EDP_S_POSITION, |
| 1868 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_EDP_S_FIELD_NAME |
| 1869 | ); |
| 1870 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 1871 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LRS_P_FID, |
| 1872 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LRS_P_FMASK, |
| 1873 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LRS_P_POSITION, |
| 1874 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LRS_P_FIELD_NAME |
| 1875 | ); |
| 1876 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 1877 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LPU_S_FID, |
| 1878 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LPU_S_FMASK, |
| 1879 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LPU_S_POSITION, |
| 1880 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LPU_S_FIELD_NAME |
| 1881 | ); |
| 1882 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 1883 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LRS_S_FID, |
| 1884 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LRS_S_FMASK, |
| 1885 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LRS_S_POSITION, |
| 1886 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LRS_S_FIELD_NAME |
| 1887 | ); |
| 1888 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 1889 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_EHP_P_FID, |
| 1890 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_EHP_P_FMASK, |
| 1891 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_EHP_P_POSITION, |
| 1892 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_EHP_P_FIELD_NAME |
| 1893 | ); |
| 1894 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 1895 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_EHP_S_FID, |
| 1896 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_EHP_S_FMASK, |
| 1897 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_EHP_S_POSITION, |
| 1898 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_EHP_S_FIELD_NAME |
| 1899 | ); |
| 1900 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 1901 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_CTO_P_FID, |
| 1902 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_CTO_P_FMASK, |
| 1903 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_CTO_P_POSITION, |
| 1904 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_CTO_P_FIELD_NAME |
| 1905 | ); |
| 1906 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 1907 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_EIP_P_FID, |
| 1908 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_EIP_P_FMASK, |
| 1909 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_EIP_P_POSITION, |
| 1910 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_EIP_P_FIELD_NAME |
| 1911 | ); |
| 1912 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 1913 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_ERO_P_FID, |
| 1914 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_ERO_P_FMASK, |
| 1915 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_ERO_P_POSITION, |
| 1916 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_ERO_P_FIELD_NAME |
| 1917 | ); |
| 1918 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 1919 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_CTO_S_FID, |
| 1920 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_CTO_S_FMASK, |
| 1921 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_CTO_S_POSITION, |
| 1922 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_CTO_S_FIELD_NAME |
| 1923 | ); |
| 1924 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 1925 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_EIP_S_FID, |
| 1926 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_EIP_S_FMASK, |
| 1927 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_EIP_S_POSITION, |
| 1928 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_EIP_S_FIELD_NAME |
| 1929 | ); |
| 1930 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 1931 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_WUC_P_FID, |
| 1932 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_WUC_P_FMASK, |
| 1933 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_WUC_P_POSITION, |
| 1934 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_WUC_P_FIELD_NAME |
| 1935 | ); |
| 1936 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 1937 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_CRS_P_FID, |
| 1938 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_CRS_P_FMASK, |
| 1939 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_CRS_P_POSITION, |
| 1940 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_CRS_P_FIELD_NAME |
| 1941 | ); |
| 1942 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 1943 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_ERO_S_FID, |
| 1944 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_ERO_S_FMASK, |
| 1945 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_ERO_S_POSITION, |
| 1946 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_ERO_S_FIELD_NAME |
| 1947 | ); |
| 1948 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 1949 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_MRC_P_FID, |
| 1950 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_MRC_P_FMASK, |
| 1951 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_MRC_P_POSITION, |
| 1952 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_MRC_P_FIELD_NAME |
| 1953 | ); |
| 1954 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 1955 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_CRS_S_FID, |
| 1956 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_CRS_S_FMASK, |
| 1957 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_CRS_S_POSITION, |
| 1958 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_CRS_S_FIELD_NAME |
| 1959 | ); |
| 1960 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 1961 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_WUC_S_FID, |
| 1962 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_WUC_S_FMASK, |
| 1963 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_WUC_S_POSITION, |
| 1964 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_WUC_S_FIELD_NAME |
| 1965 | ); |
| 1966 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 1967 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_MRC_S_FID, |
| 1968 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_MRC_S_FMASK, |
| 1969 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_MRC_S_POSITION, |
| 1970 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_MRC_S_FIELD_NAME |
| 1971 | ); |
| 1972 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 1973 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LDN_P_FID, |
| 1974 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LDN_P_FMASK, |
| 1975 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LDN_P_POSITION, |
| 1976 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LDN_P_FIELD_NAME |
| 1977 | ); |
| 1978 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 1979 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LDN_S_FID, |
| 1980 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LDN_S_FMASK, |
| 1981 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LDN_S_POSITION, |
| 1982 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LDN_S_FIELD_NAME |
| 1983 | ); |
| 1984 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 1985 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_EMP_P_FID, |
| 1986 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_EMP_P_FMASK, |
| 1987 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_EMP_P_POSITION, |
| 1988 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_EMP_P_FIELD_NAME |
| 1989 | ); |
| 1990 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 1991 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_ERU_P_FID, |
| 1992 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_ERU_P_FMASK, |
| 1993 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_ERU_P_POSITION, |
| 1994 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_ERU_P_FIELD_NAME |
| 1995 | ); |
| 1996 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 1997 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_EMP_S_FID, |
| 1998 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_EMP_S_FMASK, |
| 1999 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_EMP_S_POSITION, |
| 2000 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_EMP_S_FIELD_NAME |
| 2001 | ); |
| 2002 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 2003 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LUP_P_FID, |
| 2004 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LUP_P_FMASK, |
| 2005 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LUP_P_POSITION, |
| 2006 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LUP_P_FIELD_NAME |
| 2007 | ); |
| 2008 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 2009 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LWC_P_FID, |
| 2010 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LWC_P_FMASK, |
| 2011 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LWC_P_POSITION, |
| 2012 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LWC_P_FIELD_NAME |
| 2013 | ); |
| 2014 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 2015 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_IIP_P_FID, |
| 2016 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_IIP_P_FMASK, |
| 2017 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_IIP_P_POSITION, |
| 2018 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_IIP_P_FIELD_NAME |
| 2019 | ); |
| 2020 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 2021 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_MFC_P_FID, |
| 2022 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_MFC_P_FMASK, |
| 2023 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_MFC_P_POSITION, |
| 2024 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_MFC_P_FIELD_NAME |
| 2025 | ); |
| 2026 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 2027 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_ERU_S_FID, |
| 2028 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_ERU_S_FMASK, |
| 2029 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_ERU_S_POSITION, |
| 2030 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_ERU_S_FIELD_NAME |
| 2031 | ); |
| 2032 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 2033 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LUP_S_FID, |
| 2034 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LUP_S_FMASK, |
| 2035 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LUP_S_POSITION, |
| 2036 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LUP_S_FIELD_NAME |
| 2037 | ); |
| 2038 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 2039 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_IIP_S_FID, |
| 2040 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_IIP_S_FMASK, |
| 2041 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_IIP_S_POSITION, |
| 2042 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_IIP_S_FIELD_NAME |
| 2043 | ); |
| 2044 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 2045 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LWC_S_FID, |
| 2046 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LWC_S_FMASK, |
| 2047 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LWC_S_POSITION, |
| 2048 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_LWC_S_FIELD_NAME |
| 2049 | ); |
| 2050 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.init_field_info ( |
| 2051 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_MFC_S_FID, |
| 2052 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_MFC_S_FMASK, |
| 2053 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_MFC_S_POSITION, |
| 2054 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1S_ALIAS_MFC_S_FIELD_NAME |
| 2055 | ); |
| 2056 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF2_NAME); |
| 2057 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 2058 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 2059 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 2060 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 2061 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 2062 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 2063 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 2064 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 2065 | access_name[CSRT_OMNI] = "OMNI"; |
| 2066 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 2067 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 2068 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 2069 | access_name[FIRE_JTAG] = "JTAG"; |
| 2070 | |
| 2071 | fire_plc_tlu_ctb_tlr_csr_a_tlu_prf2 = new( |
| 2072 | fire_plc_tlu_ctb_tlr_csr_a_tlu_prf2_state, |
| 2073 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF2_HW_ADDR, |
| 2074 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF2_POR_VALUE, |
| 2075 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF2_RMASK, |
| 2076 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF2_READ_ONLY_MASK, |
| 2077 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF2_WRITE_MASK, |
| 2078 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF2_CLEAR_MASK, |
| 2079 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF2_SET_MASK, |
| 2080 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF2_TOGGLE_MASK, |
| 2081 | input_name, |
| 2082 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF2_NUM_FIELDS, |
| 2083 | input_access_methods, |
| 2084 | access_level, |
| 2085 | access_name, |
| 2086 | CSRT_OMNI |
| 2087 | ); |
| 2088 | fire_plc_tlu_ctb_tlr_csr_a_tlu_prf2.init_field_info ( |
| 2089 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF2_CNT_FID, |
| 2090 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF2_CNT_FMASK, |
| 2091 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF2_CNT_POSITION, |
| 2092 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRF2_CNT_FIELD_NAME |
| 2093 | ); |
| 2094 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_STS_NAME); |
| 2095 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 2096 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 2097 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 2098 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 2099 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 2100 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 2101 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 2102 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 2103 | access_name[CSRT_OMNI] = "OMNI"; |
| 2104 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 2105 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 2106 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 2107 | access_name[FIRE_JTAG] = "JTAG"; |
| 2108 | |
| 2109 | fire_plc_tlu_ctb_tlr_csr_a_tlu_sts = new( |
| 2110 | fire_plc_tlu_ctb_tlr_csr_a_tlu_sts_state, |
| 2111 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_STS_HW_ADDR, |
| 2112 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_STS_POR_VALUE, |
| 2113 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_STS_RMASK, |
| 2114 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_STS_READ_ONLY_MASK, |
| 2115 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_STS_WRITE_MASK, |
| 2116 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_STS_CLEAR_MASK, |
| 2117 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_STS_SET_MASK, |
| 2118 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_STS_TOGGLE_MASK, |
| 2119 | input_name, |
| 2120 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_STS_NUM_FIELDS, |
| 2121 | input_access_methods, |
| 2122 | access_level, |
| 2123 | access_name, |
| 2124 | CSRT_OMNI |
| 2125 | ); |
| 2126 | fire_plc_tlu_ctb_tlr_csr_a_tlu_sts.init_field_info ( |
| 2127 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_STS_STATUS_FID, |
| 2128 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_STS_STATUS_FMASK, |
| 2129 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_STS_STATUS_POSITION, |
| 2130 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_STS_STATUS_FIELD_NAME |
| 2131 | ); |
| 2132 | fire_plc_tlu_ctb_tlr_csr_a_tlu_sts.init_field_info ( |
| 2133 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_STS_DRAIN_FID, |
| 2134 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_STS_DRAIN_FMASK, |
| 2135 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_STS_DRAIN_POSITION, |
| 2136 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_STS_DRAIN_FIELD_NAME |
| 2137 | ); |
| 2138 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_INT_EN_NAME); |
| 2139 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 2140 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 2141 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 2142 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 2143 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 2144 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 2145 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 2146 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 2147 | access_name[CSRT_OMNI] = "OMNI"; |
| 2148 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 2149 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 2150 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 2151 | access_name[FIRE_JTAG] = "JTAG"; |
| 2152 | |
| 2153 | fire_plc_tlu_ctb_tlr_csr_a_ce_int_en = new( |
| 2154 | fire_plc_tlu_ctb_tlr_csr_a_ce_int_en_state, |
| 2155 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_INT_EN_HW_ADDR, |
| 2156 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_INT_EN_POR_VALUE, |
| 2157 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_INT_EN_RMASK, |
| 2158 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_INT_EN_READ_ONLY_MASK, |
| 2159 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_INT_EN_WRITE_MASK, |
| 2160 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_INT_EN_CLEAR_MASK, |
| 2161 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_INT_EN_SET_MASK, |
| 2162 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_INT_EN_TOGGLE_MASK, |
| 2163 | input_name, |
| 2164 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_INT_EN_NUM_FIELDS, |
| 2165 | input_access_methods, |
| 2166 | access_level, |
| 2167 | access_name, |
| 2168 | CSRT_OMNI |
| 2169 | ); |
| 2170 | fire_plc_tlu_ctb_tlr_csr_a_ce_int_en.init_field_info ( |
| 2171 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_INT_EN_EN_S_FID, |
| 2172 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_INT_EN_EN_S_FMASK, |
| 2173 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_INT_EN_EN_S_POSITION, |
| 2174 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_INT_EN_EN_S_FIELD_NAME |
| 2175 | ); |
| 2176 | fire_plc_tlu_ctb_tlr_csr_a_ce_int_en.init_field_info ( |
| 2177 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_INT_EN_EN_P_FID, |
| 2178 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_INT_EN_EN_P_FMASK, |
| 2179 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_INT_EN_EN_P_POSITION, |
| 2180 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_INT_EN_EN_P_FIELD_NAME |
| 2181 | ); |
| 2182 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_EN_ERR_NAME); |
| 2183 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 2184 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 2185 | access_level[CSRT_OMNI] = CSRT_READ_ACCESS; |
| 2186 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 2187 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 2188 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 2189 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 2190 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 2191 | access_name[CSRT_OMNI] = "OMNI"; |
| 2192 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 2193 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 2194 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 2195 | access_name[FIRE_JTAG] = "JTAG"; |
| 2196 | |
| 2197 | fire_plc_tlu_ctb_tlr_csr_a_ce_en_err = new( |
| 2198 | fire_plc_tlu_ctb_tlr_csr_a_ce_en_err_state, |
| 2199 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_EN_ERR_HW_ADDR, |
| 2200 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_EN_ERR_POR_VALUE, |
| 2201 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_EN_ERR_RMASK, |
| 2202 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_EN_ERR_READ_ONLY_MASK, |
| 2203 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_EN_ERR_WRITE_MASK, |
| 2204 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_EN_ERR_CLEAR_MASK, |
| 2205 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_EN_ERR_SET_MASK, |
| 2206 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_EN_ERR_TOGGLE_MASK, |
| 2207 | input_name, |
| 2208 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_EN_ERR_NUM_FIELDS, |
| 2209 | input_access_methods, |
| 2210 | access_level, |
| 2211 | access_name, |
| 2212 | CSRT_DAEMON |
| 2213 | ); |
| 2214 | fire_plc_tlu_ctb_tlr_csr_a_ce_en_err.init_field_info ( |
| 2215 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_EN_ERR_ERR_P_FID, |
| 2216 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_EN_ERR_ERR_P_FMASK, |
| 2217 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_EN_ERR_ERR_P_POSITION, |
| 2218 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_EN_ERR_ERR_P_FIELD_NAME |
| 2219 | ); |
| 2220 | fire_plc_tlu_ctb_tlr_csr_a_ce_en_err.init_field_info ( |
| 2221 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_EN_ERR_ERR_S_FID, |
| 2222 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_EN_ERR_ERR_S_FMASK, |
| 2223 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_EN_ERR_ERR_S_POSITION, |
| 2224 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_EN_ERR_ERR_S_FIELD_NAME |
| 2225 | ); |
| 2226 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_TUE_HDR1_NAME); |
| 2227 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 2228 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 2229 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 2230 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 2231 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 2232 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 2233 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 2234 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 2235 | access_name[CSRT_OMNI] = "OMNI"; |
| 2236 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 2237 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 2238 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 2239 | access_name[FIRE_JTAG] = "JTAG"; |
| 2240 | |
| 2241 | fire_plc_tlu_ctb_tlr_csr_a_tue_hdr1 = new( |
| 2242 | fire_plc_tlu_ctb_tlr_csr_a_tue_hdr1_state, |
| 2243 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TUE_HDR1_HW_ADDR, |
| 2244 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TUE_HDR1_POR_VALUE, |
| 2245 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TUE_HDR1_RMASK, |
| 2246 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TUE_HDR1_READ_ONLY_MASK, |
| 2247 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TUE_HDR1_WRITE_MASK, |
| 2248 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TUE_HDR1_CLEAR_MASK, |
| 2249 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TUE_HDR1_SET_MASK, |
| 2250 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TUE_HDR1_TOGGLE_MASK, |
| 2251 | input_name, |
| 2252 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TUE_HDR1_NUM_FIELDS, |
| 2253 | input_access_methods, |
| 2254 | access_level, |
| 2255 | access_name, |
| 2256 | CSRT_OMNI |
| 2257 | ); |
| 2258 | fire_plc_tlu_ctb_tlr_csr_a_tue_hdr1.init_field_info ( |
| 2259 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TUE_HDR1_HDR_FID, |
| 2260 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TUE_HDR1_HDR_FMASK, |
| 2261 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TUE_HDR1_HDR_POSITION, |
| 2262 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TUE_HDR1_HDR_FIELD_NAME |
| 2263 | ); |
| 2264 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_TUE_HDR2_NAME); |
| 2265 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 2266 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 2267 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 2268 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 2269 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 2270 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 2271 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 2272 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 2273 | access_name[CSRT_OMNI] = "OMNI"; |
| 2274 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 2275 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 2276 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 2277 | access_name[FIRE_JTAG] = "JTAG"; |
| 2278 | |
| 2279 | fire_plc_tlu_ctb_tlr_csr_a_tue_hdr2 = new( |
| 2280 | fire_plc_tlu_ctb_tlr_csr_a_tue_hdr2_state, |
| 2281 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TUE_HDR2_HW_ADDR, |
| 2282 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TUE_HDR2_POR_VALUE, |
| 2283 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TUE_HDR2_RMASK, |
| 2284 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TUE_HDR2_READ_ONLY_MASK, |
| 2285 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TUE_HDR2_WRITE_MASK, |
| 2286 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TUE_HDR2_CLEAR_MASK, |
| 2287 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TUE_HDR2_SET_MASK, |
| 2288 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TUE_HDR2_TOGGLE_MASK, |
| 2289 | input_name, |
| 2290 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TUE_HDR2_NUM_FIELDS, |
| 2291 | input_access_methods, |
| 2292 | access_level, |
| 2293 | access_name, |
| 2294 | CSRT_OMNI |
| 2295 | ); |
| 2296 | fire_plc_tlu_ctb_tlr_csr_a_tue_hdr2.init_field_info ( |
| 2297 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TUE_HDR2_HDR_FID, |
| 2298 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TUE_HDR2_HDR_FMASK, |
| 2299 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TUE_HDR2_HDR_POSITION, |
| 2300 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TUE_HDR2_HDR_FIELD_NAME |
| 2301 | ); |
| 2302 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_STS_NAME); |
| 2303 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 2304 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 2305 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 2306 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 2307 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 2308 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 2309 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 2310 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 2311 | access_name[CSRT_OMNI] = "OMNI"; |
| 2312 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 2313 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 2314 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 2315 | access_name[FIRE_JTAG] = "JTAG"; |
| 2316 | |
| 2317 | fire_plc_tlu_ctb_tlr_csr_a_dev_sts = new( |
| 2318 | fire_plc_tlu_ctb_tlr_csr_a_dev_sts_state, |
| 2319 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_STS_HW_ADDR, |
| 2320 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_STS_POR_VALUE, |
| 2321 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_STS_RMASK, |
| 2322 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_STS_READ_ONLY_MASK, |
| 2323 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_STS_WRITE_MASK, |
| 2324 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_STS_CLEAR_MASK, |
| 2325 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_STS_SET_MASK, |
| 2326 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_STS_TOGGLE_MASK, |
| 2327 | input_name, |
| 2328 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_STS_NUM_FIELDS, |
| 2329 | input_access_methods, |
| 2330 | access_level, |
| 2331 | access_name, |
| 2332 | CSRT_OMNI |
| 2333 | ); |
| 2334 | fire_plc_tlu_ctb_tlr_csr_a_dev_sts.init_field_info ( |
| 2335 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_STS_TP_FID, |
| 2336 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_STS_TP_FMASK, |
| 2337 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_STS_TP_POSITION, |
| 2338 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_STS_TP_FIELD_NAME |
| 2339 | ); |
| 2340 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_TRN_OFF_NAME); |
| 2341 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 2342 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 2343 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 2344 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 2345 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 2346 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 2347 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 2348 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 2349 | access_name[CSRT_OMNI] = "OMNI"; |
| 2350 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 2351 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 2352 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 2353 | access_name[FIRE_JTAG] = "JTAG"; |
| 2354 | |
| 2355 | fire_plc_tlu_ctb_tlr_csr_a_trn_off = new( |
| 2356 | fire_plc_tlu_ctb_tlr_csr_a_trn_off_state, |
| 2357 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TRN_OFF_HW_ADDR, |
| 2358 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TRN_OFF_POR_VALUE, |
| 2359 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TRN_OFF_RMASK, |
| 2360 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TRN_OFF_READ_ONLY_MASK, |
| 2361 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TRN_OFF_WRITE_MASK, |
| 2362 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TRN_OFF_CLEAR_MASK, |
| 2363 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TRN_OFF_SET_MASK, |
| 2364 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TRN_OFF_TOGGLE_MASK, |
| 2365 | input_name, |
| 2366 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TRN_OFF_NUM_FIELDS, |
| 2367 | input_access_methods, |
| 2368 | access_level, |
| 2369 | access_name, |
| 2370 | CSRT_OMNI |
| 2371 | ); |
| 2372 | fire_plc_tlu_ctb_tlr_csr_a_trn_off.init_field_info ( |
| 2373 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TRN_OFF_PTO_FID, |
| 2374 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TRN_OFF_PTO_FMASK, |
| 2375 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TRN_OFF_PTO_POSITION, |
| 2376 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TRN_OFF_PTO_FIELD_NAME |
| 2377 | ); |
| 2378 | sprintf(base_csr_name,"%s", FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_NAME); |
| 2379 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 2380 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 2381 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 2382 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 2383 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 2384 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 2385 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 2386 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 2387 | access_name[CSRT_OMNI] = "OMNI"; |
| 2388 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 2389 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 2390 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 2391 | access_name[FIRE_JTAG] = "JTAG"; |
| 2392 | |
| 2393 | fire_dlc_ilu_cib_csr_a_ilu_diagnos = new( |
| 2394 | fire_dlc_ilu_cib_csr_a_ilu_diagnos_state, |
| 2395 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_HW_ADDR, |
| 2396 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_POR_VALUE, |
| 2397 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_RMASK, |
| 2398 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_READ_ONLY_MASK, |
| 2399 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_WRITE_MASK, |
| 2400 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_CLEAR_MASK, |
| 2401 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_SET_MASK, |
| 2402 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_TOGGLE_MASK, |
| 2403 | input_name, |
| 2404 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_NUM_FIELDS, |
| 2405 | input_access_methods, |
| 2406 | access_level, |
| 2407 | access_name, |
| 2408 | CSRT_OMNI |
| 2409 | ); |
| 2410 | fire_dlc_ilu_cib_csr_a_ilu_diagnos.init_field_info ( |
| 2411 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_EHI_TRIG_FID, |
| 2412 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_EHI_TRIG_FMASK, |
| 2413 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_EHI_TRIG_POSITION, |
| 2414 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_EHI_TRIG_FIELD_NAME |
| 2415 | ); |
| 2416 | fire_dlc_ilu_cib_csr_a_ilu_diagnos.init_field_info ( |
| 2417 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_EDI_TRIG_FID, |
| 2418 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_EDI_TRIG_FMASK, |
| 2419 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_EDI_TRIG_POSITION, |
| 2420 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_EDI_TRIG_FIELD_NAME |
| 2421 | ); |
| 2422 | fire_dlc_ilu_cib_csr_a_ilu_diagnos.init_field_info ( |
| 2423 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_EHI_PAR_FID, |
| 2424 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_EHI_PAR_FMASK, |
| 2425 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_EHI_PAR_POSITION, |
| 2426 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_EHI_PAR_FIELD_NAME |
| 2427 | ); |
| 2428 | fire_dlc_ilu_cib_csr_a_ilu_diagnos.init_field_info ( |
| 2429 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENRX0_FID, |
| 2430 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENRX0_FMASK, |
| 2431 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENRX0_POSITION, |
| 2432 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENRX0_FIELD_NAME |
| 2433 | ); |
| 2434 | fire_dlc_ilu_cib_csr_a_ilu_diagnos.init_field_info ( |
| 2435 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENRX1_FID, |
| 2436 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENRX1_FMASK, |
| 2437 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENRX1_POSITION, |
| 2438 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENRX1_FIELD_NAME |
| 2439 | ); |
| 2440 | fire_dlc_ilu_cib_csr_a_ilu_diagnos.init_field_info ( |
| 2441 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENRX2_FID, |
| 2442 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENRX2_FMASK, |
| 2443 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENRX2_POSITION, |
| 2444 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENRX2_FIELD_NAME |
| 2445 | ); |
| 2446 | fire_dlc_ilu_cib_csr_a_ilu_diagnos.init_field_info ( |
| 2447 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENRX3_FID, |
| 2448 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENRX3_FMASK, |
| 2449 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENRX3_POSITION, |
| 2450 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENRX3_FIELD_NAME |
| 2451 | ); |
| 2452 | fire_dlc_ilu_cib_csr_a_ilu_diagnos.init_field_info ( |
| 2453 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENRX4_FID, |
| 2454 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENRX4_FMASK, |
| 2455 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENRX4_POSITION, |
| 2456 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENRX4_FIELD_NAME |
| 2457 | ); |
| 2458 | fire_dlc_ilu_cib_csr_a_ilu_diagnos.init_field_info ( |
| 2459 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENRX5_FID, |
| 2460 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENRX5_FMASK, |
| 2461 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENRX5_POSITION, |
| 2462 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENRX5_FIELD_NAME |
| 2463 | ); |
| 2464 | fire_dlc_ilu_cib_csr_a_ilu_diagnos.init_field_info ( |
| 2465 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_EDI_PAR_FID, |
| 2466 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_EDI_PAR_FMASK, |
| 2467 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_EDI_PAR_POSITION, |
| 2468 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_EDI_PAR_FIELD_NAME |
| 2469 | ); |
| 2470 | fire_dlc_ilu_cib_csr_a_ilu_diagnos.init_field_info ( |
| 2471 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENTX0_FID, |
| 2472 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENTX0_FMASK, |
| 2473 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENTX0_POSITION, |
| 2474 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENTX0_FIELD_NAME |
| 2475 | ); |
| 2476 | fire_dlc_ilu_cib_csr_a_ilu_diagnos.init_field_info ( |
| 2477 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENRX6_FID, |
| 2478 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENRX6_FMASK, |
| 2479 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENRX6_POSITION, |
| 2480 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENRX6_FIELD_NAME |
| 2481 | ); |
| 2482 | fire_dlc_ilu_cib_csr_a_ilu_diagnos.init_field_info ( |
| 2483 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENTX1_FID, |
| 2484 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENTX1_FMASK, |
| 2485 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENTX1_POSITION, |
| 2486 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENTX1_FIELD_NAME |
| 2487 | ); |
| 2488 | fire_dlc_ilu_cib_csr_a_ilu_diagnos.init_field_info ( |
| 2489 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENRX7_FID, |
| 2490 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENRX7_FMASK, |
| 2491 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENRX7_POSITION, |
| 2492 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENRX7_FIELD_NAME |
| 2493 | ); |
| 2494 | fire_dlc_ilu_cib_csr_a_ilu_diagnos.init_field_info ( |
| 2495 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENTX2_FID, |
| 2496 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENTX2_FMASK, |
| 2497 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENTX2_POSITION, |
| 2498 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENTX2_FIELD_NAME |
| 2499 | ); |
| 2500 | fire_dlc_ilu_cib_csr_a_ilu_diagnos.init_field_info ( |
| 2501 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENTX3_FID, |
| 2502 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENTX3_FMASK, |
| 2503 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENTX3_POSITION, |
| 2504 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENTX3_FIELD_NAME |
| 2505 | ); |
| 2506 | fire_dlc_ilu_cib_csr_a_ilu_diagnos.init_field_info ( |
| 2507 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_RATE_SCALE_FID, |
| 2508 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_RATE_SCALE_FMASK, |
| 2509 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_RATE_SCALE_POSITION, |
| 2510 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_RATE_SCALE_FIELD_NAME |
| 2511 | ); |
| 2512 | fire_dlc_ilu_cib_csr_a_ilu_diagnos.init_field_info ( |
| 2513 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENTX4_FID, |
| 2514 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENTX4_FMASK, |
| 2515 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENTX4_POSITION, |
| 2516 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENTX4_FIELD_NAME |
| 2517 | ); |
| 2518 | fire_dlc_ilu_cib_csr_a_ilu_diagnos.init_field_info ( |
| 2519 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENTX5_FID, |
| 2520 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENTX5_FMASK, |
| 2521 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENTX5_POSITION, |
| 2522 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENTX5_FIELD_NAME |
| 2523 | ); |
| 2524 | fire_dlc_ilu_cib_csr_a_ilu_diagnos.init_field_info ( |
| 2525 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENPLL0_FID, |
| 2526 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENPLL0_FMASK, |
| 2527 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENPLL0_POSITION, |
| 2528 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENPLL0_FIELD_NAME |
| 2529 | ); |
| 2530 | fire_dlc_ilu_cib_csr_a_ilu_diagnos.init_field_info ( |
| 2531 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENTX6_FID, |
| 2532 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENTX6_FMASK, |
| 2533 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENTX6_POSITION, |
| 2534 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENTX6_FIELD_NAME |
| 2535 | ); |
| 2536 | fire_dlc_ilu_cib_csr_a_ilu_diagnos.init_field_info ( |
| 2537 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENPLL1_FID, |
| 2538 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENPLL1_FMASK, |
| 2539 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENPLL1_POSITION, |
| 2540 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENPLL1_FIELD_NAME |
| 2541 | ); |
| 2542 | fire_dlc_ilu_cib_csr_a_ilu_diagnos.init_field_info ( |
| 2543 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENTX7_FID, |
| 2544 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENTX7_FMASK, |
| 2545 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENTX7_POSITION, |
| 2546 | FIRE_DLC_ILU_CIB_CSR_A_ILU_DIAGNOS_ENTX7_FIELD_NAME |
| 2547 | ); |
| 2548 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_NAME); |
| 2549 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 2550 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 2551 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 2552 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 2553 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 2554 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 2555 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 2556 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 2557 | access_name[CSRT_OMNI] = "OMNI"; |
| 2558 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 2559 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 2560 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 2561 | access_name[FIRE_JTAG] = "JTAG"; |
| 2562 | |
| 2563 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias = new( |
| 2564 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias_state, |
| 2565 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_HW_ADDR, |
| 2566 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_POR_VALUE, |
| 2567 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_RMASK, |
| 2568 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_READ_ONLY_MASK, |
| 2569 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_WRITE_MASK, |
| 2570 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_CLEAR_MASK, |
| 2571 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_SET_MASK, |
| 2572 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_TOGGLE_MASK, |
| 2573 | input_name, |
| 2574 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_NUM_FIELDS, |
| 2575 | input_access_methods, |
| 2576 | access_level, |
| 2577 | access_name, |
| 2578 | CSRT_OMNI |
| 2579 | ); |
| 2580 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2581 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_SPARE_P_FID, |
| 2582 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_SPARE_P_FMASK, |
| 2583 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_SPARE_P_POSITION, |
| 2584 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_SPARE_P_FIELD_NAME |
| 2585 | ); |
| 2586 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2587 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_EPE_P_FID, |
| 2588 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_EPE_P_FMASK, |
| 2589 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_EPE_P_POSITION, |
| 2590 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_EPE_P_FIELD_NAME |
| 2591 | ); |
| 2592 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2593 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_SPARE_S_FID, |
| 2594 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_SPARE_S_FMASK, |
| 2595 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_SPARE_S_POSITION, |
| 2596 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_SPARE_S_FIELD_NAME |
| 2597 | ); |
| 2598 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2599 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LIN_P_FID, |
| 2600 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LIN_P_FMASK, |
| 2601 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LIN_P_POSITION, |
| 2602 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LIN_P_FIELD_NAME |
| 2603 | ); |
| 2604 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2605 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_EPE_S_FID, |
| 2606 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_EPE_S_FMASK, |
| 2607 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_EPE_S_POSITION, |
| 2608 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_EPE_S_FIELD_NAME |
| 2609 | ); |
| 2610 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2611 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LIN_S_FID, |
| 2612 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LIN_S_FMASK, |
| 2613 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LIN_S_POSITION, |
| 2614 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LIN_S_FIELD_NAME |
| 2615 | ); |
| 2616 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2617 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_NFP_P_FID, |
| 2618 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_NFP_P_FMASK, |
| 2619 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_NFP_P_POSITION, |
| 2620 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_NFP_P_FIELD_NAME |
| 2621 | ); |
| 2622 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2623 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_ERP_P_FID, |
| 2624 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_ERP_P_FMASK, |
| 2625 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_ERP_P_POSITION, |
| 2626 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_ERP_P_FIELD_NAME |
| 2627 | ); |
| 2628 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2629 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_NFP_S_FID, |
| 2630 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_NFP_S_FMASK, |
| 2631 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_NFP_S_POSITION, |
| 2632 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_NFP_S_FIELD_NAME |
| 2633 | ); |
| 2634 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2635 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_ERP_S_FID, |
| 2636 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_ERP_S_FMASK, |
| 2637 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_ERP_S_POSITION, |
| 2638 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_ERP_S_FIELD_NAME |
| 2639 | ); |
| 2640 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2641 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_RUC_P_FID, |
| 2642 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_RUC_P_FMASK, |
| 2643 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_RUC_P_POSITION, |
| 2644 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_RUC_P_FIELD_NAME |
| 2645 | ); |
| 2646 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2647 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_EDP_P_FID, |
| 2648 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_EDP_P_FMASK, |
| 2649 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_EDP_P_POSITION, |
| 2650 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_EDP_P_FIELD_NAME |
| 2651 | ); |
| 2652 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2653 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_RUC_S_FID, |
| 2654 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_RUC_S_FMASK, |
| 2655 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_RUC_S_POSITION, |
| 2656 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_RUC_S_FIELD_NAME |
| 2657 | ); |
| 2658 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2659 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LPU_P_FID, |
| 2660 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LPU_P_FMASK, |
| 2661 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LPU_P_POSITION, |
| 2662 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LPU_P_FIELD_NAME |
| 2663 | ); |
| 2664 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2665 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_EDP_S_FID, |
| 2666 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_EDP_S_FMASK, |
| 2667 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_EDP_S_POSITION, |
| 2668 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_EDP_S_FIELD_NAME |
| 2669 | ); |
| 2670 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2671 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LRS_P_FID, |
| 2672 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LRS_P_FMASK, |
| 2673 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LRS_P_POSITION, |
| 2674 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LRS_P_FIELD_NAME |
| 2675 | ); |
| 2676 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2677 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LPU_S_FID, |
| 2678 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LPU_S_FMASK, |
| 2679 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LPU_S_POSITION, |
| 2680 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LPU_S_FIELD_NAME |
| 2681 | ); |
| 2682 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2683 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LRS_S_FID, |
| 2684 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LRS_S_FMASK, |
| 2685 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LRS_S_POSITION, |
| 2686 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LRS_S_FIELD_NAME |
| 2687 | ); |
| 2688 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2689 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_EHP_P_FID, |
| 2690 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_EHP_P_FMASK, |
| 2691 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_EHP_P_POSITION, |
| 2692 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_EHP_P_FIELD_NAME |
| 2693 | ); |
| 2694 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2695 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_EHP_S_FID, |
| 2696 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_EHP_S_FMASK, |
| 2697 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_EHP_S_POSITION, |
| 2698 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_EHP_S_FIELD_NAME |
| 2699 | ); |
| 2700 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2701 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_CTO_P_FID, |
| 2702 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_CTO_P_FMASK, |
| 2703 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_CTO_P_POSITION, |
| 2704 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_CTO_P_FIELD_NAME |
| 2705 | ); |
| 2706 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2707 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_EIP_P_FID, |
| 2708 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_EIP_P_FMASK, |
| 2709 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_EIP_P_POSITION, |
| 2710 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_EIP_P_FIELD_NAME |
| 2711 | ); |
| 2712 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2713 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_ERO_P_FID, |
| 2714 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_ERO_P_FMASK, |
| 2715 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_ERO_P_POSITION, |
| 2716 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_ERO_P_FIELD_NAME |
| 2717 | ); |
| 2718 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2719 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_CTO_S_FID, |
| 2720 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_CTO_S_FMASK, |
| 2721 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_CTO_S_POSITION, |
| 2722 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_CTO_S_FIELD_NAME |
| 2723 | ); |
| 2724 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2725 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_EIP_S_FID, |
| 2726 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_EIP_S_FMASK, |
| 2727 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_EIP_S_POSITION, |
| 2728 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_EIP_S_FIELD_NAME |
| 2729 | ); |
| 2730 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2731 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_WUC_P_FID, |
| 2732 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_WUC_P_FMASK, |
| 2733 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_WUC_P_POSITION, |
| 2734 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_WUC_P_FIELD_NAME |
| 2735 | ); |
| 2736 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2737 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_CRS_P_FID, |
| 2738 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_CRS_P_FMASK, |
| 2739 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_CRS_P_POSITION, |
| 2740 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_CRS_P_FIELD_NAME |
| 2741 | ); |
| 2742 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2743 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_ERO_S_FID, |
| 2744 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_ERO_S_FMASK, |
| 2745 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_ERO_S_POSITION, |
| 2746 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_ERO_S_FIELD_NAME |
| 2747 | ); |
| 2748 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2749 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_MRC_P_FID, |
| 2750 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_MRC_P_FMASK, |
| 2751 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_MRC_P_POSITION, |
| 2752 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_MRC_P_FIELD_NAME |
| 2753 | ); |
| 2754 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2755 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_CRS_S_FID, |
| 2756 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_CRS_S_FMASK, |
| 2757 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_CRS_S_POSITION, |
| 2758 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_CRS_S_FIELD_NAME |
| 2759 | ); |
| 2760 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2761 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_WUC_S_FID, |
| 2762 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_WUC_S_FMASK, |
| 2763 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_WUC_S_POSITION, |
| 2764 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_WUC_S_FIELD_NAME |
| 2765 | ); |
| 2766 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2767 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_MRC_S_FID, |
| 2768 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_MRC_S_FMASK, |
| 2769 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_MRC_S_POSITION, |
| 2770 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_MRC_S_FIELD_NAME |
| 2771 | ); |
| 2772 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2773 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LDN_P_FID, |
| 2774 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LDN_P_FMASK, |
| 2775 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LDN_P_POSITION, |
| 2776 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LDN_P_FIELD_NAME |
| 2777 | ); |
| 2778 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2779 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LDN_S_FID, |
| 2780 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LDN_S_FMASK, |
| 2781 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LDN_S_POSITION, |
| 2782 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LDN_S_FIELD_NAME |
| 2783 | ); |
| 2784 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2785 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_EMP_P_FID, |
| 2786 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_EMP_P_FMASK, |
| 2787 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_EMP_P_POSITION, |
| 2788 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_EMP_P_FIELD_NAME |
| 2789 | ); |
| 2790 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2791 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_ERU_P_FID, |
| 2792 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_ERU_P_FMASK, |
| 2793 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_ERU_P_POSITION, |
| 2794 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_ERU_P_FIELD_NAME |
| 2795 | ); |
| 2796 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2797 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_EMP_S_FID, |
| 2798 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_EMP_S_FMASK, |
| 2799 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_EMP_S_POSITION, |
| 2800 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_EMP_S_FIELD_NAME |
| 2801 | ); |
| 2802 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2803 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LUP_P_FID, |
| 2804 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LUP_P_FMASK, |
| 2805 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LUP_P_POSITION, |
| 2806 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LUP_P_FIELD_NAME |
| 2807 | ); |
| 2808 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2809 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LWC_P_FID, |
| 2810 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LWC_P_FMASK, |
| 2811 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LWC_P_POSITION, |
| 2812 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LWC_P_FIELD_NAME |
| 2813 | ); |
| 2814 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2815 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_IIP_P_FID, |
| 2816 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_IIP_P_FMASK, |
| 2817 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_IIP_P_POSITION, |
| 2818 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_IIP_P_FIELD_NAME |
| 2819 | ); |
| 2820 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2821 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_MFC_P_FID, |
| 2822 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_MFC_P_FMASK, |
| 2823 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_MFC_P_POSITION, |
| 2824 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_MFC_P_FIELD_NAME |
| 2825 | ); |
| 2826 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2827 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_ERU_S_FID, |
| 2828 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_ERU_S_FMASK, |
| 2829 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_ERU_S_POSITION, |
| 2830 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_ERU_S_FIELD_NAME |
| 2831 | ); |
| 2832 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2833 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LUP_S_FID, |
| 2834 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LUP_S_FMASK, |
| 2835 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LUP_S_POSITION, |
| 2836 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LUP_S_FIELD_NAME |
| 2837 | ); |
| 2838 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2839 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_IIP_S_FID, |
| 2840 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_IIP_S_FMASK, |
| 2841 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_IIP_S_POSITION, |
| 2842 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_IIP_S_FIELD_NAME |
| 2843 | ); |
| 2844 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2845 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LWC_S_FID, |
| 2846 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LWC_S_FMASK, |
| 2847 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LWC_S_POSITION, |
| 2848 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_LWC_S_FIELD_NAME |
| 2849 | ); |
| 2850 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.init_field_info ( |
| 2851 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_MFC_S_FID, |
| 2852 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_MFC_S_FMASK, |
| 2853 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_MFC_S_POSITION, |
| 2854 | FIRE_PLC_TLU_CTB_TLR_CSR_A_OE_ERR_RW1C_ALIAS_MFC_S_FIELD_NAME |
| 2855 | ); |
| 2856 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_ROE_HDR1_NAME); |
| 2857 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 2858 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 2859 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 2860 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 2861 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 2862 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 2863 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 2864 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 2865 | access_name[CSRT_OMNI] = "OMNI"; |
| 2866 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 2867 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 2868 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 2869 | access_name[FIRE_JTAG] = "JTAG"; |
| 2870 | |
| 2871 | fire_plc_tlu_ctb_tlr_csr_a_roe_hdr1 = new( |
| 2872 | fire_plc_tlu_ctb_tlr_csr_a_roe_hdr1_state, |
| 2873 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ROE_HDR1_HW_ADDR, |
| 2874 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ROE_HDR1_POR_VALUE, |
| 2875 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ROE_HDR1_RMASK, |
| 2876 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ROE_HDR1_READ_ONLY_MASK, |
| 2877 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ROE_HDR1_WRITE_MASK, |
| 2878 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ROE_HDR1_CLEAR_MASK, |
| 2879 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ROE_HDR1_SET_MASK, |
| 2880 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ROE_HDR1_TOGGLE_MASK, |
| 2881 | input_name, |
| 2882 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ROE_HDR1_NUM_FIELDS, |
| 2883 | input_access_methods, |
| 2884 | access_level, |
| 2885 | access_name, |
| 2886 | CSRT_OMNI |
| 2887 | ); |
| 2888 | fire_plc_tlu_ctb_tlr_csr_a_roe_hdr1.init_field_info ( |
| 2889 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ROE_HDR1_HDR_FID, |
| 2890 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ROE_HDR1_HDR_FMASK, |
| 2891 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ROE_HDR1_HDR_POSITION, |
| 2892 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ROE_HDR1_HDR_FIELD_NAME |
| 2893 | ); |
| 2894 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_ROE_HDR2_NAME); |
| 2895 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 2896 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 2897 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 2898 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 2899 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 2900 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 2901 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 2902 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 2903 | access_name[CSRT_OMNI] = "OMNI"; |
| 2904 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 2905 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 2906 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 2907 | access_name[FIRE_JTAG] = "JTAG"; |
| 2908 | |
| 2909 | fire_plc_tlu_ctb_tlr_csr_a_roe_hdr2 = new( |
| 2910 | fire_plc_tlu_ctb_tlr_csr_a_roe_hdr2_state, |
| 2911 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ROE_HDR2_HW_ADDR, |
| 2912 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ROE_HDR2_POR_VALUE, |
| 2913 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ROE_HDR2_RMASK, |
| 2914 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ROE_HDR2_READ_ONLY_MASK, |
| 2915 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ROE_HDR2_WRITE_MASK, |
| 2916 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ROE_HDR2_CLEAR_MASK, |
| 2917 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ROE_HDR2_SET_MASK, |
| 2918 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ROE_HDR2_TOGGLE_MASK, |
| 2919 | input_name, |
| 2920 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ROE_HDR2_NUM_FIELDS, |
| 2921 | input_access_methods, |
| 2922 | access_level, |
| 2923 | access_name, |
| 2924 | CSRT_OMNI |
| 2925 | ); |
| 2926 | fire_plc_tlu_ctb_tlr_csr_a_roe_hdr2.init_field_info ( |
| 2927 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ROE_HDR2_HDR_FID, |
| 2928 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ROE_HDR2_HDR_FMASK, |
| 2929 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ROE_HDR2_HDR_POSITION, |
| 2930 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ROE_HDR2_HDR_FIELD_NAME |
| 2931 | ); |
| 2932 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRFC_NAME); |
| 2933 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 2934 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 2935 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 2936 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 2937 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 2938 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 2939 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 2940 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 2941 | access_name[CSRT_OMNI] = "OMNI"; |
| 2942 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 2943 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 2944 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 2945 | access_name[FIRE_JTAG] = "JTAG"; |
| 2946 | |
| 2947 | fire_plc_tlu_ctb_tlr_csr_a_tlu_prfc = new( |
| 2948 | fire_plc_tlu_ctb_tlr_csr_a_tlu_prfc_state, |
| 2949 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRFC_HW_ADDR, |
| 2950 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRFC_POR_VALUE, |
| 2951 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRFC_RMASK, |
| 2952 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRFC_READ_ONLY_MASK, |
| 2953 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRFC_WRITE_MASK, |
| 2954 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRFC_CLEAR_MASK, |
| 2955 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRFC_SET_MASK, |
| 2956 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRFC_TOGGLE_MASK, |
| 2957 | input_name, |
| 2958 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRFC_NUM_FIELDS, |
| 2959 | input_access_methods, |
| 2960 | access_level, |
| 2961 | access_name, |
| 2962 | CSRT_OMNI |
| 2963 | ); |
| 2964 | fire_plc_tlu_ctb_tlr_csr_a_tlu_prfc.init_field_info ( |
| 2965 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRFC_SEL0_FID, |
| 2966 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRFC_SEL0_FMASK, |
| 2967 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRFC_SEL0_POSITION, |
| 2968 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRFC_SEL0_FIELD_NAME |
| 2969 | ); |
| 2970 | fire_plc_tlu_ctb_tlr_csr_a_tlu_prfc.init_field_info ( |
| 2971 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRFC_SEL1_FID, |
| 2972 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRFC_SEL1_FMASK, |
| 2973 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRFC_SEL1_POSITION, |
| 2974 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRFC_SEL1_FIELD_NAME |
| 2975 | ); |
| 2976 | fire_plc_tlu_ctb_tlr_csr_a_tlu_prfc.init_field_info ( |
| 2977 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRFC_SEL2_FID, |
| 2978 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRFC_SEL2_FMASK, |
| 2979 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRFC_SEL2_POSITION, |
| 2980 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_PRFC_SEL2_FIELD_NAME |
| 2981 | ); |
| 2982 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_LOG_NAME); |
| 2983 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 2984 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 2985 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 2986 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 2987 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 2988 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 2989 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 2990 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 2991 | access_name[CSRT_OMNI] = "OMNI"; |
| 2992 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 2993 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 2994 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 2995 | access_name[FIRE_JTAG] = "JTAG"; |
| 2996 | |
| 2997 | fire_plc_tlu_ctb_tlr_csr_a_ce_log = new( |
| 2998 | fire_plc_tlu_ctb_tlr_csr_a_ce_log_state, |
| 2999 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_LOG_HW_ADDR, |
| 3000 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_LOG_POR_VALUE, |
| 3001 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_LOG_RMASK, |
| 3002 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_LOG_READ_ONLY_MASK, |
| 3003 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_LOG_WRITE_MASK, |
| 3004 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_LOG_CLEAR_MASK, |
| 3005 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_LOG_SET_MASK, |
| 3006 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_LOG_TOGGLE_MASK, |
| 3007 | input_name, |
| 3008 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_LOG_NUM_FIELDS, |
| 3009 | input_access_methods, |
| 3010 | access_level, |
| 3011 | access_name, |
| 3012 | CSRT_OMNI |
| 3013 | ); |
| 3014 | fire_plc_tlu_ctb_tlr_csr_a_ce_log.init_field_info ( |
| 3015 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_LOG_EN_FID, |
| 3016 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_LOG_EN_FMASK, |
| 3017 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_LOG_EN_POSITION, |
| 3018 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_LOG_EN_FIELD_NAME |
| 3019 | ); |
| 3020 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_STS_NAME); |
| 3021 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 3022 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 3023 | access_level[CSRT_OMNI] = CSRT_READ_ACCESS; |
| 3024 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 3025 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 3026 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 3027 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 3028 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 3029 | access_name[CSRT_OMNI] = "OMNI"; |
| 3030 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 3031 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 3032 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 3033 | access_name[FIRE_JTAG] = "JTAG"; |
| 3034 | |
| 3035 | fire_plc_tlu_ctb_tlr_csr_a_event_err_int_sts = new( |
| 3036 | fire_plc_tlu_ctb_tlr_csr_a_event_err_int_sts_state, |
| 3037 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_STS_HW_ADDR, |
| 3038 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_STS_POR_VALUE, |
| 3039 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_STS_RMASK, |
| 3040 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_STS_READ_ONLY_MASK, |
| 3041 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_STS_WRITE_MASK, |
| 3042 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_STS_CLEAR_MASK, |
| 3043 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_STS_SET_MASK, |
| 3044 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_STS_TOGGLE_MASK, |
| 3045 | input_name, |
| 3046 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_STS_NUM_FIELDS, |
| 3047 | input_access_methods, |
| 3048 | access_level, |
| 3049 | access_name, |
| 3050 | CSRT_DAEMON |
| 3051 | ); |
| 3052 | fire_plc_tlu_ctb_tlr_csr_a_event_err_int_sts.init_field_info ( |
| 3053 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_STS_EN_ERROR_FID, |
| 3054 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_STS_EN_ERROR_FMASK, |
| 3055 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_STS_EN_ERROR_POSITION, |
| 3056 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_STS_EN_ERROR_FIELD_NAME |
| 3057 | ); |
| 3058 | fire_plc_tlu_ctb_tlr_csr_a_event_err_int_sts.init_field_info ( |
| 3059 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_STS_EN_EVENT_FID, |
| 3060 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_STS_EN_EVENT_FMASK, |
| 3061 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_STS_EN_EVENT_POSITION, |
| 3062 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_INT_STS_EN_EVENT_FIELD_NAME |
| 3063 | ); |
| 3064 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_PEU_DLPL_SERDES_REV_NAME); |
| 3065 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 3066 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 3067 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 3068 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 3069 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 3070 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 3071 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 3072 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 3073 | access_name[CSRT_OMNI] = "OMNI"; |
| 3074 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 3075 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 3076 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 3077 | access_name[FIRE_JTAG] = "JTAG"; |
| 3078 | |
| 3079 | fire_plc_tlu_ctb_tlr_csr_a_peu_dlpl_serdes_rev = new( |
| 3080 | fire_plc_tlu_ctb_tlr_csr_a_peu_dlpl_serdes_rev_state, |
| 3081 | FIRE_PLC_TLU_CTB_TLR_CSR_A_PEU_DLPL_SERDES_REV_HW_ADDR, |
| 3082 | FIRE_PLC_TLU_CTB_TLR_CSR_A_PEU_DLPL_SERDES_REV_POR_VALUE, |
| 3083 | FIRE_PLC_TLU_CTB_TLR_CSR_A_PEU_DLPL_SERDES_REV_RMASK, |
| 3084 | FIRE_PLC_TLU_CTB_TLR_CSR_A_PEU_DLPL_SERDES_REV_READ_ONLY_MASK, |
| 3085 | FIRE_PLC_TLU_CTB_TLR_CSR_A_PEU_DLPL_SERDES_REV_WRITE_MASK, |
| 3086 | FIRE_PLC_TLU_CTB_TLR_CSR_A_PEU_DLPL_SERDES_REV_CLEAR_MASK, |
| 3087 | FIRE_PLC_TLU_CTB_TLR_CSR_A_PEU_DLPL_SERDES_REV_SET_MASK, |
| 3088 | FIRE_PLC_TLU_CTB_TLR_CSR_A_PEU_DLPL_SERDES_REV_TOGGLE_MASK, |
| 3089 | input_name, |
| 3090 | FIRE_PLC_TLU_CTB_TLR_CSR_A_PEU_DLPL_SERDES_REV_NUM_FIELDS, |
| 3091 | input_access_methods, |
| 3092 | access_level, |
| 3093 | access_name, |
| 3094 | CSRT_OMNI |
| 3095 | ); |
| 3096 | fire_plc_tlu_ctb_tlr_csr_a_peu_dlpl_serdes_rev.init_field_info ( |
| 3097 | FIRE_PLC_TLU_CTB_TLR_CSR_A_PEU_DLPL_SERDES_REV_DLPL_ID_FID, |
| 3098 | FIRE_PLC_TLU_CTB_TLR_CSR_A_PEU_DLPL_SERDES_REV_DLPL_ID_FMASK, |
| 3099 | FIRE_PLC_TLU_CTB_TLR_CSR_A_PEU_DLPL_SERDES_REV_DLPL_ID_POSITION, |
| 3100 | FIRE_PLC_TLU_CTB_TLR_CSR_A_PEU_DLPL_SERDES_REV_DLPL_ID_FIELD_NAME |
| 3101 | ); |
| 3102 | fire_plc_tlu_ctb_tlr_csr_a_peu_dlpl_serdes_rev.init_field_info ( |
| 3103 | FIRE_PLC_TLU_CTB_TLR_CSR_A_PEU_DLPL_SERDES_REV_SERDES_ID_FID, |
| 3104 | FIRE_PLC_TLU_CTB_TLR_CSR_A_PEU_DLPL_SERDES_REV_SERDES_ID_FMASK, |
| 3105 | FIRE_PLC_TLU_CTB_TLR_CSR_A_PEU_DLPL_SERDES_REV_SERDES_ID_POSITION, |
| 3106 | FIRE_PLC_TLU_CTB_TLR_CSR_A_PEU_DLPL_SERDES_REV_SERDES_ID_FIELD_NAME |
| 3107 | ); |
| 3108 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_TOE_HDR1_NAME); |
| 3109 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 3110 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 3111 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 3112 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 3113 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 3114 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 3115 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 3116 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 3117 | access_name[CSRT_OMNI] = "OMNI"; |
| 3118 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 3119 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 3120 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 3121 | access_name[FIRE_JTAG] = "JTAG"; |
| 3122 | |
| 3123 | fire_plc_tlu_ctb_tlr_csr_a_toe_hdr1 = new( |
| 3124 | fire_plc_tlu_ctb_tlr_csr_a_toe_hdr1_state, |
| 3125 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TOE_HDR1_HW_ADDR, |
| 3126 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TOE_HDR1_POR_VALUE, |
| 3127 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TOE_HDR1_RMASK, |
| 3128 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TOE_HDR1_READ_ONLY_MASK, |
| 3129 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TOE_HDR1_WRITE_MASK, |
| 3130 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TOE_HDR1_CLEAR_MASK, |
| 3131 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TOE_HDR1_SET_MASK, |
| 3132 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TOE_HDR1_TOGGLE_MASK, |
| 3133 | input_name, |
| 3134 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TOE_HDR1_NUM_FIELDS, |
| 3135 | input_access_methods, |
| 3136 | access_level, |
| 3137 | access_name, |
| 3138 | CSRT_OMNI |
| 3139 | ); |
| 3140 | fire_plc_tlu_ctb_tlr_csr_a_toe_hdr1.init_field_info ( |
| 3141 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TOE_HDR1_HDR_FID, |
| 3142 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TOE_HDR1_HDR_FMASK, |
| 3143 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TOE_HDR1_HDR_POSITION, |
| 3144 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TOE_HDR1_HDR_FIELD_NAME |
| 3145 | ); |
| 3146 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_TOE_HDR2_NAME); |
| 3147 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 3148 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 3149 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 3150 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 3151 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 3152 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 3153 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 3154 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 3155 | access_name[CSRT_OMNI] = "OMNI"; |
| 3156 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 3157 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 3158 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 3159 | access_name[FIRE_JTAG] = "JTAG"; |
| 3160 | |
| 3161 | fire_plc_tlu_ctb_tlr_csr_a_toe_hdr2 = new( |
| 3162 | fire_plc_tlu_ctb_tlr_csr_a_toe_hdr2_state, |
| 3163 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TOE_HDR2_HW_ADDR, |
| 3164 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TOE_HDR2_POR_VALUE, |
| 3165 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TOE_HDR2_RMASK, |
| 3166 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TOE_HDR2_READ_ONLY_MASK, |
| 3167 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TOE_HDR2_WRITE_MASK, |
| 3168 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TOE_HDR2_CLEAR_MASK, |
| 3169 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TOE_HDR2_SET_MASK, |
| 3170 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TOE_HDR2_TOGGLE_MASK, |
| 3171 | input_name, |
| 3172 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TOE_HDR2_NUM_FIELDS, |
| 3173 | input_access_methods, |
| 3174 | access_level, |
| 3175 | access_name, |
| 3176 | CSRT_OMNI |
| 3177 | ); |
| 3178 | fire_plc_tlu_ctb_tlr_csr_a_toe_hdr2.init_field_info ( |
| 3179 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TOE_HDR2_HDR_FID, |
| 3180 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TOE_HDR2_HDR_FMASK, |
| 3181 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TOE_HDR2_HDR_POSITION, |
| 3182 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TOE_HDR2_HDR_FIELD_NAME |
| 3183 | ); |
| 3184 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_ACKNAK_THRESH_NAME); |
| 3185 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 3186 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 3187 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 3188 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 3189 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 3190 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 3191 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 3192 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 3193 | access_name[CSRT_OMNI] = "OMNI"; |
| 3194 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 3195 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 3196 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 3197 | access_name[FIRE_JTAG] = "JTAG"; |
| 3198 | |
| 3199 | fire_plc_tlu_ctb_tlr_csr_a_acknak_thresh = new( |
| 3200 | fire_plc_tlu_ctb_tlr_csr_a_acknak_thresh_state, |
| 3201 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ACKNAK_THRESH_HW_ADDR, |
| 3202 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ACKNAK_THRESH_POR_VALUE, |
| 3203 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ACKNAK_THRESH_RMASK, |
| 3204 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ACKNAK_THRESH_READ_ONLY_MASK, |
| 3205 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ACKNAK_THRESH_WRITE_MASK, |
| 3206 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ACKNAK_THRESH_CLEAR_MASK, |
| 3207 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ACKNAK_THRESH_SET_MASK, |
| 3208 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ACKNAK_THRESH_TOGGLE_MASK, |
| 3209 | input_name, |
| 3210 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ACKNAK_THRESH_NUM_FIELDS, |
| 3211 | input_access_methods, |
| 3212 | access_level, |
| 3213 | access_name, |
| 3214 | CSRT_OMNI |
| 3215 | ); |
| 3216 | fire_plc_tlu_ctb_tlr_csr_a_acknak_thresh.init_field_info ( |
| 3217 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ACKNAK_THRESH_ACK_NAK_THR_FID, |
| 3218 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ACKNAK_THRESH_ACK_NAK_THR_FMASK, |
| 3219 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ACKNAK_THRESH_ACK_NAK_THR_POSITION, |
| 3220 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ACKNAK_THRESH_ACK_NAK_THR_FIELD_NAME |
| 3221 | ); |
| 3222 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_VEN_DLLP_MSG_NAME); |
| 3223 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 3224 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 3225 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 3226 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 3227 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 3228 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 3229 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 3230 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 3231 | access_name[CSRT_OMNI] = "OMNI"; |
| 3232 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 3233 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 3234 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 3235 | access_name[FIRE_JTAG] = "JTAG"; |
| 3236 | |
| 3237 | fire_plc_tlu_ctb_tlr_csr_a_ven_dllp_msg = new( |
| 3238 | fire_plc_tlu_ctb_tlr_csr_a_ven_dllp_msg_state, |
| 3239 | FIRE_PLC_TLU_CTB_TLR_CSR_A_VEN_DLLP_MSG_HW_ADDR, |
| 3240 | FIRE_PLC_TLU_CTB_TLR_CSR_A_VEN_DLLP_MSG_POR_VALUE, |
| 3241 | FIRE_PLC_TLU_CTB_TLR_CSR_A_VEN_DLLP_MSG_RMASK, |
| 3242 | FIRE_PLC_TLU_CTB_TLR_CSR_A_VEN_DLLP_MSG_READ_ONLY_MASK, |
| 3243 | FIRE_PLC_TLU_CTB_TLR_CSR_A_VEN_DLLP_MSG_WRITE_MASK, |
| 3244 | FIRE_PLC_TLU_CTB_TLR_CSR_A_VEN_DLLP_MSG_CLEAR_MASK, |
| 3245 | FIRE_PLC_TLU_CTB_TLR_CSR_A_VEN_DLLP_MSG_SET_MASK, |
| 3246 | FIRE_PLC_TLU_CTB_TLR_CSR_A_VEN_DLLP_MSG_TOGGLE_MASK, |
| 3247 | input_name, |
| 3248 | FIRE_PLC_TLU_CTB_TLR_CSR_A_VEN_DLLP_MSG_NUM_FIELDS, |
| 3249 | input_access_methods, |
| 3250 | access_level, |
| 3251 | access_name, |
| 3252 | CSRT_OMNI |
| 3253 | ); |
| 3254 | fire_plc_tlu_ctb_tlr_csr_a_ven_dllp_msg.init_field_info ( |
| 3255 | FIRE_PLC_TLU_CTB_TLR_CSR_A_VEN_DLLP_MSG_V_MESSAGE_FID, |
| 3256 | FIRE_PLC_TLU_CTB_TLR_CSR_A_VEN_DLLP_MSG_V_MESSAGE_FMASK, |
| 3257 | FIRE_PLC_TLU_CTB_TLR_CSR_A_VEN_DLLP_MSG_V_MESSAGE_POSITION, |
| 3258 | FIRE_PLC_TLU_CTB_TLR_CSR_A_VEN_DLLP_MSG_V_MESSAGE_FIELD_NAME |
| 3259 | ); |
| 3260 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_NAME); |
| 3261 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 3262 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 3263 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 3264 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 3265 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 3266 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 3267 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 3268 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 3269 | access_name[CSRT_OMNI] = "OMNI"; |
| 3270 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 3271 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 3272 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 3273 | access_name[FIRE_JTAG] = "JTAG"; |
| 3274 | |
| 3275 | fire_plc_tlu_ctb_tlr_csr_a_lane_skew = new( |
| 3276 | fire_plc_tlu_ctb_tlr_csr_a_lane_skew_state, |
| 3277 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_HW_ADDR, |
| 3278 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_POR_VALUE, |
| 3279 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_RMASK, |
| 3280 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_READ_ONLY_MASK, |
| 3281 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_WRITE_MASK, |
| 3282 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_CLEAR_MASK, |
| 3283 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_SET_MASK, |
| 3284 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_TOGGLE_MASK, |
| 3285 | input_name, |
| 3286 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_NUM_FIELDS, |
| 3287 | input_access_methods, |
| 3288 | access_level, |
| 3289 | access_name, |
| 3290 | CSRT_OMNI |
| 3291 | ); |
| 3292 | fire_plc_tlu_ctb_tlr_csr_a_lane_skew.init_field_info ( |
| 3293 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_LN_0_RCV_PRESENT_FID, |
| 3294 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_LN_0_RCV_PRESENT_FMASK, |
| 3295 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_LN_0_RCV_PRESENT_POSITION, |
| 3296 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_LN_0_RCV_PRESENT_FIELD_NAME |
| 3297 | ); |
| 3298 | fire_plc_tlu_ctb_tlr_csr_a_lane_skew.init_field_info ( |
| 3299 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_LN_5_RCV_PRESENT_FID, |
| 3300 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_LN_5_RCV_PRESENT_FMASK, |
| 3301 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_LN_5_RCV_PRESENT_POSITION, |
| 3302 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_LN_5_RCV_PRESENT_FIELD_NAME |
| 3303 | ); |
| 3304 | fire_plc_tlu_ctb_tlr_csr_a_lane_skew.init_field_info ( |
| 3305 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_LN_4_RCV_PRESENT_FID, |
| 3306 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_LN_4_RCV_PRESENT_FMASK, |
| 3307 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_LN_4_RCV_PRESENT_POSITION, |
| 3308 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_LN_4_RCV_PRESENT_FIELD_NAME |
| 3309 | ); |
| 3310 | fire_plc_tlu_ctb_tlr_csr_a_lane_skew.init_field_info ( |
| 3311 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_SPARE2_FID, |
| 3312 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_SPARE2_FMASK, |
| 3313 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_SPARE2_POSITION, |
| 3314 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_SPARE2_FIELD_NAME |
| 3315 | ); |
| 3316 | fire_plc_tlu_ctb_tlr_csr_a_lane_skew.init_field_info ( |
| 3317 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_FORCE_RCV_PRESENT_EN_FID, |
| 3318 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_FORCE_RCV_PRESENT_EN_FMASK, |
| 3319 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_FORCE_RCV_PRESENT_EN_POSITION, |
| 3320 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_FORCE_RCV_PRESENT_EN_FIELD_NAME |
| 3321 | ); |
| 3322 | fire_plc_tlu_ctb_tlr_csr_a_lane_skew.init_field_info ( |
| 3323 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_SPARE_FID, |
| 3324 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_SPARE_FMASK, |
| 3325 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_SPARE_POSITION, |
| 3326 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_SPARE_FIELD_NAME |
| 3327 | ); |
| 3328 | fire_plc_tlu_ctb_tlr_csr_a_lane_skew.init_field_info ( |
| 3329 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_DESKEW_DISABLE_FID, |
| 3330 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_DESKEW_DISABLE_FMASK, |
| 3331 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_DESKEW_DISABLE_POSITION, |
| 3332 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_DESKEW_DISABLE_FIELD_NAME |
| 3333 | ); |
| 3334 | fire_plc_tlu_ctb_tlr_csr_a_lane_skew.init_field_info ( |
| 3335 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_LN_3_RCV_PRESENT_FID, |
| 3336 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_LN_3_RCV_PRESENT_FMASK, |
| 3337 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_LN_3_RCV_PRESENT_POSITION, |
| 3338 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_LN_3_RCV_PRESENT_FIELD_NAME |
| 3339 | ); |
| 3340 | fire_plc_tlu_ctb_tlr_csr_a_lane_skew.init_field_info ( |
| 3341 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_LN_2_RCV_PRESENT_FID, |
| 3342 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_LN_2_RCV_PRESENT_FMASK, |
| 3343 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_LN_2_RCV_PRESENT_POSITION, |
| 3344 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_LN_2_RCV_PRESENT_FIELD_NAME |
| 3345 | ); |
| 3346 | fire_plc_tlu_ctb_tlr_csr_a_lane_skew.init_field_info ( |
| 3347 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_LN_7_RCV_PRESENT_FID, |
| 3348 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_LN_7_RCV_PRESENT_FMASK, |
| 3349 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_LN_7_RCV_PRESENT_POSITION, |
| 3350 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_LN_7_RCV_PRESENT_FIELD_NAME |
| 3351 | ); |
| 3352 | fire_plc_tlu_ctb_tlr_csr_a_lane_skew.init_field_info ( |
| 3353 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_LN_1_RCV_PRESENT_FID, |
| 3354 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_LN_1_RCV_PRESENT_FMASK, |
| 3355 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_LN_1_RCV_PRESENT_POSITION, |
| 3356 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_LN_1_RCV_PRESENT_FIELD_NAME |
| 3357 | ); |
| 3358 | fire_plc_tlu_ctb_tlr_csr_a_lane_skew.init_field_info ( |
| 3359 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_LN_6_RCV_PRESENT_FID, |
| 3360 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_LN_6_RCV_PRESENT_FMASK, |
| 3361 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_LN_6_RCV_PRESENT_POSITION, |
| 3362 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LANE_SKEW_LN_6_RCV_PRESENT_FIELD_NAME |
| 3363 | ); |
| 3364 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_INT_EN_NAME); |
| 3365 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 3366 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 3367 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 3368 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 3369 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 3370 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 3371 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 3372 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 3373 | access_name[CSRT_OMNI] = "OMNI"; |
| 3374 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 3375 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 3376 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 3377 | access_name[FIRE_JTAG] = "JTAG"; |
| 3378 | |
| 3379 | fire_plc_tlu_ctb_tlr_csr_a_ue_int_en = new( |
| 3380 | fire_plc_tlu_ctb_tlr_csr_a_ue_int_en_state, |
| 3381 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_INT_EN_HW_ADDR, |
| 3382 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_INT_EN_POR_VALUE, |
| 3383 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_INT_EN_RMASK, |
| 3384 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_INT_EN_READ_ONLY_MASK, |
| 3385 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_INT_EN_WRITE_MASK, |
| 3386 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_INT_EN_CLEAR_MASK, |
| 3387 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_INT_EN_SET_MASK, |
| 3388 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_INT_EN_TOGGLE_MASK, |
| 3389 | input_name, |
| 3390 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_INT_EN_NUM_FIELDS, |
| 3391 | input_access_methods, |
| 3392 | access_level, |
| 3393 | access_name, |
| 3394 | CSRT_OMNI |
| 3395 | ); |
| 3396 | fire_plc_tlu_ctb_tlr_csr_a_ue_int_en.init_field_info ( |
| 3397 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_INT_EN_EN_S_FID, |
| 3398 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_INT_EN_EN_S_FMASK, |
| 3399 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_INT_EN_EN_S_POSITION, |
| 3400 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_INT_EN_EN_S_FIELD_NAME |
| 3401 | ); |
| 3402 | fire_plc_tlu_ctb_tlr_csr_a_ue_int_en.init_field_info ( |
| 3403 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_INT_EN_EN_P_FID, |
| 3404 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_INT_EN_EN_P_FMASK, |
| 3405 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_INT_EN_EN_P_POSITION, |
| 3406 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_INT_EN_EN_P_FIELD_NAME |
| 3407 | ); |
| 3408 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_NAME); |
| 3409 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 3410 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 3411 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 3412 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 3413 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 3414 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 3415 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 3416 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 3417 | access_name[CSRT_OMNI] = "OMNI"; |
| 3418 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 3419 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 3420 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 3421 | access_name[FIRE_JTAG] = "JTAG"; |
| 3422 | |
| 3423 | fire_plc_tlu_ctb_tlr_csr_a_core_status = new( |
| 3424 | fire_plc_tlu_ctb_tlr_csr_a_core_status_state, |
| 3425 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_HW_ADDR, |
| 3426 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_POR_VALUE, |
| 3427 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_RMASK, |
| 3428 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_READ_ONLY_MASK, |
| 3429 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_WRITE_MASK, |
| 3430 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_CLEAR_MASK, |
| 3431 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_SET_MASK, |
| 3432 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_TOGGLE_MASK, |
| 3433 | input_name, |
| 3434 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_NUM_FIELDS, |
| 3435 | input_access_methods, |
| 3436 | access_level, |
| 3437 | access_name, |
| 3438 | CSRT_OMNI |
| 3439 | ); |
| 3440 | fire_plc_tlu_ctb_tlr_csr_a_core_status.init_field_info ( |
| 3441 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_SDS_READY_0_FID, |
| 3442 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_SDS_READY_0_FMASK, |
| 3443 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_SDS_READY_0_POSITION, |
| 3444 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_SDS_READY_0_FIELD_NAME |
| 3445 | ); |
| 3446 | fire_plc_tlu_ctb_tlr_csr_a_core_status.init_field_info ( |
| 3447 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_RV_LOS_STATE_FID, |
| 3448 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_RV_LOS_STATE_FMASK, |
| 3449 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_RV_LOS_STATE_POSITION, |
| 3450 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_RV_LOS_STATE_FIELD_NAME |
| 3451 | ); |
| 3452 | fire_plc_tlu_ctb_tlr_csr_a_core_status.init_field_info ( |
| 3453 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_SDS_READY_1_FID, |
| 3454 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_SDS_READY_1_FMASK, |
| 3455 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_SDS_READY_1_POSITION, |
| 3456 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_SDS_READY_1_FIELD_NAME |
| 3457 | ); |
| 3458 | fire_plc_tlu_ctb_tlr_csr_a_core_status.init_field_info ( |
| 3459 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_RCV_LINK_NUM_FID, |
| 3460 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_RCV_LINK_NUM_FMASK, |
| 3461 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_RCV_LINK_NUM_POSITION, |
| 3462 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_RCV_LINK_NUM_FIELD_NAME |
| 3463 | ); |
| 3464 | fire_plc_tlu_ctb_tlr_csr_a_core_status.init_field_info ( |
| 3465 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_PCS_ALIGN_STS_FID, |
| 3466 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_PCS_ALIGN_STS_FMASK, |
| 3467 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_PCS_ALIGN_STS_POSITION, |
| 3468 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_PCS_ALIGN_STS_FIELD_NAME |
| 3469 | ); |
| 3470 | fire_plc_tlu_ctb_tlr_csr_a_core_status.init_field_info ( |
| 3471 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_RCVR_DETECT_STS_FID, |
| 3472 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_RCVR_DETECT_STS_FMASK, |
| 3473 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_RCVR_DETECT_STS_POSITION, |
| 3474 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_RCVR_DETECT_STS_FIELD_NAME |
| 3475 | ); |
| 3476 | fire_plc_tlu_ctb_tlr_csr_a_core_status.init_field_info ( |
| 3477 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_PCS_LOCK_STS_FID, |
| 3478 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_PCS_LOCK_STS_FMASK, |
| 3479 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_PCS_LOCK_STS_POSITION, |
| 3480 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_PCS_LOCK_STS_FIELD_NAME |
| 3481 | ); |
| 3482 | fire_plc_tlu_ctb_tlr_csr_a_core_status.init_field_info ( |
| 3483 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_RBUF_NOT_EMPTY_FID, |
| 3484 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_RBUF_NOT_EMPTY_FMASK, |
| 3485 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_RBUF_NOT_EMPTY_POSITION, |
| 3486 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_RBUF_NOT_EMPTY_FIELD_NAME |
| 3487 | ); |
| 3488 | fire_plc_tlu_ctb_tlr_csr_a_core_status.init_field_info ( |
| 3489 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_RCV_POLARITY_REV_FID, |
| 3490 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_RCV_POLARITY_REV_FMASK, |
| 3491 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_RCV_POLARITY_REV_POSITION, |
| 3492 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_RCV_POLARITY_REV_FIELD_NAME |
| 3493 | ); |
| 3494 | fire_plc_tlu_ctb_tlr_csr_a_core_status.init_field_info ( |
| 3495 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_PCS_LANE_REV_FID, |
| 3496 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_PCS_LANE_REV_FMASK, |
| 3497 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_PCS_LANE_REV_POSITION, |
| 3498 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_PCS_LANE_REV_FIELD_NAME |
| 3499 | ); |
| 3500 | fire_plc_tlu_ctb_tlr_csr_a_core_status.init_field_info ( |
| 3501 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_RCV_FTS_NUM_FID, |
| 3502 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_RCV_FTS_NUM_FMASK, |
| 3503 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_RCV_FTS_NUM_POSITION, |
| 3504 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_RCV_FTS_NUM_FIELD_NAME |
| 3505 | ); |
| 3506 | fire_plc_tlu_ctb_tlr_csr_a_core_status.init_field_info ( |
| 3507 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_TX_LOS_STATE_FID, |
| 3508 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_TX_LOS_STATE_FMASK, |
| 3509 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_TX_LOS_STATE_POSITION, |
| 3510 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_TX_LOS_STATE_FIELD_NAME |
| 3511 | ); |
| 3512 | fire_plc_tlu_ctb_tlr_csr_a_core_status.init_field_info ( |
| 3513 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_INT_FCSM_STATE_FID, |
| 3514 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_INT_FCSM_STATE_FMASK, |
| 3515 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_INT_FCSM_STATE_POSITION, |
| 3516 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_INT_FCSM_STATE_FIELD_NAME |
| 3517 | ); |
| 3518 | fire_plc_tlu_ctb_tlr_csr_a_core_status.init_field_info ( |
| 3519 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_LTSSM_STATE_FID, |
| 3520 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_LTSSM_STATE_FMASK, |
| 3521 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_LTSSM_STATE_POSITION, |
| 3522 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CORE_STATUS_LTSSM_STATE_FIELD_NAME |
| 3523 | ); |
| 3524 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CAP_NAME); |
| 3525 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 3526 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 3527 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 3528 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 3529 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 3530 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 3531 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 3532 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 3533 | access_name[CSRT_OMNI] = "OMNI"; |
| 3534 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 3535 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 3536 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 3537 | access_name[FIRE_JTAG] = "JTAG"; |
| 3538 | |
| 3539 | fire_plc_tlu_ctb_tlr_csr_a_lnk_cap = new( |
| 3540 | fire_plc_tlu_ctb_tlr_csr_a_lnk_cap_state, |
| 3541 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CAP_HW_ADDR, |
| 3542 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CAP_POR_VALUE, |
| 3543 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CAP_RMASK, |
| 3544 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CAP_READ_ONLY_MASK, |
| 3545 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CAP_WRITE_MASK, |
| 3546 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CAP_CLEAR_MASK, |
| 3547 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CAP_SET_MASK, |
| 3548 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CAP_TOGGLE_MASK, |
| 3549 | input_name, |
| 3550 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CAP_NUM_FIELDS, |
| 3551 | input_access_methods, |
| 3552 | access_level, |
| 3553 | access_name, |
| 3554 | CSRT_OMNI |
| 3555 | ); |
| 3556 | fire_plc_tlu_ctb_tlr_csr_a_lnk_cap.init_field_info ( |
| 3557 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CAP_ASPM_FID, |
| 3558 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CAP_ASPM_FMASK, |
| 3559 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CAP_ASPM_POSITION, |
| 3560 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CAP_ASPM_FIELD_NAME |
| 3561 | ); |
| 3562 | fire_plc_tlu_ctb_tlr_csr_a_lnk_cap.init_field_info ( |
| 3563 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CAP_L1_FID, |
| 3564 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CAP_L1_FMASK, |
| 3565 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CAP_L1_POSITION, |
| 3566 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CAP_L1_FIELD_NAME |
| 3567 | ); |
| 3568 | fire_plc_tlu_ctb_tlr_csr_a_lnk_cap.init_field_info ( |
| 3569 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CAP_L0S_FID, |
| 3570 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CAP_L0S_FMASK, |
| 3571 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CAP_L0S_POSITION, |
| 3572 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CAP_L0S_FIELD_NAME |
| 3573 | ); |
| 3574 | fire_plc_tlu_ctb_tlr_csr_a_lnk_cap.init_field_info ( |
| 3575 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CAP_SPEED_FID, |
| 3576 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CAP_SPEED_FMASK, |
| 3577 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CAP_SPEED_POSITION, |
| 3578 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CAP_SPEED_FIELD_NAME |
| 3579 | ); |
| 3580 | fire_plc_tlu_ctb_tlr_csr_a_lnk_cap.init_field_info ( |
| 3581 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CAP_WIDTH_FID, |
| 3582 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CAP_WIDTH_FMASK, |
| 3583 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CAP_WIDTH_POSITION, |
| 3584 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CAP_WIDTH_FIELD_NAME |
| 3585 | ); |
| 3586 | fire_plc_tlu_ctb_tlr_csr_a_lnk_cap.init_field_info ( |
| 3587 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CAP_PORT_FID, |
| 3588 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CAP_PORT_FMASK, |
| 3589 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CAP_PORT_POSITION, |
| 3590 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CAP_PORT_FIELD_NAME |
| 3591 | ); |
| 3592 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_EN_ERR_NAME); |
| 3593 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 3594 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 3595 | access_level[CSRT_OMNI] = CSRT_READ_ACCESS; |
| 3596 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 3597 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 3598 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 3599 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 3600 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 3601 | access_name[CSRT_OMNI] = "OMNI"; |
| 3602 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 3603 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 3604 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 3605 | access_name[FIRE_JTAG] = "JTAG"; |
| 3606 | |
| 3607 | fire_plc_tlu_ctb_tlr_csr_a_ue_en_err = new( |
| 3608 | fire_plc_tlu_ctb_tlr_csr_a_ue_en_err_state, |
| 3609 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_EN_ERR_HW_ADDR, |
| 3610 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_EN_ERR_POR_VALUE, |
| 3611 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_EN_ERR_RMASK, |
| 3612 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_EN_ERR_READ_ONLY_MASK, |
| 3613 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_EN_ERR_WRITE_MASK, |
| 3614 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_EN_ERR_CLEAR_MASK, |
| 3615 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_EN_ERR_SET_MASK, |
| 3616 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_EN_ERR_TOGGLE_MASK, |
| 3617 | input_name, |
| 3618 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_EN_ERR_NUM_FIELDS, |
| 3619 | input_access_methods, |
| 3620 | access_level, |
| 3621 | access_name, |
| 3622 | CSRT_DAEMON |
| 3623 | ); |
| 3624 | fire_plc_tlu_ctb_tlr_csr_a_ue_en_err.init_field_info ( |
| 3625 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_EN_ERR_ERR_P_FID, |
| 3626 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_EN_ERR_ERR_P_FMASK, |
| 3627 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_EN_ERR_ERR_P_POSITION, |
| 3628 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_EN_ERR_ERR_P_FIELD_NAME |
| 3629 | ); |
| 3630 | fire_plc_tlu_ctb_tlr_csr_a_ue_en_err.init_field_info ( |
| 3631 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_EN_ERR_ERR_S_FID, |
| 3632 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_EN_ERR_ERR_S_FMASK, |
| 3633 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_EN_ERR_ERR_S_POSITION, |
| 3634 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_EN_ERR_ERR_S_FIELD_NAME |
| 3635 | ); |
| 3636 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_NAME); |
| 3637 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 3638 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 3639 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 3640 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 3641 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 3642 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 3643 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 3644 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 3645 | access_name[CSRT_OMNI] = "OMNI"; |
| 3646 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 3647 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 3648 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 3649 | access_name[FIRE_JTAG] = "JTAG"; |
| 3650 | |
| 3651 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1s_alias = new( |
| 3652 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1c_alias_state, |
| 3653 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_HW_ADDR, |
| 3654 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_POR_VALUE, |
| 3655 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_RMASK, |
| 3656 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_READ_ONLY_MASK, |
| 3657 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_WRITE_MASK, |
| 3658 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_CLEAR_MASK, |
| 3659 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_SET_MASK, |
| 3660 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_TOGGLE_MASK, |
| 3661 | input_name, |
| 3662 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_NUM_FIELDS, |
| 3663 | input_access_methods, |
| 3664 | access_level, |
| 3665 | access_name, |
| 3666 | CSRT_OMNI |
| 3667 | ); |
| 3668 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1s_alias.init_field_info ( |
| 3669 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SRC_TLP_FID, |
| 3670 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SRC_TLP_FMASK, |
| 3671 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SRC_TLP_POSITION, |
| 3672 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SRC_TLP_FIELD_NAME |
| 3673 | ); |
| 3674 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1s_alias.init_field_info ( |
| 3675 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_OUTSTANDING_SKIP_FID, |
| 3676 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_OUTSTANDING_SKIP_FMASK, |
| 3677 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_OUTSTANDING_SKIP_POSITION, |
| 3678 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_OUTSTANDING_SKIP_FIELD_NAME |
| 3679 | ); |
| 3680 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1s_alias.init_field_info ( |
| 3681 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_HOT_RST_FID, |
| 3682 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_HOT_RST_FMASK, |
| 3683 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_HOT_RST_POSITION, |
| 3684 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_HOT_RST_FIELD_NAME |
| 3685 | ); |
| 3686 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1s_alias.init_field_info ( |
| 3687 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SDP_NO_END_FID, |
| 3688 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SDP_NO_END_FMASK, |
| 3689 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SDP_NO_END_POSITION, |
| 3690 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SDP_NO_END_FIELD_NAME |
| 3691 | ); |
| 3692 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1s_alias.init_field_info ( |
| 3693 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_TS1_FID, |
| 3694 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_TS1_FMASK, |
| 3695 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_TS1_POSITION, |
| 3696 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_TS1_FIELD_NAME |
| 3697 | ); |
| 3698 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1s_alias.init_field_info ( |
| 3699 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_TS2_FID, |
| 3700 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_TS2_FMASK, |
| 3701 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_TS2_POSITION, |
| 3702 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_TS2_FIELD_NAME |
| 3703 | ); |
| 3704 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1s_alias.init_field_info ( |
| 3705 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SDS_LOS_FID, |
| 3706 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SDS_LOS_FMASK, |
| 3707 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SDS_LOS_POSITION, |
| 3708 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SDS_LOS_FIELD_NAME |
| 3709 | ); |
| 3710 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1s_alias.init_field_info ( |
| 3711 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_SEND_SKP_B2B_FID, |
| 3712 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_SEND_SKP_B2B_FMASK, |
| 3713 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_SEND_SKP_B2B_POSITION, |
| 3714 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_SEND_SKP_B2B_FIELD_NAME |
| 3715 | ); |
| 3716 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1s_alias.init_field_info ( |
| 3717 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ELASTIC_FIFO_OVRFLW_FID, |
| 3718 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ELASTIC_FIFO_OVRFLW_FMASK, |
| 3719 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ELASTIC_FIFO_OVRFLW_POSITION, |
| 3720 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ELASTIC_FIFO_OVRFLW_FIELD_NAME |
| 3721 | ); |
| 3722 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1s_alias.init_field_info ( |
| 3723 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_EIDLE_FID, |
| 3724 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_EIDLE_FMASK, |
| 3725 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_EIDLE_POSITION, |
| 3726 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_EIDLE_FIELD_NAME |
| 3727 | ); |
| 3728 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1s_alias.init_field_info ( |
| 3729 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_PAD_POS_FID, |
| 3730 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_PAD_POS_FMASK, |
| 3731 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_PAD_POS_POSITION, |
| 3732 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_PAD_POS_FIELD_NAME |
| 3733 | ); |
| 3734 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1s_alias.init_field_info ( |
| 3735 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_EN_LB_FID, |
| 3736 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_EN_LB_FMASK, |
| 3737 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_EN_LB_POSITION, |
| 3738 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_EN_LB_FIELD_NAME |
| 3739 | ); |
| 3740 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1s_alias.init_field_info ( |
| 3741 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_KCHAR_DLLP_FID, |
| 3742 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_KCHAR_DLLP_FMASK, |
| 3743 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_KCHAR_DLLP_POSITION, |
| 3744 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_KCHAR_DLLP_FIELD_NAME |
| 3745 | ); |
| 3746 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1s_alias.init_field_info ( |
| 3747 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_END_POS_FID, |
| 3748 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_END_POS_FMASK, |
| 3749 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_END_POS_POSITION, |
| 3750 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_END_POS_FIELD_NAME |
| 3751 | ); |
| 3752 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1s_alias.init_field_info ( |
| 3753 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_UNSUP_DLLP_FID, |
| 3754 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_UNSUP_DLLP_FMASK, |
| 3755 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_UNSUP_DLLP_POSITION, |
| 3756 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_UNSUP_DLLP_FIELD_NAME |
| 3757 | ); |
| 3758 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1s_alias.init_field_info ( |
| 3759 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ELASTIC_FIFO_UNDRFLW_FID, |
| 3760 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ELASTIC_FIFO_UNDRFLW_FMASK, |
| 3761 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ELASTIC_FIFO_UNDRFLW_POSITION, |
| 3762 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ELASTIC_FIFO_UNDRFLW_FIELD_NAME |
| 3763 | ); |
| 3764 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1s_alias.init_field_info ( |
| 3765 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_STP_POS_FID, |
| 3766 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_STP_POS_FMASK, |
| 3767 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_STP_POS_POSITION, |
| 3768 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_STP_POS_FIELD_NAME |
| 3769 | ); |
| 3770 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1s_alias.init_field_info ( |
| 3771 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_SDP_POS_FID, |
| 3772 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_SDP_POS_FMASK, |
| 3773 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_SDP_POS_POSITION, |
| 3774 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_SDP_POS_FIELD_NAME |
| 3775 | ); |
| 3776 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1s_alias.init_field_info ( |
| 3777 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ALIGN_FID, |
| 3778 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ALIGN_FMASK, |
| 3779 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ALIGN_POSITION, |
| 3780 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ALIGN_FIELD_NAME |
| 3781 | ); |
| 3782 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1s_alias.init_field_info ( |
| 3783 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_STP_NO_END_EDB_FID, |
| 3784 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_STP_NO_END_EDB_FMASK, |
| 3785 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_STP_NO_END_EDB_POSITION, |
| 3786 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_STP_NO_END_EDB_FIELD_NAME |
| 3787 | ); |
| 3788 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1s_alias.init_field_info ( |
| 3789 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_DIS_LINK_FID, |
| 3790 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_DIS_LINK_FMASK, |
| 3791 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_DIS_LINK_POSITION, |
| 3792 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_DIS_LINK_FIELD_NAME |
| 3793 | ); |
| 3794 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1s_alias.init_field_info ( |
| 3795 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SYNC_FID, |
| 3796 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SYNC_FMASK, |
| 3797 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SYNC_POSITION, |
| 3798 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SYNC_FIELD_NAME |
| 3799 | ); |
| 3800 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1s_alias.init_field_info ( |
| 3801 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_MULTI_SDP_FID, |
| 3802 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_MULTI_SDP_FMASK, |
| 3803 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_MULTI_SDP_POSITION, |
| 3804 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_MULTI_SDP_FIELD_NAME |
| 3805 | ); |
| 3806 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1s_alias.init_field_info ( |
| 3807 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_MULTI_STP_FID, |
| 3808 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_MULTI_STP_FMASK, |
| 3809 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_MULTI_STP_POSITION, |
| 3810 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_MULTI_STP_FIELD_NAME |
| 3811 | ); |
| 3812 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1s_alias.init_field_info ( |
| 3813 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_END_EDB_NO_STP_SDP_FID, |
| 3814 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_END_EDB_NO_STP_SDP_FMASK, |
| 3815 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_END_EDB_NO_STP_SDP_POSITION, |
| 3816 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_END_EDB_NO_STP_SDP_FIELD_NAME |
| 3817 | ); |
| 3818 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1s_alias.init_field_info ( |
| 3819 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_EIDLE_EXIT_FID, |
| 3820 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_EIDLE_EXIT_FMASK, |
| 3821 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_EIDLE_EXIT_POSITION, |
| 3822 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_EIDLE_EXIT_FIELD_NAME |
| 3823 | ); |
| 3824 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CTL_NAME); |
| 3825 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 3826 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 3827 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 3828 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 3829 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 3830 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 3831 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 3832 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 3833 | access_name[CSRT_OMNI] = "OMNI"; |
| 3834 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 3835 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 3836 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 3837 | access_name[FIRE_JTAG] = "JTAG"; |
| 3838 | |
| 3839 | fire_plc_tlu_ctb_tlr_csr_a_lnk_ctl = new( |
| 3840 | fire_plc_tlu_ctb_tlr_csr_a_lnk_ctl_state, |
| 3841 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CTL_HW_ADDR, |
| 3842 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CTL_POR_VALUE, |
| 3843 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CTL_RMASK, |
| 3844 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CTL_READ_ONLY_MASK, |
| 3845 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CTL_WRITE_MASK, |
| 3846 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CTL_CLEAR_MASK, |
| 3847 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CTL_SET_MASK, |
| 3848 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CTL_TOGGLE_MASK, |
| 3849 | input_name, |
| 3850 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CTL_NUM_FIELDS, |
| 3851 | input_access_methods, |
| 3852 | access_level, |
| 3853 | access_name, |
| 3854 | CSRT_OMNI |
| 3855 | ); |
| 3856 | fire_plc_tlu_ctb_tlr_csr_a_lnk_ctl.init_field_info ( |
| 3857 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CTL_CLOCK_FID, |
| 3858 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CTL_CLOCK_FMASK, |
| 3859 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CTL_CLOCK_POSITION, |
| 3860 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CTL_CLOCK_FIELD_NAME |
| 3861 | ); |
| 3862 | fire_plc_tlu_ctb_tlr_csr_a_lnk_ctl.init_field_info ( |
| 3863 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CTL_ASPM_FID, |
| 3864 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CTL_ASPM_FMASK, |
| 3865 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CTL_ASPM_POSITION, |
| 3866 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CTL_ASPM_FIELD_NAME |
| 3867 | ); |
| 3868 | fire_plc_tlu_ctb_tlr_csr_a_lnk_ctl.init_field_info ( |
| 3869 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CTL_RETRAIN_FID, |
| 3870 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CTL_RETRAIN_FMASK, |
| 3871 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CTL_RETRAIN_POSITION, |
| 3872 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CTL_RETRAIN_FIELD_NAME |
| 3873 | ); |
| 3874 | fire_plc_tlu_ctb_tlr_csr_a_lnk_ctl.init_field_info ( |
| 3875 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CTL_RCB_FID, |
| 3876 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CTL_RCB_FMASK, |
| 3877 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CTL_RCB_POSITION, |
| 3878 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CTL_RCB_FIELD_NAME |
| 3879 | ); |
| 3880 | fire_plc_tlu_ctb_tlr_csr_a_lnk_ctl.init_field_info ( |
| 3881 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CTL_EXTSYNC_FID, |
| 3882 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CTL_EXTSYNC_FMASK, |
| 3883 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CTL_EXTSYNC_POSITION, |
| 3884 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CTL_EXTSYNC_FIELD_NAME |
| 3885 | ); |
| 3886 | fire_plc_tlu_ctb_tlr_csr_a_lnk_ctl.init_field_info ( |
| 3887 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CTL_DISABLE_FID, |
| 3888 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CTL_DISABLE_FMASK, |
| 3889 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CTL_DISABLE_POSITION, |
| 3890 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_CTL_DISABLE_FIELD_NAME |
| 3891 | ); |
| 3892 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_NAME); |
| 3893 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 3894 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 3895 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 3896 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 3897 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 3898 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 3899 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 3900 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 3901 | access_name[CSRT_OMNI] = "OMNI"; |
| 3902 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 3903 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 3904 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 3905 | access_name[FIRE_JTAG] = "JTAG"; |
| 3906 | |
| 3907 | fire_plc_tlu_ctb_tlr_csr_a_ce_err_rw1s_alias = new( |
| 3908 | fire_plc_tlu_ctb_tlr_csr_a_ce_err_rw1c_alias_state, |
| 3909 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_HW_ADDR, |
| 3910 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_POR_VALUE, |
| 3911 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_RMASK, |
| 3912 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_READ_ONLY_MASK, |
| 3913 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_WRITE_MASK, |
| 3914 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_CLEAR_MASK, |
| 3915 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_SET_MASK, |
| 3916 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_TOGGLE_MASK, |
| 3917 | input_name, |
| 3918 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_NUM_FIELDS, |
| 3919 | input_access_methods, |
| 3920 | access_level, |
| 3921 | access_name, |
| 3922 | CSRT_OMNI |
| 3923 | ); |
| 3924 | fire_plc_tlu_ctb_tlr_csr_a_ce_err_rw1s_alias.init_field_info ( |
| 3925 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_RTO_P_FID, |
| 3926 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_RTO_P_FMASK, |
| 3927 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_RTO_P_POSITION, |
| 3928 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_RTO_P_FIELD_NAME |
| 3929 | ); |
| 3930 | fire_plc_tlu_ctb_tlr_csr_a_ce_err_rw1s_alias.init_field_info ( |
| 3931 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_RE_S_FID, |
| 3932 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_RE_S_FMASK, |
| 3933 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_RE_S_POSITION, |
| 3934 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_RE_S_FIELD_NAME |
| 3935 | ); |
| 3936 | fire_plc_tlu_ctb_tlr_csr_a_ce_err_rw1s_alias.init_field_info ( |
| 3937 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_RNR_P_FID, |
| 3938 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_RNR_P_FMASK, |
| 3939 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_RNR_P_POSITION, |
| 3940 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_RNR_P_FIELD_NAME |
| 3941 | ); |
| 3942 | fire_plc_tlu_ctb_tlr_csr_a_ce_err_rw1s_alias.init_field_info ( |
| 3943 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_BTP_P_FID, |
| 3944 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_BTP_P_FMASK, |
| 3945 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_BTP_P_POSITION, |
| 3946 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_BTP_P_FIELD_NAME |
| 3947 | ); |
| 3948 | fire_plc_tlu_ctb_tlr_csr_a_ce_err_rw1s_alias.init_field_info ( |
| 3949 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_BDP_P_FID, |
| 3950 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_BDP_P_FMASK, |
| 3951 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_BDP_P_POSITION, |
| 3952 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_BDP_P_FIELD_NAME |
| 3953 | ); |
| 3954 | fire_plc_tlu_ctb_tlr_csr_a_ce_err_rw1s_alias.init_field_info ( |
| 3955 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_RTO_S_FID, |
| 3956 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_RTO_S_FMASK, |
| 3957 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_RTO_S_POSITION, |
| 3958 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_RTO_S_FIELD_NAME |
| 3959 | ); |
| 3960 | fire_plc_tlu_ctb_tlr_csr_a_ce_err_rw1s_alias.init_field_info ( |
| 3961 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_RNR_S_FID, |
| 3962 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_RNR_S_FMASK, |
| 3963 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_RNR_S_POSITION, |
| 3964 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_RNR_S_FIELD_NAME |
| 3965 | ); |
| 3966 | fire_plc_tlu_ctb_tlr_csr_a_ce_err_rw1s_alias.init_field_info ( |
| 3967 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_BTP_S_FID, |
| 3968 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_BTP_S_FMASK, |
| 3969 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_BTP_S_POSITION, |
| 3970 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_BTP_S_FIELD_NAME |
| 3971 | ); |
| 3972 | fire_plc_tlu_ctb_tlr_csr_a_ce_err_rw1s_alias.init_field_info ( |
| 3973 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_BDP_S_FID, |
| 3974 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_BDP_S_FMASK, |
| 3975 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_BDP_S_POSITION, |
| 3976 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_BDP_S_FIELD_NAME |
| 3977 | ); |
| 3978 | fire_plc_tlu_ctb_tlr_csr_a_ce_err_rw1s_alias.init_field_info ( |
| 3979 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_RE_P_FID, |
| 3980 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_RE_P_FMASK, |
| 3981 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_RE_P_POSITION, |
| 3982 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1S_ALIAS_RE_P_FIELD_NAME |
| 3983 | ); |
| 3984 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_PLL_NAME); |
| 3985 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 3986 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 3987 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 3988 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 3989 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 3990 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 3991 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 3992 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 3993 | access_name[CSRT_OMNI] = "OMNI"; |
| 3994 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 3995 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 3996 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 3997 | access_name[FIRE_JTAG] = "JTAG"; |
| 3998 | |
| 3999 | fire_plc_tlu_ctb_tlr_csr_a_serdes_pll = new( |
| 4000 | fire_plc_tlu_ctb_tlr_csr_a_serdes_pll_state, |
| 4001 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_PLL_HW_ADDR, |
| 4002 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_PLL_POR_VALUE, |
| 4003 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_PLL_RMASK, |
| 4004 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_PLL_READ_ONLY_MASK, |
| 4005 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_PLL_WRITE_MASK, |
| 4006 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_PLL_CLEAR_MASK, |
| 4007 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_PLL_SET_MASK, |
| 4008 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_PLL_TOGGLE_MASK, |
| 4009 | input_name, |
| 4010 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_PLL_NUM_FIELDS, |
| 4011 | input_access_methods, |
| 4012 | access_level, |
| 4013 | access_name, |
| 4014 | CSRT_OMNI |
| 4015 | ); |
| 4016 | fire_plc_tlu_ctb_tlr_csr_a_serdes_pll.init_field_info ( |
| 4017 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_PLL_LB_FID, |
| 4018 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_PLL_LB_FMASK, |
| 4019 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_PLL_LB_POSITION, |
| 4020 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_PLL_LB_FIELD_NAME |
| 4021 | ); |
| 4022 | fire_plc_tlu_ctb_tlr_csr_a_serdes_pll.init_field_info ( |
| 4023 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_PLL_SPARE_FID, |
| 4024 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_PLL_SPARE_FMASK, |
| 4025 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_PLL_SPARE_POSITION, |
| 4026 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_PLL_SPARE_FIELD_NAME |
| 4027 | ); |
| 4028 | fire_plc_tlu_ctb_tlr_csr_a_serdes_pll.init_field_info ( |
| 4029 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_PLL_MPY_FID, |
| 4030 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_PLL_MPY_FMASK, |
| 4031 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_PLL_MPY_POSITION, |
| 4032 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_PLL_MPY_FIELD_NAME |
| 4033 | ); |
| 4034 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_ACKNAK_TIMER_NAME); |
| 4035 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 4036 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 4037 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 4038 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 4039 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 4040 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 4041 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 4042 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 4043 | access_name[CSRT_OMNI] = "OMNI"; |
| 4044 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 4045 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 4046 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 4047 | access_name[FIRE_JTAG] = "JTAG"; |
| 4048 | |
| 4049 | fire_plc_tlu_ctb_tlr_csr_a_acknak_timer = new( |
| 4050 | fire_plc_tlu_ctb_tlr_csr_a_acknak_timer_state, |
| 4051 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ACKNAK_TIMER_HW_ADDR, |
| 4052 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ACKNAK_TIMER_POR_VALUE, |
| 4053 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ACKNAK_TIMER_RMASK, |
| 4054 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ACKNAK_TIMER_READ_ONLY_MASK, |
| 4055 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ACKNAK_TIMER_WRITE_MASK, |
| 4056 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ACKNAK_TIMER_CLEAR_MASK, |
| 4057 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ACKNAK_TIMER_SET_MASK, |
| 4058 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ACKNAK_TIMER_TOGGLE_MASK, |
| 4059 | input_name, |
| 4060 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ACKNAK_TIMER_NUM_FIELDS, |
| 4061 | input_access_methods, |
| 4062 | access_level, |
| 4063 | access_name, |
| 4064 | CSRT_OMNI |
| 4065 | ); |
| 4066 | fire_plc_tlu_ctb_tlr_csr_a_acknak_timer.init_field_info ( |
| 4067 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ACKNAK_TIMER_ACK_NAK_TMR_FID, |
| 4068 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ACKNAK_TIMER_ACK_NAK_TMR_FMASK, |
| 4069 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ACKNAK_TIMER_ACK_NAK_TMR_POSITION, |
| 4070 | FIRE_PLC_TLU_CTB_TLR_CSR_A_ACKNAK_TIMER_ACK_NAK_TMR_FIELD_NAME |
| 4071 | ); |
| 4072 | sprintf(base_csr_name,"%s", FIRE_DLC_ILU_CIB_CSR_A_PEC_INT_EN_NAME); |
| 4073 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 4074 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 4075 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 4076 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 4077 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 4078 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 4079 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 4080 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 4081 | access_name[CSRT_OMNI] = "OMNI"; |
| 4082 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 4083 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 4084 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 4085 | access_name[FIRE_JTAG] = "JTAG"; |
| 4086 | |
| 4087 | fire_dlc_ilu_cib_csr_a_pec_int_en = new( |
| 4088 | fire_dlc_ilu_cib_csr_a_pec_int_en_state, |
| 4089 | FIRE_DLC_ILU_CIB_CSR_A_PEC_INT_EN_HW_ADDR, |
| 4090 | FIRE_DLC_ILU_CIB_CSR_A_PEC_INT_EN_POR_VALUE, |
| 4091 | FIRE_DLC_ILU_CIB_CSR_A_PEC_INT_EN_RMASK, |
| 4092 | FIRE_DLC_ILU_CIB_CSR_A_PEC_INT_EN_READ_ONLY_MASK, |
| 4093 | FIRE_DLC_ILU_CIB_CSR_A_PEC_INT_EN_WRITE_MASK, |
| 4094 | FIRE_DLC_ILU_CIB_CSR_A_PEC_INT_EN_CLEAR_MASK, |
| 4095 | FIRE_DLC_ILU_CIB_CSR_A_PEC_INT_EN_SET_MASK, |
| 4096 | FIRE_DLC_ILU_CIB_CSR_A_PEC_INT_EN_TOGGLE_MASK, |
| 4097 | input_name, |
| 4098 | FIRE_DLC_ILU_CIB_CSR_A_PEC_INT_EN_NUM_FIELDS, |
| 4099 | input_access_methods, |
| 4100 | access_level, |
| 4101 | access_name, |
| 4102 | CSRT_OMNI |
| 4103 | ); |
| 4104 | fire_dlc_ilu_cib_csr_a_pec_int_en.init_field_info ( |
| 4105 | FIRE_DLC_ILU_CIB_CSR_A_PEC_INT_EN_PEC_CE_FID, |
| 4106 | FIRE_DLC_ILU_CIB_CSR_A_PEC_INT_EN_PEC_CE_FMASK, |
| 4107 | FIRE_DLC_ILU_CIB_CSR_A_PEC_INT_EN_PEC_CE_POSITION, |
| 4108 | FIRE_DLC_ILU_CIB_CSR_A_PEC_INT_EN_PEC_CE_FIELD_NAME |
| 4109 | ); |
| 4110 | fire_dlc_ilu_cib_csr_a_pec_int_en.init_field_info ( |
| 4111 | FIRE_DLC_ILU_CIB_CSR_A_PEC_INT_EN_PEC_ILU_FID, |
| 4112 | FIRE_DLC_ILU_CIB_CSR_A_PEC_INT_EN_PEC_ILU_FMASK, |
| 4113 | FIRE_DLC_ILU_CIB_CSR_A_PEC_INT_EN_PEC_ILU_POSITION, |
| 4114 | FIRE_DLC_ILU_CIB_CSR_A_PEC_INT_EN_PEC_ILU_FIELD_NAME |
| 4115 | ); |
| 4116 | fire_dlc_ilu_cib_csr_a_pec_int_en.init_field_info ( |
| 4117 | FIRE_DLC_ILU_CIB_CSR_A_PEC_INT_EN_PEC_OE_FID, |
| 4118 | FIRE_DLC_ILU_CIB_CSR_A_PEC_INT_EN_PEC_OE_FMASK, |
| 4119 | FIRE_DLC_ILU_CIB_CSR_A_PEC_INT_EN_PEC_OE_POSITION, |
| 4120 | FIRE_DLC_ILU_CIB_CSR_A_PEC_INT_EN_PEC_OE_FIELD_NAME |
| 4121 | ); |
| 4122 | fire_dlc_ilu_cib_csr_a_pec_int_en.init_field_info ( |
| 4123 | FIRE_DLC_ILU_CIB_CSR_A_PEC_INT_EN_PEC_FID, |
| 4124 | FIRE_DLC_ILU_CIB_CSR_A_PEC_INT_EN_PEC_FMASK, |
| 4125 | FIRE_DLC_ILU_CIB_CSR_A_PEC_INT_EN_PEC_POSITION, |
| 4126 | FIRE_DLC_ILU_CIB_CSR_A_PEC_INT_EN_PEC_FIELD_NAME |
| 4127 | ); |
| 4128 | fire_dlc_ilu_cib_csr_a_pec_int_en.init_field_info ( |
| 4129 | FIRE_DLC_ILU_CIB_CSR_A_PEC_INT_EN_PEC_UE_FID, |
| 4130 | FIRE_DLC_ILU_CIB_CSR_A_PEC_INT_EN_PEC_UE_FMASK, |
| 4131 | FIRE_DLC_ILU_CIB_CSR_A_PEC_INT_EN_PEC_UE_POSITION, |
| 4132 | FIRE_DLC_ILU_CIB_CSR_A_PEC_INT_EN_PEC_UE_FIELD_NAME |
| 4133 | ); |
| 4134 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_NAME); |
| 4135 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 4136 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 4137 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 4138 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 4139 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 4140 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 4141 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 4142 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 4143 | access_name[CSRT_OMNI] = "OMNI"; |
| 4144 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 4145 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 4146 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 4147 | access_name[FIRE_JTAG] = "JTAG"; |
| 4148 | |
| 4149 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1c_alias = new( |
| 4150 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1c_alias_state, |
| 4151 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_HW_ADDR, |
| 4152 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_POR_VALUE, |
| 4153 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_RMASK, |
| 4154 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_READ_ONLY_MASK, |
| 4155 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_WRITE_MASK, |
| 4156 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_CLEAR_MASK, |
| 4157 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_SET_MASK, |
| 4158 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_TOGGLE_MASK, |
| 4159 | input_name, |
| 4160 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_NUM_FIELDS, |
| 4161 | input_access_methods, |
| 4162 | access_level, |
| 4163 | access_name, |
| 4164 | CSRT_OMNI |
| 4165 | ); |
| 4166 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1c_alias.init_field_info ( |
| 4167 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SRC_TLP_FID, |
| 4168 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SRC_TLP_FMASK, |
| 4169 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SRC_TLP_POSITION, |
| 4170 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SRC_TLP_FIELD_NAME |
| 4171 | ); |
| 4172 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1c_alias.init_field_info ( |
| 4173 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_OUTSTANDING_SKIP_FID, |
| 4174 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_OUTSTANDING_SKIP_FMASK, |
| 4175 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_OUTSTANDING_SKIP_POSITION, |
| 4176 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_OUTSTANDING_SKIP_FIELD_NAME |
| 4177 | ); |
| 4178 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1c_alias.init_field_info ( |
| 4179 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_HOT_RST_FID, |
| 4180 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_HOT_RST_FMASK, |
| 4181 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_HOT_RST_POSITION, |
| 4182 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_HOT_RST_FIELD_NAME |
| 4183 | ); |
| 4184 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1c_alias.init_field_info ( |
| 4185 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SDP_NO_END_FID, |
| 4186 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SDP_NO_END_FMASK, |
| 4187 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SDP_NO_END_POSITION, |
| 4188 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SDP_NO_END_FIELD_NAME |
| 4189 | ); |
| 4190 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1c_alias.init_field_info ( |
| 4191 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_TS1_FID, |
| 4192 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_TS1_FMASK, |
| 4193 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_TS1_POSITION, |
| 4194 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_TS1_FIELD_NAME |
| 4195 | ); |
| 4196 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1c_alias.init_field_info ( |
| 4197 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_TS2_FID, |
| 4198 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_TS2_FMASK, |
| 4199 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_TS2_POSITION, |
| 4200 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_TS2_FIELD_NAME |
| 4201 | ); |
| 4202 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1c_alias.init_field_info ( |
| 4203 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SDS_LOS_FID, |
| 4204 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SDS_LOS_FMASK, |
| 4205 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SDS_LOS_POSITION, |
| 4206 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SDS_LOS_FIELD_NAME |
| 4207 | ); |
| 4208 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1c_alias.init_field_info ( |
| 4209 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_SEND_SKP_B2B_FID, |
| 4210 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_SEND_SKP_B2B_FMASK, |
| 4211 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_SEND_SKP_B2B_POSITION, |
| 4212 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_SEND_SKP_B2B_FIELD_NAME |
| 4213 | ); |
| 4214 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1c_alias.init_field_info ( |
| 4215 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ELASTIC_FIFO_OVRFLW_FID, |
| 4216 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ELASTIC_FIFO_OVRFLW_FMASK, |
| 4217 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ELASTIC_FIFO_OVRFLW_POSITION, |
| 4218 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ELASTIC_FIFO_OVRFLW_FIELD_NAME |
| 4219 | ); |
| 4220 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1c_alias.init_field_info ( |
| 4221 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_EIDLE_FID, |
| 4222 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_EIDLE_FMASK, |
| 4223 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_EIDLE_POSITION, |
| 4224 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_EIDLE_FIELD_NAME |
| 4225 | ); |
| 4226 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1c_alias.init_field_info ( |
| 4227 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_PAD_POS_FID, |
| 4228 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_PAD_POS_FMASK, |
| 4229 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_PAD_POS_POSITION, |
| 4230 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_PAD_POS_FIELD_NAME |
| 4231 | ); |
| 4232 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1c_alias.init_field_info ( |
| 4233 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_EN_LB_FID, |
| 4234 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_EN_LB_FMASK, |
| 4235 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_EN_LB_POSITION, |
| 4236 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_EN_LB_FIELD_NAME |
| 4237 | ); |
| 4238 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1c_alias.init_field_info ( |
| 4239 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_KCHAR_DLLP_FID, |
| 4240 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_KCHAR_DLLP_FMASK, |
| 4241 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_KCHAR_DLLP_POSITION, |
| 4242 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_KCHAR_DLLP_FIELD_NAME |
| 4243 | ); |
| 4244 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1c_alias.init_field_info ( |
| 4245 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_END_POS_FID, |
| 4246 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_END_POS_FMASK, |
| 4247 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_END_POS_POSITION, |
| 4248 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_END_POS_FIELD_NAME |
| 4249 | ); |
| 4250 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1c_alias.init_field_info ( |
| 4251 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_UNSUP_DLLP_FID, |
| 4252 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_UNSUP_DLLP_FMASK, |
| 4253 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_UNSUP_DLLP_POSITION, |
| 4254 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_UNSUP_DLLP_FIELD_NAME |
| 4255 | ); |
| 4256 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1c_alias.init_field_info ( |
| 4257 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ELASTIC_FIFO_UNDRFLW_FID, |
| 4258 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ELASTIC_FIFO_UNDRFLW_FMASK, |
| 4259 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ELASTIC_FIFO_UNDRFLW_POSITION, |
| 4260 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ELASTIC_FIFO_UNDRFLW_FIELD_NAME |
| 4261 | ); |
| 4262 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1c_alias.init_field_info ( |
| 4263 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_STP_POS_FID, |
| 4264 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_STP_POS_FMASK, |
| 4265 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_STP_POS_POSITION, |
| 4266 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_STP_POS_FIELD_NAME |
| 4267 | ); |
| 4268 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1c_alias.init_field_info ( |
| 4269 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_SDP_POS_FID, |
| 4270 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_SDP_POS_FMASK, |
| 4271 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_SDP_POS_POSITION, |
| 4272 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_SDP_POS_FIELD_NAME |
| 4273 | ); |
| 4274 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1c_alias.init_field_info ( |
| 4275 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ALIGN_FID, |
| 4276 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ALIGN_FMASK, |
| 4277 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ALIGN_POSITION, |
| 4278 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ALIGN_FIELD_NAME |
| 4279 | ); |
| 4280 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1c_alias.init_field_info ( |
| 4281 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_STP_NO_END_EDB_FID, |
| 4282 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_STP_NO_END_EDB_FMASK, |
| 4283 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_STP_NO_END_EDB_POSITION, |
| 4284 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_STP_NO_END_EDB_FIELD_NAME |
| 4285 | ); |
| 4286 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1c_alias.init_field_info ( |
| 4287 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_DIS_LINK_FID, |
| 4288 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_DIS_LINK_FMASK, |
| 4289 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_DIS_LINK_POSITION, |
| 4290 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_DIS_LINK_FIELD_NAME |
| 4291 | ); |
| 4292 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1c_alias.init_field_info ( |
| 4293 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SYNC_FID, |
| 4294 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SYNC_FMASK, |
| 4295 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SYNC_POSITION, |
| 4296 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SYNC_FIELD_NAME |
| 4297 | ); |
| 4298 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1c_alias.init_field_info ( |
| 4299 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_MULTI_SDP_FID, |
| 4300 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_MULTI_SDP_FMASK, |
| 4301 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_MULTI_SDP_POSITION, |
| 4302 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_MULTI_SDP_FIELD_NAME |
| 4303 | ); |
| 4304 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1c_alias.init_field_info ( |
| 4305 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_MULTI_STP_FID, |
| 4306 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_MULTI_STP_FMASK, |
| 4307 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_MULTI_STP_POSITION, |
| 4308 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_MULTI_STP_FIELD_NAME |
| 4309 | ); |
| 4310 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1c_alias.init_field_info ( |
| 4311 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_END_EDB_NO_STP_SDP_FID, |
| 4312 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_END_EDB_NO_STP_SDP_FMASK, |
| 4313 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_END_EDB_NO_STP_SDP_POSITION, |
| 4314 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_END_EDB_NO_STP_SDP_FIELD_NAME |
| 4315 | ); |
| 4316 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1c_alias.init_field_info ( |
| 4317 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_EIDLE_EXIT_FID, |
| 4318 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_EIDLE_EXIT_FMASK, |
| 4319 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_EIDLE_EXIT_POSITION, |
| 4320 | FIRE_PLC_TLU_CTB_TLR_CSR_A_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_EIDLE_EXIT_FIELD_NAME |
| 4321 | ); |
| 4322 | sprintf(base_csr_name,"%s", FIRE_DLC_ILU_CIB_CSR_A_PEC_EN_ERR_NAME); |
| 4323 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 4324 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 4325 | access_level[CSRT_OMNI] = CSRT_READ_ACCESS; |
| 4326 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 4327 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 4328 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 4329 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 4330 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 4331 | access_name[CSRT_OMNI] = "OMNI"; |
| 4332 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 4333 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 4334 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 4335 | access_name[FIRE_JTAG] = "JTAG"; |
| 4336 | |
| 4337 | fire_dlc_ilu_cib_csr_a_pec_en_err = new( |
| 4338 | fire_dlc_ilu_cib_csr_a_pec_en_err_state, |
| 4339 | FIRE_DLC_ILU_CIB_CSR_A_PEC_EN_ERR_HW_ADDR, |
| 4340 | FIRE_DLC_ILU_CIB_CSR_A_PEC_EN_ERR_POR_VALUE, |
| 4341 | FIRE_DLC_ILU_CIB_CSR_A_PEC_EN_ERR_RMASK, |
| 4342 | FIRE_DLC_ILU_CIB_CSR_A_PEC_EN_ERR_READ_ONLY_MASK, |
| 4343 | FIRE_DLC_ILU_CIB_CSR_A_PEC_EN_ERR_WRITE_MASK, |
| 4344 | FIRE_DLC_ILU_CIB_CSR_A_PEC_EN_ERR_CLEAR_MASK, |
| 4345 | FIRE_DLC_ILU_CIB_CSR_A_PEC_EN_ERR_SET_MASK, |
| 4346 | FIRE_DLC_ILU_CIB_CSR_A_PEC_EN_ERR_TOGGLE_MASK, |
| 4347 | input_name, |
| 4348 | FIRE_DLC_ILU_CIB_CSR_A_PEC_EN_ERR_NUM_FIELDS, |
| 4349 | input_access_methods, |
| 4350 | access_level, |
| 4351 | access_name, |
| 4352 | CSRT_DAEMON |
| 4353 | ); |
| 4354 | fire_dlc_ilu_cib_csr_a_pec_en_err.init_field_info ( |
| 4355 | FIRE_DLC_ILU_CIB_CSR_A_PEC_EN_ERR_UE_FID, |
| 4356 | FIRE_DLC_ILU_CIB_CSR_A_PEC_EN_ERR_UE_FMASK, |
| 4357 | FIRE_DLC_ILU_CIB_CSR_A_PEC_EN_ERR_UE_POSITION, |
| 4358 | FIRE_DLC_ILU_CIB_CSR_A_PEC_EN_ERR_UE_FIELD_NAME |
| 4359 | ); |
| 4360 | fire_dlc_ilu_cib_csr_a_pec_en_err.init_field_info ( |
| 4361 | FIRE_DLC_ILU_CIB_CSR_A_PEC_EN_ERR_OE_FID, |
| 4362 | FIRE_DLC_ILU_CIB_CSR_A_PEC_EN_ERR_OE_FMASK, |
| 4363 | FIRE_DLC_ILU_CIB_CSR_A_PEC_EN_ERR_OE_POSITION, |
| 4364 | FIRE_DLC_ILU_CIB_CSR_A_PEC_EN_ERR_OE_FIELD_NAME |
| 4365 | ); |
| 4366 | fire_dlc_ilu_cib_csr_a_pec_en_err.init_field_info ( |
| 4367 | FIRE_DLC_ILU_CIB_CSR_A_PEC_EN_ERR_CE_FID, |
| 4368 | FIRE_DLC_ILU_CIB_CSR_A_PEC_EN_ERR_CE_FMASK, |
| 4369 | FIRE_DLC_ILU_CIB_CSR_A_PEC_EN_ERR_CE_POSITION, |
| 4370 | FIRE_DLC_ILU_CIB_CSR_A_PEC_EN_ERR_CE_FIELD_NAME |
| 4371 | ); |
| 4372 | fire_dlc_ilu_cib_csr_a_pec_en_err.init_field_info ( |
| 4373 | FIRE_DLC_ILU_CIB_CSR_A_PEC_EN_ERR_ILU_FID, |
| 4374 | FIRE_DLC_ILU_CIB_CSR_A_PEC_EN_ERR_ILU_FMASK, |
| 4375 | FIRE_DLC_ILU_CIB_CSR_A_PEC_EN_ERR_ILU_POSITION, |
| 4376 | FIRE_DLC_ILU_CIB_CSR_A_PEC_EN_ERR_ILU_FIELD_NAME |
| 4377 | ); |
| 4378 | sprintf(base_csr_name,"%s", FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_NAME); |
| 4379 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 4380 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 4381 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 4382 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 4383 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 4384 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 4385 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 4386 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 4387 | access_name[CSRT_OMNI] = "OMNI"; |
| 4388 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 4389 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 4390 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 4391 | access_name[FIRE_JTAG] = "JTAG"; |
| 4392 | |
| 4393 | fire_dlc_ilu_cib_csr_a_ilu_log_err_rw1s_alias = new( |
| 4394 | fire_dlc_ilu_cib_csr_a_ilu_log_err_rw1c_alias_state, |
| 4395 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_HW_ADDR, |
| 4396 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_POR_VALUE, |
| 4397 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_RMASK, |
| 4398 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_READ_ONLY_MASK, |
| 4399 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_WRITE_MASK, |
| 4400 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_CLEAR_MASK, |
| 4401 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_SET_MASK, |
| 4402 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_TOGGLE_MASK, |
| 4403 | input_name, |
| 4404 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_NUM_FIELDS, |
| 4405 | input_access_methods, |
| 4406 | access_level, |
| 4407 | access_name, |
| 4408 | CSRT_OMNI |
| 4409 | ); |
| 4410 | fire_dlc_ilu_cib_csr_a_ilu_log_err_rw1s_alias.init_field_info ( |
| 4411 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_SPARE3_S_FID, |
| 4412 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_SPARE3_S_FMASK, |
| 4413 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_SPARE3_S_POSITION, |
| 4414 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_SPARE3_S_FIELD_NAME |
| 4415 | ); |
| 4416 | fire_dlc_ilu_cib_csr_a_ilu_log_err_rw1s_alias.init_field_info ( |
| 4417 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_SPARE2_P_FID, |
| 4418 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_SPARE2_P_FMASK, |
| 4419 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_SPARE2_P_POSITION, |
| 4420 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_SPARE2_P_FIELD_NAME |
| 4421 | ); |
| 4422 | fire_dlc_ilu_cib_csr_a_ilu_log_err_rw1s_alias.init_field_info ( |
| 4423 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_IHB_PE_S_FID, |
| 4424 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_IHB_PE_S_FMASK, |
| 4425 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_IHB_PE_S_POSITION, |
| 4426 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_IHB_PE_S_FIELD_NAME |
| 4427 | ); |
| 4428 | fire_dlc_ilu_cib_csr_a_ilu_log_err_rw1s_alias.init_field_info ( |
| 4429 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_SPARE1_S_FID, |
| 4430 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_SPARE1_S_FMASK, |
| 4431 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_SPARE1_S_POSITION, |
| 4432 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_SPARE1_S_FIELD_NAME |
| 4433 | ); |
| 4434 | fire_dlc_ilu_cib_csr_a_ilu_log_err_rw1s_alias.init_field_info ( |
| 4435 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_SPARE3_P_FID, |
| 4436 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_SPARE3_P_FMASK, |
| 4437 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_SPARE3_P_POSITION, |
| 4438 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_SPARE3_P_FIELD_NAME |
| 4439 | ); |
| 4440 | fire_dlc_ilu_cib_csr_a_ilu_log_err_rw1s_alias.init_field_info ( |
| 4441 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_SPARE2_S_FID, |
| 4442 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_SPARE2_S_FMASK, |
| 4443 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_SPARE2_S_POSITION, |
| 4444 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_SPARE2_S_FIELD_NAME |
| 4445 | ); |
| 4446 | fire_dlc_ilu_cib_csr_a_ilu_log_err_rw1s_alias.init_field_info ( |
| 4447 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_IHB_PE_P_FID, |
| 4448 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_IHB_PE_P_FMASK, |
| 4449 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_IHB_PE_P_POSITION, |
| 4450 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_IHB_PE_P_FIELD_NAME |
| 4451 | ); |
| 4452 | fire_dlc_ilu_cib_csr_a_ilu_log_err_rw1s_alias.init_field_info ( |
| 4453 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_SPARE1_P_FID, |
| 4454 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_SPARE1_P_FMASK, |
| 4455 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_SPARE1_P_POSITION, |
| 4456 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1S_ALIAS_SPARE1_P_FIELD_NAME |
| 4457 | ); |
| 4458 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_NAME); |
| 4459 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 4460 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 4461 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 4462 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 4463 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 4464 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 4465 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 4466 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 4467 | access_name[CSRT_OMNI] = "OMNI"; |
| 4468 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 4469 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 4470 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 4471 | access_name[FIRE_JTAG] = "JTAG"; |
| 4472 | |
| 4473 | fire_plc_tlu_ctb_tlr_csr_a_tlu_diag = new( |
| 4474 | fire_plc_tlu_ctb_tlr_csr_a_tlu_diag_state, |
| 4475 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_HW_ADDR, |
| 4476 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_POR_VALUE, |
| 4477 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_RMASK, |
| 4478 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_READ_ONLY_MASK, |
| 4479 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_WRITE_MASK, |
| 4480 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_CLEAR_MASK, |
| 4481 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_SET_MASK, |
| 4482 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_TOGGLE_MASK, |
| 4483 | input_name, |
| 4484 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_NUM_FIELDS, |
| 4485 | input_access_methods, |
| 4486 | access_level, |
| 4487 | access_name, |
| 4488 | CSRT_OMNI |
| 4489 | ); |
| 4490 | fire_plc_tlu_ctb_tlr_csr_a_tlu_diag.init_field_info ( |
| 4491 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_IHI_TRG_FID, |
| 4492 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_IHI_TRG_FMASK, |
| 4493 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_IHI_TRG_POSITION, |
| 4494 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_IHI_TRG_FIELD_NAME |
| 4495 | ); |
| 4496 | fire_plc_tlu_ctb_tlr_csr_a_tlu_diag.init_field_info ( |
| 4497 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_EPP_DIS_FID, |
| 4498 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_EPP_DIS_FMASK, |
| 4499 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_EPP_DIS_POSITION, |
| 4500 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_EPP_DIS_FIELD_NAME |
| 4501 | ); |
| 4502 | fire_plc_tlu_ctb_tlr_csr_a_tlu_diag.init_field_info ( |
| 4503 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_EPI_PAR_FID, |
| 4504 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_EPI_PAR_FMASK, |
| 4505 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_EPI_PAR_POSITION, |
| 4506 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_EPI_PAR_FIELD_NAME |
| 4507 | ); |
| 4508 | fire_plc_tlu_ctb_tlr_csr_a_tlu_diag.init_field_info ( |
| 4509 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_ERBI_PAR_FID, |
| 4510 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_ERBI_PAR_FMASK, |
| 4511 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_ERBI_PAR_POSITION, |
| 4512 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_ERBI_PAR_FIELD_NAME |
| 4513 | ); |
| 4514 | fire_plc_tlu_ctb_tlr_csr_a_tlu_diag.init_field_info ( |
| 4515 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_EPI_TRG_FID, |
| 4516 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_EPI_TRG_FMASK, |
| 4517 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_EPI_TRG_POSITION, |
| 4518 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_EPI_TRG_FIELD_NAME |
| 4519 | ); |
| 4520 | fire_plc_tlu_ctb_tlr_csr_a_tlu_diag.init_field_info ( |
| 4521 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_IDI_PAR_FID, |
| 4522 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_IDI_PAR_FMASK, |
| 4523 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_IDI_PAR_POSITION, |
| 4524 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_IDI_PAR_FIELD_NAME |
| 4525 | ); |
| 4526 | fire_plc_tlu_ctb_tlr_csr_a_tlu_diag.init_field_info ( |
| 4527 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_ERBI_TRG_FID, |
| 4528 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_ERBI_TRG_FMASK, |
| 4529 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_ERBI_TRG_POSITION, |
| 4530 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_ERBI_TRG_FIELD_NAME |
| 4531 | ); |
| 4532 | fire_plc_tlu_ctb_tlr_csr_a_tlu_diag.init_field_info ( |
| 4533 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_IDI_TRG_FID, |
| 4534 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_IDI_TRG_FMASK, |
| 4535 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_IDI_TRG_POSITION, |
| 4536 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_IDI_TRG_FIELD_NAME |
| 4537 | ); |
| 4538 | fire_plc_tlu_ctb_tlr_csr_a_tlu_diag.init_field_info ( |
| 4539 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_CHK_DIS_FID, |
| 4540 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_CHK_DIS_FMASK, |
| 4541 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_CHK_DIS_POSITION, |
| 4542 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_CHK_DIS_FIELD_NAME |
| 4543 | ); |
| 4544 | fire_plc_tlu_ctb_tlr_csr_a_tlu_diag.init_field_info ( |
| 4545 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_MRC_TRG_FID, |
| 4546 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_MRC_TRG_FMASK, |
| 4547 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_MRC_TRG_POSITION, |
| 4548 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_MRC_TRG_FIELD_NAME |
| 4549 | ); |
| 4550 | fire_plc_tlu_ctb_tlr_csr_a_tlu_diag.init_field_info ( |
| 4551 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_IHI_PAR_FID, |
| 4552 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_IHI_PAR_FMASK, |
| 4553 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_IHI_PAR_POSITION, |
| 4554 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_IHI_PAR_FIELD_NAME |
| 4555 | ); |
| 4556 | fire_plc_tlu_ctb_tlr_csr_a_tlu_diag.init_field_info ( |
| 4557 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_IFC_DIS_FID, |
| 4558 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_IFC_DIS_FMASK, |
| 4559 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_IFC_DIS_POSITION, |
| 4560 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DIAG_IFC_DIS_FIELD_NAME |
| 4561 | ); |
| 4562 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_TIMER_NAME); |
| 4563 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 4564 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 4565 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 4566 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 4567 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 4568 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 4569 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 4570 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 4571 | access_name[CSRT_OMNI] = "OMNI"; |
| 4572 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 4573 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 4574 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 4575 | access_name[FIRE_JTAG] = "JTAG"; |
| 4576 | |
| 4577 | fire_plc_tlu_ctb_tlr_csr_a_symbol_timer = new( |
| 4578 | fire_plc_tlu_ctb_tlr_csr_a_symbol_timer_state, |
| 4579 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_TIMER_HW_ADDR, |
| 4580 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_TIMER_POR_VALUE, |
| 4581 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_TIMER_RMASK, |
| 4582 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_TIMER_READ_ONLY_MASK, |
| 4583 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_TIMER_WRITE_MASK, |
| 4584 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_TIMER_CLEAR_MASK, |
| 4585 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_TIMER_SET_MASK, |
| 4586 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_TIMER_TOGGLE_MASK, |
| 4587 | input_name, |
| 4588 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_TIMER_NUM_FIELDS, |
| 4589 | input_access_methods, |
| 4590 | access_level, |
| 4591 | access_name, |
| 4592 | CSRT_OMNI |
| 4593 | ); |
| 4594 | fire_plc_tlu_ctb_tlr_csr_a_symbol_timer.init_field_info ( |
| 4595 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_TIMER_SKIP_INTERVAL_FID, |
| 4596 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_TIMER_SKIP_INTERVAL_FMASK, |
| 4597 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_TIMER_SKIP_INTERVAL_POSITION, |
| 4598 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SYMBOL_TIMER_SKIP_INTERVAL_FIELD_NAME |
| 4599 | ); |
| 4600 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_NAME); |
| 4601 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 4602 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 4603 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 4604 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 4605 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 4606 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 4607 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 4608 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 4609 | access_name[CSRT_OMNI] = "OMNI"; |
| 4610 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 4611 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 4612 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 4613 | access_name[FIRE_JTAG] = "JTAG"; |
| 4614 | |
| 4615 | fire_plc_tlu_ctb_tlr_csr_a_link_ctl = new( |
| 4616 | fire_plc_tlu_ctb_tlr_csr_a_link_ctl_state, |
| 4617 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_HW_ADDR, |
| 4618 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_POR_VALUE, |
| 4619 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_RMASK, |
| 4620 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_READ_ONLY_MASK, |
| 4621 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_WRITE_MASK, |
| 4622 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_CLEAR_MASK, |
| 4623 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_SET_MASK, |
| 4624 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_TOGGLE_MASK, |
| 4625 | input_name, |
| 4626 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_NUM_FIELDS, |
| 4627 | input_access_methods, |
| 4628 | access_level, |
| 4629 | access_name, |
| 4630 | CSRT_OMNI |
| 4631 | ); |
| 4632 | fire_plc_tlu_ctb_tlr_csr_a_link_ctl.init_field_info ( |
| 4633 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_SCRAMBLE_DISABLE_FID, |
| 4634 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_SCRAMBLE_DISABLE_FMASK, |
| 4635 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_SCRAMBLE_DISABLE_POSITION, |
| 4636 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_SCRAMBLE_DISABLE_FIELD_NAME |
| 4637 | ); |
| 4638 | fire_plc_tlu_ctb_tlr_csr_a_link_ctl.init_field_info ( |
| 4639 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_ELASTICAL_BUFFER_DISABLE_FID, |
| 4640 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_ELASTICAL_BUFFER_DISABLE_FMASK, |
| 4641 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_ELASTICAL_BUFFER_DISABLE_POSITION, |
| 4642 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_ELASTICAL_BUFFER_DISABLE_FIELD_NAME |
| 4643 | ); |
| 4644 | fire_plc_tlu_ctb_tlr_csr_a_link_ctl.init_field_info ( |
| 4645 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_SPARE_FID, |
| 4646 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_SPARE_FMASK, |
| 4647 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_SPARE_POSITION, |
| 4648 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_SPARE_FIELD_NAME |
| 4649 | ); |
| 4650 | fire_plc_tlu_ctb_tlr_csr_a_link_ctl.init_field_info ( |
| 4651 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_LINK_CAPABLE_FID, |
| 4652 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_LINK_CAPABLE_FMASK, |
| 4653 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_LINK_CAPABLE_POSITION, |
| 4654 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_LINK_CAPABLE_FIELD_NAME |
| 4655 | ); |
| 4656 | fire_plc_tlu_ctb_tlr_csr_a_link_ctl.init_field_info ( |
| 4657 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_RESET_ASSERT_FID, |
| 4658 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_RESET_ASSERT_FMASK, |
| 4659 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_RESET_ASSERT_POSITION, |
| 4660 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_RESET_ASSERT_FIELD_NAME |
| 4661 | ); |
| 4662 | fire_plc_tlu_ctb_tlr_csr_a_link_ctl.init_field_info ( |
| 4663 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_FAST_LINK_MODE_FID, |
| 4664 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_FAST_LINK_MODE_FMASK, |
| 4665 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_FAST_LINK_MODE_POSITION, |
| 4666 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_FAST_LINK_MODE_FIELD_NAME |
| 4667 | ); |
| 4668 | fire_plc_tlu_ctb_tlr_csr_a_link_ctl.init_field_info ( |
| 4669 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_RX_HIGH_IMP_DIS_FID, |
| 4670 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_RX_HIGH_IMP_DIS_FMASK, |
| 4671 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_RX_HIGH_IMP_DIS_POSITION, |
| 4672 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_RX_HIGH_IMP_DIS_FIELD_NAME |
| 4673 | ); |
| 4674 | fire_plc_tlu_ctb_tlr_csr_a_link_ctl.init_field_info ( |
| 4675 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_LINK_NUM_FID, |
| 4676 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_LINK_NUM_FMASK, |
| 4677 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_LINK_NUM_POSITION, |
| 4678 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_LINK_NUM_FIELD_NAME |
| 4679 | ); |
| 4680 | fire_plc_tlu_ctb_tlr_csr_a_link_ctl.init_field_info ( |
| 4681 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_N_FTS_FID, |
| 4682 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_N_FTS_FMASK, |
| 4683 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_N_FTS_POSITION, |
| 4684 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LINK_CTL_N_FTS_FIELD_NAME |
| 4685 | ); |
| 4686 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_NAME); |
| 4687 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 4688 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 4689 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 4690 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 4691 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 4692 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 4693 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 4694 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 4695 | access_name[CSRT_OMNI] = "OMNI"; |
| 4696 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 4697 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 4698 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 4699 | access_name[FIRE_JTAG] = "JTAG"; |
| 4700 | |
| 4701 | fire_plc_tlu_ctb_tlr_csr_a_ce_err_rw1c_alias = new( |
| 4702 | fire_plc_tlu_ctb_tlr_csr_a_ce_err_rw1c_alias_state, |
| 4703 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_HW_ADDR, |
| 4704 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_POR_VALUE, |
| 4705 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_RMASK, |
| 4706 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_READ_ONLY_MASK, |
| 4707 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_WRITE_MASK, |
| 4708 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_CLEAR_MASK, |
| 4709 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_SET_MASK, |
| 4710 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_TOGGLE_MASK, |
| 4711 | input_name, |
| 4712 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_NUM_FIELDS, |
| 4713 | input_access_methods, |
| 4714 | access_level, |
| 4715 | access_name, |
| 4716 | CSRT_OMNI |
| 4717 | ); |
| 4718 | fire_plc_tlu_ctb_tlr_csr_a_ce_err_rw1c_alias.init_field_info ( |
| 4719 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_RTO_P_FID, |
| 4720 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_RTO_P_FMASK, |
| 4721 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_RTO_P_POSITION, |
| 4722 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_RTO_P_FIELD_NAME |
| 4723 | ); |
| 4724 | fire_plc_tlu_ctb_tlr_csr_a_ce_err_rw1c_alias.init_field_info ( |
| 4725 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_RE_S_FID, |
| 4726 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_RE_S_FMASK, |
| 4727 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_RE_S_POSITION, |
| 4728 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_RE_S_FIELD_NAME |
| 4729 | ); |
| 4730 | fire_plc_tlu_ctb_tlr_csr_a_ce_err_rw1c_alias.init_field_info ( |
| 4731 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_RNR_P_FID, |
| 4732 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_RNR_P_FMASK, |
| 4733 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_RNR_P_POSITION, |
| 4734 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_RNR_P_FIELD_NAME |
| 4735 | ); |
| 4736 | fire_plc_tlu_ctb_tlr_csr_a_ce_err_rw1c_alias.init_field_info ( |
| 4737 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_BTP_P_FID, |
| 4738 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_BTP_P_FMASK, |
| 4739 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_BTP_P_POSITION, |
| 4740 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_BTP_P_FIELD_NAME |
| 4741 | ); |
| 4742 | fire_plc_tlu_ctb_tlr_csr_a_ce_err_rw1c_alias.init_field_info ( |
| 4743 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_BDP_P_FID, |
| 4744 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_BDP_P_FMASK, |
| 4745 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_BDP_P_POSITION, |
| 4746 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_BDP_P_FIELD_NAME |
| 4747 | ); |
| 4748 | fire_plc_tlu_ctb_tlr_csr_a_ce_err_rw1c_alias.init_field_info ( |
| 4749 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_RTO_S_FID, |
| 4750 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_RTO_S_FMASK, |
| 4751 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_RTO_S_POSITION, |
| 4752 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_RTO_S_FIELD_NAME |
| 4753 | ); |
| 4754 | fire_plc_tlu_ctb_tlr_csr_a_ce_err_rw1c_alias.init_field_info ( |
| 4755 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_RNR_S_FID, |
| 4756 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_RNR_S_FMASK, |
| 4757 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_RNR_S_POSITION, |
| 4758 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_RNR_S_FIELD_NAME |
| 4759 | ); |
| 4760 | fire_plc_tlu_ctb_tlr_csr_a_ce_err_rw1c_alias.init_field_info ( |
| 4761 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_BTP_S_FID, |
| 4762 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_BTP_S_FMASK, |
| 4763 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_BTP_S_POSITION, |
| 4764 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_BTP_S_FIELD_NAME |
| 4765 | ); |
| 4766 | fire_plc_tlu_ctb_tlr_csr_a_ce_err_rw1c_alias.init_field_info ( |
| 4767 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_BDP_S_FID, |
| 4768 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_BDP_S_FMASK, |
| 4769 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_BDP_S_POSITION, |
| 4770 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_BDP_S_FIELD_NAME |
| 4771 | ); |
| 4772 | fire_plc_tlu_ctb_tlr_csr_a_ce_err_rw1c_alias.init_field_info ( |
| 4773 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_RE_P_FID, |
| 4774 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_RE_P_FMASK, |
| 4775 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_RE_P_POSITION, |
| 4776 | FIRE_PLC_TLU_CTB_TLR_CSR_A_CE_ERR_RW1C_ALIAS_RE_P_FIELD_NAME |
| 4777 | ); |
| 4778 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ERB_NAME); |
| 4779 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 4780 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 4781 | access_level[CSRT_OMNI] = CSRT_READ_ACCESS; |
| 4782 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 4783 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 4784 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 4785 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 4786 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 4787 | access_name[CSRT_OMNI] = "OMNI"; |
| 4788 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 4789 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 4790 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 4791 | access_name[FIRE_JTAG] = "JTAG"; |
| 4792 | |
| 4793 | fire_plc_tlu_ctb_tlr_csr_a_tlu_erb = new( |
| 4794 | fire_plc_tlu_ctb_tlr_csr_a_tlu_erb_state, |
| 4795 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ERB_HW_ADDR, |
| 4796 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ERB_POR_VALUE, |
| 4797 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ERB_RMASK, |
| 4798 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ERB_READ_ONLY_MASK, |
| 4799 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ERB_WRITE_MASK, |
| 4800 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ERB_CLEAR_MASK, |
| 4801 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ERB_SET_MASK, |
| 4802 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ERB_TOGGLE_MASK, |
| 4803 | input_name, |
| 4804 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ERB_NUM_FIELDS, |
| 4805 | input_access_methods, |
| 4806 | access_level, |
| 4807 | access_name, |
| 4808 | CSRT_DAEMON |
| 4809 | ); |
| 4810 | fire_plc_tlu_ctb_tlr_csr_a_tlu_erb.init_field_info ( |
| 4811 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ERB_CC_FID, |
| 4812 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ERB_CC_FMASK, |
| 4813 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ERB_CC_POSITION, |
| 4814 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ERB_CC_FIELD_NAME |
| 4815 | ); |
| 4816 | fire_plc_tlu_ctb_tlr_csr_a_tlu_erb.init_field_info ( |
| 4817 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ERB_CL_FID, |
| 4818 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ERB_CL_FMASK, |
| 4819 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ERB_CL_POSITION, |
| 4820 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ERB_CL_FIELD_NAME |
| 4821 | ); |
| 4822 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_NAME); |
| 4823 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 4824 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 4825 | access_level[CSRT_OMNI] = CSRT_READ_ACCESS; |
| 4826 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 4827 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 4828 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 4829 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 4830 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 4831 | access_name[CSRT_OMNI] = "OMNI"; |
| 4832 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 4833 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 4834 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 4835 | access_name[FIRE_JTAG] = "JTAG"; |
| 4836 | |
| 4837 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ecc = new( |
| 4838 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ecc_state, |
| 4839 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_HW_ADDR, |
| 4840 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_POR_VALUE, |
| 4841 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_RMASK, |
| 4842 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_READ_ONLY_MASK, |
| 4843 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_WRITE_MASK, |
| 4844 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_CLEAR_MASK, |
| 4845 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_SET_MASK, |
| 4846 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_TOGGLE_MASK, |
| 4847 | input_name, |
| 4848 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_NUM_FIELDS, |
| 4849 | input_access_methods, |
| 4850 | access_level, |
| 4851 | access_name, |
| 4852 | CSRT_DAEMON |
| 4853 | ); |
| 4854 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ecc.init_field_info ( |
| 4855 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_PHI_FID, |
| 4856 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_PHI_FMASK, |
| 4857 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_PHI_POSITION, |
| 4858 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_PHI_FIELD_NAME |
| 4859 | ); |
| 4860 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ecc.init_field_info ( |
| 4861 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_CHI_FID, |
| 4862 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_CHI_FMASK, |
| 4863 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_CHI_POSITION, |
| 4864 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_CHI_FIELD_NAME |
| 4865 | ); |
| 4866 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ecc.init_field_info ( |
| 4867 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_PDC_FID, |
| 4868 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_PDC_FMASK, |
| 4869 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_PDC_POSITION, |
| 4870 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_PDC_FIELD_NAME |
| 4871 | ); |
| 4872 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ecc.init_field_info ( |
| 4873 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_PHC_FID, |
| 4874 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_PHC_FMASK, |
| 4875 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_PHC_POSITION, |
| 4876 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_PHC_FIELD_NAME |
| 4877 | ); |
| 4878 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ecc.init_field_info ( |
| 4879 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_NHI_FID, |
| 4880 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_NHI_FMASK, |
| 4881 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_NHI_POSITION, |
| 4882 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_NHI_FIELD_NAME |
| 4883 | ); |
| 4884 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ecc.init_field_info ( |
| 4885 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_CDC_FID, |
| 4886 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_CDC_FMASK, |
| 4887 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_CDC_POSITION, |
| 4888 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_CDC_FIELD_NAME |
| 4889 | ); |
| 4890 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ecc.init_field_info ( |
| 4891 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_CHC_FID, |
| 4892 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_CHC_FMASK, |
| 4893 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_CHC_POSITION, |
| 4894 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_CHC_FIELD_NAME |
| 4895 | ); |
| 4896 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ecc.init_field_info ( |
| 4897 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_NDC_FID, |
| 4898 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_NDC_FMASK, |
| 4899 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_NDC_POSITION, |
| 4900 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_NDC_FIELD_NAME |
| 4901 | ); |
| 4902 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ecc.init_field_info ( |
| 4903 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_NHC_FID, |
| 4904 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_NHC_FMASK, |
| 4905 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_NHC_POSITION, |
| 4906 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECC_NHC_FIELD_NAME |
| 4907 | ); |
| 4908 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_LOG_NAME); |
| 4909 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 4910 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 4911 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 4912 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 4913 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 4914 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 4915 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 4916 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 4917 | access_name[CSRT_OMNI] = "OMNI"; |
| 4918 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 4919 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 4920 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 4921 | access_name[FIRE_JTAG] = "JTAG"; |
| 4922 | |
| 4923 | fire_plc_tlu_ctb_tlr_csr_a_ue_log = new( |
| 4924 | fire_plc_tlu_ctb_tlr_csr_a_ue_log_state, |
| 4925 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_LOG_HW_ADDR, |
| 4926 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_LOG_POR_VALUE, |
| 4927 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_LOG_RMASK, |
| 4928 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_LOG_READ_ONLY_MASK, |
| 4929 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_LOG_WRITE_MASK, |
| 4930 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_LOG_CLEAR_MASK, |
| 4931 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_LOG_SET_MASK, |
| 4932 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_LOG_TOGGLE_MASK, |
| 4933 | input_name, |
| 4934 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_LOG_NUM_FIELDS, |
| 4935 | input_access_methods, |
| 4936 | access_level, |
| 4937 | access_name, |
| 4938 | CSRT_OMNI |
| 4939 | ); |
| 4940 | fire_plc_tlu_ctb_tlr_csr_a_ue_log.init_field_info ( |
| 4941 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_LOG_EN_FID, |
| 4942 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_LOG_EN_FMASK, |
| 4943 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_LOG_EN_POSITION, |
| 4944 | FIRE_PLC_TLU_CTB_TLR_CSR_A_UE_LOG_EN_FIELD_NAME |
| 4945 | ); |
| 4946 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_CTL_NAME); |
| 4947 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 4948 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 4949 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 4950 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 4951 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 4952 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 4953 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 4954 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 4955 | access_name[CSRT_OMNI] = "OMNI"; |
| 4956 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 4957 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 4958 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 4959 | access_name[FIRE_JTAG] = "JTAG"; |
| 4960 | |
| 4961 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ctl = new( |
| 4962 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ctl_state, |
| 4963 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_CTL_HW_ADDR, |
| 4964 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_CTL_POR_VALUE, |
| 4965 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_CTL_RMASK, |
| 4966 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_CTL_READ_ONLY_MASK, |
| 4967 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_CTL_WRITE_MASK, |
| 4968 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_CTL_CLEAR_MASK, |
| 4969 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_CTL_SET_MASK, |
| 4970 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_CTL_TOGGLE_MASK, |
| 4971 | input_name, |
| 4972 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_CTL_NUM_FIELDS, |
| 4973 | input_access_methods, |
| 4974 | access_level, |
| 4975 | access_name, |
| 4976 | CSRT_OMNI |
| 4977 | ); |
| 4978 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ctl.init_field_info ( |
| 4979 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_CTL_L0S_TIM_FID, |
| 4980 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_CTL_L0S_TIM_FMASK, |
| 4981 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_CTL_L0S_TIM_POSITION, |
| 4982 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_CTL_L0S_TIM_FIELD_NAME |
| 4983 | ); |
| 4984 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ctl.init_field_info ( |
| 4985 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_CTL_NPWR_EN_FID, |
| 4986 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_CTL_NPWR_EN_FMASK, |
| 4987 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_CTL_NPWR_EN_POSITION, |
| 4988 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_CTL_NPWR_EN_FIELD_NAME |
| 4989 | ); |
| 4990 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ctl.init_field_info ( |
| 4991 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_CTL_CTO_SEL_FID, |
| 4992 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_CTL_CTO_SEL_FMASK, |
| 4993 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_CTL_CTO_SEL_POSITION, |
| 4994 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_CTL_CTO_SEL_FIELD_NAME |
| 4995 | ); |
| 4996 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ctl.init_field_info ( |
| 4997 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_CTL_CONFIG_FID, |
| 4998 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_CTL_CONFIG_FMASK, |
| 4999 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_CTL_CONFIG_POSITION, |
| 5000 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_CTL_CONFIG_FIELD_NAME |
| 5001 | ); |
| 5002 | sprintf(base_csr_name,"%s", FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_NAME); |
| 5003 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 5004 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 5005 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 5006 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 5007 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 5008 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 5009 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 5010 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 5011 | access_name[CSRT_OMNI] = "OMNI"; |
| 5012 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 5013 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 5014 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 5015 | access_name[FIRE_JTAG] = "JTAG"; |
| 5016 | |
| 5017 | fire_dlc_ilu_cib_csr_a_ilu_log_err_rw1c_alias = new( |
| 5018 | fire_dlc_ilu_cib_csr_a_ilu_log_err_rw1c_alias_state, |
| 5019 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_HW_ADDR, |
| 5020 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_POR_VALUE, |
| 5021 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_RMASK, |
| 5022 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_READ_ONLY_MASK, |
| 5023 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_WRITE_MASK, |
| 5024 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_CLEAR_MASK, |
| 5025 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_SET_MASK, |
| 5026 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_TOGGLE_MASK, |
| 5027 | input_name, |
| 5028 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_NUM_FIELDS, |
| 5029 | input_access_methods, |
| 5030 | access_level, |
| 5031 | access_name, |
| 5032 | CSRT_OMNI |
| 5033 | ); |
| 5034 | fire_dlc_ilu_cib_csr_a_ilu_log_err_rw1c_alias.init_field_info ( |
| 5035 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_SPARE3_S_FID, |
| 5036 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_SPARE3_S_FMASK, |
| 5037 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_SPARE3_S_POSITION, |
| 5038 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_SPARE3_S_FIELD_NAME |
| 5039 | ); |
| 5040 | fire_dlc_ilu_cib_csr_a_ilu_log_err_rw1c_alias.init_field_info ( |
| 5041 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_SPARE2_P_FID, |
| 5042 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_SPARE2_P_FMASK, |
| 5043 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_SPARE2_P_POSITION, |
| 5044 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_SPARE2_P_FIELD_NAME |
| 5045 | ); |
| 5046 | fire_dlc_ilu_cib_csr_a_ilu_log_err_rw1c_alias.init_field_info ( |
| 5047 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_IHB_PE_S_FID, |
| 5048 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_IHB_PE_S_FMASK, |
| 5049 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_IHB_PE_S_POSITION, |
| 5050 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_IHB_PE_S_FIELD_NAME |
| 5051 | ); |
| 5052 | fire_dlc_ilu_cib_csr_a_ilu_log_err_rw1c_alias.init_field_info ( |
| 5053 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_SPARE1_S_FID, |
| 5054 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_SPARE1_S_FMASK, |
| 5055 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_SPARE1_S_POSITION, |
| 5056 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_SPARE1_S_FIELD_NAME |
| 5057 | ); |
| 5058 | fire_dlc_ilu_cib_csr_a_ilu_log_err_rw1c_alias.init_field_info ( |
| 5059 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_SPARE3_P_FID, |
| 5060 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_SPARE3_P_FMASK, |
| 5061 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_SPARE3_P_POSITION, |
| 5062 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_SPARE3_P_FIELD_NAME |
| 5063 | ); |
| 5064 | fire_dlc_ilu_cib_csr_a_ilu_log_err_rw1c_alias.init_field_info ( |
| 5065 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_SPARE2_S_FID, |
| 5066 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_SPARE2_S_FMASK, |
| 5067 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_SPARE2_S_POSITION, |
| 5068 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_SPARE2_S_FIELD_NAME |
| 5069 | ); |
| 5070 | fire_dlc_ilu_cib_csr_a_ilu_log_err_rw1c_alias.init_field_info ( |
| 5071 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_IHB_PE_P_FID, |
| 5072 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_IHB_PE_P_FMASK, |
| 5073 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_IHB_PE_P_POSITION, |
| 5074 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_IHB_PE_P_FIELD_NAME |
| 5075 | ); |
| 5076 | fire_dlc_ilu_cib_csr_a_ilu_log_err_rw1c_alias.init_field_info ( |
| 5077 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_SPARE1_P_FID, |
| 5078 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_SPARE1_P_FMASK, |
| 5079 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_SPARE1_P_POSITION, |
| 5080 | FIRE_DLC_ILU_CIB_CSR_A_ILU_LOG_ERR_RW1C_ALIAS_SPARE1_P_FIELD_NAME |
| 5081 | ); |
| 5082 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_NAME); |
| 5083 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 5084 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 5085 | access_level[CSRT_OMNI] = CSRT_READ_ACCESS; |
| 5086 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 5087 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 5088 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 5089 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 5090 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 5091 | access_name[CSRT_OMNI] = "OMNI"; |
| 5092 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 5093 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 5094 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 5095 | access_name[FIRE_JTAG] = "JTAG"; |
| 5096 | |
| 5097 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ecl = new( |
| 5098 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ecl_state, |
| 5099 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_HW_ADDR, |
| 5100 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_POR_VALUE, |
| 5101 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_RMASK, |
| 5102 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_READ_ONLY_MASK, |
| 5103 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_WRITE_MASK, |
| 5104 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_CLEAR_MASK, |
| 5105 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_SET_MASK, |
| 5106 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_TOGGLE_MASK, |
| 5107 | input_name, |
| 5108 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_NUM_FIELDS, |
| 5109 | input_access_methods, |
| 5110 | access_level, |
| 5111 | access_name, |
| 5112 | CSRT_DAEMON |
| 5113 | ); |
| 5114 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ecl.init_field_info ( |
| 5115 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_CDI_FID, |
| 5116 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_CDI_FMASK, |
| 5117 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_CDI_POSITION, |
| 5118 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_CDI_FIELD_NAME |
| 5119 | ); |
| 5120 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ecl.init_field_info ( |
| 5121 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_PDC_FID, |
| 5122 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_PDC_FMASK, |
| 5123 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_PDC_POSITION, |
| 5124 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_PDC_FIELD_NAME |
| 5125 | ); |
| 5126 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ecl.init_field_info ( |
| 5127 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_PHC_FID, |
| 5128 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_PHC_FMASK, |
| 5129 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_PHC_POSITION, |
| 5130 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_PHC_FIELD_NAME |
| 5131 | ); |
| 5132 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ecl.init_field_info ( |
| 5133 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_NDI_FID, |
| 5134 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_NDI_FMASK, |
| 5135 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_NDI_POSITION, |
| 5136 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_NDI_FIELD_NAME |
| 5137 | ); |
| 5138 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ecl.init_field_info ( |
| 5139 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_CDC_FID, |
| 5140 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_CDC_FMASK, |
| 5141 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_CDC_POSITION, |
| 5142 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_CDC_FIELD_NAME |
| 5143 | ); |
| 5144 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ecl.init_field_info ( |
| 5145 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_CHC_FID, |
| 5146 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_CHC_FMASK, |
| 5147 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_CHC_POSITION, |
| 5148 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_CHC_FIELD_NAME |
| 5149 | ); |
| 5150 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ecl.init_field_info ( |
| 5151 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_NDC_FID, |
| 5152 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_NDC_FMASK, |
| 5153 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_NDC_POSITION, |
| 5154 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_NDC_FIELD_NAME |
| 5155 | ); |
| 5156 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ecl.init_field_info ( |
| 5157 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_NHC_FID, |
| 5158 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_NHC_FMASK, |
| 5159 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_NHC_POSITION, |
| 5160 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_NHC_FIELD_NAME |
| 5161 | ); |
| 5162 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ecl.init_field_info ( |
| 5163 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_PDI_FID, |
| 5164 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_PDI_FMASK, |
| 5165 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_PDI_POSITION, |
| 5166 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ECL_PDI_FIELD_NAME |
| 5167 | ); |
| 5168 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICA_NAME); |
| 5169 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 5170 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 5171 | access_level[CSRT_OMNI] = CSRT_READ_ACCESS; |
| 5172 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 5173 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 5174 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 5175 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 5176 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 5177 | access_name[CSRT_OMNI] = "OMNI"; |
| 5178 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 5179 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 5180 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 5181 | access_name[FIRE_JTAG] = "JTAG"; |
| 5182 | |
| 5183 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ica = new( |
| 5184 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ica_state, |
| 5185 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICA_HW_ADDR, |
| 5186 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICA_POR_VALUE, |
| 5187 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICA_RMASK, |
| 5188 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICA_READ_ONLY_MASK, |
| 5189 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICA_WRITE_MASK, |
| 5190 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICA_CLEAR_MASK, |
| 5191 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICA_SET_MASK, |
| 5192 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICA_TOGGLE_MASK, |
| 5193 | input_name, |
| 5194 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICA_NUM_FIELDS, |
| 5195 | input_access_methods, |
| 5196 | access_level, |
| 5197 | access_name, |
| 5198 | CSRT_DAEMON |
| 5199 | ); |
| 5200 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ica.init_field_info ( |
| 5201 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICA_PDC_FID, |
| 5202 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICA_PDC_FMASK, |
| 5203 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICA_PDC_POSITION, |
| 5204 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICA_PDC_FIELD_NAME |
| 5205 | ); |
| 5206 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ica.init_field_info ( |
| 5207 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICA_PHC_FID, |
| 5208 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICA_PHC_FMASK, |
| 5209 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICA_PHC_POSITION, |
| 5210 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICA_PHC_FIELD_NAME |
| 5211 | ); |
| 5212 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ica.init_field_info ( |
| 5213 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICA_CDC_FID, |
| 5214 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICA_CDC_FMASK, |
| 5215 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICA_CDC_POSITION, |
| 5216 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICA_CDC_FIELD_NAME |
| 5217 | ); |
| 5218 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ica.init_field_info ( |
| 5219 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICA_CHC_FID, |
| 5220 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICA_CHC_FMASK, |
| 5221 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICA_CHC_POSITION, |
| 5222 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICA_CHC_FIELD_NAME |
| 5223 | ); |
| 5224 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ica.init_field_info ( |
| 5225 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICA_NDC_FID, |
| 5226 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICA_NDC_FMASK, |
| 5227 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICA_NDC_POSITION, |
| 5228 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICA_NDC_FIELD_NAME |
| 5229 | ); |
| 5230 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ica.init_field_info ( |
| 5231 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICA_NHC_FID, |
| 5232 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICA_NHC_FMASK, |
| 5233 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICA_NHC_POSITION, |
| 5234 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_ICA_NHC_FIELD_NAME |
| 5235 | ); |
| 5236 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CAP_NAME); |
| 5237 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 5238 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 5239 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 5240 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 5241 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 5242 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 5243 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 5244 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 5245 | access_name[CSRT_OMNI] = "OMNI"; |
| 5246 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 5247 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 5248 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 5249 | access_name[FIRE_JTAG] = "JTAG"; |
| 5250 | |
| 5251 | fire_plc_tlu_ctb_tlr_csr_a_dev_cap = new( |
| 5252 | fire_plc_tlu_ctb_tlr_csr_a_dev_cap_state, |
| 5253 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CAP_HW_ADDR, |
| 5254 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CAP_POR_VALUE, |
| 5255 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CAP_RMASK, |
| 5256 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CAP_READ_ONLY_MASK, |
| 5257 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CAP_WRITE_MASK, |
| 5258 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CAP_CLEAR_MASK, |
| 5259 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CAP_SET_MASK, |
| 5260 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CAP_TOGGLE_MASK, |
| 5261 | input_name, |
| 5262 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CAP_NUM_FIELDS, |
| 5263 | input_access_methods, |
| 5264 | access_level, |
| 5265 | access_name, |
| 5266 | CSRT_OMNI |
| 5267 | ); |
| 5268 | fire_plc_tlu_ctb_tlr_csr_a_dev_cap.init_field_info ( |
| 5269 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CAP_MPS_FID, |
| 5270 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CAP_MPS_FMASK, |
| 5271 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CAP_MPS_POSITION, |
| 5272 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CAP_MPS_FIELD_NAME |
| 5273 | ); |
| 5274 | fire_plc_tlu_ctb_tlr_csr_a_dev_cap.init_field_info ( |
| 5275 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CAP_L1_FID, |
| 5276 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CAP_L1_FMASK, |
| 5277 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CAP_L1_POSITION, |
| 5278 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CAP_L1_FIELD_NAME |
| 5279 | ); |
| 5280 | fire_plc_tlu_ctb_tlr_csr_a_dev_cap.init_field_info ( |
| 5281 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CAP_L0S_FID, |
| 5282 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CAP_L0S_FMASK, |
| 5283 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CAP_L0S_POSITION, |
| 5284 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CAP_L0S_FIELD_NAME |
| 5285 | ); |
| 5286 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_A_NAME); |
| 5287 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 5288 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 5289 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 5290 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 5291 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 5292 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 5293 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 5294 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 5295 | access_name[CSRT_OMNI] = "OMNI"; |
| 5296 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 5297 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 5298 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 5299 | access_name[FIRE_JTAG] = "JTAG"; |
| 5300 | |
| 5301 | fire_plc_tlu_ctb_tlr_csr_a_tlu_dbg_sel_a = new( |
| 5302 | fire_plc_tlu_ctb_tlr_csr_a_tlu_dbg_sel_a_state, |
| 5303 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_A_HW_ADDR, |
| 5304 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_A_POR_VALUE, |
| 5305 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_A_RMASK, |
| 5306 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_A_READ_ONLY_MASK, |
| 5307 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_A_WRITE_MASK, |
| 5308 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_A_CLEAR_MASK, |
| 5309 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_A_SET_MASK, |
| 5310 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_A_TOGGLE_MASK, |
| 5311 | input_name, |
| 5312 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_A_NUM_FIELDS, |
| 5313 | input_access_methods, |
| 5314 | access_level, |
| 5315 | access_name, |
| 5316 | CSRT_OMNI |
| 5317 | ); |
| 5318 | fire_plc_tlu_ctb_tlr_csr_a_tlu_dbg_sel_a.init_field_info ( |
| 5319 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_A_SIGNAL_FID, |
| 5320 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_A_SIGNAL_FMASK, |
| 5321 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_A_SIGNAL_POSITION, |
| 5322 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_A_SIGNAL_FIELD_NAME |
| 5323 | ); |
| 5324 | fire_plc_tlu_ctb_tlr_csr_a_tlu_dbg_sel_a.init_field_info ( |
| 5325 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_A_MODULE_FID, |
| 5326 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_A_MODULE_FMASK, |
| 5327 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_A_MODULE_POSITION, |
| 5328 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_A_MODULE_FIELD_NAME |
| 5329 | ); |
| 5330 | fire_plc_tlu_ctb_tlr_csr_a_tlu_dbg_sel_a.init_field_info ( |
| 5331 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_A_BLOCK_FID, |
| 5332 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_A_BLOCK_FMASK, |
| 5333 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_A_BLOCK_POSITION, |
| 5334 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_A_BLOCK_FIELD_NAME |
| 5335 | ); |
| 5336 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_B_NAME); |
| 5337 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 5338 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 5339 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 5340 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 5341 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 5342 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 5343 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 5344 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 5345 | access_name[CSRT_OMNI] = "OMNI"; |
| 5346 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 5347 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 5348 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 5349 | access_name[FIRE_JTAG] = "JTAG"; |
| 5350 | |
| 5351 | fire_plc_tlu_ctb_tlr_csr_a_tlu_dbg_sel_b = new( |
| 5352 | fire_plc_tlu_ctb_tlr_csr_a_tlu_dbg_sel_b_state, |
| 5353 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_B_HW_ADDR, |
| 5354 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_B_POR_VALUE, |
| 5355 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_B_RMASK, |
| 5356 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_B_READ_ONLY_MASK, |
| 5357 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_B_WRITE_MASK, |
| 5358 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_B_CLEAR_MASK, |
| 5359 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_B_SET_MASK, |
| 5360 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_B_TOGGLE_MASK, |
| 5361 | input_name, |
| 5362 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_B_NUM_FIELDS, |
| 5363 | input_access_methods, |
| 5364 | access_level, |
| 5365 | access_name, |
| 5366 | CSRT_OMNI |
| 5367 | ); |
| 5368 | fire_plc_tlu_ctb_tlr_csr_a_tlu_dbg_sel_b.init_field_info ( |
| 5369 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_B_SIGNAL_FID, |
| 5370 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_B_SIGNAL_FMASK, |
| 5371 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_B_SIGNAL_POSITION, |
| 5372 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_B_SIGNAL_FIELD_NAME |
| 5373 | ); |
| 5374 | fire_plc_tlu_ctb_tlr_csr_a_tlu_dbg_sel_b.init_field_info ( |
| 5375 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_B_MODULE_FID, |
| 5376 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_B_MODULE_FMASK, |
| 5377 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_B_MODULE_POSITION, |
| 5378 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_B_MODULE_FIELD_NAME |
| 5379 | ); |
| 5380 | fire_plc_tlu_ctb_tlr_csr_a_tlu_dbg_sel_b.init_field_info ( |
| 5381 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_B_BLOCK_FID, |
| 5382 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_B_BLOCK_FMASK, |
| 5383 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_B_BLOCK_POSITION, |
| 5384 | FIRE_PLC_TLU_CTB_TLR_CSR_A_TLU_DBG_SEL_B_BLOCK_FIELD_NAME |
| 5385 | ); |
| 5386 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_1_NAME); |
| 5387 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 5388 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 5389 | access_level[CSRT_OMNI] = CSRT_READ_ACCESS; |
| 5390 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 5391 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 5392 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 5393 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 5394 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 5395 | access_name[CSRT_OMNI] = "OMNI"; |
| 5396 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 5397 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 5398 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 5399 | access_name[FIRE_JTAG] = "JTAG"; |
| 5400 | |
| 5401 | fire_plc_tlu_ctb_tlr_csr_a_lnk_bit_err_cnt_1 = new( |
| 5402 | fire_plc_tlu_ctb_tlr_csr_a_lnk_bit_err_cnt_1_state, |
| 5403 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_1_HW_ADDR, |
| 5404 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_1_POR_VALUE, |
| 5405 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_1_RMASK, |
| 5406 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_1_READ_ONLY_MASK, |
| 5407 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_1_WRITE_MASK, |
| 5408 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_1_CLEAR_MASK, |
| 5409 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_1_SET_MASK, |
| 5410 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_1_TOGGLE_MASK, |
| 5411 | input_name, |
| 5412 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_1_NUM_FIELDS, |
| 5413 | input_access_methods, |
| 5414 | access_level, |
| 5415 | access_name, |
| 5416 | CSRT_DAEMON |
| 5417 | ); |
| 5418 | fire_plc_tlu_ctb_tlr_csr_a_lnk_bit_err_cnt_1.init_field_info ( |
| 5419 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_1_BER_COUNT_EN_FID, |
| 5420 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_1_BER_COUNT_EN_FMASK, |
| 5421 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_1_BER_COUNT_EN_POSITION, |
| 5422 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_1_BER_COUNT_EN_FIELD_NAME |
| 5423 | ); |
| 5424 | fire_plc_tlu_ctb_tlr_csr_a_lnk_bit_err_cnt_1.init_field_info ( |
| 5425 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_1_CNT_PRE_FID, |
| 5426 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_1_CNT_PRE_FMASK, |
| 5427 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_1_CNT_PRE_POSITION, |
| 5428 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_1_CNT_PRE_FIELD_NAME |
| 5429 | ); |
| 5430 | fire_plc_tlu_ctb_tlr_csr_a_lnk_bit_err_cnt_1.init_field_info ( |
| 5431 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_1_CNT_BAD_TLP_FID, |
| 5432 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_1_CNT_BAD_TLP_FMASK, |
| 5433 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_1_CNT_BAD_TLP_POSITION, |
| 5434 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_1_CNT_BAD_TLP_FIELD_NAME |
| 5435 | ); |
| 5436 | fire_plc_tlu_ctb_tlr_csr_a_lnk_bit_err_cnt_1.init_field_info ( |
| 5437 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_1_CNT_BAD_DLLP_FID, |
| 5438 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_1_CNT_BAD_DLLP_FMASK, |
| 5439 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_1_CNT_BAD_DLLP_POSITION, |
| 5440 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_1_CNT_BAD_DLLP_FIELD_NAME |
| 5441 | ); |
| 5442 | fire_plc_tlu_ctb_tlr_csr_a_lnk_bit_err_cnt_1.init_field_info ( |
| 5443 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_1_BER_COUNT_CLR_FID, |
| 5444 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_1_BER_COUNT_CLR_FMASK, |
| 5445 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_1_BER_COUNT_CLR_POSITION, |
| 5446 | FIRE_PLC_TLU_CTB_TLR_CSR_A_LNK_BIT_ERR_CNT_1_BER_COUNT_CLR_FIELD_NAME |
| 5447 | ); |
| 5448 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CTL_NAME); |
| 5449 | sprintf(input_name,"%s_%0d",base_csr_name,0); |
| 5450 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 5451 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 5452 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 5453 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 5454 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 5455 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 5456 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 5457 | access_name[CSRT_OMNI] = "OMNI"; |
| 5458 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 5459 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 5460 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 5461 | access_name[FIRE_JTAG] = "JTAG"; |
| 5462 | |
| 5463 | fire_plc_tlu_ctb_tlr_csr_a_dev_ctl = new( |
| 5464 | fire_plc_tlu_ctb_tlr_csr_a_dev_ctl_state, |
| 5465 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CTL_HW_ADDR, |
| 5466 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CTL_POR_VALUE, |
| 5467 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CTL_RMASK, |
| 5468 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CTL_READ_ONLY_MASK, |
| 5469 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CTL_WRITE_MASK, |
| 5470 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CTL_CLEAR_MASK, |
| 5471 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CTL_SET_MASK, |
| 5472 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CTL_TOGGLE_MASK, |
| 5473 | input_name, |
| 5474 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CTL_NUM_FIELDS, |
| 5475 | input_access_methods, |
| 5476 | access_level, |
| 5477 | access_name, |
| 5478 | CSRT_OMNI |
| 5479 | ); |
| 5480 | fire_plc_tlu_ctb_tlr_csr_a_dev_ctl.init_field_info ( |
| 5481 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CTL_MPS_FID, |
| 5482 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CTL_MPS_FMASK, |
| 5483 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CTL_MPS_POSITION, |
| 5484 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CTL_MPS_FIELD_NAME |
| 5485 | ); |
| 5486 | fire_plc_tlu_ctb_tlr_csr_a_dev_ctl.init_field_info ( |
| 5487 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CTL_MRRS_FID, |
| 5488 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CTL_MRRS_FMASK, |
| 5489 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CTL_MRRS_POSITION, |
| 5490 | FIRE_PLC_TLU_CTB_TLR_CSR_A_DEV_CTL_MRRS_FIELD_NAME |
| 5491 | ); |
| 5492 | |
| 5493 | //////////////////////// Multi-Entry CSRs ////////////////////////////// |
| 5494 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 5495 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 5496 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 5497 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 5498 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 5499 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 5500 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 5501 | access_name[CSRT_OMNI] = "OMNI"; |
| 5502 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 5503 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 5504 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 5505 | access_name[FIRE_JTAG] = "JTAG"; |
| 5506 | |
| 5507 | for (offset = 0; offset < FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_DEPTH; ++offset) { |
| 5508 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_NAME); |
| 5509 | sprintf(input_name,"%s_%0d",base_csr_name,offset); |
| 5510 | fire_plc_tlu_ctb_tlr_csr_a_serdes_xmitter_lane_ctl[offset] = new( |
| 5511 | fire_plc_tlu_ctb_tlr_csr_a_serdes_xmitter_lane_ctl_state[offset], |
| 5512 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_HW_ADDR + offset, |
| 5513 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_POR_VALUE, |
| 5514 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_RMASK, |
| 5515 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_READ_ONLY_MASK, |
| 5516 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_WRITE_MASK, |
| 5517 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_CLEAR_MASK, |
| 5518 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_SET_MASK, |
| 5519 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_TOGGLE_MASK, |
| 5520 | input_name, |
| 5521 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_NUM_FIELDS, |
| 5522 | input_access_methods, |
| 5523 | access_level, |
| 5524 | access_name, |
| 5525 | CSRT_OMNI |
| 5526 | ); |
| 5527 | fire_plc_tlu_ctb_tlr_csr_a_serdes_xmitter_lane_ctl[offset].init_field_info ( |
| 5528 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_INVPAIR_FID, |
| 5529 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_INVPAIR_FMASK, |
| 5530 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_INVPAIR_POSITION, |
| 5531 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_INVPAIR_FIELD_NAME |
| 5532 | ); |
| 5533 | fire_plc_tlu_ctb_tlr_csr_a_serdes_xmitter_lane_ctl[offset].init_field_info ( |
| 5534 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_DE_FID, |
| 5535 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_DE_FMASK, |
| 5536 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_DE_POSITION, |
| 5537 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_DE_FIELD_NAME |
| 5538 | ); |
| 5539 | fire_plc_tlu_ctb_tlr_csr_a_serdes_xmitter_lane_ctl[offset].init_field_info ( |
| 5540 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_ENTEST_FID, |
| 5541 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_ENTEST_FMASK, |
| 5542 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_ENTEST_POSITION, |
| 5543 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_ENTEST_FIELD_NAME |
| 5544 | ); |
| 5545 | fire_plc_tlu_ctb_tlr_csr_a_serdes_xmitter_lane_ctl[offset].init_field_info ( |
| 5546 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_SWING_FID, |
| 5547 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_SWING_FMASK, |
| 5548 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_SWING_POSITION, |
| 5549 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_SWING_FIELD_NAME |
| 5550 | ); |
| 5551 | fire_plc_tlu_ctb_tlr_csr_a_serdes_xmitter_lane_ctl[offset].init_field_info ( |
| 5552 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_SPARE_FID, |
| 5553 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_SPARE_FMASK, |
| 5554 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_SPARE_POSITION, |
| 5555 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_SPARE_FIELD_NAME |
| 5556 | ); |
| 5557 | fire_plc_tlu_ctb_tlr_csr_a_serdes_xmitter_lane_ctl[offset].init_field_info ( |
| 5558 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_CM_FID, |
| 5559 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_CM_FMASK, |
| 5560 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_CM_POSITION, |
| 5561 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_CM_FIELD_NAME |
| 5562 | ); |
| 5563 | } |
| 5564 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 5565 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 5566 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 5567 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 5568 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 5569 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 5570 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 5571 | access_name[CSRT_OMNI] = "OMNI"; |
| 5572 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 5573 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 5574 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 5575 | access_name[FIRE_JTAG] = "JTAG"; |
| 5576 | |
| 5577 | for (offset = 0; offset < FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_STATUS_DEPTH; ++offset) { |
| 5578 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_STATUS_NAME); |
| 5579 | sprintf(input_name,"%s_%0d",base_csr_name,offset); |
| 5580 | fire_plc_tlu_ctb_tlr_csr_a_serdes_receiver_lane_status[offset] = new( |
| 5581 | fire_plc_tlu_ctb_tlr_csr_a_serdes_receiver_lane_status_state[offset], |
| 5582 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_STATUS_HW_ADDR + offset, |
| 5583 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_STATUS_POR_VALUE, |
| 5584 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_STATUS_RMASK, |
| 5585 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_STATUS_READ_ONLY_MASK, |
| 5586 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_STATUS_WRITE_MASK, |
| 5587 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_STATUS_CLEAR_MASK, |
| 5588 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_STATUS_SET_MASK, |
| 5589 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_STATUS_TOGGLE_MASK, |
| 5590 | input_name, |
| 5591 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_STATUS_NUM_FIELDS, |
| 5592 | input_access_methods, |
| 5593 | access_level, |
| 5594 | access_name, |
| 5595 | CSRT_OMNI |
| 5596 | ); |
| 5597 | fire_plc_tlu_ctb_tlr_csr_a_serdes_receiver_lane_status[offset].init_field_info ( |
| 5598 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_STATUS_LOSDTCT_FID, |
| 5599 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_STATUS_LOSDTCT_FMASK, |
| 5600 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_STATUS_LOSDTCT_POSITION, |
| 5601 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_STATUS_LOSDTCT_FIELD_NAME |
| 5602 | ); |
| 5603 | fire_plc_tlu_ctb_tlr_csr_a_serdes_receiver_lane_status[offset].init_field_info ( |
| 5604 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_STATUS_TESTFAIL_FID, |
| 5605 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_STATUS_TESTFAIL_FMASK, |
| 5606 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_STATUS_TESTFAIL_POSITION, |
| 5607 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_STATUS_TESTFAIL_FIELD_NAME |
| 5608 | ); |
| 5609 | fire_plc_tlu_ctb_tlr_csr_a_serdes_receiver_lane_status[offset].init_field_info ( |
| 5610 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_STATUS_SYNC_FID, |
| 5611 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_STATUS_SYNC_FMASK, |
| 5612 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_STATUS_SYNC_POSITION, |
| 5613 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_STATUS_SYNC_FIELD_NAME |
| 5614 | ); |
| 5615 | } |
| 5616 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 5617 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 5618 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 5619 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 5620 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 5621 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 5622 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 5623 | access_name[CSRT_OMNI] = "OMNI"; |
| 5624 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 5625 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 5626 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 5627 | access_name[FIRE_JTAG] = "JTAG"; |
| 5628 | |
| 5629 | for (offset = 0; offset < FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_STATUS_DEPTH; ++offset) { |
| 5630 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_STATUS_NAME); |
| 5631 | sprintf(input_name,"%s_%0d",base_csr_name,offset); |
| 5632 | fire_plc_tlu_ctb_tlr_csr_a_serdes_xmitter_lane_status[offset] = new( |
| 5633 | fire_plc_tlu_ctb_tlr_csr_a_serdes_xmitter_lane_status_state[offset], |
| 5634 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_STATUS_HW_ADDR + offset, |
| 5635 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_STATUS_POR_VALUE, |
| 5636 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_STATUS_RMASK, |
| 5637 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_STATUS_READ_ONLY_MASK, |
| 5638 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_STATUS_WRITE_MASK, |
| 5639 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_STATUS_CLEAR_MASK, |
| 5640 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_STATUS_SET_MASK, |
| 5641 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_STATUS_TOGGLE_MASK, |
| 5642 | input_name, |
| 5643 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_STATUS_NUM_FIELDS, |
| 5644 | input_access_methods, |
| 5645 | access_level, |
| 5646 | access_name, |
| 5647 | CSRT_OMNI |
| 5648 | ); |
| 5649 | fire_plc_tlu_ctb_tlr_csr_a_serdes_xmitter_lane_status[offset].init_field_info ( |
| 5650 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_STATUS_TESTFAIL_FID, |
| 5651 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_STATUS_TESTFAIL_FMASK, |
| 5652 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_STATUS_TESTFAIL_POSITION, |
| 5653 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_STATUS_TESTFAIL_FIELD_NAME |
| 5654 | ); |
| 5655 | fire_plc_tlu_ctb_tlr_csr_a_serdes_xmitter_lane_status[offset].init_field_info ( |
| 5656 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_STATUS_RDTCTIP_FID, |
| 5657 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_STATUS_RDTCTIP_FMASK, |
| 5658 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_STATUS_RDTCTIP_POSITION, |
| 5659 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_STATUS_RDTCTIP_FIELD_NAME |
| 5660 | ); |
| 5661 | } |
| 5662 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 5663 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 5664 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 5665 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 5666 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 5667 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 5668 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 5669 | access_name[CSRT_OMNI] = "OMNI"; |
| 5670 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 5671 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 5672 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 5673 | access_name[FIRE_JTAG] = "JTAG"; |
| 5674 | |
| 5675 | for (offset = 0; offset < FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_DEPTH; ++offset) { |
| 5676 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_NAME); |
| 5677 | sprintf(input_name,"%s_%0d",base_csr_name,offset); |
| 5678 | fire_plc_tlu_ctb_tlr_csr_a_serdes_macro_test_cfg[offset] = new( |
| 5679 | fire_plc_tlu_ctb_tlr_csr_a_serdes_macro_test_cfg_state[offset], |
| 5680 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_HW_ADDR + offset, |
| 5681 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_POR_VALUE, |
| 5682 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_RMASK, |
| 5683 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_READ_ONLY_MASK, |
| 5684 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_WRITE_MASK, |
| 5685 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_CLEAR_MASK, |
| 5686 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_SET_MASK, |
| 5687 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_TOGGLE_MASK, |
| 5688 | input_name, |
| 5689 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_NUM_FIELDS, |
| 5690 | input_access_methods, |
| 5691 | access_level, |
| 5692 | access_name, |
| 5693 | CSRT_OMNI |
| 5694 | ); |
| 5695 | fire_plc_tlu_ctb_tlr_csr_a_serdes_macro_test_cfg[offset].init_field_info ( |
| 5696 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_ENRXPATT_FID, |
| 5697 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_ENRXPATT_FMASK, |
| 5698 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_ENRXPATT_POSITION, |
| 5699 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_ENRXPATT_FIELD_NAME |
| 5700 | ); |
| 5701 | fire_plc_tlu_ctb_tlr_csr_a_serdes_macro_test_cfg[offset].init_field_info ( |
| 5702 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_CLKBYP_FID, |
| 5703 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_CLKBYP_FMASK, |
| 5704 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_CLKBYP_POSITION, |
| 5705 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_CLKBYP_FIELD_NAME |
| 5706 | ); |
| 5707 | fire_plc_tlu_ctb_tlr_csr_a_serdes_macro_test_cfg[offset].init_field_info ( |
| 5708 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_LOOPBACK_FID, |
| 5709 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_LOOPBACK_FMASK, |
| 5710 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_LOOPBACK_POSITION, |
| 5711 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_LOOPBACK_FIELD_NAME |
| 5712 | ); |
| 5713 | fire_plc_tlu_ctb_tlr_csr_a_serdes_macro_test_cfg[offset].init_field_info ( |
| 5714 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_RATE_FID, |
| 5715 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_RATE_FMASK, |
| 5716 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_RATE_POSITION, |
| 5717 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_RATE_FIELD_NAME |
| 5718 | ); |
| 5719 | fire_plc_tlu_ctb_tlr_csr_a_serdes_macro_test_cfg[offset].init_field_info ( |
| 5720 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_INVPATT_FID, |
| 5721 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_INVPATT_FMASK, |
| 5722 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_INVPATT_POSITION, |
| 5723 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_INVPATT_FIELD_NAME |
| 5724 | ); |
| 5725 | fire_plc_tlu_ctb_tlr_csr_a_serdes_macro_test_cfg[offset].init_field_info ( |
| 5726 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_ENBSTX_FID, |
| 5727 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_ENBSTX_FMASK, |
| 5728 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_ENBSTX_POSITION, |
| 5729 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_ENBSTX_FIELD_NAME |
| 5730 | ); |
| 5731 | fire_plc_tlu_ctb_tlr_csr_a_serdes_macro_test_cfg[offset].init_field_info ( |
| 5732 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_ENBSPT_FID, |
| 5733 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_ENBSPT_FMASK, |
| 5734 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_ENBSPT_POSITION, |
| 5735 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_ENBSPT_FIELD_NAME |
| 5736 | ); |
| 5737 | fire_plc_tlu_ctb_tlr_csr_a_serdes_macro_test_cfg[offset].init_field_info ( |
| 5738 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_RESERVED_FID, |
| 5739 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_RESERVED_FMASK, |
| 5740 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_RESERVED_POSITION, |
| 5741 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_RESERVED_FIELD_NAME |
| 5742 | ); |
| 5743 | fire_plc_tlu_ctb_tlr_csr_a_serdes_macro_test_cfg[offset].init_field_info ( |
| 5744 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_TESTPATT_FID, |
| 5745 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_TESTPATT_FMASK, |
| 5746 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_TESTPATT_POSITION, |
| 5747 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_TESTPATT_FIELD_NAME |
| 5748 | ); |
| 5749 | fire_plc_tlu_ctb_tlr_csr_a_serdes_macro_test_cfg[offset].init_field_info ( |
| 5750 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_ENTXPATT_FID, |
| 5751 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_ENTXPATT_FMASK, |
| 5752 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_ENTXPATT_POSITION, |
| 5753 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_ENTXPATT_FIELD_NAME |
| 5754 | ); |
| 5755 | fire_plc_tlu_ctb_tlr_csr_a_serdes_macro_test_cfg[offset].init_field_info ( |
| 5756 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_ENBSRX_FID, |
| 5757 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_ENBSRX_FMASK, |
| 5758 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_ENBSRX_POSITION, |
| 5759 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_ENBSRX_FIELD_NAME |
| 5760 | ); |
| 5761 | } |
| 5762 | access_level[CSRT_DAEMON] = CSRT_FULL_ACCESS; |
| 5763 | access_level[CSRT_OMNI] = CSRT_FULL_ACCESS; |
| 5764 | access_level[FIRE_PIO_MED] = CSRT_FULL_ACCESS; |
| 5765 | access_level[FIRE_PIO_FAST] = CSRT_FULL_ACCESS; |
| 5766 | access_level[FIRE_PIO_SLOW] = CSRT_FULL_ACCESS; |
| 5767 | access_level[FIRE_JTAG] = CSRT_FULL_ACCESS; |
| 5768 | access_name[CSRT_DAEMON] = "DAEMON"; |
| 5769 | access_name[CSRT_OMNI] = "OMNI"; |
| 5770 | access_name[FIRE_PIO_MED] = "PIO_MED"; |
| 5771 | access_name[FIRE_PIO_FAST] = "PIO_FAST"; |
| 5772 | access_name[FIRE_PIO_SLOW] = "PIO_SLOW"; |
| 5773 | access_name[FIRE_JTAG] = "JTAG"; |
| 5774 | |
| 5775 | for (offset = 0; offset < FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_DEPTH; ++offset) { |
| 5776 | sprintf(base_csr_name,"%s", FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_NAME); |
| 5777 | sprintf(input_name,"%s_%0d",base_csr_name,offset); |
| 5778 | fire_plc_tlu_ctb_tlr_csr_a_serdes_receiver_lane_ctl[offset] = new( |
| 5779 | fire_plc_tlu_ctb_tlr_csr_a_serdes_receiver_lane_ctl_state[offset], |
| 5780 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_HW_ADDR + offset, |
| 5781 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_POR_VALUE, |
| 5782 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_RMASK, |
| 5783 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_READ_ONLY_MASK, |
| 5784 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_WRITE_MASK, |
| 5785 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_CLEAR_MASK, |
| 5786 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_SET_MASK, |
| 5787 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_TOGGLE_MASK, |
| 5788 | input_name, |
| 5789 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_NUM_FIELDS, |
| 5790 | input_access_methods, |
| 5791 | access_level, |
| 5792 | access_name, |
| 5793 | CSRT_OMNI |
| 5794 | ); |
| 5795 | fire_plc_tlu_ctb_tlr_csr_a_serdes_receiver_lane_ctl[offset].init_field_info ( |
| 5796 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_CDR_FID, |
| 5797 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_CDR_FMASK, |
| 5798 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_CDR_POSITION, |
| 5799 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_CDR_FIELD_NAME |
| 5800 | ); |
| 5801 | fire_plc_tlu_ctb_tlr_csr_a_serdes_receiver_lane_ctl[offset].init_field_info ( |
| 5802 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_TERM_FID, |
| 5803 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_TERM_FMASK, |
| 5804 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_TERM_POSITION, |
| 5805 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_TERM_FIELD_NAME |
| 5806 | ); |
| 5807 | fire_plc_tlu_ctb_tlr_csr_a_serdes_receiver_lane_ctl[offset].init_field_info ( |
| 5808 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_BSINRXN_FID, |
| 5809 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_BSINRXN_FMASK, |
| 5810 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_BSINRXN_POSITION, |
| 5811 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_BSINRXN_FIELD_NAME |
| 5812 | ); |
| 5813 | fire_plc_tlu_ctb_tlr_csr_a_serdes_receiver_lane_ctl[offset].init_field_info ( |
| 5814 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_CMA_ALN_EN_FID, |
| 5815 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_CMA_ALN_EN_FMASK, |
| 5816 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_CMA_ALN_EN_POSITION, |
| 5817 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_CMA_ALN_EN_FIELD_NAME |
| 5818 | ); |
| 5819 | fire_plc_tlu_ctb_tlr_csr_a_serdes_receiver_lane_ctl[offset].init_field_info ( |
| 5820 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_ENTEST_FID, |
| 5821 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_ENTEST_FMASK, |
| 5822 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_ENTEST_POSITION, |
| 5823 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_ENTEST_FIELD_NAME |
| 5824 | ); |
| 5825 | fire_plc_tlu_ctb_tlr_csr_a_serdes_receiver_lane_ctl[offset].init_field_info ( |
| 5826 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_BSINRXP_FID, |
| 5827 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_BSINRXP_FMASK, |
| 5828 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_BSINRXP_POSITION, |
| 5829 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_BSINRXP_FIELD_NAME |
| 5830 | ); |
| 5831 | fire_plc_tlu_ctb_tlr_csr_a_serdes_receiver_lane_ctl[offset].init_field_info ( |
| 5832 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_LOS_FID, |
| 5833 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_LOS_FMASK, |
| 5834 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_LOS_POSITION, |
| 5835 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_LOS_FIELD_NAME |
| 5836 | ); |
| 5837 | fire_plc_tlu_ctb_tlr_csr_a_serdes_receiver_lane_ctl[offset].init_field_info ( |
| 5838 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_EQ_FID, |
| 5839 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_EQ_FMASK, |
| 5840 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_EQ_POSITION, |
| 5841 | FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_EQ_FIELD_NAME |
| 5842 | ); |
| 5843 | } |
| 5844 | } //End New |
| 5845 | |
| 5846 | //=============================================================== |
| 5847 | // Check Registers Function |
| 5848 | //=============================================================== |
| 5849 | |
| 5850 | function integer check_registers (integer method = CSRT_USE_DEFAULT_METHOD) { |
| 5851 | integer status = CSRT_SUCCESSFUL_RETURN_CODE; |
| 5852 | integer ZTMethod, NZTMethod; |
| 5853 | |
| 5854 | |
| 5855 | if (method == CSRT_USE_DEFAULT_METHOD) { |
| 5856 | ZTMethod = CSRT_OMNI; |
| 5857 | NZTMethod = CSRT_DAEMON; |
| 5858 | } |
| 5859 | else { |
| 5860 | ZTMethod = method; |
| 5861 | NZTMethod = method; |
| 5862 | } |
| 5863 | //////////////////// Register Disable List ////////////////// |
| 5864 | |
| 5865 | //////////////////// Per Register Checks ////////////////// |
| 5866 | status &= fire_plc_tlu_ctb_tlr_csr_a_lnk_bit_err_cnt_2.check_register(NZTMethod); |
| 5867 | status &= fire_plc_tlu_ctb_tlr_csr_a_tlu_ici.check_register(ZTMethod); |
| 5868 | status &= fire_plc_tlu_ctb_tlr_csr_a_replay_tim_thresh.check_register(ZTMethod); |
| 5869 | status &= fire_plc_tlu_ctb_tlr_csr_a_slt_cap.check_register(NZTMethod); |
| 5870 | status &= fire_plc_tlu_ctb_tlr_csr_a_link_cfg.check_register(ZTMethod); |
| 5871 | status &= fire_plc_tlu_ctb_tlr_csr_a_tlu_icr.check_register(NZTMethod); |
| 5872 | status &= fire_plc_tlu_ctb_tlr_csr_a_force_ltssm.check_register(ZTMethod); |
| 5873 | status &= fire_dlc_ilu_cib_csr_a_ilu_int_en.check_register(ZTMethod); |
| 5874 | status &= fire_plc_tlu_ctb_tlr_csr_a_oe_log.check_register(ZTMethod); |
| 5875 | status &= fire_plc_tlu_ctb_tlr_csr_a_event_err_int_en.check_register(ZTMethod); |
| 5876 | status &= fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1s_alias.check_register(ZTMethod); |
| 5877 | status &= fire_plc_tlu_ctb_tlr_csr_a_lnk_sts.check_register(ZTMethod); |
| 5878 | status &= fire_dlc_ilu_cib_csr_a_ilu_log_en.check_register(ZTMethod); |
| 5879 | status &= fire_dlc_ilu_cib_csr_a_ilu_en_err.check_register(NZTMethod); |
| 5880 | status &= fire_plc_tlu_ctb_tlr_csr_a_event_err_log_en.check_register(ZTMethod); |
| 5881 | status &= fire_plc_tlu_ctb_tlr_csr_a_oe_int_en.check_register(ZTMethod); |
| 5882 | status &= fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1c_alias.check_register(ZTMethod); |
| 5883 | status &= fire_plc_tlu_ctb_tlr_csr_a_oe_en_err.check_register(NZTMethod); |
| 5884 | status &= fire_plc_tlu_ctb_tlr_csr_a_symbol_num.check_register(ZTMethod); |
| 5885 | status &= fire_plc_tlu_ctb_tlr_csr_a_replay_timer.check_register(ZTMethod); |
| 5886 | status &= fire_plc_tlu_ctb_tlr_csr_a_rue_hdr1.check_register(ZTMethod); |
| 5887 | status &= fire_plc_tlu_ctb_tlr_csr_a_rue_hdr2.check_register(ZTMethod); |
| 5888 | status &= fire_plc_tlu_ctb_tlr_csr_a_tlu_prf0.check_register(ZTMethod); |
| 5889 | status &= fire_plc_tlu_ctb_tlr_csr_a_tlu_prf1.check_register(ZTMethod); |
| 5890 | status &= fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.check_register(ZTMethod); |
| 5891 | status &= fire_plc_tlu_ctb_tlr_csr_a_tlu_prf2.check_register(ZTMethod); |
| 5892 | status &= fire_plc_tlu_ctb_tlr_csr_a_tlu_sts.check_register(ZTMethod); |
| 5893 | status &= fire_plc_tlu_ctb_tlr_csr_a_ce_int_en.check_register(ZTMethod); |
| 5894 | status &= fire_plc_tlu_ctb_tlr_csr_a_ce_en_err.check_register(NZTMethod); |
| 5895 | status &= fire_plc_tlu_ctb_tlr_csr_a_tue_hdr1.check_register(ZTMethod); |
| 5896 | status &= fire_plc_tlu_ctb_tlr_csr_a_tue_hdr2.check_register(ZTMethod); |
| 5897 | status &= fire_plc_tlu_ctb_tlr_csr_a_dev_sts.check_register(ZTMethod); |
| 5898 | status &= fire_plc_tlu_ctb_tlr_csr_a_trn_off.check_register(ZTMethod); |
| 5899 | status &= fire_dlc_ilu_cib_csr_a_ilu_diagnos.check_register(ZTMethod); |
| 5900 | status &= fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.check_register(ZTMethod); |
| 5901 | status &= fire_plc_tlu_ctb_tlr_csr_a_roe_hdr1.check_register(ZTMethod); |
| 5902 | status &= fire_plc_tlu_ctb_tlr_csr_a_roe_hdr2.check_register(ZTMethod); |
| 5903 | status &= fire_plc_tlu_ctb_tlr_csr_a_tlu_prfc.check_register(ZTMethod); |
| 5904 | status &= fire_plc_tlu_ctb_tlr_csr_a_ce_log.check_register(ZTMethod); |
| 5905 | status &= fire_plc_tlu_ctb_tlr_csr_a_event_err_int_sts.check_register(NZTMethod); |
| 5906 | status &= fire_plc_tlu_ctb_tlr_csr_a_peu_dlpl_serdes_rev.check_register(ZTMethod); |
| 5907 | status &= fire_plc_tlu_ctb_tlr_csr_a_toe_hdr1.check_register(ZTMethod); |
| 5908 | status &= fire_plc_tlu_ctb_tlr_csr_a_toe_hdr2.check_register(ZTMethod); |
| 5909 | status &= fire_plc_tlu_ctb_tlr_csr_a_acknak_thresh.check_register(ZTMethod); |
| 5910 | status &= fire_plc_tlu_ctb_tlr_csr_a_ven_dllp_msg.check_register(ZTMethod); |
| 5911 | status &= fire_plc_tlu_ctb_tlr_csr_a_lane_skew.check_register(ZTMethod); |
| 5912 | status &= fire_plc_tlu_ctb_tlr_csr_a_ue_int_en.check_register(ZTMethod); |
| 5913 | status &= fire_plc_tlu_ctb_tlr_csr_a_core_status.check_register(ZTMethod); |
| 5914 | status &= fire_plc_tlu_ctb_tlr_csr_a_lnk_cap.check_register(ZTMethod); |
| 5915 | status &= fire_plc_tlu_ctb_tlr_csr_a_ue_en_err.check_register(NZTMethod); |
| 5916 | status &= fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1s_alias.check_register(ZTMethod); |
| 5917 | status &= fire_plc_tlu_ctb_tlr_csr_a_lnk_ctl.check_register(ZTMethod); |
| 5918 | status &= fire_plc_tlu_ctb_tlr_csr_a_ce_err_rw1s_alias.check_register(ZTMethod); |
| 5919 | status &= fire_plc_tlu_ctb_tlr_csr_a_serdes_pll.check_register(ZTMethod); |
| 5920 | status &= fire_plc_tlu_ctb_tlr_csr_a_acknak_timer.check_register(ZTMethod); |
| 5921 | status &= fire_dlc_ilu_cib_csr_a_pec_int_en.check_register(ZTMethod); |
| 5922 | status &= fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1c_alias.check_register(ZTMethod); |
| 5923 | status &= fire_dlc_ilu_cib_csr_a_pec_en_err.check_register(NZTMethod); |
| 5924 | status &= fire_dlc_ilu_cib_csr_a_ilu_log_err_rw1s_alias.check_register(ZTMethod); |
| 5925 | status &= fire_plc_tlu_ctb_tlr_csr_a_tlu_diag.check_register(ZTMethod); |
| 5926 | status &= fire_plc_tlu_ctb_tlr_csr_a_symbol_timer.check_register(ZTMethod); |
| 5927 | status &= fire_plc_tlu_ctb_tlr_csr_a_link_ctl.check_register(ZTMethod); |
| 5928 | status &= fire_plc_tlu_ctb_tlr_csr_a_ce_err_rw1c_alias.check_register(ZTMethod); |
| 5929 | status &= fire_plc_tlu_ctb_tlr_csr_a_tlu_erb.check_register(NZTMethod); |
| 5930 | status &= fire_plc_tlu_ctb_tlr_csr_a_tlu_ecc.check_register(NZTMethod); |
| 5931 | status &= fire_plc_tlu_ctb_tlr_csr_a_ue_log.check_register(ZTMethod); |
| 5932 | status &= fire_plc_tlu_ctb_tlr_csr_a_tlu_ctl.check_register(ZTMethod); |
| 5933 | status &= fire_dlc_ilu_cib_csr_a_ilu_log_err_rw1c_alias.check_register(ZTMethod); |
| 5934 | status &= fire_plc_tlu_ctb_tlr_csr_a_tlu_ecl.check_register(NZTMethod); |
| 5935 | status &= fire_plc_tlu_ctb_tlr_csr_a_tlu_ica.check_register(NZTMethod); |
| 5936 | status &= fire_plc_tlu_ctb_tlr_csr_a_dev_cap.check_register(ZTMethod); |
| 5937 | status &= fire_plc_tlu_ctb_tlr_csr_a_tlu_dbg_sel_a.check_register(ZTMethod); |
| 5938 | status &= fire_plc_tlu_ctb_tlr_csr_a_tlu_dbg_sel_b.check_register(ZTMethod); |
| 5939 | status &= fire_plc_tlu_ctb_tlr_csr_a_lnk_bit_err_cnt_1.check_register(NZTMethod); |
| 5940 | status &= fire_plc_tlu_ctb_tlr_csr_a_dev_ctl.check_register(ZTMethod); |
| 5941 | for (offset = 0; offset < FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_DEPTH; ++offset) { |
| 5942 | status &= fire_plc_tlu_ctb_tlr_csr_a_serdes_xmitter_lane_ctl[offset].check_register(ZTMethod); |
| 5943 | } |
| 5944 | for (offset = 0; offset < FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_STATUS_DEPTH; ++offset) { |
| 5945 | status &= fire_plc_tlu_ctb_tlr_csr_a_serdes_receiver_lane_status[offset].check_register(ZTMethod); |
| 5946 | } |
| 5947 | for (offset = 0; offset < FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_STATUS_DEPTH; ++offset) { |
| 5948 | status &= fire_plc_tlu_ctb_tlr_csr_a_serdes_xmitter_lane_status[offset].check_register(ZTMethod); |
| 5949 | } |
| 5950 | for (offset = 0; offset < FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_DEPTH; ++offset) { |
| 5951 | status &= fire_plc_tlu_ctb_tlr_csr_a_serdes_macro_test_cfg[offset].check_register(ZTMethod); |
| 5952 | } |
| 5953 | for (offset = 0; offset < FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_DEPTH; ++offset) { |
| 5954 | status &= fire_plc_tlu_ctb_tlr_csr_a_serdes_receiver_lane_ctl[offset].check_register(ZTMethod); |
| 5955 | } |
| 5956 | |
| 5957 | check_registers = status; |
| 5958 | } // end check_registers |
| 5959 | |
| 5960 | //=============================================================== |
| 5961 | // Reset Registers |
| 5962 | //=============================================================== |
| 5963 | |
| 5964 | task reset_all_shadow_registers () { |
| 5965 | |
| 5966 | //////////////////// Per Register Resets ////////////////// |
| 5967 | fire_plc_tlu_ctb_tlr_csr_a_lnk_bit_err_cnt_2.reset(); |
| 5968 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ici.reset(); |
| 5969 | fire_plc_tlu_ctb_tlr_csr_a_replay_tim_thresh.reset(); |
| 5970 | fire_plc_tlu_ctb_tlr_csr_a_slt_cap.reset(); |
| 5971 | fire_plc_tlu_ctb_tlr_csr_a_link_cfg.reset(); |
| 5972 | fire_plc_tlu_ctb_tlr_csr_a_tlu_icr.reset(); |
| 5973 | fire_plc_tlu_ctb_tlr_csr_a_force_ltssm.reset(); |
| 5974 | fire_dlc_ilu_cib_csr_a_ilu_int_en.reset(); |
| 5975 | fire_plc_tlu_ctb_tlr_csr_a_oe_log.reset(); |
| 5976 | fire_plc_tlu_ctb_tlr_csr_a_event_err_int_en.reset(); |
| 5977 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1s_alias.reset(); |
| 5978 | fire_plc_tlu_ctb_tlr_csr_a_lnk_sts.reset(); |
| 5979 | fire_dlc_ilu_cib_csr_a_ilu_log_en.reset(); |
| 5980 | fire_dlc_ilu_cib_csr_a_ilu_en_err.reset(); |
| 5981 | fire_plc_tlu_ctb_tlr_csr_a_event_err_log_en.reset(); |
| 5982 | fire_plc_tlu_ctb_tlr_csr_a_oe_int_en.reset(); |
| 5983 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1c_alias.reset(); |
| 5984 | fire_plc_tlu_ctb_tlr_csr_a_oe_en_err.reset(); |
| 5985 | fire_plc_tlu_ctb_tlr_csr_a_symbol_num.reset(); |
| 5986 | fire_plc_tlu_ctb_tlr_csr_a_replay_timer.reset(); |
| 5987 | fire_plc_tlu_ctb_tlr_csr_a_rue_hdr1.reset(); |
| 5988 | fire_plc_tlu_ctb_tlr_csr_a_rue_hdr2.reset(); |
| 5989 | fire_plc_tlu_ctb_tlr_csr_a_tlu_prf0.reset(); |
| 5990 | fire_plc_tlu_ctb_tlr_csr_a_tlu_prf1.reset(); |
| 5991 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.reset(); |
| 5992 | fire_plc_tlu_ctb_tlr_csr_a_tlu_prf2.reset(); |
| 5993 | fire_plc_tlu_ctb_tlr_csr_a_tlu_sts.reset(); |
| 5994 | fire_plc_tlu_ctb_tlr_csr_a_ce_int_en.reset(); |
| 5995 | fire_plc_tlu_ctb_tlr_csr_a_ce_en_err.reset(); |
| 5996 | fire_plc_tlu_ctb_tlr_csr_a_tue_hdr1.reset(); |
| 5997 | fire_plc_tlu_ctb_tlr_csr_a_tue_hdr2.reset(); |
| 5998 | fire_plc_tlu_ctb_tlr_csr_a_dev_sts.reset(); |
| 5999 | fire_plc_tlu_ctb_tlr_csr_a_trn_off.reset(); |
| 6000 | fire_dlc_ilu_cib_csr_a_ilu_diagnos.reset(); |
| 6001 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.reset(); |
| 6002 | fire_plc_tlu_ctb_tlr_csr_a_roe_hdr1.reset(); |
| 6003 | fire_plc_tlu_ctb_tlr_csr_a_roe_hdr2.reset(); |
| 6004 | fire_plc_tlu_ctb_tlr_csr_a_tlu_prfc.reset(); |
| 6005 | fire_plc_tlu_ctb_tlr_csr_a_ce_log.reset(); |
| 6006 | fire_plc_tlu_ctb_tlr_csr_a_event_err_int_sts.reset(); |
| 6007 | fire_plc_tlu_ctb_tlr_csr_a_peu_dlpl_serdes_rev.reset(); |
| 6008 | fire_plc_tlu_ctb_tlr_csr_a_toe_hdr1.reset(); |
| 6009 | fire_plc_tlu_ctb_tlr_csr_a_toe_hdr2.reset(); |
| 6010 | fire_plc_tlu_ctb_tlr_csr_a_acknak_thresh.reset(); |
| 6011 | fire_plc_tlu_ctb_tlr_csr_a_ven_dllp_msg.reset(); |
| 6012 | fire_plc_tlu_ctb_tlr_csr_a_lane_skew.reset(); |
| 6013 | fire_plc_tlu_ctb_tlr_csr_a_ue_int_en.reset(); |
| 6014 | fire_plc_tlu_ctb_tlr_csr_a_core_status.reset(); |
| 6015 | fire_plc_tlu_ctb_tlr_csr_a_lnk_cap.reset(); |
| 6016 | fire_plc_tlu_ctb_tlr_csr_a_ue_en_err.reset(); |
| 6017 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1s_alias.reset(); |
| 6018 | fire_plc_tlu_ctb_tlr_csr_a_lnk_ctl.reset(); |
| 6019 | fire_plc_tlu_ctb_tlr_csr_a_ce_err_rw1s_alias.reset(); |
| 6020 | fire_plc_tlu_ctb_tlr_csr_a_serdes_pll.reset(); |
| 6021 | fire_plc_tlu_ctb_tlr_csr_a_acknak_timer.reset(); |
| 6022 | fire_dlc_ilu_cib_csr_a_pec_int_en.reset(); |
| 6023 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1c_alias.reset(); |
| 6024 | fire_dlc_ilu_cib_csr_a_pec_en_err.reset(); |
| 6025 | fire_dlc_ilu_cib_csr_a_ilu_log_err_rw1s_alias.reset(); |
| 6026 | fire_plc_tlu_ctb_tlr_csr_a_tlu_diag.reset(); |
| 6027 | fire_plc_tlu_ctb_tlr_csr_a_symbol_timer.reset(); |
| 6028 | fire_plc_tlu_ctb_tlr_csr_a_link_ctl.reset(); |
| 6029 | fire_plc_tlu_ctb_tlr_csr_a_ce_err_rw1c_alias.reset(); |
| 6030 | fire_plc_tlu_ctb_tlr_csr_a_tlu_erb.reset(); |
| 6031 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ecc.reset(); |
| 6032 | fire_plc_tlu_ctb_tlr_csr_a_ue_log.reset(); |
| 6033 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ctl.reset(); |
| 6034 | fire_dlc_ilu_cib_csr_a_ilu_log_err_rw1c_alias.reset(); |
| 6035 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ecl.reset(); |
| 6036 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ica.reset(); |
| 6037 | fire_plc_tlu_ctb_tlr_csr_a_dev_cap.reset(); |
| 6038 | fire_plc_tlu_ctb_tlr_csr_a_tlu_dbg_sel_a.reset(); |
| 6039 | fire_plc_tlu_ctb_tlr_csr_a_tlu_dbg_sel_b.reset(); |
| 6040 | fire_plc_tlu_ctb_tlr_csr_a_lnk_bit_err_cnt_1.reset(); |
| 6041 | fire_plc_tlu_ctb_tlr_csr_a_dev_ctl.reset(); |
| 6042 | for (offset = 0; offset < FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_DEPTH; ++offset) { |
| 6043 | fire_plc_tlu_ctb_tlr_csr_a_serdes_xmitter_lane_ctl[offset].reset(); |
| 6044 | } |
| 6045 | for (offset = 0; offset < FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_STATUS_DEPTH; ++offset) { |
| 6046 | fire_plc_tlu_ctb_tlr_csr_a_serdes_receiver_lane_status[offset].reset(); |
| 6047 | } |
| 6048 | for (offset = 0; offset < FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_STATUS_DEPTH; ++offset) { |
| 6049 | fire_plc_tlu_ctb_tlr_csr_a_serdes_xmitter_lane_status[offset].reset(); |
| 6050 | } |
| 6051 | for (offset = 0; offset < FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_DEPTH; ++offset) { |
| 6052 | fire_plc_tlu_ctb_tlr_csr_a_serdes_macro_test_cfg[offset].reset(); |
| 6053 | } |
| 6054 | for (offset = 0; offset < FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_DEPTH; ++offset) { |
| 6055 | fire_plc_tlu_ctb_tlr_csr_a_serdes_receiver_lane_ctl[offset].reset(); |
| 6056 | } |
| 6057 | } // end reset_all_shadow_registers |
| 6058 | |
| 6059 | |
| 6060 | //=============================================================== |
| 6061 | // Change default access method for all registers |
| 6062 | //=============================================================== |
| 6063 | |
| 6064 | task set_all_default_access_methods (integer method) { |
| 6065 | fire_plc_tlu_ctb_tlr_csr_a_lnk_bit_err_cnt_2.set_default_access_method(method); |
| 6066 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ici.set_default_access_method(method); |
| 6067 | fire_plc_tlu_ctb_tlr_csr_a_replay_tim_thresh.set_default_access_method(method); |
| 6068 | fire_plc_tlu_ctb_tlr_csr_a_slt_cap.set_default_access_method(method); |
| 6069 | fire_plc_tlu_ctb_tlr_csr_a_link_cfg.set_default_access_method(method); |
| 6070 | fire_plc_tlu_ctb_tlr_csr_a_tlu_icr.set_default_access_method(method); |
| 6071 | fire_plc_tlu_ctb_tlr_csr_a_force_ltssm.set_default_access_method(method); |
| 6072 | fire_dlc_ilu_cib_csr_a_ilu_int_en.set_default_access_method(method); |
| 6073 | fire_plc_tlu_ctb_tlr_csr_a_oe_log.set_default_access_method(method); |
| 6074 | fire_plc_tlu_ctb_tlr_csr_a_event_err_int_en.set_default_access_method(method); |
| 6075 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1s_alias.set_default_access_method(method); |
| 6076 | fire_plc_tlu_ctb_tlr_csr_a_lnk_sts.set_default_access_method(method); |
| 6077 | fire_dlc_ilu_cib_csr_a_ilu_log_en.set_default_access_method(method); |
| 6078 | fire_dlc_ilu_cib_csr_a_ilu_en_err.set_default_access_method(method); |
| 6079 | fire_plc_tlu_ctb_tlr_csr_a_event_err_log_en.set_default_access_method(method); |
| 6080 | fire_plc_tlu_ctb_tlr_csr_a_oe_int_en.set_default_access_method(method); |
| 6081 | fire_plc_tlu_ctb_tlr_csr_a_ue_err_rw1c_alias.set_default_access_method(method); |
| 6082 | fire_plc_tlu_ctb_tlr_csr_a_oe_en_err.set_default_access_method(method); |
| 6083 | fire_plc_tlu_ctb_tlr_csr_a_symbol_num.set_default_access_method(method); |
| 6084 | fire_plc_tlu_ctb_tlr_csr_a_replay_timer.set_default_access_method(method); |
| 6085 | fire_plc_tlu_ctb_tlr_csr_a_rue_hdr1.set_default_access_method(method); |
| 6086 | fire_plc_tlu_ctb_tlr_csr_a_rue_hdr2.set_default_access_method(method); |
| 6087 | fire_plc_tlu_ctb_tlr_csr_a_tlu_prf0.set_default_access_method(method); |
| 6088 | fire_plc_tlu_ctb_tlr_csr_a_tlu_prf1.set_default_access_method(method); |
| 6089 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1s_alias.set_default_access_method(method); |
| 6090 | fire_plc_tlu_ctb_tlr_csr_a_tlu_prf2.set_default_access_method(method); |
| 6091 | fire_plc_tlu_ctb_tlr_csr_a_tlu_sts.set_default_access_method(method); |
| 6092 | fire_plc_tlu_ctb_tlr_csr_a_ce_int_en.set_default_access_method(method); |
| 6093 | fire_plc_tlu_ctb_tlr_csr_a_ce_en_err.set_default_access_method(method); |
| 6094 | fire_plc_tlu_ctb_tlr_csr_a_tue_hdr1.set_default_access_method(method); |
| 6095 | fire_plc_tlu_ctb_tlr_csr_a_tue_hdr2.set_default_access_method(method); |
| 6096 | fire_plc_tlu_ctb_tlr_csr_a_dev_sts.set_default_access_method(method); |
| 6097 | fire_plc_tlu_ctb_tlr_csr_a_trn_off.set_default_access_method(method); |
| 6098 | fire_dlc_ilu_cib_csr_a_ilu_diagnos.set_default_access_method(method); |
| 6099 | fire_plc_tlu_ctb_tlr_csr_a_oe_err_rw1c_alias.set_default_access_method(method); |
| 6100 | fire_plc_tlu_ctb_tlr_csr_a_roe_hdr1.set_default_access_method(method); |
| 6101 | fire_plc_tlu_ctb_tlr_csr_a_roe_hdr2.set_default_access_method(method); |
| 6102 | fire_plc_tlu_ctb_tlr_csr_a_tlu_prfc.set_default_access_method(method); |
| 6103 | fire_plc_tlu_ctb_tlr_csr_a_ce_log.set_default_access_method(method); |
| 6104 | fire_plc_tlu_ctb_tlr_csr_a_event_err_int_sts.set_default_access_method(method); |
| 6105 | fire_plc_tlu_ctb_tlr_csr_a_peu_dlpl_serdes_rev.set_default_access_method(method); |
| 6106 | fire_plc_tlu_ctb_tlr_csr_a_toe_hdr1.set_default_access_method(method); |
| 6107 | fire_plc_tlu_ctb_tlr_csr_a_toe_hdr2.set_default_access_method(method); |
| 6108 | fire_plc_tlu_ctb_tlr_csr_a_acknak_thresh.set_default_access_method(method); |
| 6109 | fire_plc_tlu_ctb_tlr_csr_a_ven_dllp_msg.set_default_access_method(method); |
| 6110 | fire_plc_tlu_ctb_tlr_csr_a_lane_skew.set_default_access_method(method); |
| 6111 | fire_plc_tlu_ctb_tlr_csr_a_ue_int_en.set_default_access_method(method); |
| 6112 | fire_plc_tlu_ctb_tlr_csr_a_core_status.set_default_access_method(method); |
| 6113 | fire_plc_tlu_ctb_tlr_csr_a_lnk_cap.set_default_access_method(method); |
| 6114 | fire_plc_tlu_ctb_tlr_csr_a_ue_en_err.set_default_access_method(method); |
| 6115 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1s_alias.set_default_access_method(method); |
| 6116 | fire_plc_tlu_ctb_tlr_csr_a_lnk_ctl.set_default_access_method(method); |
| 6117 | fire_plc_tlu_ctb_tlr_csr_a_ce_err_rw1s_alias.set_default_access_method(method); |
| 6118 | fire_plc_tlu_ctb_tlr_csr_a_serdes_pll.set_default_access_method(method); |
| 6119 | fire_plc_tlu_ctb_tlr_csr_a_acknak_timer.set_default_access_method(method); |
| 6120 | fire_dlc_ilu_cib_csr_a_pec_int_en.set_default_access_method(method); |
| 6121 | fire_plc_tlu_ctb_tlr_csr_a_event_err_sts_clr_rw1c_alias.set_default_access_method(method); |
| 6122 | fire_dlc_ilu_cib_csr_a_pec_en_err.set_default_access_method(method); |
| 6123 | fire_dlc_ilu_cib_csr_a_ilu_log_err_rw1s_alias.set_default_access_method(method); |
| 6124 | fire_plc_tlu_ctb_tlr_csr_a_tlu_diag.set_default_access_method(method); |
| 6125 | fire_plc_tlu_ctb_tlr_csr_a_symbol_timer.set_default_access_method(method); |
| 6126 | fire_plc_tlu_ctb_tlr_csr_a_link_ctl.set_default_access_method(method); |
| 6127 | fire_plc_tlu_ctb_tlr_csr_a_ce_err_rw1c_alias.set_default_access_method(method); |
| 6128 | fire_plc_tlu_ctb_tlr_csr_a_tlu_erb.set_default_access_method(method); |
| 6129 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ecc.set_default_access_method(method); |
| 6130 | fire_plc_tlu_ctb_tlr_csr_a_ue_log.set_default_access_method(method); |
| 6131 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ctl.set_default_access_method(method); |
| 6132 | fire_dlc_ilu_cib_csr_a_ilu_log_err_rw1c_alias.set_default_access_method(method); |
| 6133 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ecl.set_default_access_method(method); |
| 6134 | fire_plc_tlu_ctb_tlr_csr_a_tlu_ica.set_default_access_method(method); |
| 6135 | fire_plc_tlu_ctb_tlr_csr_a_dev_cap.set_default_access_method(method); |
| 6136 | fire_plc_tlu_ctb_tlr_csr_a_tlu_dbg_sel_a.set_default_access_method(method); |
| 6137 | fire_plc_tlu_ctb_tlr_csr_a_tlu_dbg_sel_b.set_default_access_method(method); |
| 6138 | fire_plc_tlu_ctb_tlr_csr_a_lnk_bit_err_cnt_1.set_default_access_method(method); |
| 6139 | fire_plc_tlu_ctb_tlr_csr_a_dev_ctl.set_default_access_method(method); |
| 6140 | for (offset = 0; offset < FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_CTL_DEPTH; ++offset) { |
| 6141 | fire_plc_tlu_ctb_tlr_csr_a_serdes_xmitter_lane_ctl[offset].set_default_access_method(method); |
| 6142 | } |
| 6143 | for (offset = 0; offset < FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_STATUS_DEPTH; ++offset) { |
| 6144 | fire_plc_tlu_ctb_tlr_csr_a_serdes_receiver_lane_status[offset].set_default_access_method(method); |
| 6145 | } |
| 6146 | for (offset = 0; offset < FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_XMITTER_LANE_STATUS_DEPTH; ++offset) { |
| 6147 | fire_plc_tlu_ctb_tlr_csr_a_serdes_xmitter_lane_status[offset].set_default_access_method(method); |
| 6148 | } |
| 6149 | for (offset = 0; offset < FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_MACRO_TEST_CFG_DEPTH; ++offset) { |
| 6150 | fire_plc_tlu_ctb_tlr_csr_a_serdes_macro_test_cfg[offset].set_default_access_method(method); |
| 6151 | } |
| 6152 | for (offset = 0; offset < FIRE_PLC_TLU_CTB_TLR_CSR_A_SERDES_RECEIVER_LANE_CTL_DEPTH; ++offset) { |
| 6153 | fire_plc_tlu_ctb_tlr_csr_a_serdes_receiver_lane_ctl[offset].set_default_access_method(method); |
| 6154 | } |
| 6155 | } // set_all_default_access_methods |
| 6156 | |
| 6157 | } //End FIRE_CSRCollection |