| 1 | // ========== Copyright Header Begin ========================================== |
| 2 | // |
| 3 | // OpenSPARC T2 Processor File: tlr_b.csr_define.vri |
| 4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved |
| 5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. |
| 6 | // |
| 7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 8 | // |
| 9 | // This program is free software; you can redistribute it and/or modify |
| 10 | // it under the terms of the GNU General Public License as published by |
| 11 | // the Free Software Foundation; version 2 of the License. |
| 12 | // |
| 13 | // This program is distributed in the hope that it will be useful, |
| 14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | // GNU General Public License for more details. |
| 17 | // |
| 18 | // You should have received a copy of the GNU General Public License |
| 19 | // along with this program; if not, write to the Free Software |
| 20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 21 | // |
| 22 | // For the avoidance of doubt, and except that if any non-GPL license |
| 23 | // choice is available it will apply instead, Sun elects to use only |
| 24 | // the General Public License version 2 (GPLv2) at this time for any |
| 25 | // software where a choice of GPL license versions is made |
| 26 | // available with the language indicating that GPLv2 or any later version |
| 27 | // may be used, or where a choice of which version of the GPL is applied is |
| 28 | // otherwise unspecified. |
| 29 | // |
| 30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
| 31 | // CA 95054 USA or visit www.sun.com if you need additional information or |
| 32 | // have any questions. |
| 33 | // |
| 34 | // ========== Copyright Header End ============================================ |
| 35 | #ifndef TLR_B_CSR_DEFINE |
| 36 | #define TLR_B_CSR_DEFINE |
| 37 | |
| 38 | //------------------------------------------------------- |
| 39 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL |
| 40 | //------------------------------------------------------- |
| 41 | |
| 42 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_HW_ADDR 27'b000000011110000000000000000 |
| 43 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_ADDR 30'b000000011110000000000000000000 |
| 44 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_NAME "fire_plc_tlu_ctb_tlr_csr_b_tlu_ctl" |
| 45 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_WIDTH 64 |
| 46 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_DEPTH 1 |
| 47 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_SLC 63:0 |
| 48 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_INT_SLC 63:0 |
| 49 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_POSITION 0 |
| 50 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_tlu_ctl" |
| 51 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_LOW_ADDR_WIDTH 0 |
| 52 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_ADDR_RANGE 26:0 |
| 53 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_READ_MASK 64'b0000000000000000000000000000000011111111000101111111111111111111 |
| 54 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 55 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_WRITE_MASK 64'b0000000000000000000000000000000011111111000101111111111111111111 |
| 56 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 57 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 58 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 59 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 60 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_RMASK 64'b0000000000000000000000000000000011111111000101111111111111111111 |
| 61 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_RESERVED_BIT_MASK 64'b1111111111111111111111111111111100000000111010000000000000000000 |
| 62 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 63 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000100000001 |
| 64 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_INTERNAL_REG 1 |
| 65 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_ALIASED_FROM 0 |
| 66 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_ZERO_TIME_OMNI 1 |
| 67 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_HW_ACC_JTAG_RD 1 |
| 68 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_HW_ACC_JTAG_WR 1 |
| 69 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_HW_ACC_PIO_SLOW_RD 1 |
| 70 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_HW_ACC_PIO_SLOW_WR 1 |
| 71 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_HW_ACC_PIO_MED_RD 1 |
| 72 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_HW_ACC_PIO_MED_WR 1 |
| 73 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_HW_ACC_PIO_FAST_RD 1 |
| 74 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_HW_ACC_PIO_FAST_WR 1 |
| 75 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_NUM_FIELDS 4 |
| 76 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_L0S_TIM_FID 0 |
| 77 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_L0S_TIM_SLC 31:24 |
| 78 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_L0S_TIM_WIDTH 8 |
| 79 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_L0S_TIM_INT_SLC 7:0 |
| 80 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_L0S_TIM_POSITION 24 |
| 81 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_L0S_TIM_FMASK 64'b0000000000000000000000000000000011111111000000000000000000000000 |
| 82 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_L0S_TIM_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 83 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_L0S_TIM_POR_VALUE 8'b00000000 |
| 84 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_L0S_TIM_FIELD_NAME "l0s_tim" |
| 85 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_NPWR_EN_FID 1 |
| 86 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_NPWR_EN_SLC 20:20 |
| 87 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_NPWR_EN_WIDTH 1 |
| 88 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_NPWR_EN_INT_SLC 0:0 |
| 89 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_NPWR_EN_POSITION 20 |
| 90 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_NPWR_EN_FMASK 64'b0000000000000000000000000000000000000000000100000000000000000000 |
| 91 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_NPWR_EN_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 92 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_NPWR_EN_POR_VALUE 1'b0 |
| 93 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_NPWR_EN_FIELD_NAME "npwr_en" |
| 94 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_CTO_SEL_FID 2 |
| 95 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_CTO_SEL_SLC 18:16 |
| 96 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_CTO_SEL_WIDTH 3 |
| 97 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_CTO_SEL_INT_SLC 2:0 |
| 98 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_CTO_SEL_POSITION 16 |
| 99 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_CTO_SEL_FMASK 64'b0000000000000000000000000000000000000000000001110000000000000000 |
| 100 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_CTO_SEL_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 101 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_CTO_SEL_POR_VALUE 3'b000 |
| 102 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_CTO_SEL_FIELD_NAME "cto_sel" |
| 103 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_CONFIG_FID 3 |
| 104 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_CONFIG_SLC 15:0 |
| 105 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_CONFIG_WIDTH 16 |
| 106 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_CONFIG_INT_SLC 15:0 |
| 107 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_CONFIG_POSITION 0 |
| 108 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_CONFIG_FMASK 64'b0000000000000000000000000000000000000000000000001111111111111111 |
| 109 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_CONFIG_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 110 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_CONFIG_POR_VALUE 16'b0000000100000001 |
| 111 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_CTL_CONFIG_FIELD_NAME "config" |
| 112 | |
| 113 | //------------------------------------------------------- |
| 114 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS |
| 115 | //------------------------------------------------------- |
| 116 | |
| 117 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_HW_ADDR 27'b000000011110000000000000001 |
| 118 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_ADDR 30'b000000011110000000000000001000 |
| 119 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_NAME "fire_plc_tlu_ctb_tlr_csr_b_tlu_sts" |
| 120 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_WIDTH 64 |
| 121 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_DEPTH 1 |
| 122 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_SLC 63:0 |
| 123 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_INT_SLC 63:0 |
| 124 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_POSITION 0 |
| 125 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_tlu_sts" |
| 126 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_LOW_ADDR_WIDTH 0 |
| 127 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_ADDR_RANGE 26:0 |
| 128 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_READ_MASK 64'b0000000000000000000000000000000000000000000000000000000111111111 |
| 129 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000011111111 |
| 130 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_WRITE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 131 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 132 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 133 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000100000000 |
| 134 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 135 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_RMASK 64'b0000000000000000000000000000000000000000000000000000000111111111 |
| 136 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_RESERVED_BIT_MASK 64'b1111111111111111111111111111111111111111111111111111111000000000 |
| 137 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000111111111 |
| 138 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000001 |
| 139 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_INTERNAL_REG 1 |
| 140 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_ALIASED_FROM 0 |
| 141 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_ZERO_TIME_OMNI 1 |
| 142 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_HW_ACC_JTAG_RD 1 |
| 143 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_HW_ACC_JTAG_WR 1 |
| 144 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_HW_ACC_PIO_SLOW_RD 1 |
| 145 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_HW_ACC_PIO_SLOW_WR 1 |
| 146 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_HW_ACC_PIO_MED_RD 1 |
| 147 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_HW_ACC_PIO_MED_WR 1 |
| 148 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_HW_ACC_PIO_FAST_RD 1 |
| 149 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_HW_ACC_PIO_FAST_WR 1 |
| 150 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_NUM_FIELDS 2 |
| 151 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_DRAIN_FID 0 |
| 152 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_DRAIN_SLC 8:8 |
| 153 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_DRAIN_WIDTH 1 |
| 154 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_DRAIN_INT_SLC 0:0 |
| 155 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_DRAIN_POSITION 8 |
| 156 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_DRAIN_FMASK 64'b0000000000000000000000000000000000000000000000000000000100000000 |
| 157 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_DRAIN_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000100000000 |
| 158 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_DRAIN_POR_VALUE 1'b0 |
| 159 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_DRAIN_FIELD_NAME "drain" |
| 160 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_STATUS_FID 1 |
| 161 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_STATUS_SLC 7:0 |
| 162 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_STATUS_WIDTH 8 |
| 163 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_STATUS_INT_SLC 7:0 |
| 164 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_STATUS_POSITION 0 |
| 165 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_STATUS_FMASK 64'b0000000000000000000000000000000000000000000000000000000011111111 |
| 166 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_STATUS_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000011111111 |
| 167 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_STATUS_POR_VALUE 8'b00000001 |
| 168 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_STS_STATUS_FIELD_NAME "status" |
| 169 | |
| 170 | //------------------------------------------------------- |
| 171 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_TRN_OFF |
| 172 | //------------------------------------------------------- |
| 173 | |
| 174 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TRN_OFF_HW_ADDR 27'b000000011110000000000000010 |
| 175 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TRN_OFF_ADDR 30'b000000011110000000000000010000 |
| 176 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TRN_OFF_NAME "fire_plc_tlu_ctb_tlr_csr_b_trn_off" |
| 177 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TRN_OFF_WIDTH 64 |
| 178 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TRN_OFF_DEPTH 1 |
| 179 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TRN_OFF_SLC 63:0 |
| 180 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TRN_OFF_INT_SLC 63:0 |
| 181 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TRN_OFF_POSITION 0 |
| 182 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TRN_OFF_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_trn_off" |
| 183 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TRN_OFF_LOW_ADDR_WIDTH 0 |
| 184 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TRN_OFF_ADDR_RANGE 26:0 |
| 185 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TRN_OFF_READ_MASK 64'b0000000000000000000000000000000000000000000000000000000000000001 |
| 186 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TRN_OFF_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 187 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TRN_OFF_WRITE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 188 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TRN_OFF_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 189 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TRN_OFF_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000001 |
| 190 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TRN_OFF_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 191 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TRN_OFF_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 192 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TRN_OFF_RMASK 64'b0000000000000000000000000000000000000000000000000000000000000001 |
| 193 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TRN_OFF_RESERVED_BIT_MASK 64'b1111111111111111111111111111111111111111111111111111111111111110 |
| 194 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TRN_OFF_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000001 |
| 195 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TRN_OFF_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 196 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TRN_OFF_INTERNAL_REG 1 |
| 197 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TRN_OFF_ALIASED_FROM 0 |
| 198 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TRN_OFF_ZERO_TIME_OMNI 1 |
| 199 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TRN_OFF_HW_ACC_JTAG_RD 1 |
| 200 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TRN_OFF_HW_ACC_JTAG_WR 1 |
| 201 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TRN_OFF_HW_ACC_PIO_SLOW_RD 1 |
| 202 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TRN_OFF_HW_ACC_PIO_SLOW_WR 1 |
| 203 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TRN_OFF_HW_ACC_PIO_MED_RD 1 |
| 204 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TRN_OFF_HW_ACC_PIO_MED_WR 1 |
| 205 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TRN_OFF_HW_ACC_PIO_FAST_RD 1 |
| 206 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TRN_OFF_HW_ACC_PIO_FAST_WR 1 |
| 207 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TRN_OFF_NUM_FIELDS 1 |
| 208 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TRN_OFF_PTO_FID 0 |
| 209 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TRN_OFF_PTO_SLC 0:0 |
| 210 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TRN_OFF_PTO_WIDTH 1 |
| 211 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TRN_OFF_PTO_INT_SLC 0:0 |
| 212 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TRN_OFF_PTO_POSITION 0 |
| 213 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TRN_OFF_PTO_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000001 |
| 214 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TRN_OFF_PTO_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000001 |
| 215 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TRN_OFF_PTO_POR_VALUE 1'b0 |
| 216 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TRN_OFF_PTO_FIELD_NAME "pto" |
| 217 | |
| 218 | //------------------------------------------------------- |
| 219 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI |
| 220 | //------------------------------------------------------- |
| 221 | |
| 222 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_HW_ADDR 27'b000000011110000000000000011 |
| 223 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_ADDR 30'b000000011110000000000000011000 |
| 224 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_NAME "fire_plc_tlu_ctb_tlr_csr_b_tlu_ici" |
| 225 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_WIDTH 64 |
| 226 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_DEPTH 1 |
| 227 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_SLC 63:0 |
| 228 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_INT_SLC 63:0 |
| 229 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_POSITION 0 |
| 230 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_tlu_ici" |
| 231 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_LOW_ADDR_WIDTH 0 |
| 232 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_ADDR_RANGE 26:0 |
| 233 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_READ_MASK 64'b0000111111111111111111111111111111111111111111111111111111111111 |
| 234 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_READ_ONLY_MASK 64'b0000111111111111111111110000000011111111111100000000000000000000 |
| 235 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_WRITE_MASK 64'b0000000000000000000000001111111100000000000011111111111111111111 |
| 236 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 237 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 238 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 239 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 240 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_RMASK 64'b0000111111111111111111111111111111111111111111111111111111111111 |
| 241 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_RESERVED_BIT_MASK 64'b1111000000000000000000000000000000000000000000000000000000000000 |
| 242 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 243 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_POR_VALUE 64'b0000000000000000000000000001000000000000000000100000000011000000 |
| 244 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_INTERNAL_REG 1 |
| 245 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_ALIASED_FROM 0 |
| 246 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_ZERO_TIME_OMNI 1 |
| 247 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_HW_ACC_JTAG_RD 1 |
| 248 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_HW_ACC_JTAG_WR 1 |
| 249 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_HW_ACC_PIO_SLOW_RD 1 |
| 250 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_HW_ACC_PIO_SLOW_WR 1 |
| 251 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_HW_ACC_PIO_MED_RD 1 |
| 252 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_HW_ACC_PIO_MED_WR 1 |
| 253 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_HW_ACC_PIO_FAST_RD 1 |
| 254 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_HW_ACC_PIO_FAST_WR 1 |
| 255 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_NUM_FIELDS 6 |
| 256 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_CHC_FID 0 |
| 257 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_CHC_SLC 59:52 |
| 258 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_CHC_WIDTH 8 |
| 259 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_CHC_INT_SLC 7:0 |
| 260 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_CHC_POSITION 52 |
| 261 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_CHC_FMASK 64'b0000111111110000000000000000000000000000000000000000000000000000 |
| 262 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_CHC_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 263 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_CHC_POR_VALUE 8'b00000000 |
| 264 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_CHC_FIELD_NAME "chc" |
| 265 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_CDC_FID 1 |
| 266 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_CDC_SLC 51:40 |
| 267 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_CDC_WIDTH 12 |
| 268 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_CDC_INT_SLC 11:0 |
| 269 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_CDC_POSITION 40 |
| 270 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_CDC_FMASK 64'b0000000000001111111111110000000000000000000000000000000000000000 |
| 271 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_CDC_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 272 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_CDC_POR_VALUE 12'b000000000000 |
| 273 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_CDC_FIELD_NAME "cdc" |
| 274 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_NHC_FID 2 |
| 275 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_NHC_SLC 39:32 |
| 276 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_NHC_WIDTH 8 |
| 277 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_NHC_INT_SLC 7:0 |
| 278 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_NHC_POSITION 32 |
| 279 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_NHC_FMASK 64'b0000000000000000000000001111111100000000000000000000000000000000 |
| 280 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_NHC_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 281 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_NHC_POR_VALUE 8'b00010000 |
| 282 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_NHC_FIELD_NAME "nhc" |
| 283 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_NDC_FID 3 |
| 284 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_NDC_SLC 31:20 |
| 285 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_NDC_WIDTH 12 |
| 286 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_NDC_INT_SLC 11:0 |
| 287 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_NDC_POSITION 20 |
| 288 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_NDC_FMASK 64'b0000000000000000000000000000000011111111111100000000000000000000 |
| 289 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_NDC_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 290 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_NDC_POR_VALUE 12'b000000000000 |
| 291 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_NDC_FIELD_NAME "ndc" |
| 292 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_PHC_FID 4 |
| 293 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_PHC_SLC 19:12 |
| 294 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_PHC_WIDTH 8 |
| 295 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_PHC_INT_SLC 7:0 |
| 296 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_PHC_POSITION 12 |
| 297 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_PHC_FMASK 64'b0000000000000000000000000000000000000000000011111111000000000000 |
| 298 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_PHC_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 299 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_PHC_POR_VALUE 8'b00100000 |
| 300 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_PHC_FIELD_NAME "phc" |
| 301 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_PDC_FID 5 |
| 302 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_PDC_SLC 11:0 |
| 303 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_PDC_WIDTH 12 |
| 304 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_PDC_INT_SLC 11:0 |
| 305 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_PDC_POSITION 0 |
| 306 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_PDC_FMASK 64'b0000000000000000000000000000000000000000000000000000111111111111 |
| 307 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_PDC_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 308 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_PDC_POR_VALUE 12'b000011000000 |
| 309 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICI_PDC_FIELD_NAME "pdc" |
| 310 | |
| 311 | //------------------------------------------------------- |
| 312 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG |
| 313 | //------------------------------------------------------- |
| 314 | |
| 315 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_HW_ADDR 27'b000000011110000000000100000 |
| 316 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_ADDR 30'b000000011110000000000100000000 |
| 317 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_NAME "fire_plc_tlu_ctb_tlr_csr_b_tlu_diag" |
| 318 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_WIDTH 64 |
| 319 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_DEPTH 1 |
| 320 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_SLC 63:0 |
| 321 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_INT_SLC 63:0 |
| 322 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_POSITION 0 |
| 323 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_tlu_diag" |
| 324 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_LOW_ADDR_WIDTH 0 |
| 325 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_ADDR_RANGE 26:0 |
| 326 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_READ_MASK 64'b0000111110000000111111111111111111111111111111111111111111110011 |
| 327 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 328 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_WRITE_MASK 64'b0000111100000000111111111111111111111111111111111111111100000011 |
| 329 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 330 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_SET_MASK 64'b0000000010000000000000000000000000000000000000000000000011110000 |
| 331 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 332 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 333 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_RMASK 64'b0000111110000000111111111111111111111111111111111111111111110011 |
| 334 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_RESERVED_BIT_MASK 64'b1111000001111111000000000000000000000000000000000000000000001100 |
| 335 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_HW_LD_MASK 64'b0000000010000000000000000000000000000000000000000000000011110000 |
| 336 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 337 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_INTERNAL_REG 1 |
| 338 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_ALIASED_FROM 0 |
| 339 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_ZERO_TIME_OMNI 1 |
| 340 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_HW_ACC_JTAG_RD 1 |
| 341 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_HW_ACC_JTAG_WR 1 |
| 342 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_HW_ACC_PIO_SLOW_RD 1 |
| 343 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_HW_ACC_PIO_SLOW_WR 1 |
| 344 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_HW_ACC_PIO_MED_RD 1 |
| 345 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_HW_ACC_PIO_MED_WR 1 |
| 346 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_HW_ACC_PIO_FAST_RD 1 |
| 347 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_HW_ACC_PIO_FAST_WR 1 |
| 348 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_NUM_FIELDS 12 |
| 349 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_ERBI_PAR_FID 0 |
| 350 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_ERBI_PAR_SLC 59:56 |
| 351 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_ERBI_PAR_WIDTH 4 |
| 352 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_ERBI_PAR_INT_SLC 3:0 |
| 353 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_ERBI_PAR_POSITION 56 |
| 354 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_ERBI_PAR_FMASK 64'b0000111100000000000000000000000000000000000000000000000000000000 |
| 355 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_ERBI_PAR_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 356 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_ERBI_PAR_POR_VALUE 4'b0000 |
| 357 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_ERBI_PAR_FIELD_NAME "erbi_par" |
| 358 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_ERBI_TRG_FID 1 |
| 359 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_ERBI_TRG_SLC 55:55 |
| 360 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_ERBI_TRG_WIDTH 1 |
| 361 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_ERBI_TRG_INT_SLC 0:0 |
| 362 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_ERBI_TRG_POSITION 55 |
| 363 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_ERBI_TRG_FMASK 64'b0000000010000000000000000000000000000000000000000000000000000000 |
| 364 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_ERBI_TRG_HW_LD_MASK 64'b0000000010000000000000000000000000000000000000000000000000000000 |
| 365 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_ERBI_TRG_POR_VALUE 1'b0 |
| 366 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_ERBI_TRG_FIELD_NAME "erbi_trg" |
| 367 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_CHK_DIS_FID 2 |
| 368 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_CHK_DIS_SLC 47:32 |
| 369 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_CHK_DIS_WIDTH 16 |
| 370 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_CHK_DIS_INT_SLC 15:0 |
| 371 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_CHK_DIS_POSITION 32 |
| 372 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_CHK_DIS_FMASK 64'b0000000000000000111111111111111100000000000000000000000000000000 |
| 373 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_CHK_DIS_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 374 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_CHK_DIS_POR_VALUE 16'b0000000000000000 |
| 375 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_CHK_DIS_FIELD_NAME "chk_dis" |
| 376 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_EPI_PAR_FID 3 |
| 377 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_EPI_PAR_SLC 31:16 |
| 378 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_EPI_PAR_WIDTH 16 |
| 379 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_EPI_PAR_INT_SLC 15:0 |
| 380 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_EPI_PAR_POSITION 16 |
| 381 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_EPI_PAR_FMASK 64'b0000000000000000000000000000000011111111111111110000000000000000 |
| 382 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_EPI_PAR_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 383 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_EPI_PAR_POR_VALUE 16'b0000000000000000 |
| 384 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_EPI_PAR_FIELD_NAME "epi_par" |
| 385 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IDI_PAR_FID 4 |
| 386 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IDI_PAR_SLC 15:12 |
| 387 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IDI_PAR_WIDTH 4 |
| 388 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IDI_PAR_INT_SLC 3:0 |
| 389 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IDI_PAR_POSITION 12 |
| 390 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IDI_PAR_FMASK 64'b0000000000000000000000000000000000000000000000001111000000000000 |
| 391 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IDI_PAR_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 392 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IDI_PAR_POR_VALUE 4'b0000 |
| 393 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IDI_PAR_FIELD_NAME "idi_par" |
| 394 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IHI_PAR_FID 5 |
| 395 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IHI_PAR_SLC 11:8 |
| 396 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IHI_PAR_WIDTH 4 |
| 397 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IHI_PAR_INT_SLC 3:0 |
| 398 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IHI_PAR_POSITION 8 |
| 399 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IHI_PAR_FMASK 64'b0000000000000000000000000000000000000000000000000000111100000000 |
| 400 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IHI_PAR_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 401 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IHI_PAR_POR_VALUE 4'b0000 |
| 402 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IHI_PAR_FIELD_NAME "ihi_par" |
| 403 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_EPI_TRG_FID 6 |
| 404 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_EPI_TRG_SLC 7:7 |
| 405 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_EPI_TRG_WIDTH 1 |
| 406 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_EPI_TRG_INT_SLC 0:0 |
| 407 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_EPI_TRG_POSITION 7 |
| 408 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_EPI_TRG_FMASK 64'b0000000000000000000000000000000000000000000000000000000010000000 |
| 409 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_EPI_TRG_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000010000000 |
| 410 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_EPI_TRG_POR_VALUE 1'b0 |
| 411 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_EPI_TRG_FIELD_NAME "epi_trg" |
| 412 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IDI_TRG_FID 7 |
| 413 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IDI_TRG_SLC 6:6 |
| 414 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IDI_TRG_WIDTH 1 |
| 415 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IDI_TRG_INT_SLC 0:0 |
| 416 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IDI_TRG_POSITION 6 |
| 417 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IDI_TRG_FMASK 64'b0000000000000000000000000000000000000000000000000000000001000000 |
| 418 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IDI_TRG_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000001000000 |
| 419 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IDI_TRG_POR_VALUE 1'b0 |
| 420 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IDI_TRG_FIELD_NAME "idi_trg" |
| 421 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IHI_TRG_FID 8 |
| 422 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IHI_TRG_SLC 5:5 |
| 423 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IHI_TRG_WIDTH 1 |
| 424 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IHI_TRG_INT_SLC 0:0 |
| 425 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IHI_TRG_POSITION 5 |
| 426 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IHI_TRG_FMASK 64'b0000000000000000000000000000000000000000000000000000000000100000 |
| 427 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IHI_TRG_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000100000 |
| 428 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IHI_TRG_POR_VALUE 1'b0 |
| 429 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IHI_TRG_FIELD_NAME "ihi_trg" |
| 430 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_MRC_TRG_FID 9 |
| 431 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_MRC_TRG_SLC 4:4 |
| 432 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_MRC_TRG_WIDTH 1 |
| 433 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_MRC_TRG_INT_SLC 0:0 |
| 434 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_MRC_TRG_POSITION 4 |
| 435 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_MRC_TRG_FMASK 64'b0000000000000000000000000000000000000000000000000000000000010000 |
| 436 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_MRC_TRG_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000010000 |
| 437 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_MRC_TRG_POR_VALUE 1'b0 |
| 438 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_MRC_TRG_FIELD_NAME "mrc_trg" |
| 439 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_EPP_DIS_FID 10 |
| 440 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_EPP_DIS_SLC 1:1 |
| 441 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_EPP_DIS_WIDTH 1 |
| 442 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_EPP_DIS_INT_SLC 0:0 |
| 443 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_EPP_DIS_POSITION 1 |
| 444 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_EPP_DIS_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000010 |
| 445 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_EPP_DIS_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 446 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_EPP_DIS_POR_VALUE 1'b0 |
| 447 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_EPP_DIS_FIELD_NAME "epp_dis" |
| 448 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IFC_DIS_FID 11 |
| 449 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IFC_DIS_SLC 0:0 |
| 450 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IFC_DIS_WIDTH 1 |
| 451 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IFC_DIS_INT_SLC 0:0 |
| 452 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IFC_DIS_POSITION 0 |
| 453 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IFC_DIS_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000001 |
| 454 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IFC_DIS_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 455 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IFC_DIS_POR_VALUE 1'b0 |
| 456 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DIAG_IFC_DIS_FIELD_NAME "ifc_dis" |
| 457 | |
| 458 | //------------------------------------------------------- |
| 459 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC |
| 460 | //------------------------------------------------------- |
| 461 | |
| 462 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_HW_ADDR 27'b000000011110000000001000000 |
| 463 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_ADDR 30'b000000011110000000001000000000 |
| 464 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_NAME "fire_plc_tlu_ctb_tlr_csr_b_tlu_ecc" |
| 465 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_WIDTH 64 |
| 466 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_DEPTH 1 |
| 467 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_SLC 63:0 |
| 468 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_INT_SLC 63:0 |
| 469 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_POSITION 0 |
| 470 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_tlu_ecc" |
| 471 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_LOW_ADDR_WIDTH 0 |
| 472 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_ADDR_RANGE 26:0 |
| 473 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_READ_MASK 64'b0111111111111111111111111111111111111111111111111111111111111111 |
| 474 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_READ_ONLY_MASK 64'b0111111111111111111111111111111111111111111111111111111111111111 |
| 475 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_WRITE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 476 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 477 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 478 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 479 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 480 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_RMASK 64'b0111111111111111111111111111111111111111111111111111111111111111 |
| 481 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_RESERVED_BIT_MASK 64'b1000000000000000000000000000000000000000000000000000000000000000 |
| 482 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_HW_LD_MASK 64'b0111111111111111111111111111111111111111111111111111111111111111 |
| 483 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 484 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_INTERNAL_REG 0 |
| 485 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_EXTERNAL_DECODE_REG 1 |
| 486 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_ALIASED_FROM 0 |
| 487 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_ZERO_TIME_OMNI 0 |
| 488 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_HW_ACC_JTAG_RD 1 |
| 489 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_HW_ACC_JTAG_WR 1 |
| 490 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_HW_ACC_PIO_SLOW_RD 1 |
| 491 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_HW_ACC_PIO_SLOW_WR 1 |
| 492 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_HW_ACC_PIO_MED_RD 1 |
| 493 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_HW_ACC_PIO_MED_WR 1 |
| 494 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_HW_ACC_PIO_FAST_RD 1 |
| 495 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_HW_ACC_PIO_FAST_WR 1 |
| 496 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_NUM_FIELDS 9 |
| 497 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_CHI_FID 0 |
| 498 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_CHI_SLC 62:62 |
| 499 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_CHI_WIDTH 1 |
| 500 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_CHI_INT_SLC 0:0 |
| 501 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_CHI_POSITION 62 |
| 502 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_CHI_FMASK 64'b0100000000000000000000000000000000000000000000000000000000000000 |
| 503 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_CHI_HW_LD_MASK 64'b0100000000000000000000000000000000000000000000000000000000000000 |
| 504 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_CHI_POR_VALUE 1'b0 |
| 505 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_CHI_FIELD_NAME "chi" |
| 506 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_NHI_FID 1 |
| 507 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_NHI_SLC 61:61 |
| 508 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_NHI_WIDTH 1 |
| 509 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_NHI_INT_SLC 0:0 |
| 510 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_NHI_POSITION 61 |
| 511 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_NHI_FMASK 64'b0010000000000000000000000000000000000000000000000000000000000000 |
| 512 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_NHI_HW_LD_MASK 64'b0010000000000000000000000000000000000000000000000000000000000000 |
| 513 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_NHI_POR_VALUE 1'b0 |
| 514 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_NHI_FIELD_NAME "nhi" |
| 515 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_PHI_FID 2 |
| 516 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_PHI_SLC 60:60 |
| 517 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_PHI_WIDTH 1 |
| 518 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_PHI_INT_SLC 0:0 |
| 519 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_PHI_POSITION 60 |
| 520 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_PHI_FMASK 64'b0001000000000000000000000000000000000000000000000000000000000000 |
| 521 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_PHI_HW_LD_MASK 64'b0001000000000000000000000000000000000000000000000000000000000000 |
| 522 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_PHI_POR_VALUE 1'b0 |
| 523 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_PHI_FIELD_NAME "phi" |
| 524 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_CHC_FID 3 |
| 525 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_CHC_SLC 59:52 |
| 526 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_CHC_WIDTH 8 |
| 527 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_CHC_INT_SLC 7:0 |
| 528 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_CHC_POSITION 52 |
| 529 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_CHC_FMASK 64'b0000111111110000000000000000000000000000000000000000000000000000 |
| 530 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_CHC_HW_LD_MASK 64'b0000111111110000000000000000000000000000000000000000000000000000 |
| 531 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_CHC_POR_VALUE 8'b00000000 |
| 532 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_CHC_FIELD_NAME "chc" |
| 533 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_CDC_FID 4 |
| 534 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_CDC_SLC 51:40 |
| 535 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_CDC_WIDTH 12 |
| 536 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_CDC_INT_SLC 11:0 |
| 537 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_CDC_POSITION 40 |
| 538 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_CDC_FMASK 64'b0000000000001111111111110000000000000000000000000000000000000000 |
| 539 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_CDC_HW_LD_MASK 64'b0000000000001111111111110000000000000000000000000000000000000000 |
| 540 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_CDC_POR_VALUE 12'b000000000000 |
| 541 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_CDC_FIELD_NAME "cdc" |
| 542 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_NHC_FID 5 |
| 543 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_NHC_SLC 39:32 |
| 544 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_NHC_WIDTH 8 |
| 545 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_NHC_INT_SLC 7:0 |
| 546 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_NHC_POSITION 32 |
| 547 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_NHC_FMASK 64'b0000000000000000000000001111111100000000000000000000000000000000 |
| 548 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_NHC_HW_LD_MASK 64'b0000000000000000000000001111111100000000000000000000000000000000 |
| 549 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_NHC_POR_VALUE 8'b00000000 |
| 550 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_NHC_FIELD_NAME "nhc" |
| 551 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_NDC_FID 6 |
| 552 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_NDC_SLC 31:20 |
| 553 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_NDC_WIDTH 12 |
| 554 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_NDC_INT_SLC 11:0 |
| 555 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_NDC_POSITION 20 |
| 556 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_NDC_FMASK 64'b0000000000000000000000000000000011111111111100000000000000000000 |
| 557 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_NDC_HW_LD_MASK 64'b0000000000000000000000000000000011111111111100000000000000000000 |
| 558 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_NDC_POR_VALUE 12'b000000000000 |
| 559 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_NDC_FIELD_NAME "ndc" |
| 560 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_PHC_FID 7 |
| 561 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_PHC_SLC 19:12 |
| 562 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_PHC_WIDTH 8 |
| 563 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_PHC_INT_SLC 7:0 |
| 564 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_PHC_POSITION 12 |
| 565 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_PHC_FMASK 64'b0000000000000000000000000000000000000000000011111111000000000000 |
| 566 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_PHC_HW_LD_MASK 64'b0000000000000000000000000000000000000000000011111111000000000000 |
| 567 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_PHC_POR_VALUE 8'b00000000 |
| 568 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_PHC_FIELD_NAME "phc" |
| 569 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_PDC_FID 8 |
| 570 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_PDC_SLC 11:0 |
| 571 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_PDC_WIDTH 12 |
| 572 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_PDC_INT_SLC 11:0 |
| 573 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_PDC_POSITION 0 |
| 574 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_PDC_FMASK 64'b0000000000000000000000000000000000000000000000000000111111111111 |
| 575 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_PDC_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000111111111111 |
| 576 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_PDC_POR_VALUE 12'b000000000000 |
| 577 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECC_PDC_FIELD_NAME "pdc" |
| 578 | |
| 579 | //------------------------------------------------------- |
| 580 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL |
| 581 | //------------------------------------------------------- |
| 582 | |
| 583 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_HW_ADDR 27'b000000011110000000001000001 |
| 584 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_ADDR 30'b000000011110000000001000001000 |
| 585 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_NAME "fire_plc_tlu_ctb_tlr_csr_b_tlu_ecl" |
| 586 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_WIDTH 64 |
| 587 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_DEPTH 1 |
| 588 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_SLC 63:0 |
| 589 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_INT_SLC 63:0 |
| 590 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_POSITION 0 |
| 591 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_tlu_ecl" |
| 592 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_LOW_ADDR_WIDTH 0 |
| 593 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_ADDR_RANGE 26:0 |
| 594 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_READ_MASK 64'b0111111111111111111111111111111111111111111111111111111111111111 |
| 595 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_READ_ONLY_MASK 64'b0111111111111111111111111111111111111111111111111111111111111111 |
| 596 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_WRITE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 597 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 598 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 599 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 600 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 601 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_RMASK 64'b0111111111111111111111111111111111111111111111111111111111111111 |
| 602 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_RESERVED_BIT_MASK 64'b1000000000000000000000000000000000000000000000000000000000000000 |
| 603 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_HW_LD_MASK 64'b0111111111111111111111111111111111111111111111111111111111111111 |
| 604 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 605 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_INTERNAL_REG 0 |
| 606 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_EXTERNAL_DECODE_REG 1 |
| 607 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_ALIASED_FROM 0 |
| 608 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_ZERO_TIME_OMNI 0 |
| 609 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_HW_ACC_JTAG_RD 1 |
| 610 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_HW_ACC_JTAG_WR 1 |
| 611 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_HW_ACC_PIO_SLOW_RD 1 |
| 612 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_HW_ACC_PIO_SLOW_WR 1 |
| 613 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_HW_ACC_PIO_MED_RD 1 |
| 614 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_HW_ACC_PIO_MED_WR 1 |
| 615 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_HW_ACC_PIO_FAST_RD 1 |
| 616 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_HW_ACC_PIO_FAST_WR 1 |
| 617 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_NUM_FIELDS 9 |
| 618 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_CDI_FID 0 |
| 619 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_CDI_SLC 62:62 |
| 620 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_CDI_WIDTH 1 |
| 621 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_CDI_INT_SLC 0:0 |
| 622 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_CDI_POSITION 62 |
| 623 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_CDI_FMASK 64'b0100000000000000000000000000000000000000000000000000000000000000 |
| 624 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_CDI_HW_LD_MASK 64'b0100000000000000000000000000000000000000000000000000000000000000 |
| 625 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_CDI_POR_VALUE 1'b0 |
| 626 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_CDI_FIELD_NAME "cdi" |
| 627 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_NDI_FID 1 |
| 628 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_NDI_SLC 61:61 |
| 629 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_NDI_WIDTH 1 |
| 630 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_NDI_INT_SLC 0:0 |
| 631 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_NDI_POSITION 61 |
| 632 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_NDI_FMASK 64'b0010000000000000000000000000000000000000000000000000000000000000 |
| 633 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_NDI_HW_LD_MASK 64'b0010000000000000000000000000000000000000000000000000000000000000 |
| 634 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_NDI_POR_VALUE 1'b0 |
| 635 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_NDI_FIELD_NAME "ndi" |
| 636 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_PDI_FID 2 |
| 637 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_PDI_SLC 60:60 |
| 638 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_PDI_WIDTH 1 |
| 639 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_PDI_INT_SLC 0:0 |
| 640 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_PDI_POSITION 60 |
| 641 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_PDI_FMASK 64'b0001000000000000000000000000000000000000000000000000000000000000 |
| 642 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_PDI_HW_LD_MASK 64'b0001000000000000000000000000000000000000000000000000000000000000 |
| 643 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_PDI_POR_VALUE 1'b0 |
| 644 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_PDI_FIELD_NAME "pdi" |
| 645 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_CHC_FID 3 |
| 646 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_CHC_SLC 59:52 |
| 647 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_CHC_WIDTH 8 |
| 648 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_CHC_INT_SLC 7:0 |
| 649 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_CHC_POSITION 52 |
| 650 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_CHC_FMASK 64'b0000111111110000000000000000000000000000000000000000000000000000 |
| 651 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_CHC_HW_LD_MASK 64'b0000111111110000000000000000000000000000000000000000000000000000 |
| 652 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_CHC_POR_VALUE 8'b00000000 |
| 653 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_CHC_FIELD_NAME "chc" |
| 654 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_CDC_FID 4 |
| 655 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_CDC_SLC 51:40 |
| 656 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_CDC_WIDTH 12 |
| 657 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_CDC_INT_SLC 11:0 |
| 658 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_CDC_POSITION 40 |
| 659 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_CDC_FMASK 64'b0000000000001111111111110000000000000000000000000000000000000000 |
| 660 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_CDC_HW_LD_MASK 64'b0000000000001111111111110000000000000000000000000000000000000000 |
| 661 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_CDC_POR_VALUE 12'b000000000000 |
| 662 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_CDC_FIELD_NAME "cdc" |
| 663 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_NHC_FID 5 |
| 664 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_NHC_SLC 39:32 |
| 665 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_NHC_WIDTH 8 |
| 666 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_NHC_INT_SLC 7:0 |
| 667 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_NHC_POSITION 32 |
| 668 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_NHC_FMASK 64'b0000000000000000000000001111111100000000000000000000000000000000 |
| 669 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_NHC_HW_LD_MASK 64'b0000000000000000000000001111111100000000000000000000000000000000 |
| 670 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_NHC_POR_VALUE 8'b00000000 |
| 671 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_NHC_FIELD_NAME "nhc" |
| 672 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_NDC_FID 6 |
| 673 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_NDC_SLC 31:20 |
| 674 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_NDC_WIDTH 12 |
| 675 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_NDC_INT_SLC 11:0 |
| 676 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_NDC_POSITION 20 |
| 677 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_NDC_FMASK 64'b0000000000000000000000000000000011111111111100000000000000000000 |
| 678 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_NDC_HW_LD_MASK 64'b0000000000000000000000000000000011111111111100000000000000000000 |
| 679 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_NDC_POR_VALUE 12'b000000000000 |
| 680 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_NDC_FIELD_NAME "ndc" |
| 681 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_PHC_FID 7 |
| 682 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_PHC_SLC 19:12 |
| 683 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_PHC_WIDTH 8 |
| 684 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_PHC_INT_SLC 7:0 |
| 685 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_PHC_POSITION 12 |
| 686 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_PHC_FMASK 64'b0000000000000000000000000000000000000000000011111111000000000000 |
| 687 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_PHC_HW_LD_MASK 64'b0000000000000000000000000000000000000000000011111111000000000000 |
| 688 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_PHC_POR_VALUE 8'b00000000 |
| 689 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_PHC_FIELD_NAME "phc" |
| 690 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_PDC_FID 8 |
| 691 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_PDC_SLC 11:0 |
| 692 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_PDC_WIDTH 12 |
| 693 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_PDC_INT_SLC 11:0 |
| 694 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_PDC_POSITION 0 |
| 695 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_PDC_FMASK 64'b0000000000000000000000000000000000000000000000000000111111111111 |
| 696 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_PDC_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000111111111111 |
| 697 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_PDC_POR_VALUE 12'b000000000000 |
| 698 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ECL_PDC_FIELD_NAME "pdc" |
| 699 | |
| 700 | //------------------------------------------------------- |
| 701 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB |
| 702 | //------------------------------------------------------- |
| 703 | |
| 704 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_HW_ADDR 27'b000000011110000000001000010 |
| 705 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_ADDR 30'b000000011110000000001000010000 |
| 706 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_NAME "fire_plc_tlu_ctb_tlr_csr_b_tlu_erb" |
| 707 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_WIDTH 64 |
| 708 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_DEPTH 1 |
| 709 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_SLC 63:0 |
| 710 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_INT_SLC 63:0 |
| 711 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_POSITION 0 |
| 712 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_tlu_erb" |
| 713 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_LOW_ADDR_WIDTH 0 |
| 714 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_ADDR_RANGE 26:0 |
| 715 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_READ_MASK 64'b0000000000000000111111111111111100000000000000001111111111111111 |
| 716 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_READ_ONLY_MASK 64'b0000000000000000111111111111111100000000000000001111111111111111 |
| 717 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_WRITE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 718 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 719 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 720 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 721 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 722 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_RMASK 64'b0000000000000000111111111111111100000000000000001111111111111111 |
| 723 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_RESERVED_BIT_MASK 64'b1111111111111111000000000000000011111111111111110000000000000000 |
| 724 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_HW_LD_MASK 64'b0000000000000000111111111111111100000000000000001111111111111111 |
| 725 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_POR_VALUE 64'b0000000000000000000000000000000000000000000000000001000000000000 |
| 726 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_INTERNAL_REG 0 |
| 727 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_EXTERNAL_DECODE_REG 1 |
| 728 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_ALIASED_FROM 0 |
| 729 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_ZERO_TIME_OMNI 0 |
| 730 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_HW_ACC_JTAG_RD 1 |
| 731 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_HW_ACC_JTAG_WR 1 |
| 732 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_HW_ACC_PIO_SLOW_RD 1 |
| 733 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_HW_ACC_PIO_SLOW_WR 1 |
| 734 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_HW_ACC_PIO_MED_RD 1 |
| 735 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_HW_ACC_PIO_MED_WR 1 |
| 736 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_HW_ACC_PIO_FAST_RD 1 |
| 737 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_HW_ACC_PIO_FAST_WR 1 |
| 738 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_NUM_FIELDS 2 |
| 739 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_CC_FID 0 |
| 740 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_CC_SLC 47:32 |
| 741 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_CC_WIDTH 16 |
| 742 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_CC_INT_SLC 15:0 |
| 743 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_CC_POSITION 32 |
| 744 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_CC_FMASK 64'b0000000000000000111111111111111100000000000000000000000000000000 |
| 745 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_CC_HW_LD_MASK 64'b0000000000000000111111111111111100000000000000000000000000000000 |
| 746 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_CC_POR_VALUE 16'b0000000000000000 |
| 747 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_CC_FIELD_NAME "cc" |
| 748 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_CL_FID 1 |
| 749 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_CL_SLC 15:0 |
| 750 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_CL_WIDTH 16 |
| 751 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_CL_INT_SLC 15:0 |
| 752 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_CL_POSITION 0 |
| 753 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_CL_FMASK 64'b0000000000000000000000000000000000000000000000001111111111111111 |
| 754 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_CL_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000001111111111111111 |
| 755 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_CL_POR_VALUE 16'b0001000000000000 |
| 756 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ERB_CL_FIELD_NAME "cl" |
| 757 | |
| 758 | //------------------------------------------------------- |
| 759 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA |
| 760 | //------------------------------------------------------- |
| 761 | |
| 762 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_HW_ADDR 27'b000000011110000000001000011 |
| 763 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_ADDR 30'b000000011110000000001000011000 |
| 764 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_NAME "fire_plc_tlu_ctb_tlr_csr_b_tlu_ica" |
| 765 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_WIDTH 64 |
| 766 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_DEPTH 1 |
| 767 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_SLC 63:0 |
| 768 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_INT_SLC 63:0 |
| 769 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_POSITION 0 |
| 770 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_tlu_ica" |
| 771 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_LOW_ADDR_WIDTH 0 |
| 772 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_ADDR_RANGE 26:0 |
| 773 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_READ_MASK 64'b0000111111111111111111111111111111111111111111111111111111111111 |
| 774 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_READ_ONLY_MASK 64'b0000111111111111111111111111111111111111111111111111111111111111 |
| 775 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_WRITE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 776 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 777 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 778 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 779 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 780 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_RMASK 64'b0000111111111111111111111111111111111111111111111111111111111111 |
| 781 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_RESERVED_BIT_MASK 64'b1111000000000000000000000000000000000000000000000000000000000000 |
| 782 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_HW_LD_MASK 64'b0000111111111111111111111111111111111111111111111111111111111111 |
| 783 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_POR_VALUE 64'b0000000000000000000000000001000000000000000000100000000011000000 |
| 784 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_INTERNAL_REG 0 |
| 785 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_EXTERNAL_DECODE_REG 1 |
| 786 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_ALIASED_FROM 0 |
| 787 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_ZERO_TIME_OMNI 0 |
| 788 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_HW_ACC_JTAG_RD 1 |
| 789 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_HW_ACC_JTAG_WR 1 |
| 790 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_HW_ACC_PIO_SLOW_RD 1 |
| 791 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_HW_ACC_PIO_SLOW_WR 1 |
| 792 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_HW_ACC_PIO_MED_RD 1 |
| 793 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_HW_ACC_PIO_MED_WR 1 |
| 794 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_HW_ACC_PIO_FAST_RD 1 |
| 795 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_HW_ACC_PIO_FAST_WR 1 |
| 796 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_NUM_FIELDS 6 |
| 797 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_CHC_FID 0 |
| 798 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_CHC_SLC 59:52 |
| 799 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_CHC_WIDTH 8 |
| 800 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_CHC_INT_SLC 7:0 |
| 801 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_CHC_POSITION 52 |
| 802 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_CHC_FMASK 64'b0000111111110000000000000000000000000000000000000000000000000000 |
| 803 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_CHC_HW_LD_MASK 64'b0000111111110000000000000000000000000000000000000000000000000000 |
| 804 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_CHC_POR_VALUE 8'b00000000 |
| 805 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_CHC_FIELD_NAME "chc" |
| 806 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_CDC_FID 1 |
| 807 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_CDC_SLC 51:40 |
| 808 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_CDC_WIDTH 12 |
| 809 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_CDC_INT_SLC 11:0 |
| 810 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_CDC_POSITION 40 |
| 811 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_CDC_FMASK 64'b0000000000001111111111110000000000000000000000000000000000000000 |
| 812 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_CDC_HW_LD_MASK 64'b0000000000001111111111110000000000000000000000000000000000000000 |
| 813 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_CDC_POR_VALUE 12'b000000000000 |
| 814 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_CDC_FIELD_NAME "cdc" |
| 815 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_NHC_FID 2 |
| 816 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_NHC_SLC 39:32 |
| 817 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_NHC_WIDTH 8 |
| 818 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_NHC_INT_SLC 7:0 |
| 819 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_NHC_POSITION 32 |
| 820 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_NHC_FMASK 64'b0000000000000000000000001111111100000000000000000000000000000000 |
| 821 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_NHC_HW_LD_MASK 64'b0000000000000000000000001111111100000000000000000000000000000000 |
| 822 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_NHC_POR_VALUE 8'b00010000 |
| 823 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_NHC_FIELD_NAME "nhc" |
| 824 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_NDC_FID 3 |
| 825 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_NDC_SLC 31:20 |
| 826 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_NDC_WIDTH 12 |
| 827 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_NDC_INT_SLC 11:0 |
| 828 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_NDC_POSITION 20 |
| 829 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_NDC_FMASK 64'b0000000000000000000000000000000011111111111100000000000000000000 |
| 830 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_NDC_HW_LD_MASK 64'b0000000000000000000000000000000011111111111100000000000000000000 |
| 831 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_NDC_POR_VALUE 12'b000000000000 |
| 832 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_NDC_FIELD_NAME "ndc" |
| 833 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_PHC_FID 4 |
| 834 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_PHC_SLC 19:12 |
| 835 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_PHC_WIDTH 8 |
| 836 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_PHC_INT_SLC 7:0 |
| 837 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_PHC_POSITION 12 |
| 838 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_PHC_FMASK 64'b0000000000000000000000000000000000000000000011111111000000000000 |
| 839 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_PHC_HW_LD_MASK 64'b0000000000000000000000000000000000000000000011111111000000000000 |
| 840 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_PHC_POR_VALUE 8'b00100000 |
| 841 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_PHC_FIELD_NAME "phc" |
| 842 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_PDC_FID 5 |
| 843 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_PDC_SLC 11:0 |
| 844 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_PDC_WIDTH 12 |
| 845 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_PDC_INT_SLC 11:0 |
| 846 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_PDC_POSITION 0 |
| 847 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_PDC_FMASK 64'b0000000000000000000000000000000000000000000000000000111111111111 |
| 848 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_PDC_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000111111111111 |
| 849 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_PDC_POR_VALUE 12'b000011000000 |
| 850 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICA_PDC_FIELD_NAME "pdc" |
| 851 | |
| 852 | //------------------------------------------------------- |
| 853 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR |
| 854 | //------------------------------------------------------- |
| 855 | |
| 856 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_HW_ADDR 27'b000000011110000000001000100 |
| 857 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_ADDR 30'b000000011110000000001000100000 |
| 858 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_NAME "fire_plc_tlu_ctb_tlr_csr_b_tlu_icr" |
| 859 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_WIDTH 64 |
| 860 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_DEPTH 1 |
| 861 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_SLC 63:0 |
| 862 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_INT_SLC 63:0 |
| 863 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_POSITION 0 |
| 864 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_tlu_icr" |
| 865 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_LOW_ADDR_WIDTH 0 |
| 866 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_ADDR_RANGE 26:0 |
| 867 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_READ_MASK 64'b0000111111111111111111111111111111111111111111111111111111111111 |
| 868 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_READ_ONLY_MASK 64'b0000111111111111111111111111111111111111111111111111111111111111 |
| 869 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_WRITE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 870 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 871 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 872 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 873 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 874 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_RMASK 64'b0000111111111111111111111111111111111111111111111111111111111111 |
| 875 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_RESERVED_BIT_MASK 64'b1111000000000000000000000000000000000000000000000000000000000000 |
| 876 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_HW_LD_MASK 64'b0000111111111111111111111111111111111111111111111111111111111111 |
| 877 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 878 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_INTERNAL_REG 0 |
| 879 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_EXTERNAL_DECODE_REG 1 |
| 880 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_ALIASED_FROM 0 |
| 881 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_ZERO_TIME_OMNI 0 |
| 882 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_HW_ACC_JTAG_RD 1 |
| 883 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_HW_ACC_JTAG_WR 1 |
| 884 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_HW_ACC_PIO_SLOW_RD 1 |
| 885 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_HW_ACC_PIO_SLOW_WR 1 |
| 886 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_HW_ACC_PIO_MED_RD 1 |
| 887 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_HW_ACC_PIO_MED_WR 1 |
| 888 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_HW_ACC_PIO_FAST_RD 1 |
| 889 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_HW_ACC_PIO_FAST_WR 1 |
| 890 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_NUM_FIELDS 6 |
| 891 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_CHC_FID 0 |
| 892 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_CHC_SLC 59:52 |
| 893 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_CHC_WIDTH 8 |
| 894 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_CHC_INT_SLC 7:0 |
| 895 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_CHC_POSITION 52 |
| 896 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_CHC_FMASK 64'b0000111111110000000000000000000000000000000000000000000000000000 |
| 897 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_CHC_HW_LD_MASK 64'b0000111111110000000000000000000000000000000000000000000000000000 |
| 898 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_CHC_POR_VALUE 8'b00000000 |
| 899 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_CHC_FIELD_NAME "chc" |
| 900 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_CDC_FID 1 |
| 901 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_CDC_SLC 51:40 |
| 902 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_CDC_WIDTH 12 |
| 903 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_CDC_INT_SLC 11:0 |
| 904 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_CDC_POSITION 40 |
| 905 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_CDC_FMASK 64'b0000000000001111111111110000000000000000000000000000000000000000 |
| 906 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_CDC_HW_LD_MASK 64'b0000000000001111111111110000000000000000000000000000000000000000 |
| 907 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_CDC_POR_VALUE 12'b000000000000 |
| 908 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_CDC_FIELD_NAME "cdc" |
| 909 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_NHC_FID 2 |
| 910 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_NHC_SLC 39:32 |
| 911 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_NHC_WIDTH 8 |
| 912 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_NHC_INT_SLC 7:0 |
| 913 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_NHC_POSITION 32 |
| 914 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_NHC_FMASK 64'b0000000000000000000000001111111100000000000000000000000000000000 |
| 915 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_NHC_HW_LD_MASK 64'b0000000000000000000000001111111100000000000000000000000000000000 |
| 916 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_NHC_POR_VALUE 8'b00000000 |
| 917 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_NHC_FIELD_NAME "nhc" |
| 918 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_NDC_FID 3 |
| 919 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_NDC_SLC 31:20 |
| 920 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_NDC_WIDTH 12 |
| 921 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_NDC_INT_SLC 11:0 |
| 922 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_NDC_POSITION 20 |
| 923 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_NDC_FMASK 64'b0000000000000000000000000000000011111111111100000000000000000000 |
| 924 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_NDC_HW_LD_MASK 64'b0000000000000000000000000000000011111111111100000000000000000000 |
| 925 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_NDC_POR_VALUE 12'b000000000000 |
| 926 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_NDC_FIELD_NAME "ndc" |
| 927 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_PHC_FID 4 |
| 928 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_PHC_SLC 19:12 |
| 929 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_PHC_WIDTH 8 |
| 930 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_PHC_INT_SLC 7:0 |
| 931 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_PHC_POSITION 12 |
| 932 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_PHC_FMASK 64'b0000000000000000000000000000000000000000000011111111000000000000 |
| 933 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_PHC_HW_LD_MASK 64'b0000000000000000000000000000000000000000000011111111000000000000 |
| 934 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_PHC_POR_VALUE 8'b00000000 |
| 935 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_PHC_FIELD_NAME "phc" |
| 936 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_PDC_FID 5 |
| 937 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_PDC_SLC 11:0 |
| 938 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_PDC_WIDTH 12 |
| 939 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_PDC_INT_SLC 11:0 |
| 940 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_PDC_POSITION 0 |
| 941 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_PDC_FMASK 64'b0000000000000000000000000000000000000000000000000000111111111111 |
| 942 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_PDC_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000111111111111 |
| 943 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_PDC_POR_VALUE 12'b000000000000 |
| 944 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_ICR_PDC_FIELD_NAME "pdc" |
| 945 | |
| 946 | //------------------------------------------------------- |
| 947 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_LOG |
| 948 | //------------------------------------------------------- |
| 949 | |
| 950 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_LOG_HW_ADDR 27'b000000011110000001000000000 |
| 951 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_LOG_ADDR 30'b000000011110000001000000000000 |
| 952 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_LOG_NAME "fire_plc_tlu_ctb_tlr_csr_b_oe_log" |
| 953 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_LOG_WIDTH 64 |
| 954 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_LOG_DEPTH 1 |
| 955 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_LOG_SLC 63:0 |
| 956 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_LOG_INT_SLC 63:0 |
| 957 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_LOG_POSITION 0 |
| 958 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_LOG_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_oe_log" |
| 959 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_LOG_LOW_ADDR_WIDTH 0 |
| 960 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_LOG_ADDR_RANGE 26:0 |
| 961 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_LOG_READ_MASK 64'b0000000000000000000000000000000000000000111111111111111111111111 |
| 962 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_LOG_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 963 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_LOG_WRITE_MASK 64'b0000000000000000000000000000000000000000111111111111111111111111 |
| 964 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_LOG_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 965 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_LOG_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 966 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_LOG_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 967 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_LOG_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 968 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_LOG_RMASK 64'b0000000000000000000000000000000000000000111111111111111111111111 |
| 969 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_LOG_RESERVED_BIT_MASK 64'b1111111111111111111111111111111111111111000000000000000000000000 |
| 970 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_LOG_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 971 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_LOG_POR_VALUE 64'b0000000000000000000000000000000000000000111111111111111111111111 |
| 972 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_LOG_INTERNAL_REG 1 |
| 973 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_LOG_ALIASED_FROM 0 |
| 974 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_LOG_ZERO_TIME_OMNI 1 |
| 975 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_LOG_HW_ACC_JTAG_RD 1 |
| 976 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_LOG_HW_ACC_JTAG_WR 1 |
| 977 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_LOG_HW_ACC_PIO_SLOW_RD 1 |
| 978 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_LOG_HW_ACC_PIO_SLOW_WR 1 |
| 979 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_LOG_HW_ACC_PIO_MED_RD 1 |
| 980 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_LOG_HW_ACC_PIO_MED_WR 1 |
| 981 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_LOG_HW_ACC_PIO_FAST_RD 1 |
| 982 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_LOG_HW_ACC_PIO_FAST_WR 1 |
| 983 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_LOG_NUM_FIELDS 1 |
| 984 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_LOG_EN_FID 0 |
| 985 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_LOG_EN_SLC 23:0 |
| 986 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_LOG_EN_WIDTH 24 |
| 987 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_LOG_EN_INT_SLC 23:0 |
| 988 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_LOG_EN_POSITION 0 |
| 989 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_LOG_EN_FMASK 64'b0000000000000000000000000000000000000000111111111111111111111111 |
| 990 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_LOG_EN_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 991 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_LOG_EN_POR_VALUE 24'b111111111111111111111111 |
| 992 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_LOG_EN_FIELD_NAME "en" |
| 993 | |
| 994 | //------------------------------------------------------- |
| 995 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN |
| 996 | //------------------------------------------------------- |
| 997 | |
| 998 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_HW_ADDR 27'b000000011110000001000000001 |
| 999 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_ADDR 30'b000000011110000001000000001000 |
| 1000 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_NAME "fire_plc_tlu_ctb_tlr_csr_b_oe_int_en" |
| 1001 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_WIDTH 64 |
| 1002 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_DEPTH 1 |
| 1003 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_SLC 63:0 |
| 1004 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_INT_SLC 63:0 |
| 1005 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_POSITION 0 |
| 1006 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_oe_int_en" |
| 1007 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_LOW_ADDR_WIDTH 0 |
| 1008 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_ADDR_RANGE 26:0 |
| 1009 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_READ_MASK 64'b0000000011111111111111111111111100000000111111111111111111111111 |
| 1010 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 1011 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_WRITE_MASK 64'b0000000011111111111111111111111100000000111111111111111111111111 |
| 1012 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 1013 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 1014 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 1015 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 1016 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_RMASK 64'b0000000011111111111111111111111100000000111111111111111111111111 |
| 1017 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_RESERVED_BIT_MASK 64'b1111111100000000000000000000000011111111000000000000000000000000 |
| 1018 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 1019 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 1020 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_INTERNAL_REG 1 |
| 1021 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_ALIASED_FROM 0 |
| 1022 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_ZERO_TIME_OMNI 1 |
| 1023 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_HW_ACC_JTAG_RD 1 |
| 1024 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_HW_ACC_JTAG_WR 1 |
| 1025 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_HW_ACC_PIO_SLOW_RD 1 |
| 1026 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_HW_ACC_PIO_SLOW_WR 1 |
| 1027 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_HW_ACC_PIO_MED_RD 1 |
| 1028 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_HW_ACC_PIO_MED_WR 1 |
| 1029 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_HW_ACC_PIO_FAST_RD 1 |
| 1030 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_HW_ACC_PIO_FAST_WR 1 |
| 1031 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_NUM_FIELDS 2 |
| 1032 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_EN_S_FID 0 |
| 1033 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_EN_S_SLC 55:32 |
| 1034 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_EN_S_WIDTH 24 |
| 1035 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_EN_S_INT_SLC 23:0 |
| 1036 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_EN_S_POSITION 32 |
| 1037 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_EN_S_FMASK 64'b0000000011111111111111111111111100000000000000000000000000000000 |
| 1038 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_EN_S_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 1039 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_EN_S_POR_VALUE 24'b000000000000000000000000 |
| 1040 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_EN_S_FIELD_NAME "en_s" |
| 1041 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_EN_P_FID 1 |
| 1042 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_EN_P_SLC 23:0 |
| 1043 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_EN_P_WIDTH 24 |
| 1044 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_EN_P_INT_SLC 23:0 |
| 1045 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_EN_P_POSITION 0 |
| 1046 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_EN_P_FMASK 64'b0000000000000000000000000000000000000000111111111111111111111111 |
| 1047 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_EN_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 1048 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_EN_P_POR_VALUE 24'b000000000000000000000000 |
| 1049 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_INT_EN_EN_P_FIELD_NAME "en_p" |
| 1050 | |
| 1051 | //------------------------------------------------------- |
| 1052 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR |
| 1053 | //------------------------------------------------------- |
| 1054 | |
| 1055 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_HW_ADDR 27'b000000011110000001000000010 |
| 1056 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_ADDR 30'b000000011110000001000000010000 |
| 1057 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_NAME "fire_plc_tlu_ctb_tlr_csr_b_oe_en_err" |
| 1058 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_WIDTH 64 |
| 1059 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_DEPTH 1 |
| 1060 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_SLC 63:0 |
| 1061 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_INT_SLC 63:0 |
| 1062 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_POSITION 0 |
| 1063 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_oe_en_err" |
| 1064 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_LOW_ADDR_WIDTH 0 |
| 1065 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_ADDR_RANGE 26:0 |
| 1066 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_READ_MASK 64'b0000000011111111111111111111111100000000111111111111111111111111 |
| 1067 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_READ_ONLY_MASK 64'b0000000011111111111111111111111100000000111111111111111111111111 |
| 1068 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_WRITE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 1069 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 1070 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 1071 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 1072 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 1073 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_RMASK 64'b0000000011111111111111111111111100000000111111111111111111111111 |
| 1074 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_RESERVED_BIT_MASK 64'b1111111100000000000000000000000011111111000000000000000000000000 |
| 1075 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_HW_LD_MASK 64'b0000000011111111111111111111111100000000111111111111111111111111 |
| 1076 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 1077 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_INTERNAL_REG 0 |
| 1078 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_EXTERNAL_DECODE_REG 1 |
| 1079 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_ALIASED_FROM 0 |
| 1080 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_ZERO_TIME_OMNI 0 |
| 1081 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_HW_ACC_JTAG_RD 1 |
| 1082 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_HW_ACC_JTAG_WR 1 |
| 1083 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_HW_ACC_PIO_SLOW_RD 1 |
| 1084 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_HW_ACC_PIO_SLOW_WR 1 |
| 1085 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_HW_ACC_PIO_MED_RD 1 |
| 1086 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_HW_ACC_PIO_MED_WR 1 |
| 1087 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_HW_ACC_PIO_FAST_RD 1 |
| 1088 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_HW_ACC_PIO_FAST_WR 1 |
| 1089 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_NUM_FIELDS 2 |
| 1090 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_ERR_S_FID 0 |
| 1091 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_ERR_S_SLC 55:32 |
| 1092 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_ERR_S_WIDTH 24 |
| 1093 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_ERR_S_INT_SLC 23:0 |
| 1094 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_ERR_S_POSITION 32 |
| 1095 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_ERR_S_FMASK 64'b0000000011111111111111111111111100000000000000000000000000000000 |
| 1096 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_ERR_S_HW_LD_MASK 64'b0000000011111111111111111111111100000000000000000000000000000000 |
| 1097 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_ERR_S_POR_VALUE 24'b000000000000000000000000 |
| 1098 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_ERR_S_FIELD_NAME "err_s" |
| 1099 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_ERR_P_FID 1 |
| 1100 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_ERR_P_SLC 23:0 |
| 1101 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_ERR_P_WIDTH 24 |
| 1102 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_ERR_P_INT_SLC 23:0 |
| 1103 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_ERR_P_POSITION 0 |
| 1104 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_ERR_P_FMASK 64'b0000000000000000000000000000000000000000111111111111111111111111 |
| 1105 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_ERR_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000111111111111111111111111 |
| 1106 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_ERR_P_POR_VALUE 24'b000000000000000000000000 |
| 1107 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_EN_ERR_ERR_P_FIELD_NAME "err_p" |
| 1108 | |
| 1109 | //------------------------------------------------------- |
| 1110 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS |
| 1111 | //------------------------------------------------------- |
| 1112 | |
| 1113 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_HW_ADDR 27'b000000011110000001000000011 |
| 1114 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ADDR 30'b000000011110000001000000011000 |
| 1115 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_NAME "fire_plc_tlu_ctb_tlr_csr_b_oe_err_rw1c_alias" |
| 1116 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_WIDTH 64 |
| 1117 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_DEPTH 1 |
| 1118 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_SLC 63:0 |
| 1119 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_INT_SLC 63:0 |
| 1120 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_POSITION 0 |
| 1121 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_oe_err_rw1c_alias" |
| 1122 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LOW_ADDR_WIDTH 0 |
| 1123 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ADDR_RANGE 26:0 |
| 1124 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_READ_MASK 64'b0000000011111111111111111111111100000000111111111111111111111111 |
| 1125 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 1126 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_WRITE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 1127 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 1128 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 1129 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_CLEAR_MASK 64'b0000000011111111111111111111111100000000111111111111111111111111 |
| 1130 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 1131 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_RMASK 64'b0000000011111111111111111111111100000000111111111111111111111111 |
| 1132 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_RESERVED_BIT_MASK 64'b1111111100000000000000000000000011111111000000000000000000000000 |
| 1133 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_HW_LD_MASK 64'b0000000011111111111111111111111100000000111111111111111111111111 |
| 1134 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 1135 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_INTERNAL_REG 1 |
| 1136 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ALIASED_FROM 0 |
| 1137 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ZERO_TIME_OMNI 1 |
| 1138 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_HW_ACC_JTAG_RD 1 |
| 1139 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_HW_ACC_JTAG_WR 1 |
| 1140 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_HW_ACC_PIO_SLOW_RD 1 |
| 1141 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_HW_ACC_PIO_SLOW_WR 1 |
| 1142 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_HW_ACC_PIO_MED_RD 1 |
| 1143 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_HW_ACC_PIO_MED_WR 1 |
| 1144 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_HW_ACC_PIO_FAST_RD 1 |
| 1145 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_HW_ACC_PIO_FAST_WR 1 |
| 1146 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_NUM_FIELDS 46 |
| 1147 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_SPARE_S_FID 0 |
| 1148 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_SPARE_S_SLC 55:55 |
| 1149 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_SPARE_S_WIDTH 1 |
| 1150 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_SPARE_S_INT_SLC 0:0 |
| 1151 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_SPARE_S_POSITION 55 |
| 1152 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_SPARE_S_FMASK 64'b0000000010000000000000000000000000000000000000000000000000000000 |
| 1153 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_SPARE_S_HW_LD_MASK 64'b0000000010000000000000000000000000000000000000000000000000000000 |
| 1154 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_SPARE_S_POR_VALUE 1'b0 |
| 1155 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_SPARE_S_FIELD_NAME "spare_s" |
| 1156 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_MFC_S_FID 1 |
| 1157 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_MFC_S_SLC 54:54 |
| 1158 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_MFC_S_WIDTH 1 |
| 1159 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_MFC_S_INT_SLC 0:0 |
| 1160 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_MFC_S_POSITION 54 |
| 1161 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_MFC_S_FMASK 64'b0000000001000000000000000000000000000000000000000000000000000000 |
| 1162 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_MFC_S_HW_LD_MASK 64'b0000000001000000000000000000000000000000000000000000000000000000 |
| 1163 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_MFC_S_POR_VALUE 1'b0 |
| 1164 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_MFC_S_FIELD_NAME "mfc_s" |
| 1165 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_CTO_S_FID 2 |
| 1166 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_CTO_S_SLC 53:53 |
| 1167 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_CTO_S_WIDTH 1 |
| 1168 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_CTO_S_INT_SLC 0:0 |
| 1169 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_CTO_S_POSITION 53 |
| 1170 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_CTO_S_FMASK 64'b0000000000100000000000000000000000000000000000000000000000000000 |
| 1171 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_CTO_S_HW_LD_MASK 64'b0000000000100000000000000000000000000000000000000000000000000000 |
| 1172 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_CTO_S_POR_VALUE 1'b0 |
| 1173 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_CTO_S_FIELD_NAME "cto_s" |
| 1174 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_NFP_S_FID 3 |
| 1175 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_NFP_S_SLC 52:52 |
| 1176 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_NFP_S_WIDTH 1 |
| 1177 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_NFP_S_INT_SLC 0:0 |
| 1178 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_NFP_S_POSITION 52 |
| 1179 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_NFP_S_FMASK 64'b0000000000010000000000000000000000000000000000000000000000000000 |
| 1180 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_NFP_S_HW_LD_MASK 64'b0000000000010000000000000000000000000000000000000000000000000000 |
| 1181 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_NFP_S_POR_VALUE 1'b0 |
| 1182 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_NFP_S_FIELD_NAME "nfp_s" |
| 1183 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LWC_S_FID 4 |
| 1184 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LWC_S_SLC 51:51 |
| 1185 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LWC_S_WIDTH 1 |
| 1186 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LWC_S_INT_SLC 0:0 |
| 1187 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LWC_S_POSITION 51 |
| 1188 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LWC_S_FMASK 64'b0000000000001000000000000000000000000000000000000000000000000000 |
| 1189 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LWC_S_HW_LD_MASK 64'b0000000000001000000000000000000000000000000000000000000000000000 |
| 1190 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LWC_S_POR_VALUE 1'b0 |
| 1191 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LWC_S_FIELD_NAME "lwc_s" |
| 1192 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_MRC_S_FID 5 |
| 1193 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_MRC_S_SLC 50:50 |
| 1194 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_MRC_S_WIDTH 1 |
| 1195 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_MRC_S_INT_SLC 0:0 |
| 1196 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_MRC_S_POSITION 50 |
| 1197 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_MRC_S_FMASK 64'b0000000000000100000000000000000000000000000000000000000000000000 |
| 1198 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_MRC_S_HW_LD_MASK 64'b0000000000000100000000000000000000000000000000000000000000000000 |
| 1199 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_MRC_S_POR_VALUE 1'b0 |
| 1200 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_MRC_S_FIELD_NAME "mrc_s" |
| 1201 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_WUC_S_FID 6 |
| 1202 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_WUC_S_SLC 49:49 |
| 1203 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_WUC_S_WIDTH 1 |
| 1204 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_WUC_S_INT_SLC 0:0 |
| 1205 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_WUC_S_POSITION 49 |
| 1206 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_WUC_S_FMASK 64'b0000000000000010000000000000000000000000000000000000000000000000 |
| 1207 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_WUC_S_HW_LD_MASK 64'b0000000000000010000000000000000000000000000000000000000000000000 |
| 1208 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_WUC_S_POR_VALUE 1'b0 |
| 1209 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_WUC_S_FIELD_NAME "wuc_s" |
| 1210 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_RUC_S_FID 7 |
| 1211 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_RUC_S_SLC 48:48 |
| 1212 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_RUC_S_WIDTH 1 |
| 1213 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_RUC_S_INT_SLC 0:0 |
| 1214 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_RUC_S_POSITION 48 |
| 1215 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_RUC_S_FMASK 64'b0000000000000001000000000000000000000000000000000000000000000000 |
| 1216 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_RUC_S_HW_LD_MASK 64'b0000000000000001000000000000000000000000000000000000000000000000 |
| 1217 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_RUC_S_POR_VALUE 1'b0 |
| 1218 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_RUC_S_FIELD_NAME "ruc_s" |
| 1219 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_CRS_S_FID 8 |
| 1220 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_CRS_S_SLC 47:47 |
| 1221 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_CRS_S_WIDTH 1 |
| 1222 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_CRS_S_INT_SLC 0:0 |
| 1223 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_CRS_S_POSITION 47 |
| 1224 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_CRS_S_FMASK 64'b0000000000000000100000000000000000000000000000000000000000000000 |
| 1225 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_CRS_S_HW_LD_MASK 64'b0000000000000000100000000000000000000000000000000000000000000000 |
| 1226 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_CRS_S_POR_VALUE 1'b0 |
| 1227 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_CRS_S_FIELD_NAME "crs_s" |
| 1228 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_IIP_S_FID 9 |
| 1229 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_IIP_S_SLC 46:46 |
| 1230 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_IIP_S_WIDTH 1 |
| 1231 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_IIP_S_INT_SLC 0:0 |
| 1232 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_IIP_S_POSITION 46 |
| 1233 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_IIP_S_FMASK 64'b0000000000000000010000000000000000000000000000000000000000000000 |
| 1234 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_IIP_S_HW_LD_MASK 64'b0000000000000000010000000000000000000000000000000000000000000000 |
| 1235 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_IIP_S_POR_VALUE 1'b0 |
| 1236 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_IIP_S_FIELD_NAME "iip_s" |
| 1237 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EDP_S_FID 10 |
| 1238 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EDP_S_SLC 45:45 |
| 1239 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EDP_S_WIDTH 1 |
| 1240 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EDP_S_INT_SLC 0:0 |
| 1241 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EDP_S_POSITION 45 |
| 1242 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EDP_S_FMASK 64'b0000000000000000001000000000000000000000000000000000000000000000 |
| 1243 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EDP_S_HW_LD_MASK 64'b0000000000000000001000000000000000000000000000000000000000000000 |
| 1244 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EDP_S_POR_VALUE 1'b0 |
| 1245 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EDP_S_FIELD_NAME "edp_s" |
| 1246 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EHP_S_FID 11 |
| 1247 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EHP_S_SLC 44:44 |
| 1248 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EHP_S_WIDTH 1 |
| 1249 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EHP_S_INT_SLC 0:0 |
| 1250 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EHP_S_POSITION 44 |
| 1251 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EHP_S_FMASK 64'b0000000000000000000100000000000000000000000000000000000000000000 |
| 1252 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EHP_S_HW_LD_MASK 64'b0000000000000000000100000000000000000000000000000000000000000000 |
| 1253 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EHP_S_POR_VALUE 1'b0 |
| 1254 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EHP_S_FIELD_NAME "ehp_s" |
| 1255 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LIN_S_FID 12 |
| 1256 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LIN_S_SLC 43:43 |
| 1257 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LIN_S_WIDTH 1 |
| 1258 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LIN_S_INT_SLC 0:0 |
| 1259 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LIN_S_POSITION 43 |
| 1260 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LIN_S_FMASK 64'b0000000000000000000010000000000000000000000000000000000000000000 |
| 1261 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LIN_S_HW_LD_MASK 64'b0000000000000000000010000000000000000000000000000000000000000000 |
| 1262 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LIN_S_POR_VALUE 1'b0 |
| 1263 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LIN_S_FIELD_NAME "lin_s" |
| 1264 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LRS_S_FID 13 |
| 1265 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LRS_S_SLC 42:42 |
| 1266 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LRS_S_WIDTH 1 |
| 1267 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LRS_S_INT_SLC 0:0 |
| 1268 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LRS_S_POSITION 42 |
| 1269 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LRS_S_FMASK 64'b0000000000000000000001000000000000000000000000000000000000000000 |
| 1270 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LRS_S_HW_LD_MASK 64'b0000000000000000000001000000000000000000000000000000000000000000 |
| 1271 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LRS_S_POR_VALUE 1'b0 |
| 1272 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LRS_S_FIELD_NAME "lrs_s" |
| 1273 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LDN_S_FID 14 |
| 1274 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LDN_S_SLC 41:41 |
| 1275 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LDN_S_WIDTH 1 |
| 1276 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LDN_S_INT_SLC 0:0 |
| 1277 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LDN_S_POSITION 41 |
| 1278 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LDN_S_FMASK 64'b0000000000000000000000100000000000000000000000000000000000000000 |
| 1279 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LDN_S_HW_LD_MASK 64'b0000000000000000000000100000000000000000000000000000000000000000 |
| 1280 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LDN_S_POR_VALUE 1'b0 |
| 1281 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LDN_S_FIELD_NAME "ldn_s" |
| 1282 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LUP_S_FID 15 |
| 1283 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LUP_S_SLC 40:40 |
| 1284 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LUP_S_WIDTH 1 |
| 1285 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LUP_S_INT_SLC 0:0 |
| 1286 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LUP_S_POSITION 40 |
| 1287 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LUP_S_FMASK 64'b0000000000000000000000010000000000000000000000000000000000000000 |
| 1288 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LUP_S_HW_LD_MASK 64'b0000000000000000000000010000000000000000000000000000000000000000 |
| 1289 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LUP_S_POR_VALUE 1'b0 |
| 1290 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LUP_S_FIELD_NAME "lup_s" |
| 1291 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LPU_S_FID 16 |
| 1292 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LPU_S_SLC 39:38 |
| 1293 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LPU_S_WIDTH 2 |
| 1294 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LPU_S_INT_SLC 1:0 |
| 1295 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LPU_S_POSITION 38 |
| 1296 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LPU_S_FMASK 64'b0000000000000000000000001100000000000000000000000000000000000000 |
| 1297 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LPU_S_HW_LD_MASK 64'b0000000000000000000000001100000000000000000000000000000000000000 |
| 1298 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LPU_S_POR_VALUE 2'b00 |
| 1299 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LPU_S_FIELD_NAME "lpu_s" |
| 1300 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERU_S_FID 17 |
| 1301 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERU_S_SLC 37:37 |
| 1302 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERU_S_WIDTH 1 |
| 1303 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERU_S_INT_SLC 0:0 |
| 1304 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERU_S_POSITION 37 |
| 1305 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERU_S_FMASK 64'b0000000000000000000000000010000000000000000000000000000000000000 |
| 1306 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERU_S_HW_LD_MASK 64'b0000000000000000000000000010000000000000000000000000000000000000 |
| 1307 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERU_S_POR_VALUE 1'b0 |
| 1308 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERU_S_FIELD_NAME "eru_s" |
| 1309 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERO_S_FID 18 |
| 1310 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERO_S_SLC 36:36 |
| 1311 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERO_S_WIDTH 1 |
| 1312 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERO_S_INT_SLC 0:0 |
| 1313 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERO_S_POSITION 36 |
| 1314 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERO_S_FMASK 64'b0000000000000000000000000001000000000000000000000000000000000000 |
| 1315 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERO_S_HW_LD_MASK 64'b0000000000000000000000000001000000000000000000000000000000000000 |
| 1316 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERO_S_POR_VALUE 1'b0 |
| 1317 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERO_S_FIELD_NAME "ero_s" |
| 1318 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EMP_S_FID 19 |
| 1319 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EMP_S_SLC 35:35 |
| 1320 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EMP_S_WIDTH 1 |
| 1321 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EMP_S_INT_SLC 0:0 |
| 1322 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EMP_S_POSITION 35 |
| 1323 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EMP_S_FMASK 64'b0000000000000000000000000000100000000000000000000000000000000000 |
| 1324 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EMP_S_HW_LD_MASK 64'b0000000000000000000000000000100000000000000000000000000000000000 |
| 1325 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EMP_S_POR_VALUE 1'b0 |
| 1326 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EMP_S_FIELD_NAME "emp_s" |
| 1327 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EPE_S_FID 20 |
| 1328 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EPE_S_SLC 34:34 |
| 1329 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EPE_S_WIDTH 1 |
| 1330 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EPE_S_INT_SLC 0:0 |
| 1331 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EPE_S_POSITION 34 |
| 1332 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EPE_S_FMASK 64'b0000000000000000000000000000010000000000000000000000000000000000 |
| 1333 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EPE_S_HW_LD_MASK 64'b0000000000000000000000000000010000000000000000000000000000000000 |
| 1334 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EPE_S_POR_VALUE 1'b0 |
| 1335 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EPE_S_FIELD_NAME "epe_s" |
| 1336 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERP_S_FID 21 |
| 1337 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERP_S_SLC 33:33 |
| 1338 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERP_S_WIDTH 1 |
| 1339 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERP_S_INT_SLC 0:0 |
| 1340 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERP_S_POSITION 33 |
| 1341 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERP_S_FMASK 64'b0000000000000000000000000000001000000000000000000000000000000000 |
| 1342 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERP_S_HW_LD_MASK 64'b0000000000000000000000000000001000000000000000000000000000000000 |
| 1343 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERP_S_POR_VALUE 1'b0 |
| 1344 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERP_S_FIELD_NAME "erp_s" |
| 1345 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EIP_S_FID 22 |
| 1346 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EIP_S_SLC 32:32 |
| 1347 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EIP_S_WIDTH 1 |
| 1348 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EIP_S_INT_SLC 0:0 |
| 1349 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EIP_S_POSITION 32 |
| 1350 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EIP_S_FMASK 64'b0000000000000000000000000000000100000000000000000000000000000000 |
| 1351 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EIP_S_HW_LD_MASK 64'b0000000000000000000000000000000100000000000000000000000000000000 |
| 1352 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EIP_S_POR_VALUE 1'b0 |
| 1353 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EIP_S_FIELD_NAME "eip_s" |
| 1354 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_SPARE_P_FID 23 |
| 1355 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_SPARE_P_SLC 23:23 |
| 1356 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_SPARE_P_WIDTH 1 |
| 1357 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_SPARE_P_INT_SLC 0:0 |
| 1358 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_SPARE_P_POSITION 23 |
| 1359 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_SPARE_P_FMASK 64'b0000000000000000000000000000000000000000100000000000000000000000 |
| 1360 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_SPARE_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000100000000000000000000000 |
| 1361 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_SPARE_P_POR_VALUE 1'b0 |
| 1362 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_SPARE_P_FIELD_NAME "spare_p" |
| 1363 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_MFC_P_FID 24 |
| 1364 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_MFC_P_SLC 22:22 |
| 1365 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_MFC_P_WIDTH 1 |
| 1366 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_MFC_P_INT_SLC 0:0 |
| 1367 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_MFC_P_POSITION 22 |
| 1368 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_MFC_P_FMASK 64'b0000000000000000000000000000000000000000010000000000000000000000 |
| 1369 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_MFC_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000010000000000000000000000 |
| 1370 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_MFC_P_POR_VALUE 1'b0 |
| 1371 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_MFC_P_FIELD_NAME "mfc_p" |
| 1372 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_CTO_P_FID 25 |
| 1373 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_CTO_P_SLC 21:21 |
| 1374 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_CTO_P_WIDTH 1 |
| 1375 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_CTO_P_INT_SLC 0:0 |
| 1376 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_CTO_P_POSITION 21 |
| 1377 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_CTO_P_FMASK 64'b0000000000000000000000000000000000000000001000000000000000000000 |
| 1378 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_CTO_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000001000000000000000000000 |
| 1379 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_CTO_P_POR_VALUE 1'b0 |
| 1380 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_CTO_P_FIELD_NAME "cto_p" |
| 1381 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_NFP_P_FID 26 |
| 1382 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_NFP_P_SLC 20:20 |
| 1383 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_NFP_P_WIDTH 1 |
| 1384 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_NFP_P_INT_SLC 0:0 |
| 1385 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_NFP_P_POSITION 20 |
| 1386 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_NFP_P_FMASK 64'b0000000000000000000000000000000000000000000100000000000000000000 |
| 1387 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_NFP_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000100000000000000000000 |
| 1388 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_NFP_P_POR_VALUE 1'b0 |
| 1389 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_NFP_P_FIELD_NAME "nfp_p" |
| 1390 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LWC_P_FID 27 |
| 1391 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LWC_P_SLC 19:19 |
| 1392 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LWC_P_WIDTH 1 |
| 1393 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LWC_P_INT_SLC 0:0 |
| 1394 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LWC_P_POSITION 19 |
| 1395 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LWC_P_FMASK 64'b0000000000000000000000000000000000000000000010000000000000000000 |
| 1396 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LWC_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000010000000000000000000 |
| 1397 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LWC_P_POR_VALUE 1'b0 |
| 1398 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LWC_P_FIELD_NAME "lwc_p" |
| 1399 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_MRC_P_FID 28 |
| 1400 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_MRC_P_SLC 18:18 |
| 1401 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_MRC_P_WIDTH 1 |
| 1402 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_MRC_P_INT_SLC 0:0 |
| 1403 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_MRC_P_POSITION 18 |
| 1404 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_MRC_P_FMASK 64'b0000000000000000000000000000000000000000000001000000000000000000 |
| 1405 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_MRC_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000001000000000000000000 |
| 1406 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_MRC_P_POR_VALUE 1'b0 |
| 1407 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_MRC_P_FIELD_NAME "mrc_p" |
| 1408 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_WUC_P_FID 29 |
| 1409 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_WUC_P_SLC 17:17 |
| 1410 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_WUC_P_WIDTH 1 |
| 1411 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_WUC_P_INT_SLC 0:0 |
| 1412 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_WUC_P_POSITION 17 |
| 1413 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_WUC_P_FMASK 64'b0000000000000000000000000000000000000000000000100000000000000000 |
| 1414 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_WUC_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000100000000000000000 |
| 1415 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_WUC_P_POR_VALUE 1'b0 |
| 1416 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_WUC_P_FIELD_NAME "wuc_p" |
| 1417 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_RUC_P_FID 30 |
| 1418 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_RUC_P_SLC 16:16 |
| 1419 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_RUC_P_WIDTH 1 |
| 1420 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_RUC_P_INT_SLC 0:0 |
| 1421 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_RUC_P_POSITION 16 |
| 1422 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_RUC_P_FMASK 64'b0000000000000000000000000000000000000000000000010000000000000000 |
| 1423 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_RUC_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000010000000000000000 |
| 1424 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_RUC_P_POR_VALUE 1'b0 |
| 1425 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_RUC_P_FIELD_NAME "ruc_p" |
| 1426 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_CRS_P_FID 31 |
| 1427 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_CRS_P_SLC 15:15 |
| 1428 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_CRS_P_WIDTH 1 |
| 1429 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_CRS_P_INT_SLC 0:0 |
| 1430 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_CRS_P_POSITION 15 |
| 1431 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_CRS_P_FMASK 64'b0000000000000000000000000000000000000000000000001000000000000000 |
| 1432 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_CRS_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000001000000000000000 |
| 1433 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_CRS_P_POR_VALUE 1'b0 |
| 1434 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_CRS_P_FIELD_NAME "crs_p" |
| 1435 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_IIP_P_FID 32 |
| 1436 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_IIP_P_SLC 14:14 |
| 1437 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_IIP_P_WIDTH 1 |
| 1438 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_IIP_P_INT_SLC 0:0 |
| 1439 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_IIP_P_POSITION 14 |
| 1440 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_IIP_P_FMASK 64'b0000000000000000000000000000000000000000000000000100000000000000 |
| 1441 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_IIP_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000100000000000000 |
| 1442 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_IIP_P_POR_VALUE 1'b0 |
| 1443 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_IIP_P_FIELD_NAME "iip_p" |
| 1444 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EDP_P_FID 33 |
| 1445 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EDP_P_SLC 13:13 |
| 1446 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EDP_P_WIDTH 1 |
| 1447 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EDP_P_INT_SLC 0:0 |
| 1448 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EDP_P_POSITION 13 |
| 1449 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EDP_P_FMASK 64'b0000000000000000000000000000000000000000000000000010000000000000 |
| 1450 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EDP_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000010000000000000 |
| 1451 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EDP_P_POR_VALUE 1'b0 |
| 1452 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EDP_P_FIELD_NAME "edp_p" |
| 1453 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EHP_P_FID 34 |
| 1454 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EHP_P_SLC 12:12 |
| 1455 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EHP_P_WIDTH 1 |
| 1456 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EHP_P_INT_SLC 0:0 |
| 1457 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EHP_P_POSITION 12 |
| 1458 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EHP_P_FMASK 64'b0000000000000000000000000000000000000000000000000001000000000000 |
| 1459 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EHP_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000001000000000000 |
| 1460 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EHP_P_POR_VALUE 1'b0 |
| 1461 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EHP_P_FIELD_NAME "ehp_p" |
| 1462 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LIN_P_FID 35 |
| 1463 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LIN_P_SLC 11:11 |
| 1464 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LIN_P_WIDTH 1 |
| 1465 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LIN_P_INT_SLC 0:0 |
| 1466 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LIN_P_POSITION 11 |
| 1467 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LIN_P_FMASK 64'b0000000000000000000000000000000000000000000000000000100000000000 |
| 1468 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LIN_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000100000000000 |
| 1469 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LIN_P_POR_VALUE 1'b0 |
| 1470 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LIN_P_FIELD_NAME "lin_p" |
| 1471 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LRS_P_FID 36 |
| 1472 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LRS_P_SLC 10:10 |
| 1473 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LRS_P_WIDTH 1 |
| 1474 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LRS_P_INT_SLC 0:0 |
| 1475 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LRS_P_POSITION 10 |
| 1476 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LRS_P_FMASK 64'b0000000000000000000000000000000000000000000000000000010000000000 |
| 1477 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LRS_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000010000000000 |
| 1478 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LRS_P_POR_VALUE 1'b0 |
| 1479 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LRS_P_FIELD_NAME "lrs_p" |
| 1480 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LDN_P_FID 37 |
| 1481 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LDN_P_SLC 9:9 |
| 1482 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LDN_P_WIDTH 1 |
| 1483 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LDN_P_INT_SLC 0:0 |
| 1484 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LDN_P_POSITION 9 |
| 1485 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LDN_P_FMASK 64'b0000000000000000000000000000000000000000000000000000001000000000 |
| 1486 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LDN_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000001000000000 |
| 1487 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LDN_P_POR_VALUE 1'b0 |
| 1488 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LDN_P_FIELD_NAME "ldn_p" |
| 1489 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LUP_P_FID 38 |
| 1490 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LUP_P_SLC 8:8 |
| 1491 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LUP_P_WIDTH 1 |
| 1492 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LUP_P_INT_SLC 0:0 |
| 1493 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LUP_P_POSITION 8 |
| 1494 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LUP_P_FMASK 64'b0000000000000000000000000000000000000000000000000000000100000000 |
| 1495 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LUP_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000100000000 |
| 1496 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LUP_P_POR_VALUE 1'b0 |
| 1497 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LUP_P_FIELD_NAME "lup_p" |
| 1498 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LPU_P_FID 39 |
| 1499 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LPU_P_SLC 7:6 |
| 1500 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LPU_P_WIDTH 2 |
| 1501 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LPU_P_INT_SLC 1:0 |
| 1502 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LPU_P_POSITION 6 |
| 1503 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LPU_P_FMASK 64'b0000000000000000000000000000000000000000000000000000000011000000 |
| 1504 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LPU_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000011000000 |
| 1505 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LPU_P_POR_VALUE 2'b00 |
| 1506 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_LPU_P_FIELD_NAME "lpu_p" |
| 1507 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERU_P_FID 40 |
| 1508 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERU_P_SLC 5:5 |
| 1509 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERU_P_WIDTH 1 |
| 1510 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERU_P_INT_SLC 0:0 |
| 1511 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERU_P_POSITION 5 |
| 1512 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERU_P_FMASK 64'b0000000000000000000000000000000000000000000000000000000000100000 |
| 1513 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERU_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000100000 |
| 1514 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERU_P_POR_VALUE 1'b0 |
| 1515 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERU_P_FIELD_NAME "eru_p" |
| 1516 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERO_P_FID 41 |
| 1517 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERO_P_SLC 4:4 |
| 1518 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERO_P_WIDTH 1 |
| 1519 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERO_P_INT_SLC 0:0 |
| 1520 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERO_P_POSITION 4 |
| 1521 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERO_P_FMASK 64'b0000000000000000000000000000000000000000000000000000000000010000 |
| 1522 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERO_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000010000 |
| 1523 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERO_P_POR_VALUE 1'b0 |
| 1524 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERO_P_FIELD_NAME "ero_p" |
| 1525 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EMP_P_FID 42 |
| 1526 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EMP_P_SLC 3:3 |
| 1527 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EMP_P_WIDTH 1 |
| 1528 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EMP_P_INT_SLC 0:0 |
| 1529 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EMP_P_POSITION 3 |
| 1530 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EMP_P_FMASK 64'b0000000000000000000000000000000000000000000000000000000000001000 |
| 1531 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EMP_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000001000 |
| 1532 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EMP_P_POR_VALUE 1'b0 |
| 1533 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EMP_P_FIELD_NAME "emp_p" |
| 1534 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EPE_P_FID 43 |
| 1535 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EPE_P_SLC 2:2 |
| 1536 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EPE_P_WIDTH 1 |
| 1537 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EPE_P_INT_SLC 0:0 |
| 1538 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EPE_P_POSITION 2 |
| 1539 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EPE_P_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000100 |
| 1540 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EPE_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000100 |
| 1541 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EPE_P_POR_VALUE 1'b0 |
| 1542 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EPE_P_FIELD_NAME "epe_p" |
| 1543 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERP_P_FID 44 |
| 1544 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERP_P_SLC 1:1 |
| 1545 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERP_P_WIDTH 1 |
| 1546 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERP_P_INT_SLC 0:0 |
| 1547 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERP_P_POSITION 1 |
| 1548 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERP_P_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000010 |
| 1549 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERP_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000010 |
| 1550 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERP_P_POR_VALUE 1'b0 |
| 1551 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_ERP_P_FIELD_NAME "erp_p" |
| 1552 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EIP_P_FID 45 |
| 1553 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EIP_P_SLC 0:0 |
| 1554 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EIP_P_WIDTH 1 |
| 1555 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EIP_P_INT_SLC 0:0 |
| 1556 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EIP_P_POSITION 0 |
| 1557 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EIP_P_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000001 |
| 1558 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EIP_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000001 |
| 1559 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EIP_P_POR_VALUE 1'b0 |
| 1560 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1C_ALIAS_EIP_P_FIELD_NAME "eip_p" |
| 1561 | |
| 1562 | //------------------------------------------------------- |
| 1563 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS |
| 1564 | //------------------------------------------------------- |
| 1565 | |
| 1566 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_HW_ADDR 27'b000000011110000001000000100 |
| 1567 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ADDR 30'b000000011110000001000000100000 |
| 1568 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_NAME "fire_plc_tlu_ctb_tlr_csr_b_oe_err_rw1s_alias" |
| 1569 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_WIDTH 64 |
| 1570 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_DEPTH 1 |
| 1571 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_SLC 63:0 |
| 1572 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_INT_SLC 63:0 |
| 1573 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_POSITION 0 |
| 1574 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_oe_err_rw1s_alias" |
| 1575 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LOW_ADDR_WIDTH 0 |
| 1576 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ADDR_RANGE 26:0 |
| 1577 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_READ_MASK 64'b0000000011111111111111111111111100000000111111111111111111111111 |
| 1578 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 1579 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_WRITE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 1580 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 1581 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_SET_MASK 64'b0000000011111111111111111111111100000000111111111111111111111111 |
| 1582 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 1583 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 1584 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_RMASK 64'b0000000011111111111111111111111100000000111111111111111111111111 |
| 1585 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_RESERVED_BIT_MASK 64'b1111111100000000000000000000000011111111000000000000000000000000 |
| 1586 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_HW_LD_MASK 64'b0000000011111111111111111111111100000000111111111111111111111111 |
| 1587 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 1588 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_INTERNAL_REG 1 |
| 1589 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ALIASED_FROM "fire_plc_tlu_ctb_tlr_csr_b_oe_err_rw1c_alias" |
| 1590 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ZERO_TIME_OMNI 1 |
| 1591 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_HW_ACC_JTAG_RD 1 |
| 1592 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_HW_ACC_JTAG_WR 1 |
| 1593 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_HW_ACC_PIO_SLOW_RD 1 |
| 1594 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_HW_ACC_PIO_SLOW_WR 1 |
| 1595 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_HW_ACC_PIO_MED_RD 1 |
| 1596 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_HW_ACC_PIO_MED_WR 1 |
| 1597 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_HW_ACC_PIO_FAST_RD 1 |
| 1598 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_HW_ACC_PIO_FAST_WR 1 |
| 1599 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_NUM_FIELDS 46 |
| 1600 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_SPARE_S_FID 0 |
| 1601 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_SPARE_S_SLC 55:55 |
| 1602 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_SPARE_S_WIDTH 1 |
| 1603 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_SPARE_S_INT_SLC 0:0 |
| 1604 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_SPARE_S_POSITION 55 |
| 1605 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_SPARE_S_FMASK 64'b0000000010000000000000000000000000000000000000000000000000000000 |
| 1606 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_SPARE_S_HW_LD_MASK 64'b0000000010000000000000000000000000000000000000000000000000000000 |
| 1607 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_SPARE_S_POR_VALUE 1'b0 |
| 1608 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_SPARE_S_FIELD_NAME "spare_s" |
| 1609 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_MFC_S_FID 1 |
| 1610 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_MFC_S_SLC 54:54 |
| 1611 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_MFC_S_WIDTH 1 |
| 1612 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_MFC_S_INT_SLC 0:0 |
| 1613 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_MFC_S_POSITION 54 |
| 1614 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_MFC_S_FMASK 64'b0000000001000000000000000000000000000000000000000000000000000000 |
| 1615 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_MFC_S_HW_LD_MASK 64'b0000000001000000000000000000000000000000000000000000000000000000 |
| 1616 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_MFC_S_POR_VALUE 1'b0 |
| 1617 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_MFC_S_FIELD_NAME "mfc_s" |
| 1618 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_CTO_S_FID 2 |
| 1619 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_CTO_S_SLC 53:53 |
| 1620 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_CTO_S_WIDTH 1 |
| 1621 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_CTO_S_INT_SLC 0:0 |
| 1622 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_CTO_S_POSITION 53 |
| 1623 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_CTO_S_FMASK 64'b0000000000100000000000000000000000000000000000000000000000000000 |
| 1624 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_CTO_S_HW_LD_MASK 64'b0000000000100000000000000000000000000000000000000000000000000000 |
| 1625 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_CTO_S_POR_VALUE 1'b0 |
| 1626 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_CTO_S_FIELD_NAME "cto_s" |
| 1627 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_NFP_S_FID 3 |
| 1628 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_NFP_S_SLC 52:52 |
| 1629 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_NFP_S_WIDTH 1 |
| 1630 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_NFP_S_INT_SLC 0:0 |
| 1631 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_NFP_S_POSITION 52 |
| 1632 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_NFP_S_FMASK 64'b0000000000010000000000000000000000000000000000000000000000000000 |
| 1633 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_NFP_S_HW_LD_MASK 64'b0000000000010000000000000000000000000000000000000000000000000000 |
| 1634 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_NFP_S_POR_VALUE 1'b0 |
| 1635 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_NFP_S_FIELD_NAME "nfp_s" |
| 1636 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LWC_S_FID 4 |
| 1637 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LWC_S_SLC 51:51 |
| 1638 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LWC_S_WIDTH 1 |
| 1639 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LWC_S_INT_SLC 0:0 |
| 1640 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LWC_S_POSITION 51 |
| 1641 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LWC_S_FMASK 64'b0000000000001000000000000000000000000000000000000000000000000000 |
| 1642 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LWC_S_HW_LD_MASK 64'b0000000000001000000000000000000000000000000000000000000000000000 |
| 1643 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LWC_S_POR_VALUE 1'b0 |
| 1644 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LWC_S_FIELD_NAME "lwc_s" |
| 1645 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_MRC_S_FID 5 |
| 1646 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_MRC_S_SLC 50:50 |
| 1647 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_MRC_S_WIDTH 1 |
| 1648 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_MRC_S_INT_SLC 0:0 |
| 1649 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_MRC_S_POSITION 50 |
| 1650 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_MRC_S_FMASK 64'b0000000000000100000000000000000000000000000000000000000000000000 |
| 1651 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_MRC_S_HW_LD_MASK 64'b0000000000000100000000000000000000000000000000000000000000000000 |
| 1652 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_MRC_S_POR_VALUE 1'b0 |
| 1653 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_MRC_S_FIELD_NAME "mrc_s" |
| 1654 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_WUC_S_FID 6 |
| 1655 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_WUC_S_SLC 49:49 |
| 1656 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_WUC_S_WIDTH 1 |
| 1657 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_WUC_S_INT_SLC 0:0 |
| 1658 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_WUC_S_POSITION 49 |
| 1659 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_WUC_S_FMASK 64'b0000000000000010000000000000000000000000000000000000000000000000 |
| 1660 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_WUC_S_HW_LD_MASK 64'b0000000000000010000000000000000000000000000000000000000000000000 |
| 1661 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_WUC_S_POR_VALUE 1'b0 |
| 1662 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_WUC_S_FIELD_NAME "wuc_s" |
| 1663 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_RUC_S_FID 7 |
| 1664 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_RUC_S_SLC 48:48 |
| 1665 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_RUC_S_WIDTH 1 |
| 1666 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_RUC_S_INT_SLC 0:0 |
| 1667 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_RUC_S_POSITION 48 |
| 1668 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_RUC_S_FMASK 64'b0000000000000001000000000000000000000000000000000000000000000000 |
| 1669 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_RUC_S_HW_LD_MASK 64'b0000000000000001000000000000000000000000000000000000000000000000 |
| 1670 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_RUC_S_POR_VALUE 1'b0 |
| 1671 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_RUC_S_FIELD_NAME "ruc_s" |
| 1672 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_CRS_S_FID 8 |
| 1673 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_CRS_S_SLC 47:47 |
| 1674 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_CRS_S_WIDTH 1 |
| 1675 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_CRS_S_INT_SLC 0:0 |
| 1676 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_CRS_S_POSITION 47 |
| 1677 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_CRS_S_FMASK 64'b0000000000000000100000000000000000000000000000000000000000000000 |
| 1678 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_CRS_S_HW_LD_MASK 64'b0000000000000000100000000000000000000000000000000000000000000000 |
| 1679 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_CRS_S_POR_VALUE 1'b0 |
| 1680 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_CRS_S_FIELD_NAME "crs_s" |
| 1681 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_IIP_S_FID 9 |
| 1682 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_IIP_S_SLC 46:46 |
| 1683 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_IIP_S_WIDTH 1 |
| 1684 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_IIP_S_INT_SLC 0:0 |
| 1685 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_IIP_S_POSITION 46 |
| 1686 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_IIP_S_FMASK 64'b0000000000000000010000000000000000000000000000000000000000000000 |
| 1687 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_IIP_S_HW_LD_MASK 64'b0000000000000000010000000000000000000000000000000000000000000000 |
| 1688 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_IIP_S_POR_VALUE 1'b0 |
| 1689 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_IIP_S_FIELD_NAME "iip_s" |
| 1690 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EDP_S_FID 10 |
| 1691 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EDP_S_SLC 45:45 |
| 1692 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EDP_S_WIDTH 1 |
| 1693 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EDP_S_INT_SLC 0:0 |
| 1694 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EDP_S_POSITION 45 |
| 1695 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EDP_S_FMASK 64'b0000000000000000001000000000000000000000000000000000000000000000 |
| 1696 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EDP_S_HW_LD_MASK 64'b0000000000000000001000000000000000000000000000000000000000000000 |
| 1697 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EDP_S_POR_VALUE 1'b0 |
| 1698 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EDP_S_FIELD_NAME "edp_s" |
| 1699 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EHP_S_FID 11 |
| 1700 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EHP_S_SLC 44:44 |
| 1701 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EHP_S_WIDTH 1 |
| 1702 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EHP_S_INT_SLC 0:0 |
| 1703 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EHP_S_POSITION 44 |
| 1704 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EHP_S_FMASK 64'b0000000000000000000100000000000000000000000000000000000000000000 |
| 1705 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EHP_S_HW_LD_MASK 64'b0000000000000000000100000000000000000000000000000000000000000000 |
| 1706 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EHP_S_POR_VALUE 1'b0 |
| 1707 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EHP_S_FIELD_NAME "ehp_s" |
| 1708 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LIN_S_FID 12 |
| 1709 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LIN_S_SLC 43:43 |
| 1710 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LIN_S_WIDTH 1 |
| 1711 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LIN_S_INT_SLC 0:0 |
| 1712 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LIN_S_POSITION 43 |
| 1713 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LIN_S_FMASK 64'b0000000000000000000010000000000000000000000000000000000000000000 |
| 1714 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LIN_S_HW_LD_MASK 64'b0000000000000000000010000000000000000000000000000000000000000000 |
| 1715 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LIN_S_POR_VALUE 1'b0 |
| 1716 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LIN_S_FIELD_NAME "lin_s" |
| 1717 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LRS_S_FID 13 |
| 1718 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LRS_S_SLC 42:42 |
| 1719 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LRS_S_WIDTH 1 |
| 1720 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LRS_S_INT_SLC 0:0 |
| 1721 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LRS_S_POSITION 42 |
| 1722 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LRS_S_FMASK 64'b0000000000000000000001000000000000000000000000000000000000000000 |
| 1723 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LRS_S_HW_LD_MASK 64'b0000000000000000000001000000000000000000000000000000000000000000 |
| 1724 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LRS_S_POR_VALUE 1'b0 |
| 1725 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LRS_S_FIELD_NAME "lrs_s" |
| 1726 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LDN_S_FID 14 |
| 1727 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LDN_S_SLC 41:41 |
| 1728 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LDN_S_WIDTH 1 |
| 1729 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LDN_S_INT_SLC 0:0 |
| 1730 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LDN_S_POSITION 41 |
| 1731 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LDN_S_FMASK 64'b0000000000000000000000100000000000000000000000000000000000000000 |
| 1732 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LDN_S_HW_LD_MASK 64'b0000000000000000000000100000000000000000000000000000000000000000 |
| 1733 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LDN_S_POR_VALUE 1'b0 |
| 1734 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LDN_S_FIELD_NAME "ldn_s" |
| 1735 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LUP_S_FID 15 |
| 1736 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LUP_S_SLC 40:40 |
| 1737 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LUP_S_WIDTH 1 |
| 1738 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LUP_S_INT_SLC 0:0 |
| 1739 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LUP_S_POSITION 40 |
| 1740 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LUP_S_FMASK 64'b0000000000000000000000010000000000000000000000000000000000000000 |
| 1741 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LUP_S_HW_LD_MASK 64'b0000000000000000000000010000000000000000000000000000000000000000 |
| 1742 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LUP_S_POR_VALUE 1'b0 |
| 1743 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LUP_S_FIELD_NAME "lup_s" |
| 1744 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LPU_S_FID 16 |
| 1745 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LPU_S_SLC 39:38 |
| 1746 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LPU_S_WIDTH 2 |
| 1747 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LPU_S_INT_SLC 1:0 |
| 1748 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LPU_S_POSITION 38 |
| 1749 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LPU_S_FMASK 64'b0000000000000000000000001100000000000000000000000000000000000000 |
| 1750 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LPU_S_HW_LD_MASK 64'b0000000000000000000000001100000000000000000000000000000000000000 |
| 1751 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LPU_S_POR_VALUE 2'b00 |
| 1752 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LPU_S_FIELD_NAME "lpu_s" |
| 1753 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERU_S_FID 17 |
| 1754 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERU_S_SLC 37:37 |
| 1755 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERU_S_WIDTH 1 |
| 1756 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERU_S_INT_SLC 0:0 |
| 1757 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERU_S_POSITION 37 |
| 1758 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERU_S_FMASK 64'b0000000000000000000000000010000000000000000000000000000000000000 |
| 1759 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERU_S_HW_LD_MASK 64'b0000000000000000000000000010000000000000000000000000000000000000 |
| 1760 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERU_S_POR_VALUE 1'b0 |
| 1761 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERU_S_FIELD_NAME "eru_s" |
| 1762 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERO_S_FID 18 |
| 1763 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERO_S_SLC 36:36 |
| 1764 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERO_S_WIDTH 1 |
| 1765 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERO_S_INT_SLC 0:0 |
| 1766 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERO_S_POSITION 36 |
| 1767 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERO_S_FMASK 64'b0000000000000000000000000001000000000000000000000000000000000000 |
| 1768 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERO_S_HW_LD_MASK 64'b0000000000000000000000000001000000000000000000000000000000000000 |
| 1769 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERO_S_POR_VALUE 1'b0 |
| 1770 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERO_S_FIELD_NAME "ero_s" |
| 1771 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EMP_S_FID 19 |
| 1772 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EMP_S_SLC 35:35 |
| 1773 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EMP_S_WIDTH 1 |
| 1774 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EMP_S_INT_SLC 0:0 |
| 1775 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EMP_S_POSITION 35 |
| 1776 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EMP_S_FMASK 64'b0000000000000000000000000000100000000000000000000000000000000000 |
| 1777 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EMP_S_HW_LD_MASK 64'b0000000000000000000000000000100000000000000000000000000000000000 |
| 1778 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EMP_S_POR_VALUE 1'b0 |
| 1779 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EMP_S_FIELD_NAME "emp_s" |
| 1780 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EPE_S_FID 20 |
| 1781 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EPE_S_SLC 34:34 |
| 1782 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EPE_S_WIDTH 1 |
| 1783 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EPE_S_INT_SLC 0:0 |
| 1784 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EPE_S_POSITION 34 |
| 1785 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EPE_S_FMASK 64'b0000000000000000000000000000010000000000000000000000000000000000 |
| 1786 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EPE_S_HW_LD_MASK 64'b0000000000000000000000000000010000000000000000000000000000000000 |
| 1787 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EPE_S_POR_VALUE 1'b0 |
| 1788 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EPE_S_FIELD_NAME "epe_s" |
| 1789 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERP_S_FID 21 |
| 1790 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERP_S_SLC 33:33 |
| 1791 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERP_S_WIDTH 1 |
| 1792 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERP_S_INT_SLC 0:0 |
| 1793 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERP_S_POSITION 33 |
| 1794 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERP_S_FMASK 64'b0000000000000000000000000000001000000000000000000000000000000000 |
| 1795 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERP_S_HW_LD_MASK 64'b0000000000000000000000000000001000000000000000000000000000000000 |
| 1796 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERP_S_POR_VALUE 1'b0 |
| 1797 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERP_S_FIELD_NAME "erp_s" |
| 1798 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EIP_S_FID 22 |
| 1799 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EIP_S_SLC 32:32 |
| 1800 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EIP_S_WIDTH 1 |
| 1801 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EIP_S_INT_SLC 0:0 |
| 1802 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EIP_S_POSITION 32 |
| 1803 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EIP_S_FMASK 64'b0000000000000000000000000000000100000000000000000000000000000000 |
| 1804 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EIP_S_HW_LD_MASK 64'b0000000000000000000000000000000100000000000000000000000000000000 |
| 1805 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EIP_S_POR_VALUE 1'b0 |
| 1806 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EIP_S_FIELD_NAME "eip_s" |
| 1807 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_SPARE_P_FID 23 |
| 1808 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_SPARE_P_SLC 23:23 |
| 1809 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_SPARE_P_WIDTH 1 |
| 1810 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_SPARE_P_INT_SLC 0:0 |
| 1811 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_SPARE_P_POSITION 23 |
| 1812 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_SPARE_P_FMASK 64'b0000000000000000000000000000000000000000100000000000000000000000 |
| 1813 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_SPARE_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000100000000000000000000000 |
| 1814 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_SPARE_P_POR_VALUE 1'b0 |
| 1815 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_SPARE_P_FIELD_NAME "spare_p" |
| 1816 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_MFC_P_FID 24 |
| 1817 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_MFC_P_SLC 22:22 |
| 1818 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_MFC_P_WIDTH 1 |
| 1819 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_MFC_P_INT_SLC 0:0 |
| 1820 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_MFC_P_POSITION 22 |
| 1821 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_MFC_P_FMASK 64'b0000000000000000000000000000000000000000010000000000000000000000 |
| 1822 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_MFC_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000010000000000000000000000 |
| 1823 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_MFC_P_POR_VALUE 1'b0 |
| 1824 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_MFC_P_FIELD_NAME "mfc_p" |
| 1825 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_CTO_P_FID 25 |
| 1826 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_CTO_P_SLC 21:21 |
| 1827 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_CTO_P_WIDTH 1 |
| 1828 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_CTO_P_INT_SLC 0:0 |
| 1829 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_CTO_P_POSITION 21 |
| 1830 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_CTO_P_FMASK 64'b0000000000000000000000000000000000000000001000000000000000000000 |
| 1831 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_CTO_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000001000000000000000000000 |
| 1832 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_CTO_P_POR_VALUE 1'b0 |
| 1833 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_CTO_P_FIELD_NAME "cto_p" |
| 1834 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_NFP_P_FID 26 |
| 1835 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_NFP_P_SLC 20:20 |
| 1836 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_NFP_P_WIDTH 1 |
| 1837 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_NFP_P_INT_SLC 0:0 |
| 1838 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_NFP_P_POSITION 20 |
| 1839 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_NFP_P_FMASK 64'b0000000000000000000000000000000000000000000100000000000000000000 |
| 1840 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_NFP_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000100000000000000000000 |
| 1841 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_NFP_P_POR_VALUE 1'b0 |
| 1842 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_NFP_P_FIELD_NAME "nfp_p" |
| 1843 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LWC_P_FID 27 |
| 1844 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LWC_P_SLC 19:19 |
| 1845 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LWC_P_WIDTH 1 |
| 1846 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LWC_P_INT_SLC 0:0 |
| 1847 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LWC_P_POSITION 19 |
| 1848 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LWC_P_FMASK 64'b0000000000000000000000000000000000000000000010000000000000000000 |
| 1849 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LWC_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000010000000000000000000 |
| 1850 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LWC_P_POR_VALUE 1'b0 |
| 1851 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LWC_P_FIELD_NAME "lwc_p" |
| 1852 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_MRC_P_FID 28 |
| 1853 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_MRC_P_SLC 18:18 |
| 1854 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_MRC_P_WIDTH 1 |
| 1855 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_MRC_P_INT_SLC 0:0 |
| 1856 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_MRC_P_POSITION 18 |
| 1857 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_MRC_P_FMASK 64'b0000000000000000000000000000000000000000000001000000000000000000 |
| 1858 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_MRC_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000001000000000000000000 |
| 1859 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_MRC_P_POR_VALUE 1'b0 |
| 1860 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_MRC_P_FIELD_NAME "mrc_p" |
| 1861 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_WUC_P_FID 29 |
| 1862 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_WUC_P_SLC 17:17 |
| 1863 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_WUC_P_WIDTH 1 |
| 1864 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_WUC_P_INT_SLC 0:0 |
| 1865 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_WUC_P_POSITION 17 |
| 1866 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_WUC_P_FMASK 64'b0000000000000000000000000000000000000000000000100000000000000000 |
| 1867 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_WUC_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000100000000000000000 |
| 1868 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_WUC_P_POR_VALUE 1'b0 |
| 1869 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_WUC_P_FIELD_NAME "wuc_p" |
| 1870 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_RUC_P_FID 30 |
| 1871 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_RUC_P_SLC 16:16 |
| 1872 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_RUC_P_WIDTH 1 |
| 1873 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_RUC_P_INT_SLC 0:0 |
| 1874 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_RUC_P_POSITION 16 |
| 1875 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_RUC_P_FMASK 64'b0000000000000000000000000000000000000000000000010000000000000000 |
| 1876 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_RUC_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000010000000000000000 |
| 1877 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_RUC_P_POR_VALUE 1'b0 |
| 1878 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_RUC_P_FIELD_NAME "ruc_p" |
| 1879 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_CRS_P_FID 31 |
| 1880 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_CRS_P_SLC 15:15 |
| 1881 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_CRS_P_WIDTH 1 |
| 1882 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_CRS_P_INT_SLC 0:0 |
| 1883 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_CRS_P_POSITION 15 |
| 1884 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_CRS_P_FMASK 64'b0000000000000000000000000000000000000000000000001000000000000000 |
| 1885 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_CRS_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000001000000000000000 |
| 1886 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_CRS_P_POR_VALUE 1'b0 |
| 1887 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_CRS_P_FIELD_NAME "crs_p" |
| 1888 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_IIP_P_FID 32 |
| 1889 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_IIP_P_SLC 14:14 |
| 1890 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_IIP_P_WIDTH 1 |
| 1891 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_IIP_P_INT_SLC 0:0 |
| 1892 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_IIP_P_POSITION 14 |
| 1893 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_IIP_P_FMASK 64'b0000000000000000000000000000000000000000000000000100000000000000 |
| 1894 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_IIP_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000100000000000000 |
| 1895 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_IIP_P_POR_VALUE 1'b0 |
| 1896 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_IIP_P_FIELD_NAME "iip_p" |
| 1897 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EDP_P_FID 33 |
| 1898 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EDP_P_SLC 13:13 |
| 1899 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EDP_P_WIDTH 1 |
| 1900 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EDP_P_INT_SLC 0:0 |
| 1901 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EDP_P_POSITION 13 |
| 1902 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EDP_P_FMASK 64'b0000000000000000000000000000000000000000000000000010000000000000 |
| 1903 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EDP_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000010000000000000 |
| 1904 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EDP_P_POR_VALUE 1'b0 |
| 1905 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EDP_P_FIELD_NAME "edp_p" |
| 1906 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EHP_P_FID 34 |
| 1907 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EHP_P_SLC 12:12 |
| 1908 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EHP_P_WIDTH 1 |
| 1909 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EHP_P_INT_SLC 0:0 |
| 1910 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EHP_P_POSITION 12 |
| 1911 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EHP_P_FMASK 64'b0000000000000000000000000000000000000000000000000001000000000000 |
| 1912 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EHP_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000001000000000000 |
| 1913 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EHP_P_POR_VALUE 1'b0 |
| 1914 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EHP_P_FIELD_NAME "ehp_p" |
| 1915 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LIN_P_FID 35 |
| 1916 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LIN_P_SLC 11:11 |
| 1917 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LIN_P_WIDTH 1 |
| 1918 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LIN_P_INT_SLC 0:0 |
| 1919 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LIN_P_POSITION 11 |
| 1920 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LIN_P_FMASK 64'b0000000000000000000000000000000000000000000000000000100000000000 |
| 1921 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LIN_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000100000000000 |
| 1922 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LIN_P_POR_VALUE 1'b0 |
| 1923 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LIN_P_FIELD_NAME "lin_p" |
| 1924 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LRS_P_FID 36 |
| 1925 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LRS_P_SLC 10:10 |
| 1926 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LRS_P_WIDTH 1 |
| 1927 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LRS_P_INT_SLC 0:0 |
| 1928 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LRS_P_POSITION 10 |
| 1929 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LRS_P_FMASK 64'b0000000000000000000000000000000000000000000000000000010000000000 |
| 1930 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LRS_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000010000000000 |
| 1931 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LRS_P_POR_VALUE 1'b0 |
| 1932 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LRS_P_FIELD_NAME "lrs_p" |
| 1933 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LDN_P_FID 37 |
| 1934 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LDN_P_SLC 9:9 |
| 1935 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LDN_P_WIDTH 1 |
| 1936 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LDN_P_INT_SLC 0:0 |
| 1937 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LDN_P_POSITION 9 |
| 1938 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LDN_P_FMASK 64'b0000000000000000000000000000000000000000000000000000001000000000 |
| 1939 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LDN_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000001000000000 |
| 1940 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LDN_P_POR_VALUE 1'b0 |
| 1941 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LDN_P_FIELD_NAME "ldn_p" |
| 1942 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LUP_P_FID 38 |
| 1943 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LUP_P_SLC 8:8 |
| 1944 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LUP_P_WIDTH 1 |
| 1945 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LUP_P_INT_SLC 0:0 |
| 1946 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LUP_P_POSITION 8 |
| 1947 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LUP_P_FMASK 64'b0000000000000000000000000000000000000000000000000000000100000000 |
| 1948 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LUP_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000100000000 |
| 1949 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LUP_P_POR_VALUE 1'b0 |
| 1950 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LUP_P_FIELD_NAME "lup_p" |
| 1951 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LPU_P_FID 39 |
| 1952 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LPU_P_SLC 7:6 |
| 1953 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LPU_P_WIDTH 2 |
| 1954 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LPU_P_INT_SLC 1:0 |
| 1955 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LPU_P_POSITION 6 |
| 1956 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LPU_P_FMASK 64'b0000000000000000000000000000000000000000000000000000000011000000 |
| 1957 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LPU_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000011000000 |
| 1958 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LPU_P_POR_VALUE 2'b00 |
| 1959 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_LPU_P_FIELD_NAME "lpu_p" |
| 1960 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERU_P_FID 40 |
| 1961 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERU_P_SLC 5:5 |
| 1962 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERU_P_WIDTH 1 |
| 1963 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERU_P_INT_SLC 0:0 |
| 1964 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERU_P_POSITION 5 |
| 1965 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERU_P_FMASK 64'b0000000000000000000000000000000000000000000000000000000000100000 |
| 1966 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERU_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000100000 |
| 1967 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERU_P_POR_VALUE 1'b0 |
| 1968 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERU_P_FIELD_NAME "eru_p" |
| 1969 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERO_P_FID 41 |
| 1970 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERO_P_SLC 4:4 |
| 1971 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERO_P_WIDTH 1 |
| 1972 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERO_P_INT_SLC 0:0 |
| 1973 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERO_P_POSITION 4 |
| 1974 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERO_P_FMASK 64'b0000000000000000000000000000000000000000000000000000000000010000 |
| 1975 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERO_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000010000 |
| 1976 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERO_P_POR_VALUE 1'b0 |
| 1977 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERO_P_FIELD_NAME "ero_p" |
| 1978 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EMP_P_FID 42 |
| 1979 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EMP_P_SLC 3:3 |
| 1980 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EMP_P_WIDTH 1 |
| 1981 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EMP_P_INT_SLC 0:0 |
| 1982 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EMP_P_POSITION 3 |
| 1983 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EMP_P_FMASK 64'b0000000000000000000000000000000000000000000000000000000000001000 |
| 1984 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EMP_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000001000 |
| 1985 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EMP_P_POR_VALUE 1'b0 |
| 1986 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EMP_P_FIELD_NAME "emp_p" |
| 1987 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EPE_P_FID 43 |
| 1988 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EPE_P_SLC 2:2 |
| 1989 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EPE_P_WIDTH 1 |
| 1990 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EPE_P_INT_SLC 0:0 |
| 1991 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EPE_P_POSITION 2 |
| 1992 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EPE_P_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000100 |
| 1993 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EPE_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000100 |
| 1994 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EPE_P_POR_VALUE 1'b0 |
| 1995 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EPE_P_FIELD_NAME "epe_p" |
| 1996 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERP_P_FID 44 |
| 1997 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERP_P_SLC 1:1 |
| 1998 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERP_P_WIDTH 1 |
| 1999 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERP_P_INT_SLC 0:0 |
| 2000 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERP_P_POSITION 1 |
| 2001 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERP_P_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000010 |
| 2002 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERP_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000010 |
| 2003 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERP_P_POR_VALUE 1'b0 |
| 2004 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_ERP_P_FIELD_NAME "erp_p" |
| 2005 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EIP_P_FID 45 |
| 2006 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EIP_P_SLC 0:0 |
| 2007 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EIP_P_WIDTH 1 |
| 2008 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EIP_P_INT_SLC 0:0 |
| 2009 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EIP_P_POSITION 0 |
| 2010 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EIP_P_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000001 |
| 2011 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EIP_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000001 |
| 2012 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EIP_P_POR_VALUE 1'b0 |
| 2013 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_OE_ERR_RW1S_ALIAS_EIP_P_FIELD_NAME "eip_p" |
| 2014 | |
| 2015 | //------------------------------------------------------- |
| 2016 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR1 |
| 2017 | //------------------------------------------------------- |
| 2018 | |
| 2019 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR1_HW_ADDR 27'b000000011110000001000000101 |
| 2020 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR1_ADDR 30'b000000011110000001000000101000 |
| 2021 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR1_NAME "fire_plc_tlu_ctb_tlr_csr_b_roe_hdr1" |
| 2022 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR1_WIDTH 64 |
| 2023 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR1_DEPTH 1 |
| 2024 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR1_SLC 63:0 |
| 2025 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR1_INT_SLC 63:0 |
| 2026 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR1_POSITION 0 |
| 2027 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR1_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_roe_hdr1" |
| 2028 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR1_LOW_ADDR_WIDTH 0 |
| 2029 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR1_ADDR_RANGE 26:0 |
| 2030 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR1_READ_MASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 2031 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR1_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2032 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR1_WRITE_MASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 2033 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR1_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2034 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR1_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2035 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR1_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2036 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR1_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2037 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR1_RMASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 2038 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR1_RESERVED_BIT_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2039 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR1_HW_LD_MASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 2040 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR1_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2041 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR1_INTERNAL_REG 1 |
| 2042 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR1_ALIASED_FROM 0 |
| 2043 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR1_ZERO_TIME_OMNI 1 |
| 2044 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR1_HW_ACC_JTAG_RD 1 |
| 2045 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR1_HW_ACC_JTAG_WR 1 |
| 2046 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR1_HW_ACC_PIO_SLOW_RD 1 |
| 2047 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR1_HW_ACC_PIO_SLOW_WR 1 |
| 2048 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR1_HW_ACC_PIO_MED_RD 1 |
| 2049 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR1_HW_ACC_PIO_MED_WR 1 |
| 2050 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR1_HW_ACC_PIO_FAST_RD 1 |
| 2051 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR1_HW_ACC_PIO_FAST_WR 1 |
| 2052 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR1_NUM_FIELDS 1 |
| 2053 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR1_HDR_FID 0 |
| 2054 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR1_HDR_SLC 63:0 |
| 2055 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR1_HDR_WIDTH 64 |
| 2056 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR1_HDR_INT_SLC 63:0 |
| 2057 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR1_HDR_POSITION 0 |
| 2058 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR1_HDR_FMASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 2059 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR1_HDR_HW_LD_MASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 2060 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR1_HDR_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2061 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR1_HDR_FIELD_NAME "hdr" |
| 2062 | |
| 2063 | //------------------------------------------------------- |
| 2064 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR2 |
| 2065 | //------------------------------------------------------- |
| 2066 | |
| 2067 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR2_HW_ADDR 27'b000000011110000001000000110 |
| 2068 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR2_ADDR 30'b000000011110000001000000110000 |
| 2069 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR2_NAME "fire_plc_tlu_ctb_tlr_csr_b_roe_hdr2" |
| 2070 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR2_WIDTH 64 |
| 2071 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR2_DEPTH 1 |
| 2072 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR2_SLC 63:0 |
| 2073 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR2_INT_SLC 63:0 |
| 2074 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR2_POSITION 0 |
| 2075 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR2_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_roe_hdr2" |
| 2076 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR2_LOW_ADDR_WIDTH 0 |
| 2077 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR2_ADDR_RANGE 26:0 |
| 2078 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR2_READ_MASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 2079 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR2_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2080 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR2_WRITE_MASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 2081 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR2_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2082 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR2_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2083 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR2_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2084 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR2_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2085 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR2_RMASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 2086 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR2_RESERVED_BIT_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2087 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR2_HW_LD_MASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 2088 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR2_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2089 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR2_INTERNAL_REG 1 |
| 2090 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR2_ALIASED_FROM 0 |
| 2091 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR2_ZERO_TIME_OMNI 1 |
| 2092 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR2_HW_ACC_JTAG_RD 1 |
| 2093 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR2_HW_ACC_JTAG_WR 1 |
| 2094 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR2_HW_ACC_PIO_SLOW_RD 1 |
| 2095 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR2_HW_ACC_PIO_SLOW_WR 1 |
| 2096 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR2_HW_ACC_PIO_MED_RD 1 |
| 2097 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR2_HW_ACC_PIO_MED_WR 1 |
| 2098 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR2_HW_ACC_PIO_FAST_RD 1 |
| 2099 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR2_HW_ACC_PIO_FAST_WR 1 |
| 2100 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR2_NUM_FIELDS 1 |
| 2101 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR2_HDR_FID 0 |
| 2102 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR2_HDR_SLC 63:0 |
| 2103 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR2_HDR_WIDTH 64 |
| 2104 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR2_HDR_INT_SLC 63:0 |
| 2105 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR2_HDR_POSITION 0 |
| 2106 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR2_HDR_FMASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 2107 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR2_HDR_HW_LD_MASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 2108 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR2_HDR_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2109 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ROE_HDR2_HDR_FIELD_NAME "hdr" |
| 2110 | |
| 2111 | //------------------------------------------------------- |
| 2112 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR1 |
| 2113 | //------------------------------------------------------- |
| 2114 | |
| 2115 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR1_HW_ADDR 27'b000000011110000001000000111 |
| 2116 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR1_ADDR 30'b000000011110000001000000111000 |
| 2117 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR1_NAME "fire_plc_tlu_ctb_tlr_csr_b_toe_hdr1" |
| 2118 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR1_WIDTH 64 |
| 2119 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR1_DEPTH 1 |
| 2120 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR1_SLC 63:0 |
| 2121 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR1_INT_SLC 63:0 |
| 2122 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR1_POSITION 0 |
| 2123 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR1_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_toe_hdr1" |
| 2124 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR1_LOW_ADDR_WIDTH 0 |
| 2125 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR1_ADDR_RANGE 26:0 |
| 2126 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR1_READ_MASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 2127 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR1_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2128 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR1_WRITE_MASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 2129 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR1_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2130 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR1_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2131 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR1_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2132 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR1_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2133 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR1_RMASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 2134 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR1_RESERVED_BIT_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2135 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR1_HW_LD_MASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 2136 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR1_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2137 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR1_INTERNAL_REG 1 |
| 2138 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR1_ALIASED_FROM 0 |
| 2139 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR1_ZERO_TIME_OMNI 1 |
| 2140 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR1_HW_ACC_JTAG_RD 1 |
| 2141 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR1_HW_ACC_JTAG_WR 1 |
| 2142 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR1_HW_ACC_PIO_SLOW_RD 1 |
| 2143 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR1_HW_ACC_PIO_SLOW_WR 1 |
| 2144 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR1_HW_ACC_PIO_MED_RD 1 |
| 2145 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR1_HW_ACC_PIO_MED_WR 1 |
| 2146 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR1_HW_ACC_PIO_FAST_RD 1 |
| 2147 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR1_HW_ACC_PIO_FAST_WR 1 |
| 2148 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR1_NUM_FIELDS 1 |
| 2149 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR1_HDR_FID 0 |
| 2150 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR1_HDR_SLC 63:0 |
| 2151 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR1_HDR_WIDTH 64 |
| 2152 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR1_HDR_INT_SLC 63:0 |
| 2153 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR1_HDR_POSITION 0 |
| 2154 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR1_HDR_FMASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 2155 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR1_HDR_HW_LD_MASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 2156 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR1_HDR_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2157 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR1_HDR_FIELD_NAME "hdr" |
| 2158 | |
| 2159 | //------------------------------------------------------- |
| 2160 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR2 |
| 2161 | //------------------------------------------------------- |
| 2162 | |
| 2163 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR2_HW_ADDR 27'b000000011110000001000001000 |
| 2164 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR2_ADDR 30'b000000011110000001000001000000 |
| 2165 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR2_NAME "fire_plc_tlu_ctb_tlr_csr_b_toe_hdr2" |
| 2166 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR2_WIDTH 64 |
| 2167 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR2_DEPTH 1 |
| 2168 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR2_SLC 63:0 |
| 2169 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR2_INT_SLC 63:0 |
| 2170 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR2_POSITION 0 |
| 2171 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR2_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_toe_hdr2" |
| 2172 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR2_LOW_ADDR_WIDTH 0 |
| 2173 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR2_ADDR_RANGE 26:0 |
| 2174 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR2_READ_MASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 2175 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR2_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2176 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR2_WRITE_MASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 2177 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR2_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2178 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR2_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2179 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR2_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2180 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR2_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2181 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR2_RMASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 2182 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR2_RESERVED_BIT_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2183 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR2_HW_LD_MASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 2184 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR2_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2185 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR2_INTERNAL_REG 1 |
| 2186 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR2_ALIASED_FROM 0 |
| 2187 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR2_ZERO_TIME_OMNI 1 |
| 2188 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR2_HW_ACC_JTAG_RD 1 |
| 2189 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR2_HW_ACC_JTAG_WR 1 |
| 2190 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR2_HW_ACC_PIO_SLOW_RD 1 |
| 2191 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR2_HW_ACC_PIO_SLOW_WR 1 |
| 2192 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR2_HW_ACC_PIO_MED_RD 1 |
| 2193 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR2_HW_ACC_PIO_MED_WR 1 |
| 2194 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR2_HW_ACC_PIO_FAST_RD 1 |
| 2195 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR2_HW_ACC_PIO_FAST_WR 1 |
| 2196 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR2_NUM_FIELDS 1 |
| 2197 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR2_HDR_FID 0 |
| 2198 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR2_HDR_SLC 63:0 |
| 2199 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR2_HDR_WIDTH 64 |
| 2200 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR2_HDR_INT_SLC 63:0 |
| 2201 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR2_HDR_POSITION 0 |
| 2202 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR2_HDR_FMASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 2203 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR2_HDR_HW_LD_MASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 2204 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR2_HDR_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2205 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TOE_HDR2_HDR_FIELD_NAME "hdr" |
| 2206 | |
| 2207 | //------------------------------------------------------- |
| 2208 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC |
| 2209 | //------------------------------------------------------- |
| 2210 | |
| 2211 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_HW_ADDR 27'b000000011110000010000000000 |
| 2212 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_ADDR 30'b000000011110000010000000000000 |
| 2213 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_NAME "fire_plc_tlu_ctb_tlr_csr_b_tlu_prfc" |
| 2214 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_WIDTH 64 |
| 2215 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_DEPTH 1 |
| 2216 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_SLC 63:0 |
| 2217 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_INT_SLC 63:0 |
| 2218 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_POSITION 0 |
| 2219 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_tlu_prfc" |
| 2220 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_LOW_ADDR_WIDTH 0 |
| 2221 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_ADDR_RANGE 26:0 |
| 2222 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_READ_MASK 64'b0000000000000000000000000000000000000000000000111111111111111111 |
| 2223 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2224 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_WRITE_MASK 64'b0000000000000000000000000000000000000000000000111111111111111111 |
| 2225 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2226 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2227 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2228 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2229 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_RMASK 64'b0000000000000000000000000000000000000000000000111111111111111111 |
| 2230 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_RESERVED_BIT_MASK 64'b1111111111111111111111111111111111111111111111000000000000000000 |
| 2231 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2232 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2233 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_INTERNAL_REG 1 |
| 2234 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_ALIASED_FROM 0 |
| 2235 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_ZERO_TIME_OMNI 1 |
| 2236 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_HW_ACC_JTAG_RD 1 |
| 2237 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_HW_ACC_JTAG_WR 1 |
| 2238 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_HW_ACC_PIO_SLOW_RD 1 |
| 2239 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_HW_ACC_PIO_SLOW_WR 1 |
| 2240 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_HW_ACC_PIO_MED_RD 1 |
| 2241 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_HW_ACC_PIO_MED_WR 1 |
| 2242 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_HW_ACC_PIO_FAST_RD 1 |
| 2243 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_HW_ACC_PIO_FAST_WR 1 |
| 2244 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_NUM_FIELDS 3 |
| 2245 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_SEL2_FID 0 |
| 2246 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_SEL2_SLC 17:16 |
| 2247 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_SEL2_WIDTH 2 |
| 2248 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_SEL2_INT_SLC 1:0 |
| 2249 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_SEL2_POSITION 16 |
| 2250 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_SEL2_FMASK 64'b0000000000000000000000000000000000000000000000110000000000000000 |
| 2251 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_SEL2_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2252 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_SEL2_POR_VALUE 2'b00 |
| 2253 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_SEL2_FIELD_NAME "sel2" |
| 2254 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_SEL1_FID 1 |
| 2255 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_SEL1_SLC 15:8 |
| 2256 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_SEL1_WIDTH 8 |
| 2257 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_SEL1_INT_SLC 7:0 |
| 2258 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_SEL1_POSITION 8 |
| 2259 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_SEL1_FMASK 64'b0000000000000000000000000000000000000000000000001111111100000000 |
| 2260 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_SEL1_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2261 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_SEL1_POR_VALUE 8'b00000000 |
| 2262 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_SEL1_FIELD_NAME "sel1" |
| 2263 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_SEL0_FID 2 |
| 2264 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_SEL0_SLC 7:0 |
| 2265 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_SEL0_WIDTH 8 |
| 2266 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_SEL0_INT_SLC 7:0 |
| 2267 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_SEL0_POSITION 0 |
| 2268 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_SEL0_FMASK 64'b0000000000000000000000000000000000000000000000000000000011111111 |
| 2269 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_SEL0_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2270 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_SEL0_POR_VALUE 8'b00000000 |
| 2271 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRFC_SEL0_FIELD_NAME "sel0" |
| 2272 | |
| 2273 | //------------------------------------------------------- |
| 2274 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF0 |
| 2275 | //------------------------------------------------------- |
| 2276 | |
| 2277 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF0_HW_ADDR 27'b000000011110000010000000001 |
| 2278 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF0_ADDR 30'b000000011110000010000000001000 |
| 2279 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF0_NAME "fire_plc_tlu_ctb_tlr_csr_b_tlu_prf0" |
| 2280 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF0_WIDTH 64 |
| 2281 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF0_DEPTH 1 |
| 2282 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF0_SLC 63:0 |
| 2283 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF0_INT_SLC 63:0 |
| 2284 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF0_POSITION 0 |
| 2285 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF0_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_tlu_prf0" |
| 2286 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF0_LOW_ADDR_WIDTH 0 |
| 2287 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF0_ADDR_RANGE 26:0 |
| 2288 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF0_READ_MASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 2289 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF0_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2290 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF0_WRITE_MASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 2291 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF0_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2292 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF0_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2293 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF0_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2294 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF0_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2295 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF0_RMASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 2296 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF0_RESERVED_BIT_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2297 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF0_HW_LD_MASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 2298 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF0_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2299 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF0_INTERNAL_REG 1 |
| 2300 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF0_ALIASED_FROM 0 |
| 2301 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF0_ZERO_TIME_OMNI 1 |
| 2302 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF0_HW_ACC_JTAG_RD 1 |
| 2303 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF0_HW_ACC_JTAG_WR 1 |
| 2304 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF0_HW_ACC_PIO_SLOW_RD 1 |
| 2305 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF0_HW_ACC_PIO_SLOW_WR 1 |
| 2306 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF0_HW_ACC_PIO_MED_RD 1 |
| 2307 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF0_HW_ACC_PIO_MED_WR 1 |
| 2308 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF0_HW_ACC_PIO_FAST_RD 1 |
| 2309 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF0_HW_ACC_PIO_FAST_WR 1 |
| 2310 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF0_NUM_FIELDS 1 |
| 2311 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF0_CNT_FID 0 |
| 2312 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF0_CNT_SLC 63:0 |
| 2313 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF0_CNT_WIDTH 64 |
| 2314 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF0_CNT_INT_SLC 63:0 |
| 2315 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF0_CNT_POSITION 0 |
| 2316 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF0_CNT_FMASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 2317 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF0_CNT_HW_LD_MASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 2318 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF0_CNT_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2319 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF0_CNT_FIELD_NAME "cnt" |
| 2320 | |
| 2321 | //------------------------------------------------------- |
| 2322 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF1 |
| 2323 | //------------------------------------------------------- |
| 2324 | |
| 2325 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF1_HW_ADDR 27'b000000011110000010000000010 |
| 2326 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF1_ADDR 30'b000000011110000010000000010000 |
| 2327 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF1_NAME "fire_plc_tlu_ctb_tlr_csr_b_tlu_prf1" |
| 2328 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF1_WIDTH 64 |
| 2329 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF1_DEPTH 1 |
| 2330 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF1_SLC 63:0 |
| 2331 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF1_INT_SLC 63:0 |
| 2332 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF1_POSITION 0 |
| 2333 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF1_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_tlu_prf1" |
| 2334 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF1_LOW_ADDR_WIDTH 0 |
| 2335 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF1_ADDR_RANGE 26:0 |
| 2336 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF1_READ_MASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 2337 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF1_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2338 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF1_WRITE_MASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 2339 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF1_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2340 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF1_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2341 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF1_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2342 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF1_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2343 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF1_RMASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 2344 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF1_RESERVED_BIT_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2345 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF1_HW_LD_MASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 2346 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF1_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2347 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF1_INTERNAL_REG 1 |
| 2348 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF1_ALIASED_FROM 0 |
| 2349 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF1_ZERO_TIME_OMNI 1 |
| 2350 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF1_HW_ACC_JTAG_RD 1 |
| 2351 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF1_HW_ACC_JTAG_WR 1 |
| 2352 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF1_HW_ACC_PIO_SLOW_RD 1 |
| 2353 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF1_HW_ACC_PIO_SLOW_WR 1 |
| 2354 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF1_HW_ACC_PIO_MED_RD 1 |
| 2355 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF1_HW_ACC_PIO_MED_WR 1 |
| 2356 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF1_HW_ACC_PIO_FAST_RD 1 |
| 2357 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF1_HW_ACC_PIO_FAST_WR 1 |
| 2358 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF1_NUM_FIELDS 1 |
| 2359 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF1_CNT_FID 0 |
| 2360 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF1_CNT_SLC 63:0 |
| 2361 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF1_CNT_WIDTH 64 |
| 2362 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF1_CNT_INT_SLC 63:0 |
| 2363 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF1_CNT_POSITION 0 |
| 2364 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF1_CNT_FMASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 2365 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF1_CNT_HW_LD_MASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 2366 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF1_CNT_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2367 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF1_CNT_FIELD_NAME "cnt" |
| 2368 | |
| 2369 | //------------------------------------------------------- |
| 2370 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF2 |
| 2371 | //------------------------------------------------------- |
| 2372 | |
| 2373 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF2_HW_ADDR 27'b000000011110000010000000011 |
| 2374 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF2_ADDR 30'b000000011110000010000000011000 |
| 2375 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF2_NAME "fire_plc_tlu_ctb_tlr_csr_b_tlu_prf2" |
| 2376 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF2_WIDTH 64 |
| 2377 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF2_DEPTH 1 |
| 2378 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF2_SLC 63:0 |
| 2379 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF2_INT_SLC 63:0 |
| 2380 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF2_POSITION 0 |
| 2381 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF2_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_tlu_prf2" |
| 2382 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF2_LOW_ADDR_WIDTH 0 |
| 2383 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF2_ADDR_RANGE 26:0 |
| 2384 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF2_READ_MASK 64'b0000000000000000000000000000000011111111111111111111111111111111 |
| 2385 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF2_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2386 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF2_WRITE_MASK 64'b0000000000000000000000000000000011111111111111111111111111111111 |
| 2387 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF2_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2388 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF2_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2389 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF2_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2390 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF2_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2391 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF2_RMASK 64'b0000000000000000000000000000000011111111111111111111111111111111 |
| 2392 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF2_RESERVED_BIT_MASK 64'b1111111111111111111111111111111100000000000000000000000000000000 |
| 2393 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF2_HW_LD_MASK 64'b0000000000000000000000000000000011111111111111111111111111111111 |
| 2394 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF2_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2395 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF2_INTERNAL_REG 1 |
| 2396 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF2_ALIASED_FROM 0 |
| 2397 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF2_ZERO_TIME_OMNI 1 |
| 2398 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF2_HW_ACC_JTAG_RD 1 |
| 2399 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF2_HW_ACC_JTAG_WR 1 |
| 2400 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF2_HW_ACC_PIO_SLOW_RD 1 |
| 2401 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF2_HW_ACC_PIO_SLOW_WR 1 |
| 2402 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF2_HW_ACC_PIO_MED_RD 1 |
| 2403 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF2_HW_ACC_PIO_MED_WR 1 |
| 2404 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF2_HW_ACC_PIO_FAST_RD 1 |
| 2405 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF2_HW_ACC_PIO_FAST_WR 1 |
| 2406 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF2_NUM_FIELDS 1 |
| 2407 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF2_CNT_FID 0 |
| 2408 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF2_CNT_SLC 31:0 |
| 2409 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF2_CNT_WIDTH 32 |
| 2410 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF2_CNT_INT_SLC 31:0 |
| 2411 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF2_CNT_POSITION 0 |
| 2412 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF2_CNT_FMASK 64'b0000000000000000000000000000000011111111111111111111111111111111 |
| 2413 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF2_CNT_HW_LD_MASK 64'b0000000000000000000000000000000011111111111111111111111111111111 |
| 2414 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF2_CNT_POR_VALUE 32'b00000000000000000000000000000000 |
| 2415 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_PRF2_CNT_FIELD_NAME "cnt" |
| 2416 | |
| 2417 | //------------------------------------------------------- |
| 2418 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A |
| 2419 | //------------------------------------------------------- |
| 2420 | |
| 2421 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_HW_ADDR 27'b000000011110000011000000000 |
| 2422 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_ADDR 30'b000000011110000011000000000000 |
| 2423 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_NAME "fire_plc_tlu_ctb_tlr_csr_b_tlu_dbg_sel_a" |
| 2424 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_WIDTH 64 |
| 2425 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_DEPTH 1 |
| 2426 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_SLC 63:0 |
| 2427 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_INT_SLC 63:0 |
| 2428 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_POSITION 0 |
| 2429 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_tlu_dbg_sel_a" |
| 2430 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_LOW_ADDR_WIDTH 0 |
| 2431 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_ADDR_RANGE 26:0 |
| 2432 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_READ_MASK 64'b0000000000000000000000000000000000000000000000000000000111111111 |
| 2433 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2434 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_WRITE_MASK 64'b0000000000000000000000000000000000000000000000000000000111111111 |
| 2435 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2436 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2437 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2438 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2439 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_RMASK 64'b0000000000000000000000000000000000000000000000000000000111111111 |
| 2440 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_RESERVED_BIT_MASK 64'b1111111111111111111111111111111111111111111111111111111000000000 |
| 2441 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2442 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2443 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_INTERNAL_REG 1 |
| 2444 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_ALIASED_FROM 0 |
| 2445 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_ZERO_TIME_OMNI 1 |
| 2446 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_HW_ACC_JTAG_RD 1 |
| 2447 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_HW_ACC_JTAG_WR 1 |
| 2448 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_HW_ACC_PIO_SLOW_RD 1 |
| 2449 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_HW_ACC_PIO_SLOW_WR 1 |
| 2450 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_HW_ACC_PIO_MED_RD 1 |
| 2451 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_HW_ACC_PIO_MED_WR 1 |
| 2452 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_HW_ACC_PIO_FAST_RD 1 |
| 2453 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_HW_ACC_PIO_FAST_WR 1 |
| 2454 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_NUM_FIELDS 3 |
| 2455 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_BLOCK_FID 0 |
| 2456 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_BLOCK_SLC 8:6 |
| 2457 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_BLOCK_WIDTH 3 |
| 2458 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_BLOCK_INT_SLC 2:0 |
| 2459 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_BLOCK_POSITION 6 |
| 2460 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_BLOCK_FMASK 64'b0000000000000000000000000000000000000000000000000000000111000000 |
| 2461 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_BLOCK_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2462 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_BLOCK_POR_VALUE 3'b000 |
| 2463 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_BLOCK_FIELD_NAME "block" |
| 2464 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_MODULE_FID 1 |
| 2465 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_MODULE_SLC 5:3 |
| 2466 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_MODULE_WIDTH 3 |
| 2467 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_MODULE_INT_SLC 2:0 |
| 2468 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_MODULE_POSITION 3 |
| 2469 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_MODULE_FMASK 64'b0000000000000000000000000000000000000000000000000000000000111000 |
| 2470 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_MODULE_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2471 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_MODULE_POR_VALUE 3'b000 |
| 2472 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_MODULE_FIELD_NAME "module" |
| 2473 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_SIGNAL_FID 2 |
| 2474 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_SIGNAL_SLC 2:0 |
| 2475 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_SIGNAL_WIDTH 3 |
| 2476 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_SIGNAL_INT_SLC 2:0 |
| 2477 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_SIGNAL_POSITION 0 |
| 2478 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_SIGNAL_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000111 |
| 2479 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_SIGNAL_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2480 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_SIGNAL_POR_VALUE 3'b000 |
| 2481 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_A_SIGNAL_FIELD_NAME "signal" |
| 2482 | |
| 2483 | //------------------------------------------------------- |
| 2484 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B |
| 2485 | //------------------------------------------------------- |
| 2486 | |
| 2487 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_HW_ADDR 27'b000000011110000011000000001 |
| 2488 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_ADDR 30'b000000011110000011000000001000 |
| 2489 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_NAME "fire_plc_tlu_ctb_tlr_csr_b_tlu_dbg_sel_b" |
| 2490 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_WIDTH 64 |
| 2491 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_DEPTH 1 |
| 2492 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_SLC 63:0 |
| 2493 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_INT_SLC 63:0 |
| 2494 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_POSITION 0 |
| 2495 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_tlu_dbg_sel_b" |
| 2496 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_LOW_ADDR_WIDTH 0 |
| 2497 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_ADDR_RANGE 26:0 |
| 2498 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_READ_MASK 64'b0000000000000000000000000000000000000000000000000000000111111111 |
| 2499 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2500 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_WRITE_MASK 64'b0000000000000000000000000000000000000000000000000000000111111111 |
| 2501 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2502 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2503 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2504 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2505 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_RMASK 64'b0000000000000000000000000000000000000000000000000000000111111111 |
| 2506 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_RESERVED_BIT_MASK 64'b1111111111111111111111111111111111111111111111111111111000000000 |
| 2507 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2508 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2509 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_INTERNAL_REG 1 |
| 2510 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_ALIASED_FROM 0 |
| 2511 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_ZERO_TIME_OMNI 1 |
| 2512 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_HW_ACC_JTAG_RD 1 |
| 2513 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_HW_ACC_JTAG_WR 1 |
| 2514 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_HW_ACC_PIO_SLOW_RD 1 |
| 2515 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_HW_ACC_PIO_SLOW_WR 1 |
| 2516 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_HW_ACC_PIO_MED_RD 1 |
| 2517 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_HW_ACC_PIO_MED_WR 1 |
| 2518 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_HW_ACC_PIO_FAST_RD 1 |
| 2519 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_HW_ACC_PIO_FAST_WR 1 |
| 2520 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_NUM_FIELDS 3 |
| 2521 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_BLOCK_FID 0 |
| 2522 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_BLOCK_SLC 8:6 |
| 2523 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_BLOCK_WIDTH 3 |
| 2524 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_BLOCK_INT_SLC 2:0 |
| 2525 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_BLOCK_POSITION 6 |
| 2526 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_BLOCK_FMASK 64'b0000000000000000000000000000000000000000000000000000000111000000 |
| 2527 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_BLOCK_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2528 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_BLOCK_POR_VALUE 3'b000 |
| 2529 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_BLOCK_FIELD_NAME "block" |
| 2530 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_MODULE_FID 1 |
| 2531 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_MODULE_SLC 5:3 |
| 2532 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_MODULE_WIDTH 3 |
| 2533 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_MODULE_INT_SLC 2:0 |
| 2534 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_MODULE_POSITION 3 |
| 2535 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_MODULE_FMASK 64'b0000000000000000000000000000000000000000000000000000000000111000 |
| 2536 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_MODULE_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2537 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_MODULE_POR_VALUE 3'b000 |
| 2538 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_MODULE_FIELD_NAME "module" |
| 2539 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_SIGNAL_FID 2 |
| 2540 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_SIGNAL_SLC 2:0 |
| 2541 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_SIGNAL_WIDTH 3 |
| 2542 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_SIGNAL_INT_SLC 2:0 |
| 2543 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_SIGNAL_POSITION 0 |
| 2544 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_SIGNAL_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000111 |
| 2545 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_SIGNAL_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2546 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_SIGNAL_POR_VALUE 3'b000 |
| 2547 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TLU_DBG_SEL_B_SIGNAL_FIELD_NAME "signal" |
| 2548 | |
| 2549 | //------------------------------------------------------- |
| 2550 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP |
| 2551 | //------------------------------------------------------- |
| 2552 | |
| 2553 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_HW_ADDR 27'b000000011110010000000000000 |
| 2554 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_ADDR 30'b000000011110010000000000000000 |
| 2555 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_NAME "fire_plc_tlu_ctb_tlr_csr_b_dev_cap" |
| 2556 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_WIDTH 64 |
| 2557 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_DEPTH 1 |
| 2558 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_SLC 63:0 |
| 2559 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_INT_SLC 63:0 |
| 2560 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_POSITION 0 |
| 2561 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_dev_cap" |
| 2562 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_LOW_ADDR_WIDTH 0 |
| 2563 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_ADDR_RANGE 26:0 |
| 2564 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_READ_MASK 64'b0000000000000000000000000000000000000000000000000000111111000111 |
| 2565 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000111111000111 |
| 2566 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_WRITE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2567 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2568 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2569 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2570 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2571 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_RMASK 64'b0000000000000000000000000000000000000000000000000000111111000111 |
| 2572 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_RESERVED_BIT_MASK 64'b1111111111111111111111111111111111111111111111111111000000111000 |
| 2573 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2574 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000010 |
| 2575 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_INTERNAL_REG 1 |
| 2576 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_ALIASED_FROM 0 |
| 2577 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_ZERO_TIME_OMNI 1 |
| 2578 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_HW_ACC_JTAG_RD 1 |
| 2579 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_HW_ACC_JTAG_WR 1 |
| 2580 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_HW_ACC_PIO_SLOW_RD 1 |
| 2581 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_HW_ACC_PIO_SLOW_WR 1 |
| 2582 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_HW_ACC_PIO_MED_RD 1 |
| 2583 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_HW_ACC_PIO_MED_WR 1 |
| 2584 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_HW_ACC_PIO_FAST_RD 1 |
| 2585 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_HW_ACC_PIO_FAST_WR 1 |
| 2586 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_NUM_FIELDS 3 |
| 2587 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_L1_FID 0 |
| 2588 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_L1_SLC 11:9 |
| 2589 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_L1_WIDTH 3 |
| 2590 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_L1_INT_SLC 2:0 |
| 2591 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_L1_POSITION 9 |
| 2592 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_L1_FMASK 64'b0000000000000000000000000000000000000000000000000000111000000000 |
| 2593 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_L1_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2594 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_L1_POR_VALUE 3'b000 |
| 2595 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_L1_FIELD_NAME "l1" |
| 2596 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_L0S_FID 1 |
| 2597 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_L0S_SLC 8:6 |
| 2598 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_L0S_WIDTH 3 |
| 2599 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_L0S_INT_SLC 2:0 |
| 2600 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_L0S_POSITION 6 |
| 2601 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_L0S_FMASK 64'b0000000000000000000000000000000000000000000000000000000111000000 |
| 2602 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_L0S_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2603 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_L0S_POR_VALUE 3'b000 |
| 2604 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_L0S_FIELD_NAME "l0s" |
| 2605 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_MPS_FID 2 |
| 2606 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_MPS_SLC 2:0 |
| 2607 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_MPS_WIDTH 3 |
| 2608 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_MPS_INT_SLC 2:0 |
| 2609 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_MPS_POSITION 0 |
| 2610 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_MPS_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000111 |
| 2611 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_MPS_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2612 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_MPS_POR_VALUE 3'b010 |
| 2613 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CAP_MPS_FIELD_NAME "mps" |
| 2614 | |
| 2615 | //------------------------------------------------------- |
| 2616 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL |
| 2617 | //------------------------------------------------------- |
| 2618 | |
| 2619 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_HW_ADDR 27'b000000011110010000000000001 |
| 2620 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_ADDR 30'b000000011110010000000000001000 |
| 2621 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_NAME "fire_plc_tlu_ctb_tlr_csr_b_dev_ctl" |
| 2622 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_WIDTH 64 |
| 2623 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_DEPTH 1 |
| 2624 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_SLC 63:0 |
| 2625 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_INT_SLC 63:0 |
| 2626 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_POSITION 0 |
| 2627 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_dev_ctl" |
| 2628 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_LOW_ADDR_WIDTH 0 |
| 2629 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_ADDR_RANGE 26:0 |
| 2630 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_READ_MASK 64'b0000000000000000000000000000000000000000000000000111000011100000 |
| 2631 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000111000000000000 |
| 2632 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_WRITE_MASK 64'b0000000000000000000000000000000000000000000000000000000011100000 |
| 2633 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2634 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2635 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2636 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2637 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_RMASK 64'b0000000000000000000000000000000000000000000000000111000011100000 |
| 2638 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_RESERVED_BIT_MASK 64'b1111111111111111111111111111111111111111111111111000111100011111 |
| 2639 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2640 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2641 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_INTERNAL_REG 1 |
| 2642 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_ALIASED_FROM 0 |
| 2643 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_ZERO_TIME_OMNI 1 |
| 2644 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_HW_ACC_JTAG_RD 1 |
| 2645 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_HW_ACC_JTAG_WR 1 |
| 2646 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_HW_ACC_PIO_SLOW_RD 1 |
| 2647 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_HW_ACC_PIO_SLOW_WR 1 |
| 2648 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_HW_ACC_PIO_MED_RD 1 |
| 2649 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_HW_ACC_PIO_MED_WR 1 |
| 2650 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_HW_ACC_PIO_FAST_RD 1 |
| 2651 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_HW_ACC_PIO_FAST_WR 1 |
| 2652 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_NUM_FIELDS 2 |
| 2653 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_MRRS_FID 0 |
| 2654 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_MRRS_SLC 14:12 |
| 2655 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_MRRS_WIDTH 3 |
| 2656 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_MRRS_INT_SLC 2:0 |
| 2657 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_MRRS_POSITION 12 |
| 2658 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_MRRS_FMASK 64'b0000000000000000000000000000000000000000000000000111000000000000 |
| 2659 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_MRRS_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2660 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_MRRS_POR_VALUE 3'b000 |
| 2661 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_MRRS_FIELD_NAME "mrrs" |
| 2662 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_MPS_FID 1 |
| 2663 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_MPS_SLC 7:5 |
| 2664 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_MPS_WIDTH 3 |
| 2665 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_MPS_INT_SLC 2:0 |
| 2666 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_MPS_POSITION 5 |
| 2667 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_MPS_FMASK 64'b0000000000000000000000000000000000000000000000000000000011100000 |
| 2668 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_MPS_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2669 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_MPS_POR_VALUE 3'b000 |
| 2670 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_CTL_MPS_FIELD_NAME "mps" |
| 2671 | |
| 2672 | //------------------------------------------------------- |
| 2673 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_STS |
| 2674 | //------------------------------------------------------- |
| 2675 | |
| 2676 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_STS_HW_ADDR 27'b000000011110010000000000010 |
| 2677 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_STS_ADDR 30'b000000011110010000000000010000 |
| 2678 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_STS_NAME "fire_plc_tlu_ctb_tlr_csr_b_dev_sts" |
| 2679 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_STS_WIDTH 64 |
| 2680 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_STS_DEPTH 1 |
| 2681 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_STS_SLC 63:0 |
| 2682 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_STS_INT_SLC 63:0 |
| 2683 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_STS_POSITION 0 |
| 2684 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_STS_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_dev_sts" |
| 2685 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_STS_LOW_ADDR_WIDTH 0 |
| 2686 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_STS_ADDR_RANGE 26:0 |
| 2687 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_STS_READ_MASK 64'b0000000000000000000000000000000000000000000000000000000000100000 |
| 2688 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_STS_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000100000 |
| 2689 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_STS_WRITE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2690 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_STS_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2691 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_STS_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2692 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_STS_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2693 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_STS_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2694 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_STS_RMASK 64'b0000000000000000000000000000000000000000000000000000000000100000 |
| 2695 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_STS_RESERVED_BIT_MASK 64'b1111111111111111111111111111111111111111111111111111111111011111 |
| 2696 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_STS_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000100000 |
| 2697 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_STS_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2698 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_STS_INTERNAL_REG 1 |
| 2699 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_STS_ALIASED_FROM 0 |
| 2700 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_STS_ZERO_TIME_OMNI 1 |
| 2701 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_STS_HW_ACC_JTAG_RD 1 |
| 2702 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_STS_HW_ACC_JTAG_WR 1 |
| 2703 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_STS_HW_ACC_PIO_SLOW_RD 1 |
| 2704 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_STS_HW_ACC_PIO_SLOW_WR 1 |
| 2705 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_STS_HW_ACC_PIO_MED_RD 1 |
| 2706 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_STS_HW_ACC_PIO_MED_WR 1 |
| 2707 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_STS_HW_ACC_PIO_FAST_RD 1 |
| 2708 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_STS_HW_ACC_PIO_FAST_WR 1 |
| 2709 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_STS_NUM_FIELDS 1 |
| 2710 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_STS_TP_FID 0 |
| 2711 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_STS_TP_SLC 5:5 |
| 2712 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_STS_TP_WIDTH 1 |
| 2713 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_STS_TP_INT_SLC 0:0 |
| 2714 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_STS_TP_POSITION 5 |
| 2715 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_STS_TP_FMASK 64'b0000000000000000000000000000000000000000000000000000000000100000 |
| 2716 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_STS_TP_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000100000 |
| 2717 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_STS_TP_POR_VALUE 1'b0 |
| 2718 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_DEV_STS_TP_FIELD_NAME "tp" |
| 2719 | |
| 2720 | //------------------------------------------------------- |
| 2721 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP |
| 2722 | //------------------------------------------------------- |
| 2723 | |
| 2724 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_HW_ADDR 27'b000000011110010000000000011 |
| 2725 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_ADDR 30'b000000011110010000000000011000 |
| 2726 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_NAME "fire_plc_tlu_ctb_tlr_csr_b_lnk_cap" |
| 2727 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_WIDTH 64 |
| 2728 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_DEPTH 1 |
| 2729 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_SLC 63:0 |
| 2730 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_INT_SLC 63:0 |
| 2731 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_POSITION 0 |
| 2732 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_lnk_cap" |
| 2733 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_LOW_ADDR_WIDTH 0 |
| 2734 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_ADDR_RANGE 26:0 |
| 2735 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_READ_MASK 64'b0000000000000000000000000000000011111111000000111111111111111111 |
| 2736 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_READ_ONLY_MASK 64'b0000000000000000000000000000000011111111000000111111111111111111 |
| 2737 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_WRITE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2738 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2739 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2740 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2741 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2742 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_RMASK 64'b0000000000000000000000000000000011111111000000111111111111111111 |
| 2743 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_RESERVED_BIT_MASK 64'b1111111111111111111111111111111100000000111111000000000000000000 |
| 2744 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2745 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_POR_VALUE 64'b0000000000000000000000000000000000000000000000010100110010000001 |
| 2746 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_INTERNAL_REG 1 |
| 2747 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_ALIASED_FROM 0 |
| 2748 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_ZERO_TIME_OMNI 1 |
| 2749 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_HW_ACC_JTAG_RD 1 |
| 2750 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_HW_ACC_JTAG_WR 1 |
| 2751 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_HW_ACC_PIO_SLOW_RD 1 |
| 2752 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_HW_ACC_PIO_SLOW_WR 1 |
| 2753 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_HW_ACC_PIO_MED_RD 1 |
| 2754 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_HW_ACC_PIO_MED_WR 1 |
| 2755 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_HW_ACC_PIO_FAST_RD 1 |
| 2756 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_HW_ACC_PIO_FAST_WR 1 |
| 2757 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_NUM_FIELDS 6 |
| 2758 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_PORT_FID 0 |
| 2759 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_PORT_SLC 31:24 |
| 2760 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_PORT_WIDTH 8 |
| 2761 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_PORT_INT_SLC 7:0 |
| 2762 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_PORT_POSITION 24 |
| 2763 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_PORT_FMASK 64'b0000000000000000000000000000000011111111000000000000000000000000 |
| 2764 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_PORT_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2765 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_PORT_POR_VALUE 8'b00000000 |
| 2766 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_PORT_FIELD_NAME "port" |
| 2767 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_L1_FID 1 |
| 2768 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_L1_SLC 17:15 |
| 2769 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_L1_WIDTH 3 |
| 2770 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_L1_INT_SLC 2:0 |
| 2771 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_L1_POSITION 15 |
| 2772 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_L1_FMASK 64'b0000000000000000000000000000000000000000000000111000000000000000 |
| 2773 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_L1_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2774 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_L1_POR_VALUE 3'b010 |
| 2775 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_L1_FIELD_NAME "l1" |
| 2776 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_L0S_FID 2 |
| 2777 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_L0S_SLC 14:12 |
| 2778 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_L0S_WIDTH 3 |
| 2779 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_L0S_INT_SLC 2:0 |
| 2780 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_L0S_POSITION 12 |
| 2781 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_L0S_FMASK 64'b0000000000000000000000000000000000000000000000000111000000000000 |
| 2782 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_L0S_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2783 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_L0S_POR_VALUE 3'b100 |
| 2784 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_L0S_FIELD_NAME "l0s" |
| 2785 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_ASPM_FID 3 |
| 2786 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_ASPM_SLC 11:10 |
| 2787 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_ASPM_WIDTH 2 |
| 2788 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_ASPM_INT_SLC 1:0 |
| 2789 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_ASPM_POSITION 10 |
| 2790 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_ASPM_FMASK 64'b0000000000000000000000000000000000000000000000000000110000000000 |
| 2791 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_ASPM_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2792 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_ASPM_POR_VALUE 2'b11 |
| 2793 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_ASPM_FIELD_NAME "aspm" |
| 2794 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_WIDTH_FID 4 |
| 2795 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_WIDTH_SLC 9:4 |
| 2796 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_WIDTH_WIDTH 6 |
| 2797 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_WIDTH_INT_SLC 5:0 |
| 2798 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_WIDTH_POSITION 4 |
| 2799 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_WIDTH_FMASK 64'b0000000000000000000000000000000000000000000000000000001111110000 |
| 2800 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_WIDTH_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2801 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_WIDTH_POR_VALUE 6'b001000 |
| 2802 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_WIDTH_FIELD_NAME "width" |
| 2803 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_SPEED_FID 5 |
| 2804 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_SPEED_SLC 3:0 |
| 2805 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_SPEED_WIDTH 4 |
| 2806 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_SPEED_INT_SLC 3:0 |
| 2807 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_SPEED_POSITION 0 |
| 2808 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_SPEED_FMASK 64'b0000000000000000000000000000000000000000000000000000000000001111 |
| 2809 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_SPEED_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2810 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_SPEED_POR_VALUE 4'b0001 |
| 2811 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CAP_SPEED_FIELD_NAME "speed" |
| 2812 | |
| 2813 | //------------------------------------------------------- |
| 2814 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL |
| 2815 | //------------------------------------------------------- |
| 2816 | |
| 2817 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_HW_ADDR 27'b000000011110010000000000100 |
| 2818 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_ADDR 30'b000000011110010000000000100000 |
| 2819 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_NAME "fire_plc_tlu_ctb_tlr_csr_b_lnk_ctl" |
| 2820 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_WIDTH 64 |
| 2821 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_DEPTH 1 |
| 2822 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_SLC 63:0 |
| 2823 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_INT_SLC 63:0 |
| 2824 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_POSITION 0 |
| 2825 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_lnk_ctl" |
| 2826 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_LOW_ADDR_WIDTH 0 |
| 2827 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_ADDR_RANGE 26:0 |
| 2828 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_READ_MASK 64'b0000000000000000000000000000000000000000000000000000000011111011 |
| 2829 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000001000 |
| 2830 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_WRITE_MASK 64'b0000000000000000000000000000000000000000000000000000000011110011 |
| 2831 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2832 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2833 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2834 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2835 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_RMASK 64'b0000000000000000000000000000000000000000000000000000000011111011 |
| 2836 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_RESERVED_BIT_MASK 64'b1111111111111111111111111111111111111111111111111111111100000100 |
| 2837 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000100000 |
| 2838 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2839 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_INTERNAL_REG 1 |
| 2840 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_ALIASED_FROM 0 |
| 2841 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_ZERO_TIME_OMNI 1 |
| 2842 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_HW_ACC_JTAG_RD 1 |
| 2843 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_HW_ACC_JTAG_WR 1 |
| 2844 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_HW_ACC_PIO_SLOW_RD 1 |
| 2845 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_HW_ACC_PIO_SLOW_WR 1 |
| 2846 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_HW_ACC_PIO_MED_RD 1 |
| 2847 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_HW_ACC_PIO_MED_WR 1 |
| 2848 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_HW_ACC_PIO_FAST_RD 1 |
| 2849 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_HW_ACC_PIO_FAST_WR 1 |
| 2850 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_NUM_FIELDS 6 |
| 2851 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_EXTSYNC_FID 0 |
| 2852 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_EXTSYNC_SLC 7:7 |
| 2853 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_EXTSYNC_WIDTH 1 |
| 2854 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_EXTSYNC_INT_SLC 0:0 |
| 2855 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_EXTSYNC_POSITION 7 |
| 2856 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_EXTSYNC_FMASK 64'b0000000000000000000000000000000000000000000000000000000010000000 |
| 2857 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_EXTSYNC_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2858 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_EXTSYNC_POR_VALUE 1'b0 |
| 2859 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_EXTSYNC_FIELD_NAME "extsync" |
| 2860 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_CLOCK_FID 1 |
| 2861 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_CLOCK_SLC 6:6 |
| 2862 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_CLOCK_WIDTH 1 |
| 2863 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_CLOCK_INT_SLC 0:0 |
| 2864 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_CLOCK_POSITION 6 |
| 2865 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_CLOCK_FMASK 64'b0000000000000000000000000000000000000000000000000000000001000000 |
| 2866 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_CLOCK_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2867 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_CLOCK_POR_VALUE 1'b0 |
| 2868 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_CLOCK_FIELD_NAME "clock" |
| 2869 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_RETRAIN_FID 2 |
| 2870 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_RETRAIN_SLC 5:5 |
| 2871 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_RETRAIN_WIDTH 1 |
| 2872 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_RETRAIN_INT_SLC 0:0 |
| 2873 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_RETRAIN_POSITION 5 |
| 2874 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_RETRAIN_FMASK 64'b0000000000000000000000000000000000000000000000000000000000100000 |
| 2875 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_RETRAIN_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000100000 |
| 2876 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_RETRAIN_POR_VALUE 1'b0 |
| 2877 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_RETRAIN_FIELD_NAME "retrain" |
| 2878 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_DISABLE_FID 3 |
| 2879 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_DISABLE_SLC 4:4 |
| 2880 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_DISABLE_WIDTH 1 |
| 2881 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_DISABLE_INT_SLC 0:0 |
| 2882 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_DISABLE_POSITION 4 |
| 2883 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_DISABLE_FMASK 64'b0000000000000000000000000000000000000000000000000000000000010000 |
| 2884 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_DISABLE_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2885 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_DISABLE_POR_VALUE 1'b0 |
| 2886 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_DISABLE_FIELD_NAME "disable" |
| 2887 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_RCB_FID 4 |
| 2888 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_RCB_SLC 3:3 |
| 2889 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_RCB_WIDTH 1 |
| 2890 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_RCB_INT_SLC 0:0 |
| 2891 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_RCB_POSITION 3 |
| 2892 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_RCB_FMASK 64'b0000000000000000000000000000000000000000000000000000000000001000 |
| 2893 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_RCB_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2894 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_RCB_POR_VALUE 1'b0 |
| 2895 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_RCB_FIELD_NAME "rcb" |
| 2896 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_ASPM_FID 5 |
| 2897 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_ASPM_SLC 1:0 |
| 2898 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_ASPM_WIDTH 2 |
| 2899 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_ASPM_INT_SLC 1:0 |
| 2900 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_ASPM_POSITION 0 |
| 2901 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_ASPM_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000011 |
| 2902 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_ASPM_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2903 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_ASPM_POR_VALUE 2'b00 |
| 2904 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_CTL_ASPM_FIELD_NAME "aspm" |
| 2905 | |
| 2906 | //------------------------------------------------------- |
| 2907 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS |
| 2908 | //------------------------------------------------------- |
| 2909 | |
| 2910 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_HW_ADDR 27'b000000011110010000000000101 |
| 2911 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_ADDR 30'b000000011110010000000000101000 |
| 2912 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_NAME "fire_plc_tlu_ctb_tlr_csr_b_lnk_sts" |
| 2913 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_WIDTH 64 |
| 2914 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_DEPTH 1 |
| 2915 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_SLC 63:0 |
| 2916 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_INT_SLC 63:0 |
| 2917 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_POSITION 0 |
| 2918 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_lnk_sts" |
| 2919 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_LOW_ADDR_WIDTH 0 |
| 2920 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_ADDR_RANGE 26:0 |
| 2921 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_READ_MASK 64'b0000000000000000000000000000000000000000000000000001111111111111 |
| 2922 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000001111111111111 |
| 2923 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_WRITE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2924 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2925 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2926 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2927 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2928 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_RMASK 64'b0000000000000000000000000000000000000000000000000001111111111111 |
| 2929 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_RESERVED_BIT_MASK 64'b1111111111111111111111111111111111111111111111111110000000000000 |
| 2930 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000001111111111111 |
| 2931 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 2932 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_INTERNAL_REG 1 |
| 2933 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_ALIASED_FROM 0 |
| 2934 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_ZERO_TIME_OMNI 1 |
| 2935 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_HW_ACC_JTAG_RD 1 |
| 2936 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_HW_ACC_JTAG_WR 1 |
| 2937 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_HW_ACC_PIO_SLOW_RD 1 |
| 2938 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_HW_ACC_PIO_SLOW_WR 1 |
| 2939 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_HW_ACC_PIO_MED_RD 1 |
| 2940 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_HW_ACC_PIO_MED_WR 1 |
| 2941 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_HW_ACC_PIO_FAST_RD 1 |
| 2942 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_HW_ACC_PIO_FAST_WR 1 |
| 2943 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_NUM_FIELDS 5 |
| 2944 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_CLOCK_FID 0 |
| 2945 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_CLOCK_SLC 12:12 |
| 2946 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_CLOCK_WIDTH 1 |
| 2947 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_CLOCK_INT_SLC 0:0 |
| 2948 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_CLOCK_POSITION 12 |
| 2949 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_CLOCK_FMASK 64'b0000000000000000000000000000000000000000000000000001000000000000 |
| 2950 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_CLOCK_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000001000000000000 |
| 2951 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_CLOCK_POR_VALUE 1'b0 |
| 2952 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_CLOCK_FIELD_NAME "clock" |
| 2953 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_TRAIN_FID 1 |
| 2954 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_TRAIN_SLC 11:11 |
| 2955 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_TRAIN_WIDTH 1 |
| 2956 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_TRAIN_INT_SLC 0:0 |
| 2957 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_TRAIN_POSITION 11 |
| 2958 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_TRAIN_FMASK 64'b0000000000000000000000000000000000000000000000000000100000000000 |
| 2959 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_TRAIN_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000100000000000 |
| 2960 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_TRAIN_POR_VALUE 1'b0 |
| 2961 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_TRAIN_FIELD_NAME "train" |
| 2962 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_SPARE_FID 2 |
| 2963 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_SPARE_SLC 10:10 |
| 2964 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_SPARE_WIDTH 1 |
| 2965 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_SPARE_INT_SLC 0:0 |
| 2966 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_SPARE_POSITION 10 |
| 2967 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_SPARE_FMASK 64'b0000000000000000000000000000000000000000000000000000010000000000 |
| 2968 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_SPARE_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000010000000000 |
| 2969 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_SPARE_POR_VALUE 1'b0 |
| 2970 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_SPARE_FIELD_NAME "spare" |
| 2971 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_WIDTH_FID 3 |
| 2972 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_WIDTH_SLC 9:4 |
| 2973 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_WIDTH_WIDTH 6 |
| 2974 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_WIDTH_INT_SLC 5:0 |
| 2975 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_WIDTH_POSITION 4 |
| 2976 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_WIDTH_FMASK 64'b0000000000000000000000000000000000000000000000000000001111110000 |
| 2977 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_WIDTH_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000001111110000 |
| 2978 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_WIDTH_POR_VALUE 6'b000000 |
| 2979 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_WIDTH_FIELD_NAME "width" |
| 2980 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_SPEED_FID 4 |
| 2981 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_SPEED_SLC 3:0 |
| 2982 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_SPEED_WIDTH 4 |
| 2983 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_SPEED_INT_SLC 3:0 |
| 2984 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_SPEED_POSITION 0 |
| 2985 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_SPEED_FMASK 64'b0000000000000000000000000000000000000000000000000000000000001111 |
| 2986 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_SPEED_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000001111 |
| 2987 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_SPEED_POR_VALUE 4'b0000 |
| 2988 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_STS_SPEED_FIELD_NAME "speed" |
| 2989 | |
| 2990 | //------------------------------------------------------- |
| 2991 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP |
| 2992 | //------------------------------------------------------- |
| 2993 | |
| 2994 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_HW_ADDR 27'b000000011110010000000000110 |
| 2995 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_ADDR 30'b000000011110010000000000110000 |
| 2996 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_NAME "fire_plc_tlu_ctb_tlr_csr_b_slt_cap" |
| 2997 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_WIDTH 64 |
| 2998 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_DEPTH 1 |
| 2999 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_SLC 63:0 |
| 3000 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_INT_SLC 63:0 |
| 3001 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_POSITION 0 |
| 3002 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_slt_cap" |
| 3003 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_LOW_ADDR_WIDTH 0 |
| 3004 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_ADDR_RANGE 26:0 |
| 3005 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_READ_MASK 64'b0000000000000000000000000000000000000000000000011111111110000000 |
| 3006 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3007 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_WRITE_MASK 64'b0000000000000000000000000000000000000000000000011111111110000000 |
| 3008 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3009 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3010 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3011 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3012 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_RMASK 64'b0000000000000000000000000000000000000000000000011111111110000000 |
| 3013 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_RESERVED_BIT_MASK 64'b1111111111111111111111111111111111111111111111100000000001111111 |
| 3014 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3015 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3016 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_INTERNAL_REG 0 |
| 3017 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_EXTERNAL_DECODE_REG 1 |
| 3018 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_ALIASED_FROM 0 |
| 3019 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_ZERO_TIME_OMNI 0 |
| 3020 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_HW_ACC_JTAG_RD 1 |
| 3021 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_HW_ACC_JTAG_WR 1 |
| 3022 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_HW_ACC_PIO_SLOW_RD 1 |
| 3023 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_HW_ACC_PIO_SLOW_WR 1 |
| 3024 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_HW_ACC_PIO_MED_RD 1 |
| 3025 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_HW_ACC_PIO_MED_WR 1 |
| 3026 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_HW_ACC_PIO_FAST_RD 1 |
| 3027 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_HW_ACC_PIO_FAST_WR 1 |
| 3028 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_NUM_FIELDS 2 |
| 3029 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_SPLS_FID 0 |
| 3030 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_SPLS_SLC 16:15 |
| 3031 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_SPLS_WIDTH 2 |
| 3032 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_SPLS_INT_SLC 1:0 |
| 3033 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_SPLS_POSITION 15 |
| 3034 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_SPLS_FMASK 64'b0000000000000000000000000000000000000000000000011000000000000000 |
| 3035 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_SPLS_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3036 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_SPLS_POR_VALUE 2'b00 |
| 3037 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_SPLS_FIELD_NAME "spls" |
| 3038 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_SPLV_FID 1 |
| 3039 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_SPLV_SLC 14:7 |
| 3040 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_SPLV_WIDTH 8 |
| 3041 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_SPLV_INT_SLC 7:0 |
| 3042 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_SPLV_POSITION 7 |
| 3043 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_SPLV_FMASK 64'b0000000000000000000000000000000000000000000000000111111110000000 |
| 3044 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_SPLV_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3045 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_SPLV_POR_VALUE 8'b00000000 |
| 3046 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SLT_CAP_SPLV_FIELD_NAME "splv" |
| 3047 | |
| 3048 | //------------------------------------------------------- |
| 3049 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_LOG |
| 3050 | //------------------------------------------------------- |
| 3051 | |
| 3052 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_LOG_HW_ADDR 27'b000000011110010001000000000 |
| 3053 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_LOG_ADDR 30'b000000011110010001000000000000 |
| 3054 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_LOG_NAME "fire_plc_tlu_ctb_tlr_csr_b_ue_log" |
| 3055 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_LOG_WIDTH 64 |
| 3056 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_LOG_DEPTH 1 |
| 3057 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_LOG_SLC 63:0 |
| 3058 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_LOG_INT_SLC 63:0 |
| 3059 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_LOG_POSITION 0 |
| 3060 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_LOG_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_ue_log" |
| 3061 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_LOG_LOW_ADDR_WIDTH 0 |
| 3062 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_LOG_ADDR_RANGE 26:0 |
| 3063 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_LOG_READ_MASK 64'b0000000000000000000000000000000000000000000111111111111111111111 |
| 3064 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_LOG_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3065 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_LOG_WRITE_MASK 64'b0000000000000000000000000000000000000000000111111111111111111111 |
| 3066 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_LOG_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3067 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_LOG_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3068 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_LOG_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3069 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_LOG_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3070 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_LOG_RMASK 64'b0000000000000000000000000000000000000000000111111111111111111111 |
| 3071 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_LOG_RESERVED_BIT_MASK 64'b1111111111111111111111111111111111111111111000000000000000000000 |
| 3072 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_LOG_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3073 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_LOG_POR_VALUE 64'b0000000000000000000000000000000000000000000101111111000000010001 |
| 3074 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_LOG_INTERNAL_REG 1 |
| 3075 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_LOG_ALIASED_FROM 0 |
| 3076 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_LOG_ZERO_TIME_OMNI 1 |
| 3077 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_LOG_HW_ACC_JTAG_RD 1 |
| 3078 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_LOG_HW_ACC_JTAG_WR 1 |
| 3079 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_LOG_HW_ACC_PIO_SLOW_RD 1 |
| 3080 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_LOG_HW_ACC_PIO_SLOW_WR 1 |
| 3081 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_LOG_HW_ACC_PIO_MED_RD 1 |
| 3082 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_LOG_HW_ACC_PIO_MED_WR 1 |
| 3083 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_LOG_HW_ACC_PIO_FAST_RD 1 |
| 3084 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_LOG_HW_ACC_PIO_FAST_WR 1 |
| 3085 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_LOG_NUM_FIELDS 1 |
| 3086 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_LOG_EN_FID 0 |
| 3087 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_LOG_EN_SLC 20:0 |
| 3088 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_LOG_EN_WIDTH 21 |
| 3089 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_LOG_EN_INT_SLC 20:0 |
| 3090 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_LOG_EN_POSITION 0 |
| 3091 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_LOG_EN_FMASK 64'b0000000000000000000000000000000000000000000111111111111111111111 |
| 3092 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_LOG_EN_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3093 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_LOG_EN_POR_VALUE 21'b101111111000000010001 |
| 3094 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_LOG_EN_FIELD_NAME "en" |
| 3095 | |
| 3096 | //------------------------------------------------------- |
| 3097 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN |
| 3098 | //------------------------------------------------------- |
| 3099 | |
| 3100 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_HW_ADDR 27'b000000011110010001000000001 |
| 3101 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_ADDR 30'b000000011110010001000000001000 |
| 3102 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_NAME "fire_plc_tlu_ctb_tlr_csr_b_ue_int_en" |
| 3103 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_WIDTH 64 |
| 3104 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_DEPTH 1 |
| 3105 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_SLC 63:0 |
| 3106 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_INT_SLC 63:0 |
| 3107 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_POSITION 0 |
| 3108 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_ue_int_en" |
| 3109 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_LOW_ADDR_WIDTH 0 |
| 3110 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_ADDR_RANGE 26:0 |
| 3111 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_READ_MASK 64'b0000000000011111111111111111111100000000000111111111111111111111 |
| 3112 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3113 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_WRITE_MASK 64'b0000000000011111111111111111111100000000000111111111111111111111 |
| 3114 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3115 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3116 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3117 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3118 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_RMASK 64'b0000000000011111111111111111111100000000000111111111111111111111 |
| 3119 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_RESERVED_BIT_MASK 64'b1111111111100000000000000000000011111111111000000000000000000000 |
| 3120 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3121 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3122 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_INTERNAL_REG 1 |
| 3123 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_ALIASED_FROM 0 |
| 3124 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_ZERO_TIME_OMNI 1 |
| 3125 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_HW_ACC_JTAG_RD 1 |
| 3126 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_HW_ACC_JTAG_WR 1 |
| 3127 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_HW_ACC_PIO_SLOW_RD 1 |
| 3128 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_HW_ACC_PIO_SLOW_WR 1 |
| 3129 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_HW_ACC_PIO_MED_RD 1 |
| 3130 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_HW_ACC_PIO_MED_WR 1 |
| 3131 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_HW_ACC_PIO_FAST_RD 1 |
| 3132 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_HW_ACC_PIO_FAST_WR 1 |
| 3133 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_NUM_FIELDS 2 |
| 3134 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_EN_S_FID 0 |
| 3135 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_EN_S_SLC 52:32 |
| 3136 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_EN_S_WIDTH 21 |
| 3137 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_EN_S_INT_SLC 20:0 |
| 3138 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_EN_S_POSITION 32 |
| 3139 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_EN_S_FMASK 64'b0000000000011111111111111111111100000000000000000000000000000000 |
| 3140 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_EN_S_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3141 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_EN_S_POR_VALUE 21'b000000000000000000000 |
| 3142 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_EN_S_FIELD_NAME "en_s" |
| 3143 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_EN_P_FID 1 |
| 3144 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_EN_P_SLC 20:0 |
| 3145 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_EN_P_WIDTH 21 |
| 3146 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_EN_P_INT_SLC 20:0 |
| 3147 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_EN_P_POSITION 0 |
| 3148 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_EN_P_FMASK 64'b0000000000000000000000000000000000000000000111111111111111111111 |
| 3149 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_EN_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3150 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_EN_P_POR_VALUE 21'b000000000000000000000 |
| 3151 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_INT_EN_EN_P_FIELD_NAME "en_p" |
| 3152 | |
| 3153 | //------------------------------------------------------- |
| 3154 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR |
| 3155 | //------------------------------------------------------- |
| 3156 | |
| 3157 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_HW_ADDR 27'b000000011110010001000000010 |
| 3158 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_ADDR 30'b000000011110010001000000010000 |
| 3159 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_NAME "fire_plc_tlu_ctb_tlr_csr_b_ue_en_err" |
| 3160 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_WIDTH 64 |
| 3161 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_DEPTH 1 |
| 3162 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_SLC 63:0 |
| 3163 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_INT_SLC 63:0 |
| 3164 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_POSITION 0 |
| 3165 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_ue_en_err" |
| 3166 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_LOW_ADDR_WIDTH 0 |
| 3167 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_ADDR_RANGE 26:0 |
| 3168 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_READ_MASK 64'b0000000000011111111111111111111100000000000111111111111111111111 |
| 3169 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_READ_ONLY_MASK 64'b0000000000011111111111111111111100000000000111111111111111111111 |
| 3170 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_WRITE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3171 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3172 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3173 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3174 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3175 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_RMASK 64'b0000000000011111111111111111111100000000000111111111111111111111 |
| 3176 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_RESERVED_BIT_MASK 64'b1111111111100000000000000000000011111111111000000000000000000000 |
| 3177 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_HW_LD_MASK 64'b0000000000011111111111111111111100000000000111111111111111111111 |
| 3178 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3179 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_INTERNAL_REG 0 |
| 3180 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_EXTERNAL_DECODE_REG 1 |
| 3181 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_ALIASED_FROM 0 |
| 3182 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_ZERO_TIME_OMNI 0 |
| 3183 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_HW_ACC_JTAG_RD 1 |
| 3184 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_HW_ACC_JTAG_WR 1 |
| 3185 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_HW_ACC_PIO_SLOW_RD 1 |
| 3186 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_HW_ACC_PIO_SLOW_WR 1 |
| 3187 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_HW_ACC_PIO_MED_RD 1 |
| 3188 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_HW_ACC_PIO_MED_WR 1 |
| 3189 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_HW_ACC_PIO_FAST_RD 1 |
| 3190 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_HW_ACC_PIO_FAST_WR 1 |
| 3191 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_NUM_FIELDS 2 |
| 3192 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_ERR_S_FID 0 |
| 3193 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_ERR_S_SLC 52:32 |
| 3194 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_ERR_S_WIDTH 21 |
| 3195 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_ERR_S_INT_SLC 20:0 |
| 3196 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_ERR_S_POSITION 32 |
| 3197 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_ERR_S_FMASK 64'b0000000000011111111111111111111100000000000000000000000000000000 |
| 3198 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_ERR_S_HW_LD_MASK 64'b0000000000011111111111111111111100000000000000000000000000000000 |
| 3199 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_ERR_S_POR_VALUE 21'b000000000000000000000 |
| 3200 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_ERR_S_FIELD_NAME "err_s" |
| 3201 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_ERR_P_FID 1 |
| 3202 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_ERR_P_SLC 20:0 |
| 3203 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_ERR_P_WIDTH 21 |
| 3204 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_ERR_P_INT_SLC 20:0 |
| 3205 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_ERR_P_POSITION 0 |
| 3206 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_ERR_P_FMASK 64'b0000000000000000000000000000000000000000000111111111111111111111 |
| 3207 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_ERR_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000111111111111111111111 |
| 3208 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_ERR_P_POR_VALUE 21'b000000000000000000000 |
| 3209 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_EN_ERR_ERR_P_FIELD_NAME "err_p" |
| 3210 | |
| 3211 | //------------------------------------------------------- |
| 3212 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS |
| 3213 | //------------------------------------------------------- |
| 3214 | |
| 3215 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_HW_ADDR 27'b000000011110010001000000011 |
| 3216 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_ADDR 30'b000000011110010001000000011000 |
| 3217 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_NAME "fire_plc_tlu_ctb_tlr_csr_b_ue_err_rw1c_alias" |
| 3218 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_WIDTH 64 |
| 3219 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_DEPTH 1 |
| 3220 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_SLC 63:0 |
| 3221 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_INT_SLC 63:0 |
| 3222 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_POSITION 0 |
| 3223 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_ue_err_rw1c_alias" |
| 3224 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_LOW_ADDR_WIDTH 0 |
| 3225 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_ADDR_RANGE 26:0 |
| 3226 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_READ_MASK 64'b0000000000010111111100000001000100000000000101111111000000010001 |
| 3227 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3228 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_WRITE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3229 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3230 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3231 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_CLEAR_MASK 64'b0000000000010111111100000001000100000000000101111111000000010001 |
| 3232 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3233 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_RMASK 64'b0000000000010111111100000001000100000000000101111111000000010001 |
| 3234 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_RESERVED_BIT_MASK 64'b1111111111101000000011111110111011111111111010000000111111101110 |
| 3235 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_HW_LD_MASK 64'b0000000000010111111100000001000100000000000101111111000000010001 |
| 3236 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3237 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_INTERNAL_REG 1 |
| 3238 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_ALIASED_FROM 0 |
| 3239 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_ZERO_TIME_OMNI 1 |
| 3240 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_HW_ACC_JTAG_RD 1 |
| 3241 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_HW_ACC_JTAG_WR 1 |
| 3242 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_HW_ACC_PIO_SLOW_RD 1 |
| 3243 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_HW_ACC_PIO_SLOW_WR 1 |
| 3244 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_HW_ACC_PIO_MED_RD 1 |
| 3245 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_HW_ACC_PIO_MED_WR 1 |
| 3246 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_HW_ACC_PIO_FAST_RD 1 |
| 3247 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_HW_ACC_PIO_FAST_WR 1 |
| 3248 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_NUM_FIELDS 20 |
| 3249 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_UR_S_FID 0 |
| 3250 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_UR_S_SLC 52:52 |
| 3251 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_UR_S_WIDTH 1 |
| 3252 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_UR_S_INT_SLC 0:0 |
| 3253 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_UR_S_POSITION 52 |
| 3254 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_UR_S_FMASK 64'b0000000000010000000000000000000000000000000000000000000000000000 |
| 3255 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_UR_S_HW_LD_MASK 64'b0000000000010000000000000000000000000000000000000000000000000000 |
| 3256 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_UR_S_POR_VALUE 1'b0 |
| 3257 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_UR_S_FIELD_NAME "ur_s" |
| 3258 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_MFP_S_FID 1 |
| 3259 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_MFP_S_SLC 50:50 |
| 3260 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_MFP_S_WIDTH 1 |
| 3261 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_MFP_S_INT_SLC 0:0 |
| 3262 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_MFP_S_POSITION 50 |
| 3263 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_MFP_S_FMASK 64'b0000000000000100000000000000000000000000000000000000000000000000 |
| 3264 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_MFP_S_HW_LD_MASK 64'b0000000000000100000000000000000000000000000000000000000000000000 |
| 3265 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_MFP_S_POR_VALUE 1'b0 |
| 3266 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_MFP_S_FIELD_NAME "mfp_s" |
| 3267 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_ROF_S_FID 2 |
| 3268 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_ROF_S_SLC 49:49 |
| 3269 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_ROF_S_WIDTH 1 |
| 3270 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_ROF_S_INT_SLC 0:0 |
| 3271 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_ROF_S_POSITION 49 |
| 3272 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_ROF_S_FMASK 64'b0000000000000010000000000000000000000000000000000000000000000000 |
| 3273 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_ROF_S_HW_LD_MASK 64'b0000000000000010000000000000000000000000000000000000000000000000 |
| 3274 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_ROF_S_POR_VALUE 1'b0 |
| 3275 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_ROF_S_FIELD_NAME "rof_s" |
| 3276 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_UC_S_FID 3 |
| 3277 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_UC_S_SLC 48:48 |
| 3278 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_UC_S_WIDTH 1 |
| 3279 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_UC_S_INT_SLC 0:0 |
| 3280 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_UC_S_POSITION 48 |
| 3281 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_UC_S_FMASK 64'b0000000000000001000000000000000000000000000000000000000000000000 |
| 3282 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_UC_S_HW_LD_MASK 64'b0000000000000001000000000000000000000000000000000000000000000000 |
| 3283 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_UC_S_POR_VALUE 1'b0 |
| 3284 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_UC_S_FIELD_NAME "uc_s" |
| 3285 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_SPARE1_FID 4 |
| 3286 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_SPARE1_SLC 47:47 |
| 3287 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_SPARE1_WIDTH 1 |
| 3288 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_SPARE1_INT_SLC 0:0 |
| 3289 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_SPARE1_POSITION 47 |
| 3290 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_SPARE1_FMASK 64'b0000000000000000100000000000000000000000000000000000000000000000 |
| 3291 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_SPARE1_HW_LD_MASK 64'b0000000000000000100000000000000000000000000000000000000000000000 |
| 3292 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_SPARE1_POR_VALUE 1'b0 |
| 3293 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_SPARE1_FIELD_NAME "spare1" |
| 3294 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_CTO_S_FID 5 |
| 3295 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_CTO_S_SLC 46:46 |
| 3296 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_CTO_S_WIDTH 1 |
| 3297 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_CTO_S_INT_SLC 0:0 |
| 3298 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_CTO_S_POSITION 46 |
| 3299 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_CTO_S_FMASK 64'b0000000000000000010000000000000000000000000000000000000000000000 |
| 3300 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_CTO_S_HW_LD_MASK 64'b0000000000000000010000000000000000000000000000000000000000000000 |
| 3301 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_CTO_S_POR_VALUE 1'b0 |
| 3302 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_CTO_S_FIELD_NAME "cto_s" |
| 3303 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_FCP_S_FID 6 |
| 3304 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_FCP_S_SLC 45:45 |
| 3305 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_FCP_S_WIDTH 1 |
| 3306 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_FCP_S_INT_SLC 0:0 |
| 3307 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_FCP_S_POSITION 45 |
| 3308 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_FCP_S_FMASK 64'b0000000000000000001000000000000000000000000000000000000000000000 |
| 3309 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_FCP_S_HW_LD_MASK 64'b0000000000000000001000000000000000000000000000000000000000000000 |
| 3310 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_FCP_S_POR_VALUE 1'b0 |
| 3311 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_FCP_S_FIELD_NAME "fcp_s" |
| 3312 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_PP_S_FID 7 |
| 3313 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_PP_S_SLC 44:44 |
| 3314 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_PP_S_WIDTH 1 |
| 3315 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_PP_S_INT_SLC 0:0 |
| 3316 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_PP_S_POSITION 44 |
| 3317 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_PP_S_FMASK 64'b0000000000000000000100000000000000000000000000000000000000000000 |
| 3318 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_PP_S_HW_LD_MASK 64'b0000000000000000000100000000000000000000000000000000000000000000 |
| 3319 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_PP_S_POR_VALUE 1'b0 |
| 3320 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_PP_S_FIELD_NAME "pp_s" |
| 3321 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_DLP_S_FID 8 |
| 3322 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_DLP_S_SLC 36:36 |
| 3323 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_DLP_S_WIDTH 1 |
| 3324 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_DLP_S_INT_SLC 0:0 |
| 3325 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_DLP_S_POSITION 36 |
| 3326 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_DLP_S_FMASK 64'b0000000000000000000000000001000000000000000000000000000000000000 |
| 3327 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_DLP_S_HW_LD_MASK 64'b0000000000000000000000000001000000000000000000000000000000000000 |
| 3328 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_DLP_S_POR_VALUE 1'b0 |
| 3329 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_DLP_S_FIELD_NAME "dlp_s" |
| 3330 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_SPARE_S_FID 9 |
| 3331 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_SPARE_S_SLC 32:32 |
| 3332 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_SPARE_S_WIDTH 1 |
| 3333 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_SPARE_S_INT_SLC 0:0 |
| 3334 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_SPARE_S_POSITION 32 |
| 3335 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_SPARE_S_FMASK 64'b0000000000000000000000000000000100000000000000000000000000000000 |
| 3336 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_SPARE_S_HW_LD_MASK 64'b0000000000000000000000000000000100000000000000000000000000000000 |
| 3337 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_SPARE_S_POR_VALUE 1'b0 |
| 3338 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_SPARE_S_FIELD_NAME "spare_s" |
| 3339 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_UR_P_FID 10 |
| 3340 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_UR_P_SLC 20:20 |
| 3341 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_UR_P_WIDTH 1 |
| 3342 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_UR_P_INT_SLC 0:0 |
| 3343 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_UR_P_POSITION 20 |
| 3344 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_UR_P_FMASK 64'b0000000000000000000000000000000000000000000100000000000000000000 |
| 3345 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_UR_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000100000000000000000000 |
| 3346 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_UR_P_POR_VALUE 1'b0 |
| 3347 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_UR_P_FIELD_NAME "ur_p" |
| 3348 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_MFP_P_FID 11 |
| 3349 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_MFP_P_SLC 18:18 |
| 3350 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_MFP_P_WIDTH 1 |
| 3351 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_MFP_P_INT_SLC 0:0 |
| 3352 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_MFP_P_POSITION 18 |
| 3353 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_MFP_P_FMASK 64'b0000000000000000000000000000000000000000000001000000000000000000 |
| 3354 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_MFP_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000001000000000000000000 |
| 3355 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_MFP_P_POR_VALUE 1'b0 |
| 3356 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_MFP_P_FIELD_NAME "mfp_p" |
| 3357 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_ROF_P_FID 12 |
| 3358 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_ROF_P_SLC 17:17 |
| 3359 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_ROF_P_WIDTH 1 |
| 3360 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_ROF_P_INT_SLC 0:0 |
| 3361 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_ROF_P_POSITION 17 |
| 3362 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_ROF_P_FMASK 64'b0000000000000000000000000000000000000000000000100000000000000000 |
| 3363 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_ROF_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000100000000000000000 |
| 3364 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_ROF_P_POR_VALUE 1'b0 |
| 3365 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_ROF_P_FIELD_NAME "rof_p" |
| 3366 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_UC_P_FID 13 |
| 3367 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_UC_P_SLC 16:16 |
| 3368 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_UC_P_WIDTH 1 |
| 3369 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_UC_P_INT_SLC 0:0 |
| 3370 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_UC_P_POSITION 16 |
| 3371 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_UC_P_FMASK 64'b0000000000000000000000000000000000000000000000010000000000000000 |
| 3372 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_UC_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000010000000000000000 |
| 3373 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_UC_P_POR_VALUE 1'b0 |
| 3374 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_UC_P_FIELD_NAME "uc_p" |
| 3375 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_SPARE2_FID 14 |
| 3376 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_SPARE2_SLC 15:15 |
| 3377 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_SPARE2_WIDTH 1 |
| 3378 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_SPARE2_INT_SLC 0:0 |
| 3379 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_SPARE2_POSITION 15 |
| 3380 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_SPARE2_FMASK 64'b0000000000000000000000000000000000000000000000001000000000000000 |
| 3381 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_SPARE2_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000001000000000000000 |
| 3382 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_SPARE2_POR_VALUE 1'b0 |
| 3383 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_SPARE2_FIELD_NAME "spare2" |
| 3384 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_CTO_P_FID 15 |
| 3385 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_CTO_P_SLC 14:14 |
| 3386 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_CTO_P_WIDTH 1 |
| 3387 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_CTO_P_INT_SLC 0:0 |
| 3388 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_CTO_P_POSITION 14 |
| 3389 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_CTO_P_FMASK 64'b0000000000000000000000000000000000000000000000000100000000000000 |
| 3390 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_CTO_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000100000000000000 |
| 3391 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_CTO_P_POR_VALUE 1'b0 |
| 3392 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_CTO_P_FIELD_NAME "cto_p" |
| 3393 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_FCP_P_FID 16 |
| 3394 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_FCP_P_SLC 13:13 |
| 3395 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_FCP_P_WIDTH 1 |
| 3396 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_FCP_P_INT_SLC 0:0 |
| 3397 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_FCP_P_POSITION 13 |
| 3398 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_FCP_P_FMASK 64'b0000000000000000000000000000000000000000000000000010000000000000 |
| 3399 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_FCP_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000010000000000000 |
| 3400 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_FCP_P_POR_VALUE 1'b0 |
| 3401 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_FCP_P_FIELD_NAME "fcp_p" |
| 3402 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_PP_P_FID 17 |
| 3403 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_PP_P_SLC 12:12 |
| 3404 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_PP_P_WIDTH 1 |
| 3405 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_PP_P_INT_SLC 0:0 |
| 3406 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_PP_P_POSITION 12 |
| 3407 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_PP_P_FMASK 64'b0000000000000000000000000000000000000000000000000001000000000000 |
| 3408 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_PP_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000001000000000000 |
| 3409 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_PP_P_POR_VALUE 1'b0 |
| 3410 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_PP_P_FIELD_NAME "pp_p" |
| 3411 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_DLP_P_FID 18 |
| 3412 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_DLP_P_SLC 4:4 |
| 3413 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_DLP_P_WIDTH 1 |
| 3414 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_DLP_P_INT_SLC 0:0 |
| 3415 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_DLP_P_POSITION 4 |
| 3416 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_DLP_P_FMASK 64'b0000000000000000000000000000000000000000000000000000000000010000 |
| 3417 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_DLP_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000010000 |
| 3418 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_DLP_P_POR_VALUE 1'b0 |
| 3419 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_DLP_P_FIELD_NAME "dlp_p" |
| 3420 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_SPARE_P_FID 19 |
| 3421 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_SPARE_P_SLC 0:0 |
| 3422 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_SPARE_P_WIDTH 1 |
| 3423 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_SPARE_P_INT_SLC 0:0 |
| 3424 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_SPARE_P_POSITION 0 |
| 3425 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_SPARE_P_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000001 |
| 3426 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_SPARE_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000001 |
| 3427 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_SPARE_P_POR_VALUE 1'b0 |
| 3428 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1C_ALIAS_SPARE_P_FIELD_NAME "spare_p" |
| 3429 | |
| 3430 | //------------------------------------------------------- |
| 3431 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS |
| 3432 | //------------------------------------------------------- |
| 3433 | |
| 3434 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_HW_ADDR 27'b000000011110010001000000100 |
| 3435 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_ADDR 30'b000000011110010001000000100000 |
| 3436 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_NAME "fire_plc_tlu_ctb_tlr_csr_b_ue_err_rw1s_alias" |
| 3437 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_WIDTH 64 |
| 3438 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_DEPTH 1 |
| 3439 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_SLC 63:0 |
| 3440 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_INT_SLC 63:0 |
| 3441 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_POSITION 0 |
| 3442 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_ue_err_rw1s_alias" |
| 3443 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_LOW_ADDR_WIDTH 0 |
| 3444 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_ADDR_RANGE 26:0 |
| 3445 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_READ_MASK 64'b0000000000010111111100000001000100000000000101111111000000010001 |
| 3446 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3447 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_WRITE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3448 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3449 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_SET_MASK 64'b0000000000010111111100000001000100000000000101111111000000010001 |
| 3450 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3451 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3452 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_RMASK 64'b0000000000010111111100000001000100000000000101111111000000010001 |
| 3453 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_RESERVED_BIT_MASK 64'b1111111111101000000011111110111011111111111010000000111111101110 |
| 3454 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_HW_LD_MASK 64'b0000000000010111111100000001000100000000000101111111000000010001 |
| 3455 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3456 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_INTERNAL_REG 1 |
| 3457 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_ALIASED_FROM "fire_plc_tlu_ctb_tlr_csr_b_ue_err_rw1c_alias" |
| 3458 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_ZERO_TIME_OMNI 1 |
| 3459 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_HW_ACC_JTAG_RD 1 |
| 3460 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_HW_ACC_JTAG_WR 1 |
| 3461 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_HW_ACC_PIO_SLOW_RD 1 |
| 3462 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_HW_ACC_PIO_SLOW_WR 1 |
| 3463 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_HW_ACC_PIO_MED_RD 1 |
| 3464 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_HW_ACC_PIO_MED_WR 1 |
| 3465 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_HW_ACC_PIO_FAST_RD 1 |
| 3466 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_HW_ACC_PIO_FAST_WR 1 |
| 3467 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_NUM_FIELDS 20 |
| 3468 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_UR_S_FID 0 |
| 3469 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_UR_S_SLC 52:52 |
| 3470 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_UR_S_WIDTH 1 |
| 3471 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_UR_S_INT_SLC 0:0 |
| 3472 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_UR_S_POSITION 52 |
| 3473 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_UR_S_FMASK 64'b0000000000010000000000000000000000000000000000000000000000000000 |
| 3474 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_UR_S_HW_LD_MASK 64'b0000000000010000000000000000000000000000000000000000000000000000 |
| 3475 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_UR_S_POR_VALUE 1'b0 |
| 3476 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_UR_S_FIELD_NAME "ur_s" |
| 3477 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_MFP_S_FID 1 |
| 3478 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_MFP_S_SLC 50:50 |
| 3479 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_MFP_S_WIDTH 1 |
| 3480 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_MFP_S_INT_SLC 0:0 |
| 3481 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_MFP_S_POSITION 50 |
| 3482 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_MFP_S_FMASK 64'b0000000000000100000000000000000000000000000000000000000000000000 |
| 3483 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_MFP_S_HW_LD_MASK 64'b0000000000000100000000000000000000000000000000000000000000000000 |
| 3484 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_MFP_S_POR_VALUE 1'b0 |
| 3485 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_MFP_S_FIELD_NAME "mfp_s" |
| 3486 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_ROF_S_FID 2 |
| 3487 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_ROF_S_SLC 49:49 |
| 3488 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_ROF_S_WIDTH 1 |
| 3489 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_ROF_S_INT_SLC 0:0 |
| 3490 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_ROF_S_POSITION 49 |
| 3491 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_ROF_S_FMASK 64'b0000000000000010000000000000000000000000000000000000000000000000 |
| 3492 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_ROF_S_HW_LD_MASK 64'b0000000000000010000000000000000000000000000000000000000000000000 |
| 3493 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_ROF_S_POR_VALUE 1'b0 |
| 3494 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_ROF_S_FIELD_NAME "rof_s" |
| 3495 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_UC_S_FID 3 |
| 3496 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_UC_S_SLC 48:48 |
| 3497 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_UC_S_WIDTH 1 |
| 3498 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_UC_S_INT_SLC 0:0 |
| 3499 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_UC_S_POSITION 48 |
| 3500 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_UC_S_FMASK 64'b0000000000000001000000000000000000000000000000000000000000000000 |
| 3501 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_UC_S_HW_LD_MASK 64'b0000000000000001000000000000000000000000000000000000000000000000 |
| 3502 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_UC_S_POR_VALUE 1'b0 |
| 3503 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_UC_S_FIELD_NAME "uc_s" |
| 3504 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_SPARE1_FID 4 |
| 3505 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_SPARE1_SLC 47:47 |
| 3506 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_SPARE1_WIDTH 1 |
| 3507 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_SPARE1_INT_SLC 0:0 |
| 3508 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_SPARE1_POSITION 47 |
| 3509 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_SPARE1_FMASK 64'b0000000000000000100000000000000000000000000000000000000000000000 |
| 3510 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_SPARE1_HW_LD_MASK 64'b0000000000000000100000000000000000000000000000000000000000000000 |
| 3511 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_SPARE1_POR_VALUE 1'b0 |
| 3512 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_SPARE1_FIELD_NAME "spare1" |
| 3513 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_CTO_S_FID 5 |
| 3514 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_CTO_S_SLC 46:46 |
| 3515 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_CTO_S_WIDTH 1 |
| 3516 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_CTO_S_INT_SLC 0:0 |
| 3517 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_CTO_S_POSITION 46 |
| 3518 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_CTO_S_FMASK 64'b0000000000000000010000000000000000000000000000000000000000000000 |
| 3519 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_CTO_S_HW_LD_MASK 64'b0000000000000000010000000000000000000000000000000000000000000000 |
| 3520 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_CTO_S_POR_VALUE 1'b0 |
| 3521 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_CTO_S_FIELD_NAME "cto_s" |
| 3522 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_FCP_S_FID 6 |
| 3523 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_FCP_S_SLC 45:45 |
| 3524 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_FCP_S_WIDTH 1 |
| 3525 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_FCP_S_INT_SLC 0:0 |
| 3526 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_FCP_S_POSITION 45 |
| 3527 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_FCP_S_FMASK 64'b0000000000000000001000000000000000000000000000000000000000000000 |
| 3528 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_FCP_S_HW_LD_MASK 64'b0000000000000000001000000000000000000000000000000000000000000000 |
| 3529 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_FCP_S_POR_VALUE 1'b0 |
| 3530 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_FCP_S_FIELD_NAME "fcp_s" |
| 3531 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_PP_S_FID 7 |
| 3532 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_PP_S_SLC 44:44 |
| 3533 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_PP_S_WIDTH 1 |
| 3534 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_PP_S_INT_SLC 0:0 |
| 3535 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_PP_S_POSITION 44 |
| 3536 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_PP_S_FMASK 64'b0000000000000000000100000000000000000000000000000000000000000000 |
| 3537 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_PP_S_HW_LD_MASK 64'b0000000000000000000100000000000000000000000000000000000000000000 |
| 3538 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_PP_S_POR_VALUE 1'b0 |
| 3539 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_PP_S_FIELD_NAME "pp_s" |
| 3540 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_DLP_S_FID 8 |
| 3541 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_DLP_S_SLC 36:36 |
| 3542 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_DLP_S_WIDTH 1 |
| 3543 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_DLP_S_INT_SLC 0:0 |
| 3544 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_DLP_S_POSITION 36 |
| 3545 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_DLP_S_FMASK 64'b0000000000000000000000000001000000000000000000000000000000000000 |
| 3546 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_DLP_S_HW_LD_MASK 64'b0000000000000000000000000001000000000000000000000000000000000000 |
| 3547 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_DLP_S_POR_VALUE 1'b0 |
| 3548 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_DLP_S_FIELD_NAME "dlp_s" |
| 3549 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_SPARE_S_FID 9 |
| 3550 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_SPARE_S_SLC 32:32 |
| 3551 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_SPARE_S_WIDTH 1 |
| 3552 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_SPARE_S_INT_SLC 0:0 |
| 3553 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_SPARE_S_POSITION 32 |
| 3554 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_SPARE_S_FMASK 64'b0000000000000000000000000000000100000000000000000000000000000000 |
| 3555 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_SPARE_S_HW_LD_MASK 64'b0000000000000000000000000000000100000000000000000000000000000000 |
| 3556 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_SPARE_S_POR_VALUE 1'b0 |
| 3557 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_SPARE_S_FIELD_NAME "spare_s" |
| 3558 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_UR_P_FID 10 |
| 3559 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_UR_P_SLC 20:20 |
| 3560 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_UR_P_WIDTH 1 |
| 3561 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_UR_P_INT_SLC 0:0 |
| 3562 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_UR_P_POSITION 20 |
| 3563 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_UR_P_FMASK 64'b0000000000000000000000000000000000000000000100000000000000000000 |
| 3564 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_UR_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000100000000000000000000 |
| 3565 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_UR_P_POR_VALUE 1'b0 |
| 3566 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_UR_P_FIELD_NAME "ur_p" |
| 3567 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_MFP_P_FID 11 |
| 3568 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_MFP_P_SLC 18:18 |
| 3569 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_MFP_P_WIDTH 1 |
| 3570 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_MFP_P_INT_SLC 0:0 |
| 3571 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_MFP_P_POSITION 18 |
| 3572 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_MFP_P_FMASK 64'b0000000000000000000000000000000000000000000001000000000000000000 |
| 3573 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_MFP_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000001000000000000000000 |
| 3574 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_MFP_P_POR_VALUE 1'b0 |
| 3575 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_MFP_P_FIELD_NAME "mfp_p" |
| 3576 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_ROF_P_FID 12 |
| 3577 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_ROF_P_SLC 17:17 |
| 3578 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_ROF_P_WIDTH 1 |
| 3579 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_ROF_P_INT_SLC 0:0 |
| 3580 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_ROF_P_POSITION 17 |
| 3581 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_ROF_P_FMASK 64'b0000000000000000000000000000000000000000000000100000000000000000 |
| 3582 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_ROF_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000100000000000000000 |
| 3583 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_ROF_P_POR_VALUE 1'b0 |
| 3584 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_ROF_P_FIELD_NAME "rof_p" |
| 3585 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_UC_P_FID 13 |
| 3586 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_UC_P_SLC 16:16 |
| 3587 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_UC_P_WIDTH 1 |
| 3588 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_UC_P_INT_SLC 0:0 |
| 3589 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_UC_P_POSITION 16 |
| 3590 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_UC_P_FMASK 64'b0000000000000000000000000000000000000000000000010000000000000000 |
| 3591 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_UC_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000010000000000000000 |
| 3592 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_UC_P_POR_VALUE 1'b0 |
| 3593 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_UC_P_FIELD_NAME "uc_p" |
| 3594 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_SPARE2_FID 14 |
| 3595 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_SPARE2_SLC 15:15 |
| 3596 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_SPARE2_WIDTH 1 |
| 3597 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_SPARE2_INT_SLC 0:0 |
| 3598 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_SPARE2_POSITION 15 |
| 3599 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_SPARE2_FMASK 64'b0000000000000000000000000000000000000000000000001000000000000000 |
| 3600 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_SPARE2_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000001000000000000000 |
| 3601 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_SPARE2_POR_VALUE 1'b0 |
| 3602 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_SPARE2_FIELD_NAME "spare2" |
| 3603 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_CTO_P_FID 15 |
| 3604 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_CTO_P_SLC 14:14 |
| 3605 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_CTO_P_WIDTH 1 |
| 3606 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_CTO_P_INT_SLC 0:0 |
| 3607 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_CTO_P_POSITION 14 |
| 3608 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_CTO_P_FMASK 64'b0000000000000000000000000000000000000000000000000100000000000000 |
| 3609 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_CTO_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000100000000000000 |
| 3610 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_CTO_P_POR_VALUE 1'b0 |
| 3611 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_CTO_P_FIELD_NAME "cto_p" |
| 3612 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_FCP_P_FID 16 |
| 3613 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_FCP_P_SLC 13:13 |
| 3614 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_FCP_P_WIDTH 1 |
| 3615 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_FCP_P_INT_SLC 0:0 |
| 3616 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_FCP_P_POSITION 13 |
| 3617 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_FCP_P_FMASK 64'b0000000000000000000000000000000000000000000000000010000000000000 |
| 3618 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_FCP_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000010000000000000 |
| 3619 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_FCP_P_POR_VALUE 1'b0 |
| 3620 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_FCP_P_FIELD_NAME "fcp_p" |
| 3621 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_PP_P_FID 17 |
| 3622 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_PP_P_SLC 12:12 |
| 3623 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_PP_P_WIDTH 1 |
| 3624 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_PP_P_INT_SLC 0:0 |
| 3625 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_PP_P_POSITION 12 |
| 3626 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_PP_P_FMASK 64'b0000000000000000000000000000000000000000000000000001000000000000 |
| 3627 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_PP_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000001000000000000 |
| 3628 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_PP_P_POR_VALUE 1'b0 |
| 3629 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_PP_P_FIELD_NAME "pp_p" |
| 3630 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_DLP_P_FID 18 |
| 3631 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_DLP_P_SLC 4:4 |
| 3632 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_DLP_P_WIDTH 1 |
| 3633 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_DLP_P_INT_SLC 0:0 |
| 3634 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_DLP_P_POSITION 4 |
| 3635 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_DLP_P_FMASK 64'b0000000000000000000000000000000000000000000000000000000000010000 |
| 3636 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_DLP_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000010000 |
| 3637 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_DLP_P_POR_VALUE 1'b0 |
| 3638 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_DLP_P_FIELD_NAME "dlp_p" |
| 3639 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_SPARE_P_FID 19 |
| 3640 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_SPARE_P_SLC 0:0 |
| 3641 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_SPARE_P_WIDTH 1 |
| 3642 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_SPARE_P_INT_SLC 0:0 |
| 3643 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_SPARE_P_POSITION 0 |
| 3644 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_SPARE_P_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000001 |
| 3645 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_SPARE_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000001 |
| 3646 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_SPARE_P_POR_VALUE 1'b0 |
| 3647 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_UE_ERR_RW1S_ALIAS_SPARE_P_FIELD_NAME "spare_p" |
| 3648 | |
| 3649 | //------------------------------------------------------- |
| 3650 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR1 |
| 3651 | //------------------------------------------------------- |
| 3652 | |
| 3653 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR1_HW_ADDR 27'b000000011110010001000000101 |
| 3654 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR1_ADDR 30'b000000011110010001000000101000 |
| 3655 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR1_NAME "fire_plc_tlu_ctb_tlr_csr_b_rue_hdr1" |
| 3656 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR1_WIDTH 64 |
| 3657 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR1_DEPTH 1 |
| 3658 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR1_SLC 63:0 |
| 3659 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR1_INT_SLC 63:0 |
| 3660 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR1_POSITION 0 |
| 3661 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR1_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_rue_hdr1" |
| 3662 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR1_LOW_ADDR_WIDTH 0 |
| 3663 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR1_ADDR_RANGE 26:0 |
| 3664 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR1_READ_MASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 3665 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR1_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3666 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR1_WRITE_MASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 3667 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR1_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3668 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR1_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3669 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR1_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3670 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR1_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3671 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR1_RMASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 3672 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR1_RESERVED_BIT_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3673 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR1_HW_LD_MASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 3674 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR1_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3675 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR1_INTERNAL_REG 1 |
| 3676 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR1_ALIASED_FROM 0 |
| 3677 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR1_ZERO_TIME_OMNI 1 |
| 3678 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR1_HW_ACC_JTAG_RD 1 |
| 3679 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR1_HW_ACC_JTAG_WR 1 |
| 3680 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR1_HW_ACC_PIO_SLOW_RD 1 |
| 3681 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR1_HW_ACC_PIO_SLOW_WR 1 |
| 3682 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR1_HW_ACC_PIO_MED_RD 1 |
| 3683 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR1_HW_ACC_PIO_MED_WR 1 |
| 3684 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR1_HW_ACC_PIO_FAST_RD 1 |
| 3685 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR1_HW_ACC_PIO_FAST_WR 1 |
| 3686 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR1_NUM_FIELDS 1 |
| 3687 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR1_HDR_FID 0 |
| 3688 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR1_HDR_SLC 63:0 |
| 3689 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR1_HDR_WIDTH 64 |
| 3690 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR1_HDR_INT_SLC 63:0 |
| 3691 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR1_HDR_POSITION 0 |
| 3692 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR1_HDR_FMASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 3693 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR1_HDR_HW_LD_MASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 3694 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR1_HDR_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3695 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR1_HDR_FIELD_NAME "hdr" |
| 3696 | |
| 3697 | //------------------------------------------------------- |
| 3698 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR2 |
| 3699 | //------------------------------------------------------- |
| 3700 | |
| 3701 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR2_HW_ADDR 27'b000000011110010001000000110 |
| 3702 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR2_ADDR 30'b000000011110010001000000110000 |
| 3703 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR2_NAME "fire_plc_tlu_ctb_tlr_csr_b_rue_hdr2" |
| 3704 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR2_WIDTH 64 |
| 3705 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR2_DEPTH 1 |
| 3706 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR2_SLC 63:0 |
| 3707 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR2_INT_SLC 63:0 |
| 3708 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR2_POSITION 0 |
| 3709 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR2_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_rue_hdr2" |
| 3710 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR2_LOW_ADDR_WIDTH 0 |
| 3711 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR2_ADDR_RANGE 26:0 |
| 3712 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR2_READ_MASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 3713 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR2_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3714 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR2_WRITE_MASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 3715 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR2_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3716 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR2_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3717 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR2_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3718 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR2_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3719 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR2_RMASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 3720 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR2_RESERVED_BIT_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3721 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR2_HW_LD_MASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 3722 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR2_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3723 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR2_INTERNAL_REG 1 |
| 3724 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR2_ALIASED_FROM 0 |
| 3725 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR2_ZERO_TIME_OMNI 1 |
| 3726 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR2_HW_ACC_JTAG_RD 1 |
| 3727 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR2_HW_ACC_JTAG_WR 1 |
| 3728 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR2_HW_ACC_PIO_SLOW_RD 1 |
| 3729 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR2_HW_ACC_PIO_SLOW_WR 1 |
| 3730 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR2_HW_ACC_PIO_MED_RD 1 |
| 3731 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR2_HW_ACC_PIO_MED_WR 1 |
| 3732 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR2_HW_ACC_PIO_FAST_RD 1 |
| 3733 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR2_HW_ACC_PIO_FAST_WR 1 |
| 3734 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR2_NUM_FIELDS 1 |
| 3735 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR2_HDR_FID 0 |
| 3736 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR2_HDR_SLC 63:0 |
| 3737 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR2_HDR_WIDTH 64 |
| 3738 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR2_HDR_INT_SLC 63:0 |
| 3739 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR2_HDR_POSITION 0 |
| 3740 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR2_HDR_FMASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 3741 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR2_HDR_HW_LD_MASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 3742 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR2_HDR_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3743 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_RUE_HDR2_HDR_FIELD_NAME "hdr" |
| 3744 | |
| 3745 | //------------------------------------------------------- |
| 3746 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR1 |
| 3747 | //------------------------------------------------------- |
| 3748 | |
| 3749 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR1_HW_ADDR 27'b000000011110010001000000111 |
| 3750 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR1_ADDR 30'b000000011110010001000000111000 |
| 3751 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR1_NAME "fire_plc_tlu_ctb_tlr_csr_b_tue_hdr1" |
| 3752 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR1_WIDTH 64 |
| 3753 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR1_DEPTH 1 |
| 3754 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR1_SLC 63:0 |
| 3755 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR1_INT_SLC 63:0 |
| 3756 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR1_POSITION 0 |
| 3757 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR1_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_tue_hdr1" |
| 3758 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR1_LOW_ADDR_WIDTH 0 |
| 3759 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR1_ADDR_RANGE 26:0 |
| 3760 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR1_READ_MASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 3761 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR1_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3762 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR1_WRITE_MASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 3763 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR1_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3764 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR1_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3765 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR1_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3766 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR1_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3767 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR1_RMASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 3768 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR1_RESERVED_BIT_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3769 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR1_HW_LD_MASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 3770 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR1_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3771 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR1_INTERNAL_REG 1 |
| 3772 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR1_ALIASED_FROM 0 |
| 3773 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR1_ZERO_TIME_OMNI 1 |
| 3774 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR1_HW_ACC_JTAG_RD 1 |
| 3775 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR1_HW_ACC_JTAG_WR 1 |
| 3776 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR1_HW_ACC_PIO_SLOW_RD 1 |
| 3777 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR1_HW_ACC_PIO_SLOW_WR 1 |
| 3778 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR1_HW_ACC_PIO_MED_RD 1 |
| 3779 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR1_HW_ACC_PIO_MED_WR 1 |
| 3780 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR1_HW_ACC_PIO_FAST_RD 1 |
| 3781 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR1_HW_ACC_PIO_FAST_WR 1 |
| 3782 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR1_NUM_FIELDS 1 |
| 3783 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR1_HDR_FID 0 |
| 3784 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR1_HDR_SLC 63:0 |
| 3785 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR1_HDR_WIDTH 64 |
| 3786 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR1_HDR_INT_SLC 63:0 |
| 3787 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR1_HDR_POSITION 0 |
| 3788 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR1_HDR_FMASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 3789 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR1_HDR_HW_LD_MASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 3790 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR1_HDR_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3791 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR1_HDR_FIELD_NAME "hdr" |
| 3792 | |
| 3793 | //------------------------------------------------------- |
| 3794 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR2 |
| 3795 | //------------------------------------------------------- |
| 3796 | |
| 3797 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR2_HW_ADDR 27'b000000011110010001000001000 |
| 3798 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR2_ADDR 30'b000000011110010001000001000000 |
| 3799 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR2_NAME "fire_plc_tlu_ctb_tlr_csr_b_tue_hdr2" |
| 3800 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR2_WIDTH 64 |
| 3801 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR2_DEPTH 1 |
| 3802 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR2_SLC 63:0 |
| 3803 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR2_INT_SLC 63:0 |
| 3804 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR2_POSITION 0 |
| 3805 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR2_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_tue_hdr2" |
| 3806 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR2_LOW_ADDR_WIDTH 0 |
| 3807 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR2_ADDR_RANGE 26:0 |
| 3808 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR2_READ_MASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 3809 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR2_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3810 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR2_WRITE_MASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 3811 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR2_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3812 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR2_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3813 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR2_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3814 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR2_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3815 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR2_RMASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 3816 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR2_RESERVED_BIT_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3817 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR2_HW_LD_MASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 3818 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR2_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3819 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR2_INTERNAL_REG 1 |
| 3820 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR2_ALIASED_FROM 0 |
| 3821 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR2_ZERO_TIME_OMNI 1 |
| 3822 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR2_HW_ACC_JTAG_RD 1 |
| 3823 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR2_HW_ACC_JTAG_WR 1 |
| 3824 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR2_HW_ACC_PIO_SLOW_RD 1 |
| 3825 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR2_HW_ACC_PIO_SLOW_WR 1 |
| 3826 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR2_HW_ACC_PIO_MED_RD 1 |
| 3827 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR2_HW_ACC_PIO_MED_WR 1 |
| 3828 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR2_HW_ACC_PIO_FAST_RD 1 |
| 3829 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR2_HW_ACC_PIO_FAST_WR 1 |
| 3830 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR2_NUM_FIELDS 1 |
| 3831 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR2_HDR_FID 0 |
| 3832 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR2_HDR_SLC 63:0 |
| 3833 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR2_HDR_WIDTH 64 |
| 3834 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR2_HDR_INT_SLC 63:0 |
| 3835 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR2_HDR_POSITION 0 |
| 3836 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR2_HDR_FMASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 3837 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR2_HDR_HW_LD_MASK 64'b1111111111111111111111111111111111111111111111111111111111111111 |
| 3838 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR2_HDR_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3839 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_TUE_HDR2_HDR_FIELD_NAME "hdr" |
| 3840 | |
| 3841 | //------------------------------------------------------- |
| 3842 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_LOG |
| 3843 | //------------------------------------------------------- |
| 3844 | |
| 3845 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_LOG_HW_ADDR 27'b000000011110100001000000000 |
| 3846 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_LOG_ADDR 30'b000000011110100001000000000000 |
| 3847 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_LOG_NAME "fire_plc_tlu_ctb_tlr_csr_b_ce_log" |
| 3848 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_LOG_WIDTH 64 |
| 3849 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_LOG_DEPTH 1 |
| 3850 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_LOG_SLC 63:0 |
| 3851 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_LOG_INT_SLC 63:0 |
| 3852 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_LOG_POSITION 0 |
| 3853 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_LOG_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_ce_log" |
| 3854 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_LOG_LOW_ADDR_WIDTH 0 |
| 3855 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_LOG_ADDR_RANGE 26:0 |
| 3856 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_LOG_READ_MASK 64'b0000000000000000000000000000000000000000000000000001111111111111 |
| 3857 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_LOG_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3858 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_LOG_WRITE_MASK 64'b0000000000000000000000000000000000000000000000000001111111111111 |
| 3859 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_LOG_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3860 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_LOG_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3861 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_LOG_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3862 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_LOG_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3863 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_LOG_RMASK 64'b0000000000000000000000000000000000000000000000000001111111111111 |
| 3864 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_LOG_RESERVED_BIT_MASK 64'b1111111111111111111111111111111111111111111111111110000000000000 |
| 3865 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_LOG_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3866 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_LOG_POR_VALUE 64'b0000000000000000000000000000000000000000000000000001000111000001 |
| 3867 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_LOG_INTERNAL_REG 1 |
| 3868 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_LOG_ALIASED_FROM 0 |
| 3869 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_LOG_ZERO_TIME_OMNI 1 |
| 3870 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_LOG_HW_ACC_JTAG_RD 1 |
| 3871 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_LOG_HW_ACC_JTAG_WR 1 |
| 3872 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_LOG_HW_ACC_PIO_SLOW_RD 1 |
| 3873 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_LOG_HW_ACC_PIO_SLOW_WR 1 |
| 3874 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_LOG_HW_ACC_PIO_MED_RD 1 |
| 3875 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_LOG_HW_ACC_PIO_MED_WR 1 |
| 3876 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_LOG_HW_ACC_PIO_FAST_RD 1 |
| 3877 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_LOG_HW_ACC_PIO_FAST_WR 1 |
| 3878 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_LOG_NUM_FIELDS 1 |
| 3879 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_LOG_EN_FID 0 |
| 3880 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_LOG_EN_SLC 12:0 |
| 3881 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_LOG_EN_WIDTH 13 |
| 3882 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_LOG_EN_INT_SLC 12:0 |
| 3883 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_LOG_EN_POSITION 0 |
| 3884 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_LOG_EN_FMASK 64'b0000000000000000000000000000000000000000000000000001111111111111 |
| 3885 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_LOG_EN_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3886 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_LOG_EN_POR_VALUE 13'b1000111000001 |
| 3887 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_LOG_EN_FIELD_NAME "en" |
| 3888 | |
| 3889 | //------------------------------------------------------- |
| 3890 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN |
| 3891 | //------------------------------------------------------- |
| 3892 | |
| 3893 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_HW_ADDR 27'b000000011110100001000000001 |
| 3894 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_ADDR 30'b000000011110100001000000001000 |
| 3895 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_NAME "fire_plc_tlu_ctb_tlr_csr_b_ce_int_en" |
| 3896 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_WIDTH 64 |
| 3897 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_DEPTH 1 |
| 3898 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_SLC 63:0 |
| 3899 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_INT_SLC 63:0 |
| 3900 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_POSITION 0 |
| 3901 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_ce_int_en" |
| 3902 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_LOW_ADDR_WIDTH 0 |
| 3903 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_ADDR_RANGE 26:0 |
| 3904 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_READ_MASK 64'b0000000000000000000111111111111100000000000000000001111111111111 |
| 3905 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3906 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_WRITE_MASK 64'b0000000000000000000111111111111100000000000000000001111111111111 |
| 3907 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3908 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3909 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3910 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3911 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_RMASK 64'b0000000000000000000111111111111100000000000000000001111111111111 |
| 3912 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_RESERVED_BIT_MASK 64'b1111111111111111111000000000000011111111111111111110000000000000 |
| 3913 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3914 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3915 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_INTERNAL_REG 1 |
| 3916 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_ALIASED_FROM 0 |
| 3917 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_ZERO_TIME_OMNI 1 |
| 3918 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_HW_ACC_JTAG_RD 1 |
| 3919 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_HW_ACC_JTAG_WR 1 |
| 3920 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_HW_ACC_PIO_SLOW_RD 1 |
| 3921 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_HW_ACC_PIO_SLOW_WR 1 |
| 3922 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_HW_ACC_PIO_MED_RD 1 |
| 3923 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_HW_ACC_PIO_MED_WR 1 |
| 3924 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_HW_ACC_PIO_FAST_RD 1 |
| 3925 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_HW_ACC_PIO_FAST_WR 1 |
| 3926 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_NUM_FIELDS 2 |
| 3927 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_EN_S_FID 0 |
| 3928 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_EN_S_SLC 44:32 |
| 3929 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_EN_S_WIDTH 13 |
| 3930 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_EN_S_INT_SLC 12:0 |
| 3931 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_EN_S_POSITION 32 |
| 3932 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_EN_S_FMASK 64'b0000000000000000000111111111111100000000000000000000000000000000 |
| 3933 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_EN_S_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3934 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_EN_S_POR_VALUE 13'b0000000000000 |
| 3935 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_EN_S_FIELD_NAME "en_s" |
| 3936 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_EN_P_FID 1 |
| 3937 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_EN_P_SLC 12:0 |
| 3938 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_EN_P_WIDTH 13 |
| 3939 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_EN_P_INT_SLC 12:0 |
| 3940 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_EN_P_POSITION 0 |
| 3941 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_EN_P_FMASK 64'b0000000000000000000000000000000000000000000000000001111111111111 |
| 3942 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_EN_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3943 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_EN_P_POR_VALUE 13'b0000000000000 |
| 3944 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_INT_EN_EN_P_FIELD_NAME "en_p" |
| 3945 | |
| 3946 | //------------------------------------------------------- |
| 3947 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR |
| 3948 | //------------------------------------------------------- |
| 3949 | |
| 3950 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_HW_ADDR 27'b000000011110100001000000010 |
| 3951 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_ADDR 30'b000000011110100001000000010000 |
| 3952 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_NAME "fire_plc_tlu_ctb_tlr_csr_b_ce_en_err" |
| 3953 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_WIDTH 64 |
| 3954 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_DEPTH 1 |
| 3955 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_SLC 63:0 |
| 3956 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_INT_SLC 63:0 |
| 3957 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_POSITION 0 |
| 3958 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_ce_en_err" |
| 3959 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_LOW_ADDR_WIDTH 0 |
| 3960 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_ADDR_RANGE 26:0 |
| 3961 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_READ_MASK 64'b0000000000000000000111111111111100000000000000000001111111111111 |
| 3962 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_READ_ONLY_MASK 64'b0000000000000000000111111111111100000000000000000001111111111111 |
| 3963 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_WRITE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3964 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3965 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3966 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3967 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3968 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_RMASK 64'b0000000000000000000111111111111100000000000000000001111111111111 |
| 3969 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_RESERVED_BIT_MASK 64'b1111111111111111111000000000000011111111111111111110000000000000 |
| 3970 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_HW_LD_MASK 64'b0000000000000000000111111111111100000000000000000001111111111111 |
| 3971 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 3972 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_INTERNAL_REG 0 |
| 3973 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_EXTERNAL_DECODE_REG 1 |
| 3974 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_ALIASED_FROM 0 |
| 3975 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_ZERO_TIME_OMNI 0 |
| 3976 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_HW_ACC_JTAG_RD 1 |
| 3977 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_HW_ACC_JTAG_WR 1 |
| 3978 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_HW_ACC_PIO_SLOW_RD 1 |
| 3979 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_HW_ACC_PIO_SLOW_WR 1 |
| 3980 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_HW_ACC_PIO_MED_RD 1 |
| 3981 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_HW_ACC_PIO_MED_WR 1 |
| 3982 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_HW_ACC_PIO_FAST_RD 1 |
| 3983 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_HW_ACC_PIO_FAST_WR 1 |
| 3984 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_NUM_FIELDS 2 |
| 3985 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_ERR_S_FID 0 |
| 3986 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_ERR_S_SLC 44:32 |
| 3987 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_ERR_S_WIDTH 13 |
| 3988 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_ERR_S_INT_SLC 12:0 |
| 3989 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_ERR_S_POSITION 32 |
| 3990 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_ERR_S_FMASK 64'b0000000000000000000111111111111100000000000000000000000000000000 |
| 3991 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_ERR_S_HW_LD_MASK 64'b0000000000000000000111111111111100000000000000000000000000000000 |
| 3992 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_ERR_S_POR_VALUE 13'b0000000000000 |
| 3993 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_ERR_S_FIELD_NAME "err_s" |
| 3994 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_ERR_P_FID 1 |
| 3995 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_ERR_P_SLC 12:0 |
| 3996 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_ERR_P_WIDTH 13 |
| 3997 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_ERR_P_INT_SLC 12:0 |
| 3998 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_ERR_P_POSITION 0 |
| 3999 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_ERR_P_FMASK 64'b0000000000000000000000000000000000000000000000000001111111111111 |
| 4000 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_ERR_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000001111111111111 |
| 4001 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_ERR_P_POR_VALUE 13'b0000000000000 |
| 4002 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_EN_ERR_ERR_P_FIELD_NAME "err_p" |
| 4003 | |
| 4004 | //------------------------------------------------------- |
| 4005 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS |
| 4006 | //------------------------------------------------------- |
| 4007 | |
| 4008 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_HW_ADDR 27'b000000011110100001000000011 |
| 4009 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_ADDR 30'b000000011110100001000000011000 |
| 4010 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_NAME "fire_plc_tlu_ctb_tlr_csr_b_ce_err_rw1c_alias" |
| 4011 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_WIDTH 64 |
| 4012 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_DEPTH 1 |
| 4013 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_SLC 63:0 |
| 4014 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_INT_SLC 63:0 |
| 4015 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_POSITION 0 |
| 4016 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_ce_err_rw1c_alias" |
| 4017 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_LOW_ADDR_WIDTH 0 |
| 4018 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_ADDR_RANGE 26:0 |
| 4019 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_READ_MASK 64'b0000000000000000000100011100000100000000000000000001000111000001 |
| 4020 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4021 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_WRITE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4022 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4023 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4024 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_CLEAR_MASK 64'b0000000000000000000100011100000100000000000000000001000111000001 |
| 4025 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4026 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RMASK 64'b0000000000000000000100011100000100000000000000000001000111000001 |
| 4027 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RESERVED_BIT_MASK 64'b1111111111111111111011100011111011111111111111111110111000111110 |
| 4028 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_HW_LD_MASK 64'b0000000000000000000100011100000100000000000000000001000111000001 |
| 4029 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4030 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_INTERNAL_REG 1 |
| 4031 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_ALIASED_FROM 0 |
| 4032 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_ZERO_TIME_OMNI 1 |
| 4033 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_HW_ACC_JTAG_RD 1 |
| 4034 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_HW_ACC_JTAG_WR 1 |
| 4035 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_HW_ACC_PIO_SLOW_RD 1 |
| 4036 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_HW_ACC_PIO_SLOW_WR 1 |
| 4037 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_HW_ACC_PIO_MED_RD 1 |
| 4038 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_HW_ACC_PIO_MED_WR 1 |
| 4039 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_HW_ACC_PIO_FAST_RD 1 |
| 4040 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_HW_ACC_PIO_FAST_WR 1 |
| 4041 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_NUM_FIELDS 10 |
| 4042 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RTO_S_FID 0 |
| 4043 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RTO_S_SLC 44:44 |
| 4044 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RTO_S_WIDTH 1 |
| 4045 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RTO_S_INT_SLC 0:0 |
| 4046 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RTO_S_POSITION 44 |
| 4047 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RTO_S_FMASK 64'b0000000000000000000100000000000000000000000000000000000000000000 |
| 4048 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RTO_S_HW_LD_MASK 64'b0000000000000000000100000000000000000000000000000000000000000000 |
| 4049 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RTO_S_POR_VALUE 1'b0 |
| 4050 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RTO_S_FIELD_NAME "rto_s" |
| 4051 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RNR_S_FID 1 |
| 4052 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RNR_S_SLC 40:40 |
| 4053 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RNR_S_WIDTH 1 |
| 4054 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RNR_S_INT_SLC 0:0 |
| 4055 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RNR_S_POSITION 40 |
| 4056 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RNR_S_FMASK 64'b0000000000000000000000010000000000000000000000000000000000000000 |
| 4057 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RNR_S_HW_LD_MASK 64'b0000000000000000000000010000000000000000000000000000000000000000 |
| 4058 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RNR_S_POR_VALUE 1'b0 |
| 4059 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RNR_S_FIELD_NAME "rnr_s" |
| 4060 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_BDP_S_FID 2 |
| 4061 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_BDP_S_SLC 39:39 |
| 4062 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_BDP_S_WIDTH 1 |
| 4063 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_BDP_S_INT_SLC 0:0 |
| 4064 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_BDP_S_POSITION 39 |
| 4065 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_BDP_S_FMASK 64'b0000000000000000000000001000000000000000000000000000000000000000 |
| 4066 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_BDP_S_HW_LD_MASK 64'b0000000000000000000000001000000000000000000000000000000000000000 |
| 4067 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_BDP_S_POR_VALUE 1'b0 |
| 4068 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_BDP_S_FIELD_NAME "bdp_s" |
| 4069 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_BTP_S_FID 3 |
| 4070 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_BTP_S_SLC 38:38 |
| 4071 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_BTP_S_WIDTH 1 |
| 4072 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_BTP_S_INT_SLC 0:0 |
| 4073 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_BTP_S_POSITION 38 |
| 4074 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_BTP_S_FMASK 64'b0000000000000000000000000100000000000000000000000000000000000000 |
| 4075 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_BTP_S_HW_LD_MASK 64'b0000000000000000000000000100000000000000000000000000000000000000 |
| 4076 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_BTP_S_POR_VALUE 1'b0 |
| 4077 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_BTP_S_FIELD_NAME "btp_s" |
| 4078 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RE_S_FID 4 |
| 4079 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RE_S_SLC 32:32 |
| 4080 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RE_S_WIDTH 1 |
| 4081 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RE_S_INT_SLC 0:0 |
| 4082 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RE_S_POSITION 32 |
| 4083 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RE_S_FMASK 64'b0000000000000000000000000000000100000000000000000000000000000000 |
| 4084 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RE_S_HW_LD_MASK 64'b0000000000000000000000000000000100000000000000000000000000000000 |
| 4085 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RE_S_POR_VALUE 1'b0 |
| 4086 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RE_S_FIELD_NAME "re_s" |
| 4087 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RTO_P_FID 5 |
| 4088 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RTO_P_SLC 12:12 |
| 4089 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RTO_P_WIDTH 1 |
| 4090 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RTO_P_INT_SLC 0:0 |
| 4091 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RTO_P_POSITION 12 |
| 4092 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RTO_P_FMASK 64'b0000000000000000000000000000000000000000000000000001000000000000 |
| 4093 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RTO_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000001000000000000 |
| 4094 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RTO_P_POR_VALUE 1'b0 |
| 4095 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RTO_P_FIELD_NAME "rto_p" |
| 4096 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RNR_P_FID 6 |
| 4097 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RNR_P_SLC 8:8 |
| 4098 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RNR_P_WIDTH 1 |
| 4099 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RNR_P_INT_SLC 0:0 |
| 4100 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RNR_P_POSITION 8 |
| 4101 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RNR_P_FMASK 64'b0000000000000000000000000000000000000000000000000000000100000000 |
| 4102 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RNR_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000100000000 |
| 4103 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RNR_P_POR_VALUE 1'b0 |
| 4104 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RNR_P_FIELD_NAME "rnr_p" |
| 4105 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_BDP_P_FID 7 |
| 4106 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_BDP_P_SLC 7:7 |
| 4107 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_BDP_P_WIDTH 1 |
| 4108 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_BDP_P_INT_SLC 0:0 |
| 4109 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_BDP_P_POSITION 7 |
| 4110 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_BDP_P_FMASK 64'b0000000000000000000000000000000000000000000000000000000010000000 |
| 4111 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_BDP_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000010000000 |
| 4112 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_BDP_P_POR_VALUE 1'b0 |
| 4113 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_BDP_P_FIELD_NAME "bdp_p" |
| 4114 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_BTP_P_FID 8 |
| 4115 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_BTP_P_SLC 6:6 |
| 4116 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_BTP_P_WIDTH 1 |
| 4117 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_BTP_P_INT_SLC 0:0 |
| 4118 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_BTP_P_POSITION 6 |
| 4119 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_BTP_P_FMASK 64'b0000000000000000000000000000000000000000000000000000000001000000 |
| 4120 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_BTP_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000001000000 |
| 4121 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_BTP_P_POR_VALUE 1'b0 |
| 4122 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_BTP_P_FIELD_NAME "btp_p" |
| 4123 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RE_P_FID 9 |
| 4124 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RE_P_SLC 0:0 |
| 4125 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RE_P_WIDTH 1 |
| 4126 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RE_P_INT_SLC 0:0 |
| 4127 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RE_P_POSITION 0 |
| 4128 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RE_P_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000001 |
| 4129 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RE_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000001 |
| 4130 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RE_P_POR_VALUE 1'b0 |
| 4131 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1C_ALIAS_RE_P_FIELD_NAME "re_p" |
| 4132 | |
| 4133 | //------------------------------------------------------- |
| 4134 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS |
| 4135 | //------------------------------------------------------- |
| 4136 | |
| 4137 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_HW_ADDR 27'b000000011110100001000000100 |
| 4138 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_ADDR 30'b000000011110100001000000100000 |
| 4139 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_NAME "fire_plc_tlu_ctb_tlr_csr_b_ce_err_rw1s_alias" |
| 4140 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_WIDTH 64 |
| 4141 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_DEPTH 1 |
| 4142 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_SLC 63:0 |
| 4143 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_INT_SLC 63:0 |
| 4144 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_POSITION 0 |
| 4145 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_ce_err_rw1s_alias" |
| 4146 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_LOW_ADDR_WIDTH 0 |
| 4147 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_ADDR_RANGE 26:0 |
| 4148 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_READ_MASK 64'b0000000000000000000100011100000100000000000000000001000111000001 |
| 4149 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4150 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_WRITE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4151 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4152 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_SET_MASK 64'b0000000000000000000100011100000100000000000000000001000111000001 |
| 4153 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4154 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4155 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RMASK 64'b0000000000000000000100011100000100000000000000000001000111000001 |
| 4156 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RESERVED_BIT_MASK 64'b1111111111111111111011100011111011111111111111111110111000111110 |
| 4157 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_HW_LD_MASK 64'b0000000000000000000100011100000100000000000000000001000111000001 |
| 4158 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4159 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_INTERNAL_REG 1 |
| 4160 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_ALIASED_FROM "fire_plc_tlu_ctb_tlr_csr_b_ce_err_rw1c_alias" |
| 4161 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_ZERO_TIME_OMNI 1 |
| 4162 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_HW_ACC_JTAG_RD 1 |
| 4163 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_HW_ACC_JTAG_WR 1 |
| 4164 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_HW_ACC_PIO_SLOW_RD 1 |
| 4165 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_HW_ACC_PIO_SLOW_WR 1 |
| 4166 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_HW_ACC_PIO_MED_RD 1 |
| 4167 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_HW_ACC_PIO_MED_WR 1 |
| 4168 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_HW_ACC_PIO_FAST_RD 1 |
| 4169 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_HW_ACC_PIO_FAST_WR 1 |
| 4170 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_NUM_FIELDS 10 |
| 4171 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RTO_S_FID 0 |
| 4172 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RTO_S_SLC 44:44 |
| 4173 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RTO_S_WIDTH 1 |
| 4174 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RTO_S_INT_SLC 0:0 |
| 4175 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RTO_S_POSITION 44 |
| 4176 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RTO_S_FMASK 64'b0000000000000000000100000000000000000000000000000000000000000000 |
| 4177 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RTO_S_HW_LD_MASK 64'b0000000000000000000100000000000000000000000000000000000000000000 |
| 4178 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RTO_S_POR_VALUE 1'b0 |
| 4179 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RTO_S_FIELD_NAME "rto_s" |
| 4180 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RNR_S_FID 1 |
| 4181 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RNR_S_SLC 40:40 |
| 4182 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RNR_S_WIDTH 1 |
| 4183 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RNR_S_INT_SLC 0:0 |
| 4184 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RNR_S_POSITION 40 |
| 4185 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RNR_S_FMASK 64'b0000000000000000000000010000000000000000000000000000000000000000 |
| 4186 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RNR_S_HW_LD_MASK 64'b0000000000000000000000010000000000000000000000000000000000000000 |
| 4187 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RNR_S_POR_VALUE 1'b0 |
| 4188 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RNR_S_FIELD_NAME "rnr_s" |
| 4189 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_BDP_S_FID 2 |
| 4190 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_BDP_S_SLC 39:39 |
| 4191 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_BDP_S_WIDTH 1 |
| 4192 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_BDP_S_INT_SLC 0:0 |
| 4193 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_BDP_S_POSITION 39 |
| 4194 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_BDP_S_FMASK 64'b0000000000000000000000001000000000000000000000000000000000000000 |
| 4195 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_BDP_S_HW_LD_MASK 64'b0000000000000000000000001000000000000000000000000000000000000000 |
| 4196 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_BDP_S_POR_VALUE 1'b0 |
| 4197 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_BDP_S_FIELD_NAME "bdp_s" |
| 4198 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_BTP_S_FID 3 |
| 4199 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_BTP_S_SLC 38:38 |
| 4200 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_BTP_S_WIDTH 1 |
| 4201 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_BTP_S_INT_SLC 0:0 |
| 4202 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_BTP_S_POSITION 38 |
| 4203 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_BTP_S_FMASK 64'b0000000000000000000000000100000000000000000000000000000000000000 |
| 4204 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_BTP_S_HW_LD_MASK 64'b0000000000000000000000000100000000000000000000000000000000000000 |
| 4205 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_BTP_S_POR_VALUE 1'b0 |
| 4206 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_BTP_S_FIELD_NAME "btp_s" |
| 4207 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RE_S_FID 4 |
| 4208 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RE_S_SLC 32:32 |
| 4209 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RE_S_WIDTH 1 |
| 4210 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RE_S_INT_SLC 0:0 |
| 4211 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RE_S_POSITION 32 |
| 4212 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RE_S_FMASK 64'b0000000000000000000000000000000100000000000000000000000000000000 |
| 4213 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RE_S_HW_LD_MASK 64'b0000000000000000000000000000000100000000000000000000000000000000 |
| 4214 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RE_S_POR_VALUE 1'b0 |
| 4215 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RE_S_FIELD_NAME "re_s" |
| 4216 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RTO_P_FID 5 |
| 4217 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RTO_P_SLC 12:12 |
| 4218 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RTO_P_WIDTH 1 |
| 4219 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RTO_P_INT_SLC 0:0 |
| 4220 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RTO_P_POSITION 12 |
| 4221 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RTO_P_FMASK 64'b0000000000000000000000000000000000000000000000000001000000000000 |
| 4222 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RTO_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000001000000000000 |
| 4223 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RTO_P_POR_VALUE 1'b0 |
| 4224 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RTO_P_FIELD_NAME "rto_p" |
| 4225 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RNR_P_FID 6 |
| 4226 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RNR_P_SLC 8:8 |
| 4227 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RNR_P_WIDTH 1 |
| 4228 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RNR_P_INT_SLC 0:0 |
| 4229 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RNR_P_POSITION 8 |
| 4230 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RNR_P_FMASK 64'b0000000000000000000000000000000000000000000000000000000100000000 |
| 4231 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RNR_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000100000000 |
| 4232 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RNR_P_POR_VALUE 1'b0 |
| 4233 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RNR_P_FIELD_NAME "rnr_p" |
| 4234 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_BDP_P_FID 7 |
| 4235 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_BDP_P_SLC 7:7 |
| 4236 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_BDP_P_WIDTH 1 |
| 4237 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_BDP_P_INT_SLC 0:0 |
| 4238 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_BDP_P_POSITION 7 |
| 4239 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_BDP_P_FMASK 64'b0000000000000000000000000000000000000000000000000000000010000000 |
| 4240 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_BDP_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000010000000 |
| 4241 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_BDP_P_POR_VALUE 1'b0 |
| 4242 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_BDP_P_FIELD_NAME "bdp_p" |
| 4243 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_BTP_P_FID 8 |
| 4244 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_BTP_P_SLC 6:6 |
| 4245 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_BTP_P_WIDTH 1 |
| 4246 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_BTP_P_INT_SLC 0:0 |
| 4247 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_BTP_P_POSITION 6 |
| 4248 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_BTP_P_FMASK 64'b0000000000000000000000000000000000000000000000000000000001000000 |
| 4249 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_BTP_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000001000000 |
| 4250 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_BTP_P_POR_VALUE 1'b0 |
| 4251 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_BTP_P_FIELD_NAME "btp_p" |
| 4252 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RE_P_FID 9 |
| 4253 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RE_P_SLC 0:0 |
| 4254 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RE_P_WIDTH 1 |
| 4255 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RE_P_INT_SLC 0:0 |
| 4256 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RE_P_POSITION 0 |
| 4257 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RE_P_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000001 |
| 4258 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RE_P_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000001 |
| 4259 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RE_P_POR_VALUE 1'b0 |
| 4260 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CE_ERR_RW1S_ALIAS_RE_P_FIELD_NAME "re_p" |
| 4261 | |
| 4262 | //------------------------------------------------------- |
| 4263 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV |
| 4264 | //------------------------------------------------------- |
| 4265 | |
| 4266 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_HW_ADDR 27'b000000011111100010000000000 |
| 4267 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_ADDR 30'b000000011111100010000000000000 |
| 4268 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_NAME "fire_plc_tlu_ctb_tlr_csr_b_peu_dlpl_serdes_rev" |
| 4269 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_WIDTH 64 |
| 4270 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_DEPTH 1 |
| 4271 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_SLC 63:0 |
| 4272 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_INT_SLC 63:0 |
| 4273 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_POSITION 0 |
| 4274 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_peu_dlpl_serdes_rev" |
| 4275 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_LOW_ADDR_WIDTH 0 |
| 4276 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_ADDR_RANGE 26:0 |
| 4277 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_READ_MASK 64'b0000000000000000000000000000000000000000000000000000000011111111 |
| 4278 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000011111111 |
| 4279 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_WRITE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4280 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4281 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4282 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4283 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4284 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_RMASK 64'b0000000000000000000000000000000000000000000000000000000011111111 |
| 4285 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_RESERVED_BIT_MASK 64'b1111111111111111111111111111111111111111111111111111111100000000 |
| 4286 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000011111111 |
| 4287 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4288 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_INTERNAL_REG 1 |
| 4289 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_ALIASED_FROM 0 |
| 4290 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_ZERO_TIME_OMNI 1 |
| 4291 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_HW_ACC_JTAG_RD 1 |
| 4292 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_HW_ACC_JTAG_WR 1 |
| 4293 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_HW_ACC_PIO_SLOW_RD 1 |
| 4294 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_HW_ACC_PIO_SLOW_WR 1 |
| 4295 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_HW_ACC_PIO_MED_RD 1 |
| 4296 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_HW_ACC_PIO_MED_WR 1 |
| 4297 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_HW_ACC_PIO_FAST_RD 1 |
| 4298 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_HW_ACC_PIO_FAST_WR 1 |
| 4299 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_NUM_FIELDS 2 |
| 4300 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_DLPL_ID_FID 0 |
| 4301 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_DLPL_ID_SLC 7:4 |
| 4302 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_DLPL_ID_WIDTH 4 |
| 4303 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_DLPL_ID_INT_SLC 3:0 |
| 4304 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_DLPL_ID_POSITION 4 |
| 4305 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_DLPL_ID_FMASK 64'b0000000000000000000000000000000000000000000000000000000011110000 |
| 4306 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_DLPL_ID_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000011110000 |
| 4307 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_DLPL_ID_POR_VALUE 4'b0000 |
| 4308 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_DLPL_ID_FIELD_NAME "dlpl_id" |
| 4309 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_SERDES_ID_FID 1 |
| 4310 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_SERDES_ID_SLC 3:0 |
| 4311 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_SERDES_ID_WIDTH 4 |
| 4312 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_SERDES_ID_INT_SLC 3:0 |
| 4313 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_SERDES_ID_POSITION 0 |
| 4314 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_SERDES_ID_FMASK 64'b0000000000000000000000000000000000000000000000000000000000001111 |
| 4315 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_SERDES_ID_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000001111 |
| 4316 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_SERDES_ID_POR_VALUE 4'b0000 |
| 4317 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_PEU_DLPL_SERDES_REV_SERDES_ID_FIELD_NAME "serdes_id" |
| 4318 | |
| 4319 | //------------------------------------------------------- |
| 4320 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_THRESH |
| 4321 | //------------------------------------------------------- |
| 4322 | |
| 4323 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_THRESH_HW_ADDR 27'b000000011111100010000000001 |
| 4324 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_THRESH_ADDR 30'b000000011111100010000000001000 |
| 4325 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_THRESH_NAME "fire_plc_tlu_ctb_tlr_csr_b_acknak_thresh" |
| 4326 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_THRESH_WIDTH 64 |
| 4327 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_THRESH_DEPTH 1 |
| 4328 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_THRESH_SLC 63:0 |
| 4329 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_THRESH_INT_SLC 63:0 |
| 4330 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_THRESH_POSITION 0 |
| 4331 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_THRESH_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_acknak_thresh" |
| 4332 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_THRESH_LOW_ADDR_WIDTH 0 |
| 4333 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_THRESH_ADDR_RANGE 26:0 |
| 4334 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_THRESH_READ_MASK 64'b0000000000000000000000000000000000000000000000001111111111111111 |
| 4335 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_THRESH_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4336 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_THRESH_WRITE_MASK 64'b0000000000000000000000000000000000000000000000001111111111111111 |
| 4337 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_THRESH_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4338 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_THRESH_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4339 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_THRESH_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4340 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_THRESH_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4341 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_THRESH_RMASK 64'b0000000000000000000000000000000000000000000000001111111111111111 |
| 4342 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_THRESH_RESERVED_BIT_MASK 64'b1111111111111111111111111111111111111111111111110000000000000000 |
| 4343 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_THRESH_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4344 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_THRESH_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000001000011 |
| 4345 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_THRESH_INTERNAL_REG 1 |
| 4346 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_THRESH_ALIASED_FROM 0 |
| 4347 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_THRESH_ZERO_TIME_OMNI 1 |
| 4348 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_THRESH_HW_ACC_JTAG_RD 1 |
| 4349 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_THRESH_HW_ACC_JTAG_WR 1 |
| 4350 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_THRESH_HW_ACC_PIO_SLOW_RD 1 |
| 4351 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_THRESH_HW_ACC_PIO_SLOW_WR 1 |
| 4352 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_THRESH_HW_ACC_PIO_MED_RD 1 |
| 4353 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_THRESH_HW_ACC_PIO_MED_WR 1 |
| 4354 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_THRESH_HW_ACC_PIO_FAST_RD 1 |
| 4355 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_THRESH_HW_ACC_PIO_FAST_WR 1 |
| 4356 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_THRESH_NUM_FIELDS 1 |
| 4357 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_THRESH_ACK_NAK_THR_FID 0 |
| 4358 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_THRESH_ACK_NAK_THR_SLC 15:0 |
| 4359 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_THRESH_ACK_NAK_THR_WIDTH 16 |
| 4360 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_THRESH_ACK_NAK_THR_INT_SLC 15:0 |
| 4361 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_THRESH_ACK_NAK_THR_POSITION 0 |
| 4362 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_THRESH_ACK_NAK_THR_FMASK 64'b0000000000000000000000000000000000000000000000001111111111111111 |
| 4363 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_THRESH_ACK_NAK_THR_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4364 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_THRESH_ACK_NAK_THR_POR_VALUE 16'b0000000001000011 |
| 4365 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_THRESH_ACK_NAK_THR_FIELD_NAME "ack_nak_thr" |
| 4366 | |
| 4367 | //------------------------------------------------------- |
| 4368 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_TIMER |
| 4369 | //------------------------------------------------------- |
| 4370 | |
| 4371 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_TIMER_HW_ADDR 27'b000000011111100010000000010 |
| 4372 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_TIMER_ADDR 30'b000000011111100010000000010000 |
| 4373 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_TIMER_NAME "fire_plc_tlu_ctb_tlr_csr_b_acknak_timer" |
| 4374 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_TIMER_WIDTH 64 |
| 4375 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_TIMER_DEPTH 1 |
| 4376 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_TIMER_SLC 63:0 |
| 4377 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_TIMER_INT_SLC 63:0 |
| 4378 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_TIMER_POSITION 0 |
| 4379 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_TIMER_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_acknak_timer" |
| 4380 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_TIMER_LOW_ADDR_WIDTH 0 |
| 4381 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_TIMER_ADDR_RANGE 26:0 |
| 4382 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_TIMER_READ_MASK 64'b0000000000000000000000000000000000000000000000001111111111111111 |
| 4383 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_TIMER_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000001111111111111111 |
| 4384 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_TIMER_WRITE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4385 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_TIMER_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4386 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_TIMER_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4387 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_TIMER_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4388 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_TIMER_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4389 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_TIMER_RMASK 64'b0000000000000000000000000000000000000000000000001111111111111111 |
| 4390 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_TIMER_RESERVED_BIT_MASK 64'b1111111111111111111111111111111111111111111111110000000000000000 |
| 4391 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_TIMER_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000001111111111111111 |
| 4392 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_TIMER_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4393 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_TIMER_INTERNAL_REG 1 |
| 4394 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_TIMER_ALIASED_FROM 0 |
| 4395 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_TIMER_ZERO_TIME_OMNI 1 |
| 4396 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_TIMER_HW_ACC_JTAG_RD 1 |
| 4397 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_TIMER_HW_ACC_JTAG_WR 1 |
| 4398 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_TIMER_HW_ACC_PIO_SLOW_RD 1 |
| 4399 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_TIMER_HW_ACC_PIO_SLOW_WR 1 |
| 4400 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_TIMER_HW_ACC_PIO_MED_RD 1 |
| 4401 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_TIMER_HW_ACC_PIO_MED_WR 1 |
| 4402 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_TIMER_HW_ACC_PIO_FAST_RD 1 |
| 4403 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_TIMER_HW_ACC_PIO_FAST_WR 1 |
| 4404 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_TIMER_NUM_FIELDS 1 |
| 4405 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_TIMER_ACK_NAK_TMR_FID 0 |
| 4406 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_TIMER_ACK_NAK_TMR_SLC 15:0 |
| 4407 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_TIMER_ACK_NAK_TMR_WIDTH 16 |
| 4408 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_TIMER_ACK_NAK_TMR_INT_SLC 15:0 |
| 4409 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_TIMER_ACK_NAK_TMR_POSITION 0 |
| 4410 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_TIMER_ACK_NAK_TMR_FMASK 64'b0000000000000000000000000000000000000000000000001111111111111111 |
| 4411 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_TIMER_ACK_NAK_TMR_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000001111111111111111 |
| 4412 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_TIMER_ACK_NAK_TMR_POR_VALUE 16'b0000000000000000 |
| 4413 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_ACKNAK_TIMER_ACK_NAK_TMR_FIELD_NAME "ack_nak_tmr" |
| 4414 | |
| 4415 | //------------------------------------------------------- |
| 4416 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIM_THRESH |
| 4417 | //------------------------------------------------------- |
| 4418 | |
| 4419 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIM_THRESH_HW_ADDR 27'b000000011111100010000000011 |
| 4420 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIM_THRESH_ADDR 30'b000000011111100010000000011000 |
| 4421 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIM_THRESH_NAME "fire_plc_tlu_ctb_tlr_csr_b_replay_tim_thresh" |
| 4422 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIM_THRESH_WIDTH 64 |
| 4423 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIM_THRESH_DEPTH 1 |
| 4424 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIM_THRESH_SLC 63:0 |
| 4425 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIM_THRESH_INT_SLC 63:0 |
| 4426 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIM_THRESH_POSITION 0 |
| 4427 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIM_THRESH_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_replay_tim_thresh" |
| 4428 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIM_THRESH_LOW_ADDR_WIDTH 0 |
| 4429 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIM_THRESH_ADDR_RANGE 26:0 |
| 4430 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIM_THRESH_READ_MASK 64'b0000000000000000000000000000000000000000000000001111111111111111 |
| 4431 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIM_THRESH_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4432 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIM_THRESH_WRITE_MASK 64'b0000000000000000000000000000000000000000000000001111111111111111 |
| 4433 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIM_THRESH_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4434 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIM_THRESH_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4435 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIM_THRESH_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4436 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIM_THRESH_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4437 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIM_THRESH_RMASK 64'b0000000000000000000000000000000000000000000000001111111111111111 |
| 4438 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIM_THRESH_RESERVED_BIT_MASK 64'b1111111111111111111111111111111111111111111111110000000000000000 |
| 4439 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIM_THRESH_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4440 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIM_THRESH_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000011111100 |
| 4441 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIM_THRESH_INTERNAL_REG 1 |
| 4442 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIM_THRESH_ALIASED_FROM 0 |
| 4443 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIM_THRESH_ZERO_TIME_OMNI 1 |
| 4444 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIM_THRESH_HW_ACC_JTAG_RD 1 |
| 4445 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIM_THRESH_HW_ACC_JTAG_WR 1 |
| 4446 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIM_THRESH_HW_ACC_PIO_SLOW_RD 1 |
| 4447 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIM_THRESH_HW_ACC_PIO_SLOW_WR 1 |
| 4448 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIM_THRESH_HW_ACC_PIO_MED_RD 1 |
| 4449 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIM_THRESH_HW_ACC_PIO_MED_WR 1 |
| 4450 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIM_THRESH_HW_ACC_PIO_FAST_RD 1 |
| 4451 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIM_THRESH_HW_ACC_PIO_FAST_WR 1 |
| 4452 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIM_THRESH_NUM_FIELDS 1 |
| 4453 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIM_THRESH_RPLAY_TMR_THR_FID 0 |
| 4454 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIM_THRESH_RPLAY_TMR_THR_SLC 15:0 |
| 4455 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIM_THRESH_RPLAY_TMR_THR_WIDTH 16 |
| 4456 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIM_THRESH_RPLAY_TMR_THR_INT_SLC 15:0 |
| 4457 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIM_THRESH_RPLAY_TMR_THR_POSITION 0 |
| 4458 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIM_THRESH_RPLAY_TMR_THR_FMASK 64'b0000000000000000000000000000000000000000000000001111111111111111 |
| 4459 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIM_THRESH_RPLAY_TMR_THR_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4460 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIM_THRESH_RPLAY_TMR_THR_POR_VALUE 16'b0000000011111100 |
| 4461 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIM_THRESH_RPLAY_TMR_THR_FIELD_NAME "rplay_tmr_thr" |
| 4462 | |
| 4463 | //------------------------------------------------------- |
| 4464 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER |
| 4465 | //------------------------------------------------------- |
| 4466 | |
| 4467 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_HW_ADDR 27'b000000011111100010000000100 |
| 4468 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_ADDR 30'b000000011111100010000000100000 |
| 4469 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_NAME "fire_plc_tlu_ctb_tlr_csr_b_replay_timer" |
| 4470 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_WIDTH 64 |
| 4471 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_DEPTH 1 |
| 4472 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_SLC 63:0 |
| 4473 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_INT_SLC 63:0 |
| 4474 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_POSITION 0 |
| 4475 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_replay_timer" |
| 4476 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_LOW_ADDR_WIDTH 0 |
| 4477 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_ADDR_RANGE 26:0 |
| 4478 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_READ_MASK 64'b0000000000000000000000000000000000000000000000111111111111111111 |
| 4479 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000111111111111111111 |
| 4480 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_WRITE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4481 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4482 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4483 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4484 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4485 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_RMASK 64'b0000000000000000000000000000000000000000000000111111111111111111 |
| 4486 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_RESERVED_BIT_MASK 64'b1111111111111111111111111111111111111111111111000000000000000000 |
| 4487 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000111111111111111111 |
| 4488 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4489 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_INTERNAL_REG 1 |
| 4490 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_ALIASED_FROM 0 |
| 4491 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_ZERO_TIME_OMNI 1 |
| 4492 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_HW_ACC_JTAG_RD 1 |
| 4493 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_HW_ACC_JTAG_WR 1 |
| 4494 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_HW_ACC_PIO_SLOW_RD 1 |
| 4495 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_HW_ACC_PIO_SLOW_WR 1 |
| 4496 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_HW_ACC_PIO_MED_RD 1 |
| 4497 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_HW_ACC_PIO_MED_WR 1 |
| 4498 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_HW_ACC_PIO_FAST_RD 1 |
| 4499 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_HW_ACC_PIO_FAST_WR 1 |
| 4500 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_NUM_FIELDS 2 |
| 4501 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_REPLAY_NUM_FID 0 |
| 4502 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_REPLAY_NUM_SLC 17:16 |
| 4503 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_REPLAY_NUM_WIDTH 2 |
| 4504 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_REPLAY_NUM_INT_SLC 1:0 |
| 4505 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_REPLAY_NUM_POSITION 16 |
| 4506 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_REPLAY_NUM_FMASK 64'b0000000000000000000000000000000000000000000000110000000000000000 |
| 4507 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_REPLAY_NUM_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000110000000000000000 |
| 4508 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_REPLAY_NUM_POR_VALUE 2'b00 |
| 4509 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_REPLAY_NUM_FIELD_NAME "replay_num" |
| 4510 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_RPLAY_TMR_FID 1 |
| 4511 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_RPLAY_TMR_SLC 15:0 |
| 4512 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_RPLAY_TMR_WIDTH 16 |
| 4513 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_RPLAY_TMR_INT_SLC 15:0 |
| 4514 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_RPLAY_TMR_POSITION 0 |
| 4515 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_RPLAY_TMR_FMASK 64'b0000000000000000000000000000000000000000000000001111111111111111 |
| 4516 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_RPLAY_TMR_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000001111111111111111 |
| 4517 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_RPLAY_TMR_POR_VALUE 16'b0000000000000000 |
| 4518 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_REPLAY_TIMER_RPLAY_TMR_FIELD_NAME "rplay_tmr" |
| 4519 | |
| 4520 | //------------------------------------------------------- |
| 4521 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_VEN_DLLP_MSG |
| 4522 | //------------------------------------------------------- |
| 4523 | |
| 4524 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_VEN_DLLP_MSG_HW_ADDR 27'b000000011111100010000001000 |
| 4525 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_VEN_DLLP_MSG_ADDR 30'b000000011111100010000001000000 |
| 4526 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_VEN_DLLP_MSG_NAME "fire_plc_tlu_ctb_tlr_csr_b_ven_dllp_msg" |
| 4527 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_VEN_DLLP_MSG_WIDTH 64 |
| 4528 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_VEN_DLLP_MSG_DEPTH 1 |
| 4529 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_VEN_DLLP_MSG_SLC 63:0 |
| 4530 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_VEN_DLLP_MSG_INT_SLC 63:0 |
| 4531 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_VEN_DLLP_MSG_POSITION 0 |
| 4532 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_VEN_DLLP_MSG_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_ven_dllp_msg" |
| 4533 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_VEN_DLLP_MSG_LOW_ADDR_WIDTH 0 |
| 4534 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_VEN_DLLP_MSG_ADDR_RANGE 26:0 |
| 4535 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_VEN_DLLP_MSG_READ_MASK 64'b0000000000000000000000000000000011111111111111111111111111111111 |
| 4536 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_VEN_DLLP_MSG_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4537 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_VEN_DLLP_MSG_WRITE_MASK 64'b0000000000000000000000000000000011111111111111111111111111111111 |
| 4538 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_VEN_DLLP_MSG_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4539 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_VEN_DLLP_MSG_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4540 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_VEN_DLLP_MSG_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4541 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_VEN_DLLP_MSG_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4542 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_VEN_DLLP_MSG_RMASK 64'b0000000000000000000000000000000011111111111111111111111111111111 |
| 4543 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_VEN_DLLP_MSG_RESERVED_BIT_MASK 64'b1111111111111111111111111111111100000000000000000000000000000000 |
| 4544 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_VEN_DLLP_MSG_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4545 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_VEN_DLLP_MSG_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4546 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_VEN_DLLP_MSG_INTERNAL_REG 1 |
| 4547 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_VEN_DLLP_MSG_ALIASED_FROM 0 |
| 4548 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_VEN_DLLP_MSG_ZERO_TIME_OMNI 1 |
| 4549 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_VEN_DLLP_MSG_HW_ACC_JTAG_RD 1 |
| 4550 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_VEN_DLLP_MSG_HW_ACC_JTAG_WR 1 |
| 4551 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_VEN_DLLP_MSG_HW_ACC_PIO_SLOW_RD 1 |
| 4552 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_VEN_DLLP_MSG_HW_ACC_PIO_SLOW_WR 1 |
| 4553 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_VEN_DLLP_MSG_HW_ACC_PIO_MED_RD 1 |
| 4554 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_VEN_DLLP_MSG_HW_ACC_PIO_MED_WR 1 |
| 4555 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_VEN_DLLP_MSG_HW_ACC_PIO_FAST_RD 1 |
| 4556 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_VEN_DLLP_MSG_HW_ACC_PIO_FAST_WR 1 |
| 4557 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_VEN_DLLP_MSG_NUM_FIELDS 1 |
| 4558 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_VEN_DLLP_MSG_V_MESSAGE_FID 0 |
| 4559 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_VEN_DLLP_MSG_V_MESSAGE_SLC 31:0 |
| 4560 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_VEN_DLLP_MSG_V_MESSAGE_WIDTH 32 |
| 4561 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_VEN_DLLP_MSG_V_MESSAGE_INT_SLC 31:0 |
| 4562 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_VEN_DLLP_MSG_V_MESSAGE_POSITION 0 |
| 4563 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_VEN_DLLP_MSG_V_MESSAGE_FMASK 64'b0000000000000000000000000000000011111111111111111111111111111111 |
| 4564 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_VEN_DLLP_MSG_V_MESSAGE_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4565 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_VEN_DLLP_MSG_V_MESSAGE_POR_VALUE 32'b00000000000000000000000000000000 |
| 4566 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_VEN_DLLP_MSG_V_MESSAGE_FIELD_NAME "v_message" |
| 4567 | |
| 4568 | //------------------------------------------------------- |
| 4569 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM |
| 4570 | //------------------------------------------------------- |
| 4571 | |
| 4572 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_HW_ADDR 27'b000000011111100010000001010 |
| 4573 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_ADDR 30'b000000011111100010000001010000 |
| 4574 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_NAME "fire_plc_tlu_ctb_tlr_csr_b_force_ltssm" |
| 4575 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_WIDTH 64 |
| 4576 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_DEPTH 1 |
| 4577 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_SLC 63:0 |
| 4578 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_INT_SLC 63:0 |
| 4579 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_POSITION 0 |
| 4580 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_force_ltssm" |
| 4581 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_LOW_ADDR_WIDTH 0 |
| 4582 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_ADDR_RANGE 26:0 |
| 4583 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_READ_MASK 64'b0000000000000000000000000000000000000000000000000000000100011111 |
| 4584 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4585 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_WRITE_MASK 64'b0000000000000000000000000000000000000000000000000000000100011111 |
| 4586 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4587 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4588 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4589 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4590 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_RMASK 64'b0000000000000000000000000000000000000000000000000000000100011111 |
| 4591 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_RESERVED_BIT_MASK 64'b1111111111111111111111111111111111111111111111111111111011100000 |
| 4592 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4593 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4594 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_INTERNAL_REG 1 |
| 4595 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_ALIASED_FROM 0 |
| 4596 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_ZERO_TIME_OMNI 1 |
| 4597 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_HW_ACC_JTAG_RD 1 |
| 4598 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_HW_ACC_JTAG_WR 1 |
| 4599 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_HW_ACC_PIO_SLOW_RD 1 |
| 4600 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_HW_ACC_PIO_SLOW_WR 1 |
| 4601 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_HW_ACC_PIO_MED_RD 1 |
| 4602 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_HW_ACC_PIO_MED_WR 1 |
| 4603 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_HW_ACC_PIO_FAST_RD 1 |
| 4604 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_HW_ACC_PIO_FAST_WR 1 |
| 4605 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_NUM_FIELDS 2 |
| 4606 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_FORCE_EN_FID 0 |
| 4607 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_FORCE_EN_SLC 8:8 |
| 4608 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_FORCE_EN_WIDTH 1 |
| 4609 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_FORCE_EN_INT_SLC 0:0 |
| 4610 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_FORCE_EN_POSITION 8 |
| 4611 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_FORCE_EN_FMASK 64'b0000000000000000000000000000000000000000000000000000000100000000 |
| 4612 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_FORCE_EN_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4613 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_FORCE_EN_POR_VALUE 1'b0 |
| 4614 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_FORCE_EN_FIELD_NAME "force_en" |
| 4615 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_FORCED_LTSSM_FID 1 |
| 4616 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_FORCED_LTSSM_SLC 4:0 |
| 4617 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_FORCED_LTSSM_WIDTH 5 |
| 4618 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_FORCED_LTSSM_INT_SLC 4:0 |
| 4619 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_FORCED_LTSSM_POSITION 0 |
| 4620 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_FORCED_LTSSM_FMASK 64'b0000000000000000000000000000000000000000000000000000000000011111 |
| 4621 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_FORCED_LTSSM_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4622 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_FORCED_LTSSM_POR_VALUE 5'b00000 |
| 4623 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_FORCE_LTSSM_FORCED_LTSSM_FIELD_NAME "forced_ltssm" |
| 4624 | |
| 4625 | //------------------------------------------------------- |
| 4626 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG |
| 4627 | //------------------------------------------------------- |
| 4628 | |
| 4629 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_HW_ADDR 27'b000000011111100010000001011 |
| 4630 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_ADDR 30'b000000011111100010000001011000 |
| 4631 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_NAME "fire_plc_tlu_ctb_tlr_csr_b_link_cfg" |
| 4632 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_WIDTH 64 |
| 4633 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_DEPTH 1 |
| 4634 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_SLC 63:0 |
| 4635 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_INT_SLC 63:0 |
| 4636 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_POSITION 0 |
| 4637 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_link_cfg" |
| 4638 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_LOW_ADDR_WIDTH 0 |
| 4639 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_ADDR_RANGE 26:0 |
| 4640 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_READ_MASK 64'b0000000000000000000000000000000000000000000000001111111100011111 |
| 4641 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4642 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_WRITE_MASK 64'b0000000000000000000000000000000000000000000000001111111100011111 |
| 4643 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4644 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4645 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4646 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4647 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_RMASK 64'b0000000000000000000000000000000000000000000000001111111100011111 |
| 4648 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_RESERVED_BIT_MASK 64'b1111111111111111111111111111111111111111111111110000000011100000 |
| 4649 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4650 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000100000001 |
| 4651 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_INTERNAL_REG 1 |
| 4652 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_ALIASED_FROM 0 |
| 4653 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_ZERO_TIME_OMNI 1 |
| 4654 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_HW_ACC_JTAG_RD 1 |
| 4655 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_HW_ACC_JTAG_WR 1 |
| 4656 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_HW_ACC_PIO_SLOW_RD 1 |
| 4657 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_HW_ACC_PIO_SLOW_WR 1 |
| 4658 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_HW_ACC_PIO_MED_RD 1 |
| 4659 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_HW_ACC_PIO_MED_WR 1 |
| 4660 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_HW_ACC_PIO_FAST_RD 1 |
| 4661 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_HW_ACC_PIO_FAST_WR 1 |
| 4662 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_NUM_FIELDS 6 |
| 4663 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_ACK_FREQ_FID 0 |
| 4664 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_ACK_FREQ_SLC 15:8 |
| 4665 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_ACK_FREQ_WIDTH 8 |
| 4666 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_ACK_FREQ_INT_SLC 7:0 |
| 4667 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_ACK_FREQ_POSITION 8 |
| 4668 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_ACK_FREQ_FMASK 64'b0000000000000000000000000000000000000000000000001111111100000000 |
| 4669 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_ACK_FREQ_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4670 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_ACK_FREQ_POR_VALUE 8'b00000001 |
| 4671 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_ACK_FREQ_FIELD_NAME "ack_freq" |
| 4672 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_FLOW_CONTROL_DISABLE_FID 1 |
| 4673 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_FLOW_CONTROL_DISABLE_SLC 4:4 |
| 4674 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_FLOW_CONTROL_DISABLE_WIDTH 1 |
| 4675 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_FLOW_CONTROL_DISABLE_INT_SLC 0:0 |
| 4676 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_FLOW_CONTROL_DISABLE_POSITION 4 |
| 4677 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_FLOW_CONTROL_DISABLE_FMASK 64'b0000000000000000000000000000000000000000000000000000000000010000 |
| 4678 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_FLOW_CONTROL_DISABLE_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4679 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_FLOW_CONTROL_DISABLE_POR_VALUE 1'b0 |
| 4680 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_FLOW_CONTROL_DISABLE_FIELD_NAME "flow_control_disable" |
| 4681 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_SPARE_FID 2 |
| 4682 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_SPARE_SLC 3:3 |
| 4683 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_SPARE_WIDTH 1 |
| 4684 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_SPARE_INT_SLC 0:0 |
| 4685 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_SPARE_POSITION 3 |
| 4686 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_SPARE_FMASK 64'b0000000000000000000000000000000000000000000000000000000000001000 |
| 4687 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_SPARE_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4688 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_SPARE_POR_VALUE 1'b0 |
| 4689 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_SPARE_FIELD_NAME "spare" |
| 4690 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_OTHER_MESSAGE_REQUEST_FID 3 |
| 4691 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_OTHER_MESSAGE_REQUEST_SLC 2:2 |
| 4692 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_OTHER_MESSAGE_REQUEST_WIDTH 1 |
| 4693 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_OTHER_MESSAGE_REQUEST_INT_SLC 0:0 |
| 4694 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_OTHER_MESSAGE_REQUEST_POSITION 2 |
| 4695 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_OTHER_MESSAGE_REQUEST_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000100 |
| 4696 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_OTHER_MESSAGE_REQUEST_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4697 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_OTHER_MESSAGE_REQUEST_POR_VALUE 1'b0 |
| 4698 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_OTHER_MESSAGE_REQUEST_FIELD_NAME "other_message_request" |
| 4699 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_ACK_NAK_DISABLE_FID 4 |
| 4700 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_ACK_NAK_DISABLE_SLC 1:1 |
| 4701 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_ACK_NAK_DISABLE_WIDTH 1 |
| 4702 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_ACK_NAK_DISABLE_INT_SLC 0:0 |
| 4703 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_ACK_NAK_DISABLE_POSITION 1 |
| 4704 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_ACK_NAK_DISABLE_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000010 |
| 4705 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_ACK_NAK_DISABLE_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4706 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_ACK_NAK_DISABLE_POR_VALUE 1'b0 |
| 4707 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_ACK_NAK_DISABLE_FIELD_NAME "ack_nak_disable" |
| 4708 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_DATA_LINK_ENABLE_FID 5 |
| 4709 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_DATA_LINK_ENABLE_SLC 0:0 |
| 4710 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_DATA_LINK_ENABLE_WIDTH 1 |
| 4711 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_DATA_LINK_ENABLE_INT_SLC 0:0 |
| 4712 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_DATA_LINK_ENABLE_POSITION 0 |
| 4713 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_DATA_LINK_ENABLE_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000001 |
| 4714 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_DATA_LINK_ENABLE_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4715 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_DATA_LINK_ENABLE_POR_VALUE 1'b1 |
| 4716 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CFG_DATA_LINK_ENABLE_FIELD_NAME "data_link_enable" |
| 4717 | |
| 4718 | //------------------------------------------------------- |
| 4719 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL |
| 4720 | //------------------------------------------------------- |
| 4721 | |
| 4722 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_HW_ADDR 27'b000000011111100010000001100 |
| 4723 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_ADDR 30'b000000011111100010000001100000 |
| 4724 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_NAME "fire_plc_tlu_ctb_tlr_csr_b_link_ctl" |
| 4725 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_WIDTH 64 |
| 4726 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_DEPTH 1 |
| 4727 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_SLC 63:0 |
| 4728 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_INT_SLC 63:0 |
| 4729 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_POSITION 0 |
| 4730 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_link_ctl" |
| 4731 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_LOW_ADDR_WIDTH 0 |
| 4732 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_ADDR_RANGE 26:0 |
| 4733 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_READ_MASK 64'b0000000000000000000000000000000011111111111111110011111100011111 |
| 4734 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4735 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_WRITE_MASK 64'b0000000000000000000000000000000011111111111111110011111100011110 |
| 4736 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4737 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000001 |
| 4738 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4739 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4740 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_RMASK 64'b0000000000000000000000000000000011111111111111110011111100011111 |
| 4741 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_RESERVED_BIT_MASK 64'b1111111111111111111111111111111100000000000000001100000011100000 |
| 4742 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000001 |
| 4743 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_POR_VALUE 64'b0000000000000000000000000000000000000000000110110000100000000000 |
| 4744 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_INTERNAL_REG 1 |
| 4745 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_ALIASED_FROM 0 |
| 4746 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_ZERO_TIME_OMNI 1 |
| 4747 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_HW_ACC_JTAG_RD 1 |
| 4748 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_HW_ACC_JTAG_WR 1 |
| 4749 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_HW_ACC_PIO_SLOW_RD 1 |
| 4750 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_HW_ACC_PIO_SLOW_WR 1 |
| 4751 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_HW_ACC_PIO_MED_RD 1 |
| 4752 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_HW_ACC_PIO_MED_WR 1 |
| 4753 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_HW_ACC_PIO_FAST_RD 1 |
| 4754 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_HW_ACC_PIO_FAST_WR 1 |
| 4755 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_NUM_FIELDS 9 |
| 4756 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_LINK_NUM_FID 0 |
| 4757 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_LINK_NUM_SLC 31:24 |
| 4758 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_LINK_NUM_WIDTH 8 |
| 4759 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_LINK_NUM_INT_SLC 7:0 |
| 4760 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_LINK_NUM_POSITION 24 |
| 4761 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_LINK_NUM_FMASK 64'b0000000000000000000000000000000011111111000000000000000000000000 |
| 4762 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_LINK_NUM_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4763 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_LINK_NUM_POR_VALUE 8'b00000000 |
| 4764 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_LINK_NUM_FIELD_NAME "link_num" |
| 4765 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_N_FTS_FID 1 |
| 4766 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_N_FTS_SLC 23:16 |
| 4767 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_N_FTS_WIDTH 8 |
| 4768 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_N_FTS_INT_SLC 7:0 |
| 4769 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_N_FTS_POSITION 16 |
| 4770 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_N_FTS_FMASK 64'b0000000000000000000000000000000000000000111111110000000000000000 |
| 4771 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_N_FTS_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4772 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_N_FTS_POR_VALUE 8'b00011011 |
| 4773 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_N_FTS_FIELD_NAME "n_fts" |
| 4774 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_SPARE_FID 2 |
| 4775 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_SPARE_SLC 13:12 |
| 4776 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_SPARE_WIDTH 2 |
| 4777 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_SPARE_INT_SLC 1:0 |
| 4778 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_SPARE_POSITION 12 |
| 4779 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_SPARE_FMASK 64'b0000000000000000000000000000000000000000000000000011000000000000 |
| 4780 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_SPARE_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4781 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_SPARE_POR_VALUE 2'b00 |
| 4782 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_SPARE_FIELD_NAME "spare" |
| 4783 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_LINK_CAPABLE_FID 3 |
| 4784 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_LINK_CAPABLE_SLC 11:8 |
| 4785 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_LINK_CAPABLE_WIDTH 4 |
| 4786 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_LINK_CAPABLE_INT_SLC 3:0 |
| 4787 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_LINK_CAPABLE_POSITION 8 |
| 4788 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_LINK_CAPABLE_FMASK 64'b0000000000000000000000000000000000000000000000000000111100000000 |
| 4789 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_LINK_CAPABLE_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4790 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_LINK_CAPABLE_POR_VALUE 4'b1000 |
| 4791 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_LINK_CAPABLE_FIELD_NAME "link_capable" |
| 4792 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_FAST_LINK_MODE_FID 4 |
| 4793 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_FAST_LINK_MODE_SLC 4:4 |
| 4794 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_FAST_LINK_MODE_WIDTH 1 |
| 4795 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_FAST_LINK_MODE_INT_SLC 0:0 |
| 4796 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_FAST_LINK_MODE_POSITION 4 |
| 4797 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_FAST_LINK_MODE_FMASK 64'b0000000000000000000000000000000000000000000000000000000000010000 |
| 4798 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_FAST_LINK_MODE_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4799 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_FAST_LINK_MODE_POR_VALUE 1'b0 |
| 4800 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_FAST_LINK_MODE_FIELD_NAME "fast_link_mode" |
| 4801 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_RX_HIGH_IMP_DIS_FID 5 |
| 4802 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_RX_HIGH_IMP_DIS_SLC 3:3 |
| 4803 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_RX_HIGH_IMP_DIS_WIDTH 1 |
| 4804 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_RX_HIGH_IMP_DIS_INT_SLC 0:0 |
| 4805 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_RX_HIGH_IMP_DIS_POSITION 3 |
| 4806 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_RX_HIGH_IMP_DIS_FMASK 64'b0000000000000000000000000000000000000000000000000000000000001000 |
| 4807 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_RX_HIGH_IMP_DIS_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4808 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_RX_HIGH_IMP_DIS_POR_VALUE 1'b0 |
| 4809 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_RX_HIGH_IMP_DIS_FIELD_NAME "rx_high_imp_dis" |
| 4810 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_ELASTICAL_BUFFER_DISABLE_FID 6 |
| 4811 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_ELASTICAL_BUFFER_DISABLE_SLC 2:2 |
| 4812 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_ELASTICAL_BUFFER_DISABLE_WIDTH 1 |
| 4813 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_ELASTICAL_BUFFER_DISABLE_INT_SLC 0:0 |
| 4814 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_ELASTICAL_BUFFER_DISABLE_POSITION 2 |
| 4815 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_ELASTICAL_BUFFER_DISABLE_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000100 |
| 4816 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_ELASTICAL_BUFFER_DISABLE_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4817 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_ELASTICAL_BUFFER_DISABLE_POR_VALUE 1'b0 |
| 4818 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_ELASTICAL_BUFFER_DISABLE_FIELD_NAME "elastical_buffer_disable" |
| 4819 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_SCRAMBLE_DISABLE_FID 7 |
| 4820 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_SCRAMBLE_DISABLE_SLC 1:1 |
| 4821 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_SCRAMBLE_DISABLE_WIDTH 1 |
| 4822 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_SCRAMBLE_DISABLE_INT_SLC 0:0 |
| 4823 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_SCRAMBLE_DISABLE_POSITION 1 |
| 4824 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_SCRAMBLE_DISABLE_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000010 |
| 4825 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_SCRAMBLE_DISABLE_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4826 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_SCRAMBLE_DISABLE_POR_VALUE 1'b0 |
| 4827 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_SCRAMBLE_DISABLE_FIELD_NAME "scramble_disable" |
| 4828 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_RESET_ASSERT_FID 8 |
| 4829 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_RESET_ASSERT_SLC 0:0 |
| 4830 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_RESET_ASSERT_WIDTH 1 |
| 4831 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_RESET_ASSERT_INT_SLC 0:0 |
| 4832 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_RESET_ASSERT_POSITION 0 |
| 4833 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_RESET_ASSERT_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000001 |
| 4834 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_RESET_ASSERT_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000001 |
| 4835 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_RESET_ASSERT_POR_VALUE 1'b0 |
| 4836 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LINK_CTL_RESET_ASSERT_FIELD_NAME "reset_assert" |
| 4837 | |
| 4838 | //------------------------------------------------------- |
| 4839 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW |
| 4840 | //------------------------------------------------------- |
| 4841 | |
| 4842 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_HW_ADDR 27'b000000011111100010000001101 |
| 4843 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_ADDR 30'b000000011111100010000001101000 |
| 4844 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_NAME "fire_plc_tlu_ctb_tlr_csr_b_lane_skew" |
| 4845 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_WIDTH 64 |
| 4846 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_DEPTH 1 |
| 4847 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_SLC 63:0 |
| 4848 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_INT_SLC 63:0 |
| 4849 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_POSITION 0 |
| 4850 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_lane_skew" |
| 4851 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LOW_ADDR_WIDTH 0 |
| 4852 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_ADDR_RANGE 26:0 |
| 4853 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_READ_MASK 64'b0000000000000000000000000000000000000011111111111111111111111111 |
| 4854 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4855 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_WRITE_MASK 64'b0000000000000000000000000000000000000011111111111111111111111111 |
| 4856 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4857 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4858 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4859 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4860 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_RMASK 64'b0000000000000000000000000000000000000011111111111111111111111111 |
| 4861 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_RESERVED_BIT_MASK 64'b1111111111111111111111111111111111111100000000000000000000000000 |
| 4862 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4863 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4864 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_INTERNAL_REG 1 |
| 4865 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_ALIASED_FROM 0 |
| 4866 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_ZERO_TIME_OMNI 1 |
| 4867 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_HW_ACC_JTAG_RD 1 |
| 4868 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_HW_ACC_JTAG_WR 1 |
| 4869 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_HW_ACC_PIO_SLOW_RD 1 |
| 4870 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_HW_ACC_PIO_SLOW_WR 1 |
| 4871 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_HW_ACC_PIO_MED_RD 1 |
| 4872 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_HW_ACC_PIO_MED_WR 1 |
| 4873 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_HW_ACC_PIO_FAST_RD 1 |
| 4874 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_HW_ACC_PIO_FAST_WR 1 |
| 4875 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_NUM_FIELDS 12 |
| 4876 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_DESKEW_DISABLE_FID 0 |
| 4877 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_DESKEW_DISABLE_SLC 25:25 |
| 4878 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_DESKEW_DISABLE_WIDTH 1 |
| 4879 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_DESKEW_DISABLE_INT_SLC 0:0 |
| 4880 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_DESKEW_DISABLE_POSITION 25 |
| 4881 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_DESKEW_DISABLE_FMASK 64'b0000000000000000000000000000000000000010000000000000000000000000 |
| 4882 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_DESKEW_DISABLE_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4883 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_DESKEW_DISABLE_POR_VALUE 1'b0 |
| 4884 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_DESKEW_DISABLE_FIELD_NAME "deskew_disable" |
| 4885 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_SPARE_FID 1 |
| 4886 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_SPARE_SLC 24:24 |
| 4887 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_SPARE_WIDTH 1 |
| 4888 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_SPARE_INT_SLC 0:0 |
| 4889 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_SPARE_POSITION 24 |
| 4890 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_SPARE_FMASK 64'b0000000000000000000000000000000000000001000000000000000000000000 |
| 4891 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_SPARE_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4892 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_SPARE_POR_VALUE 1'b0 |
| 4893 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_SPARE_FIELD_NAME "spare" |
| 4894 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_SPARE2_FID 2 |
| 4895 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_SPARE2_SLC 23:9 |
| 4896 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_SPARE2_WIDTH 15 |
| 4897 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_SPARE2_INT_SLC 14:0 |
| 4898 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_SPARE2_POSITION 9 |
| 4899 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_SPARE2_FMASK 64'b0000000000000000000000000000000000000000111111111111111000000000 |
| 4900 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_SPARE2_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4901 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_SPARE2_POR_VALUE 15'b000000000000000 |
| 4902 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_SPARE2_FIELD_NAME "Spare2" |
| 4903 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_FORCE_RCV_PRESENT_EN_FID 3 |
| 4904 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_FORCE_RCV_PRESENT_EN_SLC 8:8 |
| 4905 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_FORCE_RCV_PRESENT_EN_WIDTH 1 |
| 4906 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_FORCE_RCV_PRESENT_EN_INT_SLC 0:0 |
| 4907 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_FORCE_RCV_PRESENT_EN_POSITION 8 |
| 4908 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_FORCE_RCV_PRESENT_EN_FMASK 64'b0000000000000000000000000000000000000000000000000000000100000000 |
| 4909 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_FORCE_RCV_PRESENT_EN_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4910 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_FORCE_RCV_PRESENT_EN_POR_VALUE 1'b0 |
| 4911 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_FORCE_RCV_PRESENT_EN_FIELD_NAME "Force_rcv_present_en" |
| 4912 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_7_RCV_PRESENT_FID 4 |
| 4913 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_7_RCV_PRESENT_SLC 7:7 |
| 4914 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_7_RCV_PRESENT_WIDTH 1 |
| 4915 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_7_RCV_PRESENT_INT_SLC 0:0 |
| 4916 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_7_RCV_PRESENT_POSITION 7 |
| 4917 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_7_RCV_PRESENT_FMASK 64'b0000000000000000000000000000000000000000000000000000000010000000 |
| 4918 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_7_RCV_PRESENT_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4919 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_7_RCV_PRESENT_POR_VALUE 1'b0 |
| 4920 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_7_RCV_PRESENT_FIELD_NAME "ln_7_rcv_present" |
| 4921 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_6_RCV_PRESENT_FID 5 |
| 4922 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_6_RCV_PRESENT_SLC 6:6 |
| 4923 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_6_RCV_PRESENT_WIDTH 1 |
| 4924 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_6_RCV_PRESENT_INT_SLC 0:0 |
| 4925 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_6_RCV_PRESENT_POSITION 6 |
| 4926 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_6_RCV_PRESENT_FMASK 64'b0000000000000000000000000000000000000000000000000000000001000000 |
| 4927 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_6_RCV_PRESENT_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4928 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_6_RCV_PRESENT_POR_VALUE 1'b0 |
| 4929 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_6_RCV_PRESENT_FIELD_NAME "ln_6_rcv_present" |
| 4930 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_5_RCV_PRESENT_FID 6 |
| 4931 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_5_RCV_PRESENT_SLC 5:5 |
| 4932 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_5_RCV_PRESENT_WIDTH 1 |
| 4933 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_5_RCV_PRESENT_INT_SLC 0:0 |
| 4934 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_5_RCV_PRESENT_POSITION 5 |
| 4935 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_5_RCV_PRESENT_FMASK 64'b0000000000000000000000000000000000000000000000000000000000100000 |
| 4936 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_5_RCV_PRESENT_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4937 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_5_RCV_PRESENT_POR_VALUE 1'b0 |
| 4938 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_5_RCV_PRESENT_FIELD_NAME "ln_5_rcv_present" |
| 4939 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_4_RCV_PRESENT_FID 7 |
| 4940 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_4_RCV_PRESENT_SLC 4:4 |
| 4941 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_4_RCV_PRESENT_WIDTH 1 |
| 4942 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_4_RCV_PRESENT_INT_SLC 0:0 |
| 4943 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_4_RCV_PRESENT_POSITION 4 |
| 4944 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_4_RCV_PRESENT_FMASK 64'b0000000000000000000000000000000000000000000000000000000000010000 |
| 4945 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_4_RCV_PRESENT_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4946 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_4_RCV_PRESENT_POR_VALUE 1'b0 |
| 4947 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_4_RCV_PRESENT_FIELD_NAME "ln_4_rcv_present" |
| 4948 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_3_RCV_PRESENT_FID 8 |
| 4949 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_3_RCV_PRESENT_SLC 3:3 |
| 4950 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_3_RCV_PRESENT_WIDTH 1 |
| 4951 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_3_RCV_PRESENT_INT_SLC 0:0 |
| 4952 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_3_RCV_PRESENT_POSITION 3 |
| 4953 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_3_RCV_PRESENT_FMASK 64'b0000000000000000000000000000000000000000000000000000000000001000 |
| 4954 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_3_RCV_PRESENT_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4955 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_3_RCV_PRESENT_POR_VALUE 1'b0 |
| 4956 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_3_RCV_PRESENT_FIELD_NAME "ln_3_rcv_present" |
| 4957 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_2_RCV_PRESENT_FID 9 |
| 4958 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_2_RCV_PRESENT_SLC 2:2 |
| 4959 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_2_RCV_PRESENT_WIDTH 1 |
| 4960 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_2_RCV_PRESENT_INT_SLC 0:0 |
| 4961 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_2_RCV_PRESENT_POSITION 2 |
| 4962 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_2_RCV_PRESENT_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000100 |
| 4963 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_2_RCV_PRESENT_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4964 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_2_RCV_PRESENT_POR_VALUE 1'b0 |
| 4965 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_2_RCV_PRESENT_FIELD_NAME "ln_2_rcv_present" |
| 4966 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_1_RCV_PRESENT_FID 10 |
| 4967 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_1_RCV_PRESENT_SLC 1:1 |
| 4968 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_1_RCV_PRESENT_WIDTH 1 |
| 4969 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_1_RCV_PRESENT_INT_SLC 0:0 |
| 4970 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_1_RCV_PRESENT_POSITION 1 |
| 4971 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_1_RCV_PRESENT_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000010 |
| 4972 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_1_RCV_PRESENT_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4973 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_1_RCV_PRESENT_POR_VALUE 1'b0 |
| 4974 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_1_RCV_PRESENT_FIELD_NAME "ln_1_rcv_present" |
| 4975 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_0_RCV_PRESENT_FID 11 |
| 4976 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_0_RCV_PRESENT_SLC 0:0 |
| 4977 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_0_RCV_PRESENT_WIDTH 1 |
| 4978 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_0_RCV_PRESENT_INT_SLC 0:0 |
| 4979 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_0_RCV_PRESENT_POSITION 0 |
| 4980 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_0_RCV_PRESENT_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000001 |
| 4981 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_0_RCV_PRESENT_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 4982 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_0_RCV_PRESENT_POR_VALUE 1'b0 |
| 4983 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LANE_SKEW_LN_0_RCV_PRESENT_FIELD_NAME "ln_0_rcv_present" |
| 4984 | |
| 4985 | //------------------------------------------------------- |
| 4986 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM |
| 4987 | //------------------------------------------------------- |
| 4988 | |
| 4989 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_HW_ADDR 27'b000000011111100010000001110 |
| 4990 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_ADDR 30'b000000011111100010000001110000 |
| 4991 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_NAME "fire_plc_tlu_ctb_tlr_csr_b_symbol_num" |
| 4992 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_WIDTH 64 |
| 4993 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_DEPTH 1 |
| 4994 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_SLC 63:0 |
| 4995 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_INT_SLC 63:0 |
| 4996 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_POSITION 0 |
| 4997 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_symbol_num" |
| 4998 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_LOW_ADDR_WIDTH 0 |
| 4999 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_ADDR_RANGE 26:0 |
| 5000 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_READ_MASK 64'b0000000000000000000000000000000000000000000000000111011111111111 |
| 5001 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5002 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_WRITE_MASK 64'b0000000000000000000000000000000000000000000000000111011111111111 |
| 5003 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5004 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5005 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5006 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5007 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_RMASK 64'b0000000000000000000000000000000000000000000000000111011111111111 |
| 5008 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_RESERVED_BIT_MASK 64'b1111111111111111111111111111111111111111111111111000100000000000 |
| 5009 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5010 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_POR_VALUE 64'b0000000000000000000000000000000000000000000000000011001110101010 |
| 5011 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_INTERNAL_REG 1 |
| 5012 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_ALIASED_FROM 0 |
| 5013 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_ZERO_TIME_OMNI 1 |
| 5014 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_HW_ACC_JTAG_RD 1 |
| 5015 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_HW_ACC_JTAG_WR 1 |
| 5016 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_HW_ACC_PIO_SLOW_RD 1 |
| 5017 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_HW_ACC_PIO_SLOW_WR 1 |
| 5018 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_HW_ACC_PIO_MED_RD 1 |
| 5019 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_HW_ACC_PIO_MED_WR 1 |
| 5020 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_HW_ACC_PIO_FAST_RD 1 |
| 5021 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_HW_ACC_PIO_FAST_WR 1 |
| 5022 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_NUM_FIELDS 4 |
| 5023 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_SPARE_FID 0 |
| 5024 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_SPARE_SLC 14:12 |
| 5025 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_SPARE_WIDTH 3 |
| 5026 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_SPARE_INT_SLC 2:0 |
| 5027 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_SPARE_POSITION 12 |
| 5028 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_SPARE_FMASK 64'b0000000000000000000000000000000000000000000000000111000000000000 |
| 5029 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_SPARE_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5030 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_SPARE_POR_VALUE 3'b011 |
| 5031 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_SPARE_FIELD_NAME "spare" |
| 5032 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_SKIP_SYMBOLS_FID 1 |
| 5033 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_SKIP_SYMBOLS_SLC 10:8 |
| 5034 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_SKIP_SYMBOLS_WIDTH 3 |
| 5035 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_SKIP_SYMBOLS_INT_SLC 2:0 |
| 5036 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_SKIP_SYMBOLS_POSITION 8 |
| 5037 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_SKIP_SYMBOLS_FMASK 64'b0000000000000000000000000000000000000000000000000000011100000000 |
| 5038 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_SKIP_SYMBOLS_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5039 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_SKIP_SYMBOLS_POR_VALUE 3'b011 |
| 5040 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_SKIP_SYMBOLS_FIELD_NAME "skip_symbols" |
| 5041 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_SPARE2_FID 2 |
| 5042 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_SPARE2_SLC 7:4 |
| 5043 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_SPARE2_WIDTH 4 |
| 5044 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_SPARE2_INT_SLC 3:0 |
| 5045 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_SPARE2_POSITION 4 |
| 5046 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_SPARE2_FMASK 64'b0000000000000000000000000000000000000000000000000000000011110000 |
| 5047 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_SPARE2_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5048 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_SPARE2_POR_VALUE 4'b1010 |
| 5049 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_SPARE2_FIELD_NAME "spare2" |
| 5050 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_TS1_SYMBOLS_FID 3 |
| 5051 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_TS1_SYMBOLS_SLC 3:0 |
| 5052 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_TS1_SYMBOLS_WIDTH 4 |
| 5053 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_TS1_SYMBOLS_INT_SLC 3:0 |
| 5054 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_TS1_SYMBOLS_POSITION 0 |
| 5055 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_TS1_SYMBOLS_FMASK 64'b0000000000000000000000000000000000000000000000000000000000001111 |
| 5056 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_TS1_SYMBOLS_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5057 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_TS1_SYMBOLS_POR_VALUE 4'b1010 |
| 5058 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_NUM_TS1_SYMBOLS_FIELD_NAME "ts1_symbols" |
| 5059 | |
| 5060 | //------------------------------------------------------- |
| 5061 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_TIMER |
| 5062 | //------------------------------------------------------- |
| 5063 | |
| 5064 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_TIMER_HW_ADDR 27'b000000011111100010000001111 |
| 5065 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_TIMER_ADDR 30'b000000011111100010000001111000 |
| 5066 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_TIMER_NAME "fire_plc_tlu_ctb_tlr_csr_b_symbol_timer" |
| 5067 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_TIMER_WIDTH 64 |
| 5068 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_TIMER_DEPTH 1 |
| 5069 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_TIMER_SLC 63:0 |
| 5070 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_TIMER_INT_SLC 63:0 |
| 5071 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_TIMER_POSITION 0 |
| 5072 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_TIMER_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_symbol_timer" |
| 5073 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_TIMER_LOW_ADDR_WIDTH 0 |
| 5074 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_TIMER_ADDR_RANGE 26:0 |
| 5075 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_TIMER_READ_MASK 64'b0000000000000000000000000000000000000000000000000000011111111111 |
| 5076 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_TIMER_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5077 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_TIMER_WRITE_MASK 64'b0000000000000000000000000000000000000000000000000000011111111111 |
| 5078 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_TIMER_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5079 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_TIMER_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5080 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_TIMER_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5081 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_TIMER_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5082 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_TIMER_RMASK 64'b0000000000000000000000000000000000000000000000000000011111111111 |
| 5083 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_TIMER_RESERVED_BIT_MASK 64'b1111111111111111111111111111111111111111111111111111100000000000 |
| 5084 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_TIMER_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5085 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_TIMER_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000010100000000 |
| 5086 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_TIMER_INTERNAL_REG 1 |
| 5087 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_TIMER_ALIASED_FROM 0 |
| 5088 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_TIMER_ZERO_TIME_OMNI 1 |
| 5089 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_TIMER_HW_ACC_JTAG_RD 1 |
| 5090 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_TIMER_HW_ACC_JTAG_WR 1 |
| 5091 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_TIMER_HW_ACC_PIO_SLOW_RD 1 |
| 5092 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_TIMER_HW_ACC_PIO_SLOW_WR 1 |
| 5093 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_TIMER_HW_ACC_PIO_MED_RD 1 |
| 5094 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_TIMER_HW_ACC_PIO_MED_WR 1 |
| 5095 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_TIMER_HW_ACC_PIO_FAST_RD 1 |
| 5096 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_TIMER_HW_ACC_PIO_FAST_WR 1 |
| 5097 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_TIMER_NUM_FIELDS 1 |
| 5098 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_TIMER_SKIP_INTERVAL_FID 0 |
| 5099 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_TIMER_SKIP_INTERVAL_SLC 10:0 |
| 5100 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_TIMER_SKIP_INTERVAL_WIDTH 11 |
| 5101 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_TIMER_SKIP_INTERVAL_INT_SLC 10:0 |
| 5102 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_TIMER_SKIP_INTERVAL_POSITION 0 |
| 5103 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_TIMER_SKIP_INTERVAL_FMASK 64'b0000000000000000000000000000000000000000000000000000011111111111 |
| 5104 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_TIMER_SKIP_INTERVAL_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5105 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_TIMER_SKIP_INTERVAL_POR_VALUE 11'b10100000000 |
| 5106 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SYMBOL_TIMER_SKIP_INTERVAL_FIELD_NAME "skip_interval" |
| 5107 | |
| 5108 | //------------------------------------------------------- |
| 5109 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS |
| 5110 | //------------------------------------------------------- |
| 5111 | |
| 5112 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_HW_ADDR 27'b000000011111100010000100000 |
| 5113 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_ADDR 30'b000000011111100010000100000000 |
| 5114 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_NAME "fire_plc_tlu_ctb_tlr_csr_b_core_status" |
| 5115 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_WIDTH 64 |
| 5116 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_DEPTH 1 |
| 5117 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_SLC 63:0 |
| 5118 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_INT_SLC 63:0 |
| 5119 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_POSITION 0 |
| 5120 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_core_status" |
| 5121 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_LOW_ADDR_WIDTH 0 |
| 5122 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_ADDR_RANGE 26:0 |
| 5123 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_READ_MASK 64'b0000011111110011111111111111111111111111111111111111111111111111 |
| 5124 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_READ_ONLY_MASK 64'b0000011111110011111111111111111111111111111111111111111111111111 |
| 5125 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_WRITE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5126 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5127 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5128 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5129 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5130 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RMASK 64'b0000011111110011111111111111111111111111111111111111111111111111 |
| 5131 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RESERVED_BIT_MASK 64'b1111100000001100000000000000000000000000000000000000000000000000 |
| 5132 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_HW_LD_MASK 64'b0000011111110011111111111111111111111111111111111111111111111111 |
| 5133 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5134 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_INTERNAL_REG 1 |
| 5135 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_ALIASED_FROM 0 |
| 5136 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_ZERO_TIME_OMNI 1 |
| 5137 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_HW_ACC_JTAG_RD 1 |
| 5138 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_HW_ACC_JTAG_WR 1 |
| 5139 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_HW_ACC_PIO_SLOW_RD 1 |
| 5140 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_HW_ACC_PIO_SLOW_WR 1 |
| 5141 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_HW_ACC_PIO_MED_RD 1 |
| 5142 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_HW_ACC_PIO_MED_WR 1 |
| 5143 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_HW_ACC_PIO_FAST_RD 1 |
| 5144 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_HW_ACC_PIO_FAST_WR 1 |
| 5145 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_NUM_FIELDS 14 |
| 5146 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_TX_LOS_STATE_FID 0 |
| 5147 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_TX_LOS_STATE_SLC 58:56 |
| 5148 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_TX_LOS_STATE_WIDTH 3 |
| 5149 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_TX_LOS_STATE_INT_SLC 2:0 |
| 5150 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_TX_LOS_STATE_POSITION 56 |
| 5151 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_TX_LOS_STATE_FMASK 64'b0000011100000000000000000000000000000000000000000000000000000000 |
| 5152 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_TX_LOS_STATE_HW_LD_MASK 64'b0000011100000000000000000000000000000000000000000000000000000000 |
| 5153 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_TX_LOS_STATE_POR_VALUE 3'b000 |
| 5154 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_TX_LOS_STATE_FIELD_NAME "tx_los_state" |
| 5155 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RV_LOS_STATE_FID 1 |
| 5156 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RV_LOS_STATE_SLC 55:54 |
| 5157 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RV_LOS_STATE_WIDTH 2 |
| 5158 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RV_LOS_STATE_INT_SLC 1:0 |
| 5159 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RV_LOS_STATE_POSITION 54 |
| 5160 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RV_LOS_STATE_FMASK 64'b0000000011000000000000000000000000000000000000000000000000000000 |
| 5161 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RV_LOS_STATE_HW_LD_MASK 64'b0000000011000000000000000000000000000000000000000000000000000000 |
| 5162 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RV_LOS_STATE_POR_VALUE 2'b00 |
| 5163 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RV_LOS_STATE_FIELD_NAME "rv_los_state" |
| 5164 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_INT_FCSM_STATE_FID 2 |
| 5165 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_INT_FCSM_STATE_SLC 53:52 |
| 5166 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_INT_FCSM_STATE_WIDTH 2 |
| 5167 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_INT_FCSM_STATE_INT_SLC 1:0 |
| 5168 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_INT_FCSM_STATE_POSITION 52 |
| 5169 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_INT_FCSM_STATE_FMASK 64'b0000000000110000000000000000000000000000000000000000000000000000 |
| 5170 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_INT_FCSM_STATE_HW_LD_MASK 64'b0000000000110000000000000000000000000000000000000000000000000000 |
| 5171 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_INT_FCSM_STATE_POR_VALUE 2'b00 |
| 5172 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_INT_FCSM_STATE_FIELD_NAME "int_fcsm_state" |
| 5173 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RBUF_NOT_EMPTY_FID 3 |
| 5174 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RBUF_NOT_EMPTY_SLC 49:49 |
| 5175 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RBUF_NOT_EMPTY_WIDTH 1 |
| 5176 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RBUF_NOT_EMPTY_INT_SLC 0:0 |
| 5177 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RBUF_NOT_EMPTY_POSITION 49 |
| 5178 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RBUF_NOT_EMPTY_FMASK 64'b0000000000000010000000000000000000000000000000000000000000000000 |
| 5179 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RBUF_NOT_EMPTY_HW_LD_MASK 64'b0000000000000010000000000000000000000000000000000000000000000000 |
| 5180 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RBUF_NOT_EMPTY_POR_VALUE 1'b0 |
| 5181 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RBUF_NOT_EMPTY_FIELD_NAME "rbuf_not_empty" |
| 5182 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_LTSSM_STATE_FID 4 |
| 5183 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_LTSSM_STATE_SLC 48:44 |
| 5184 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_LTSSM_STATE_WIDTH 5 |
| 5185 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_LTSSM_STATE_INT_SLC 4:0 |
| 5186 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_LTSSM_STATE_POSITION 44 |
| 5187 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_LTSSM_STATE_FMASK 64'b0000000000000001111100000000000000000000000000000000000000000000 |
| 5188 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_LTSSM_STATE_HW_LD_MASK 64'b0000000000000001111100000000000000000000000000000000000000000000 |
| 5189 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_LTSSM_STATE_POR_VALUE 5'b00000 |
| 5190 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_LTSSM_STATE_FIELD_NAME "ltssm_state" |
| 5191 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RCV_POLARITY_REV_FID 5 |
| 5192 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RCV_POLARITY_REV_SLC 43:36 |
| 5193 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RCV_POLARITY_REV_WIDTH 8 |
| 5194 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RCV_POLARITY_REV_INT_SLC 7:0 |
| 5195 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RCV_POLARITY_REV_POSITION 36 |
| 5196 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RCV_POLARITY_REV_FMASK 64'b0000000000000000000011111111000000000000000000000000000000000000 |
| 5197 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RCV_POLARITY_REV_HW_LD_MASK 64'b0000000000000000000011111111000000000000000000000000000000000000 |
| 5198 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RCV_POLARITY_REV_POR_VALUE 8'b00000000 |
| 5199 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RCV_POLARITY_REV_FIELD_NAME "rcv_polarity_rev" |
| 5200 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RCV_FTS_NUM_FID 6 |
| 5201 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RCV_FTS_NUM_SLC 35:28 |
| 5202 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RCV_FTS_NUM_WIDTH 8 |
| 5203 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RCV_FTS_NUM_INT_SLC 7:0 |
| 5204 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RCV_FTS_NUM_POSITION 28 |
| 5205 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RCV_FTS_NUM_FMASK 64'b0000000000000000000000000000111111110000000000000000000000000000 |
| 5206 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RCV_FTS_NUM_HW_LD_MASK 64'b0000000000000000000000000000111111110000000000000000000000000000 |
| 5207 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RCV_FTS_NUM_POR_VALUE 8'b00000000 |
| 5208 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RCV_FTS_NUM_FIELD_NAME "rcv_fts_num" |
| 5209 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RCV_LINK_NUM_FID 7 |
| 5210 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RCV_LINK_NUM_SLC 27:20 |
| 5211 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RCV_LINK_NUM_WIDTH 8 |
| 5212 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RCV_LINK_NUM_INT_SLC 7:0 |
| 5213 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RCV_LINK_NUM_POSITION 20 |
| 5214 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RCV_LINK_NUM_FMASK 64'b0000000000000000000000000000000000001111111100000000000000000000 |
| 5215 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RCV_LINK_NUM_HW_LD_MASK 64'b0000000000000000000000000000000000001111111100000000000000000000 |
| 5216 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RCV_LINK_NUM_POR_VALUE 8'b00000000 |
| 5217 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RCV_LINK_NUM_FIELD_NAME "rcv_link_num" |
| 5218 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_PCS_LOCK_STS_FID 8 |
| 5219 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_PCS_LOCK_STS_SLC 19:12 |
| 5220 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_PCS_LOCK_STS_WIDTH 8 |
| 5221 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_PCS_LOCK_STS_INT_SLC 7:0 |
| 5222 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_PCS_LOCK_STS_POSITION 12 |
| 5223 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_PCS_LOCK_STS_FMASK 64'b0000000000000000000000000000000000000000000011111111000000000000 |
| 5224 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_PCS_LOCK_STS_HW_LD_MASK 64'b0000000000000000000000000000000000000000000011111111000000000000 |
| 5225 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_PCS_LOCK_STS_POR_VALUE 8'b00000000 |
| 5226 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_PCS_LOCK_STS_FIELD_NAME "pcs_lock_sts" |
| 5227 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RCVR_DETECT_STS_FID 9 |
| 5228 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RCVR_DETECT_STS_SLC 11:4 |
| 5229 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RCVR_DETECT_STS_WIDTH 8 |
| 5230 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RCVR_DETECT_STS_INT_SLC 7:0 |
| 5231 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RCVR_DETECT_STS_POSITION 4 |
| 5232 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RCVR_DETECT_STS_FMASK 64'b0000000000000000000000000000000000000000000000000000111111110000 |
| 5233 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RCVR_DETECT_STS_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000111111110000 |
| 5234 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RCVR_DETECT_STS_POR_VALUE 8'b00000000 |
| 5235 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_RCVR_DETECT_STS_FIELD_NAME "rcvr_detect_sts" |
| 5236 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_PCS_LANE_REV_FID 10 |
| 5237 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_PCS_LANE_REV_SLC 3:3 |
| 5238 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_PCS_LANE_REV_WIDTH 1 |
| 5239 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_PCS_LANE_REV_INT_SLC 0:0 |
| 5240 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_PCS_LANE_REV_POSITION 3 |
| 5241 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_PCS_LANE_REV_FMASK 64'b0000000000000000000000000000000000000000000000000000000000001000 |
| 5242 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_PCS_LANE_REV_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000001000 |
| 5243 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_PCS_LANE_REV_POR_VALUE 1'b0 |
| 5244 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_PCS_LANE_REV_FIELD_NAME "pcs_lane_rev" |
| 5245 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_PCS_ALIGN_STS_FID 11 |
| 5246 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_PCS_ALIGN_STS_SLC 2:2 |
| 5247 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_PCS_ALIGN_STS_WIDTH 1 |
| 5248 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_PCS_ALIGN_STS_INT_SLC 0:0 |
| 5249 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_PCS_ALIGN_STS_POSITION 2 |
| 5250 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_PCS_ALIGN_STS_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000100 |
| 5251 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_PCS_ALIGN_STS_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000100 |
| 5252 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_PCS_ALIGN_STS_POR_VALUE 1'b0 |
| 5253 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_PCS_ALIGN_STS_FIELD_NAME "pcs_align_sts" |
| 5254 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_SDS_READY_1_FID 12 |
| 5255 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_SDS_READY_1_SLC 1:1 |
| 5256 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_SDS_READY_1_WIDTH 1 |
| 5257 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_SDS_READY_1_INT_SLC 0:0 |
| 5258 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_SDS_READY_1_POSITION 1 |
| 5259 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_SDS_READY_1_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000010 |
| 5260 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_SDS_READY_1_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000010 |
| 5261 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_SDS_READY_1_POR_VALUE 1'b0 |
| 5262 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_SDS_READY_1_FIELD_NAME "sds_ready_1" |
| 5263 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_SDS_READY_0_FID 13 |
| 5264 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_SDS_READY_0_SLC 0:0 |
| 5265 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_SDS_READY_0_WIDTH 1 |
| 5266 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_SDS_READY_0_INT_SLC 0:0 |
| 5267 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_SDS_READY_0_POSITION 0 |
| 5268 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_SDS_READY_0_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000001 |
| 5269 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_SDS_READY_0_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000001 |
| 5270 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_SDS_READY_0_POR_VALUE 1'b0 |
| 5271 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_CORE_STATUS_SDS_READY_0_FIELD_NAME "sds_ready_0" |
| 5272 | |
| 5273 | //------------------------------------------------------- |
| 5274 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN |
| 5275 | //------------------------------------------------------- |
| 5276 | |
| 5277 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_HW_ADDR 27'b000000011111100010000100001 |
| 5278 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_ADDR 30'b000000011111100010000100001000 |
| 5279 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_NAME "fire_plc_tlu_ctb_tlr_csr_b_event_err_log_en" |
| 5280 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_WIDTH 64 |
| 5281 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_DEPTH 1 |
| 5282 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_SLC 63:0 |
| 5283 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_INT_SLC 63:0 |
| 5284 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_POSITION 0 |
| 5285 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_event_err_log_en" |
| 5286 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_LOW_ADDR_WIDTH 0 |
| 5287 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_ADDR_RANGE 26:0 |
| 5288 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_READ_MASK 64'b0000000000000000000000000000000011111111000000111111111111111111 |
| 5289 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5290 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_WRITE_MASK 64'b0000000000000000000000000000000011111111000000111111111111111111 |
| 5291 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5292 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5293 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5294 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5295 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_RMASK 64'b0000000000000000000000000000000011111111000000111111111111111111 |
| 5296 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_RESERVED_BIT_MASK 64'b1111111111111111111111111111111100000000111111000000000000000000 |
| 5297 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5298 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_POR_VALUE 64'b0000000000000000000000000000000000001111000000111111111111111111 |
| 5299 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_INTERNAL_REG 1 |
| 5300 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_ALIASED_FROM 0 |
| 5301 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_ZERO_TIME_OMNI 1 |
| 5302 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_HW_ACC_JTAG_RD 1 |
| 5303 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_HW_ACC_JTAG_WR 1 |
| 5304 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_HW_ACC_PIO_SLOW_RD 1 |
| 5305 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_HW_ACC_PIO_SLOW_WR 1 |
| 5306 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_HW_ACC_PIO_MED_RD 1 |
| 5307 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_HW_ACC_PIO_MED_WR 1 |
| 5308 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_HW_ACC_PIO_FAST_RD 1 |
| 5309 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_HW_ACC_PIO_FAST_WR 1 |
| 5310 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_NUM_FIELDS 2 |
| 5311 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_EN_EVENT_FID 0 |
| 5312 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_EN_EVENT_SLC 31:24 |
| 5313 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_EN_EVENT_WIDTH 8 |
| 5314 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_EN_EVENT_INT_SLC 7:0 |
| 5315 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_EN_EVENT_POSITION 24 |
| 5316 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_EN_EVENT_FMASK 64'b0000000000000000000000000000000011111111000000000000000000000000 |
| 5317 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_EN_EVENT_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5318 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_EN_EVENT_POR_VALUE 8'b00001111 |
| 5319 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_EN_EVENT_FIELD_NAME "en_event" |
| 5320 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_EN_ERROR_FID 1 |
| 5321 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_EN_ERROR_SLC 17:0 |
| 5322 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_EN_ERROR_WIDTH 18 |
| 5323 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_EN_ERROR_INT_SLC 17:0 |
| 5324 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_EN_ERROR_POSITION 0 |
| 5325 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_EN_ERROR_FMASK 64'b0000000000000000000000000000000000000000000000111111111111111111 |
| 5326 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_EN_ERROR_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5327 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_EN_ERROR_POR_VALUE 18'b111111111111111111 |
| 5328 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_LOG_EN_EN_ERROR_FIELD_NAME "en_error" |
| 5329 | |
| 5330 | //------------------------------------------------------- |
| 5331 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN |
| 5332 | //------------------------------------------------------- |
| 5333 | |
| 5334 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_HW_ADDR 27'b000000011111100010000100010 |
| 5335 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_ADDR 30'b000000011111100010000100010000 |
| 5336 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_NAME "fire_plc_tlu_ctb_tlr_csr_b_event_err_int_en" |
| 5337 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_WIDTH 64 |
| 5338 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_DEPTH 1 |
| 5339 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_SLC 63:0 |
| 5340 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_INT_SLC 63:0 |
| 5341 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_POSITION 0 |
| 5342 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_event_err_int_en" |
| 5343 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_LOW_ADDR_WIDTH 0 |
| 5344 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_ADDR_RANGE 26:0 |
| 5345 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_READ_MASK 64'b0000000000000000000000000000000011111111000000111111111111111111 |
| 5346 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5347 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_WRITE_MASK 64'b0000000000000000000000000000000011111111000000111111111111111111 |
| 5348 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5349 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5350 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5351 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5352 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_RMASK 64'b0000000000000000000000000000000011111111000000111111111111111111 |
| 5353 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_RESERVED_BIT_MASK 64'b1111111111111111111111111111111100000000111111000000000000000000 |
| 5354 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5355 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5356 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_INTERNAL_REG 1 |
| 5357 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_ALIASED_FROM 0 |
| 5358 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_ZERO_TIME_OMNI 1 |
| 5359 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_HW_ACC_JTAG_RD 1 |
| 5360 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_HW_ACC_JTAG_WR 1 |
| 5361 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_HW_ACC_PIO_SLOW_RD 1 |
| 5362 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_HW_ACC_PIO_SLOW_WR 1 |
| 5363 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_HW_ACC_PIO_MED_RD 1 |
| 5364 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_HW_ACC_PIO_MED_WR 1 |
| 5365 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_HW_ACC_PIO_FAST_RD 1 |
| 5366 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_HW_ACC_PIO_FAST_WR 1 |
| 5367 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_NUM_FIELDS 2 |
| 5368 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_EN_EVENT_FID 0 |
| 5369 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_EN_EVENT_SLC 31:24 |
| 5370 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_EN_EVENT_WIDTH 8 |
| 5371 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_EN_EVENT_INT_SLC 7:0 |
| 5372 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_EN_EVENT_POSITION 24 |
| 5373 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_EN_EVENT_FMASK 64'b0000000000000000000000000000000011111111000000000000000000000000 |
| 5374 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_EN_EVENT_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5375 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_EN_EVENT_POR_VALUE 8'b00000000 |
| 5376 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_EN_EVENT_FIELD_NAME "en_event" |
| 5377 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_EN_ERROR_FID 1 |
| 5378 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_EN_ERROR_SLC 17:0 |
| 5379 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_EN_ERROR_WIDTH 18 |
| 5380 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_EN_ERROR_INT_SLC 17:0 |
| 5381 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_EN_ERROR_POSITION 0 |
| 5382 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_EN_ERROR_FMASK 64'b0000000000000000000000000000000000000000000000111111111111111111 |
| 5383 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_EN_ERROR_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5384 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_EN_ERROR_POR_VALUE 18'b000000000000000000 |
| 5385 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_EN_EN_ERROR_FIELD_NAME "en_error" |
| 5386 | |
| 5387 | //------------------------------------------------------- |
| 5388 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS |
| 5389 | //------------------------------------------------------- |
| 5390 | |
| 5391 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_HW_ADDR 27'b000000011111100010000100011 |
| 5392 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_ADDR 30'b000000011111100010000100011000 |
| 5393 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_NAME "fire_plc_tlu_ctb_tlr_csr_b_event_err_int_sts" |
| 5394 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_WIDTH 64 |
| 5395 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_DEPTH 1 |
| 5396 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_SLC 63:0 |
| 5397 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_INT_SLC 63:0 |
| 5398 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_POSITION 0 |
| 5399 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_event_err_int_sts" |
| 5400 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_LOW_ADDR_WIDTH 0 |
| 5401 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_ADDR_RANGE 26:0 |
| 5402 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_READ_MASK 64'b0000000000000000000000000000000011111111000000111111111111111111 |
| 5403 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_READ_ONLY_MASK 64'b0000000000000000000000000000000011111111000000111111111111111111 |
| 5404 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_WRITE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5405 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5406 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5407 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5408 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5409 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_RMASK 64'b0000000000000000000000000000000011111111000000111111111111111111 |
| 5410 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_RESERVED_BIT_MASK 64'b1111111111111111111111111111111100000000111111000000000000000000 |
| 5411 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_HW_LD_MASK 64'b0000000000000000000000000000000011111111000000111111111111111111 |
| 5412 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5413 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_INTERNAL_REG 0 |
| 5414 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_EXTERNAL_DECODE_REG 1 |
| 5415 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_ALIASED_FROM 0 |
| 5416 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_ZERO_TIME_OMNI 0 |
| 5417 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_HW_ACC_JTAG_RD 1 |
| 5418 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_HW_ACC_JTAG_WR 1 |
| 5419 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_HW_ACC_PIO_SLOW_RD 1 |
| 5420 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_HW_ACC_PIO_SLOW_WR 1 |
| 5421 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_HW_ACC_PIO_MED_RD 1 |
| 5422 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_HW_ACC_PIO_MED_WR 1 |
| 5423 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_HW_ACC_PIO_FAST_RD 1 |
| 5424 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_HW_ACC_PIO_FAST_WR 1 |
| 5425 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_NUM_FIELDS 2 |
| 5426 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_EN_EVENT_FID 0 |
| 5427 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_EN_EVENT_SLC 31:24 |
| 5428 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_EN_EVENT_WIDTH 8 |
| 5429 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_EN_EVENT_INT_SLC 7:0 |
| 5430 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_EN_EVENT_POSITION 24 |
| 5431 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_EN_EVENT_FMASK 64'b0000000000000000000000000000000011111111000000000000000000000000 |
| 5432 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_EN_EVENT_HW_LD_MASK 64'b0000000000000000000000000000000011111111000000000000000000000000 |
| 5433 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_EN_EVENT_POR_VALUE 8'b00000000 |
| 5434 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_EN_EVENT_FIELD_NAME "en_event" |
| 5435 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_EN_ERROR_FID 1 |
| 5436 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_EN_ERROR_SLC 17:0 |
| 5437 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_EN_ERROR_WIDTH 18 |
| 5438 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_EN_ERROR_INT_SLC 17:0 |
| 5439 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_EN_ERROR_POSITION 0 |
| 5440 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_EN_ERROR_FMASK 64'b0000000000000000000000000000000000000000000000111111111111111111 |
| 5441 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_EN_ERROR_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000111111111111111111 |
| 5442 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_EN_ERROR_POR_VALUE 18'b000000000000000000 |
| 5443 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_INT_STS_EN_ERROR_FIELD_NAME "en_error" |
| 5444 | |
| 5445 | //------------------------------------------------------- |
| 5446 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS |
| 5447 | //------------------------------------------------------- |
| 5448 | |
| 5449 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_HW_ADDR 27'b000000011111100010000100100 |
| 5450 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ADDR 30'b000000011111100010000100100000 |
| 5451 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_NAME "fire_plc_tlu_ctb_tlr_csr_b_event_err_sts_clr_rw1c_alias" |
| 5452 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_WIDTH 64 |
| 5453 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_DEPTH 1 |
| 5454 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_SLC 63:0 |
| 5455 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_INT_SLC 63:0 |
| 5456 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_POSITION 0 |
| 5457 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_event_err_sts_clr_rw1c_alias" |
| 5458 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_LOW_ADDR_WIDTH 0 |
| 5459 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ADDR_RANGE 26:0 |
| 5460 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_READ_MASK 64'b0000000000000000000000000000000011111111000000111111111111111111 |
| 5461 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5462 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_WRITE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5463 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5464 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5465 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_CLEAR_MASK 64'b0000000000000000000000000000000011111111000000111111111111111111 |
| 5466 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5467 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_RMASK 64'b0000000000000000000000000000000011111111000000111111111111111111 |
| 5468 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_RESERVED_BIT_MASK 64'b1111111111111111111111111111111100000000111111000000000000000000 |
| 5469 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_HW_LD_MASK 64'b0000000000000000000000000000000011111111000000111111111111111111 |
| 5470 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5471 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_INTERNAL_REG 1 |
| 5472 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ALIASED_FROM 0 |
| 5473 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ZERO_TIME_OMNI 1 |
| 5474 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_HW_ACC_JTAG_RD 1 |
| 5475 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_HW_ACC_JTAG_WR 1 |
| 5476 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_HW_ACC_PIO_SLOW_RD 1 |
| 5477 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_HW_ACC_PIO_SLOW_WR 1 |
| 5478 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_HW_ACC_PIO_MED_RD 1 |
| 5479 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_HW_ACC_PIO_MED_WR 1 |
| 5480 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_HW_ACC_PIO_FAST_RD 1 |
| 5481 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_HW_ACC_PIO_FAST_WR 1 |
| 5482 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_NUM_FIELDS 26 |
| 5483 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_EN_LB_FID 0 |
| 5484 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_EN_LB_SLC 31:31 |
| 5485 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_EN_LB_WIDTH 1 |
| 5486 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_EN_LB_INT_SLC 0:0 |
| 5487 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_EN_LB_POSITION 31 |
| 5488 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_EN_LB_FMASK 64'b0000000000000000000000000000000010000000000000000000000000000000 |
| 5489 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_EN_LB_HW_LD_MASK 64'b0000000000000000000000000000000010000000000000000000000000000000 |
| 5490 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_EN_LB_POR_VALUE 1'b0 |
| 5491 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_EN_LB_FIELD_NAME "evt_rcv_en_lb" |
| 5492 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_DIS_LINK_FID 1 |
| 5493 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_DIS_LINK_SLC 30:30 |
| 5494 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_DIS_LINK_WIDTH 1 |
| 5495 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_DIS_LINK_INT_SLC 0:0 |
| 5496 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_DIS_LINK_POSITION 30 |
| 5497 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_DIS_LINK_FMASK 64'b0000000000000000000000000000000001000000000000000000000000000000 |
| 5498 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_DIS_LINK_HW_LD_MASK 64'b0000000000000000000000000000000001000000000000000000000000000000 |
| 5499 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_DIS_LINK_POR_VALUE 1'b0 |
| 5500 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_DIS_LINK_FIELD_NAME "evt_rcv_dis_link" |
| 5501 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_HOT_RST_FID 2 |
| 5502 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_HOT_RST_SLC 29:29 |
| 5503 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_HOT_RST_WIDTH 1 |
| 5504 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_HOT_RST_INT_SLC 0:0 |
| 5505 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_HOT_RST_POSITION 29 |
| 5506 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_HOT_RST_FMASK 64'b0000000000000000000000000000000000100000000000000000000000000000 |
| 5507 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_HOT_RST_HW_LD_MASK 64'b0000000000000000000000000000000000100000000000000000000000000000 |
| 5508 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_HOT_RST_POR_VALUE 1'b0 |
| 5509 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_HOT_RST_FIELD_NAME "evt_rcv_hot_rst" |
| 5510 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_EIDLE_EXIT_FID 3 |
| 5511 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_EIDLE_EXIT_SLC 28:28 |
| 5512 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_EIDLE_EXIT_WIDTH 1 |
| 5513 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_EIDLE_EXIT_INT_SLC 0:0 |
| 5514 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_EIDLE_EXIT_POSITION 28 |
| 5515 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_EIDLE_EXIT_FMASK 64'b0000000000000000000000000000000000010000000000000000000000000000 |
| 5516 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_EIDLE_EXIT_HW_LD_MASK 64'b0000000000000000000000000000000000010000000000000000000000000000 |
| 5517 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_EIDLE_EXIT_POR_VALUE 1'b0 |
| 5518 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_EIDLE_EXIT_FIELD_NAME "evt_rcv_eidle_exit" |
| 5519 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_EIDLE_FID 4 |
| 5520 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_EIDLE_SLC 27:27 |
| 5521 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_EIDLE_WIDTH 1 |
| 5522 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_EIDLE_INT_SLC 0:0 |
| 5523 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_EIDLE_POSITION 27 |
| 5524 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_EIDLE_FMASK 64'b0000000000000000000000000000000000001000000000000000000000000000 |
| 5525 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_EIDLE_HW_LD_MASK 64'b0000000000000000000000000000000000001000000000000000000000000000 |
| 5526 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_EIDLE_POR_VALUE 1'b0 |
| 5527 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_EIDLE_FIELD_NAME "evt_rcv_eidle" |
| 5528 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_TS1_FID 5 |
| 5529 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_TS1_SLC 26:26 |
| 5530 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_TS1_WIDTH 1 |
| 5531 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_TS1_INT_SLC 0:0 |
| 5532 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_TS1_POSITION 26 |
| 5533 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_TS1_FMASK 64'b0000000000000000000000000000000000000100000000000000000000000000 |
| 5534 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_TS1_HW_LD_MASK 64'b0000000000000000000000000000000000000100000000000000000000000000 |
| 5535 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_TS1_POR_VALUE 1'b0 |
| 5536 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_TS1_FIELD_NAME "evt_rcv_ts1" |
| 5537 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_TS2_FID 6 |
| 5538 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_TS2_SLC 25:25 |
| 5539 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_TS2_WIDTH 1 |
| 5540 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_TS2_INT_SLC 0:0 |
| 5541 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_TS2_POSITION 25 |
| 5542 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_TS2_FMASK 64'b0000000000000000000000000000000000000010000000000000000000000000 |
| 5543 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_TS2_HW_LD_MASK 64'b0000000000000000000000000000000000000010000000000000000000000000 |
| 5544 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_TS2_POR_VALUE 1'b0 |
| 5545 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_RCV_TS2_FIELD_NAME "evt_rcv_ts2" |
| 5546 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_SEND_SKP_B2B_FID 7 |
| 5547 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_SEND_SKP_B2B_SLC 24:24 |
| 5548 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_SEND_SKP_B2B_WIDTH 1 |
| 5549 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_SEND_SKP_B2B_INT_SLC 0:0 |
| 5550 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_SEND_SKP_B2B_POSITION 24 |
| 5551 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_SEND_SKP_B2B_FMASK 64'b0000000000000000000000000000000000000001000000000000000000000000 |
| 5552 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_SEND_SKP_B2B_HW_LD_MASK 64'b0000000000000000000000000000000000000001000000000000000000000000 |
| 5553 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_SEND_SKP_B2B_POR_VALUE 1'b0 |
| 5554 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_EVT_SEND_SKP_B2B_FIELD_NAME "evt_send_skp_b2b" |
| 5555 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_OUTSTANDING_SKIP_FID 8 |
| 5556 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_OUTSTANDING_SKIP_SLC 17:17 |
| 5557 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_OUTSTANDING_SKIP_WIDTH 1 |
| 5558 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_OUTSTANDING_SKIP_INT_SLC 0:0 |
| 5559 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_OUTSTANDING_SKIP_POSITION 17 |
| 5560 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_OUTSTANDING_SKIP_FMASK 64'b0000000000000000000000000000000000000000000000100000000000000000 |
| 5561 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_OUTSTANDING_SKIP_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000100000000000000000 |
| 5562 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_OUTSTANDING_SKIP_POR_VALUE 1'b0 |
| 5563 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_OUTSTANDING_SKIP_FIELD_NAME "err_outstanding_skip" |
| 5564 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ELASTIC_FIFO_UNDRFLW_FID 9 |
| 5565 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ELASTIC_FIFO_UNDRFLW_SLC 16:16 |
| 5566 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ELASTIC_FIFO_UNDRFLW_WIDTH 1 |
| 5567 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ELASTIC_FIFO_UNDRFLW_INT_SLC 0:0 |
| 5568 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ELASTIC_FIFO_UNDRFLW_POSITION 16 |
| 5569 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ELASTIC_FIFO_UNDRFLW_FMASK 64'b0000000000000000000000000000000000000000000000010000000000000000 |
| 5570 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ELASTIC_FIFO_UNDRFLW_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000010000000000000000 |
| 5571 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ELASTIC_FIFO_UNDRFLW_POR_VALUE 1'b0 |
| 5572 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ELASTIC_FIFO_UNDRFLW_FIELD_NAME "err_elastic_fifo_undrflw" |
| 5573 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ELASTIC_FIFO_OVRFLW_FID 10 |
| 5574 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ELASTIC_FIFO_OVRFLW_SLC 15:15 |
| 5575 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ELASTIC_FIFO_OVRFLW_WIDTH 1 |
| 5576 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ELASTIC_FIFO_OVRFLW_INT_SLC 0:0 |
| 5577 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ELASTIC_FIFO_OVRFLW_POSITION 15 |
| 5578 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ELASTIC_FIFO_OVRFLW_FMASK 64'b0000000000000000000000000000000000000000000000001000000000000000 |
| 5579 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ELASTIC_FIFO_OVRFLW_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000001000000000000000 |
| 5580 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ELASTIC_FIFO_OVRFLW_POR_VALUE 1'b0 |
| 5581 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ELASTIC_FIFO_OVRFLW_FIELD_NAME "err_elastic_fifo_ovrflw" |
| 5582 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ALIGN_FID 11 |
| 5583 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ALIGN_SLC 14:14 |
| 5584 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ALIGN_WIDTH 1 |
| 5585 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ALIGN_INT_SLC 0:0 |
| 5586 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ALIGN_POSITION 14 |
| 5587 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ALIGN_FMASK 64'b0000000000000000000000000000000000000000000000000100000000000000 |
| 5588 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ALIGN_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000100000000000000 |
| 5589 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ALIGN_POR_VALUE 1'b0 |
| 5590 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ALIGN_FIELD_NAME "err_align" |
| 5591 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_KCHAR_DLLP_FID 12 |
| 5592 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_KCHAR_DLLP_SLC 13:13 |
| 5593 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_KCHAR_DLLP_WIDTH 1 |
| 5594 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_KCHAR_DLLP_INT_SLC 0:0 |
| 5595 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_KCHAR_DLLP_POSITION 13 |
| 5596 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_KCHAR_DLLP_FMASK 64'b0000000000000000000000000000000000000000000000000010000000000000 |
| 5597 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_KCHAR_DLLP_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000010000000000000 |
| 5598 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_KCHAR_DLLP_POR_VALUE 1'b0 |
| 5599 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_KCHAR_DLLP_FIELD_NAME "err_kchar_dllp" |
| 5600 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_END_POS_FID 13 |
| 5601 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_END_POS_SLC 12:12 |
| 5602 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_END_POS_WIDTH 1 |
| 5603 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_END_POS_INT_SLC 0:0 |
| 5604 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_END_POS_POSITION 12 |
| 5605 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_END_POS_FMASK 64'b0000000000000000000000000000000000000000000000000001000000000000 |
| 5606 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_END_POS_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000001000000000000 |
| 5607 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_END_POS_POR_VALUE 1'b0 |
| 5608 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_END_POS_FIELD_NAME "err_ill_end_pos" |
| 5609 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SYNC_FID 14 |
| 5610 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SYNC_SLC 11:11 |
| 5611 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SYNC_WIDTH 1 |
| 5612 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SYNC_INT_SLC 0:0 |
| 5613 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SYNC_POSITION 11 |
| 5614 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SYNC_FMASK 64'b0000000000000000000000000000000000000000000000000000100000000000 |
| 5615 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SYNC_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000100000000000 |
| 5616 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SYNC_POR_VALUE 1'b0 |
| 5617 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SYNC_FIELD_NAME "err_sync" |
| 5618 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_END_EDB_NO_STP_SDP_FID 15 |
| 5619 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_END_EDB_NO_STP_SDP_SLC 10:10 |
| 5620 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_END_EDB_NO_STP_SDP_WIDTH 1 |
| 5621 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_END_EDB_NO_STP_SDP_INT_SLC 0:0 |
| 5622 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_END_EDB_NO_STP_SDP_POSITION 10 |
| 5623 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_END_EDB_NO_STP_SDP_FMASK 64'b0000000000000000000000000000000000000000000000000000010000000000 |
| 5624 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_END_EDB_NO_STP_SDP_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000010000000000 |
| 5625 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_END_EDB_NO_STP_SDP_POR_VALUE 1'b0 |
| 5626 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_END_EDB_NO_STP_SDP_FIELD_NAME "err_end_edb_no_stp_sdp" |
| 5627 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SDP_NO_END_FID 16 |
| 5628 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SDP_NO_END_SLC 9:9 |
| 5629 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SDP_NO_END_WIDTH 1 |
| 5630 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SDP_NO_END_INT_SLC 0:0 |
| 5631 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SDP_NO_END_POSITION 9 |
| 5632 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SDP_NO_END_FMASK 64'b0000000000000000000000000000000000000000000000000000001000000000 |
| 5633 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SDP_NO_END_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000001000000000 |
| 5634 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SDP_NO_END_POR_VALUE 1'b0 |
| 5635 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SDP_NO_END_FIELD_NAME "err_sdp_no_end" |
| 5636 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_STP_NO_END_EDB_FID 17 |
| 5637 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_STP_NO_END_EDB_SLC 8:8 |
| 5638 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_STP_NO_END_EDB_WIDTH 1 |
| 5639 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_STP_NO_END_EDB_INT_SLC 0:0 |
| 5640 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_STP_NO_END_EDB_POSITION 8 |
| 5641 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_STP_NO_END_EDB_FMASK 64'b0000000000000000000000000000000000000000000000000000000100000000 |
| 5642 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_STP_NO_END_EDB_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000100000000 |
| 5643 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_STP_NO_END_EDB_POR_VALUE 1'b0 |
| 5644 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_STP_NO_END_EDB_FIELD_NAME "err_stp_no_end_edb" |
| 5645 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_PAD_POS_FID 18 |
| 5646 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_PAD_POS_SLC 7:7 |
| 5647 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_PAD_POS_WIDTH 1 |
| 5648 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_PAD_POS_INT_SLC 0:0 |
| 5649 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_PAD_POS_POSITION 7 |
| 5650 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_PAD_POS_FMASK 64'b0000000000000000000000000000000000000000000000000000000010000000 |
| 5651 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_PAD_POS_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000010000000 |
| 5652 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_PAD_POS_POR_VALUE 1'b0 |
| 5653 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_PAD_POS_FIELD_NAME "err_ill_pad_pos" |
| 5654 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_MULTI_SDP_FID 19 |
| 5655 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_MULTI_SDP_SLC 6:6 |
| 5656 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_MULTI_SDP_WIDTH 1 |
| 5657 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_MULTI_SDP_INT_SLC 0:0 |
| 5658 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_MULTI_SDP_POSITION 6 |
| 5659 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_MULTI_SDP_FMASK 64'b0000000000000000000000000000000000000000000000000000000001000000 |
| 5660 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_MULTI_SDP_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000001000000 |
| 5661 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_MULTI_SDP_POR_VALUE 1'b0 |
| 5662 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_MULTI_SDP_FIELD_NAME "err_multi_sdp" |
| 5663 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_MULTI_STP_FID 20 |
| 5664 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_MULTI_STP_SLC 5:5 |
| 5665 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_MULTI_STP_WIDTH 1 |
| 5666 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_MULTI_STP_INT_SLC 0:0 |
| 5667 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_MULTI_STP_POSITION 5 |
| 5668 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_MULTI_STP_FMASK 64'b0000000000000000000000000000000000000000000000000000000000100000 |
| 5669 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_MULTI_STP_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000100000 |
| 5670 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_MULTI_STP_POR_VALUE 1'b0 |
| 5671 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_MULTI_STP_FIELD_NAME "err_multi_stp" |
| 5672 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_SDP_POS_FID 21 |
| 5673 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_SDP_POS_SLC 4:4 |
| 5674 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_SDP_POS_WIDTH 1 |
| 5675 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_SDP_POS_INT_SLC 0:0 |
| 5676 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_SDP_POS_POSITION 4 |
| 5677 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_SDP_POS_FMASK 64'b0000000000000000000000000000000000000000000000000000000000010000 |
| 5678 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_SDP_POS_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000010000 |
| 5679 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_SDP_POS_POR_VALUE 1'b0 |
| 5680 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_SDP_POS_FIELD_NAME "err_ill_sdp_pos" |
| 5681 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_STP_POS_FID 22 |
| 5682 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_STP_POS_SLC 3:3 |
| 5683 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_STP_POS_WIDTH 1 |
| 5684 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_STP_POS_INT_SLC 0:0 |
| 5685 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_STP_POS_POSITION 3 |
| 5686 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_STP_POS_FMASK 64'b0000000000000000000000000000000000000000000000000000000000001000 |
| 5687 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_STP_POS_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000001000 |
| 5688 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_STP_POS_POR_VALUE 1'b0 |
| 5689 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_ILL_STP_POS_FIELD_NAME "err_ill_stp_pos" |
| 5690 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_UNSUP_DLLP_FID 23 |
| 5691 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_UNSUP_DLLP_SLC 2:2 |
| 5692 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_UNSUP_DLLP_WIDTH 1 |
| 5693 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_UNSUP_DLLP_INT_SLC 0:0 |
| 5694 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_UNSUP_DLLP_POSITION 2 |
| 5695 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_UNSUP_DLLP_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000100 |
| 5696 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_UNSUP_DLLP_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000100 |
| 5697 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_UNSUP_DLLP_POR_VALUE 1'b0 |
| 5698 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_UNSUP_DLLP_FIELD_NAME "err_unsup_dllp" |
| 5699 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SRC_TLP_FID 24 |
| 5700 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SRC_TLP_SLC 1:1 |
| 5701 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SRC_TLP_WIDTH 1 |
| 5702 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SRC_TLP_INT_SLC 0:0 |
| 5703 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SRC_TLP_POSITION 1 |
| 5704 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SRC_TLP_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000010 |
| 5705 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SRC_TLP_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000010 |
| 5706 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SRC_TLP_POR_VALUE 1'b0 |
| 5707 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SRC_TLP_FIELD_NAME "err_src_tlp" |
| 5708 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SDS_LOS_FID 25 |
| 5709 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SDS_LOS_SLC 0:0 |
| 5710 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SDS_LOS_WIDTH 1 |
| 5711 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SDS_LOS_INT_SLC 0:0 |
| 5712 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SDS_LOS_POSITION 0 |
| 5713 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SDS_LOS_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000001 |
| 5714 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SDS_LOS_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000001 |
| 5715 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SDS_LOS_POR_VALUE 1'b0 |
| 5716 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1C_ALIAS_ERR_SDS_LOS_FIELD_NAME "err_sds_los" |
| 5717 | |
| 5718 | //------------------------------------------------------- |
| 5719 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS |
| 5720 | //------------------------------------------------------- |
| 5721 | |
| 5722 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_HW_ADDR 27'b000000011111100010000100101 |
| 5723 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ADDR 30'b000000011111100010000100101000 |
| 5724 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_NAME "fire_plc_tlu_ctb_tlr_csr_b_event_err_sts_clr_rw1s_alias" |
| 5725 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_WIDTH 64 |
| 5726 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_DEPTH 1 |
| 5727 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_SLC 63:0 |
| 5728 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_INT_SLC 63:0 |
| 5729 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_POSITION 0 |
| 5730 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_event_err_sts_clr_rw1s_alias" |
| 5731 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_LOW_ADDR_WIDTH 0 |
| 5732 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ADDR_RANGE 26:0 |
| 5733 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_READ_MASK 64'b0000000000000000000000000000000011111111000000111111111111111111 |
| 5734 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5735 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_WRITE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5736 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5737 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_SET_MASK 64'b0000000000000000000000000000000011111111000000111111111111111111 |
| 5738 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5739 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5740 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_RMASK 64'b0000000000000000000000000000000011111111000000111111111111111111 |
| 5741 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_RESERVED_BIT_MASK 64'b1111111111111111111111111111111100000000111111000000000000000000 |
| 5742 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_HW_LD_MASK 64'b0000000000000000000000000000000011111111000000111111111111111111 |
| 5743 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 5744 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_INTERNAL_REG 1 |
| 5745 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ALIASED_FROM "fire_plc_tlu_ctb_tlr_csr_b_event_err_sts_clr_rw1c_alias" |
| 5746 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ZERO_TIME_OMNI 1 |
| 5747 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_HW_ACC_JTAG_RD 1 |
| 5748 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_HW_ACC_JTAG_WR 1 |
| 5749 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_HW_ACC_PIO_SLOW_RD 1 |
| 5750 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_HW_ACC_PIO_SLOW_WR 1 |
| 5751 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_HW_ACC_PIO_MED_RD 1 |
| 5752 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_HW_ACC_PIO_MED_WR 1 |
| 5753 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_HW_ACC_PIO_FAST_RD 1 |
| 5754 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_HW_ACC_PIO_FAST_WR 1 |
| 5755 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_NUM_FIELDS 26 |
| 5756 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_EN_LB_FID 0 |
| 5757 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_EN_LB_SLC 31:31 |
| 5758 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_EN_LB_WIDTH 1 |
| 5759 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_EN_LB_INT_SLC 0:0 |
| 5760 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_EN_LB_POSITION 31 |
| 5761 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_EN_LB_FMASK 64'b0000000000000000000000000000000010000000000000000000000000000000 |
| 5762 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_EN_LB_HW_LD_MASK 64'b0000000000000000000000000000000010000000000000000000000000000000 |
| 5763 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_EN_LB_POR_VALUE 1'b0 |
| 5764 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_EN_LB_FIELD_NAME "evt_rcv_en_lb" |
| 5765 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_DIS_LINK_FID 1 |
| 5766 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_DIS_LINK_SLC 30:30 |
| 5767 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_DIS_LINK_WIDTH 1 |
| 5768 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_DIS_LINK_INT_SLC 0:0 |
| 5769 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_DIS_LINK_POSITION 30 |
| 5770 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_DIS_LINK_FMASK 64'b0000000000000000000000000000000001000000000000000000000000000000 |
| 5771 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_DIS_LINK_HW_LD_MASK 64'b0000000000000000000000000000000001000000000000000000000000000000 |
| 5772 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_DIS_LINK_POR_VALUE 1'b0 |
| 5773 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_DIS_LINK_FIELD_NAME "evt_rcv_dis_link" |
| 5774 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_HOT_RST_FID 2 |
| 5775 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_HOT_RST_SLC 29:29 |
| 5776 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_HOT_RST_WIDTH 1 |
| 5777 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_HOT_RST_INT_SLC 0:0 |
| 5778 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_HOT_RST_POSITION 29 |
| 5779 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_HOT_RST_FMASK 64'b0000000000000000000000000000000000100000000000000000000000000000 |
| 5780 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_HOT_RST_HW_LD_MASK 64'b0000000000000000000000000000000000100000000000000000000000000000 |
| 5781 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_HOT_RST_POR_VALUE 1'b0 |
| 5782 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_HOT_RST_FIELD_NAME "evt_rcv_hot_rst" |
| 5783 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_EIDLE_EXIT_FID 3 |
| 5784 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_EIDLE_EXIT_SLC 28:28 |
| 5785 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_EIDLE_EXIT_WIDTH 1 |
| 5786 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_EIDLE_EXIT_INT_SLC 0:0 |
| 5787 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_EIDLE_EXIT_POSITION 28 |
| 5788 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_EIDLE_EXIT_FMASK 64'b0000000000000000000000000000000000010000000000000000000000000000 |
| 5789 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_EIDLE_EXIT_HW_LD_MASK 64'b0000000000000000000000000000000000010000000000000000000000000000 |
| 5790 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_EIDLE_EXIT_POR_VALUE 1'b0 |
| 5791 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_EIDLE_EXIT_FIELD_NAME "evt_rcv_eidle_exit" |
| 5792 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_EIDLE_FID 4 |
| 5793 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_EIDLE_SLC 27:27 |
| 5794 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_EIDLE_WIDTH 1 |
| 5795 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_EIDLE_INT_SLC 0:0 |
| 5796 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_EIDLE_POSITION 27 |
| 5797 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_EIDLE_FMASK 64'b0000000000000000000000000000000000001000000000000000000000000000 |
| 5798 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_EIDLE_HW_LD_MASK 64'b0000000000000000000000000000000000001000000000000000000000000000 |
| 5799 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_EIDLE_POR_VALUE 1'b0 |
| 5800 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_EIDLE_FIELD_NAME "evt_rcv_eidle" |
| 5801 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_TS1_FID 5 |
| 5802 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_TS1_SLC 26:26 |
| 5803 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_TS1_WIDTH 1 |
| 5804 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_TS1_INT_SLC 0:0 |
| 5805 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_TS1_POSITION 26 |
| 5806 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_TS1_FMASK 64'b0000000000000000000000000000000000000100000000000000000000000000 |
| 5807 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_TS1_HW_LD_MASK 64'b0000000000000000000000000000000000000100000000000000000000000000 |
| 5808 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_TS1_POR_VALUE 1'b0 |
| 5809 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_TS1_FIELD_NAME "evt_rcv_ts1" |
| 5810 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_TS2_FID 6 |
| 5811 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_TS2_SLC 25:25 |
| 5812 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_TS2_WIDTH 1 |
| 5813 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_TS2_INT_SLC 0:0 |
| 5814 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_TS2_POSITION 25 |
| 5815 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_TS2_FMASK 64'b0000000000000000000000000000000000000010000000000000000000000000 |
| 5816 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_TS2_HW_LD_MASK 64'b0000000000000000000000000000000000000010000000000000000000000000 |
| 5817 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_TS2_POR_VALUE 1'b0 |
| 5818 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_RCV_TS2_FIELD_NAME "evt_rcv_ts2" |
| 5819 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_SEND_SKP_B2B_FID 7 |
| 5820 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_SEND_SKP_B2B_SLC 24:24 |
| 5821 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_SEND_SKP_B2B_WIDTH 1 |
| 5822 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_SEND_SKP_B2B_INT_SLC 0:0 |
| 5823 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_SEND_SKP_B2B_POSITION 24 |
| 5824 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_SEND_SKP_B2B_FMASK 64'b0000000000000000000000000000000000000001000000000000000000000000 |
| 5825 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_SEND_SKP_B2B_HW_LD_MASK 64'b0000000000000000000000000000000000000001000000000000000000000000 |
| 5826 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_SEND_SKP_B2B_POR_VALUE 1'b0 |
| 5827 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_EVT_SEND_SKP_B2B_FIELD_NAME "evt_send_skp_b2b" |
| 5828 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_OUTSTANDING_SKIP_FID 8 |
| 5829 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_OUTSTANDING_SKIP_SLC 17:17 |
| 5830 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_OUTSTANDING_SKIP_WIDTH 1 |
| 5831 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_OUTSTANDING_SKIP_INT_SLC 0:0 |
| 5832 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_OUTSTANDING_SKIP_POSITION 17 |
| 5833 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_OUTSTANDING_SKIP_FMASK 64'b0000000000000000000000000000000000000000000000100000000000000000 |
| 5834 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_OUTSTANDING_SKIP_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000100000000000000000 |
| 5835 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_OUTSTANDING_SKIP_POR_VALUE 1'b0 |
| 5836 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_OUTSTANDING_SKIP_FIELD_NAME "err_outstanding_skip" |
| 5837 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ELASTIC_FIFO_UNDRFLW_FID 9 |
| 5838 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ELASTIC_FIFO_UNDRFLW_SLC 16:16 |
| 5839 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ELASTIC_FIFO_UNDRFLW_WIDTH 1 |
| 5840 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ELASTIC_FIFO_UNDRFLW_INT_SLC 0:0 |
| 5841 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ELASTIC_FIFO_UNDRFLW_POSITION 16 |
| 5842 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ELASTIC_FIFO_UNDRFLW_FMASK 64'b0000000000000000000000000000000000000000000000010000000000000000 |
| 5843 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ELASTIC_FIFO_UNDRFLW_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000010000000000000000 |
| 5844 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ELASTIC_FIFO_UNDRFLW_POR_VALUE 1'b0 |
| 5845 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ELASTIC_FIFO_UNDRFLW_FIELD_NAME "err_elastic_fifo_undrflw" |
| 5846 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ELASTIC_FIFO_OVRFLW_FID 10 |
| 5847 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ELASTIC_FIFO_OVRFLW_SLC 15:15 |
| 5848 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ELASTIC_FIFO_OVRFLW_WIDTH 1 |
| 5849 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ELASTIC_FIFO_OVRFLW_INT_SLC 0:0 |
| 5850 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ELASTIC_FIFO_OVRFLW_POSITION 15 |
| 5851 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ELASTIC_FIFO_OVRFLW_FMASK 64'b0000000000000000000000000000000000000000000000001000000000000000 |
| 5852 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ELASTIC_FIFO_OVRFLW_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000001000000000000000 |
| 5853 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ELASTIC_FIFO_OVRFLW_POR_VALUE 1'b0 |
| 5854 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ELASTIC_FIFO_OVRFLW_FIELD_NAME "err_elastic_fifo_ovrflw" |
| 5855 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ALIGN_FID 11 |
| 5856 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ALIGN_SLC 14:14 |
| 5857 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ALIGN_WIDTH 1 |
| 5858 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ALIGN_INT_SLC 0:0 |
| 5859 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ALIGN_POSITION 14 |
| 5860 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ALIGN_FMASK 64'b0000000000000000000000000000000000000000000000000100000000000000 |
| 5861 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ALIGN_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000100000000000000 |
| 5862 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ALIGN_POR_VALUE 1'b0 |
| 5863 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ALIGN_FIELD_NAME "err_align" |
| 5864 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_KCHAR_DLLP_FID 12 |
| 5865 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_KCHAR_DLLP_SLC 13:13 |
| 5866 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_KCHAR_DLLP_WIDTH 1 |
| 5867 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_KCHAR_DLLP_INT_SLC 0:0 |
| 5868 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_KCHAR_DLLP_POSITION 13 |
| 5869 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_KCHAR_DLLP_FMASK 64'b0000000000000000000000000000000000000000000000000010000000000000 |
| 5870 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_KCHAR_DLLP_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000010000000000000 |
| 5871 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_KCHAR_DLLP_POR_VALUE 1'b0 |
| 5872 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_KCHAR_DLLP_FIELD_NAME "err_kchar_dllp" |
| 5873 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_END_POS_FID 13 |
| 5874 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_END_POS_SLC 12:12 |
| 5875 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_END_POS_WIDTH 1 |
| 5876 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_END_POS_INT_SLC 0:0 |
| 5877 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_END_POS_POSITION 12 |
| 5878 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_END_POS_FMASK 64'b0000000000000000000000000000000000000000000000000001000000000000 |
| 5879 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_END_POS_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000001000000000000 |
| 5880 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_END_POS_POR_VALUE 1'b0 |
| 5881 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_END_POS_FIELD_NAME "err_ill_end_pos" |
| 5882 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SYNC_FID 14 |
| 5883 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SYNC_SLC 11:11 |
| 5884 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SYNC_WIDTH 1 |
| 5885 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SYNC_INT_SLC 0:0 |
| 5886 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SYNC_POSITION 11 |
| 5887 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SYNC_FMASK 64'b0000000000000000000000000000000000000000000000000000100000000000 |
| 5888 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SYNC_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000100000000000 |
| 5889 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SYNC_POR_VALUE 1'b0 |
| 5890 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SYNC_FIELD_NAME "err_sync" |
| 5891 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_END_EDB_NO_STP_SDP_FID 15 |
| 5892 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_END_EDB_NO_STP_SDP_SLC 10:10 |
| 5893 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_END_EDB_NO_STP_SDP_WIDTH 1 |
| 5894 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_END_EDB_NO_STP_SDP_INT_SLC 0:0 |
| 5895 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_END_EDB_NO_STP_SDP_POSITION 10 |
| 5896 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_END_EDB_NO_STP_SDP_FMASK 64'b0000000000000000000000000000000000000000000000000000010000000000 |
| 5897 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_END_EDB_NO_STP_SDP_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000010000000000 |
| 5898 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_END_EDB_NO_STP_SDP_POR_VALUE 1'b0 |
| 5899 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_END_EDB_NO_STP_SDP_FIELD_NAME "err_end_edb_no_stp_sdp" |
| 5900 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SDP_NO_END_FID 16 |
| 5901 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SDP_NO_END_SLC 9:9 |
| 5902 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SDP_NO_END_WIDTH 1 |
| 5903 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SDP_NO_END_INT_SLC 0:0 |
| 5904 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SDP_NO_END_POSITION 9 |
| 5905 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SDP_NO_END_FMASK 64'b0000000000000000000000000000000000000000000000000000001000000000 |
| 5906 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SDP_NO_END_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000001000000000 |
| 5907 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SDP_NO_END_POR_VALUE 1'b0 |
| 5908 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SDP_NO_END_FIELD_NAME "err_sdp_no_end" |
| 5909 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_STP_NO_END_EDB_FID 17 |
| 5910 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_STP_NO_END_EDB_SLC 8:8 |
| 5911 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_STP_NO_END_EDB_WIDTH 1 |
| 5912 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_STP_NO_END_EDB_INT_SLC 0:0 |
| 5913 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_STP_NO_END_EDB_POSITION 8 |
| 5914 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_STP_NO_END_EDB_FMASK 64'b0000000000000000000000000000000000000000000000000000000100000000 |
| 5915 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_STP_NO_END_EDB_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000100000000 |
| 5916 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_STP_NO_END_EDB_POR_VALUE 1'b0 |
| 5917 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_STP_NO_END_EDB_FIELD_NAME "err_stp_no_end_edb" |
| 5918 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_PAD_POS_FID 18 |
| 5919 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_PAD_POS_SLC 7:7 |
| 5920 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_PAD_POS_WIDTH 1 |
| 5921 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_PAD_POS_INT_SLC 0:0 |
| 5922 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_PAD_POS_POSITION 7 |
| 5923 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_PAD_POS_FMASK 64'b0000000000000000000000000000000000000000000000000000000010000000 |
| 5924 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_PAD_POS_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000010000000 |
| 5925 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_PAD_POS_POR_VALUE 1'b0 |
| 5926 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_PAD_POS_FIELD_NAME "err_ill_pad_pos" |
| 5927 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_MULTI_SDP_FID 19 |
| 5928 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_MULTI_SDP_SLC 6:6 |
| 5929 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_MULTI_SDP_WIDTH 1 |
| 5930 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_MULTI_SDP_INT_SLC 0:0 |
| 5931 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_MULTI_SDP_POSITION 6 |
| 5932 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_MULTI_SDP_FMASK 64'b0000000000000000000000000000000000000000000000000000000001000000 |
| 5933 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_MULTI_SDP_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000001000000 |
| 5934 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_MULTI_SDP_POR_VALUE 1'b0 |
| 5935 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_MULTI_SDP_FIELD_NAME "err_multi_sdp" |
| 5936 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_MULTI_STP_FID 20 |
| 5937 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_MULTI_STP_SLC 5:5 |
| 5938 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_MULTI_STP_WIDTH 1 |
| 5939 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_MULTI_STP_INT_SLC 0:0 |
| 5940 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_MULTI_STP_POSITION 5 |
| 5941 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_MULTI_STP_FMASK 64'b0000000000000000000000000000000000000000000000000000000000100000 |
| 5942 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_MULTI_STP_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000100000 |
| 5943 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_MULTI_STP_POR_VALUE 1'b0 |
| 5944 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_MULTI_STP_FIELD_NAME "err_multi_stp" |
| 5945 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_SDP_POS_FID 21 |
| 5946 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_SDP_POS_SLC 4:4 |
| 5947 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_SDP_POS_WIDTH 1 |
| 5948 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_SDP_POS_INT_SLC 0:0 |
| 5949 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_SDP_POS_POSITION 4 |
| 5950 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_SDP_POS_FMASK 64'b0000000000000000000000000000000000000000000000000000000000010000 |
| 5951 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_SDP_POS_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000010000 |
| 5952 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_SDP_POS_POR_VALUE 1'b0 |
| 5953 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_SDP_POS_FIELD_NAME "err_ill_sdp_pos" |
| 5954 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_STP_POS_FID 22 |
| 5955 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_STP_POS_SLC 3:3 |
| 5956 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_STP_POS_WIDTH 1 |
| 5957 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_STP_POS_INT_SLC 0:0 |
| 5958 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_STP_POS_POSITION 3 |
| 5959 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_STP_POS_FMASK 64'b0000000000000000000000000000000000000000000000000000000000001000 |
| 5960 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_STP_POS_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000001000 |
| 5961 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_STP_POS_POR_VALUE 1'b0 |
| 5962 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_ILL_STP_POS_FIELD_NAME "err_ill_stp_pos" |
| 5963 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_UNSUP_DLLP_FID 23 |
| 5964 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_UNSUP_DLLP_SLC 2:2 |
| 5965 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_UNSUP_DLLP_WIDTH 1 |
| 5966 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_UNSUP_DLLP_INT_SLC 0:0 |
| 5967 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_UNSUP_DLLP_POSITION 2 |
| 5968 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_UNSUP_DLLP_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000100 |
| 5969 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_UNSUP_DLLP_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000100 |
| 5970 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_UNSUP_DLLP_POR_VALUE 1'b0 |
| 5971 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_UNSUP_DLLP_FIELD_NAME "err_unsup_dllp" |
| 5972 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SRC_TLP_FID 24 |
| 5973 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SRC_TLP_SLC 1:1 |
| 5974 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SRC_TLP_WIDTH 1 |
| 5975 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SRC_TLP_INT_SLC 0:0 |
| 5976 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SRC_TLP_POSITION 1 |
| 5977 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SRC_TLP_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000010 |
| 5978 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SRC_TLP_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000010 |
| 5979 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SRC_TLP_POR_VALUE 1'b0 |
| 5980 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SRC_TLP_FIELD_NAME "err_src_tlp" |
| 5981 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SDS_LOS_FID 25 |
| 5982 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SDS_LOS_SLC 0:0 |
| 5983 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SDS_LOS_WIDTH 1 |
| 5984 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SDS_LOS_INT_SLC 0:0 |
| 5985 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SDS_LOS_POSITION 0 |
| 5986 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SDS_LOS_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000001 |
| 5987 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SDS_LOS_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000001 |
| 5988 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SDS_LOS_POR_VALUE 1'b0 |
| 5989 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_EVENT_ERR_STS_CLR_RW1S_ALIAS_ERR_SDS_LOS_FIELD_NAME "err_sds_los" |
| 5990 | |
| 5991 | //------------------------------------------------------- |
| 5992 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1 |
| 5993 | //------------------------------------------------------- |
| 5994 | |
| 5995 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_HW_ADDR 27'b000000011111100010000100110 |
| 5996 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_ADDR 30'b000000011111100010000100110000 |
| 5997 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_NAME "fire_plc_tlu_ctb_tlr_csr_b_lnk_bit_err_cnt_1" |
| 5998 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_WIDTH 64 |
| 5999 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_DEPTH 1 |
| 6000 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_SLC 63:0 |
| 6001 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_INT_SLC 63:0 |
| 6002 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_POSITION 0 |
| 6003 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_lnk_bit_err_cnt_1" |
| 6004 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_LOW_ADDR_WIDTH 0 |
| 6005 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_ADDR_RANGE 26:0 |
| 6006 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_READ_MASK 64'b1100000000000000000000000000000011111111111111110000001111111111 |
| 6007 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_READ_ONLY_MASK 64'b0000000000000000000000000000000011111111111111110000001111111111 |
| 6008 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_WRITE_MASK 64'b1000000000000000000000000000000000000000000000000000000000000000 |
| 6009 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6010 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_SET_MASK 64'b0100000000000000000000000000000000000000000000000000000000000000 |
| 6011 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6012 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6013 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_RMASK 64'b1100000000000000000000000000000011111111111111110000001111111111 |
| 6014 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_RESERVED_BIT_MASK 64'b0011111111111111111111111111111100000000000000001111110000000000 |
| 6015 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_HW_LD_MASK 64'b0100000000000000000000000000000011111111111111110000001111111111 |
| 6016 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6017 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_INTERNAL_REG 0 |
| 6018 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_EXTERNAL_DECODE_REG 1 |
| 6019 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_ALIASED_FROM 0 |
| 6020 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_ZERO_TIME_OMNI 0 |
| 6021 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_HW_ACC_JTAG_RD 1 |
| 6022 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_HW_ACC_JTAG_WR 1 |
| 6023 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_HW_ACC_PIO_SLOW_RD 1 |
| 6024 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_HW_ACC_PIO_SLOW_WR 1 |
| 6025 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_HW_ACC_PIO_MED_RD 1 |
| 6026 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_HW_ACC_PIO_MED_WR 1 |
| 6027 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_HW_ACC_PIO_FAST_RD 1 |
| 6028 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_HW_ACC_PIO_FAST_WR 1 |
| 6029 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_NUM_FIELDS 5 |
| 6030 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_BER_COUNT_EN_FID 0 |
| 6031 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_BER_COUNT_EN_SLC 63:63 |
| 6032 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_BER_COUNT_EN_WIDTH 1 |
| 6033 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_BER_COUNT_EN_INT_SLC 0:0 |
| 6034 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_BER_COUNT_EN_POSITION 63 |
| 6035 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_BER_COUNT_EN_FMASK 64'b1000000000000000000000000000000000000000000000000000000000000000 |
| 6036 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_BER_COUNT_EN_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6037 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_BER_COUNT_EN_POR_VALUE 1'b0 |
| 6038 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_BER_COUNT_EN_FIELD_NAME "ber_count_en" |
| 6039 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_BER_COUNT_CLR_FID 1 |
| 6040 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_BER_COUNT_CLR_SLC 62:62 |
| 6041 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_BER_COUNT_CLR_WIDTH 1 |
| 6042 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_BER_COUNT_CLR_INT_SLC 0:0 |
| 6043 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_BER_COUNT_CLR_POSITION 62 |
| 6044 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_BER_COUNT_CLR_FMASK 64'b0100000000000000000000000000000000000000000000000000000000000000 |
| 6045 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_BER_COUNT_CLR_HW_LD_MASK 64'b0100000000000000000000000000000000000000000000000000000000000000 |
| 6046 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_BER_COUNT_CLR_POR_VALUE 1'b0 |
| 6047 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_BER_COUNT_CLR_FIELD_NAME "ber_count_clr" |
| 6048 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_CNT_BAD_DLLP_FID 2 |
| 6049 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_CNT_BAD_DLLP_SLC 31:24 |
| 6050 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_CNT_BAD_DLLP_WIDTH 8 |
| 6051 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_CNT_BAD_DLLP_INT_SLC 7:0 |
| 6052 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_CNT_BAD_DLLP_POSITION 24 |
| 6053 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_CNT_BAD_DLLP_FMASK 64'b0000000000000000000000000000000011111111000000000000000000000000 |
| 6054 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_CNT_BAD_DLLP_HW_LD_MASK 64'b0000000000000000000000000000000011111111000000000000000000000000 |
| 6055 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_CNT_BAD_DLLP_POR_VALUE 8'b00000000 |
| 6056 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_CNT_BAD_DLLP_FIELD_NAME "cnt_bad_dllp" |
| 6057 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_CNT_BAD_TLP_FID 3 |
| 6058 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_CNT_BAD_TLP_SLC 23:16 |
| 6059 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_CNT_BAD_TLP_WIDTH 8 |
| 6060 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_CNT_BAD_TLP_INT_SLC 7:0 |
| 6061 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_CNT_BAD_TLP_POSITION 16 |
| 6062 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_CNT_BAD_TLP_FMASK 64'b0000000000000000000000000000000000000000111111110000000000000000 |
| 6063 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_CNT_BAD_TLP_HW_LD_MASK 64'b0000000000000000000000000000000000000000111111110000000000000000 |
| 6064 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_CNT_BAD_TLP_POR_VALUE 8'b00000000 |
| 6065 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_CNT_BAD_TLP_FIELD_NAME "cnt_bad_tlp" |
| 6066 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_CNT_PRE_FID 4 |
| 6067 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_CNT_PRE_SLC 9:0 |
| 6068 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_CNT_PRE_WIDTH 10 |
| 6069 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_CNT_PRE_INT_SLC 9:0 |
| 6070 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_CNT_PRE_POSITION 0 |
| 6071 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_CNT_PRE_FMASK 64'b0000000000000000000000000000000000000000000000000000001111111111 |
| 6072 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_CNT_PRE_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000001111111111 |
| 6073 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_CNT_PRE_POR_VALUE 10'b0000000000 |
| 6074 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_1_CNT_PRE_FIELD_NAME "cnt_pre" |
| 6075 | |
| 6076 | //------------------------------------------------------- |
| 6077 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2 |
| 6078 | //------------------------------------------------------- |
| 6079 | |
| 6080 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_HW_ADDR 27'b000000011111100010000100111 |
| 6081 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_ADDR 30'b000000011111100010000100111000 |
| 6082 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_NAME "fire_plc_tlu_ctb_tlr_csr_b_lnk_bit_err_cnt_2" |
| 6083 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_WIDTH 64 |
| 6084 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_DEPTH 1 |
| 6085 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_SLC 63:0 |
| 6086 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_INT_SLC 63:0 |
| 6087 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_POSITION 0 |
| 6088 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_lnk_bit_err_cnt_2" |
| 6089 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_LOW_ADDR_WIDTH 0 |
| 6090 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_ADDR_RANGE 26:0 |
| 6091 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_READ_MASK 64'b0011111100111111001111110011111100111111001111110011111100111111 |
| 6092 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_READ_ONLY_MASK 64'b0011111100111111001111110011111100111111001111110011111100111111 |
| 6093 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_WRITE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6094 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6095 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6096 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6097 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6098 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_RMASK 64'b0011111100111111001111110011111100111111001111110011111100111111 |
| 6099 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_RESERVED_BIT_MASK 64'b1100000011000000110000001100000011000000110000001100000011000000 |
| 6100 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_HW_LD_MASK 64'b0011111100111111001111110011111100111111001111110011111100111111 |
| 6101 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6102 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_INTERNAL_REG 0 |
| 6103 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_EXTERNAL_DECODE_REG 1 |
| 6104 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_ALIASED_FROM 0 |
| 6105 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_ZERO_TIME_OMNI 0 |
| 6106 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_HW_ACC_JTAG_RD 1 |
| 6107 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_HW_ACC_JTAG_WR 1 |
| 6108 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_HW_ACC_PIO_SLOW_RD 1 |
| 6109 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_HW_ACC_PIO_SLOW_WR 1 |
| 6110 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_HW_ACC_PIO_MED_RD 1 |
| 6111 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_HW_ACC_PIO_MED_WR 1 |
| 6112 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_HW_ACC_PIO_FAST_RD 1 |
| 6113 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_HW_ACC_PIO_FAST_WR 1 |
| 6114 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_NUM_FIELDS 8 |
| 6115 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_7_FID 0 |
| 6116 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_7_SLC 61:56 |
| 6117 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_7_WIDTH 6 |
| 6118 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_7_INT_SLC 5:0 |
| 6119 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_7_POSITION 56 |
| 6120 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_7_FMASK 64'b0011111100000000000000000000000000000000000000000000000000000000 |
| 6121 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_7_HW_LD_MASK 64'b0011111100000000000000000000000000000000000000000000000000000000 |
| 6122 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_7_POR_VALUE 6'b000000 |
| 6123 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_7_FIELD_NAME "cnt_bad_symbol_7" |
| 6124 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_6_FID 1 |
| 6125 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_6_SLC 53:48 |
| 6126 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_6_WIDTH 6 |
| 6127 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_6_INT_SLC 5:0 |
| 6128 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_6_POSITION 48 |
| 6129 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_6_FMASK 64'b0000000000111111000000000000000000000000000000000000000000000000 |
| 6130 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_6_HW_LD_MASK 64'b0000000000111111000000000000000000000000000000000000000000000000 |
| 6131 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_6_POR_VALUE 6'b000000 |
| 6132 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_6_FIELD_NAME "cnt_bad_symbol_6" |
| 6133 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_5_FID 2 |
| 6134 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_5_SLC 45:40 |
| 6135 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_5_WIDTH 6 |
| 6136 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_5_INT_SLC 5:0 |
| 6137 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_5_POSITION 40 |
| 6138 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_5_FMASK 64'b0000000000000000001111110000000000000000000000000000000000000000 |
| 6139 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_5_HW_LD_MASK 64'b0000000000000000001111110000000000000000000000000000000000000000 |
| 6140 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_5_POR_VALUE 6'b000000 |
| 6141 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_5_FIELD_NAME "cnt_bad_symbol_5" |
| 6142 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_4_FID 3 |
| 6143 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_4_SLC 37:32 |
| 6144 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_4_WIDTH 6 |
| 6145 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_4_INT_SLC 5:0 |
| 6146 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_4_POSITION 32 |
| 6147 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_4_FMASK 64'b0000000000000000000000000011111100000000000000000000000000000000 |
| 6148 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_4_HW_LD_MASK 64'b0000000000000000000000000011111100000000000000000000000000000000 |
| 6149 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_4_POR_VALUE 6'b000000 |
| 6150 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_4_FIELD_NAME "cnt_bad_symbol_4" |
| 6151 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_3_FID 4 |
| 6152 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_3_SLC 29:24 |
| 6153 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_3_WIDTH 6 |
| 6154 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_3_INT_SLC 5:0 |
| 6155 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_3_POSITION 24 |
| 6156 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_3_FMASK 64'b0000000000000000000000000000000000111111000000000000000000000000 |
| 6157 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_3_HW_LD_MASK 64'b0000000000000000000000000000000000111111000000000000000000000000 |
| 6158 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_3_POR_VALUE 6'b000000 |
| 6159 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_3_FIELD_NAME "cnt_bad_symbol_3" |
| 6160 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_2_FID 5 |
| 6161 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_2_SLC 21:16 |
| 6162 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_2_WIDTH 6 |
| 6163 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_2_INT_SLC 5:0 |
| 6164 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_2_POSITION 16 |
| 6165 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_2_FMASK 64'b0000000000000000000000000000000000000000001111110000000000000000 |
| 6166 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_2_HW_LD_MASK 64'b0000000000000000000000000000000000000000001111110000000000000000 |
| 6167 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_2_POR_VALUE 6'b000000 |
| 6168 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_2_FIELD_NAME "cnt_bad_symbol_2" |
| 6169 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_1_FID 6 |
| 6170 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_1_SLC 13:8 |
| 6171 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_1_WIDTH 6 |
| 6172 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_1_INT_SLC 5:0 |
| 6173 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_1_POSITION 8 |
| 6174 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_1_FMASK 64'b0000000000000000000000000000000000000000000000000011111100000000 |
| 6175 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_1_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000011111100000000 |
| 6176 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_1_POR_VALUE 6'b000000 |
| 6177 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_1_FIELD_NAME "cnt_bad_symbol_1" |
| 6178 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_0_FID 7 |
| 6179 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_0_SLC 5:0 |
| 6180 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_0_WIDTH 6 |
| 6181 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_0_INT_SLC 5:0 |
| 6182 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_0_POSITION 0 |
| 6183 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_0_FMASK 64'b0000000000000000000000000000000000000000000000000000000000111111 |
| 6184 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_0_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000111111 |
| 6185 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_0_POR_VALUE 6'b000000 |
| 6186 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_LNK_BIT_ERR_CNT_2_CNT_BAD_SYMBOL_0_FIELD_NAME "cnt_bad_symbol_0" |
| 6187 | |
| 6188 | //------------------------------------------------------- |
| 6189 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL |
| 6190 | //------------------------------------------------------- |
| 6191 | |
| 6192 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_HW_ADDR 27'b000000011111100010001000000 |
| 6193 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_ADDR 30'b000000011111100010001000000000 |
| 6194 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_NAME "fire_plc_tlu_ctb_tlr_csr_b_serdes_pll" |
| 6195 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_WIDTH 64 |
| 6196 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_DEPTH 1 |
| 6197 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_SLC 63:0 |
| 6198 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_INT_SLC 63:0 |
| 6199 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_POSITION 0 |
| 6200 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_serdes_pll" |
| 6201 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_LOW_ADDR_WIDTH 0 |
| 6202 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_ADDR_RANGE 26:0 |
| 6203 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_READ_MASK 64'b0000000000000000000000000000000000000000000000000000000011111111 |
| 6204 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6205 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_WRITE_MASK 64'b0000000000000000000000000000000000000000000000000000000011111111 |
| 6206 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6207 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6208 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6209 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6210 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_RMASK 64'b0000000000000000000000000000000000000000000000000000000011111111 |
| 6211 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_RESERVED_BIT_MASK 64'b1111111111111111111111111111111111111111111111111111111100000000 |
| 6212 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6213 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000001 |
| 6214 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_INTERNAL_REG 1 |
| 6215 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_ALIASED_FROM 0 |
| 6216 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_ZERO_TIME_OMNI 1 |
| 6217 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_HW_ACC_JTAG_RD 1 |
| 6218 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_HW_ACC_JTAG_WR 1 |
| 6219 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_HW_ACC_PIO_SLOW_RD 1 |
| 6220 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_HW_ACC_PIO_SLOW_WR 1 |
| 6221 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_HW_ACC_PIO_MED_RD 1 |
| 6222 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_HW_ACC_PIO_MED_WR 1 |
| 6223 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_HW_ACC_PIO_FAST_RD 1 |
| 6224 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_HW_ACC_PIO_FAST_WR 1 |
| 6225 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_NUM_FIELDS 3 |
| 6226 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_SPARE_FID 0 |
| 6227 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_SPARE_SLC 7:6 |
| 6228 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_SPARE_WIDTH 2 |
| 6229 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_SPARE_INT_SLC 1:0 |
| 6230 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_SPARE_POSITION 6 |
| 6231 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_SPARE_FMASK 64'b0000000000000000000000000000000000000000000000000000000011000000 |
| 6232 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_SPARE_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6233 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_SPARE_POR_VALUE 2'b00 |
| 6234 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_SPARE_FIELD_NAME "spare" |
| 6235 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_LB_FID 1 |
| 6236 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_LB_SLC 5:4 |
| 6237 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_LB_WIDTH 2 |
| 6238 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_LB_INT_SLC 1:0 |
| 6239 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_LB_POSITION 4 |
| 6240 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_LB_FMASK 64'b0000000000000000000000000000000000000000000000000000000000110000 |
| 6241 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_LB_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6242 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_LB_POR_VALUE 2'b00 |
| 6243 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_LB_FIELD_NAME "lb" |
| 6244 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_MPY_FID 2 |
| 6245 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_MPY_SLC 3:0 |
| 6246 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_MPY_WIDTH 4 |
| 6247 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_MPY_INT_SLC 3:0 |
| 6248 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_MPY_POSITION 0 |
| 6249 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_MPY_FMASK 64'b0000000000000000000000000000000000000000000000000000000000001111 |
| 6250 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_MPY_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6251 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_MPY_POR_VALUE 4'b0001 |
| 6252 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_PLL_MPY_FIELD_NAME "mpy" |
| 6253 | |
| 6254 | //------------------------------------------------------- |
| 6255 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL |
| 6256 | //------------------------------------------------------- |
| 6257 | |
| 6258 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_HW_ADDR 27'b000000011111100010001100000 |
| 6259 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_ADDR 30'b000000011111100010001100000000 |
| 6260 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_NAME "fire_plc_tlu_ctb_tlr_csr_b_serdes_receiver_lane_ctl" |
| 6261 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_WIDTH 64 |
| 6262 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_DEPTH 8 |
| 6263 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_SLC 63:0 |
| 6264 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_INT_SLC 63:0 |
| 6265 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_POSITION 0 |
| 6266 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_serdes_receiver_lane_ctl" |
| 6267 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_LOW_ADDR_WIDTH 3 |
| 6268 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_SEL_RANGE 2:0 |
| 6269 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_ADDR_RANGE 26:3 |
| 6270 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_READ_MASK 64'b0000000000000000000000000000000000000000000000001111111111111111 |
| 6271 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6272 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_WRITE_MASK 64'b0000000000000000000000000000000000000000000000001111111111111111 |
| 6273 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6274 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6275 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6276 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6277 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_RMASK 64'b0000000000000000000000000000000000000000000000001111111111111111 |
| 6278 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_RESERVED_BIT_MASK 64'b1111111111111111111111111111111111111111111111110000000000000000 |
| 6279 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6280 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000010101010010 |
| 6281 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_INTERNAL_REG 1 |
| 6282 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_ALIASED_FROM 0 |
| 6283 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_ZERO_TIME_OMNI 1 |
| 6284 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_HW_ACC_JTAG_RD 1 |
| 6285 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_HW_ACC_JTAG_WR 1 |
| 6286 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_HW_ACC_PIO_SLOW_RD 1 |
| 6287 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_HW_ACC_PIO_SLOW_WR 1 |
| 6288 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_HW_ACC_PIO_MED_RD 1 |
| 6289 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_HW_ACC_PIO_MED_WR 1 |
| 6290 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_HW_ACC_PIO_FAST_RD 1 |
| 6291 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_HW_ACC_PIO_FAST_WR 1 |
| 6292 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_NUM_FIELDS 8 |
| 6293 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_BSINRXN_FID 0 |
| 6294 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_BSINRXN_SLC 15:15 |
| 6295 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_BSINRXN_WIDTH 1 |
| 6296 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_BSINRXN_INT_SLC 0:0 |
| 6297 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_BSINRXN_POSITION 15 |
| 6298 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_BSINRXN_FMASK 64'b0000000000000000000000000000000000000000000000001000000000000000 |
| 6299 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_BSINRXN_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6300 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_BSINRXN_POR_VALUE 1'b0 |
| 6301 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_BSINRXN_FIELD_NAME "bsinrxn" |
| 6302 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_BSINRXP_FID 1 |
| 6303 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_BSINRXP_SLC 14:14 |
| 6304 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_BSINRXP_WIDTH 1 |
| 6305 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_BSINRXP_INT_SLC 0:0 |
| 6306 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_BSINRXP_POSITION 14 |
| 6307 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_BSINRXP_FMASK 64'b0000000000000000000000000000000000000000000000000100000000000000 |
| 6308 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_BSINRXP_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6309 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_BSINRXP_POR_VALUE 1'b0 |
| 6310 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_BSINRXP_FIELD_NAME "bsinrxp" |
| 6311 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_EQ_FID 2 |
| 6312 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_EQ_SLC 13:10 |
| 6313 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_EQ_WIDTH 4 |
| 6314 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_EQ_INT_SLC 3:0 |
| 6315 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_EQ_POSITION 10 |
| 6316 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_EQ_FMASK 64'b0000000000000000000000000000000000000000000000000011110000000000 |
| 6317 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_EQ_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6318 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_EQ_POR_VALUE 4'b0001 |
| 6319 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_EQ_FIELD_NAME "eq" |
| 6320 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_CDR_FID 3 |
| 6321 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_CDR_SLC 9:7 |
| 6322 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_CDR_WIDTH 3 |
| 6323 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_CDR_INT_SLC 2:0 |
| 6324 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_CDR_POSITION 7 |
| 6325 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_CDR_FMASK 64'b0000000000000000000000000000000000000000000000000000001110000000 |
| 6326 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_CDR_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6327 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_CDR_POR_VALUE 3'b010 |
| 6328 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_CDR_FIELD_NAME "cdr" |
| 6329 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_LOS_FID 4 |
| 6330 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_LOS_SLC 6:5 |
| 6331 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_LOS_WIDTH 2 |
| 6332 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_LOS_INT_SLC 1:0 |
| 6333 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_LOS_POSITION 5 |
| 6334 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_LOS_FMASK 64'b0000000000000000000000000000000000000000000000000000000001100000 |
| 6335 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_LOS_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6336 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_LOS_POR_VALUE 2'b10 |
| 6337 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_LOS_FIELD_NAME "los" |
| 6338 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_TERM_FID 5 |
| 6339 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_TERM_SLC 4:2 |
| 6340 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_TERM_WIDTH 3 |
| 6341 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_TERM_INT_SLC 2:0 |
| 6342 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_TERM_POSITION 2 |
| 6343 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_TERM_FMASK 64'b0000000000000000000000000000000000000000000000000000000000011100 |
| 6344 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_TERM_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6345 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_TERM_POR_VALUE 3'b100 |
| 6346 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_TERM_FIELD_NAME "term" |
| 6347 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_CMA_ALN_EN_FID 6 |
| 6348 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_CMA_ALN_EN_SLC 1:1 |
| 6349 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_CMA_ALN_EN_WIDTH 1 |
| 6350 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_CMA_ALN_EN_INT_SLC 0:0 |
| 6351 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_CMA_ALN_EN_POSITION 1 |
| 6352 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_CMA_ALN_EN_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000010 |
| 6353 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_CMA_ALN_EN_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6354 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_CMA_ALN_EN_POR_VALUE 1'b1 |
| 6355 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_CMA_ALN_EN_FIELD_NAME "cma_aln_en" |
| 6356 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_ENTEST_FID 7 |
| 6357 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_ENTEST_SLC 0:0 |
| 6358 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_ENTEST_WIDTH 1 |
| 6359 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_ENTEST_INT_SLC 0:0 |
| 6360 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_ENTEST_POSITION 0 |
| 6361 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_ENTEST_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000001 |
| 6362 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_ENTEST_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6363 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_ENTEST_POR_VALUE 1'b0 |
| 6364 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_CTL_ENTEST_FIELD_NAME "entest" |
| 6365 | |
| 6366 | //------------------------------------------------------- |
| 6367 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS |
| 6368 | //------------------------------------------------------- |
| 6369 | |
| 6370 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_HW_ADDR 27'b000000011111100010001110000 |
| 6371 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_ADDR 30'b000000011111100010001110000000 |
| 6372 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_NAME "fire_plc_tlu_ctb_tlr_csr_b_serdes_receiver_lane_status" |
| 6373 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_WIDTH 64 |
| 6374 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_DEPTH 8 |
| 6375 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_SLC 63:0 |
| 6376 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_INT_SLC 63:0 |
| 6377 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_POSITION 0 |
| 6378 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_serdes_receiver_lane_status" |
| 6379 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_LOW_ADDR_WIDTH 3 |
| 6380 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_SEL_RANGE 2:0 |
| 6381 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_ADDR_RANGE 26:3 |
| 6382 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_READ_MASK 64'b0000000000000000000000000000000000000000000000000000000000001011 |
| 6383 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000001011 |
| 6384 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_WRITE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6385 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6386 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6387 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6388 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6389 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_RMASK 64'b0000000000000000000000000000000000000000000000000000000000001011 |
| 6390 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_RESERVED_BIT_MASK 64'b1111111111111111111111111111111111111111111111111111111111110100 |
| 6391 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000001011 |
| 6392 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6393 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_INTERNAL_REG 1 |
| 6394 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_ALIASED_FROM 0 |
| 6395 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_ZERO_TIME_OMNI 1 |
| 6396 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_HW_ACC_JTAG_RD 1 |
| 6397 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_HW_ACC_JTAG_WR 1 |
| 6398 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_HW_ACC_PIO_SLOW_RD 1 |
| 6399 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_HW_ACC_PIO_SLOW_WR 1 |
| 6400 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_HW_ACC_PIO_MED_RD 1 |
| 6401 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_HW_ACC_PIO_MED_WR 1 |
| 6402 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_HW_ACC_PIO_FAST_RD 1 |
| 6403 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_HW_ACC_PIO_FAST_WR 1 |
| 6404 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_NUM_FIELDS 3 |
| 6405 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_LOSDTCT_FID 0 |
| 6406 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_LOSDTCT_SLC 3:3 |
| 6407 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_LOSDTCT_WIDTH 1 |
| 6408 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_LOSDTCT_INT_SLC 0:0 |
| 6409 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_LOSDTCT_POSITION 3 |
| 6410 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_LOSDTCT_FMASK 64'b0000000000000000000000000000000000000000000000000000000000001000 |
| 6411 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_LOSDTCT_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000001000 |
| 6412 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_LOSDTCT_POR_VALUE 1'b0 |
| 6413 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_LOSDTCT_FIELD_NAME "losdtct" |
| 6414 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_SYNC_FID 1 |
| 6415 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_SYNC_SLC 1:1 |
| 6416 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_SYNC_WIDTH 1 |
| 6417 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_SYNC_INT_SLC 0:0 |
| 6418 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_SYNC_POSITION 1 |
| 6419 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_SYNC_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000010 |
| 6420 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_SYNC_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000010 |
| 6421 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_SYNC_POR_VALUE 1'b0 |
| 6422 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_SYNC_FIELD_NAME "sync" |
| 6423 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_TESTFAIL_FID 2 |
| 6424 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_TESTFAIL_SLC 0:0 |
| 6425 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_TESTFAIL_WIDTH 1 |
| 6426 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_TESTFAIL_INT_SLC 0:0 |
| 6427 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_TESTFAIL_POSITION 0 |
| 6428 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_TESTFAIL_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000001 |
| 6429 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_TESTFAIL_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000001 |
| 6430 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_TESTFAIL_POR_VALUE 1'b0 |
| 6431 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_RECEIVER_LANE_STATUS_TESTFAIL_FIELD_NAME "testfail" |
| 6432 | |
| 6433 | //------------------------------------------------------- |
| 6434 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL |
| 6435 | //------------------------------------------------------- |
| 6436 | |
| 6437 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_HW_ADDR 27'b000000011111100010010000000 |
| 6438 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_ADDR 30'b000000011111100010010000000000 |
| 6439 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_NAME "fire_plc_tlu_ctb_tlr_csr_b_serdes_xmitter_lane_ctl" |
| 6440 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_WIDTH 64 |
| 6441 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_DEPTH 8 |
| 6442 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_SLC 63:0 |
| 6443 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_INT_SLC 63:0 |
| 6444 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_POSITION 0 |
| 6445 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_serdes_xmitter_lane_ctl" |
| 6446 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_LOW_ADDR_WIDTH 3 |
| 6447 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_SEL_RANGE 2:0 |
| 6448 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_ADDR_RANGE 26:3 |
| 6449 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_READ_MASK 64'b0000000000000000000000000000000000000000000000000000011111111111 |
| 6450 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6451 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_WRITE_MASK 64'b0000000000000000000000000000000000000000000000000000011111111111 |
| 6452 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6453 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6454 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6455 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6456 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_RMASK 64'b0000000000000000000000000000000000000000000000000000011111111111 |
| 6457 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_RESERVED_BIT_MASK 64'b1111111111111111111111111111111111111111111111111111100000000000 |
| 6458 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6459 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000111101100 |
| 6460 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_INTERNAL_REG 1 |
| 6461 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_ALIASED_FROM 0 |
| 6462 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_ZERO_TIME_OMNI 1 |
| 6463 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_HW_ACC_JTAG_RD 1 |
| 6464 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_HW_ACC_JTAG_WR 1 |
| 6465 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_HW_ACC_PIO_SLOW_RD 1 |
| 6466 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_HW_ACC_PIO_SLOW_WR 1 |
| 6467 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_HW_ACC_PIO_MED_RD 1 |
| 6468 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_HW_ACC_PIO_MED_WR 1 |
| 6469 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_HW_ACC_PIO_FAST_RD 1 |
| 6470 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_HW_ACC_PIO_FAST_WR 1 |
| 6471 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_NUM_FIELDS 6 |
| 6472 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_SPARE_FID 0 |
| 6473 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_SPARE_SLC 10:10 |
| 6474 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_SPARE_WIDTH 1 |
| 6475 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_SPARE_INT_SLC 0:0 |
| 6476 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_SPARE_POSITION 10 |
| 6477 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_SPARE_FMASK 64'b0000000000000000000000000000000000000000000000000000010000000000 |
| 6478 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_SPARE_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6479 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_SPARE_POR_VALUE 1'b0 |
| 6480 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_SPARE_FIELD_NAME "spare" |
| 6481 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_DE_FID 1 |
| 6482 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_DE_SLC 9:6 |
| 6483 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_DE_WIDTH 4 |
| 6484 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_DE_INT_SLC 3:0 |
| 6485 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_DE_POSITION 6 |
| 6486 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_DE_FMASK 64'b0000000000000000000000000000000000000000000000000000001111000000 |
| 6487 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_DE_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6488 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_DE_POR_VALUE 4'b0111 |
| 6489 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_DE_FIELD_NAME "de" |
| 6490 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_SWING_FID 2 |
| 6491 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_SWING_SLC 5:3 |
| 6492 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_SWING_WIDTH 3 |
| 6493 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_SWING_INT_SLC 2:0 |
| 6494 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_SWING_POSITION 3 |
| 6495 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_SWING_FMASK 64'b0000000000000000000000000000000000000000000000000000000000111000 |
| 6496 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_SWING_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6497 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_SWING_POR_VALUE 3'b101 |
| 6498 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_SWING_FIELD_NAME "swing" |
| 6499 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_CM_FID 3 |
| 6500 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_CM_SLC 2:2 |
| 6501 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_CM_WIDTH 1 |
| 6502 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_CM_INT_SLC 0:0 |
| 6503 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_CM_POSITION 2 |
| 6504 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_CM_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000100 |
| 6505 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_CM_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6506 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_CM_POR_VALUE 1'b1 |
| 6507 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_CM_FIELD_NAME "cm" |
| 6508 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_INVPAIR_FID 4 |
| 6509 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_INVPAIR_SLC 1:1 |
| 6510 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_INVPAIR_WIDTH 1 |
| 6511 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_INVPAIR_INT_SLC 0:0 |
| 6512 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_INVPAIR_POSITION 1 |
| 6513 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_INVPAIR_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000010 |
| 6514 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_INVPAIR_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6515 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_INVPAIR_POR_VALUE 1'b0 |
| 6516 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_INVPAIR_FIELD_NAME "invpair" |
| 6517 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_ENTEST_FID 5 |
| 6518 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_ENTEST_SLC 0:0 |
| 6519 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_ENTEST_WIDTH 1 |
| 6520 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_ENTEST_INT_SLC 0:0 |
| 6521 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_ENTEST_POSITION 0 |
| 6522 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_ENTEST_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000001 |
| 6523 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_ENTEST_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6524 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_ENTEST_POR_VALUE 1'b0 |
| 6525 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_CTL_ENTEST_FIELD_NAME "entest" |
| 6526 | |
| 6527 | //------------------------------------------------------- |
| 6528 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS |
| 6529 | //------------------------------------------------------- |
| 6530 | |
| 6531 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_HW_ADDR 27'b000000011111100010010010000 |
| 6532 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_ADDR 30'b000000011111100010010010000000 |
| 6533 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_NAME "fire_plc_tlu_ctb_tlr_csr_b_serdes_xmitter_lane_status" |
| 6534 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_WIDTH 64 |
| 6535 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_DEPTH 8 |
| 6536 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_SLC 63:0 |
| 6537 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_INT_SLC 63:0 |
| 6538 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_POSITION 0 |
| 6539 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_serdes_xmitter_lane_status" |
| 6540 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_LOW_ADDR_WIDTH 3 |
| 6541 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_SEL_RANGE 2:0 |
| 6542 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_ADDR_RANGE 26:3 |
| 6543 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_READ_MASK 64'b0000000000000000000000000000000000000000000000000000000000000011 |
| 6544 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000011 |
| 6545 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_WRITE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6546 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6547 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6548 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6549 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6550 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_RMASK 64'b0000000000000000000000000000000000000000000000000000000000000011 |
| 6551 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_RESERVED_BIT_MASK 64'b1111111111111111111111111111111111111111111111111111111111111100 |
| 6552 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000011 |
| 6553 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6554 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_INTERNAL_REG 1 |
| 6555 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_ALIASED_FROM 0 |
| 6556 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_ZERO_TIME_OMNI 1 |
| 6557 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_HW_ACC_JTAG_RD 1 |
| 6558 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_HW_ACC_JTAG_WR 1 |
| 6559 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_HW_ACC_PIO_SLOW_RD 1 |
| 6560 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_HW_ACC_PIO_SLOW_WR 1 |
| 6561 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_HW_ACC_PIO_MED_RD 1 |
| 6562 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_HW_ACC_PIO_MED_WR 1 |
| 6563 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_HW_ACC_PIO_FAST_RD 1 |
| 6564 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_HW_ACC_PIO_FAST_WR 1 |
| 6565 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_NUM_FIELDS 2 |
| 6566 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_RDTCTIP_FID 0 |
| 6567 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_RDTCTIP_SLC 1:1 |
| 6568 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_RDTCTIP_WIDTH 1 |
| 6569 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_RDTCTIP_INT_SLC 0:0 |
| 6570 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_RDTCTIP_POSITION 1 |
| 6571 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_RDTCTIP_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000010 |
| 6572 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_RDTCTIP_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000010 |
| 6573 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_RDTCTIP_POR_VALUE 1'b0 |
| 6574 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_RDTCTIP_FIELD_NAME "rdtctip" |
| 6575 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_TESTFAIL_FID 1 |
| 6576 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_TESTFAIL_SLC 0:0 |
| 6577 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_TESTFAIL_WIDTH 1 |
| 6578 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_TESTFAIL_INT_SLC 0:0 |
| 6579 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_TESTFAIL_POSITION 0 |
| 6580 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_TESTFAIL_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000001 |
| 6581 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_TESTFAIL_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000001 |
| 6582 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_TESTFAIL_POR_VALUE 1'b0 |
| 6583 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_XMITTER_LANE_STATUS_TESTFAIL_FIELD_NAME "testfail" |
| 6584 | |
| 6585 | //------------------------------------------------------- |
| 6586 | //----- Variable definitions for register FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG |
| 6587 | //------------------------------------------------------- |
| 6588 | |
| 6589 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_HW_ADDR 27'b000000011111100010010100000 |
| 6590 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ADDR 30'b000000011111100010010100000000 |
| 6591 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_NAME "fire_plc_tlu_ctb_tlr_csr_b_serdes_macro_test_cfg" |
| 6592 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_WIDTH 64 |
| 6593 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_DEPTH 2 |
| 6594 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_SLC 63:0 |
| 6595 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_INT_SLC 63:0 |
| 6596 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_POSITION 0 |
| 6597 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_FIELD_NAME "fire_plc_tlu_ctb_tlr_csr_b_serdes_macro_test_cfg" |
| 6598 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_LOW_ADDR_WIDTH 1 |
| 6599 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_SEL_RANGE 0:0 |
| 6600 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ADDR_RANGE 26:1 |
| 6601 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_READ_MASK 64'b0000000000000000000000000000000000000000000000000111111111111111 |
| 6602 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_READ_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6603 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_WRITE_MASK 64'b0000000000000000000000000000000000000000000000000111111111111111 |
| 6604 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_WRITE_ONLY_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6605 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_SET_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6606 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_CLEAR_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6607 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_TOGGLE_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6608 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_RMASK 64'b0000000000000000000000000000000000000000000000000111111111111111 |
| 6609 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_RESERVED_BIT_MASK 64'b1111111111111111111111111111111111111111111111111000000000000000 |
| 6610 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6611 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_POR_VALUE 64'b0000000000000000000000000000000000000000000000000000000000000011 |
| 6612 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_INTERNAL_REG 1 |
| 6613 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ALIASED_FROM 0 |
| 6614 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ZERO_TIME_OMNI 1 |
| 6615 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_HW_ACC_JTAG_RD 1 |
| 6616 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_HW_ACC_JTAG_WR 1 |
| 6617 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_HW_ACC_PIO_SLOW_RD 1 |
| 6618 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_HW_ACC_PIO_SLOW_WR 1 |
| 6619 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_HW_ACC_PIO_MED_RD 1 |
| 6620 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_HW_ACC_PIO_MED_WR 1 |
| 6621 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_HW_ACC_PIO_FAST_RD 1 |
| 6622 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_HW_ACC_PIO_FAST_WR 1 |
| 6623 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_NUM_FIELDS 11 |
| 6624 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_INVPATT_FID 0 |
| 6625 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_INVPATT_SLC 14:14 |
| 6626 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_INVPATT_WIDTH 1 |
| 6627 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_INVPATT_INT_SLC 0:0 |
| 6628 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_INVPATT_POSITION 14 |
| 6629 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_INVPATT_FMASK 64'b0000000000000000000000000000000000000000000000000100000000000000 |
| 6630 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_INVPATT_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6631 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_INVPATT_POR_VALUE 1'b0 |
| 6632 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_INVPATT_FIELD_NAME "invpatt" |
| 6633 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_RATE_FID 1 |
| 6634 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_RATE_SLC 13:12 |
| 6635 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_RATE_WIDTH 2 |
| 6636 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_RATE_INT_SLC 1:0 |
| 6637 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_RATE_POSITION 12 |
| 6638 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_RATE_FMASK 64'b0000000000000000000000000000000000000000000000000011000000000000 |
| 6639 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_RATE_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6640 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_RATE_POR_VALUE 2'b00 |
| 6641 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_RATE_FIELD_NAME "rate" |
| 6642 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_RESERVED_FID 2 |
| 6643 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_RESERVED_SLC 11:11 |
| 6644 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_RESERVED_WIDTH 1 |
| 6645 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_RESERVED_INT_SLC 0:0 |
| 6646 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_RESERVED_POSITION 11 |
| 6647 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_RESERVED_FMASK 64'b0000000000000000000000000000000000000000000000000000100000000000 |
| 6648 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_RESERVED_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6649 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_RESERVED_POR_VALUE 1'b0 |
| 6650 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_RESERVED_FIELD_NAME "reserved" |
| 6651 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENBSPT_FID 3 |
| 6652 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENBSPT_SLC 10:10 |
| 6653 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENBSPT_WIDTH 1 |
| 6654 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENBSPT_INT_SLC 0:0 |
| 6655 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENBSPT_POSITION 10 |
| 6656 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENBSPT_FMASK 64'b0000000000000000000000000000000000000000000000000000010000000000 |
| 6657 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENBSPT_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6658 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENBSPT_POR_VALUE 1'b0 |
| 6659 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENBSPT_FIELD_NAME "enbspt" |
| 6660 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENBSRX_FID 4 |
| 6661 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENBSRX_SLC 9:9 |
| 6662 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENBSRX_WIDTH 1 |
| 6663 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENBSRX_INT_SLC 0:0 |
| 6664 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENBSRX_POSITION 9 |
| 6665 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENBSRX_FMASK 64'b0000000000000000000000000000000000000000000000000000001000000000 |
| 6666 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENBSRX_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6667 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENBSRX_POR_VALUE 1'b0 |
| 6668 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENBSRX_FIELD_NAME "enbsrx" |
| 6669 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENBSTX_FID 5 |
| 6670 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENBSTX_SLC 8:8 |
| 6671 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENBSTX_WIDTH 1 |
| 6672 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENBSTX_INT_SLC 0:0 |
| 6673 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENBSTX_POSITION 8 |
| 6674 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENBSTX_FMASK 64'b0000000000000000000000000000000000000000000000000000000100000000 |
| 6675 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENBSTX_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6676 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENBSTX_POR_VALUE 1'b0 |
| 6677 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENBSTX_FIELD_NAME "enbstx" |
| 6678 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_LOOPBACK_FID 6 |
| 6679 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_LOOPBACK_SLC 7:6 |
| 6680 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_LOOPBACK_WIDTH 2 |
| 6681 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_LOOPBACK_INT_SLC 1:0 |
| 6682 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_LOOPBACK_POSITION 6 |
| 6683 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_LOOPBACK_FMASK 64'b0000000000000000000000000000000000000000000000000000000011000000 |
| 6684 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_LOOPBACK_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6685 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_LOOPBACK_POR_VALUE 2'b00 |
| 6686 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_LOOPBACK_FIELD_NAME "loopback" |
| 6687 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_CLKBYP_FID 7 |
| 6688 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_CLKBYP_SLC 5:4 |
| 6689 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_CLKBYP_WIDTH 2 |
| 6690 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_CLKBYP_INT_SLC 1:0 |
| 6691 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_CLKBYP_POSITION 4 |
| 6692 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_CLKBYP_FMASK 64'b0000000000000000000000000000000000000000000000000000000000110000 |
| 6693 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_CLKBYP_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6694 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_CLKBYP_POR_VALUE 2'b00 |
| 6695 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_CLKBYP_FIELD_NAME "clkbyp" |
| 6696 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENRXPATT_FID 8 |
| 6697 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENRXPATT_SLC 3:3 |
| 6698 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENRXPATT_WIDTH 1 |
| 6699 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENRXPATT_INT_SLC 0:0 |
| 6700 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENRXPATT_POSITION 3 |
| 6701 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENRXPATT_FMASK 64'b0000000000000000000000000000000000000000000000000000000000001000 |
| 6702 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENRXPATT_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6703 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENRXPATT_POR_VALUE 1'b0 |
| 6704 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENRXPATT_FIELD_NAME "enrxpatt" |
| 6705 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENTXPATT_FID 9 |
| 6706 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENTXPATT_SLC 2:2 |
| 6707 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENTXPATT_WIDTH 1 |
| 6708 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENTXPATT_INT_SLC 0:0 |
| 6709 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENTXPATT_POSITION 2 |
| 6710 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENTXPATT_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000100 |
| 6711 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENTXPATT_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6712 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENTXPATT_POR_VALUE 1'b0 |
| 6713 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_ENTXPATT_FIELD_NAME "entxpatt" |
| 6714 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_TESTPATT_FID 10 |
| 6715 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_TESTPATT_SLC 1:0 |
| 6716 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_TESTPATT_WIDTH 2 |
| 6717 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_TESTPATT_INT_SLC 1:0 |
| 6718 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_TESTPATT_POSITION 0 |
| 6719 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_TESTPATT_FMASK 64'b0000000000000000000000000000000000000000000000000000000000000011 |
| 6720 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_TESTPATT_HW_LD_MASK 64'b0000000000000000000000000000000000000000000000000000000000000000 |
| 6721 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_TESTPATT_POR_VALUE 2'b11 |
| 6722 | `define FIRE_PLC_TLU_CTB_TLR_CSR_B_SERDES_MACRO_TEST_CFG_TESTPATT_FIELD_NAME "testpatt" |
| 6723 | |
| 6724 | |
| 6725 | #endif |