| 1 | // ========== Copyright Header Begin ========================================== |
| 2 | // |
| 3 | // OpenSPARC T2 Processor File: fbdimm_ch_mem.v |
| 4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved |
| 5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. |
| 6 | // |
| 7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 8 | // |
| 9 | // This program is free software; you can redistribute it and/or modify |
| 10 | // it under the terms of the GNU General Public License as published by |
| 11 | // the Free Software Foundation; version 2 of the License. |
| 12 | // |
| 13 | // This program is distributed in the hope that it will be useful, |
| 14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | // GNU General Public License for more details. |
| 17 | // |
| 18 | // You should have received a copy of the GNU General Public License |
| 19 | // along with this program; if not, write to the Free Software |
| 20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 21 | // |
| 22 | // For the avoidance of doubt, and except that if any non-GPL license |
| 23 | // choice is available it will apply instead, Sun elects to use only |
| 24 | // the General Public License version 2 (GPLv2) at this time for any |
| 25 | // software where a choice of GPL license versions is made |
| 26 | // available with the language indicating that GPLv2 or any later version |
| 27 | // may be used, or where a choice of which version of the GPL is applied is |
| 28 | // otherwise unspecified. |
| 29 | // |
| 30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
| 31 | // CA 95054 USA or visit www.sun.com if you need additional information or |
| 32 | // have any questions. |
| 33 | // |
| 34 | // ========== Copyright Header End ============================================ |
| 35 | module fbdimm_ch_mem ( /*AUTOARG*/ |
| 36 | // inputs |
| 37 | XXPS, XXPS_BAR, |
| 38 | //outputs |
| 39 | XXPN, XXPN_BAR, |
| 40 | XXCLK, XXERR_EN |
| 41 | `ifdef AXIS_DDR2_MODEL |
| 42 | ,dq |
| 43 | `endif |
| 44 | ); |
| 45 | |
| 46 | // Parameters |
| 47 | parameter NB_LINK = 14; |
| 48 | parameter SB_LINK = 10; |
| 49 | |
| 50 | `ifdef IDT_FBDIMM |
| 51 | `include "idt_parameter.h" |
| 52 | `endif |
| 53 | |
| 54 | `ifdef NEC_FBDIMM |
| 55 | `include "nec_parameter.h" |
| 56 | `endif |
| 57 | |
| 58 | `ifdef MICRON_FBDIMM |
| 59 | `include "micron_bench_parameter.h" |
| 60 | `endif |
| 61 | |
| 62 | // Inputs/Outputs |
| 63 | output [NB_LINK-1:0] XXPN,XXPN_BAR; // primary northbound |
| 64 | input [SB_LINK-1:0] XXPS,XXPS_BAR; // primary southbound |
| 65 | input XXCLK; |
| 66 | input XXERR_EN; |
| 67 | `ifdef AXIS_DDR2_MODEL |
| 68 | inout [71:0] dq; |
| 69 | `endif |
| 70 | // internal registers/wires |
| 71 | wire [NB_LINK-1:0] fbdimm0_sn,fbdimm1_sn,fbdimm2_sn,fbdimm3_sn; |
| 72 | wire [NB_LINK-1:0] fbdimm0_sn_,fbdimm1_sn_,fbdimm2_sn_,fbdimm3_sn_; |
| 73 | wire [NB_LINK-1:0] fbdimm4_sn,fbdimm5_sn,fbdimm6_sn,fbdimm7_sn; |
| 74 | wire [NB_LINK-1:0] fbdimm4_sn_,fbdimm5_sn_,fbdimm6_sn_,fbdimm7_sn_; |
| 75 | wire [SB_LINK-1:0] fbdimm0_ss,fbdimm1_ss,fbdimm2_ss,fbdimm3_ss; |
| 76 | wire [SB_LINK-1:0] fbdimm0_ss_,fbdimm1_ss_,fbdimm2_ss_,fbdimm3_ss_; |
| 77 | wire [SB_LINK-1:0] fbdimm4_ss,fbdimm5_ss,fbdimm6_ss,fbdimm7_ss; |
| 78 | wire [SB_LINK-1:0] fbdimm4_ss_,fbdimm5_ss_,fbdimm6_ss_,fbdimm7_ss_; |
| 79 | |
| 80 | `ifdef IDT_FBDIMM |
| 81 | wire fbdimm_resetn; |
| 82 | wire idt_clk; |
| 83 | wire idt_clk24x; |
| 84 | wire [3:0] sa[7:0]; |
| 85 | assign fbdimm_resetn = tb_top.mcusat_fbdimm.chmon_rst; |
| 86 | assign sa[0] = 4'h0; |
| 87 | assign sa[1] = 4'h1; |
| 88 | assign sa[2] = 4'h2; |
| 89 | assign sa[3] = 4'h3; |
| 90 | assign sa[4] = 4'h4; |
| 91 | assign sa[5] = 4'h5; |
| 92 | assign sa[6] = 4'h6; |
| 93 | assign sa[7] = 4'h7; |
| 94 | `endif |
| 95 | |
| 96 | `ifdef NEC_FBDIMM |
| 97 | wire fbdimm_resetn; |
| 98 | wire nec_clk; |
| 99 | wire nec_clk24x; |
| 100 | wire [3:0] sa[7:0]; |
| 101 | assign fbdimm_resetn = tb_top.mcusat_fbdimm.chmon_rst; |
| 102 | assign sa[0] = 4'h0; |
| 103 | assign sa[1] = 4'h1; |
| 104 | assign sa[2] = 4'h2; |
| 105 | assign sa[3] = 4'h3; |
| 106 | assign sa[4] = 4'h4; |
| 107 | assign sa[5] = 4'h5; |
| 108 | assign sa[6] = 4'h6; |
| 109 | assign sa[7] = 4'h7; |
| 110 | `endif |
| 111 | |
| 112 | `ifdef INPHI_FBDIMM |
| 113 | wire fbdimm_resetn; |
| 114 | assign fbdimm_resetn = tb_top.mcusat_fbdimm.chmon_rst; |
| 115 | `endif |
| 116 | |
| 117 | `ifdef MICRON_FBDIMM |
| 118 | wire fbdimm_resetn; |
| 119 | wire micron_clk; |
| 120 | wire micron_clk24x; |
| 121 | wire [3:0] sa[7:0]; |
| 122 | assign fbdimm_resetn = tb_top.mcusat_fbdimm.chmon_rst; |
| 123 | assign sa[0] = 4'h0; |
| 124 | assign sa[1] = 4'h1; |
| 125 | assign sa[2] = 4'h2; |
| 126 | assign sa[3] = 4'h3; |
| 127 | assign sa[4] = 4'h4; |
| 128 | assign sa[5] = 4'h5; |
| 129 | assign sa[6] = 4'h6; |
| 130 | assign sa[7] = 4'h7; |
| 131 | `endif |
| 132 | |
| 133 | `ifdef MICRON_FBDIMM |
| 134 | CLK_GEN #( |
| 135 | .PERIOD (CLK_PERIOD) // FBD_LINK_MODEL0 |
| 136 | ) |
| 137 | CLK_GEN0 ( // CLK_GEN0 |
| 138 | .CLK1X (micron_clk), // CLK_GEN0 |
| 139 | .CLK24X (micron_clk24x) // CLK_GEN0 |
| 140 | ); // CLK_GEN0 |
| 141 | `endif |
| 142 | |
| 143 | `ifdef IDT_FBDIMM |
| 144 | CLK_GEN #( |
| 145 | .PERIOD (CLK_PERIOD) // FBD_LINK_MODEL0 |
| 146 | ) |
| 147 | CLK_GEN0 ( // CLK_GEN0 |
| 148 | .CLK1X (idt_clk), // CLK_GEN0 |
| 149 | .CLK24X (idt_clk24x) // CLK_GEN0 |
| 150 | ); // CLK_GEN0 |
| 151 | `endif |
| 152 | |
| 153 | |
| 154 | `ifdef NEC_FBDIMM |
| 155 | CLK_GEN #( |
| 156 | .PERIOD (CLK_PERIOD) // FBD_LINK_MODEL0 |
| 157 | ) |
| 158 | CLK_GEN0 ( // CLK_GEN0 |
| 159 | .CLK1X (nec_clk), // CLK_GEN0 |
| 160 | .CLK24X (nec_clk24x) // CLK_GEN0 |
| 161 | ); // CLK_GEN0 |
| 162 | `endif |
| 163 | |
| 164 | |
| 165 | reg [7:0] XXCLK_MASK; |
| 166 | initial begin // { |
| 167 | |
| 168 | if ($test$plusargs("1_FBDIMM")) // Number of DIMMS |
| 169 | XXCLK_MASK[7:0] = 8'b00000001; |
| 170 | else if ($test$plusargs("2_FBDIMMS")) |
| 171 | XXCLK_MASK[7:0] = 8'b00000011; |
| 172 | else if ($test$plusargs("3_FBDIMMS")) |
| 173 | XXCLK_MASK[7:0] = 8'b00000111; |
| 174 | else if ($test$plusargs("4_FBDIMMS")) |
| 175 | XXCLK_MASK[7:0] = 8'b00001111; |
| 176 | else if ($test$plusargs("5_FBDIMMS")) |
| 177 | XXCLK_MASK[7:0] = 8'b00011111; |
| 178 | else if ($test$plusargs("6_FBDIMMS")) |
| 179 | XXCLK_MASK[7:0] = 8'b00111111; |
| 180 | else if ($test$plusargs("7_FBDIMMS")) |
| 181 | XXCLK_MASK[7:0] = 8'b01111111; |
| 182 | else if ($test$plusargs("8_FBDIMMS")) |
| 183 | XXCLK_MASK[7:0] = 8'b11111111; |
| 184 | else |
| 185 | XXCLK_MASK[7:0] = 8'b00000001; |
| 186 | |
| 187 | end // } |
| 188 | |
| 189 | wire [7:0] XXCLK_G; |
| 190 | assign XXCLK_G[7:0] = {8{XXCLK}} & XXCLK_MASK[7:0]; |
| 191 | |
| 192 | |
| 193 | //------------- FBDIMM 0 --------------------// |
| 194 | `ifdef MICRON_FBDIMM |
| 195 | micron_fbdimm #(NB_LINK,SB_LINK,0) fbdimm0 ( .ps (XXPS), |
| 196 | .ps_bar (XXPS_BAR), |
| 197 | .sn (fbdimm0_sn), |
| 198 | .sn_bar (fbdimm0_sn_), |
| 199 | .pn (XXPN), |
| 200 | .pn_bar (XXPN_BAR), |
| 201 | .sa (sa[0]), |
| 202 | .ss (fbdimm0_ss), |
| 203 | .ss_bar (fbdimm0_ss_), |
| 204 | .reset_n (fbdimm_resetn), |
| 205 | `ifdef AXIS_DDR2_MODEL |
| 206 | .dq (dq), |
| 207 | `endif |
| 208 | .sclk (micron_clk)); |
| 209 | `else |
| 210 | `ifdef INPHI_FBDIMM |
| 211 | inphi_fbdimm #(NB_LINK,SB_LINK,0) fbdimm0 ( .ps (XXPS), |
| 212 | .ps_bar (XXPS_BAR), |
| 213 | .sn (fbdimm0_sn), |
| 214 | .sn_bar (fbdimm0_sn_), |
| 215 | .pn (XXPN), |
| 216 | .pn_bar (XXPN_BAR), |
| 217 | .ss (fbdimm0_ss), |
| 218 | .ss_bar (fbdimm0_ss_), |
| 219 | .reset_n (fbdimm_resetn), |
| 220 | .err_en (XXERR_EN), |
| 221 | `ifdef AXIS_DDR2_MODEL |
| 222 | .dq (dq), |
| 223 | `endif |
| 224 | .sclk (XXCLK)); |
| 225 | |
| 226 | `else |
| 227 | `ifdef IDT_FBDIMM |
| 228 | idt_fbdimm #(NB_LINK,SB_LINK,1) fbdimm0 ( .ps (XXPS), |
| 229 | .ps_bar (XXPS_BAR), |
| 230 | .sn (fbdimm0_sn), |
| 231 | .sn_bar (fbdimm0_sn_), |
| 232 | .pn (XXPN), |
| 233 | .pn_bar (XXPN_BAR), |
| 234 | .sa (sa[0]), |
| 235 | .ss (fbdimm0_ss), |
| 236 | .ss_bar (fbdimm0_ss_), |
| 237 | .reset_n (fbdimm_resetn), |
| 238 | .err_en (XXERR_EN), |
| 239 | .sclk (idt_clk)); |
| 240 | `else |
| 241 | `ifdef NEC_FBDIMM |
| 242 | nec_fbdimm #(NB_LINK,SB_LINK,1) fbdimm0 ( .ps (XXPS), |
| 243 | .ps_bar (XXPS_BAR), |
| 244 | .sn (fbdimm0_sn), |
| 245 | .sn_bar (fbdimm0_sn_), |
| 246 | .pn (XXPN), |
| 247 | .pn_bar (XXPN_BAR), |
| 248 | .sa (sa[0]), |
| 249 | .ss (fbdimm0_ss), |
| 250 | .ss_bar (fbdimm0_ss_), |
| 251 | .reset_n (fbdimm_resetn), |
| 252 | .err_en (XXERR_EN), |
| 253 | .sclk (nec_clk)); |
| 254 | `else |
| 255 | fbdimm #(NB_LINK,SB_LINK,0) fbdimm0 ( .ps (XXPS), |
| 256 | .ps_bar (XXPS_BAR), |
| 257 | .sn (fbdimm0_sn), |
| 258 | .sn_bar (fbdimm0_sn_), |
| 259 | .pn (XXPN), |
| 260 | .pn_bar (XXPN_BAR), |
| 261 | .ss (fbdimm0_ss), |
| 262 | .ss_bar (fbdimm0_ss_), |
| 263 | `ifdef AXIS_DDR2_MODEL |
| 264 | .dq (dq), |
| 265 | `endif |
| 266 | .err_en (XXERR_EN), |
| 267 | .sclk (XXCLK)); |
| 268 | `endif |
| 269 | `endif |
| 270 | `endif |
| 271 | `endif |
| 272 | |
| 273 | `ifndef FBDIMM_NUM_1 |
| 274 | //------------- FBDIMM 1 --------------------// |
| 275 | `ifdef MICRON_FBDIMM |
| 276 | micron_fbdimm #(NB_LINK,SB_LINK,1) fbdimm1 ( .ps (fbdimm0_ss), |
| 277 | .ps_bar (fbdimm0_ss_), |
| 278 | .sn (fbdimm1_sn), |
| 279 | .sn_bar (fbdimm1_sn_), |
| 280 | .pn (fbdimm0_sn), |
| 281 | .pn_bar (fbdimm0_sn_), |
| 282 | .sa (sa[1]), |
| 283 | .ss (fbdimm1_ss), |
| 284 | .ss_bar (fbdimm1_ss_), |
| 285 | .reset_n (fbdimm_resetn), |
| 286 | .sclk (micron_clk)); |
| 287 | `else |
| 288 | `ifdef INPHI_FBDIMM |
| 289 | inphi_fbdimm #(NB_LINK,SB_LINK,1) fbdimm1 ( .ps (fbdimm0_ss), |
| 290 | .ps_bar (fbdimm0_ss_), |
| 291 | .sn (fbdimm1_sn), |
| 292 | .sn_bar (fbdimm1_sn_), |
| 293 | .pn (fbdimm0_sn), |
| 294 | .pn_bar (fbdimm0_sn_), |
| 295 | .ss (fbdimm1_ss), |
| 296 | .ss_bar (fbdimm1_ss_), |
| 297 | .err_en (XXERR_EN), |
| 298 | .reset_n (fbdimm_resetn), |
| 299 | .sclk (XXCLK)); |
| 300 | |
| 301 | `else |
| 302 | `ifdef IDT_FBDIMM |
| 303 | idt_fbdimm #(NB_LINK,SB_LINK,1) fbdimm1 ( |
| 304 | .ps (fbdimm0_ss), |
| 305 | .ps_bar (fbdimm0_ss_), |
| 306 | .sn (fbdimm1_sn), |
| 307 | .sn_bar (fbdimm1_sn_), |
| 308 | .pn (fbdimm0_sn), |
| 309 | .pn_bar (fbdimm0_sn_), |
| 310 | .sa (sa[1]), |
| 311 | .ss (fbdimm1_ss), |
| 312 | .ss_bar (fbdimm1_ss_), |
| 313 | .reset_n (fbdimm_resetn), |
| 314 | .err_en (XXERR_EN), |
| 315 | .sclk (idt_clk)); |
| 316 | `else |
| 317 | `ifdef NEC_FBDIMM |
| 318 | nec_fbdimm #(NB_LINK,SB_LINK,1) fbdimm1 ( |
| 319 | .ps (fbdimm0_ss), |
| 320 | .ps_bar (fbdimm0_ss_), |
| 321 | .sn (fbdimm1_sn), |
| 322 | .sn_bar (fbdimm1_sn_), |
| 323 | .pn (fbdimm0_sn), |
| 324 | .pn_bar (fbdimm0_sn_), |
| 325 | .sa (sa[1]), |
| 326 | .ss (fbdimm1_ss), |
| 327 | .ss_bar (fbdimm1_ss_), |
| 328 | .reset_n (fbdimm_resetn), |
| 329 | .err_en (XXERR_EN), |
| 330 | .sclk (nec_clk)); |
| 331 | `else |
| 332 | fbdimm #(NB_LINK,SB_LINK,1) fbdimm1 ( .ps (fbdimm0_ss), |
| 333 | .ps_bar (fbdimm0_ss_), |
| 334 | .sn (fbdimm1_sn), |
| 335 | .sn_bar (fbdimm1_sn_), |
| 336 | .pn (fbdimm0_sn), |
| 337 | .pn_bar (fbdimm0_sn_), |
| 338 | .ss (fbdimm1_ss), |
| 339 | .ss_bar (fbdimm1_ss_), |
| 340 | .err_en (XXERR_EN), |
| 341 | .sclk (XXCLK_G[1])); |
| 342 | `endif |
| 343 | `endif |
| 344 | `endif |
| 345 | `endif |
| 346 | |
| 347 | `ifndef FBDIMM_NUM_2 |
| 348 | //------------- FBDIMM 2 --------------------// |
| 349 | `ifdef MICRON_FBDIMM |
| 350 | micron_fbdimm #(NB_LINK,SB_LINK,2) fbdimm2 ( .ps (fbdimm1_ss), |
| 351 | .ps_bar (fbdimm1_ss_), |
| 352 | .sn (fbdimm2_sn), |
| 353 | .sn_bar (fbdimm2_sn_), |
| 354 | .pn (fbdimm1_sn), |
| 355 | .pn_bar (fbdimm1_sn_), |
| 356 | .sa (sa[2]), |
| 357 | .ss (fbdimm2_ss), |
| 358 | .ss_bar (fbdimm2_ss_), |
| 359 | .reset_n (fbdimm_resetn), |
| 360 | .sclk (micron_clk)); |
| 361 | `else |
| 362 | `ifdef INPHI_FBDIMM |
| 363 | inphi_fbdimm #(NB_LINK,SB_LINK,2) fbdimm2 ( .ps (fbdimm1_ss), |
| 364 | .ps_bar (fbdimm1_ss_), |
| 365 | .sn (fbdimm2_sn), |
| 366 | .sn_bar (fbdimm2_sn_), |
| 367 | .pn (fbdimm1_sn), |
| 368 | .pn_bar (fbdimm1_sn_), |
| 369 | .ss (fbdimm2_ss), |
| 370 | .ss_bar (fbdimm2_ss_), |
| 371 | .err_en (XXERR_EN), |
| 372 | .reset_n (fbdimm_resetn), |
| 373 | .sclk (XXCLK)); |
| 374 | |
| 375 | `else |
| 376 | `ifdef IDT_FBDIMM |
| 377 | idt_fbdimm #(NB_LINK,SB_LINK,2) fbdimm2 ( .ps (fbdimm1_ss), |
| 378 | .ps_bar (fbdimm1_ss_), |
| 379 | .sn (fbdimm2_sn), |
| 380 | .sn_bar (fbdimm2_sn_), |
| 381 | .pn (fbdimm1_sn), |
| 382 | .pn_bar (fbdimm1_sn_), |
| 383 | .sa (sa[2]), |
| 384 | .ss (fbdimm2_ss), |
| 385 | .ss_bar (fbdimm2_ss_), |
| 386 | .reset_n (fbdimm_resetn), |
| 387 | .err_en (XXERR_EN), |
| 388 | .sclk (idt_clk)); |
| 389 | `else |
| 390 | `ifdef NEC_FBDIMM |
| 391 | nec_fbdimm #(NB_LINK,SB_LINK,2) fbdimm2 ( .ps (fbdimm1_ss), |
| 392 | .ps_bar (fbdimm1_ss_), |
| 393 | .sn (fbdimm2_sn), |
| 394 | .sn_bar (fbdimm2_sn_), |
| 395 | .pn (fbdimm1_sn), |
| 396 | .pn_bar (fbdimm1_sn_), |
| 397 | .sa (sa[2]), |
| 398 | .ss (fbdimm2_ss), |
| 399 | .ss_bar (fbdimm2_ss_), |
| 400 | .reset_n (fbdimm_resetn), |
| 401 | .err_en (XXERR_EN), |
| 402 | .sclk (nec_clk)); |
| 403 | `else |
| 404 | fbdimm #(NB_LINK,SB_LINK,2) fbdimm2 ( .ps (fbdimm1_ss), |
| 405 | .ps_bar (fbdimm1_ss_), |
| 406 | .sn (fbdimm2_sn), |
| 407 | .sn_bar (fbdimm2_sn_), |
| 408 | .pn (fbdimm1_sn), |
| 409 | .pn_bar (fbdimm1_sn_), |
| 410 | .ss (fbdimm2_ss), |
| 411 | .ss_bar (fbdimm2_ss_), |
| 412 | .err_en (XXERR_EN), |
| 413 | .sclk (XXCLK_G[2])); |
| 414 | `endif |
| 415 | `endif |
| 416 | `endif |
| 417 | `endif |
| 418 | |
| 419 | `ifndef FBDIMM_NUM_3 |
| 420 | //------------- FBDIMM 3 --------------------// |
| 421 | `ifdef MICRON_FBDIMM |
| 422 | micron_fbdimm #(NB_LINK,SB_LINK,3) fbdimm3 ( .ps (fbdimm2_ss), |
| 423 | .ps_bar (fbdimm2_ss_), |
| 424 | .sn (fbdimm3_sn), |
| 425 | .sn_bar (fbdimm3_sn_), |
| 426 | .pn (fbdimm2_sn), |
| 427 | .pn_bar (fbdimm2_sn_), |
| 428 | .sa (sa[3]), |
| 429 | .ss (fbdimm3_ss), |
| 430 | .ss_bar (fbdimm3_ss_), |
| 431 | .reset_n (fbdimm_resetn), |
| 432 | .sclk (micron_clk)); |
| 433 | `else |
| 434 | `ifdef INPHI_FBDIMM |
| 435 | inphi_fbdimm #(NB_LINK,SB_LINK,3) fbdimm3 ( .ps (fbdimm2_ss), |
| 436 | .ps_bar (fbdimm2_ss_), |
| 437 | .sn (fbdimm3_sn), |
| 438 | .sn_bar (fbdimm3_sn_), |
| 439 | .pn (fbdimm2_sn), |
| 440 | .pn_bar (fbdimm2_sn_), |
| 441 | .ss (fbdimm3_ss), |
| 442 | .ss_bar (fbdimm3_ss_), |
| 443 | .err_en (XXERR_EN), |
| 444 | .reset_n (fbdimm_resetn), |
| 445 | .sclk (XXCLK)); |
| 446 | `else |
| 447 | `ifdef IDT_FBDIMM |
| 448 | idt_fbdimm #(NB_LINK,SB_LINK,3) fbdimm3 ( .ps (fbdimm2_ss), |
| 449 | .ps_bar (fbdimm2_ss_), |
| 450 | .sn (fbdimm3_sn), |
| 451 | .sn_bar (fbdimm3_sn_), |
| 452 | .pn (fbdimm2_sn), |
| 453 | .pn_bar (fbdimm2_sn_), |
| 454 | .sa (sa[3]), |
| 455 | .ss (fbdimm3_ss), |
| 456 | .ss_bar (fbdimm3_ss_), |
| 457 | .reset_n (fbdimm_resetn), |
| 458 | .err_en (XXERR_EN), |
| 459 | .sclk (idt_clk)); |
| 460 | `else |
| 461 | `ifdef NEC_FBDIMM |
| 462 | nec_fbdimm #(NB_LINK,SB_LINK,3) fbdimm3 ( .ps (fbdimm2_ss), |
| 463 | .ps_bar (fbdimm2_ss_), |
| 464 | .sn (fbdimm3_sn), |
| 465 | .sn_bar (fbdimm3_sn_), |
| 466 | .pn (fbdimm2_sn), |
| 467 | .pn_bar (fbdimm2_sn_), |
| 468 | .sa (sa[3]), |
| 469 | .ss (fbdimm3_ss), |
| 470 | .ss_bar (fbdimm3_ss_), |
| 471 | .reset_n (fbdimm_resetn), |
| 472 | .err_en (XXERR_EN), |
| 473 | .sclk (nec_clk)); |
| 474 | `else |
| 475 | fbdimm #(NB_LINK,SB_LINK,3) fbdimm3 ( .ps (fbdimm2_ss), |
| 476 | .ps_bar (fbdimm2_ss_), |
| 477 | .sn (fbdimm3_sn), |
| 478 | .sn_bar (fbdimm3_sn_), |
| 479 | .pn (fbdimm2_sn), |
| 480 | .pn_bar (fbdimm2_sn_), |
| 481 | .ss (fbdimm3_ss), |
| 482 | .ss_bar (fbdimm3_ss_), |
| 483 | .err_en (XXERR_EN), |
| 484 | .sclk (XXCLK_G[3])); |
| 485 | `endif |
| 486 | `endif |
| 487 | `endif |
| 488 | `endif |
| 489 | |
| 490 | `ifndef FBDIMM_NUM_4 |
| 491 | //------------- FBDIMM 4 --------------------// |
| 492 | `ifdef MICRON_FBDIMM |
| 493 | micron_fbdimm #(NB_LINK,SB_LINK,4) fbdimm4 ( .ps (fbdimm3_ss), |
| 494 | .ps_bar (fbdimm3_ss_), |
| 495 | .sn (fbdimm4_sn), |
| 496 | .sn_bar (fbdimm4_sn_), |
| 497 | .pn (fbdimm3_sn), |
| 498 | .pn_bar (fbdimm3_sn_), |
| 499 | .sa (sa[4]), |
| 500 | .ss (fbdimm4_ss), |
| 501 | .ss_bar (fbdimm4_ss_), |
| 502 | .reset_n (fbdimm_resetn), |
| 503 | .sclk (micron_clk)); |
| 504 | `else |
| 505 | `ifdef INPHI_FBDIMM |
| 506 | inphi_fbdimm #(NB_LINK,SB_LINK,4) fbdimm4 ( .ps (fbdimm3_ss), |
| 507 | .ps_bar (fbdimm3_ss_), |
| 508 | .sn (fbdimm4_sn), |
| 509 | .sn_bar (fbdimm4_sn_), |
| 510 | .pn (fbdimm3_sn), |
| 511 | .pn_bar (fbdimm3_sn_), |
| 512 | .ss (fbdimm4_ss), |
| 513 | .ss_bar (fbdimm4_ss_), |
| 514 | .err_en (XXERR_EN), |
| 515 | .reset_n (fbdimm_resetn), |
| 516 | .sclk (XXCLK)); |
| 517 | |
| 518 | `else |
| 519 | `ifdef IDT_FBDIMM |
| 520 | idt_fbdimm #(NB_LINK,SB_LINK,4) fbdimm4 ( .ps (fbdimm3_ss), |
| 521 | .ps_bar (fbdimm3_ss_), |
| 522 | .sn (fbdimm4_sn), |
| 523 | .sn_bar (fbdimm4_sn_), |
| 524 | .pn (fbdimm3_sn), |
| 525 | .pn_bar (fbdimm3_sn_), |
| 526 | .sa (sa[4]), |
| 527 | .ss (fbdimm4_ss), |
| 528 | .ss_bar (fbdimm4_ss_), |
| 529 | .reset_n (fbdimm_resetn), |
| 530 | .err_en (XXERR_EN), |
| 531 | .sclk (idt_clk)); |
| 532 | `else |
| 533 | `ifdef NEC_FBDIMM |
| 534 | nec_fbdimm #(NB_LINK,SB_LINK,4) fbdimm4 ( .ps (fbdimm3_ss), |
| 535 | .ps_bar (fbdimm3_ss_), |
| 536 | .sn (fbdimm4_sn), |
| 537 | .sn_bar (fbdimm4_sn_), |
| 538 | .pn (fbdimm3_sn), |
| 539 | .pn_bar (fbdimm3_sn_), |
| 540 | .sa (sa[4]), |
| 541 | .ss (fbdimm4_ss), |
| 542 | .ss_bar (fbdimm4_ss_), |
| 543 | .reset_n (fbdimm_resetn), |
| 544 | .err_en (XXERR_EN), |
| 545 | .sclk (nec_clk)); |
| 546 | `else |
| 547 | fbdimm #(NB_LINK,SB_LINK,4) fbdimm4 ( .ps (fbdimm3_ss), |
| 548 | .ps_bar (fbdimm3_ss_), |
| 549 | .sn (fbdimm4_sn), |
| 550 | .sn_bar (fbdimm4_sn_), |
| 551 | .pn (fbdimm3_sn), |
| 552 | .pn_bar (fbdimm3_sn_), |
| 553 | .ss (fbdimm4_ss), |
| 554 | .ss_bar (fbdimm4_ss_), |
| 555 | .err_en (XXERR_EN), |
| 556 | .sclk (XXCLK_G[4])); |
| 557 | `endif |
| 558 | `endif |
| 559 | `endif |
| 560 | `endif |
| 561 | |
| 562 | `ifndef FBDIMM_NUM_5 |
| 563 | //------------- FBDIMM 5 --------------------// |
| 564 | `ifdef MICRON_FBDIMM |
| 565 | micron_fbdimm #(NB_LINK,SB_LINK,5) fbdimm5 ( .ps (fbdimm4_ss), |
| 566 | .ps_bar (fbdimm4_ss_), |
| 567 | .sn (fbdimm5_sn), |
| 568 | .sn_bar (fbdimm5_sn_), |
| 569 | .pn (fbdimm4_sn), |
| 570 | .pn_bar (fbdimm4_sn_), |
| 571 | .sa (sa[5]), |
| 572 | .ss (fbdimm5_ss), |
| 573 | .ss_bar (fbdimm5_ss_), |
| 574 | .reset_n (fbdimm_resetn), |
| 575 | .sclk (micron_clk)); |
| 576 | `else |
| 577 | `ifdef INPHI_FBDIMM |
| 578 | inphi_fbdimm #(NB_LINK,SB_LINK,5) fbdimm5 ( .ps (fbdimm4_ss), |
| 579 | .ps_bar (fbdimm4_ss_), |
| 580 | .sn (fbdimm5_sn), |
| 581 | .sn_bar (fbdimm5_sn_), |
| 582 | .pn (fbdimm4_sn), |
| 583 | .pn_bar (fbdimm4_sn_), |
| 584 | .ss (fbdimm5_ss), |
| 585 | .ss_bar (fbdimm5_ss_), |
| 586 | .err_en (XXERR_EN), |
| 587 | .reset_n (fbdimm_resetn), |
| 588 | .sclk (XXCLK)); |
| 589 | `else |
| 590 | `ifdef IDT_FBDIMM |
| 591 | idt_fbdimm #(NB_LINK,SB_LINK,5) fbdimm5 ( .ps (fbdimm4_ss), |
| 592 | .ps_bar (fbdimm4_ss_), |
| 593 | .sn (fbdimm5_sn), |
| 594 | .sn_bar (fbdimm5_sn_), |
| 595 | .pn (fbdimm4_sn), |
| 596 | .pn_bar (fbdimm4_sn_), |
| 597 | .sa (sa[5]), |
| 598 | .ss (fbdimm5_ss), |
| 599 | .ss_bar (fbdimm5_ss_), |
| 600 | .reset_n (fbdimm_resetn), |
| 601 | .err_en (XXERR_EN), |
| 602 | .sclk (idt_clk)); |
| 603 | `else |
| 604 | `ifdef NEC_FBDIMM |
| 605 | nec_fbdimm #(NB_LINK,SB_LINK,5) fbdimm5 ( .ps (fbdimm4_ss), |
| 606 | .ps_bar (fbdimm4_ss_), |
| 607 | .sn (fbdimm5_sn), |
| 608 | .sn_bar (fbdimm5_sn_), |
| 609 | .pn (fbdimm4_sn), |
| 610 | .pn_bar (fbdimm4_sn_), |
| 611 | .sa (sa[5]), |
| 612 | .ss (fbdimm5_ss), |
| 613 | .ss_bar (fbdimm5_ss_), |
| 614 | .reset_n (fbdimm_resetn), |
| 615 | .err_en (XXERR_EN), |
| 616 | .sclk (nec_clk)); |
| 617 | `else |
| 618 | fbdimm #(NB_LINK,SB_LINK,5) fbdimm5 ( .ps (fbdimm4_ss), |
| 619 | .ps_bar (fbdimm4_ss_), |
| 620 | .sn (fbdimm5_sn), |
| 621 | .sn_bar (fbdimm5_sn_), |
| 622 | .pn (fbdimm4_sn), |
| 623 | .pn_bar (fbdimm4_sn_), |
| 624 | .ss (fbdimm5_ss), |
| 625 | .ss_bar (fbdimm5_ss_), |
| 626 | .err_en (XXERR_EN), |
| 627 | .sclk (XXCLK_G[5])); |
| 628 | `endif |
| 629 | `endif |
| 630 | `endif |
| 631 | `endif |
| 632 | |
| 633 | `ifndef FBDIMM_NUM_6 |
| 634 | //------------- FBDIMM 6 --------------------// |
| 635 | `ifdef MICRON_FBDIMM |
| 636 | micron_fbdimm #(NB_LINK,SB_LINK,6) fbdimm6 ( .ps (fbdimm5_ss), |
| 637 | .ps_bar (fbdimm5_ss_), |
| 638 | .sn (fbdimm6_sn), |
| 639 | .sn_bar (fbdimm6_sn_), |
| 640 | .pn (fbdimm5_sn), |
| 641 | .pn_bar (fbdimm5_sn_), |
| 642 | .sa (sa[6]), |
| 643 | .ss (fbdimm6_ss), |
| 644 | .ss_bar (fbdimm6_ss_), |
| 645 | .reset_n (fbdimm_resetn), |
| 646 | .sclk (micron_clk)); |
| 647 | `else |
| 648 | `ifdef INPHI_FBDIMM |
| 649 | inphi_fbdimm #(NB_LINK,SB_LINK,6) fbdimm6 ( .ps (fbdimm5_ss), |
| 650 | .ps_bar (fbdimm5_ss_), |
| 651 | .sn (fbdimm6_sn), |
| 652 | .sn_bar (fbdimm6_sn_), |
| 653 | .pn (fbdimm5_sn), |
| 654 | .pn_bar (fbdimm5_sn_), |
| 655 | .ss (fbdimm6_ss), |
| 656 | .ss_bar (fbdimm6_ss_), |
| 657 | .err_en (XXERR_EN), |
| 658 | .reset_n (fbdimm_resetn), |
| 659 | .sclk (XXCLK)); |
| 660 | `else |
| 661 | `ifdef IDT_FBDIMM |
| 662 | idt_fbdimm #(NB_LINK,SB_LINK,6) fbdimm6 ( .ps (fbdimm5_ss), |
| 663 | .ps_bar (fbdimm5_ss_), |
| 664 | .sn (fbdimm6_sn), |
| 665 | .sn_bar (fbdimm6_sn_), |
| 666 | .pn (fbdimm5_sn), |
| 667 | .pn_bar (fbdimm5_sn_), |
| 668 | .sa (sa[6]), |
| 669 | .ss (fbdimm6_ss), |
| 670 | .ss_bar (fbdimm6_ss_), |
| 671 | .reset_n (fbdimm_resetn), |
| 672 | .err_en (XXERR_EN), |
| 673 | .sclk (idt_clk)); |
| 674 | `else |
| 675 | `ifdef NEC_FBDIMM |
| 676 | nec_fbdimm #(NB_LINK,SB_LINK,6) fbdimm6 ( .ps (fbdimm5_ss), |
| 677 | .ps_bar (fbdimm5_ss_), |
| 678 | .sn (fbdimm6_sn), |
| 679 | .sn_bar (fbdimm6_sn_), |
| 680 | .pn (fbdimm5_sn), |
| 681 | .pn_bar (fbdimm5_sn_), |
| 682 | .sa (sa[6]), |
| 683 | .ss (fbdimm6_ss), |
| 684 | .ss_bar (fbdimm6_ss_), |
| 685 | .reset_n (fbdimm_resetn), |
| 686 | .err_en (XXERR_EN), |
| 687 | .sclk (nec_clk)); |
| 688 | `else |
| 689 | fbdimm #(NB_LINK,SB_LINK,6) fbdimm6 ( .ps (fbdimm5_ss), |
| 690 | .ps_bar (fbdimm5_ss_), |
| 691 | .sn (fbdimm6_sn), |
| 692 | .sn_bar (fbdimm6_sn_), |
| 693 | .pn (fbdimm5_sn), |
| 694 | .pn_bar (fbdimm5_sn_), |
| 695 | .ss (fbdimm6_ss), |
| 696 | .ss_bar (fbdimm6_ss_), |
| 697 | .err_en (XXERR_EN), |
| 698 | .sclk (XXCLK_G[6])); |
| 699 | `endif |
| 700 | `endif |
| 701 | `endif |
| 702 | `endif |
| 703 | |
| 704 | `ifndef FBDIMM_NUM_7 |
| 705 | //------------- FBDIMM 7 --------------------// |
| 706 | `ifdef MICRON_FBDIMM |
| 707 | micron_fbdimm #(NB_LINK,SB_LINK,7) fbdimm7 ( .ps (fbdimm6_ss), |
| 708 | .ps_bar (fbdimm6_ss_), |
| 709 | .sn (fbdimm7_sn), |
| 710 | .sn_bar (fbdimm7_sn_), |
| 711 | .pn (fbdimm6_sn), |
| 712 | .pn_bar (fbdimm6_sn_), |
| 713 | .sa (sa[7]), |
| 714 | .ss (fbdimm7_ss), |
| 715 | .ss_bar (fbdimm7_ss_), |
| 716 | .reset_n (fbdimm_resetn), |
| 717 | .sclk (micron_clk)); |
| 718 | `else |
| 719 | `ifdef INPHI_FBDIMM |
| 720 | inphi_fbdimm #(NB_LINK,SB_LINK,7) fbdimm7 ( .ps (fbdimm6_ss), |
| 721 | .ps_bar (fbdimm6_ss_), |
| 722 | .sn (fbdimm7_sn), |
| 723 | .sn_bar (fbdimm7_sn_), |
| 724 | .pn (fbdimm6_sn), |
| 725 | .pn_bar (fbdimm6_sn_), |
| 726 | .ss (fbdimm7_ss), |
| 727 | .ss_bar (fbdimm7_ss_), |
| 728 | .err_en (XXERR_EN), |
| 729 | .reset_n (fbdimm_resetn), |
| 730 | .sclk (XXCLK)); |
| 731 | `else |
| 732 | `ifdef IDT_FBDIMM |
| 733 | idt_fbdimm #(NB_LINK,SB_LINK,7) fbdimm7 ( .ps (fbdimm6_ss), |
| 734 | .ps_bar (fbdimm6_ss_), |
| 735 | .sn (fbdimm7_sn), |
| 736 | .sn_bar (fbdimm7_sn_), |
| 737 | .pn (fbdimm6_sn), |
| 738 | .pn_bar (fbdimm6_sn_), |
| 739 | .sa (sa[7]), |
| 740 | .ss (fbdimm7_ss), |
| 741 | .ss_bar (fbdimm7_ss_), |
| 742 | .reset_n (fbdimm_resetn), |
| 743 | .err_en (XXERR_EN), |
| 744 | .sclk (idt_clk)); |
| 745 | `else |
| 746 | `ifdef NEC_FBDIMM |
| 747 | nec_fbdimm #(NB_LINK,SB_LINK,7) fbdimm7 ( .ps (fbdimm6_ss), |
| 748 | .ps_bar (fbdimm6_ss_), |
| 749 | .sn (fbdimm7_sn), |
| 750 | .sn_bar (fbdimm7_sn_), |
| 751 | .pn (fbdimm6_sn), |
| 752 | .pn_bar (fbdimm6_sn_), |
| 753 | .sa (sa[7]), |
| 754 | .ss (fbdimm7_ss), |
| 755 | .ss_bar (fbdimm7_ss_), |
| 756 | .reset_n (fbdimm_resetn), |
| 757 | .err_en (XXERR_EN), |
| 758 | .sclk (nec_clk)); |
| 759 | `else |
| 760 | fbdimm #(NB_LINK,SB_LINK,7) fbdimm7 ( .ps (fbdimm6_ss), |
| 761 | .ps_bar (fbdimm6_ss_), |
| 762 | .sn (fbdimm7_sn), |
| 763 | .sn_bar (fbdimm7_sn_), |
| 764 | .pn (fbdimm6_sn), |
| 765 | .pn_bar (fbdimm6_sn_), |
| 766 | .ss (fbdimm7_ss), |
| 767 | .ss_bar (fbdimm7_ss_), |
| 768 | .err_en (XXERR_EN), |
| 769 | .sclk (XXCLK_G[7])); |
| 770 | `endif |
| 771 | `endif |
| 772 | `endif |
| 773 | `endif |
| 774 | |
| 775 | `endif |
| 776 | `endif |
| 777 | `endif |
| 778 | `endif |
| 779 | `endif |
| 780 | `endif |
| 781 | `endif |
| 782 | |
| 783 | endmodule //fbdimm_ch_mem |