| 1 | // ========== Copyright Header Begin ========================================== |
| 2 | // |
| 3 | // OpenSPARC T2 Processor File: sun_amb.flist |
| 4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved |
| 5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. |
| 6 | // |
| 7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 8 | // |
| 9 | // This program is free software; you can redistribute it and/or modify |
| 10 | // it under the terms of the GNU General Public License as published by |
| 11 | // the Free Software Foundation; version 2 of the License. |
| 12 | // |
| 13 | // This program is distributed in the hope that it will be useful, |
| 14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | // GNU General Public License for more details. |
| 17 | // |
| 18 | // You should have received a copy of the GNU General Public License |
| 19 | // along with this program; if not, write to the Free Software |
| 20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 21 | // |
| 22 | // For the avoidance of doubt, and except that if any non-GPL license |
| 23 | // choice is available it will apply instead, Sun elects to use only |
| 24 | // the General Public License version 2 (GPLv2) at this time for any |
| 25 | // software where a choice of GPL license versions is made |
| 26 | // available with the language indicating that GPLv2 or any later version |
| 27 | // may be used, or where a choice of which version of the GPL is applied is |
| 28 | // otherwise unspecified. |
| 29 | // |
| 30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
| 31 | // CA 95054 USA or visit www.sun.com if you need additional information or |
| 32 | // have any questions. |
| 33 | // |
| 34 | // ========== Copyright Header End ============================================ |
| 35 | ../verilog/mem/fbdimm/design/global.h |
| 36 | ../verilog/mem/fbdimm/design/fbdimm.v |
| 37 | -v ../verilog/mem/fbdimm/design/fbdimm_clk_gen.v |
| 38 | -v ../verilog/mem/fbdimm/design/amb_top.v |
| 39 | -v ../verilog/mem/fbdimm/design/amb_init.v |
| 40 | -v ../verilog/mem/fbdimm/design/ddr_io.v |
| 41 | -v ../verilog/mem/fbdimm/design/crc.v |
| 42 | -v ../verilog/mem/fbdimm/design/voting_logic.v |
| 43 | -v ../verilog/mem/fbdimm/design/training_sequence_fsm.v |
| 44 | -v ../verilog/mem/fbdimm/design/dtm_training.v |
| 45 | -v ../verilog/mem/fbdimm/design/testing_state_fsm.v |
| 46 | -v ../verilog/mem/fbdimm/design/send_ts0.v |
| 47 | -v ../verilog/mem/fbdimm/design/sb_decode_crc.v |
| 48 | -v ../verilog/mem/fbdimm/design/polling_state_fsm.v |
| 49 | -v ../verilog/mem/fbdimm/design/nb_bit_lane_deskew.v |
| 50 | -v ../verilog/mem/fbdimm/design/nb_encode_crc.v |
| 51 | -v ../verilog/mem/fbdimm/design/nb_crc_error_injector.v |
| 52 | -v ../verilog/mem/fbdimm/design/sb_crc_error_injector.v |
| 53 | -v ../verilog/mem/fbdimm/design/idle_lfsr.v |
| 54 | -v ../verilog/mem/fbdimm/design/alert_lfsr.v |
| 55 | -v ../verilog/mem/fbdimm/design/config_state_fsm.v |
| 56 | -v ../verilog/mem/fbdimm/design/channel_mon.v |
| 57 | -v ../verilog/mem/fbdimm/design/fbdimm_nb_fsr.v |
| 58 | -v ../verilog/mem/fbdimm/design/fbdimm_sb_fsr.v |
| 59 | -v ../verilog/mem/fbdimm/library/delay.v |
| 60 | -v ../verilog/mem/fbdimm/library/library.v |
| 61 | -v ../verilog/mem/fbdimm/library/fifo/fifo.v |
| 62 | -v ../verilog/mem/fbdimm/library/fifo/rptr_empty.v |
| 63 | -v ../verilog/mem/fbdimm/library/fifo/sync_w2r.v |
| 64 | -v ../verilog/mem/fbdimm/library/fifo/fifomem.v |
| 65 | -v ../verilog/mem/fbdimm/library/fifo/sync_r2w.v |
| 66 | -v ../verilog/mem/fbdimm/library/fifo/wptr_full.v |