| 1 | // ========== Copyright Header Begin ========================================== |
| 2 | // |
| 3 | // OpenSPARC T2 Processor File: cpx_dpsa.v |
| 4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved |
| 5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. |
| 6 | // |
| 7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 8 | // |
| 9 | // This program is free software; you can redistribute it and/or modify |
| 10 | // it under the terms of the GNU General Public License as published by |
| 11 | // the Free Software Foundation; version 2 of the License. |
| 12 | // |
| 13 | // This program is distributed in the hope that it will be useful, |
| 14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | // GNU General Public License for more details. |
| 17 | // |
| 18 | // You should have received a copy of the GNU General Public License |
| 19 | // along with this program; if not, write to the Free Software |
| 20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 21 | // |
| 22 | // For the avoidance of doubt, and except that if any non-GPL license |
| 23 | // choice is available it will apply instead, Sun elects to use only |
| 24 | // the General Public License version 2 (GPLv2) at this time for any |
| 25 | // software where a choice of GPL license versions is made |
| 26 | // available with the language indicating that GPLv2 or any later version |
| 27 | // may be used, or where a choice of which version of the GPL is applied is |
| 28 | // otherwise unspecified. |
| 29 | // |
| 30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
| 31 | // CA 95054 USA or visit www.sun.com if you need additional information or |
| 32 | // have any questions. |
| 33 | // |
| 34 | // ========== Copyright Header End ============================================ |
| 35 | `ifndef FPGA |
| 36 | module cpx_dpsa ( |
| 37 | cpx_spc_data_x_, |
| 38 | arb_grant_l_a, |
| 39 | arb_q0_holdbar_l_a, |
| 40 | arb_qsel0_l_a, |
| 41 | arb_qsel1_l_a, |
| 42 | arb_shift_l_a, |
| 43 | arb_grant_r_a, |
| 44 | arb_q0_holdbar_r_a, |
| 45 | arb_qsel0_r_a, |
| 46 | arb_qsel1_r_a, |
| 47 | arb_shift_r_a, |
| 48 | io_cpx_data_a, |
| 49 | scache0_cpx_data_a, |
| 50 | scache1_cpx_data_a, |
| 51 | scache2_cpx_data_a, |
| 52 | scache3_cpx_data_a, |
| 53 | scache4_cpx_data_a, |
| 54 | scache5_cpx_data_a, |
| 55 | scache6_cpx_data_a, |
| 56 | scache7_cpx_data_a, |
| 57 | tcu_scan_en, |
| 58 | l2clk, |
| 59 | scan_in, |
| 60 | tcu_pce_ov, |
| 61 | ccx_aclk, |
| 62 | ccx_bclk, |
| 63 | scan_out); |
| 64 | wire [149:0] all_ones; |
| 65 | wire [4:0] mac0_rep_in; |
| 66 | wire [3:0] arb_grant_l_a_rep; |
| 67 | wire [3:0] arb_qsel0_l_a_rep; |
| 68 | wire [3:0] arb_qsel1_l_a_rep; |
| 69 | wire [3:0] arb_shift_l_a_rep; |
| 70 | wire [3:0] arb_q0_holdbar_l_a_rep; |
| 71 | wire [4:0] mac0_rep_out; |
| 72 | wire [4:0] mac1_rep_in; |
| 73 | wire [4:0] mac1_rep_out; |
| 74 | wire [4:0] mac2_rep_in; |
| 75 | wire [4:0] mac2_rep_out; |
| 76 | wire [4:0] mac3_rep_in; |
| 77 | wire [4:0] mac3_rep_out; |
| 78 | wire [4:0] mac4_rep_in; |
| 79 | wire [7:5] arb_grant_r_a_rep; |
| 80 | wire [7:5] arb_q0_holdbar_r_a_rep; |
| 81 | wire [7:5] arb_qsel0_r_a_rep; |
| 82 | wire [7:5] arb_qsel1_r_a_rep; |
| 83 | wire [7:5] arb_shift_r_a_rep; |
| 84 | wire [4:0] mac4_rep_out; |
| 85 | wire [4:0] mac5_rep_in; |
| 86 | wire [4:0] mac5_rep_out; |
| 87 | wire [4:0] mac6_rep_in; |
| 88 | wire [4:0] mac6_rep_out; |
| 89 | wire scan_rep_in; |
| 90 | wire [149:0] col8_data_x_; |
| 91 | wire tcu_scan_en_out_8_unused; |
| 92 | wire tcu_pce_ov_out_8_unused; |
| 93 | wire ccx_aclk_out_8_unused; |
| 94 | wire ccx_bclk_out_8_unused; |
| 95 | wire cpx_mac8_scanin; |
| 96 | wire cpx_mac8_scanout; |
| 97 | wire [6:0] tcu_scan_en_out; |
| 98 | wire [6:0] tcu_pce_ov_out; |
| 99 | wire [6:0] ccx_aclk_out; |
| 100 | wire [6:0] ccx_bclk_out; |
| 101 | wire [149:0] col1_data_x_; |
| 102 | wire cpx_mac0_scanin; |
| 103 | wire cpx_mac0_scanout; |
| 104 | wire [149:0] col2_data_x_; |
| 105 | wire cpx_mac1_scanin; |
| 106 | wire cpx_mac1_scanout; |
| 107 | wire [149:0] col3_data_x_; |
| 108 | wire cpx_mac2_scanin; |
| 109 | wire cpx_mac2_scanout; |
| 110 | wire [149:0] col4_data_x_; |
| 111 | wire cpx_mac3_scanin; |
| 112 | wire cpx_mac3_scanout; |
| 113 | wire [149:0] col5_data_x_; |
| 114 | wire cpx_mac4_scanin; |
| 115 | wire cpx_mac4_scanout; |
| 116 | wire [149:0] col6_data_x_; |
| 117 | wire cpx_mac5_scanin; |
| 118 | wire cpx_mac5_scanout; |
| 119 | wire [149:0] col7_data_x_; |
| 120 | wire cpx_mac6_scanin; |
| 121 | wire cpx_mac6_scanout; |
| 122 | wire tcu_scan_en_out_7_unused; |
| 123 | wire tcu_pce_ov_out_7_unused; |
| 124 | wire ccx_aclk_out_7_unused; |
| 125 | wire ccx_bclk_out_7_unused; |
| 126 | wire cpx_mac7_scanin; |
| 127 | wire cpx_mac7_scanout; |
| 128 | wire [7:4] arb_grant_l_a_unused; |
| 129 | wire [7:4] arb_q0_holdbar_l_a_unused; |
| 130 | wire [7:4] arb_qsel0_l_a_unused; |
| 131 | wire [7:4] arb_qsel1_l_a_unused; |
| 132 | wire [7:4] arb_shift_l_a_unused; |
| 133 | wire [8:0] arb_grant_r_a_unused; |
| 134 | wire [8:0] arb_q0_holdbar_r_a_unused; |
| 135 | wire [8:0] arb_qsel0_r_a_unused; |
| 136 | wire [8:0] arb_qsel1_r_a_unused; |
| 137 | wire [8:0] arb_shift_r_a_unused; |
| 138 | wire scan_rep_out; |
| 139 | |
| 140 | |
| 141 | |
| 142 | // Beginning of automatic outputs (from unused autoinst outputs) |
| 143 | output [149:0] cpx_spc_data_x_; // From mac4 of cpx_mcr_dp.v |
| 144 | // End of automatics |
| 145 | |
| 146 | // Beginning of automatic inputs (from unused autoinst inputs) |
| 147 | input [8:0] arb_grant_l_a; // To mac0 of cpx_mar_dp.v, ... |
| 148 | input [8:0] arb_q0_holdbar_l_a; // To mac0 of cpx_mar_dp.v, ... |
| 149 | input [8:0] arb_qsel0_l_a; // To mac0 of cpx_mar_dp.v, ... |
| 150 | input [8:0] arb_qsel1_l_a; // To mac0 of cpx_mar_dp.v, ... |
| 151 | input [8:0] arb_shift_l_a; // To mac0 of cpx_mar_dp.v, ... |
| 152 | input [8:0] arb_grant_r_a; // To mac0 of cpx_mar_dp.v, ... |
| 153 | input [8:0] arb_q0_holdbar_r_a; // To mac0 of cpx_mar_dp.v, ... |
| 154 | input [8:0] arb_qsel0_r_a; // To mac0 of cpx_mar_dp.v, ... |
| 155 | input [8:0] arb_qsel1_r_a; // To mac0 of cpx_mar_dp.v, ... |
| 156 | input [8:0] arb_shift_r_a; // To mac0 of cpx_mar_dp.v, ... |
| 157 | input [149:0] io_cpx_data_a; // To mac8 of cpx_mal_dp.v |
| 158 | input [149:0] scache0_cpx_data_a; // To mac0 of cpx_mar_dp.v |
| 159 | input [149:0] scache1_cpx_data_a; // To mac1 of cpx_mbr_dp.v |
| 160 | input [149:0] scache2_cpx_data_a; // To mac2 of cpx_mbr_dp.v |
| 161 | input [149:0] scache3_cpx_data_a; // To mac3 of cpx_mbr_dp.v |
| 162 | input [149:0] scache4_cpx_data_a; // To mac4 of cpx_mcr_dp.v |
| 163 | input [149:0] scache5_cpx_data_a; // To mac5 of cpx_mbl_dp.v |
| 164 | input [149:0] scache6_cpx_data_a; // To mac6 of cpx_mbl_dp.v |
| 165 | input [149:0] scache7_cpx_data_a; // To cpx_mac7 of cpx_mbl_dp.v |
| 166 | // End of automatics |
| 167 | |
| 168 | // globals |
| 169 | input tcu_scan_en ; |
| 170 | input l2clk; |
| 171 | input scan_in; |
| 172 | input tcu_pce_ov; // scan signals |
| 173 | input ccx_aclk; |
| 174 | input ccx_bclk; |
| 175 | output scan_out; |
| 176 | |
| 177 | // io scache2 scache0 scache3 scache1 scache7 scache5 scache6 scache4 |
| 178 | // | | | | | | | | | |
| 179 | // v v v v v v v v v |
| 180 | // mac8-> mac0 <- mac1 <-mac2 <- mac3 <- mac4 <- mac5 <- mac6 <- mac7 |
| 181 | // bl cl br br br br br br bl |
| 182 | // | |
| 183 | // ---buf-- |
| 184 | // | |
| 185 | // v |
| 186 | // to spccore |
| 187 | |
| 188 | assign all_ones[149:0] = 150'h3FFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFFF; |
| 189 | |
| 190 | |
| 191 | |
| 192 | // mac0 arb inputs go through 1 buffer |
| 193 | assign mac0_rep_in[4:0] = {arb_grant_l_a[2],arb_qsel0_l_a[2],arb_qsel1_l_a[2], |
| 194 | arb_shift_l_a[2],arb_q0_holdbar_l_a[2]}; |
| 195 | |
| 196 | assign {arb_grant_l_a_rep[2],arb_qsel0_l_a_rep[2],arb_qsel1_l_a_rep[2], |
| 197 | arb_shift_l_a_rep[2],arb_q0_holdbar_l_a_rep[2]} = mac0_rep_out[4:0]; |
| 198 | |
| 199 | // mac1 arb input go through 1 buffer |
| 200 | assign mac1_rep_in[4:0] = {arb_grant_l_a[0],arb_q0_holdbar_l_a[0],arb_qsel0_l_a[0], |
| 201 | arb_qsel1_l_a[0],arb_shift_l_a[0]}; |
| 202 | |
| 203 | assign {arb_grant_l_a_rep[0],arb_q0_holdbar_l_a_rep[0],arb_qsel0_l_a_rep[0], |
| 204 | arb_qsel1_l_a_rep[0],arb_shift_l_a_rep[0]} = mac1_rep_out[4:0]; |
| 205 | |
| 206 | // mac2 arb inputs go through 2 buffers |
| 207 | assign mac2_rep_in[4:0] = {arb_grant_l_a[3],arb_q0_holdbar_l_a[3],arb_qsel0_l_a[3], |
| 208 | arb_qsel1_l_a[3],arb_shift_l_a[3]}; |
| 209 | |
| 210 | assign {arb_grant_l_a_rep[3],arb_q0_holdbar_l_a_rep[3],arb_qsel0_l_a_rep[3], |
| 211 | arb_qsel1_l_a_rep[3],arb_shift_l_a_rep[3]} = mac2_rep_out[4:0]; |
| 212 | |
| 213 | // mac3 inputs go through 2 buffers |
| 214 | assign mac3_rep_in[4:0] = {arb_grant_l_a[1],arb_q0_holdbar_l_a[1],arb_qsel0_l_a[1], |
| 215 | arb_qsel1_l_a[1],arb_shift_l_a[1]}; |
| 216 | |
| 217 | assign {arb_grant_l_a_rep[1],arb_q0_holdbar_l_a_rep[1],arb_qsel0_l_a_rep[1], |
| 218 | arb_qsel1_l_a_rep[1],arb_shift_l_a_rep[1]} = mac3_rep_out[4:0]; |
| 219 | |
| 220 | // mac4 inputs go through 2 buffers |
| 221 | assign mac4_rep_in[4:0] = {arb_grant_r_a[7],arb_q0_holdbar_r_a[7],arb_qsel0_r_a[7], |
| 222 | arb_qsel1_r_a[7],arb_shift_r_a[7]}; |
| 223 | |
| 224 | assign {arb_grant_r_a_rep[7],arb_q0_holdbar_r_a_rep[7],arb_qsel0_r_a_rep[7], |
| 225 | arb_qsel1_r_a_rep[7],arb_shift_r_a_rep[7]} = mac4_rep_out[4:0]; |
| 226 | |
| 227 | // mac5 inputs go through 1 buffer |
| 228 | assign mac5_rep_in[4:0] = {arb_grant_r_a[5],arb_q0_holdbar_r_a[5],arb_qsel0_r_a[5], |
| 229 | arb_qsel1_r_a[5],arb_shift_r_a[5]}; |
| 230 | |
| 231 | assign {arb_grant_r_a_rep[5],arb_q0_holdbar_r_a_rep[5],arb_qsel0_r_a_rep[5], |
| 232 | arb_qsel1_r_a_rep[5],arb_shift_r_a_rep[5]} = mac5_rep_out[4:0]; |
| 233 | |
| 234 | // mac6 inputs go through 1 buffer |
| 235 | assign mac6_rep_in[4:0] = {arb_grant_r_a[6],arb_q0_holdbar_r_a[6],arb_qsel0_r_a[6], |
| 236 | arb_qsel1_r_a[6],arb_shift_r_a[6]}; |
| 237 | |
| 238 | assign {arb_grant_r_a_rep[6],arb_q0_holdbar_r_a_rep[6],arb_qsel0_r_a_rep[6], |
| 239 | arb_qsel1_r_a_rep[6],arb_shift_r_a_rep[6]} = mac6_rep_out[4:0]; |
| 240 | |
| 241 | assign scan_rep_in = scan_in; |
| 242 | |
| 243 | |
| 244 | |
| 245 | cpx_rep_dp cpx_rep(.mac0_rep_out(mac0_rep_out[4:0]), |
| 246 | .mac1_rep_out(mac1_rep_out[4:0]), |
| 247 | .mac2_rep_out(mac2_rep_out[4:0]), |
| 248 | .mac3_rep_out(mac3_rep_out[4:0]), |
| 249 | .mac4_rep_out(mac4_rep_out[4:0]), |
| 250 | .mac5_rep_out(mac5_rep_out[4:0]), |
| 251 | .mac6_rep_out(mac6_rep_out[4:0]), |
| 252 | .scan_rep_out(scan_rep_out), |
| 253 | .mac0_rep_in(mac0_rep_in[4:0]), |
| 254 | .mac1_rep_in(mac1_rep_in[4:0]), |
| 255 | .mac2_rep_in(mac2_rep_in[4:0]), |
| 256 | .mac3_rep_in(mac3_rep_in[4:0]), |
| 257 | .mac4_rep_in(mac4_rep_in[4:0]), |
| 258 | .mac5_rep_in(mac5_rep_in[4:0]), |
| 259 | .mac6_rep_in(mac6_rep_in[4:0]), |
| 260 | .scan_rep_in(scan_rep_in) |
| 261 | ); |
| 262 | |
| 263 | |
| 264 | /* |
| 265 | cpx_mbl_dp AUTO_TEMPLATE |
| 266 | ( |
| 267 | // Outputs |
| 268 | .data_out_x_ (col@_data_x_[149:0]), |
| 269 | // Inputs |
| 270 | .arb_grant_a(arb_grant_l_a[@]), |
| 271 | .arb_qsel0_a(arb_qsel0_l_a[@]), |
| 272 | .arb_qsel1_a(arb_qsel1_l_a[@]), |
| 273 | .arb_q0_holdbar_a(arb_q0_holdbar_l_a[@]), |
| 274 | .arb_shift_a(arb_shift_l_a[@]), |
| 275 | .src_cpx_data_a(io_cpx_data_a[149:0]), |
| 276 | .data_prev_x_(col@"(- @ 1)"_data_x_[149:0]), |
| 277 | .l2clk (l2clk)); |
| 278 | */ |
| 279 | |
| 280 | // do not use autoinstancing. |
| 281 | // connections have been modified to match the cpu floorplan |
| 282 | // src_pcx_data_a has to be manually connected. |
| 283 | |
| 284 | // input from io |
| 285 | cpx_mbl_dp cpx_mac8 ( |
| 286 | // Outputs |
| 287 | .data_out_x_ (col8_data_x_[149:0]), // Templated |
| 288 | .tcu_scan_en_out (tcu_scan_en_out_8_unused), |
| 289 | .tcu_pce_ov_out (tcu_pce_ov_out_8_unused), |
| 290 | .ccx_aclk_out (ccx_aclk_out_8_unused), |
| 291 | .ccx_bclk_out (ccx_bclk_out_8_unused), |
| 292 | // Inputs |
| 293 | .arb_grant_a (arb_grant_l_a[8]), // Templated |
| 294 | .arb_qsel0_a (arb_qsel0_l_a[8]), // Templated |
| 295 | .arb_qsel1_a (arb_qsel1_l_a[8]), // Templated |
| 296 | .arb_q0_holdbar_a (arb_q0_holdbar_l_a[8]), // Templated |
| 297 | .arb_shift_a (arb_shift_l_a[8]), // Templated |
| 298 | .src_cpx_data_a (io_cpx_data_a[149:0]), // Templated |
| 299 | .data_prev_x_ (all_ones[149:0]), |
| 300 | .scan_in(cpx_mac8_scanin), |
| 301 | .scan_out(cpx_mac8_scanout), |
| 302 | .l2clk (l2clk), // Templated |
| 303 | .tcu_scan_en (tcu_scan_en_out[0]), |
| 304 | .tcu_pce_ov (tcu_pce_ov_out[0]), |
| 305 | .ccx_aclk (ccx_aclk_out[0]), |
| 306 | .ccx_bclk (ccx_bclk_out[0]) |
| 307 | ); |
| 308 | |
| 309 | /* |
| 310 | cpx_mcl_dp AUTO_TEMPLATE |
| 311 | ( |
| 312 | // Outputs |
| 313 | .data_out_x_ (cpx_spc_data_x_[149:0]), |
| 314 | // Inputs |
| 315 | .arb_grant_a(arb_grant_l_a[@]), |
| 316 | .arb_qsel0_a(arb_qsel0_l_a[@]), |
| 317 | .arb_qsel1_a(arb_qsel1_l_a[@]), |
| 318 | .arb_q0_holdbar_a(arb_q0_holdbar_l_a[@]), |
| 319 | .arb_shift_a(arb_shift_l_a[@]), |
| 320 | .src_cpx_data_a(scache@_cpx_data_a[149:0]), |
| 321 | .data_crit_x_(col@"(+ @ 1)"_data_x_[149:0]), |
| 322 | .data_ncrit_x_(col@"(- @ 1)"_data_x_[149:0]), |
| 323 | .l2clk (l2clk)); |
| 324 | */ |
| 325 | |
| 326 | // input from sctag2 |
| 327 | cpx_mcl_dp cpx_mac0 ( |
| 328 | // Outputs |
| 329 | .data_out_x_ (cpx_spc_data_x_[149:0]), // Templated |
| 330 | .tcu_scan_en_out (tcu_scan_en_out[0]), |
| 331 | .tcu_pce_ov_out (tcu_pce_ov_out[0]), |
| 332 | .ccx_aclk_out (ccx_aclk_out[0]), |
| 333 | .ccx_bclk_out (ccx_bclk_out[0]), |
| 334 | // Inputs |
| 335 | .arb_grant_a (arb_grant_l_a_rep[2]), // Templated |
| 336 | .arb_qsel0_a (arb_qsel0_l_a_rep[2]), // Templated |
| 337 | .arb_qsel1_a (arb_qsel1_l_a_rep[2]), // Templated |
| 338 | .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[2]), // Templated |
| 339 | .arb_shift_a (arb_shift_l_a_rep[2]), // Templated |
| 340 | .src_cpx_data_a (scache2_cpx_data_a[149:0]), // Templated |
| 341 | .data_crit_x_ (col1_data_x_[149:0]), // Templated |
| 342 | .data_ncrit_x_ (col8_data_x_[149:0]), // Templated |
| 343 | .scan_in(cpx_mac0_scanin), |
| 344 | .scan_out(cpx_mac0_scanout), |
| 345 | .l2clk (l2clk), // Templated |
| 346 | .tcu_scan_en (tcu_scan_en_out[1]), |
| 347 | .tcu_pce_ov (tcu_pce_ov_out[1]), |
| 348 | .ccx_aclk (ccx_aclk_out[1]), |
| 349 | .ccx_bclk (ccx_bclk_out[1]) |
| 350 | ); |
| 351 | |
| 352 | |
| 353 | /* |
| 354 | cpx_mbr_dp AUTO_TEMPLATE |
| 355 | ( |
| 356 | // Outputs |
| 357 | .data_out_x_ (col@_data_x_[149:0]), |
| 358 | // Inputs |
| 359 | .arb_grant_a(arb_grant_l_a[@]), |
| 360 | .arb_qsel0_a(arb_qsel0_l_a[@]), |
| 361 | .arb_qsel1_a(arb_qsel1_l_a[@]), |
| 362 | .arb_q0_holdbar_a(arb_q0_holdbar_l_a[@]), |
| 363 | .arb_shift_a(arb_shift_l_a[@]), |
| 364 | .src_cpx_data_a(scache@_cpx_data_a[149:0]), |
| 365 | .data_prev_x_(col@"(+ @ 1)"_data_x_[149:0]), |
| 366 | .l2clk (l2clk)); |
| 367 | */ |
| 368 | |
| 369 | |
| 370 | // input from sctag0 |
| 371 | cpx_mbr_dp cpx_mac1 ( |
| 372 | // Outputs |
| 373 | .data_out_x_ (col1_data_x_[149:0]), // Templated |
| 374 | .tcu_scan_en_out (tcu_scan_en_out[1]), |
| 375 | .tcu_pce_ov_out (tcu_pce_ov_out[1]), |
| 376 | .ccx_aclk_out (ccx_aclk_out[1]), |
| 377 | .ccx_bclk_out (ccx_bclk_out[1]), |
| 378 | // Inputs |
| 379 | .arb_grant_a (arb_grant_l_a_rep[0]), // Templated |
| 380 | .arb_qsel0_a (arb_qsel0_l_a_rep[0]), // Templated |
| 381 | .arb_qsel1_a (arb_qsel1_l_a_rep[0]), // Templated |
| 382 | .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[0]), // Templated |
| 383 | .arb_shift_a (arb_shift_l_a_rep[0]), // Templated |
| 384 | .src_cpx_data_a (scache0_cpx_data_a[149:0]), // Templated |
| 385 | .data_prev_x_ (col2_data_x_[149:0]), // Templated |
| 386 | .scan_in(cpx_mac1_scanin), |
| 387 | .scan_out(cpx_mac1_scanout), |
| 388 | .l2clk (l2clk), // Templated |
| 389 | .tcu_scan_en (tcu_scan_en_out[2]), |
| 390 | .tcu_pce_ov (tcu_pce_ov_out[2]), |
| 391 | .ccx_aclk (ccx_aclk_out[2]), |
| 392 | .ccx_bclk (ccx_bclk_out[2]) |
| 393 | ); |
| 394 | |
| 395 | |
| 396 | |
| 397 | // input from sctag3 |
| 398 | cpx_mbr_dp cpx_mac2 ( |
| 399 | // Outputs |
| 400 | .data_out_x_ (col2_data_x_[149:0]), // Templated |
| 401 | .tcu_scan_en_out (tcu_scan_en_out[2]), |
| 402 | .tcu_pce_ov_out (tcu_pce_ov_out[2]), |
| 403 | .ccx_aclk_out (ccx_aclk_out[2]), |
| 404 | .ccx_bclk_out (ccx_bclk_out[2]), |
| 405 | // Inputs |
| 406 | .arb_grant_a (arb_grant_l_a_rep[3]), // Templated |
| 407 | .arb_qsel0_a (arb_qsel0_l_a_rep[3]), // Templated |
| 408 | .arb_qsel1_a (arb_qsel1_l_a_rep[3]), // Templated |
| 409 | .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[3]), // Templated |
| 410 | .arb_shift_a (arb_shift_l_a_rep[3]), // Templated |
| 411 | .src_cpx_data_a (scache3_cpx_data_a[149:0]), // Templated |
| 412 | .data_prev_x_ (col3_data_x_[149:0]), // Templated |
| 413 | .scan_in(cpx_mac2_scanin), |
| 414 | .scan_out(cpx_mac2_scanout), |
| 415 | .l2clk (l2clk), // Templated |
| 416 | .tcu_scan_en (tcu_scan_en_out[3]), |
| 417 | .tcu_pce_ov (tcu_pce_ov_out[3]), |
| 418 | .ccx_aclk (ccx_aclk_out[3]), |
| 419 | .ccx_bclk (ccx_bclk_out[3]) |
| 420 | ); |
| 421 | |
| 422 | |
| 423 | |
| 424 | // input from sctag1 |
| 425 | cpx_mbr_dp cpx_mac3 ( |
| 426 | // Outputs |
| 427 | .data_out_x_ (col3_data_x_[149:0]), // Templated |
| 428 | .tcu_scan_en_out (tcu_scan_en_out[3]), |
| 429 | .tcu_pce_ov_out (tcu_pce_ov_out[3]), |
| 430 | .ccx_aclk_out (ccx_aclk_out[3]), |
| 431 | .ccx_bclk_out (ccx_bclk_out[3]), |
| 432 | // Inputs |
| 433 | .arb_grant_a (arb_grant_l_a_rep[1]), // Templated |
| 434 | .arb_qsel0_a (arb_qsel0_l_a_rep[1]), // Templated |
| 435 | .arb_qsel1_a (arb_qsel1_l_a_rep[1]), // Templated |
| 436 | .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[1]), // Templated |
| 437 | .arb_shift_a (arb_shift_l_a_rep[1]), // Templated |
| 438 | .src_cpx_data_a (scache1_cpx_data_a[149:0]), // Templated |
| 439 | .data_prev_x_ (col4_data_x_[149:0]), // Templated |
| 440 | .scan_in(cpx_mac3_scanin), |
| 441 | .scan_out(cpx_mac3_scanout), |
| 442 | .l2clk (l2clk), // Templated |
| 443 | .tcu_scan_en (tcu_scan_en), |
| 444 | .tcu_pce_ov (tcu_pce_ov), |
| 445 | .ccx_aclk (ccx_aclk), |
| 446 | .ccx_bclk (ccx_bclk) |
| 447 | ); |
| 448 | |
| 449 | |
| 450 | // input from sctag7 |
| 451 | cpx_mbr_dp cpx_mac4 ( |
| 452 | // Outputs |
| 453 | .data_out_x_ (col4_data_x_[149:0]), // Templated |
| 454 | .tcu_scan_en_out (tcu_scan_en_out[4]), |
| 455 | .tcu_pce_ov_out (tcu_pce_ov_out[4]), |
| 456 | .ccx_aclk_out (ccx_aclk_out[4]), |
| 457 | .ccx_bclk_out (ccx_bclk_out[4]), |
| 458 | // Inputs |
| 459 | .arb_grant_a (arb_grant_r_a_rep[7]), // Templated |
| 460 | .arb_qsel0_a (arb_qsel0_r_a_rep[7]), // Templated |
| 461 | .arb_qsel1_a (arb_qsel1_r_a_rep[7]), // Templated |
| 462 | .arb_q0_holdbar_a (arb_q0_holdbar_r_a_rep[7]), // Templated |
| 463 | .arb_shift_a (arb_shift_r_a_rep[7]), // Templated |
| 464 | .src_cpx_data_a (scache7_cpx_data_a[149:0]), // Templated |
| 465 | .data_prev_x_ (col5_data_x_[149:0]), // Templated |
| 466 | .scan_in(cpx_mac4_scanin), |
| 467 | .scan_out(cpx_mac4_scanout), |
| 468 | .l2clk (l2clk), // Templated |
| 469 | .tcu_scan_en (tcu_scan_en_out[3]), |
| 470 | .tcu_pce_ov (tcu_pce_ov_out[3]), |
| 471 | .ccx_aclk (ccx_aclk_out[3]), |
| 472 | .ccx_bclk (ccx_bclk_out[3]) |
| 473 | ); |
| 474 | |
| 475 | |
| 476 | // input from sctag5 |
| 477 | cpx_mbr_dp cpx_mac5 ( |
| 478 | // Outputs |
| 479 | .data_out_x_ (col5_data_x_[149:0]), // Templated |
| 480 | .tcu_scan_en_out (tcu_scan_en_out[5]), |
| 481 | .tcu_pce_ov_out (tcu_pce_ov_out[5]), |
| 482 | .ccx_aclk_out (ccx_aclk_out[5]), |
| 483 | .ccx_bclk_out (ccx_bclk_out[5]), |
| 484 | // Inputs |
| 485 | .arb_grant_a (arb_grant_r_a_rep[5]), // Templated |
| 486 | .arb_qsel0_a (arb_qsel0_r_a_rep[5]), // Templated |
| 487 | .arb_qsel1_a (arb_qsel1_r_a_rep[5]), // Templated |
| 488 | .arb_q0_holdbar_a (arb_q0_holdbar_r_a_rep[5]), // Templated |
| 489 | .arb_shift_a (arb_shift_r_a_rep[5]), // Templated |
| 490 | .src_cpx_data_a (scache5_cpx_data_a[149:0]), // Templated |
| 491 | .data_prev_x_ (col6_data_x_[149:0]), // Templated |
| 492 | .scan_in(cpx_mac5_scanin), |
| 493 | .scan_out(cpx_mac5_scanout), |
| 494 | .l2clk (l2clk), // Templated |
| 495 | .tcu_scan_en (tcu_scan_en_out[4]), |
| 496 | .tcu_pce_ov (tcu_pce_ov_out[4]), |
| 497 | .ccx_aclk (ccx_aclk_out[4]), |
| 498 | .ccx_bclk (ccx_bclk_out[4]) |
| 499 | ); |
| 500 | |
| 501 | // input from sctag6 |
| 502 | cpx_mbr_dp cpx_mac6 ( |
| 503 | // Outputs |
| 504 | .data_out_x_ (col6_data_x_[149:0]), // Templated |
| 505 | .tcu_scan_en_out (tcu_scan_en_out[6]), |
| 506 | .tcu_pce_ov_out (tcu_pce_ov_out[6]), |
| 507 | .ccx_aclk_out (ccx_aclk_out[6]), |
| 508 | .ccx_bclk_out (ccx_bclk_out[6]), |
| 509 | // Inputs |
| 510 | .arb_grant_a (arb_grant_r_a_rep[6]), // Templated |
| 511 | .arb_qsel0_a (arb_qsel0_r_a_rep[6]), // Templated |
| 512 | .arb_qsel1_a (arb_qsel1_r_a_rep[6]), // Templated |
| 513 | .arb_q0_holdbar_a (arb_q0_holdbar_r_a_rep[6]), // Templated |
| 514 | .arb_shift_a (arb_shift_r_a_rep[6]), // Templated |
| 515 | .src_cpx_data_a (scache6_cpx_data_a[149:0]), // Templated |
| 516 | .data_prev_x_ (col7_data_x_[149:0]), // Templated |
| 517 | .scan_in(cpx_mac6_scanin), |
| 518 | .scan_out(cpx_mac6_scanout), |
| 519 | .l2clk (l2clk), // Templated |
| 520 | .tcu_scan_en (tcu_scan_en_out[5]), |
| 521 | .tcu_pce_ov (tcu_pce_ov_out[5]), |
| 522 | .ccx_aclk (ccx_aclk_out[5]), |
| 523 | .ccx_bclk (ccx_bclk_out[5]) |
| 524 | ); |
| 525 | |
| 526 | |
| 527 | /* |
| 528 | cpx_mar_dp AUTO_TEMPLATE |
| 529 | ( |
| 530 | // Outputs |
| 531 | .data_out_x_ (col@_data_x_[149:0]), |
| 532 | // Inputs |
| 533 | .arb_grant_a(arb_grant_r_a[@]), |
| 534 | .arb_qsel0_a(arb_qsel0_r_a[@]), |
| 535 | .arb_qsel1_a(arb_qsel1_r_a[@]), |
| 536 | .arb_q0_holdbar_a(arb_q0_holdbar_r_a[@]), |
| 537 | .arb_shift_a(arb_shift_r_a[@]), |
| 538 | .src_cpx_data_a(scache@_cpx_data_a[149:0]), |
| 539 | .l2clk (l2clk)); |
| 540 | */ |
| 541 | |
| 542 | // input from sctag4 |
| 543 | cpx_mar_dp cpx_mac7 ( |
| 544 | // Outputs |
| 545 | .data_out_x_ (col7_data_x_[149:0]), // Templated |
| 546 | .tcu_scan_en_out (tcu_scan_en_out_7_unused), |
| 547 | .tcu_pce_ov_out (tcu_pce_ov_out_7_unused), |
| 548 | .ccx_aclk_out (ccx_aclk_out_7_unused), |
| 549 | .ccx_bclk_out (ccx_bclk_out_7_unused), |
| 550 | // Inputs |
| 551 | .arb_grant_a (arb_grant_r_a[4]), // Templated |
| 552 | .arb_qsel0_a (arb_qsel0_r_a[4]), // Templated |
| 553 | .arb_qsel1_a (arb_qsel1_r_a[4]), // Templated |
| 554 | .arb_q0_holdbar_a (arb_q0_holdbar_r_a[4]), // Templated |
| 555 | .arb_shift_a (arb_shift_r_a[4]), // Templated |
| 556 | .src_cpx_data_a (scache4_cpx_data_a[149:0]), // Templated |
| 557 | .scan_in(cpx_mac7_scanin), |
| 558 | .scan_out(cpx_mac7_scanout), |
| 559 | .l2clk (l2clk), // Templated |
| 560 | .tcu_scan_en (tcu_scan_en_out[6]), |
| 561 | .tcu_pce_ov (tcu_pce_ov_out[6]), |
| 562 | .ccx_aclk (ccx_aclk_out[6]), |
| 563 | .ccx_bclk (ccx_bclk_out[6]) |
| 564 | ); |
| 565 | |
| 566 | |
| 567 | assign arb_grant_l_a_unused[7:4] = arb_grant_l_a[7:4]; |
| 568 | assign arb_q0_holdbar_l_a_unused[7:4] = arb_q0_holdbar_l_a[7:4]; |
| 569 | assign arb_qsel0_l_a_unused[7:4] = arb_qsel0_l_a[7:4]; |
| 570 | assign arb_qsel1_l_a_unused[7:4] = arb_qsel1_l_a[7:4]; |
| 571 | assign arb_shift_l_a_unused[7:4] = arb_shift_l_a[7:4]; |
| 572 | |
| 573 | assign arb_grant_r_a_unused[3:0] = arb_grant_r_a[3:0]; |
| 574 | assign arb_q0_holdbar_r_a_unused[3:0] = arb_q0_holdbar_r_a[3:0]; |
| 575 | assign arb_qsel0_r_a_unused[3:0] = arb_qsel0_r_a[3:0]; |
| 576 | assign arb_qsel1_r_a_unused[3:0] = arb_qsel1_r_a[3:0]; |
| 577 | assign arb_shift_r_a_unused[3:0] = arb_shift_r_a[3:0]; |
| 578 | |
| 579 | assign arb_grant_r_a_unused[8] = arb_grant_r_a[8]; |
| 580 | assign arb_q0_holdbar_r_a_unused[8] = arb_q0_holdbar_r_a[8]; |
| 581 | assign arb_qsel0_r_a_unused[8] = arb_qsel0_r_a[8]; |
| 582 | assign arb_qsel1_r_a_unused[8] = arb_qsel1_r_a[8]; |
| 583 | assign arb_shift_r_a_unused[8] = arb_shift_r_a[8]; |
| 584 | |
| 585 | // fixscan start: |
| 586 | assign cpx_mac8_scanin = scan_rep_out ; |
| 587 | assign cpx_mac0_scanin = cpx_mac8_scanout ; |
| 588 | assign cpx_mac1_scanin = cpx_mac0_scanout ; |
| 589 | assign cpx_mac2_scanin = cpx_mac1_scanout ; |
| 590 | assign cpx_mac3_scanin = cpx_mac2_scanout ; |
| 591 | assign cpx_mac4_scanin = cpx_mac3_scanout ; |
| 592 | assign cpx_mac5_scanin = cpx_mac4_scanout ; |
| 593 | assign cpx_mac6_scanin = cpx_mac5_scanout ; |
| 594 | assign cpx_mac7_scanin = cpx_mac6_scanout ; |
| 595 | assign scan_out = cpx_mac7_scanout ; |
| 596 | // fixscan end: |
| 597 | endmodule |
| 598 | |
| 599 | // Local Variables: |
| 600 | // verilog-library-directories:("." "v") |
| 601 | // End: |
| 602 | |
| 603 | |
| 604 | |
| 605 | // |
| 606 | // buff macro |
| 607 | // |
| 608 | // |
| 609 | |
| 610 | |
| 611 | |
| 612 | |
| 613 | |
| 614 | module cpx_dpsa_buff_macro__dbuff_32x__stack_6l__width_5 ( |
| 615 | din, |
| 616 | dout); |
| 617 | input [4:0] din; |
| 618 | output [4:0] dout; |
| 619 | |
| 620 | |
| 621 | |
| 622 | |
| 623 | |
| 624 | |
| 625 | buff #(5) d0_0 ( |
| 626 | .in(din[4:0]), |
| 627 | .out(dout[4:0]) |
| 628 | ); |
| 629 | |
| 630 | |
| 631 | |
| 632 | |
| 633 | |
| 634 | |
| 635 | |
| 636 | |
| 637 | endmodule |
| 638 | |
| 639 | |
| 640 | |
| 641 | |
| 642 | |
| 643 | // |
| 644 | // buff macro |
| 645 | // |
| 646 | // |
| 647 | |
| 648 | |
| 649 | |
| 650 | |
| 651 | |
| 652 | module cpx_dpsa_buff_macro__dbuff_32x__stack_none__width_1 ( |
| 653 | din, |
| 654 | dout); |
| 655 | input [0:0] din; |
| 656 | output [0:0] dout; |
| 657 | |
| 658 | |
| 659 | |
| 660 | |
| 661 | |
| 662 | |
| 663 | buff #(1) d0_0 ( |
| 664 | .in(din[0:0]), |
| 665 | .out(dout[0:0]) |
| 666 | ); |
| 667 | |
| 668 | |
| 669 | |
| 670 | |
| 671 | |
| 672 | |
| 673 | |
| 674 | |
| 675 | endmodule |
| 676 | |
| 677 | |
| 678 | |
| 679 | // |
| 680 | // buff macro |
| 681 | // |
| 682 | // |
| 683 | |
| 684 | |
| 685 | |
| 686 | |
| 687 | |
| 688 | module cpx_dpsa_buff_macro__dbuff_8x__stack_none__vertical_1__width_4 ( |
| 689 | din, |
| 690 | dout); |
| 691 | input [3:0] din; |
| 692 | output [3:0] dout; |
| 693 | |
| 694 | |
| 695 | |
| 696 | |
| 697 | |
| 698 | |
| 699 | buff #(4) d0_0 ( |
| 700 | .in(din[3:0]), |
| 701 | .out(dout[3:0]) |
| 702 | ); |
| 703 | |
| 704 | |
| 705 | |
| 706 | |
| 707 | |
| 708 | |
| 709 | |
| 710 | |
| 711 | endmodule |
| 712 | |
| 713 | |
| 714 | |
| 715 | |
| 716 | |
| 717 | |
| 718 | |
| 719 | |
| 720 | |
| 721 | // any PARAMS parms go into naming of macro |
| 722 | |
| 723 | module cpx_dpsa_ccx_l1clkhdr_ctl_macro__dl1hdr_24x ( |
| 724 | l2clk, |
| 725 | l1en, |
| 726 | pce_ov, |
| 727 | stop, |
| 728 | se, |
| 729 | l1clk); |
| 730 | |
| 731 | |
| 732 | input l2clk; |
| 733 | input l1en; |
| 734 | input pce_ov; |
| 735 | input stop; |
| 736 | input se; |
| 737 | output l1clk; |
| 738 | |
| 739 | |
| 740 | |
| 741 | |
| 742 | |
| 743 | cl_sc1_l1hdr_24x c_0 ( |
| 744 | |
| 745 | |
| 746 | .l2clk(l2clk), |
| 747 | .pce(l1en), |
| 748 | .l1clk(l1clk), |
| 749 | .se(se), |
| 750 | .pce_ov(pce_ov), |
| 751 | .stop(stop) |
| 752 | ); |
| 753 | |
| 754 | |
| 755 | |
| 756 | |
| 757 | |
| 758 | |
| 759 | endmodule |
| 760 | |
| 761 | |
| 762 | |
| 763 | |
| 764 | |
| 765 | |
| 766 | |
| 767 | |
| 768 | |
| 769 | // |
| 770 | // ccx macro |
| 771 | // |
| 772 | // |
| 773 | |
| 774 | |
| 775 | |
| 776 | |
| 777 | |
| 778 | module cpx_dpsa_ccx_new_macro__type_b_l ( |
| 779 | l2clk, |
| 780 | l1clk, |
| 781 | pce0, |
| 782 | pce1, |
| 783 | pce_ov, |
| 784 | se, |
| 785 | stop, |
| 786 | siclk_in, |
| 787 | soclk_in, |
| 788 | scan_in, |
| 789 | grant_a, |
| 790 | qsel0, |
| 791 | shift, |
| 792 | data_a, |
| 793 | data_prev_x_l, |
| 794 | data_x_l, |
| 795 | scan_out); |
| 796 | wire so5; |
| 797 | wire siclk_out; |
| 798 | wire soclk_out; |
| 799 | wire l1clk0; |
| 800 | wire l1clk1; |
| 801 | wire grant_x; |
| 802 | wire qsel0_buf; |
| 803 | wire shift_buf; |
| 804 | |
| 805 | input l2clk; |
| 806 | input l1clk; |
| 807 | input pce0; |
| 808 | input pce1; |
| 809 | input pce_ov; |
| 810 | input se; |
| 811 | input stop; |
| 812 | input siclk_in; |
| 813 | input soclk_in; |
| 814 | input scan_in; |
| 815 | input grant_a; |
| 816 | input qsel0; |
| 817 | input shift; |
| 818 | input [9:0] data_a; |
| 819 | input [9:0] data_prev_x_l; |
| 820 | output [9:0] data_x_l; |
| 821 | output scan_out; |
| 822 | cl_dp1_ccxhdr c0 ( |
| 823 | .si(scan_in), |
| 824 | .so(so5), |
| 825 | .l2clk(l2clk), |
| 826 | .pce0(pce0), |
| 827 | .pce1(pce1), |
| 828 | .pce_ov(pce_ov), |
| 829 | .stop(stop), |
| 830 | .siclk_in(siclk_in), |
| 831 | .soclk_in(soclk_in), |
| 832 | .siclk_out(siclk_out), |
| 833 | .soclk_out(soclk_out), |
| 834 | .l1clk0(l1clk0), |
| 835 | .l1clk1(l1clk1), |
| 836 | .se(se), |
| 837 | .l1clk(l1clk), |
| 838 | .grant_a(grant_a), |
| 839 | .grant_x(grant_x), |
| 840 | .qsel0(qsel0), |
| 841 | .qsel0_buf(qsel0_buf), |
| 842 | .shift(shift), |
| 843 | .shift_buf(shift_buf) |
| 844 | ); |
| 845 | |
| 846 | |
| 847 | |
| 848 | |
| 849 | |
| 850 | |
| 851 | ccx_mac_b #(10) mac_b( |
| 852 | .siclk(siclk_out), |
| 853 | .soclk(soclk_out), |
| 854 | .data_a(data_a[9:0]), |
| 855 | .data_prev_x_l(data_prev_x_l[9:0]), |
| 856 | .data_x_l(data_x_l[9:0]), |
| 857 | .si(so5), |
| 858 | .so(scan_out), |
| 859 | .l1clk0(l1clk0), |
| 860 | .l1clk1(l1clk1), |
| 861 | .grant_x(grant_x), |
| 862 | .qsel0_buf(qsel0_buf), |
| 863 | .shift_buf(shift_buf) |
| 864 | ); |
| 865 | |
| 866 | |
| 867 | |
| 868 | |
| 869 | |
| 870 | |
| 871 | |
| 872 | |
| 873 | |
| 874 | |
| 875 | |
| 876 | |
| 877 | |
| 878 | |
| 879 | endmodule |
| 880 | |
| 881 | |
| 882 | // |
| 883 | // ccx macro |
| 884 | // |
| 885 | // |
| 886 | |
| 887 | |
| 888 | |
| 889 | |
| 890 | |
| 891 | module cpx_dpsa_ccx_new_macro__type_c_l ( |
| 892 | l2clk, |
| 893 | l1clk, |
| 894 | pce0, |
| 895 | pce1, |
| 896 | pce_ov, |
| 897 | se, |
| 898 | stop, |
| 899 | siclk_in, |
| 900 | soclk_in, |
| 901 | scan_in, |
| 902 | grant_a, |
| 903 | qsel0, |
| 904 | shift, |
| 905 | data_a, |
| 906 | data_crit_x_l, |
| 907 | data_ncrit_x_l, |
| 908 | data_x_l, |
| 909 | scan_out); |
| 910 | wire so5; |
| 911 | wire siclk_out; |
| 912 | wire soclk_out; |
| 913 | wire l1clk0; |
| 914 | wire l1clk1; |
| 915 | wire grant_x; |
| 916 | wire qsel0_buf; |
| 917 | wire shift_buf; |
| 918 | |
| 919 | input l2clk; |
| 920 | input l1clk; |
| 921 | input pce0; |
| 922 | input pce1; |
| 923 | input pce_ov; |
| 924 | input se; |
| 925 | input stop; |
| 926 | input siclk_in; |
| 927 | input soclk_in; |
| 928 | input scan_in; |
| 929 | input grant_a; |
| 930 | input qsel0; |
| 931 | input shift; |
| 932 | input [9:0] data_a; |
| 933 | input [9:0] data_crit_x_l; |
| 934 | input [9:0] data_ncrit_x_l; |
| 935 | output [9:0] data_x_l; |
| 936 | output scan_out; |
| 937 | cl_dp1_ccxhdr c0 ( |
| 938 | .si(scan_in), |
| 939 | .so(so5), |
| 940 | .l2clk(l2clk), |
| 941 | .pce0(pce0), |
| 942 | .pce1(pce1), |
| 943 | .pce_ov(pce_ov), |
| 944 | .stop(stop), |
| 945 | .siclk_in(siclk_in), |
| 946 | .soclk_in(soclk_in), |
| 947 | .siclk_out(siclk_out), |
| 948 | .soclk_out(soclk_out), |
| 949 | .l1clk0(l1clk0), |
| 950 | .l1clk1(l1clk1), |
| 951 | .se(se), |
| 952 | .l1clk(l1clk), |
| 953 | .grant_a(grant_a), |
| 954 | .grant_x(grant_x), |
| 955 | .qsel0(qsel0), |
| 956 | .qsel0_buf(qsel0_buf), |
| 957 | .shift(shift), |
| 958 | .shift_buf(shift_buf) |
| 959 | ); |
| 960 | |
| 961 | |
| 962 | |
| 963 | |
| 964 | |
| 965 | |
| 966 | ccx_mac_c #(10) mac_c( |
| 967 | .siclk(siclk_out), |
| 968 | .soclk(soclk_out), |
| 969 | .data_a(data_a[9:0]), |
| 970 | .data_crit_x_l(data_crit_x_l[9:0]), |
| 971 | .data_ncrit_x_l(data_ncrit_x_l[9:0]), |
| 972 | .data_x_l(data_x_l[9:0]), |
| 973 | .si(so5), |
| 974 | .so(scan_out), |
| 975 | .l1clk0(l1clk0), |
| 976 | .l1clk1(l1clk1), |
| 977 | .grant_x(grant_x), |
| 978 | .qsel0_buf(qsel0_buf), |
| 979 | .shift_buf(shift_buf) |
| 980 | ); |
| 981 | |
| 982 | |
| 983 | |
| 984 | |
| 985 | |
| 986 | |
| 987 | |
| 988 | |
| 989 | |
| 990 | |
| 991 | |
| 992 | |
| 993 | |
| 994 | |
| 995 | endmodule |
| 996 | |
| 997 | |
| 998 | |
| 999 | // |
| 1000 | // ccx macro |
| 1001 | // |
| 1002 | // |
| 1003 | |
| 1004 | |
| 1005 | |
| 1006 | |
| 1007 | |
| 1008 | module cpx_dpsa_ccx_new_macro__type_b_r ( |
| 1009 | l2clk, |
| 1010 | l1clk, |
| 1011 | pce0, |
| 1012 | pce1, |
| 1013 | pce_ov, |
| 1014 | se, |
| 1015 | stop, |
| 1016 | siclk_in, |
| 1017 | soclk_in, |
| 1018 | scan_in, |
| 1019 | grant_a, |
| 1020 | qsel0, |
| 1021 | shift, |
| 1022 | data_a, |
| 1023 | data_prev_x_l, |
| 1024 | data_x_l, |
| 1025 | scan_out); |
| 1026 | wire so5; |
| 1027 | wire siclk_out; |
| 1028 | wire soclk_out; |
| 1029 | wire l1clk0; |
| 1030 | wire l1clk1; |
| 1031 | wire grant_x; |
| 1032 | wire qsel0_buf; |
| 1033 | wire shift_buf; |
| 1034 | |
| 1035 | input l2clk; |
| 1036 | input l1clk; |
| 1037 | input pce0; |
| 1038 | input pce1; |
| 1039 | input pce_ov; |
| 1040 | input se; |
| 1041 | input stop; |
| 1042 | input siclk_in; |
| 1043 | input soclk_in; |
| 1044 | input scan_in; |
| 1045 | input grant_a; |
| 1046 | input qsel0; |
| 1047 | input shift; |
| 1048 | input [9:0] data_a; |
| 1049 | input [9:0] data_prev_x_l; |
| 1050 | output [9:0] data_x_l; |
| 1051 | output scan_out; |
| 1052 | cl_dp1_ccxhdr c0 ( |
| 1053 | .si(scan_in), |
| 1054 | .so(so5), |
| 1055 | .l2clk(l2clk), |
| 1056 | .pce0(pce0), |
| 1057 | .pce1(pce1), |
| 1058 | .pce_ov(pce_ov), |
| 1059 | .stop(stop), |
| 1060 | .siclk_in(siclk_in), |
| 1061 | .soclk_in(soclk_in), |
| 1062 | .siclk_out(siclk_out), |
| 1063 | .soclk_out(soclk_out), |
| 1064 | .l1clk0(l1clk0), |
| 1065 | .l1clk1(l1clk1), |
| 1066 | .se(se), |
| 1067 | .l1clk(l1clk), |
| 1068 | .grant_a(grant_a), |
| 1069 | .grant_x(grant_x), |
| 1070 | .qsel0(qsel0), |
| 1071 | .qsel0_buf(qsel0_buf), |
| 1072 | .shift(shift), |
| 1073 | .shift_buf(shift_buf) |
| 1074 | ); |
| 1075 | |
| 1076 | |
| 1077 | |
| 1078 | |
| 1079 | |
| 1080 | |
| 1081 | ccx_mac_b #(10) mac_b( |
| 1082 | .siclk(siclk_out), |
| 1083 | .soclk(soclk_out), |
| 1084 | .data_a(data_a[9:0]), |
| 1085 | .data_prev_x_l(data_prev_x_l[9:0]), |
| 1086 | .data_x_l(data_x_l[9:0]), |
| 1087 | .si(so5), |
| 1088 | .so(scan_out), |
| 1089 | .l1clk0(l1clk0), |
| 1090 | .l1clk1(l1clk1), |
| 1091 | .grant_x(grant_x), |
| 1092 | .qsel0_buf(qsel0_buf), |
| 1093 | .shift_buf(shift_buf) |
| 1094 | ); |
| 1095 | |
| 1096 | |
| 1097 | |
| 1098 | |
| 1099 | |
| 1100 | |
| 1101 | |
| 1102 | |
| 1103 | |
| 1104 | |
| 1105 | |
| 1106 | |
| 1107 | |
| 1108 | |
| 1109 | endmodule |
| 1110 | |
| 1111 | |
| 1112 | |
| 1113 | // |
| 1114 | // ccx macro |
| 1115 | // |
| 1116 | // |
| 1117 | |
| 1118 | |
| 1119 | |
| 1120 | |
| 1121 | |
| 1122 | module cpx_dpsa_ccx_new_macro__type_a ( |
| 1123 | l2clk, |
| 1124 | l1clk, |
| 1125 | pce0, |
| 1126 | pce1, |
| 1127 | pce_ov, |
| 1128 | se, |
| 1129 | stop, |
| 1130 | siclk_in, |
| 1131 | soclk_in, |
| 1132 | scan_in, |
| 1133 | grant_a, |
| 1134 | qsel0, |
| 1135 | shift, |
| 1136 | data_a, |
| 1137 | data_x_l, |
| 1138 | scan_out); |
| 1139 | wire so5; |
| 1140 | wire siclk_out; |
| 1141 | wire soclk_out; |
| 1142 | wire l1clk0; |
| 1143 | wire l1clk1; |
| 1144 | wire grant_x; |
| 1145 | wire qsel0_buf; |
| 1146 | wire shift_buf; |
| 1147 | |
| 1148 | input l2clk; |
| 1149 | input l1clk; |
| 1150 | input pce0; |
| 1151 | input pce1; |
| 1152 | input pce_ov; |
| 1153 | input se; |
| 1154 | input stop; |
| 1155 | input siclk_in; |
| 1156 | input soclk_in; |
| 1157 | input scan_in; |
| 1158 | input grant_a; |
| 1159 | input qsel0; |
| 1160 | input shift; |
| 1161 | input [9:0] data_a; |
| 1162 | output [9:0] data_x_l; |
| 1163 | output scan_out; |
| 1164 | cl_dp1_ccxhdr c0 ( |
| 1165 | .si(scan_in), |
| 1166 | .so(so5), |
| 1167 | .l2clk(l2clk), |
| 1168 | .pce0(pce0), |
| 1169 | .pce1(pce1), |
| 1170 | .pce_ov(pce_ov), |
| 1171 | .stop(stop), |
| 1172 | .siclk_in(siclk_in), |
| 1173 | .soclk_in(soclk_in), |
| 1174 | .siclk_out(siclk_out), |
| 1175 | .soclk_out(soclk_out), |
| 1176 | .l1clk0(l1clk0), |
| 1177 | .l1clk1(l1clk1), |
| 1178 | .se(se), |
| 1179 | .l1clk(l1clk), |
| 1180 | .grant_a(grant_a), |
| 1181 | .grant_x(grant_x), |
| 1182 | .qsel0(qsel0), |
| 1183 | .qsel0_buf(qsel0_buf), |
| 1184 | .shift(shift), |
| 1185 | .shift_buf(shift_buf) |
| 1186 | ); |
| 1187 | |
| 1188 | |
| 1189 | |
| 1190 | |
| 1191 | |
| 1192 | |
| 1193 | ccx_mac_a #(10) mac_a( |
| 1194 | .siclk(siclk_out), |
| 1195 | .soclk(soclk_out), |
| 1196 | .data_a(data_a[9:0]), |
| 1197 | .data_x_l(data_x_l[9:0]), |
| 1198 | .si(so5), |
| 1199 | .so(scan_out), |
| 1200 | .l1clk0(l1clk0), |
| 1201 | .l1clk1(l1clk1), |
| 1202 | .grant_x(grant_x), |
| 1203 | .qsel0_buf(qsel0_buf), |
| 1204 | .shift_buf(shift_buf) |
| 1205 | ); |
| 1206 | |
| 1207 | |
| 1208 | |
| 1209 | |
| 1210 | |
| 1211 | |
| 1212 | |
| 1213 | |
| 1214 | |
| 1215 | |
| 1216 | |
| 1217 | |
| 1218 | |
| 1219 | |
| 1220 | endmodule |
| 1221 | |
| 1222 | |
| 1223 | |
| 1224 | `endif // `ifndef FPGA |
| 1225 | |
| 1226 | `ifdef FPGA |
| 1227 | `timescale 1 ns / 100 ps |
| 1228 | module cpx_dpsa(cpx_spc_data_x_, arb_grant_l_a, arb_q0_holdbar_l_a, |
| 1229 | arb_qsel0_l_a, arb_qsel1_l_a, arb_shift_l_a, arb_grant_r_a, |
| 1230 | arb_q0_holdbar_r_a, arb_qsel0_r_a, arb_qsel1_r_a, arb_shift_r_a, |
| 1231 | io_cpx_data_a, scache0_cpx_data_a, scache1_cpx_data_a, |
| 1232 | scache2_cpx_data_a, scache3_cpx_data_a, scache4_cpx_data_a, |
| 1233 | scache5_cpx_data_a, scache6_cpx_data_a, scache7_cpx_data_a, tcu_scan_en, |
| 1234 | l2clk, scan_in, tcu_pce_ov, ccx_aclk, ccx_bclk, scan_out); |
| 1235 | |
| 1236 | output [149:0] cpx_spc_data_x_; |
| 1237 | input [8:0] arb_grant_l_a; |
| 1238 | input [8:0] arb_q0_holdbar_l_a; |
| 1239 | input [8:0] arb_qsel0_l_a; |
| 1240 | input [8:0] arb_qsel1_l_a; |
| 1241 | input [8:0] arb_shift_l_a; |
| 1242 | input [8:0] arb_grant_r_a; |
| 1243 | input [8:0] arb_q0_holdbar_r_a; |
| 1244 | input [8:0] arb_qsel0_r_a; |
| 1245 | input [8:0] arb_qsel1_r_a; |
| 1246 | input [8:0] arb_shift_r_a; |
| 1247 | input [149:0] io_cpx_data_a; |
| 1248 | input [149:0] scache0_cpx_data_a; |
| 1249 | input [149:0] scache1_cpx_data_a; |
| 1250 | input [149:0] scache2_cpx_data_a; |
| 1251 | input [149:0] scache3_cpx_data_a; |
| 1252 | input [149:0] scache4_cpx_data_a; |
| 1253 | input [149:0] scache5_cpx_data_a; |
| 1254 | input [149:0] scache6_cpx_data_a; |
| 1255 | input [149:0] scache7_cpx_data_a; |
| 1256 | input tcu_scan_en; |
| 1257 | input l2clk; |
| 1258 | input scan_in; |
| 1259 | input tcu_pce_ov; |
| 1260 | input ccx_aclk; |
| 1261 | input ccx_bclk; |
| 1262 | output scan_out; |
| 1263 | |
| 1264 | wire [149:0] all_ones; |
| 1265 | wire [4:0] mac0_rep_in; |
| 1266 | wire [3:0] arb_grant_l_a_rep; |
| 1267 | wire [3:0] arb_qsel0_l_a_rep; |
| 1268 | wire [3:0] arb_qsel1_l_a_rep; |
| 1269 | wire [3:0] arb_shift_l_a_rep; |
| 1270 | wire [3:0] arb_q0_holdbar_l_a_rep; |
| 1271 | wire [4:0] mac0_rep_out; |
| 1272 | wire [4:0] mac1_rep_in; |
| 1273 | wire [4:0] mac1_rep_out; |
| 1274 | wire [4:0] mac2_rep_in; |
| 1275 | wire [4:0] mac2_rep_out; |
| 1276 | wire [4:0] mac3_rep_in; |
| 1277 | wire [4:0] mac3_rep_out; |
| 1278 | wire [4:0] mac4_rep_in; |
| 1279 | wire [7:5] arb_grant_r_a_rep; |
| 1280 | wire [7:5] arb_q0_holdbar_r_a_rep; |
| 1281 | wire [7:5] arb_qsel0_r_a_rep; |
| 1282 | wire [7:5] arb_qsel1_r_a_rep; |
| 1283 | wire [7:5] arb_shift_r_a_rep; |
| 1284 | wire [4:0] mac4_rep_out; |
| 1285 | wire [4:0] mac5_rep_in; |
| 1286 | wire [4:0] mac5_rep_out; |
| 1287 | wire [4:0] mac6_rep_in; |
| 1288 | wire [4:0] mac6_rep_out; |
| 1289 | wire scan_rep_in; |
| 1290 | wire [149:0] col8_data_x_; |
| 1291 | wire tcu_scan_en_out_8_unused; |
| 1292 | wire tcu_pce_ov_out_8_unused; |
| 1293 | wire ccx_aclk_out_8_unused; |
| 1294 | wire ccx_bclk_out_8_unused; |
| 1295 | wire cpx_mac8_scanin; |
| 1296 | wire cpx_mac8_scanout; |
| 1297 | wire [6:0] tcu_scan_en_out; |
| 1298 | wire [6:0] tcu_pce_ov_out; |
| 1299 | wire [6:0] ccx_aclk_out; |
| 1300 | wire [6:0] ccx_bclk_out; |
| 1301 | wire [149:0] col1_data_x_; |
| 1302 | wire cpx_mac0_scanin; |
| 1303 | wire cpx_mac0_scanout; |
| 1304 | wire [149:0] col2_data_x_; |
| 1305 | wire cpx_mac1_scanin; |
| 1306 | wire cpx_mac1_scanout; |
| 1307 | wire [149:0] col3_data_x_; |
| 1308 | wire cpx_mac2_scanin; |
| 1309 | wire cpx_mac2_scanout; |
| 1310 | wire [149:0] col4_data_x_; |
| 1311 | wire cpx_mac3_scanin; |
| 1312 | wire cpx_mac3_scanout; |
| 1313 | wire [149:0] col5_data_x_; |
| 1314 | wire cpx_mac4_scanin; |
| 1315 | wire cpx_mac4_scanout; |
| 1316 | wire [149:0] col6_data_x_; |
| 1317 | wire cpx_mac5_scanin; |
| 1318 | wire cpx_mac5_scanout; |
| 1319 | wire [149:0] col7_data_x_; |
| 1320 | wire cpx_mac6_scanin; |
| 1321 | wire cpx_mac6_scanout; |
| 1322 | wire tcu_scan_en_out_7_unused; |
| 1323 | wire tcu_pce_ov_out_7_unused; |
| 1324 | wire ccx_aclk_out_7_unused; |
| 1325 | wire ccx_bclk_out_7_unused; |
| 1326 | wire cpx_mac7_scanin; |
| 1327 | wire cpx_mac7_scanout; |
| 1328 | wire [7:4] arb_grant_l_a_unused; |
| 1329 | wire [7:4] arb_q0_holdbar_l_a_unused; |
| 1330 | wire [7:4] arb_qsel0_l_a_unused; |
| 1331 | wire [7:4] arb_qsel1_l_a_unused; |
| 1332 | wire [7:4] arb_shift_l_a_unused; |
| 1333 | wire [8:0] arb_grant_r_a_unused; |
| 1334 | wire [8:0] arb_q0_holdbar_r_a_unused; |
| 1335 | wire [8:0] arb_qsel0_r_a_unused; |
| 1336 | wire [8:0] arb_qsel1_r_a_unused; |
| 1337 | wire [8:0] arb_shift_r_a_unused; |
| 1338 | wire scan_rep_out; |
| 1339 | |
| 1340 | assign all_ones[149:0] = 150'h3fffffffffffffffffffffffffffffffffffff; |
| 1341 | assign mac0_rep_in[4:0] = {arb_grant_l_a[2], arb_qsel0_l_a[2], |
| 1342 | arb_qsel1_l_a[2], arb_shift_l_a[2], arb_q0_holdbar_l_a[2]}; |
| 1343 | assign {arb_grant_l_a_rep[2], arb_qsel0_l_a_rep[2], |
| 1344 | arb_qsel1_l_a_rep[2], arb_shift_l_a_rep[2], |
| 1345 | arb_q0_holdbar_l_a_rep[2]} = mac0_rep_out[4:0]; |
| 1346 | assign mac1_rep_in[4:0] = {arb_grant_l_a[0], arb_q0_holdbar_l_a[0], |
| 1347 | arb_qsel0_l_a[0], arb_qsel1_l_a[0], arb_shift_l_a[0]}; |
| 1348 | assign {arb_grant_l_a_rep[0], arb_q0_holdbar_l_a_rep[0], |
| 1349 | arb_qsel0_l_a_rep[0], arb_qsel1_l_a_rep[0], arb_shift_l_a_rep[0] |
| 1350 | } = mac1_rep_out[4:0]; |
| 1351 | assign mac2_rep_in[4:0] = {arb_grant_l_a[3], arb_q0_holdbar_l_a[3], |
| 1352 | arb_qsel0_l_a[3], arb_qsel1_l_a[3], arb_shift_l_a[3]}; |
| 1353 | assign {arb_grant_l_a_rep[3], arb_q0_holdbar_l_a_rep[3], |
| 1354 | arb_qsel0_l_a_rep[3], arb_qsel1_l_a_rep[3], arb_shift_l_a_rep[3] |
| 1355 | } = mac2_rep_out[4:0]; |
| 1356 | assign mac3_rep_in[4:0] = {arb_grant_l_a[1], arb_q0_holdbar_l_a[1], |
| 1357 | arb_qsel0_l_a[1], arb_qsel1_l_a[1], arb_shift_l_a[1]}; |
| 1358 | assign {arb_grant_l_a_rep[1], arb_q0_holdbar_l_a_rep[1], |
| 1359 | arb_qsel0_l_a_rep[1], arb_qsel1_l_a_rep[1], arb_shift_l_a_rep[1] |
| 1360 | } = mac3_rep_out[4:0]; |
| 1361 | assign mac4_rep_in[4:0] = {arb_grant_r_a[7], arb_q0_holdbar_r_a[7], |
| 1362 | arb_qsel0_r_a[7], arb_qsel1_r_a[7], arb_shift_r_a[7]}; |
| 1363 | assign {arb_grant_r_a_rep[7], arb_q0_holdbar_r_a_rep[7], |
| 1364 | arb_qsel0_r_a_rep[7], arb_qsel1_r_a_rep[7], arb_shift_r_a_rep[7] |
| 1365 | } = mac4_rep_out[4:0]; |
| 1366 | assign mac5_rep_in[4:0] = {arb_grant_r_a[5], arb_q0_holdbar_r_a[5], |
| 1367 | arb_qsel0_r_a[5], arb_qsel1_r_a[5], arb_shift_r_a[5]}; |
| 1368 | assign {arb_grant_r_a_rep[5], arb_q0_holdbar_r_a_rep[5], |
| 1369 | arb_qsel0_r_a_rep[5], arb_qsel1_r_a_rep[5], arb_shift_r_a_rep[5] |
| 1370 | } = mac5_rep_out[4:0]; |
| 1371 | assign mac6_rep_in[4:0] = {arb_grant_r_a[6], arb_q0_holdbar_r_a[6], |
| 1372 | arb_qsel0_r_a[6], arb_qsel1_r_a[6], arb_shift_r_a[6]}; |
| 1373 | assign {arb_grant_r_a_rep[6], arb_q0_holdbar_r_a_rep[6], |
| 1374 | arb_qsel0_r_a_rep[6], arb_qsel1_r_a_rep[6], arb_shift_r_a_rep[6] |
| 1375 | } = mac6_rep_out[4:0]; |
| 1376 | assign scan_rep_in = scan_in; |
| 1377 | assign arb_grant_l_a_unused[7:4] = arb_grant_l_a[7:4]; |
| 1378 | assign arb_q0_holdbar_l_a_unused[7:4] = arb_q0_holdbar_l_a[7:4]; |
| 1379 | assign arb_qsel0_l_a_unused[7:4] = arb_qsel0_l_a[7:4]; |
| 1380 | assign arb_qsel1_l_a_unused[7:4] = arb_qsel1_l_a[7:4]; |
| 1381 | assign arb_shift_l_a_unused[7:4] = arb_shift_l_a[7:4]; |
| 1382 | assign arb_grant_r_a_unused[3:0] = arb_grant_r_a[3:0]; |
| 1383 | assign arb_q0_holdbar_r_a_unused[3:0] = arb_q0_holdbar_r_a[3:0]; |
| 1384 | assign arb_qsel0_r_a_unused[3:0] = arb_qsel0_r_a[3:0]; |
| 1385 | assign arb_qsel1_r_a_unused[3:0] = arb_qsel1_r_a[3:0]; |
| 1386 | assign arb_shift_r_a_unused[3:0] = arb_shift_r_a[3:0]; |
| 1387 | assign arb_grant_r_a_unused[8] = arb_grant_r_a[8]; |
| 1388 | assign arb_q0_holdbar_r_a_unused[8] = arb_q0_holdbar_r_a[8]; |
| 1389 | assign arb_qsel0_r_a_unused[8] = arb_qsel0_r_a[8]; |
| 1390 | assign arb_qsel1_r_a_unused[8] = arb_qsel1_r_a[8]; |
| 1391 | assign arb_shift_r_a_unused[8] = arb_shift_r_a[8]; |
| 1392 | assign cpx_mac8_scanin = scan_rep_out; |
| 1393 | assign cpx_mac0_scanin = cpx_mac8_scanout; |
| 1394 | assign cpx_mac1_scanin = cpx_mac0_scanout; |
| 1395 | assign cpx_mac2_scanin = cpx_mac1_scanout; |
| 1396 | assign cpx_mac3_scanin = cpx_mac2_scanout; |
| 1397 | assign cpx_mac4_scanin = cpx_mac3_scanout; |
| 1398 | assign cpx_mac5_scanin = cpx_mac4_scanout; |
| 1399 | assign cpx_mac6_scanin = cpx_mac5_scanout; |
| 1400 | assign cpx_mac7_scanin = cpx_mac6_scanout; |
| 1401 | assign scan_out = cpx_mac7_scanout; |
| 1402 | |
| 1403 | cpx_rep_dp cpx_rep( |
| 1404 | .mac0_rep_out (mac0_rep_out[4:0]), |
| 1405 | .mac1_rep_out (mac1_rep_out[4:0]), |
| 1406 | .mac2_rep_out (mac2_rep_out[4:0]), |
| 1407 | .mac3_rep_out (mac3_rep_out[4:0]), |
| 1408 | .mac4_rep_out (mac4_rep_out[4:0]), |
| 1409 | .mac5_rep_out (mac5_rep_out[4:0]), |
| 1410 | .mac6_rep_out (mac6_rep_out[4:0]), |
| 1411 | .scan_rep_out (scan_rep_out), |
| 1412 | .mac0_rep_in (mac0_rep_in[4:0]), |
| 1413 | .mac1_rep_in (mac1_rep_in[4:0]), |
| 1414 | .mac2_rep_in (mac2_rep_in[4:0]), |
| 1415 | .mac3_rep_in (mac3_rep_in[4:0]), |
| 1416 | .mac4_rep_in (mac4_rep_in[4:0]), |
| 1417 | .mac5_rep_in (mac5_rep_in[4:0]), |
| 1418 | .mac6_rep_in (mac6_rep_in[4:0]), |
| 1419 | .scan_rep_in (scan_rep_in)); |
| 1420 | cpx_mbl_dp cpx_mac8( |
| 1421 | .data_out_x_ (col8_data_x_[149:0]), |
| 1422 | .tcu_scan_en_out (tcu_scan_en_out_8_unused), |
| 1423 | .tcu_pce_ov_out (tcu_pce_ov_out_8_unused), |
| 1424 | .ccx_aclk_out (ccx_aclk_out_8_unused), |
| 1425 | .ccx_bclk_out (ccx_bclk_out_8_unused), |
| 1426 | .arb_grant_a (arb_grant_l_a[8]), |
| 1427 | .arb_qsel0_a (arb_qsel0_l_a[8]), |
| 1428 | .arb_qsel1_a (arb_qsel1_l_a[8]), |
| 1429 | .arb_q0_holdbar_a (arb_q0_holdbar_l_a[8]), |
| 1430 | .arb_shift_a (arb_shift_l_a[8]), |
| 1431 | .src_cpx_data_a (io_cpx_data_a[149:0]), |
| 1432 | .data_prev_x_ (all_ones[149:0]), |
| 1433 | .scan_in (cpx_mac8_scanin), |
| 1434 | .scan_out (cpx_mac8_scanout), |
| 1435 | .l2clk (l2clk), |
| 1436 | .tcu_scan_en (tcu_scan_en_out[0]), |
| 1437 | .tcu_pce_ov (tcu_pce_ov_out[0]), |
| 1438 | .ccx_aclk (ccx_aclk_out[0]), |
| 1439 | .ccx_bclk (ccx_bclk_out[0])); |
| 1440 | cpx_mcl_dp cpx_mac0( |
| 1441 | .data_out_x_ (cpx_spc_data_x_[149:0]), |
| 1442 | .tcu_scan_en_out (tcu_scan_en_out[0]), |
| 1443 | .tcu_pce_ov_out (tcu_pce_ov_out[0]), |
| 1444 | .ccx_aclk_out (ccx_aclk_out[0]), |
| 1445 | .ccx_bclk_out (ccx_bclk_out[0]), |
| 1446 | .arb_grant_a (arb_grant_l_a_rep[2]), |
| 1447 | .arb_qsel0_a (arb_qsel0_l_a_rep[2]), |
| 1448 | .arb_qsel1_a (arb_qsel1_l_a_rep[2]), |
| 1449 | .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[2]), |
| 1450 | .arb_shift_a (arb_shift_l_a_rep[2]), |
| 1451 | .src_cpx_data_a (scache2_cpx_data_a[149:0]), |
| 1452 | .data_crit_x_ (col1_data_x_[149:0]), |
| 1453 | .data_ncrit_x_ (col8_data_x_[149:0]), |
| 1454 | .scan_in (cpx_mac0_scanin), |
| 1455 | .scan_out (cpx_mac0_scanout), |
| 1456 | .l2clk (l2clk), |
| 1457 | .tcu_scan_en (tcu_scan_en_out[1]), |
| 1458 | .tcu_pce_ov (tcu_pce_ov_out[1]), |
| 1459 | .ccx_aclk (ccx_aclk_out[1]), |
| 1460 | .ccx_bclk (ccx_bclk_out[1])); |
| 1461 | cpx_mbr_dp cpx_mac1( |
| 1462 | .data_out_x_ (col1_data_x_[149:0]), |
| 1463 | .tcu_scan_en_out (tcu_scan_en_out[1]), |
| 1464 | .tcu_pce_ov_out (tcu_pce_ov_out[1]), |
| 1465 | .ccx_aclk_out (ccx_aclk_out[1]), |
| 1466 | .ccx_bclk_out (ccx_bclk_out[1]), |
| 1467 | .arb_grant_a (arb_grant_l_a_rep[0]), |
| 1468 | .arb_qsel0_a (arb_qsel0_l_a_rep[0]), |
| 1469 | .arb_qsel1_a (arb_qsel1_l_a_rep[0]), |
| 1470 | .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[0]), |
| 1471 | .arb_shift_a (arb_shift_l_a_rep[0]), |
| 1472 | .src_cpx_data_a (scache0_cpx_data_a[149:0]), |
| 1473 | .data_prev_x_ (col2_data_x_[149:0]), |
| 1474 | .scan_in (cpx_mac1_scanin), |
| 1475 | .scan_out (cpx_mac1_scanout), |
| 1476 | .l2clk (l2clk), |
| 1477 | .tcu_scan_en (tcu_scan_en_out[2]), |
| 1478 | .tcu_pce_ov (tcu_pce_ov_out[2]), |
| 1479 | .ccx_aclk (ccx_aclk_out[2]), |
| 1480 | .ccx_bclk (ccx_bclk_out[2])); |
| 1481 | cpx_mbr_dp cpx_mac2( |
| 1482 | .data_out_x_ (col2_data_x_[149:0]), |
| 1483 | .tcu_scan_en_out (tcu_scan_en_out[2]), |
| 1484 | .tcu_pce_ov_out (tcu_pce_ov_out[2]), |
| 1485 | .ccx_aclk_out (ccx_aclk_out[2]), |
| 1486 | .ccx_bclk_out (ccx_bclk_out[2]), |
| 1487 | .arb_grant_a (arb_grant_l_a_rep[3]), |
| 1488 | .arb_qsel0_a (arb_qsel0_l_a_rep[3]), |
| 1489 | .arb_qsel1_a (arb_qsel1_l_a_rep[3]), |
| 1490 | .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[3]), |
| 1491 | .arb_shift_a (arb_shift_l_a_rep[3]), |
| 1492 | .src_cpx_data_a (scache3_cpx_data_a[149:0]), |
| 1493 | .data_prev_x_ (col3_data_x_[149:0]), |
| 1494 | .scan_in (cpx_mac2_scanin), |
| 1495 | .scan_out (cpx_mac2_scanout), |
| 1496 | .l2clk (l2clk), |
| 1497 | .tcu_scan_en (tcu_scan_en_out[3]), |
| 1498 | .tcu_pce_ov (tcu_pce_ov_out[3]), |
| 1499 | .ccx_aclk (ccx_aclk_out[3]), |
| 1500 | .ccx_bclk (ccx_bclk_out[3])); |
| 1501 | cpx_mbr_dp cpx_mac3( |
| 1502 | .data_out_x_ (col3_data_x_[149:0]), |
| 1503 | .tcu_scan_en_out (tcu_scan_en_out[3]), |
| 1504 | .tcu_pce_ov_out (tcu_pce_ov_out[3]), |
| 1505 | .ccx_aclk_out (ccx_aclk_out[3]), |
| 1506 | .ccx_bclk_out (ccx_bclk_out[3]), |
| 1507 | .arb_grant_a (arb_grant_l_a_rep[1]), |
| 1508 | .arb_qsel0_a (arb_qsel0_l_a_rep[1]), |
| 1509 | .arb_qsel1_a (arb_qsel1_l_a_rep[1]), |
| 1510 | .arb_q0_holdbar_a (arb_q0_holdbar_l_a_rep[1]), |
| 1511 | .arb_shift_a (arb_shift_l_a_rep[1]), |
| 1512 | .src_cpx_data_a (scache1_cpx_data_a[149:0]), |
| 1513 | .data_prev_x_ (col4_data_x_[149:0]), |
| 1514 | .scan_in (cpx_mac3_scanin), |
| 1515 | .scan_out (cpx_mac3_scanout), |
| 1516 | .l2clk (l2clk), |
| 1517 | .tcu_scan_en (tcu_scan_en), |
| 1518 | .tcu_pce_ov (tcu_pce_ov), |
| 1519 | .ccx_aclk (ccx_aclk), |
| 1520 | .ccx_bclk (ccx_bclk)); |
| 1521 | cpx_mbr_dp cpx_mac4( |
| 1522 | .data_out_x_ (col4_data_x_[149:0]), |
| 1523 | .tcu_scan_en_out (tcu_scan_en_out[4]), |
| 1524 | .tcu_pce_ov_out (tcu_pce_ov_out[4]), |
| 1525 | .ccx_aclk_out (ccx_aclk_out[4]), |
| 1526 | .ccx_bclk_out (ccx_bclk_out[4]), |
| 1527 | .arb_grant_a (arb_grant_r_a_rep[7]), |
| 1528 | .arb_qsel0_a (arb_qsel0_r_a_rep[7]), |
| 1529 | .arb_qsel1_a (arb_qsel1_r_a_rep[7]), |
| 1530 | .arb_q0_holdbar_a (arb_q0_holdbar_r_a_rep[7]), |
| 1531 | .arb_shift_a (arb_shift_r_a_rep[7]), |
| 1532 | .src_cpx_data_a (scache7_cpx_data_a[149:0]), |
| 1533 | .data_prev_x_ (col5_data_x_[149:0]), |
| 1534 | .scan_in (cpx_mac4_scanin), |
| 1535 | .scan_out (cpx_mac4_scanout), |
| 1536 | .l2clk (l2clk), |
| 1537 | .tcu_scan_en (tcu_scan_en_out[3]), |
| 1538 | .tcu_pce_ov (tcu_pce_ov_out[3]), |
| 1539 | .ccx_aclk (ccx_aclk_out[3]), |
| 1540 | .ccx_bclk (ccx_bclk_out[3])); |
| 1541 | cpx_mbr_dp cpx_mac5( |
| 1542 | .data_out_x_ (col5_data_x_[149:0]), |
| 1543 | .tcu_scan_en_out (tcu_scan_en_out[5]), |
| 1544 | .tcu_pce_ov_out (tcu_pce_ov_out[5]), |
| 1545 | .ccx_aclk_out (ccx_aclk_out[5]), |
| 1546 | .ccx_bclk_out (ccx_bclk_out[5]), |
| 1547 | .arb_grant_a (arb_grant_r_a_rep[5]), |
| 1548 | .arb_qsel0_a (arb_qsel0_r_a_rep[5]), |
| 1549 | .arb_qsel1_a (arb_qsel1_r_a_rep[5]), |
| 1550 | .arb_q0_holdbar_a (arb_q0_holdbar_r_a_rep[5]), |
| 1551 | .arb_shift_a (arb_shift_r_a_rep[5]), |
| 1552 | .src_cpx_data_a (scache5_cpx_data_a[149:0]), |
| 1553 | .data_prev_x_ (col6_data_x_[149:0]), |
| 1554 | .scan_in (cpx_mac5_scanin), |
| 1555 | .scan_out (cpx_mac5_scanout), |
| 1556 | .l2clk (l2clk), |
| 1557 | .tcu_scan_en (tcu_scan_en_out[4]), |
| 1558 | .tcu_pce_ov (tcu_pce_ov_out[4]), |
| 1559 | .ccx_aclk (ccx_aclk_out[4]), |
| 1560 | .ccx_bclk (ccx_bclk_out[4])); |
| 1561 | cpx_mbr_dp cpx_mac6( |
| 1562 | .data_out_x_ (col6_data_x_[149:0]), |
| 1563 | .tcu_scan_en_out (tcu_scan_en_out[6]), |
| 1564 | .tcu_pce_ov_out (tcu_pce_ov_out[6]), |
| 1565 | .ccx_aclk_out (ccx_aclk_out[6]), |
| 1566 | .ccx_bclk_out (ccx_bclk_out[6]), |
| 1567 | .arb_grant_a (arb_grant_r_a_rep[6]), |
| 1568 | .arb_qsel0_a (arb_qsel0_r_a_rep[6]), |
| 1569 | .arb_qsel1_a (arb_qsel1_r_a_rep[6]), |
| 1570 | .arb_q0_holdbar_a (arb_q0_holdbar_r_a_rep[6]), |
| 1571 | .arb_shift_a (arb_shift_r_a_rep[6]), |
| 1572 | .src_cpx_data_a (scache6_cpx_data_a[149:0]), |
| 1573 | .data_prev_x_ (col7_data_x_[149:0]), |
| 1574 | .scan_in (cpx_mac6_scanin), |
| 1575 | .scan_out (cpx_mac6_scanout), |
| 1576 | .l2clk (l2clk), |
| 1577 | .tcu_scan_en (tcu_scan_en_out[5]), |
| 1578 | .tcu_pce_ov (tcu_pce_ov_out[5]), |
| 1579 | .ccx_aclk (ccx_aclk_out[5]), |
| 1580 | .ccx_bclk (ccx_bclk_out[5])); |
| 1581 | cpx_mar_dp cpx_mac7( |
| 1582 | .data_out_x_ (col7_data_x_[149:0]), |
| 1583 | .tcu_scan_en_out (tcu_scan_en_out_7_unused), |
| 1584 | .tcu_pce_ov_out (tcu_pce_ov_out_7_unused), |
| 1585 | .ccx_aclk_out (ccx_aclk_out_7_unused), |
| 1586 | .ccx_bclk_out (ccx_bclk_out_7_unused), |
| 1587 | .arb_grant_a (arb_grant_r_a[4]), |
| 1588 | .arb_qsel0_a (arb_qsel0_r_a[4]), |
| 1589 | .arb_qsel1_a (arb_qsel1_r_a[4]), |
| 1590 | .arb_q0_holdbar_a (arb_q0_holdbar_r_a[4]), |
| 1591 | .arb_shift_a (arb_shift_r_a[4]), |
| 1592 | .src_cpx_data_a (scache4_cpx_data_a[149:0]), |
| 1593 | .scan_in (cpx_mac7_scanin), |
| 1594 | .scan_out (cpx_mac7_scanout), |
| 1595 | .l2clk (l2clk), |
| 1596 | .tcu_scan_en (tcu_scan_en_out[6]), |
| 1597 | .tcu_pce_ov (tcu_pce_ov_out[6]), |
| 1598 | .ccx_aclk (ccx_aclk_out[6]), |
| 1599 | .ccx_bclk (ccx_bclk_out[6])); |
| 1600 | endmodule |
| 1601 | |
| 1602 | |
| 1603 | `endif // `ifdef FPGA |
| 1604 | |