| 1 | // ========== Copyright Header Begin ========================================== |
| 2 | // |
| 3 | // OpenSPARC T2 Processor File: niu_ram_640_146.v |
| 4 | // Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved |
| 5 | // 4150 Network Circle, Santa Clara, California 95054, U.S.A. |
| 6 | // |
| 7 | // * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 8 | // |
| 9 | // This program is free software; you can redistribute it and/or modify |
| 10 | // it under the terms of the GNU General Public License as published by |
| 11 | // the Free Software Foundation; version 2 of the License. |
| 12 | // |
| 13 | // This program is distributed in the hope that it will be useful, |
| 14 | // but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 15 | // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 16 | // GNU General Public License for more details. |
| 17 | // |
| 18 | // You should have received a copy of the GNU General Public License |
| 19 | // along with this program; if not, write to the Free Software |
| 20 | // Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 21 | // |
| 22 | // For the avoidance of doubt, and except that if any non-GPL license |
| 23 | // choice is available it will apply instead, Sun elects to use only |
| 24 | // the General Public License version 2 (GPLv2) at this time for any |
| 25 | // software where a choice of GPL license versions is made |
| 26 | // available with the language indicating that GPLv2 or any later version |
| 27 | // may be used, or where a choice of which version of the GPL is applied is |
| 28 | // otherwise unspecified. |
| 29 | // |
| 30 | // Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
| 31 | // CA 95054 USA or visit www.sun.com if you need additional information or |
| 32 | // have any questions. |
| 33 | // |
| 34 | // ========== Copyright Header End ============================================ |
| 35 | |
| 36 | /********************************************************** |
| 37 | *********************************************************** |
| 38 | |
| 39 | Project : Niu |
| 40 | |
| 41 | File name : niu_ram_640_146.v |
| 42 | |
| 43 | Module(s) name : niu_ram_640_146 |
| 44 | |
| 45 | Parent modules : |
| 46 | |
| 47 | Child modules : |
| 48 | |
| 49 | Author's name : George Chu |
| 50 | |
| 51 | Date : April. 2004 |
| 52 | |
| 53 | Description : |
| 54 | |
| 55 | Synthesis Notes: |
| 56 | |
| 57 | Modification History: |
| 58 | Date Description |
| 59 | ---- ----------- |
| 60 | |
| 61 | ************************************************************ |
| 62 | ***********************************************************/ |
| 63 | |
| 64 | `timescale 1ns/10ps |
| 65 | |
| 66 | module niu_ram_640_146 ( |
| 67 | data_inp, |
| 68 | addr_rd, |
| 69 | addr_wt, |
| 70 | wt_enable, |
| 71 | cs_rd, |
| 72 | clk, |
| 73 | data_out |
| 74 | ); |
| 75 | |
| 76 | input [145:0] data_inp; // data_input, via port_B |
| 77 | input [9:0] addr_rd; // read_address, via port_A |
| 78 | input [9:0] addr_wt; // write_address, via port_B |
| 79 | input wt_enable; // write_enable, via port_B |
| 80 | input cs_rd; // chip_selet_rd_port, i.e., port_A |
| 81 | input clk; // clock |
| 82 | output [145:0] data_out; // data read out, via port_A |
| 83 | |
| 84 | /** temperarily forcing *** TI_scan ******************************************/ |
| 85 | // inputs of TI_scan |
| 86 | wire scan_in = 1'h0; |
| 87 | wire se = 1'h0; |
| 88 | wire tcu_pce_ov = 1'h0; |
| 89 | wire tcu_clk_stop = 1'h0; |
| 90 | wire tcu_aclk = clk; |
| 91 | wire tcu_bclk = clk; |
| 92 | |
| 93 | wire [145:0] data_out; |
| 94 | wire scan_out; |
| 95 | |
| 96 | n2_niu_dp_640x146s_cust ram_640_146_0 ( |
| 97 | .wr_adr (addr_wt[9:0]), |
| 98 | .wr_en (wt_enable), |
| 99 | .rd_adr (addr_rd[9:0]), |
| 100 | .rd_en (cs_rd), |
| 101 | .din (data_inp[145:0]), |
| 102 | .dout (data_out[145:0]), |
| 103 | .rdclk (clk), |
| 104 | .wrclk (clk), |
| 105 | .scan_in (scan_in), |
| 106 | .se (se), |
| 107 | .tcu_pce_ov (tcu_pce_ov), |
| 108 | .tcu_clk_stop (tcu_aclk), |
| 109 | .tcu_aclk (tcu_bclk), |
| 110 | .tcu_bclk (tcu_bclk), |
| 111 | .scan_out (scan_out) |
| 112 | ); |
| 113 | |
| 114 | endmodule |