| 1 | : |
| 2 | :#define addrA_reg %l0 |
| 3 | :#define turn_reg %l1 |
| 4 | :#define data_base_reg %l2 |
| 5 | :#define my_id_reg %l4 |
| 6 | :#define global_cnt_reg %l5 |
| 7 | :#define prot_area_reg %l6 |
| 8 | : |
| 9 | :#define test_reg1 %i0 |
| 10 | :#define test_reg2 %i1 |
| 11 | :#define test_reg3 %i3 |
| 12 | : |
| 13 | :#define TIMEOUT 0x1000 |
| 14 | :#define ITERATIONS 0x10 |
| 15 | : |
| 16 | :#include "hboot.s" |
| 17 | : |
| 18 | :.global main |
| 19 | :main: |
| 20 | : |
| 21 | : wr %g0, 0x4, %fprs ! make sure fef is 1 for FP ops. |
| 22 | : th_fork(th_main,test_reg1) |
| 23 | : |
| 24 | $proc_num = 8; |
| 25 | if(scalar(@ARGV)){ |
| 26 | $proc_num = $ARGV[0]; |
| 27 | } |
| 28 | for ( $c = 0; $c < $proc_num; $c++ ){ |
| 29 | $offs = 4 * $c; # thread's own offset |
| 30 | |
| 31 | :th_main_${c}: |
| 32 | : setx addrA, test_reg1, addrA_reg |
| 33 | : setx turn, test_reg1, turn_reg |
| 34 | : setx prot_area, test_reg1, prot_area_reg |
| 35 | : set ITERATIONS, global_cnt_reg |
| 36 | : set ${c}, my_id_reg ! store my ID |
| 37 | : |
| 38 | :claim${c}: |
| 39 | : set 1, test_reg1 ! store 1 in lock area |
| 40 | : st test_reg1, [addrA_reg + ${offs}] |
| 41 | |
| 42 | :giveturnaway${c}: ! That's the essence |
| 43 | $next = ($c + 1) % ${proc_num}; |
| 44 | : set ${next}, test_reg1 ! of peterson |
| 45 | : st test_reg1, [turn_reg] |
| 46 | : membar 0x40 ! IMPORTANT |
| 47 | : |
| 48 | :getlock${c}: |
| 49 | : prefetch [turn_reg], #n_writes |
| 50 | : prefetch [addrA_reg], #n_writes |
| 51 | : prefetch [prot_area_reg], #n_writes |
| 52 | : ld [turn_reg + 0x8], test_reg1 |
| 53 | : sub test_reg1, 0x55, test_reg1 |
| 54 | : brz test_reg1, good_end |
| 55 | : nop |
| 56 | : mov %g0, test_reg2 ! while flags are busy |
| 57 | : ! AND turn is not mine |
| 58 | : ! WAIT |
| 59 | for ( $k = 0; $k < ${proc_num} * 4; $k = $k + 4) { |
| 60 | : ld [addrA_reg + ${k}], test_reg1 ! accumulate flags |
| 61 | : add test_reg1, test_reg2, test_reg2 ! in test_reg2 |
| 62 | } |
| 63 | : subcc test_reg2, 0x1, %g0 ! if result is 1 flags |
| 64 | : be gotlock${c} ! are not busy |
| 65 | : nop |
| 66 | : |
| 67 | :wait_turn${c}: |
| 68 | : ld [turn_reg], test_reg3 ! read the turn reg. |
| 69 | : subcc my_id_reg, test_reg3, %g0 ! and check |
| 70 | : bne getlock${c} |
| 71 | : nop |
| 72 | : |
| 73 | :gotlock${c}: |
| 74 | : ld [prot_area_reg], test_reg1 |
| 75 | : inc test_reg1 |
| 76 | : st test_reg1, [prot_area_reg] |
| 77 | : ldd [prot_area_reg], %f0 ! FP noise. |
| 78 | : !faddd %f0, %f0, %f2 |
| 79 | : !fsubd %f2, %f0, %f0 |
| 80 | : std %f0, [prot_area_reg] |
| 81 | : |
| 82 | : ld [prot_area_reg + 0xc], test_reg1 |
| 83 | : inc test_reg1 |
| 84 | : st test_reg1, [prot_area_reg + 0xc] |
| 85 | : ldd [prot_area_reg], %f0 ! FP noise. |
| 86 | : !faddd %f0, %f0, %f2 |
| 87 | : !fsubd %f2, %f0, %f0 |
| 88 | : std %f0, [prot_area_reg] |
| 89 | : |
| 90 | : ld [prot_area_reg + 0x10], test_reg1 |
| 91 | : inc test_reg1 |
| 92 | : st test_reg1, [prot_area_reg + 0x10] |
| 93 | : ldd [prot_area_reg], %f0 ! FP noise. |
| 94 | : !faddd %f0, %f0, %f2 |
| 95 | : !fsubd %f2, %f0, %f0 |
| 96 | : std %f0, [prot_area_reg] |
| 97 | : |
| 98 | : ld [prot_area_reg + 0x1c], test_reg1 |
| 99 | : inc test_reg1 |
| 100 | : st test_reg1, [prot_area_reg + 0x1c] |
| 101 | : ldd [prot_area_reg], %f0 ! FP noise. |
| 102 | : !faddd %f0, %f0, %f2 |
| 103 | : !fsubd %f2, %f0, %f0 |
| 104 | : std %f0, [prot_area_reg] |
| 105 | : |
| 106 | : ld [prot_area_reg + 0x20], test_reg1 |
| 107 | : inc test_reg1 |
| 108 | : st test_reg1, [prot_area_reg + 0x20] |
| 109 | : ldd [prot_area_reg], %f0 ! FP noise. |
| 110 | : !faddd %f0, %f0, %f2 |
| 111 | : !fsubd %f2, %f0, %f0 |
| 112 | : std %f0, [prot_area_reg] |
| 113 | : |
| 114 | :clearlock${c}: |
| 115 | : st %g0, [addrA_reg + ${offs}] ! release... |
| 116 | : set ${next}, test_reg1 |
| 117 | : st test_reg1, [turn_reg] |
| 118 | : |
| 119 | if($c == $proc_num -1){ |
| 120 | : deccc global_cnt_reg |
| 121 | : bne claim${c} |
| 122 | : nop |
| 123 | : set 0x55, test_reg1 |
| 124 | : st test_reg1, [turn_reg + 0x8] |
| 125 | : ba good_end |
| 126 | : nop |
| 127 | } |
| 128 | else{ |
| 129 | : ba claim${c} |
| 130 | : nop |
| 131 | } |
| 132 | } |
| 133 | :!--------------------------------------------------------------------- |
| 134 | : |
| 135 | :good_end: |
| 136 | : ta T_GOOD_TRAP |
| 137 | :bad_end: |
| 138 | : ta T_BAD_TRAP |
| 139 | : |
| 140 | :!========================== |
| 141 | : |
| 142 | : |
| 143 | :SECTION .MY_DATA0 TEXT_VA=0xf0100000, DATA_VA=0xd0100000 |
| 144 | :attr_data { |
| 145 | : Name = .MY_DATA0, |
| 146 | : VA= 0x0d0100000 |
| 147 | : RA= 0x1d0100000 |
| 148 | : PA= ra2pa(0x1d0100000,0), |
| 149 | : part_0_ctx_nonzero_tsb_config_0, |
| 150 | : TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0, |
| 151 | : TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, |
| 152 | : TTE_L=0, TTE_CP=1, TTE_CV=1, TTE_E=0, TTE_P=0, TTE_W=1 |
| 153 | : } |
| 154 | : |
| 155 | :attr_text { |
| 156 | : Name = .MY_DATA0, |
| 157 | : VA= 0x0f0100000 |
| 158 | : RA= 0x1f0100000 |
| 159 | : PA= ra2pa(0x1f0100000,0), |
| 160 | : part_0_ctx_nonzero_tsb_config_0, |
| 161 | : TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0, |
| 162 | : TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, |
| 163 | : TTE_L=0, TTE_CP=1, TTE_CV=1, TTE_E=0, TTE_P=0, TTE_W=1 |
| 164 | : } |
| 165 | : |
| 166 | : .data |
| 167 | : |
| 168 | :.global addrA |
| 169 | :.global turn |
| 170 | :.align 0x4 |
| 171 | :addrA: |
| 172 | for ( $k = 0; $k < 32; $k++) { |
| 173 | : .word 0x0 |
| 174 | : .word 0x0 |
| 175 | } |
| 176 | : |
| 177 | :.skip 0x1000 |
| 178 | :.align 0x4 |
| 179 | :turn: |
| 180 | : .word 0x0 |
| 181 | : .word 0x0 |
| 182 | : .word 0x0 |
| 183 | : |
| 184 | :SECTION .MY_DATA1 TEXT_VA=0xf1110000, DATA_VA=0xd1110000 |
| 185 | :attr_data { |
| 186 | : Name = .MY_DATA1, |
| 187 | : VA= 0x0d1110000, |
| 188 | : RA= 0x1d1110000, |
| 189 | : PA= ra2pa(0x1d1110000,0), |
| 190 | : part_0_ctx_nonzero_tsb_config_0, |
| 191 | : TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0, |
| 192 | : TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, |
| 193 | : TTE_L=0, TTE_CP=1, TTE_CV=1, TTE_E=0, TTE_P=0, TTE_W=1 |
| 194 | : } |
| 195 | : |
| 196 | :attr_text { |
| 197 | : Name = .MY_DATA1, |
| 198 | : VA= 0x0f1110000, |
| 199 | : RA= 0x1f1110000, |
| 200 | : PA= ra2pa(0x1f1110000,0), |
| 201 | : part_0_ctx_nonzero_tsb_config_0, |
| 202 | : TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0, |
| 203 | : TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, |
| 204 | : TTE_L=0, TTE_CP=1, TTE_CV=1, TTE_E=0, TTE_P=0, TTE_W=1 |
| 205 | : } |
| 206 | : |
| 207 | : .data |
| 208 | :.global prot_area |
| 209 | :prot_area: |
| 210 | : .word 0xbeef |
| 211 | : .skip 0x1000 |
| 212 | : .word 0xbeef |
| 213 | : |
| 214 | :.end |