| 1 | /* |
| 2 | * ========== Copyright Header Begin ========================================== |
| 3 | * |
| 4 | * OpenSPARC T2 Processor File: tso_n1_prod_cons5.s |
| 5 | * Copyright (C) 1995-2007 Sun Microsystems, Inc. All Rights Reserved |
| 6 | * 4150 Network Circle, Santa Clara, California 95054, U.S.A. |
| 7 | * |
| 8 | * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER. |
| 9 | * |
| 10 | * This program is free software; you can redistribute it and/or modify |
| 11 | * it under the terms of the GNU General Public License as published by |
| 12 | * the Free Software Foundation; version 2 of the License. |
| 13 | * |
| 14 | * This program is distributed in the hope that it will be useful, |
| 15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
| 16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
| 17 | * GNU General Public License for more details. |
| 18 | * |
| 19 | * You should have received a copy of the GNU General Public License |
| 20 | * along with this program; if not, write to the Free Software |
| 21 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
| 22 | * |
| 23 | * For the avoidance of doubt, and except that if any non-GPL license |
| 24 | * choice is available it will apply instead, Sun elects to use only |
| 25 | * the General Public License version 2 (GPLv2) at this time for any |
| 26 | * software where a choice of GPL license versions is made |
| 27 | * available with the language indicating that GPLv2 or any later version |
| 28 | * may be used, or where a choice of which version of the GPL is applied is |
| 29 | * otherwise unspecified. |
| 30 | * |
| 31 | * Please contact Sun Microsystems, Inc., 4150 Network Circle, Santa Clara, |
| 32 | * CA 95054 USA or visit www.sun.com if you need additional information or |
| 33 | * have any questions. |
| 34 | * |
| 35 | * |
| 36 | * ========== Copyright Header End ============================================ |
| 37 | */ |
| 38 | #define spinlock_addr_reg %o0 |
| 39 | #define database_addr_reg %i0 |
| 40 | #define aliased_base_reg %o2 |
| 41 | #define my_id_reg %o3 |
| 42 | #define test_reg %o4 |
| 43 | #define global_cnt_reg %o5 |
| 44 | #define tmp1 %l1 |
| 45 | #define tmp2 %i1 |
| 46 | #define tmp3 %i2 |
| 47 | |
| 48 | #define ITERATIONS 0x10 |
| 49 | |
| 50 | #include "boot.s" |
| 51 | |
| 52 | .global main |
| 53 | main: |
| 54 | |
| 55 | setx database_address, tmp1, database_addr_reg |
| 56 | add database_addr_reg, 0x40, spinlock_addr_reg |
| 57 | setx aliased_area, tmp1, aliased_base_reg |
| 58 | set ITERATIONS, global_cnt_reg |
| 59 | |
| 60 | th_fork(th_main,%l0) |
| 61 | |
| 62 | ! Some of the threads are producers, some are consumers |
| 63 | ! A pair of producer and consumer has the same ID. |
| 64 | !===================================================== |
| 65 | th_main_0: |
| 66 | add %g0, 0x8, my_id_reg ! this is my ID address |
| 67 | mov my_id_reg, tmp2 |
| 68 | ba producer |
| 69 | nop |
| 70 | |
| 71 | th_main_1: |
| 72 | ta T_GOOD_TRAP |
| 73 | |
| 74 | th_main_2: |
| 75 | ta T_GOOD_TRAP |
| 76 | |
| 77 | th_main_3: |
| 78 | ta T_GOOD_TRAP |
| 79 | |
| 80 | th_main_4: |
| 81 | add %g0, 0x8, my_id_reg |
| 82 | mov my_id_reg, tmp2 |
| 83 | ba consumer |
| 84 | nop |
| 85 | |
| 86 | th_main_5: |
| 87 | ta T_GOOD_TRAP |
| 88 | |
| 89 | th_main_6: |
| 90 | ta T_GOOD_TRAP |
| 91 | |
| 92 | th_main_7: |
| 93 | ta T_GOOD_TRAP |
| 94 | |
| 95 | !====================================================== |
| 96 | producer: |
| 97 | ld [spinlock_addr_reg + my_id_reg], test_reg ! try to acquire lock |
| 98 | tst test_reg ! did we get it? |
| 99 | be producer_gotlock |
| 100 | nop |
| 101 | ba producer |
| 102 | nop |
| 103 | |
| 104 | !====================================================== |
| 105 | consumer: |
| 106 | ld [spinlock_addr_reg + my_id_reg], test_reg ! try to acquire lock |
| 107 | ld [database_addr_reg + my_id_reg], tmp3 ! load data |
| 108 | sub test_reg, 0x55, tmp1 ! code to end the test |
| 109 | tst tmp1 |
| 110 | be good_end ! end the test |
| 111 | nop |
| 112 | sub test_reg, 0x1, tmp1 ! check for new data |
| 113 | brz tmp1, consumer_gotlock |
| 114 | nop |
| 115 | ba consumer |
| 116 | nop |
| 117 | |
| 118 | !======================================================= |
| 119 | producer_gotlock: |
| 120 | |
| 121 | ! kick out the line from L2 (if L2 and L1 direct mapped) |
| 122 | ld [aliased_base_reg], tmp1 |
| 123 | mov 0x1, tmp1 ! prepare flag ready |
| 124 | st tmp2, [database_addr_reg + my_id_reg] ! store data |
| 125 | st tmp1, [spinlock_addr_reg + my_id_reg] ! store flag ready |
| 126 | inc tmp2 |
| 127 | deccc global_cnt_reg |
| 128 | be cleanup_and_finish |
| 129 | nop |
| 130 | ba producer |
| 131 | nop |
| 132 | |
| 133 | cleanup_and_finish: |
| 134 | add %g0, 0x55 , tmp1 |
| 135 | st tmp1, [spinlock_addr_reg + my_id_reg] ! finish the test |
| 136 | ba good_end |
| 137 | nop |
| 138 | |
| 139 | !======================================================== |
| 140 | consumer_gotlock: |
| 141 | |
| 142 | subcc tmp3, tmp2, tmp3 |
| 143 | bne bad_end |
| 144 | nop |
| 145 | inc tmp2 |
| 146 | |
| 147 | st %g0, [database_addr_reg + my_id_reg] ! clean data |
| 148 | st %g0, [spinlock_addr_reg + my_id_reg] ! consumer ready |
| 149 | ba consumer |
| 150 | nop |
| 151 | |
| 152 | good_end: |
| 153 | ta T_GOOD_TRAP |
| 154 | bad_end: |
| 155 | ta T_BAD_TRAP |
| 156 | |
| 157 | !========================== |
| 158 | |
| 159 | SECTION .MY_DATA0 DATA_VA=0xd0100000 |
| 160 | attr_data { |
| 161 | Name = .MY_DATA0, |
| 162 | VA= 0x0d0100000 |
| 163 | RA= 0x1d0100000 |
| 164 | PA= ra2pa(0x1d0100000,0), |
| 165 | part_0_ctx_nonzero_tsb_config_0, |
| 166 | TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0, |
| 167 | TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, |
| 168 | TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1 |
| 169 | } |
| 170 | |
| 171 | .data |
| 172 | |
| 173 | .global database_address |
| 174 | .align 0x100 |
| 175 | database_address: |
| 176 | .skip 0x40 |
| 177 | .word 0x0 |
| 178 | .word 0x0 |
| 179 | .word 0x0 |
| 180 | .word 0x0 |
| 181 | .word 0x0 |
| 182 | .word 0x0 |
| 183 | .word 0x0 |
| 184 | .word 0x0 |
| 185 | .word 0x0 |
| 186 | .word 0x0 |
| 187 | .word 0x0 |
| 188 | .word 0x0 |
| 189 | .word 0x0 |
| 190 | .word 0x0 |
| 191 | .word 0x0 |
| 192 | .word 0x0 |
| 193 | .skip 1000 |
| 194 | |
| 195 | |
| 196 | SECTION .MY_DATA1 DATA_VA=0xd1110000 |
| 197 | attr_data { |
| 198 | Name = .MY_DATA1, |
| 199 | VA= 0x0d1110000, |
| 200 | RA= 0x1d1110000, |
| 201 | PA= ra2pa(0x1d1110000,0), |
| 202 | part_0_ctx_nonzero_tsb_config_1, |
| 203 | TTE_G=1, TTE_Context=0x44, TTE_V=1, TTE_Size=0, TTE_NFO=0, |
| 204 | TTE_IE=0, TTE_Soft2=0, TTE_Diag=0, TTE_Soft=0, |
| 205 | TTE_L=0, TTE_CP=1, TTE_CV=0, TTE_E=0, TTE_P=0, TTE_W=1 |
| 206 | } |
| 207 | |
| 208 | .data |
| 209 | .global aliased_area |
| 210 | .align 0x100 |
| 211 | aliased_area: |
| 212 | .word 0xbeef |
| 213 | .skip 0x1000 |
| 214 | .word 0xbeef |
| 215 | |
| 216 | .end |